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| author | Sami Mujawar <sami.mujawar@arm.com> | 2019-07-09 16:18:27 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-03-29 16:53:35 +0000 |
| commit | 7c10e8abb6d457250bdc4b56612b1c36bed5915d (patch) | |
| tree | d7260280d2cf6fb1976e2e12818799f09fc599bd /BaseTools/Source/Python/CommonDataClass/CommonClass.py | |
| parent | d39271f114f035bb0a6ccf404c64f9131a9e45d8 (diff) | |
| download | edk2-7c10e8abb6d457250bdc4b56612b1c36bed5915d.tar.gz edk2-7c10e8abb6d457250bdc4b56612b1c36bed5915d.tar.bz2 edk2-7c10e8abb6d457250bdc4b56612b1c36bed5915d.zip | |
DynamicTablesPkg: Serial debug port initialisation
The ARM DCC serial port subtype is an option that is
supported by the DBG2 generator. However, the serial
port initialisation should only be done for PL011/SBSA
compatible UARTs.
Add check to conditionally initialise the serial port.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/CommonDataClass/CommonClass.py')
0 files changed, 0 insertions, 0 deletions