diff options
| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-05-31 10:56:35 +0800 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-06-02 14:23:29 +0800 |
| commit | b33b1055b0026f36be97fb5ec6826436088e9a23 (patch) | |
| tree | 4407203c9b6e3a2248b381183024b72c2b28e5c4 /BaseTools/Source/Python/CommonDataClass/DataClass.py | |
| parent | 54d7177c78dc35919a631c8baa533d287bf0ae57 (diff) | |
| download | edk2-b33b1055b0026f36be97fb5ec6826436088e9a23.tar.gz edk2-b33b1055b0026f36be97fb5ec6826436088e9a23.tar.bz2 edk2-b33b1055b0026f36be97fb5ec6826436088e9a23.zip | |
MdeModulePkg/Xhci: Remove TRB when canceling Async Int Transfer
Some USB devices don't report data periodically through Int
Transfer. They report data only when be asked. If the TRB
is not removed from the XHCI HW, when next time HOST asks
data again, the data is reported but consumed by the previous
TRB, which results the HOST thinks data never comes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/CommonDataClass/DataClass.py')
0 files changed, 0 insertions, 0 deletions