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| author | Eric Dong <eric.dong@intel.com> | 2018-08-27 20:19:20 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:11 +0800 |
| commit | b715c37eaa2bbb375a11c9fb5229d6d46181d3d0 (patch) | |
| tree | c366782ed5ca688baec8bcfd0642ede4c76da8d3 /BaseTools/Source/Python/CommonDataClass/DataClass.py | |
| parent | ba1a2d1102de42b66b16e5e3152afb21447010b2 (diff) | |
| download | edk2-b715c37eaa2bbb375a11c9fb5229d6d46181d3d0.tar.gz edk2-b715c37eaa2bbb375a11c9fb5229d6d46181d3d0.tar.bz2 edk2-b715c37eaa2bbb375a11c9fb5229d6d46181d3d0.zip | |
UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture.
Changes includes:
1. Add new MSR file which used for goldmont plus microarchitecture.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/CommonDataClass/DataClass.py')
0 files changed, 0 insertions, 0 deletions