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| author | Eric Dong <eric.dong@intel.com> | 2018-08-30 13:57:58 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:12 +0800 |
| commit | c4b073632d6fa2fd9079fb6d088738bb7d5c7f71 (patch) | |
| tree | db80e69f1090170529446b6ee3bb23c666f80a2f /BaseTools/Source/Python/CommonDataClass/DataClass.py | |
| parent | 47f75d2169eca006d93216f14f86ded6470f9be2 (diff) | |
| download | edk2-c4b073632d6fa2fd9079fb6d088738bb7d5c7f71.tar.gz edk2-c4b073632d6fa2fd9079fb6d088738bb7d5c7f71.tar.bz2 edk2-c4b073632d6fa2fd9079fb6d088738bb7d5c7f71.zip | |
UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.
Changes includes:
1. Add new MSR: MSR_*_MSRUNCORE_RATIO_LIMIT
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/CommonDataClass/DataClass.py')
0 files changed, 0 insertions, 0 deletions