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authorStar Zeng <star.zeng@intel.com>2018-01-17 18:31:29 +0800
committerStar Zeng <star.zeng@intel.com>2018-01-24 18:40:36 +0800
commitbac7f02365b1d24cc6ac93fe853a25ebb8df6efe (patch)
tree006a4f7bce3548c05c2162a72e20a6c29d4423ce /BaseTools/Source/Python/Ecc/CParser.py
parent748cd9a68041d00f991eee3570f7150f573d360f (diff)
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IntelSiliconPkg IntelVTdDxe: Fix flush cache issue
The patch fixes flush cache issue in CreateSecondLevelPagingEntryTable(). We found some video cards still not work even they have been added to the exception list. In CreateSecondLevelPagingEntryTable(), the check "(BaseAddress >= MemoryLimit)" may be TRUE and "goto Done" will be executed, then the FlushPageTableMemory operations at the end of the function will be skipped. Instead of "goto Done", this patch uses "break" to break the for loops, then the FlushPageTableMemory operations at the end of the function could have opportunity to be executed. The patch also fixes a miscalculation for Lvl3End. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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