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| author | Michael Kinney <michael.d.kinney@intel.com> | 2017-05-11 15:35:21 -0700 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2017-05-19 13:59:27 -0700 |
| commit | 0d0a19cb14ba6867813f56a52cfc89545ad07f3a (patch) | |
| tree | c379fc29eac5178902a1a42d23c4cc7462a7e549 /BaseTools/Source/Python/Ecc/Database.py | |
| parent | bbd61de5dbc6ad146dc7250e9646cb662604b5f3 (diff) | |
| download | edk2-0d0a19cb14ba6867813f56a52cfc89545ad07f3a.tar.gz edk2-0d0a19cb14ba6867813f56a52cfc89545ad07f3a.tar.bz2 edk2-0d0a19cb14ba6867813f56a52cfc89545ad07f3a.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Add missing JMP instruction
https://bugzilla.tianocore.org/show_bug.cgi?id=555
Add JMP instruction in SmiEntry.S file that is missing. This
updates SmiEntry.S to match the logic in SmiEntry.asm and
SmiEntry.nasm.
The default BUILDRULEORDER has .nasm higher priority than
.asm or .S, so this issue was not seen with MSFT or GCC
tool chain families. The XCODE5 tool chain overrides the
BUILDRULEORDER with .S higher than .nasm, so this issue
was only seen when using XCODE5 tool chain when IA32 SMM
is enabled.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/Ecc/Database.py')
0 files changed, 0 insertions, 0 deletions