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author | Star Zeng <star.zeng@intel.com> | 2018-10-17 17:43:28 +0800 |
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committer | Star Zeng <star.zeng@intel.com> | 2018-10-25 11:50:43 +0800 |
commit | 8c09f300103993985c91532239a72ba879df0b31 (patch) | |
tree | 68339085c7b4b3f7d8bb18dbadb301843d4f2da6 /BaseTools/Source/Python/Ecc/Database.py | |
parent | 0bc7448ad2eafa6f51172c34d24f6a757d5ecf32 (diff) | |
download | edk2-8c09f300103993985c91532239a72ba879df0b31.tar.gz edk2-8c09f300103993985c91532239a72ba879df0b31.tar.bz2 edk2-8c09f300103993985c91532239a72ba879df0b31.zip |
IntelSiliconPkg VTdDxe: Option to force no early access attr request
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1272
To have high confidence in usage for platform, add option (BIT2 of
PcdVTdPolicyPropertyMask) to force no IOMMU access attribute request
recording before DMAR table is installed.
Check PcdVTdPolicyPropertyMask BIT2 before RequestAccessAttribute()
and ProcessRequestedAccessAttribute(), then RequestAccessAttribute(),
ProcessRequestedAccessAttribute() and mAccessRequestXXX variables
could be optimized by compiler when PcdVTdPolicyPropertyMask BIT2 = 1.
Test done:
1: Created case that has IOMMU access attribute request before DMAR
table is installed, ASSERT was triggered after setting
PcdVTdPolicyPropertyMask BIT2 to 1.
2. Confirmed RequestAccessAttribute(), ProcessRequestedAccessAttribute()
and mAccessRequestXXX variables were optimized by compiler after
setting PcdVTdPolicyPropertyMask BIT2 to 1.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Ecc/Database.py')
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