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authorHao Wu <hao.a.wu@intel.com>2018-01-23 12:47:44 +0800
committerHao Wu <hao.a.wu@intel.com>2018-01-24 13:16:27 +0800
commit748cd9a68041d00f991eee3570f7150f573d360f (patch)
tree7f5e9aa2f52adffbc0687c44dfef139d9770ace3 /BaseTools/Source/Python/Eot/CParser.py
parent9d5aab05540fd7de26894b05544f1efc424ff595 (diff)
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MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmd
Within function NvmExpressPassThru(): The data buffer for the below 2 Admin command: Create I/O Completion Queue command (Opcode 01h) Create I/O Submission Queue command (Opcode 05h) are not mapped to the PCI controller specific addresses. But the current code logic also prevents the below NVM command: Write (Opcode 01h) from mapping its data buffer. Hence, this commit refine the logic to resolve this issue. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
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