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| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2018-08-23 10:50:16 +0800 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2018-08-27 09:40:22 +0800 |
| commit | 983f5abb9a0d6cf9cfb5e16d671f15e5dc7510d8 (patch) | |
| tree | ba17cc103629c3da56d86e9c873ec84ca8ee1479 /BaseTools/Source/Python/GenFds/RuleComplexFile.py | |
| parent | 06da1e310bcea971073a8dabc5c3d35bc190847c (diff) | |
| download | edk2-983f5abb9a0d6cf9cfb5e16d671f15e5dc7510d8.tar.gz edk2-983f5abb9a0d6cf9cfb5e16d671f15e5dc7510d8.tar.bz2 edk2-983f5abb9a0d6cf9cfb5e16d671f15e5dc7510d8.zip | |
MdeModulePkg/PciBus: Restrict one VGA per HostBridge not Segment
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1109
Today's restriction of VGA device is to have only one VGA device
enabled per PCI segment. It's not correct because several segments
may share one IO / MMIO address space.
We should restrict to have one VGA per Host Bridge because each
Host Bridge has its only IO / MMIO address space.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/GenFds/RuleComplexFile.py')
0 files changed, 0 insertions, 0 deletions