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| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-06-28 17:11:34 +0800 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-07-05 11:31:06 +0800 |
| commit | 41fb8ce93930c33931a54550b12e1247fb86c805 (patch) | |
| tree | 1002e4106bb8111088a0ae5a92635cf0fcb0e806 /BaseTools/Source/Python/Table/TableDsc.py | |
| parent | 396ae94d46906c52875054a0487d37cad2ff1216 (diff) | |
| download | edk2-41fb8ce93930c33931a54550b12e1247fb86c805.tar.gz edk2-41fb8ce93930c33931a54550b12e1247fb86c805.tar.bz2 edk2-41fb8ce93930c33931a54550b12e1247fb86c805.zip | |
MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer
The patch separates the common logic in XhcControlTransfer,
XhcBulkTransfer and XhcSyncIntTransfer to a sub-routine
XhcTransfer. It doesn't have functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Table/TableDsc.py')
0 files changed, 0 insertions, 0 deletions