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| author | Duggapu Chinni B <chinni.b.duggapu@intel.com> | 2024-04-05 09:30:48 +0530 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-04-09 17:15:10 +0000 |
| commit | 543add1d414f6016829f7d706fdefb3b830020ef (patch) | |
| tree | 0d71314bfa32cee3d3c7606bd9602520f4ae3e9d /BaseTools/Source/Python/Workspace/DecBuildData.py | |
| parent | 932db9df0caa26daca4edf133fb2aed7b4a9193e (diff) | |
| download | edk2-543add1d414f6016829f7d706fdefb3b830020ef.tar.gz edk2-543add1d414f6016829f7d706fdefb3b830020ef.tar.bz2 edk2-543add1d414f6016829f7d706fdefb3b830020ef.zip | |
IntelFsp2Pkg: Fsp T new ARCH UPD Support
Changes to support spec changes
1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>
Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Workspace/DecBuildData.py')
0 files changed, 0 insertions, 0 deletions