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author | Dandan Bi <dandan.bi@intel.com> | 2018-01-19 13:01:38 +0800 |
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committer | Liming Gao <liming.gao@intel.com> | 2018-02-08 12:50:18 +0800 |
commit | 9609d24b198f27d445b1d173d0f48186769eb259 (patch) | |
tree | 88f678e26efaddaa19f51ce6b9f8232e4d9c9cc5 /BaseTools/Source/Python/Workspace/DecBuildData.py | |
parent | 9169f67690b30c415ef292166509537b74d032ed (diff) | |
download | edk2-9609d24b198f27d445b1d173d0f48186769eb259.tar.gz edk2-9609d24b198f27d445b1d173d0f48186769eb259.tar.bz2 edk2-9609d24b198f27d445b1d173d0f48186769eb259.zip |
MdeModulePkg/DxeCorePerformanceLib:Track FPDT record in DXE phase
V4:
a.Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.
b. Add check for Insert FPDT record in DxeCorePerformanceLib
to avoid re-entry case.
V3:
a. Handle the case when string is empty in String Record.
b. refine the code logic.
V2:
Update DxecorePerformanceLib to report the boot performance table
address instead of records contents.
Updated to convert Pref entry to FPDT record in DXE phase and then
allocate boot performance table to save the record and report
the address of boot performance table to FirmwarePerformanceDxe.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Workspace/DecBuildData.py')
0 files changed, 0 insertions, 0 deletions