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| author | Eric Dong <eric.dong@intel.com> | 2018-09-14 08:59:27 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:15 +0800 |
| commit | 140d713175f8a6176e67f179fc31b540461d81e5 (patch) | |
| tree | bcd42335ed07ba3b4e5d0cd68eb1c2183c0c103e /BaseTools/Source/Python/Workspace/DscBuildData.py | |
| parent | 8b344785a3eb20aaf224816af845fe7aeff364e2 (diff) | |
| download | edk2-140d713175f8a6176e67f179fc31b540461d81e5.tar.gz edk2-140d713175f8a6176e67f179fc31b540461d81e5.tar.bz2 edk2-140d713175f8a6176e67f179fc31b540461d81e5.zip | |
UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.
Changes includes:
1. Change MSR name:
1. MSR_GOLDMONT_SGXOWNER0 => MSR_GOLDMONT_SGXOWNEREPOCH0
2. MSR_GOLDMONT_SGXOWNER1 => MSR_GOLDMONT_SGXOWNEREPOCH1
2. Keep old MSR definition (MSR_GOLDMONT_SGXOWNER0/1) for compatibility.
1. Define old MSR like below style:
#define MSR_GOLDMONT_SGXOWNER0 MSR_GOLDMONT_SGXOWNEREPOCH0
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/Workspace/DscBuildData.py')
0 files changed, 0 insertions, 0 deletions