diff options
| author | Eric Dong <eric.dong@intel.com> | 2018-08-30 14:13:13 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:13 +0800 |
| commit | d05b288ae9a5a91a9801c93f03460d776d54f3ca (patch) | |
| tree | 4b81e1c349433d851c8747fdc285236699cf203d /BaseTools/Source/Python/Workspace/DscBuildData.py | |
| parent | 3add020579e77968a3ce9e9620136df46d22e598 (diff) | |
| download | edk2-d05b288ae9a5a91a9801c93f03460d776d54f3ca.tar.gz edk2-d05b288ae9a5a91a9801c93f03460d776d54f3ca.tar.bz2 edk2-d05b288ae9a5a91a9801c93f03460d776d54f3ca.zip | |
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR.
Changes includes:
1. Add new MSRs: MSR_IA32_L2_QOS_CFG/MSR_IA32_CSTAR.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python/Workspace/DscBuildData.py')
0 files changed, 0 insertions, 0 deletions