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| author | Ray Ni <ray.ni@intel.com> | 2019-08-24 06:45:31 +0800 |
|---|---|---|
| committer | Ray Ni <ray.ni@intel.com> | 2019-09-04 01:00:10 +0800 |
| commit | 87184487d2a1d46005a2076a73be3e6fb121afac (patch) | |
| tree | d02c24dd1f0be3a6bbec84e5b046c2a56e943e22 /BaseTools/Source/Python | |
| parent | 8b8e91584555b6193f2099a36502763b47501533 (diff) | |
| download | edk2-87184487d2a1d46005a2076a73be3e6fb121afac.tar.gz edk2-87184487d2a1d46005a2076a73be3e6fb121afac.tar.bz2 edk2-87184487d2a1d46005a2076a73be3e6fb121afac.zip | |
UefiCpuPkg: Add PcdCpuSmmRestrictedMemoryAccess
The patch adds a new X64 only PCD PcdCpuSmmRestrictedMemoryAccess.
The PCD indicates access to non-SMRAM memory is restricted to
reserved, runtime and ACPI NVS type after SmmReadyToLock.
MMIO access is always allowed regardless of the value of this PCD.
Loose of such restriction is only required by RAS components in X64
platforms.
The PCD value is considered as constantly TRUE in IA32 platforms.
When the PCD value is TRUE, page table is initialized to cover all
memory spaces and the memory occupied by page table is protected by
page table itself as read-only.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'BaseTools/Source/Python')
0 files changed, 0 insertions, 0 deletions