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| author | Gao, Zhichao <zhichao.gao@intel.com> | 2019-07-22 14:57:54 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2019-09-04 15:57:27 +0800 |
| commit | adb59b633c12eae334540295092da94736bffa33 (patch) | |
| tree | dd19369dfcc24081651f11196ef5ef56c7b4452b /BaseTools/Source/Python | |
| parent | fa5e184327519e2ff367538b1cade1e5687e8795 (diff) | |
| download | edk2-adb59b633c12eae334540295092da94736bffa33.tar.gz edk2-adb59b633c12eae334540295092da94736bffa33.tar.bz2 edk2-adb59b633c12eae334540295092da94736bffa33.zip | |
ShellPkg/Pci.c: Update supported link speed to PCI5.0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1955
Refer to PCI express base specification Reversion 5.0, Version
1.0, Table 7-33, Supported Link Speeds Vector bit 3 indicate
the speed 16 GT/s and bit 4 indicate the speed 32 GT/s.
Add the support to shell command 'pci ...'.
Change the MaxLinkSpeed other values' result from 'Unknown'
to 'Reserved' to make the result align.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Oleksiy <oleksiyy@ami.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'BaseTools/Source/Python')
0 files changed, 0 insertions, 0 deletions