summaryrefslogtreecommitdiffstats
path: root/CorebootModulePkg/Include
diff options
context:
space:
mode:
authorMaurice Ma <maurice.ma@intel.com>2015-03-31 01:06:23 +0000
committermauricema <mauricema@Edk2>2015-03-31 01:06:23 +0000
commitfce4ecd92cf137d479c0dc97461bec3512e9c98d (patch)
tree58c77cce1adb54af4e94ec196c0db9448a09154b /CorebootModulePkg/Include
parent14df6e059c9115108c9fcbbceac2ae4c6fc7ee94 (diff)
downloadedk2-fce4ecd92cf137d479c0dc97461bec3512e9c98d.tar.gz
edk2-fce4ecd92cf137d479c0dc97461bec3512e9c98d.tar.bz2
edk2-fce4ecd92cf137d479c0dc97461bec3512e9c98d.zip
Pkg-Module: CorebootModulePkg
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot. CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources. It supports the following features: - Support Unified Extensible Firmware Interface (UEFI) specification 2.4. - Support Platform Initialization(PI) specification 1.3. - Support execution as a coreboot payload. - Support USB 3.0 - Support SATA/ATA devices. - Support EFI aware OS boot. The following features are not supported currently and have not been validated: - GCC Tool Chains - SMM Execution Environment - Security Boot It was tested on a Intel Bay Trail CRB platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'CorebootModulePkg/Include')
-rw-r--r--CorebootModulePkg/Include/Coreboot.h219
-rw-r--r--CorebootModulePkg/Include/Guid/AcpiBoardInfoGuid.h30
-rw-r--r--CorebootModulePkg/Include/Guid/FrameBufferInfoGuid.h40
-rw-r--r--CorebootModulePkg/Include/Guid/SystemTableInfoGuid.h30
-rw-r--r--CorebootModulePkg/Include/Library/CbParseLib.h154
5 files changed, 473 insertions, 0 deletions
diff --git a/CorebootModulePkg/Include/Coreboot.h b/CorebootModulePkg/Include/Coreboot.h
new file mode 100644
index 0000000000..7bec1f3d6f
--- /dev/null
+++ b/CorebootModulePkg/Include/Coreboot.h
@@ -0,0 +1,219 @@
+/** @file
+ Coreboot PEI module include file.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#ifndef _COREBOOT_PEI_H_INCLUDED_
+#define _COREBOOT_PEI_H_INCLUDED_
+
+#pragma warning( disable : 4200 )
+
+#define DYN_CBMEM_ALIGN_SIZE (4096)
+
+struct cbmem_entry {
+ UINT32 magic;
+ UINT32 start;
+ UINT32 size;
+ UINT32 id;
+};
+
+struct cbmem_root {
+ UINT32 max_entries;
+ UINT32 num_entries;
+ UINT32 locked;
+ UINT32 size;
+ struct cbmem_entry entries[0];
+};
+
+struct cbuint64 {
+ UINT32 lo;
+ UINT32 hi;
+};
+
+#define CB_HEADER_SIGNATURE 0x4F49424C
+
+struct cb_header {
+ UINT32 signature;
+ UINT32 header_bytes;
+ UINT32 header_checksum;
+ UINT32 table_bytes;
+ UINT32 table_checksum;
+ UINT32 table_entries;
+};
+
+struct cb_record {
+ UINT32 tag;
+ UINT32 size;
+};
+
+#define CB_TAG_UNUSED 0x0000
+#define CB_TAG_MEMORY 0x0001
+
+struct cb_memory_range {
+ struct cbuint64 start;
+ struct cbuint64 size;
+ UINT32 type;
+};
+
+#define CB_MEM_RAM 1
+#define CB_MEM_RESERVED 2
+#define CB_MEM_ACPI 3
+#define CB_MEM_NVS 4
+#define CB_MEM_UNUSABLE 5
+#define CB_MEM_VENDOR_RSVD 6
+#define CB_MEM_TABLE 16
+
+struct cb_memory {
+ UINT32 tag;
+ UINT32 size;
+ struct cb_memory_range map[0];
+};
+
+#define CB_TAG_MAINBOARD 0x0003
+
+struct cb_mainboard {
+ UINT32 tag;
+ UINT32 size;
+ UINT8 vendor_idx;
+ UINT8 part_number_idx;
+ UINT8 strings[0];
+};
+#define CB_TAG_VERSION 0x0004
+#define CB_TAG_EXTRA_VERSION 0x0005
+#define CB_TAG_BUILD 0x0006
+#define CB_TAG_COMPILE_TIME 0x0007
+#define CB_TAG_COMPILE_BY 0x0008
+#define CB_TAG_COMPILE_HOST 0x0009
+#define CB_TAG_COMPILE_DOMAIN 0x000a
+#define CB_TAG_COMPILER 0x000b
+#define CB_TAG_LINKER 0x000c
+#define CB_TAG_ASSEMBLER 0x000d
+
+struct cb_string {
+ UINT32 tag;
+ UINT32 size;
+ UINT8 string[0];
+};
+
+#define CB_TAG_SERIAL 0x000f
+
+struct cb_serial {
+ UINT32 tag;
+ UINT32 size;
+#define CB_SERIAL_TYPE_IO_MAPPED 1
+#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
+ UINT32 type;
+ UINT32 baseaddr;
+ UINT32 baud;
+};
+
+#define CB_TAG_CONSOLE 0x00010
+
+struct cb_console {
+ UINT32 tag;
+ UINT32 size;
+ UINT16 type;
+};
+
+#define CB_TAG_CONSOLE_SERIAL8250 0
+#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
+#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
+#define CB_TAG_CONSOLE_LOGBUF 3
+#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE
+#define CB_TAG_CONSOLE_EHCI 5
+
+#define CB_TAG_FORWARD 0x00011
+
+struct cb_forward {
+ UINT32 tag;
+ UINT32 size;
+ UINT64 forward;
+};
+
+#define CB_TAG_FRAMEBUFFER 0x0012
+struct cb_framebuffer {
+ UINT32 tag;
+ UINT32 size;
+
+ UINT64 physical_address;
+ UINT32 x_resolution;
+ UINT32 y_resolution;
+ UINT32 bytes_per_line;
+ UINT8 bits_per_pixel;
+ UINT8 red_mask_pos;
+ UINT8 red_mask_size;
+ UINT8 green_mask_pos;
+ UINT8 green_mask_size;
+ UINT8 blue_mask_pos;
+ UINT8 blue_mask_size;
+ UINT8 reserved_mask_pos;
+ UINT8 reserved_mask_size;
+};
+
+#define CB_TAG_VDAT 0x0015
+struct cb_vdat {
+ UINT32 tag;
+ UINT32 size; /* size of the entire entry */
+ UINT64 vdat_addr;
+ UINT32 vdat_size;
+};
+
+#define CB_TAG_TIMESTAMPS 0x0016
+#define CB_TAG_CBMEM_CONSOLE 0x0017
+#define CB_TAG_MRC_CACHE 0x0018
+struct cb_cbmem_tab {
+ UINT32 tag;
+ UINT32 size;
+ UINT64 cbmem_tab;
+};
+
+/* Helpful macros */
+
+#define MEM_RANGE_COUNT(_rec) \
+ (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
+
+#define MEM_RANGE_PTR(_rec, _idx) \
+ (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
+ + (sizeof((_rec)->map[0]) * (_idx)))
+
+
+#endif // _COREBOOT_PEI_H_INCLUDED_
diff --git a/CorebootModulePkg/Include/Guid/AcpiBoardInfoGuid.h b/CorebootModulePkg/Include/Guid/AcpiBoardInfoGuid.h
new file mode 100644
index 0000000000..66ebffef2d
--- /dev/null
+++ b/CorebootModulePkg/Include/Guid/AcpiBoardInfoGuid.h
@@ -0,0 +1,30 @@
+/** @file
+ This file defines the hob structure for board related information from acpi table
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __ACPI_BOARD_INFO_GUID_H__
+#define __ACPI_BOARD_INFO_GUID_H__
+
+///
+/// Board information GUID
+///
+extern EFI_GUID gUefiAcpiBoardInfoGuid;
+
+typedef struct {
+ UINT64 PmCtrlRegBase;
+ UINT64 PmTimerRegBase;
+ UINT64 ResetRegAddress;
+ UINT8 ResetValue;
+} ACPI_BOARD_INFO;
+
+#endif
diff --git a/CorebootModulePkg/Include/Guid/FrameBufferInfoGuid.h b/CorebootModulePkg/Include/Guid/FrameBufferInfoGuid.h
new file mode 100644
index 0000000000..be5ca49abc
--- /dev/null
+++ b/CorebootModulePkg/Include/Guid/FrameBufferInfoGuid.h
@@ -0,0 +1,40 @@
+/** @file
+ This file defines the hob structure for frame buffer device.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FRAME_BUFFER_INFO_GUID_H__
+#define __FRAME_BUFFER_INFO_GUID_H__
+
+///
+/// Frame Buffer Information GUID
+///
+extern EFI_GUID gUefiFrameBufferInfoGuid;
+
+typedef struct {
+ UINT8 Position; // Position of the color
+ UINT8 Mask; // The number of bits expressed as a mask
+} COLOR_PLACEMENT;
+
+typedef struct {
+ UINT64 LinearFrameBuffer;
+ UINT32 HorizontalResolution;
+ UINT32 VerticalResolution;
+ UINT32 BitsPerPixel;
+ UINT16 BytesPerScanLine;
+ COLOR_PLACEMENT Red;
+ COLOR_PLACEMENT Green;
+ COLOR_PLACEMENT Blue;
+ COLOR_PLACEMENT Reserved;
+} FRAME_BUFFER_INFO;
+
+#endif
diff --git a/CorebootModulePkg/Include/Guid/SystemTableInfoGuid.h b/CorebootModulePkg/Include/Guid/SystemTableInfoGuid.h
new file mode 100644
index 0000000000..5147645911
--- /dev/null
+++ b/CorebootModulePkg/Include/Guid/SystemTableInfoGuid.h
@@ -0,0 +1,30 @@
+/** @file
+ This file defines the hob structure for system tables like ACPI, SMBIOS tables.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __SYSTEM_TABLE_INFO_GUID_H__
+#define __SYSTEM_TABLE_INFO_GUID_H__
+
+///
+/// System Table Information GUID
+///
+extern EFI_GUID gUefiSystemTableInfoGuid;
+
+typedef struct {
+ UINT64 AcpiTableBase;
+ UINT32 AcpiTableSize;
+ UINT64 SmbiosTableBase;
+ UINT32 SmbiosTableSize;
+} SYSTEM_TABLE_INFO;
+
+#endif
diff --git a/CorebootModulePkg/Include/Library/CbParseLib.h b/CorebootModulePkg/Include/Library/CbParseLib.h
new file mode 100644
index 0000000000..36727d3f58
--- /dev/null
+++ b/CorebootModulePkg/Include/Library/CbParseLib.h
@@ -0,0 +1,154 @@
+/** @file
+ This library will parse the coreboot table in memory and extract those required
+ information.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include <Guid/FrameBufferInfoGuid.h>
+
+/**
+ Acquire the memory information from the coreboot table in memory.
+
+ @param pLowMemorySize Pointer to the variable of low memory size
+ @param pHighMemorySize Pointer to the variable of high memory size
+
+ @retval RETURN_SUCCESS Successfully find out the memory information.
+ @retval RETURN_INVALID_PARAMETER Invalid input parameters.
+ @retval RETURN_NOT_FOUND Failed to find the memory information.
+
+**/
+RETURN_STATUS
+CbParseMemoryInfo (
+ IN UINT64* pLowMemorySize,
+ IN UINT64* pHighMemorySize
+ );
+
+/**
+ Acquire the coreboot memory table with the given table id
+
+ @param TableId Table id to be searched
+ @param pMemTable Pointer to the base address of the memory table
+ @param pMemTableSize Pointer to the size of the memory table
+
+ @retval RETURN_SUCCESS Successfully find out the memory table.
+ @retval RETURN_INVALID_PARAMETER Invalid input parameters.
+ @retval RETURN_NOT_FOUND Failed to find the memory table.
+
+**/
+RETURN_STATUS
+CbParseCbMemTable (
+ IN UINT32 TableId,
+ IN VOID** pMemTable,
+ IN UINT32* pMemTableSize
+ );
+
+/**
+ Acquire the acpi table from coreboot
+
+ @param pMemTable Pointer to the base address of the memory table
+ @param pMemTableSize Pointer to the size of the memory table
+
+ @retval RETURN_SUCCESS Successfully find out the memory table.
+ @retval RETURN_INVALID_PARAMETER Invalid input parameters.
+ @retval RETURN_NOT_FOUND Failed to find the memory table.
+
+**/
+RETURN_STATUS
+CbParseAcpiTable (
+ IN VOID** pMemTable,
+ IN UINT32* pMemTableSize
+ );
+
+/**
+ Acquire the smbios table from coreboot
+
+ @param pMemTable Pointer to the base address of the memory table
+ @param pMemTableSize Pointer to the size of the memory table
+
+ @retval RETURN_SUCCESS Successfully find out the memory table.
+ @retval RETURN_INVALID_PARAMETER Invalid input parameters.
+ @retval RETURN_NOT_FOUND Failed to find the memory table.
+
+**/
+RETURN_STATUS
+CbParseSmbiosTable (
+ IN VOID** pMemTable,
+ IN UINT32* pMemTableSize
+ );
+
+/**
+ Find the required fadt information
+
+ @param pPmCtrlReg Pointer to the address of power management control register
+ @param pPmTimerReg Pointer to the address of power management timer register
+ @param pResetReg Pointer to the address of system reset register
+ @param pResetValue Pointer to the value to be writen to the system reset register
+
+ @retval RETURN_SUCCESS Successfully find out all the required fadt information.
+ @retval RETURN_NOT_FOUND Failed to find the fadt table.
+
+**/
+RETURN_STATUS
+CbParseFadtInfo (
+ IN UINTN* pPmCtrlReg,
+ IN UINTN* pPmTimerReg,
+ IN UINTN* pResetReg,
+ IN UINTN* pResetValue
+ );
+
+/**
+ Find the serial port information
+
+ @param pRegBase Pointer to the base address of serial port registers
+ @param pRegAccessType Pointer to the access type of serial port registers
+ @param pBaudrate Pointer to the serial port baudrate
+
+ @retval RETURN_SUCCESS Successfully find the serial port information.
+ @retval RETURN_NOT_FOUND Failed to find the serial port information .
+
+**/
+RETURN_STATUS
+CbParseSerialInfo (
+ IN UINT32* pRegBase,
+ IN UINT32* pRegAccessType,
+ IN UINT32* pBaudrate
+ );
+
+/**
+ Search for the coreboot table header
+
+ @param Level Level of the search depth
+ @param HeaderPtr Pointer to the pointer of coreboot table header
+
+ @retval RETURN_SUCCESS Successfully find the coreboot table header .
+ @retval RETURN_NOT_FOUND Failed to find the coreboot table header .
+
+**/
+RETURN_STATUS
+CbParseGetCbHeader (
+ IN UINTN Level,
+ IN VOID** HeaderPtr
+ );
+
+/**
+ Find the video frame buffer information
+
+ @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure
+
+ @retval RETURN_SUCCESS Successfully find the video frame buffer information.
+ @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .
+
+**/
+RETURN_STATUS
+CbParseFbInfo (
+ IN FRAME_BUFFER_INFO* pFbInfo
+ );
+