Pkg-Module: CorebootModulePkg

Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.
CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources.

It supports the following features:
  - Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
  - Support Platform Initialization(PI) specification 1.3.
  - Support execution as a coreboot payload.
  - Support USB 3.0
  - Support SATA/ATA devices.
  - Support EFI aware OS boot.

The following features are not supported currently and have not been validated:
  - GCC Tool Chains
  - SMM Execution Environment
  - Security Boot

It was tested on a Intel Bay Trail CRB platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524

8 files changed, 1000 insertions, 0 deletions

diff --git a/CorebootModulePkg/SecCore/FindPeiCore.c b/CorebootModulePkg/SecCore/FindPeiCore.c
new file mode 100644
index 0000000000..4ce032e72d
--- /dev/null
+++ b/CorebootModulePkg/SecCore/FindPeiCore.c
@@ -0,0 +1,199 @@
+/** @file

+  Locate the entry point for the PEI Core

+

+Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include <PiPei.h>

+#include <Library/BaseLib.h>

+#include <Library/PeCoffGetEntryPointLib.h>

+

+#include "SecMain.h"

+

+/**

+  Find core image base.

+  

+  @param   BootFirmwareVolumePtr    Point to the boot firmware volume.

+  @param   SecCoreImageBase         The base address of the SEC core image.

+  @param   PeiCoreImageBase         The base address of the PEI core image.

+

+**/

+EFI_STATUS

+EFIAPI

+FindImageBase (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PHYSICAL_ADDRESS             *SecCoreImageBase,

+  OUT EFI_PHYSICAL_ADDRESS             *PeiCoreImageBase

+  )

+{

+  EFI_PHYSICAL_ADDRESS        CurrentAddress;

+  EFI_PHYSICAL_ADDRESS        EndOfFirmwareVolume;

+  EFI_FFS_FILE_HEADER         *File;

+  UINT32                      Size;

+  EFI_PHYSICAL_ADDRESS        EndOfFile;

+  EFI_COMMON_SECTION_HEADER   *Section;

+  EFI_PHYSICAL_ADDRESS        EndOfSection;

+

+  *SecCoreImageBase = 0;

+  *PeiCoreImageBase = 0;

+

+  CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePtr;

+  EndOfFirmwareVolume = CurrentAddress + BootFirmwareVolumePtr->FvLength;

+

+  //

+  // Loop through the FFS files in the Boot Firmware Volume

+  //

+  for (EndOfFile = CurrentAddress + BootFirmwareVolumePtr->HeaderLength; ; ) {

+

+    CurrentAddress = (EndOfFile + 7) & 0xfffffffffffffff8ULL;

+    if (CurrentAddress > EndOfFirmwareVolume) {

+      return EFI_NOT_FOUND;

+    }

+

+    File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;

+    if (IS_FFS_FILE2 (File)) {

+      Size = FFS_FILE2_SIZE (File);

+      if (Size <= 0x00FFFFFF) {

+        return EFI_NOT_FOUND;

+      }

+    } else {

+      Size = FFS_FILE_SIZE (File);

+      if (Size < sizeof (EFI_FFS_FILE_HEADER)) {

+        return EFI_NOT_FOUND;

+      }

+    }

+

+    EndOfFile = CurrentAddress + Size;

+    if (EndOfFile > EndOfFirmwareVolume) {

+      return EFI_NOT_FOUND;

+    }

+

+    //

+    // Look for SEC Core / PEI Core files

+    //

+    if (File->Type != EFI_FV_FILETYPE_SECURITY_CORE &&

+        File->Type != EFI_FV_FILETYPE_PEI_CORE) {

+      continue;

+    }

+

+    //

+    // Loop through the FFS file sections within the FFS file

+    //

+    if (IS_FFS_FILE2 (File)) {

+      EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER2));

+    } else {

+      EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER));

+    }

+    for (;;) {

+      CurrentAddress = (EndOfSection + 3) & 0xfffffffffffffffcULL;

+      Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;

+

+      if (IS_SECTION2 (Section)) {

+        Size = SECTION2_SIZE (Section);

+        if (Size <= 0x00FFFFFF) {

+          return EFI_NOT_FOUND;

+        }

+      } else {

+        Size = SECTION_SIZE (Section);

+        if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) {

+          return EFI_NOT_FOUND;

+        }

+      }

+

+      EndOfSection = CurrentAddress + Size;

+      if (EndOfSection > EndOfFile) {

+        return EFI_NOT_FOUND;

+      }

+

+      //

+      // Look for executable sections

+      //

+      if (Section->Type == EFI_SECTION_PE32 || Section->Type == EFI_SECTION_TE) {

+        if (File->Type == EFI_FV_FILETYPE_SECURITY_CORE) {

+          if (IS_SECTION2 (Section)) {

+            *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));

+          } else {

+            *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));

+          }

+        } else {

+          if (IS_SECTION2 (Section)) {

+            *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));

+          } else {

+            *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));

+          }

+        }

+        break;

+      }

+    }

+

+    //

+    // Both SEC Core and PEI Core images found

+    //

+    if (*SecCoreImageBase != 0 && *PeiCoreImageBase != 0) {

+      return EFI_SUCCESS;

+    }

+  }

+}

+

+/**

+  Find and return Pei Core entry point.

+

+  It also find SEC and PEI Core file debug inforamtion. It will report them if

+  remote debug is enabled.

+  

+  @param   BootFirmwareVolumePtr    Point to the boot firmware volume.

+  @param   PeiCoreEntryPoint        The entry point of the PEI core.

+

+**/

+VOID

+EFIAPI

+FindAndReportEntryPoints (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PEI_CORE_ENTRY_POINT         *PeiCoreEntryPoint

+  )

+{

+  EFI_STATUS                       Status;

+  EFI_PHYSICAL_ADDRESS             SecCoreImageBase;

+  EFI_PHYSICAL_ADDRESS             PeiCoreImageBase;

+  PE_COFF_LOADER_IMAGE_CONTEXT     ImageContext;

+

+  //

+  // Find SEC Core and PEI Core image base

+  //

+  Status = FindImageBase (BootFirmwareVolumePtr, &SecCoreImageBase, &PeiCoreImageBase);

+  ASSERT_EFI_ERROR (Status);

+

+  ZeroMem ((VOID *) &ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));

+  //

+  // Report SEC Core debug information when remote debug is enabled

+  //

+  ImageContext.ImageAddress = SecCoreImageBase;

+  ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);

+  PeCoffLoaderRelocateImageExtraAction (&ImageContext);

+

+  //

+  // Report PEI Core debug information when remote debug is enabled

+  //

+  ImageContext.ImageAddress = PeiCoreImageBase;

+  ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);

+  PeCoffLoaderRelocateImageExtraAction (&ImageContext);

+

+  //

+  // Find PEI Core entry point

+  //

+  Status = PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBase, (VOID**) PeiCoreEntryPoint);

+  if (EFI_ERROR (Status)) {

+    *PeiCoreEntryPoint = 0;

+  }

+

+  return;

+}

+

diff --git a/CorebootModulePkg/SecCore/Ia32/SecEntry.S b/CorebootModulePkg/SecCore/Ia32/SecEntry.S
new file mode 100644
index 0000000000..7133a9edb7
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/SecEntry.S
@@ -0,0 +1,74 @@
+#------------------------------------------------------------------------------

+#

+# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+# This program and the accompanying materials

+# are licensed and made available under the terms and conditions of the BSD License

+# which accompanies this distribution.  The full text of the license may be found at

+# http://opensource.org/licenses/bsd-license.php.

+#

+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+# Module Name:

+#

+#  SecEntry.S

+#

+# Abstract:

+#

+#  This is the code that begins in protected mode.

+#   It will transfer the control to pei core.

+#

+#------------------------------------------------------------------------------

+

+ASM_GLOBAL  ASM_PFX(SecStartup)

+

+# Pcds

+ASM_GLOBAL  ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))

+

+#

+# SecCore Entry Point

+#

+# Processor is in flat protected mode

+#

+# @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)

+# @param[in]  DI    'BP': boot-strap processor, or 'AP': application processor

+# @param[in]  EBP   Pointer to the start of the Boot Firmware Volume

+#

+# @return     None  This routine does not return

+#

+ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)

+ASM_PFX(_ModuleEntryPoint):

+  #

+  # Disable all the interrupts

+  #

+  cli

+  

+  #

+  # Construct the temporary memory at 0x80000, length 0x10000

+  #

+  movl ($BASE_512KB + $SIZE_64KB), %esp

+

+  #

+  # Pass BFV into the PEI Core

+  #

+  pushl ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))

+  

+  #

+  # Pass stack base into the PEI Core

+  #

+  pushl $BASE_512KB

+

+  #

+  # Pass stack size into the PEI Core

+  #

+  pushl $SIZE_64KB

+

+  #

+  # Pass Control into the PEI Core

+  #

+  call SecStartup

+  

+  #

+  # Never return to here

+  #

+  jmp .

diff --git a/CorebootModulePkg/SecCore/Ia32/SecEntry.asm b/CorebootModulePkg/SecCore/Ia32/SecEntry.asm
new file mode 100644
index 0000000000..e3c2eac852
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/SecEntry.asm
@@ -0,0 +1,78 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php.

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;  SecEntry.asm

+;

+; Abstract:

+;

+;  This is the code that begins in protected mode.

+;  It will transfer the control to pei core.

+;

+;------------------------------------------------------------------------------

+#include <Base.h>

+

+.686p

+.xmm

+.model small, c

+

+EXTRN   SecStartup:NEAR

+

+; Pcds

+EXTRN   PcdGet32 (PcdPayloadFdMemBase):DWORD

+

+    .code

+

+;

+; SecCore Entry Point

+;

+; Processor is in flat protected mode

+;

+; @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)

+; @param[in]  DI    'BP': boot-strap processor, or 'AP': application processor

+; @param[in]  EBP   Pointer to the start of the Boot Firmware Volume

+;

+; @return     None  This routine does not return

+;

+

+_ModuleEntryPoint   PROC PUBLIC 

+  ;

+  ; Disable all the interrupts

+  ;   

+  cli

+  ;

+  ; Construct the temporary memory at 0x80000, length 0x10000

+  ;

+  mov  esp, (BASE_512KB + SIZE_64KB)

+  

+  ;

+  ; Pass BFV into the PEI Core

+  ;

+  push    PcdGet32 (PcdPayloadFdMemBase)

+

+  ;

+  ; Pass stack base into the PEI Core

+  ;

+  push    BASE_512KB

+

+  ;

+  ; Pass stack size into the PEI Core

+  ;

+  push    SIZE_64KB

+

+  ;

+  ; Pass Control into the PEI Core

+  ;

+  call SecStartup

+_ModuleEntryPoint   ENDP

+

+END

diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.S b/CorebootModulePkg/SecCore/Ia32/Stack.S
new file mode 100644
index 0000000000..cd492404a0
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/Stack.S
@@ -0,0 +1,78 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Abstract:
+#
+#   Switch the stack from temporary memory to permenent memory.
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# SecSwitchStack (
+#   UINT32   TemporaryMemoryBase,
+#   UINT32   PermenentMemoryBase
+#   )#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX (SecSwitchStack)
+ASM_PFX(SecSwitchStack):
+    #
+    # Save standard registers so they can be used to change stack
+    #
+    pushl %eax
+    pushl %ebx
+    pushl %ecx
+    pushl %edx
+
+    #
+    # !!CAUTION!! this function address's is pushed into stack after
+    # migration of whole temporary memory, so need save it to permenent
+    # memory at first!
+    #
+    movl  20(%esp), %ebx         # Save the first parameter
+    movl  24(%esp), %ecx         # Save the second parameter
+
+    #
+    # Save this function's return address into permenent memory at first.
+    # Then, Fixup the esp point to permenent memory
+    #
+    movl  %esp, %eax
+    subl  %ebx, %eax
+    addl  %ecx, %eax
+    movl  0(%esp), %edx          # copy pushed register's value to permenent memory
+    movl  %edx, 0(%eax)
+    movl  4(%esp), %edx
+    movl  %edx, 4(%eax)
+    movl  8(%esp), %edx
+    movl  %edx, 8(%eax)
+    movl  12(%esp), %edx
+    movl  %edx, 12(%eax)
+    movl  16(%esp), %edx        # Update this function's return address into permenent memory
+    movl  %edx, 16(%eax)
+    movl  %eax, %esp            # From now, esp is pointed to permenent memory
+
+    #
+    # Fixup the ebp point to permenent memory
+    #
+    movl  %ebp, %eax
+    subl  %ebx, %eax
+    addl  %ecx, %eax
+    movl  %eax, %ebp            # From now, ebp is pointed to permenent memory
+
+    popl  %edx
+    popl  %ecx
+    popl  %ebx
+    popl  %eax
+    ret
+
+
diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.asm b/CorebootModulePkg/SecCore/Ia32/Stack.asm
new file mode 100644
index 0000000000..9d1ed153e1
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/Stack.asm
@@ -0,0 +1,82 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php.

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Abstract:

+;

+;   Switch the stack from temporary memory to permenent memory.

+;

+;------------------------------------------------------------------------------

+

+    .586p

+    .model  flat,C

+    .code

+    

+;------------------------------------------------------------------------------

+; VOID

+; EFIAPI

+; SecSwitchStack (

+;   UINT32   TemporaryMemoryBase,

+;   UINT32   PermenentMemoryBase

+;   );

+;------------------------------------------------------------------------------    

+SecSwitchStack   PROC

+    ;

+    ; Save three register: eax, ebx, ecx

+    ;

+    push  eax

+    push  ebx

+    push  ecx

+    push  edx

+    

+    ;

+    ; !!CAUTION!! this function address's is pushed into stack after

+    ; migration of whole temporary memory, so need save it to permenent

+    ; memory at first!

+    ;

+    

+    mov   ebx, [esp + 20]          ; Save the first parameter

+    mov   ecx, [esp + 24]          ; Save the second parameter

+    

+    ;

+    ; Save this function's return address into permenent memory at first.

+    ; Then, Fixup the esp point to permenent memory

+    ;

+    mov   eax, esp

+    sub   eax, ebx

+    add   eax, ecx

+    mov   edx, dword ptr [esp]         ; copy pushed register's value to permenent memory

+    mov   dword ptr [eax], edx    

+    mov   edx, dword ptr [esp + 4]

+    mov   dword ptr [eax + 4], edx    

+    mov   edx, dword ptr [esp + 8]

+    mov   dword ptr [eax + 8], edx    

+    mov   edx, dword ptr [esp + 12]

+    mov   dword ptr [eax + 12], edx    

+    mov   edx, dword ptr [esp + 16]    ; Update this function's return address into permenent memory

+    mov   dword ptr [eax + 16], edx    

+    mov   esp, eax                     ; From now, esp is pointed to permenent memory

+        

+    ;

+    ; Fixup the ebp point to permenent memory

+    ;

+    mov   eax, ebp

+    sub   eax, ebx

+    add   eax, ecx

+    mov   ebp, eax                ; From now, ebp is pointed to permenent memory

+    

+    pop   edx

+    pop   ecx

+    pop   ebx

+    pop   eax

+    ret

+SecSwitchStack   ENDP

+

+    END

diff --git a/CorebootModulePkg/SecCore/SecCore.inf b/CorebootModulePkg/SecCore/SecCore.inf
new file mode 100644
index 0000000000..f8468f4c24
--- /dev/null
+++ b/CorebootModulePkg/SecCore/SecCore.inf
@@ -0,0 +1,64 @@
+## @file

+# This is the first module taking control from the coreboot.

+#

+#  Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = SecCore

+  FILE_GUID                      = BA7BE337-6CFB-4dbb-B26C-21EC2FC16073

+  MODULE_TYPE                    = SEC

+  VERSION_STRING                 = 1.0

+

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources]

+  SecMain.c

+  SecMain.h

+  FindPeiCore.c

+

+[Sources.IA32]

+  Ia32/Stack.asm     | MSFT

+  Ia32/Stack.S       | GCC

+  Ia32/SecEntry.asm  | MSFT

+  Ia32/SecEntry.S    | GCC

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  UefiCpuPkg/UefiCpuPkg.dec

+  CorebootModulePkg/CorebootModulePkg.dec

+

+[LibraryClasses]

+  BaseMemoryLib

+  DebugLib

+  BaseLib

+  PcdLib

+  DebugAgentLib

+  UefiCpuLib

+  PeCoffGetEntryPointLib

+  PeCoffExtraActionLib

+

+[Ppis]

+  gEfiSecPlatformInformationPpiGuid             # PPI ALWAYS_PRODUCED

+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED

+

+[Pcd]

+  gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase

+  gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize

+

diff --git a/CorebootModulePkg/SecCore/SecMain.c b/CorebootModulePkg/SecCore/SecMain.c
new file mode 100644
index 0000000000..7ce0463d98
--- /dev/null
+++ b/CorebootModulePkg/SecCore/SecMain.c
@@ -0,0 +1,291 @@
+/** @file

+  C funtions in SEC

+

+Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+

+#include "SecMain.h"

+

+EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {

+  SecTemporaryRamSupport

+};

+

+EFI_PEI_PPI_DESCRIPTOR            mPeiSecPlatformInformationPpi[] = {

+  {

+    (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),

+    &gEfiTemporaryRamSupportPpiGuid,

+    &gSecTemporaryRamSupportPpi

+  }

+};

+

+//

+// These are IDT entries pointing to 10:FFFFFFE4h.

+//

+UINT64  mIdtEntryTemplate = 0xffff8e000010ffe4ULL;

+

+/**

+  Caller provided function to be invoked at the end of InitializeDebugAgent().

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] Context    The first input parameter of InitializeDebugAgent().

+

+**/

+VOID

+EFIAPI

+SecStartupPhase2(

+  IN VOID                     *Context

+  );

+

+

+/**

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+

+  @param SizeOfRam           Size of the temporary memory available for use.

+  @param TempRamBase         Base address of tempory ram

+  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.

+**/

+VOID

+EFIAPI

+SecStartup (

+  IN UINT32                   SizeOfRam,

+  IN UINT32                   TempRamBase,

+  IN VOID                     *BootFirmwareVolume

+  )

+{

+  EFI_SEC_PEI_HAND_OFF        SecCoreData;

+  IA32_DESCRIPTOR             IdtDescriptor;

+  SEC_IDT_TABLE               IdtTableInStack;

+  UINT32                      Index;

+  UINT32                      PeiStackSize;

+

+  PeiStackSize = (SizeOfRam >> 1);

+

+  ASSERT (PeiStackSize < SizeOfRam);

+

+  //

+  // Process all libraries constructor function linked to SecCore.

+  //

+  ProcessLibraryConstructorList ();

+

+  //

+  // Initialize floating point operating environment

+  // to be compliant with UEFI spec.

+  //

+  InitializeFloatingPointUnits ();

+

+

+  // |-------------------|---->

+  // |Idt Table          |

+  // |-------------------|

+  // |PeiService Pointer |    PeiStackSize

+  // |-------------------|

+  // |                   |

+  // |      Stack        |

+  // |-------------------|---->

+  // |                   |

+  // |                   |

+  // |      Heap         |    PeiTemporayRamSize

+  // |                   |

+  // |                   |

+  // |-------------------|---->  TempRamBase

+

+  IdtTableInStack.PeiService = 0;

+  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {

+    CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));

+  }

+

+  IdtDescriptor.Base  = (UINTN) &IdtTableInStack.IdtTable;

+  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);

+

+  AsmWriteIdtr (&IdtDescriptor);

+

+  //

+  // Update the base address and length of Pei temporary memory

+  //

+  SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);

+  SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;

+  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);

+  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;

+  SecCoreData.TemporaryRamSize       = SizeOfRam;

+  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;

+  SecCoreData.PeiTemporaryRamSize    = SizeOfRam - PeiStackSize;

+  SecCoreData.StackBase              = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);

+  SecCoreData.StackSize              = PeiStackSize;

+

+  //

+  // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.

+  //

+  InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);

+

+}

+

+/**

+  Caller provided function to be invoked at the end of InitializeDebugAgent().

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] Context    The first input parameter of InitializeDebugAgent().

+

+**/

+VOID

+EFIAPI

+SecStartupPhase2(

+  IN VOID                     *Context

+  )

+{

+  EFI_SEC_PEI_HAND_OFF        *SecCoreData;

+  EFI_PEI_CORE_ENTRY_POINT    PeiCoreEntryPoint;

+

+  SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;

+  //

+  // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug

+  // is enabled.

+  //

+  FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);

+  if (PeiCoreEntryPoint == NULL)

+  {

+    CpuDeadLoop ();

+  }

+

+  //

+  // Transfer the control to the PEI core

+  //

+  ASSERT (PeiCoreEntryPoint != NULL);

+  (*PeiCoreEntryPoint) (SecCoreData, (EFI_PEI_PPI_DESCRIPTOR *)&mPeiSecPlatformInformationPpi);

+

+  //

+  // Should not come here.

+  //

+  return ;

+}

+

+/**

+  This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into

+  permanent memory.

+

+  @param PeiServices            Pointer to the PEI Services Table.

+  @param TemporaryMemoryBase    Source Address in temporary memory from which the SEC or PEIM will copy the

+                                Temporary RAM contents.

+  @param PermanentMemoryBase    Destination Address in permanent memory into which the SEC or PEIM will copy the

+                                Temporary RAM contents.

+  @param CopySize               Amount of memory to migrate from temporary to permanent memory.

+

+  @retval EFI_SUCCESS           The data was successfully returned.

+  @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when

+                                TemporaryMemoryBase > PermanentMemoryBase.

+

+**/

+EFI_STATUS

+EFIAPI

+SecTemporaryRamSupport (

+  IN CONST EFI_PEI_SERVICES   **PeiServices,

+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,

+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,

+  IN UINTN                    CopySize

+  )

+{

+  IA32_DESCRIPTOR   IdtDescriptor;

+  VOID*             OldHeap;

+  VOID*             NewHeap;

+  VOID*             OldStack;

+  VOID*             NewStack;

+  DEBUG_AGENT_CONTEXT_POSTMEM_SEC  DebugAgentContext;

+  BOOLEAN           OldStatus;

+  UINTN             PeiStackSize;

+

+  PeiStackSize = (CopySize >> 1);

+

+  ASSERT (PeiStackSize < CopySize);

+

+  //

+  // |-------------------|---->

+  // |      Stack        |    PeiStackSize

+  // |-------------------|---->

+  // |      Heap         |    PeiTemporayRamSize

+  // |-------------------|---->  TempRamBase

+  //

+  // |-------------------|---->

+  // |      Heap         |    PeiTemporayRamSize

+  // |-------------------|---->

+  // |      Stack        |    PeiStackSize

+  // |-------------------|---->  PermanentMemoryBase

+  //

+

+  OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;

+  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);

+  

+  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);

+  NewStack = (VOID*)(UINTN)PermanentMemoryBase;

+

+  DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;

+  DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;

+  

+  OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);

+  //

+  // Initialize Debug Agent to support source level debug in PEI phase after memory ready.

+  // It will build HOB and fix up the pointer in IDT table.

+  //

+  InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);

+

+  //

+  // Migrate Heap

+  //

+  CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);

+

+  //

+  // Migrate Stack

+  //

+  CopyMem (NewStack, OldStack, PeiStackSize);

+

+

+  //

+  // We need *not* fix the return address because currently,

+  // The PeiCore is executed in flash.

+  //

+

+  //

+  // Rebase IDT table in permanent memory

+  //

+  AsmReadIdtr (&IdtDescriptor);

+  IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;

+

+  AsmWriteIdtr (&IdtDescriptor);

+

+

+  //

+  // Program MTRR

+  //

+

+  //

+  // SecSwitchStack function must be invoked after the memory migration

+  // immediatly, also we need fixup the stack change caused by new call into

+  // permenent memory.

+  //

+  SecSwitchStack (

+    (UINT32) (UINTN) OldStack,

+    (UINT32) (UINTN) NewStack

+    );

+

+  SaveAndSetDebugTimerInterrupt (OldStatus);

+  

+  return EFI_SUCCESS;

+}

+

diff --git a/CorebootModulePkg/SecCore/SecMain.h b/CorebootModulePkg/SecCore/SecMain.h
new file mode 100644
index 0000000000..7bc991ab5f
--- /dev/null
+++ b/CorebootModulePkg/SecCore/SecMain.h
@@ -0,0 +1,134 @@
+/** @file

+  Master header file for SecCore.

+

+Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#ifndef _SEC_CORE_H_

+#define _SEC_CORE_H_

+

+

+#include <PiPei.h>

+

+#include <Ppi/SecPlatformInformation.h>

+#include <Ppi/TemporaryRamSupport.h>

+

+#include <Library/BaseLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PcdLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/UefiCpuLib.h>

+#include <Library/PeCoffGetEntryPointLib.h>

+#include <Library/PeCoffExtraActionLib.h>

+#include <Library/DebugAgentLib.h>

+

+

+#define SEC_IDT_ENTRY_COUNT  34

+

+typedef struct _SEC_IDT_TABLE {

+  //

+  // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base

+  // address should be 8-byte alignment.

+  // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store

+  // EFI_PEI_SERVICES**

+  //

+  UINT64            PeiService;  

+  UINT64            IdtTable[SEC_IDT_ENTRY_COUNT];

+} SEC_IDT_TABLE;

+

+/**

+  Switch the stack in the temporary memory to the one in the permanent memory.

+

+  This function must be invoked after the memory migration immediately. The relative

+  position of the stack in the temporary and permanent memory is same.

+

+  @param TemporaryMemoryBase  Base address of the temporary memory.

+  @param PermenentMemoryBase  Base address of the permanent memory.

+**/

+VOID

+EFIAPI

+SecSwitchStack (

+  UINT32   TemporaryMemoryBase,

+  UINT32   PermenentMemoryBase

+  );

+

+/**

+  This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into

+  permanent memory.

+

+  @param PeiServices            Pointer to the PEI Services Table.

+  @param TemporaryMemoryBase    Source Address in temporary memory from which the SEC or PEIM will copy the

+                                Temporary RAM contents.

+  @param PermanentMemoryBase    Destination Address in permanent memory into which the SEC or PEIM will copy the

+                                Temporary RAM contents.

+  @param CopySize               Amount of memory to migrate from temporary to permanent memory.

+

+  @retval EFI_SUCCESS           The data was successfully returned.

+  @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when

+                                TemporaryMemoryBase > PermanentMemoryBase.

+

+**/

+EFI_STATUS

+EFIAPI

+SecTemporaryRamSupport (

+  IN CONST EFI_PEI_SERVICES   **PeiServices,

+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,

+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,

+  IN UINTN                    CopySize

+  );

+

+/**

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param SizeOfRam           Size of the temporary memory available for use.

+  @param TempRamBase         Base address of tempory ram

+  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.

+**/

+VOID

+EFIAPI

+SecStartup (

+  IN UINT32                   SizeOfRam,

+  IN UINT32                   TempRamBase,

+  IN VOID                     *BootFirmwareVolume

+  );

+

+/**

+  Find and return Pei Core entry point.

+

+  It also find SEC and PEI Core file debug inforamtion. It will report them if

+  remote debug is enabled.

+

+  @param  BootFirmwareVolumePtr  Point to the boot firmware volume.

+  @param  PeiCoreEntryPoint      Point to the PEI core entry point.

+

+**/

+VOID

+EFIAPI

+FindAndReportEntryPoints (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PEI_CORE_ENTRY_POINT         *PeiCoreEntryPoint

+  );

+

+/**

+  Autogenerated function that calls the library constructors for all of the module's

+  dependent libraries.  This function must be called by the SEC Core once a stack has

+  been established.

+

+**/

+VOID

+EFIAPI

+ProcessLibraryConstructorList (

+  VOID

+  );

+  

+#endif