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| author | Leahy, Leroy P <leroy.p.leahy@intel.com> | 2016-05-04 17:38:17 -0700 |
|---|---|---|
| committer | Prince Agyeman <prince.agyeman@intel.com> | 2016-05-05 16:11:27 -0700 |
| commit | 109df3fa544c1f6cebdb0cd06aa90a7f8980865a (patch) | |
| tree | 8965c04a72ef59e802928cea931980bb4bac1834 /CorebootPayloadPkg | |
| parent | ab28ec2bbeac61ec40461c6c2e956b6aa223ac85 (diff) | |
| download | edk2-109df3fa544c1f6cebdb0cd06aa90a7f8980865a.tar.gz edk2-109df3fa544c1f6cebdb0cd06aa90a7f8980865a.tar.bz2 edk2-109df3fa544c1f6cebdb0cd06aa90a7f8980865a.zip | |
CorebootPayloadPkg: Allow MaxLogicalProcessorNumber to be changed
Add a define and use it with MaxLogicalProcessorNumber to enable this
PCD to be changed via the command line. Quark needs to set this value
to one during the builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Diffstat (limited to 'CorebootPayloadPkg')
| -rw-r--r-- | CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 7 | ||||
| -rw-r--r-- | CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc index 75d7996ff8..fa3e21a220 100644 --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc @@ -34,6 +34,11 @@ DEFINE SOURCE_DEBUG_ENABLE = FALSE
# + # CPU options + # + DEFINE MAX_LOGICAL_PROCESSORS = 64 + + # # Serial port set up # DEFINE BAUD_RATE = 115200 @@ -281,6 +286,8 @@ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|$(DEFAULT_TERMINAL_TYPE) gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|$(PCI_SERIAL_PARAMETERS) + gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS) + ################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc index e4e0d08f29..082c983505 100644 --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc @@ -34,6 +34,11 @@ DEFINE SOURCE_DEBUG_ENABLE = FALSE
# + # CPU options + # + DEFINE MAX_LOGICAL_PROCESSORS = 64 + + # # Serial port set up # DEFINE BAUD_RATE = 115200 @@ -286,6 +291,8 @@ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|$(DEFAULT_TERMINAL_TYPE) gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|$(PCI_SERIAL_PARAMETERS) + gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS) + ################################################################################
#
# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
|