DynamicTablesPkg: Update ArmNameSpaceObjects for IORT Rev E.d

Bugzilla: 3458 - Add support IORT Rev E.d specification updates
          (https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.d,
    Feb 2022 (https://developer.arm.com/documentation/den0049/)
    introduces the following updates, collectively including the
    updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c:
     - increments the IORT table revision to 5.
     - updates the node definition to add an 'Identifier' field.
     - adds definition of node type 6 - Reserved Memory Range node.
     - adds definition for Memory Range Descriptors.
     - adds flag to indicate PRI support for root complexes.
     - adds flag to indicate if the root complex supports forwarding
       of PASID information on translated transactions to the SMMU.
     - adds flag to indicate if the root complex supports PASID.
     - adds flags to define access privilege and attributes for the
       memory ranges.

Therefore, update the Arm namespace objects to:
  - add Identifier field to IORT nodes.
  - introduce enums to represent RMR nodes and Memory Range
    descriptors.
  - add definition of node type 6 - Reserved Memory Range node.
  - add definition for Memory Range Descriptors.
  - add PASID capabilities and flags field to Root Complex node.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>

2 files changed, 66 insertions, 1 deletions

diff --git a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
index bfa282926e..5addf86268 100644
--- a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
+++ b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
@@ -108,6 +108,7 @@
            "lgreater",

            "lless",

            "MPIDR",

+           "PASID",

            "PERIPHBASE",

            "phandle",

            "pytool",

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index 91bef9bccd..102e0f96be 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -1,6 +1,6 @@
 /** @file

 

-  Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>

+  Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.<BR>

 

   SPDX-License-Identifier: BSD-2-Clause-Patent

 

@@ -61,6 +61,8 @@ typedef enum ArmObjectID {
   EArmObjLpiInfo,                      ///< 37 - Lpi Info

   EArmObjPciAddressMapInfo,            ///< 38 - Pci Address Map Info

   EArmObjPciInterruptMapInfo,          ///< 39 - Pci Interrupt Map Info

+  EArmObjRmr,                          ///< 40 - Reserved Memory Range Node

+  EArmObjMemoryRangeDescriptor,        ///< 41 - Memory Range Descriptor

   EArmObjMax

 } EARM_OBJECT_ID;

 

@@ -477,6 +479,9 @@ typedef struct CmArmItsGroupNode {
   UINT32             ItsIdCount;

   /// Reference token for the ITS identifier array

   CM_OBJECT_TOKEN    ItsIdToken;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_ITS_GROUP_NODE;

 

 /** A structure that describes the

@@ -509,6 +514,9 @@ typedef struct CmArmNamedComponentNode {
       the entry in the namespace for this object.

   */

   CHAR8              *ObjectName;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_NAMED_COMPONENT_NODE;

 

 /** A structure that describes the

@@ -537,6 +545,13 @@ typedef struct CmArmRootComplexNode {
   UINT32             PciSegmentNumber;

   /// Memory address size limit

   UINT8              MemoryAddressSize;

+  /// PASID capabilities

+  UINT16             PasidCapabilities;

+  /// Flags

+  UINT32             Flags;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_ROOT_COMPLEX_NODE;

 

 /** A structure that describes the

@@ -579,6 +594,9 @@ typedef struct CmArmSmmuV1SmmuV2Node {
   UINT32             SMMU_NSgCfgIrpt;

   /// SMMU_NSgCfgIrpt interrupt flags

   UINT32             SMMU_NSgCfgIrptFlags;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_SMMUV1_SMMUV2_NODE;

 

 /** A structure that describes the

@@ -615,6 +633,9 @@ typedef struct CmArmSmmuV3Node {
   UINT32             ProximityDomain;

   /// Index into the array of ID mapping

   UINT32             DeviceIdMappingIndex;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_SMMUV3_NODE;

 

 /** A structure that describes the

@@ -639,6 +660,9 @@ typedef struct CmArmPmcgNode {
 

   /// Reference token for the IORT node associated with this node

   CM_OBJECT_TOKEN    ReferenceToken;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

 } CM_ARM_PMCG_NODE;

 

 /** A structure that describes the

@@ -1006,6 +1030,46 @@ typedef struct CmArmPciInterruptMapInfo {
   CM_ARM_GENERIC_INTERRUPT    IntcInterrupt;

 } CM_ARM_PCI_INTERRUPT_MAP_INFO;

 

+/** A structure that describes the

+    RMR node for the Platform.

+

+    ID: EArmObjRmr

+*/

+typedef struct CmArmRmrNode {

+  /// An unique token used to identify this object

+  CM_OBJECT_TOKEN    Token;

+  /// Number of ID mappings

+  UINT32             IdMappingCount;

+  /// Reference token for the ID mapping array

+  CM_OBJECT_TOKEN    IdMappingToken;

+

+  /// Unique identifier for this node.

+  UINT32             Identifier;

+

+  /// Reserved Memory Range flags.

+  UINT32             Flags;

+

+  /// Memory range descriptor count.

+  UINT32             MemRangeDescCount;

+  /// Reference token for the Memory Range descriptor array

+  CM_OBJECT_TOKEN    MemRangeDescToken;

+} CM_ARM_RMR_NODE;

+

+/** A structure that describes the

+    Memory Range descriptor.

+

+    ID: EArmObjMemoryRangeDescriptor

+*/

+typedef struct CmArmRmrDescriptor {

+  /// Base address of Reserved Memory Range,

+  /// aligned to a page size of 64K.

+  UINT64    BaseAddress;

+

+  /// Length of the Reserved Memory range.

+  /// Must be a multiple of the page size of 64K.

+  UINT64    Length;

+} CM_ARM_MEMORY_RANGE_DESCRIPTOR;

+

 #pragma pack()

 

 #endif // ARM_NAMESPACE_OBJECTS_H_