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authorPete Batard <pete@akeo.ie>2020-03-27 13:01:17 +0000
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-03-30 14:48:59 +0000
commit6c1fb56802d57e2de968bc11eefd5449e668eebc (patch)
tree10a386a478ed982809aca78e4bafe28b740a2f72 /EmbeddedPkg/Include
parent9c20342eed70ec99ec50cd73cb81804299f05403 (diff)
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EmbeddedPkg/AcpiLib: add GICC table init macro for ACPI 6.3
ACPI 6.3 added a 16-bit SPE overflow Interrupt field, replacing 2 of the 3 reserved bytes that are defined at the end of the GICC structure for 6.0. Add a new macro to initialise the new field. Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'EmbeddedPkg/Include')
-rw-r--r--EmbeddedPkg/Include/Library/AcpiLib.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/EmbeddedPkg/Include/Library/AcpiLib.h b/EmbeddedPkg/Include/Library/AcpiLib.h
index 5c6e2075de..c142446d9d 100644
--- a/EmbeddedPkg/Include/Library/AcpiLib.h
+++ b/EmbeddedPkg/Include/Library/AcpiLib.h
@@ -64,6 +64,14 @@
{EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE} \
}
+#define EFI_ACPI_6_3_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, PmuIrq, \
+ GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency, SpeOvflIrq) \
+ { \
+ EFI_ACPI_6_0_GIC, sizeof (EFI_ACPI_6_3_GIC_STRUCTURE), EFI_ACPI_RESERVED_WORD, \
+ GicId, AcpiCpuUid, Flags, 0, PmuIrq, 0, GicBase, GicVBase, GicHBase, \
+ GsivId, GicRBase, Mpidr, Efficiency, EFI_ACPI_RESERVED_BYTE, SpeOvflIrq \
+ }
+
#define EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(GicMsiFrameId, PhysicalBaseAddress, Flags, SPICount, SPIBase) \
{ \
EFI_ACPI_6_0_GIC_MSI_FRAME, sizeof (EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE), EFI_ACPI_RESERVED_WORD, \