summaryrefslogtreecommitdiffstats
path: root/IntelFrameworkModulePkg
diff options
context:
space:
mode:
authorStar Zeng <star.zeng@intel.com>2018-01-05 13:46:22 +0800
committerJian J Wang <jian.j.wang@intel.com>2019-02-28 18:22:53 +0800
commit9aef515648657d212b7b9f9a34289c35da442a65 (patch)
tree10316b14c5dddcde5b37a746efe12a8f8da73d63 /IntelFrameworkModulePkg
parent467e1ffa7634159b99fb8aeb93e2836b0f2e5f43 (diff)
downloadedk2-9aef515648657d212b7b9f9a34289c35da442a65.tar.gz
edk2-9aef515648657d212b7b9f9a34289c35da442a65.tar.bz2
edk2-9aef515648657d212b7b9f9a34289c35da442a65.zip
MdeModulePkg/DxeCore: Ensure FfsFileHeader 8 bytes aligned
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=864 REF: CVE-2018-3630 To follow PI spec, ensure FfsFileHeader 8 bytes aligned. For the integrity of FV(especially non-MemoryMapped FV) layout, let CachedFv point to FV beginning, but not (FV + FV header). And current code only handles (FwVolHeader->ExtHeaderOffset != 0) path, update code to also handle (FwVolHeader->ExtHeaderOffset == 0) path. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Diffstat (limited to 'IntelFrameworkModulePkg')
0 files changed, 0 insertions, 0 deletions