IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Add FSP-I API entry point for SMM support.
Also update 64bit API entry code to assign ApiIdx to RAX
to avoid confusion.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

3 files changed, 62 insertions, 32 deletions

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index 5e47f475db..bf46f13f73 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -614,4 +614,23 @@ EFI_STATUS
   IN FSP_MULTI_PHASE_PARAMS     *MultiPhaseSiInitParamPtr

   );

 

+/**

+  This FSP API initializes SMM and provide any OS runtime silicon services,

+  including Reliability, Availability, and Serviceability (RAS) features implemented by the CPU.

+

+  @param[in] FspiUpdDataPtr     Pointer to the FSPI_UPD data structure.

+                                If NULL, FSP will use the default parameters.

+

+  @retval EFI_SUCCESS                 FSP execution environment was initialized successfully.

+  @retval EFI_INVALID_PARAMETER       Input parameters are invalid.

+  @retval EFI_UNSUPPORTED             The FSP calling conditions were not met.

+  @retval EFI_DEVICE_ERROR            FSP initialization failed.

+  @retval FSP_STATUS_RESET_REQUIREDx  A reset is required. These status codes will not be returned during S3.

+**/

+typedef

+EFI_STATUS

+(EFIAPI *FSP_SMM_INIT)(

+  IN VOID          *FspiUpdDataPtr

+  );

+

 #endif

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index 445540abfa..697b20ed4c 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -10,9 +10,9 @@
 

 #include <FspEas.h>

 

-#define FSP_IN_API_MODE         0

-#define FSP_IN_DISPATCH_MODE    1

-#define FSP_GLOBAL_DATA_VERSION 1

+#define FSP_IN_API_MODE          0

+#define FSP_IN_DISPATCH_MODE     1

+#define FSP_GLOBAL_DATA_VERSION  1

 

 #pragma pack(1)

 

@@ -24,16 +24,17 @@ typedef enum {
   TempRamExitApiIndex,

   FspSiliconInitApiIndex,

   FspMultiPhaseSiInitApiIndex,

+  FspSmmInitApiIndex,

   FspApiIndexMax

 } FSP_API_INDEX;

 

 typedef struct  {

-  VOID      *DataPtr;

-  UINTN     MicrocodeRegionBase;

-  UINTN     MicrocodeRegionSize;

-  UINTN     CodeRegionBase;

-  UINTN     CodeRegionSize;

-  UINTN     Reserved;

+  VOID     *DataPtr;

+  UINTN    MicrocodeRegionBase;

+  UINTN    MicrocodeRegionSize;

+  UINTN    CodeRegionBase;

+  UINTN    CodeRegionSize;

+  UINTN    Reserved;

 } FSP_PLAT_DATA;

 

 #define FSP_GLOBAL_DATA_SIGNATURE        SIGNATURE_32 ('F', 'S', 'P', 'D')

@@ -41,28 +42,28 @@ typedef struct  {
 #define FSP_PERFORMANCE_DATA_TIMER_MASK  0xFFFFFFFFFFFFFF

 

 typedef struct  {

-  UINT32             Signature;

-  UINT8              Version;

-  UINT8              Reserved1[3];

+  UINT32    Signature;

+  UINT8     Version;

+  UINT8     Reserved1[3];

   ///

   /// Offset 0x08

   ///

-  UINTN              CoreStack;

-  UINTN              Reserved2;

+  UINTN     CoreStack;

+  UINTN     Reserved2;

   ///

   /// IA32: Offset 0x10; X64: Offset 0x18

   ///

-  UINT32             StatusCode;

-  UINT8              ApiIdx;

+  UINT32    StatusCode;

+  UINT8     ApiIdx;

   ///

   /// 0: FSP in API mode; 1: FSP in DISPATCH mode

   ///

-  UINT8              FspMode;

-  UINT8              OnSeparateStack;

-  UINT8              Reserved3;

-  UINT32             NumberOfPhases;

-  UINT32             PhasesExecuted;

-  UINT32             Reserved4[8];

+  UINT8     FspMode;

+  UINT8     OnSeparateStack;

+  UINT8     Reserved3;

+  UINT32    NumberOfPhases;

+  UINT32    PhasesExecuted;

+  UINT32    Reserved4[8];

   ///

   /// IA32: Offset 0x40; X64: Offset 0x48

   /// Start of UINTN and pointer section

@@ -75,21 +76,23 @@ typedef struct  {
   VOID               *TempRamInitUpdPtr;

   VOID               *MemoryInitUpdPtr;

   VOID               *SiliconInitUpdPtr;

+  VOID               *SmmInitUpdPtr;

   ///

-  /// IA32: Offset 0x64; X64: Offset 0x90

+  /// IA32: Offset 0x68; X64: Offset 0x98

   /// To store function parameters pointer

   /// so it can be retrieved after stack switched.

   ///

   VOID               *FunctionParameterPtr;

   FSP_INFO_HEADER    *FspInfoHeader;

   VOID               *UpdDataPtr;

+  UINTN              Reserved5;

   ///

   /// End of UINTN and pointer section

   ///

-  UINT8              Reserved5[16];

+  UINT8              Reserved6[16];

   UINT32             PerfSig;

   UINT16             PerfLen;

-  UINT16             Reserved6;

+  UINT16             Reserved7;

   UINT32             PerfIdx;

   UINT64             PerfData[32];

 } FSP_GLOBAL_DATA;

diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
index c660defac3..c7fb63168f 100644
--- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
+++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
@@ -26,13 +26,13 @@
 

 #define FSP_INFO_HEADER_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'H')

 

-#define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT      BIT0

-#define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT BIT1

-#define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT    BIT2

-#define FSP_IA32                              0

-#define FSP_X64                               1

+#define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT       BIT0

+#define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT  BIT1

+#define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT     BIT2

+#define FSP_IA32                               0

+#define FSP_X64                                1

 

-#pragma pack(1)

+  #pragma pack(1)

 

 ///

 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.

@@ -159,6 +159,14 @@ typedef struct {
   /// Byte 0x4E: Reserved4.

   ///

   UINT16    Reserved4;

+  ///

+  /// Byte 0x50: Offset for the API for the Multi-Phase memory initialization.

+  ///

+  UINT32    FspMultiPhaseMemInitEntryOffset;

+  ///

+  /// Byte 0x54: Offset for the API to initialize SMM.

+  ///

+  UINT32    FspSmmInitEntryOffset;

 } FSP_INFO_HEADER;

 

 ///

@@ -240,7 +248,7 @@ typedef struct {
   // UINT32  PatchData[];

 } FSP_PATCH_TABLE;

 

-#pragma pack()

+  #pragma pack()

 

 extern EFI_GUID  gFspHeaderFileGuid;