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| author | Liming Gao <liming.gao@intel.com> | 2017-09-25 19:06:22 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2017-10-10 18:10:23 +0800 |
| commit | 034b941894c74cf4e7d22f897ad583eced999638 (patch) | |
| tree | 656f79f3a070b28ae421713fa3d786491c0f1fce /IntelFsp2Pkg | |
| parent | f37bcdd60d0acada08a9a4426ad8fc33b7951191 (diff) | |
| download | edk2-034b941894c74cf4e7d22f897ad583eced999638.tar.gz edk2-034b941894c74cf4e7d22f897ad583eced999638.tar.bz2 edk2-034b941894c74cf4e7d22f897ad583eced999638.zip | |
IntelFsp2Pkg: Update Section Name in INF files
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'IntelFsp2Pkg')
3 files changed, 7 insertions, 8 deletions
diff --git a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf index 75f7ae5fb7..a0bc37580d 100644 --- a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf +++ b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf @@ -1,8 +1,7 @@ ## @file
# Component information file for the FSP notify phase PEI module.
#
-#@copyright
-# Copyright (c) 2016 Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
diff --git a/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf b/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf index bdb6744f37..6a77ce7aa1 100644 --- a/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf +++ b/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf @@ -1,7 +1,7 @@ ## @file
# NULL instance of Base cache as RAM.
#
-# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,7 +12,7 @@ #
##
-[defines]
+[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseCacheAsRamLibNull
FILE_GUID = 630AEB10-2106-4234-9DB3-836A3663F50D
@@ -20,7 +20,7 @@ VERSION_STRING = 1.0
LIBRARY_CLASS = CacheAsRamLib
-[sources.common]
+[Sources.common]
DisableCacheAsRamNull.c
[Packages]
diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf index 7b026b1dfc..34df6add93 100644 --- a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf +++ b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf @@ -1,7 +1,7 @@ ## @file
# Instance of BaseCache.
#
-# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,7 +12,7 @@ #
##
-[defines]
+[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BaseCacheLib
FILE_GUID = 8EF3A653-DA8B-4FFA-BB85-FF47406DB9F0
@@ -20,7 +20,7 @@ VERSION_STRING = 1.0
LIBRARY_CLASS = CacheLib
-[sources.IA32]
+[Sources.IA32]
CacheLib.c
CacheLibInternal.h
|