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| author | Chasel, Chiu <chasel.chiu@intel.com> | 2018-11-06 15:31:31 +0800 |
|---|---|---|
| committer | Chasel, Chiu <chasel.chiu@intel.com> | 2018-11-20 11:33:14 +0800 |
| commit | 90c5bc081d15d077606131a61114ddfdefe62e61 (patch) | |
| tree | da203c21a0891d01912b508f7cc9a4d45afc677c /IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | |
| parent | 4187f79cf03e5a8e5e27ae8bc5a3f8cc999118f5 (diff) | |
| download | edk2-90c5bc081d15d077606131a61114ddfdefe62e61.tar.gz edk2-90c5bc081d15d077606131a61114ddfdefe62e61.tar.bz2 edk2-90c5bc081d15d077606131a61114ddfdefe62e61.zip | |
IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300
Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)
Test: Verified on internal platform and both API and
DISPATCH modes booted successfully.
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec')
| -rw-r--r-- | IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index 69df16452d..96f2858fb4 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -71,9 +71,8 @@ ## Indicate the PEI memory size platform want to report
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
- ## This is the base address of FSP-T/M/S
+ ## This is the base address of FSP-T
gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
- gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
# If a bit is set, that means this FSP API is skipped.<BR>
@@ -93,7 +92,17 @@ # @Prompt Skip FSP API from FSP wrapper.
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
+ ## This PCD decides how Wrapper code utilizes FSP
+ # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
+ # 1: API mode (FSP Wrapper will call FSP API)
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
+
[PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
+ #
+ ## These are the base address of FSP-M/S
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
#
# To provide flexibility for platform to pre-allocate FSP UPD buffer
|