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authorBrijesh Singh <brijesh.singh@amd.com>2021-05-19 13:19:49 -0500
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2021-05-29 12:15:21 +0000
commitadfa3327d4fc25d5eff5fedcdb11ecde52a995cc (patch)
treeb976c3a1a3c1dbc31c2de3eee5d3e06bde68658a /IntelFsp2WrapperPkg
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OvmfPkg/BaseMemEncryptSevLib: remove Flush parameter
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The Flush parameter is used to provide a hint whether the specified range is Mmio address. Now that we have a dedicated helper to clear the memory encryption mask for the Mmio address range, its safe to remove the Flush parameter from MemEncryptSev{Set,Clear}PageEncMask(). Since the address specified in the MemEncryptSev{Set,Clear}PageEncMask() points to a system RAM, thus a cache flush is required during the encryption mask update. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-14-brijesh.singh@amd.com>
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