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| author | Chasel Chiu <chasel.chiu@intel.com> | 2020-06-18 20:59:37 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-06-23 04:22:49 +0000 |
| commit | 1a992030522622c42aa063788b3276789c56c1e1 (patch) | |
| tree | b31a6b949f27eb46371ea51b816f60ba2c5dacb6 /IntelFsp2WrapperPkg | |
| parent | 89f569ae8e759dc867009f396a516b7af5a3c0e7 (diff) | |
| download | edk2-1a992030522622c42aa063788b3276789c56c1e1.tar.gz edk2-1a992030522622c42aa063788b3276789c56c1e1.tar.bz2 edk2-1a992030522622c42aa063788b3276789c56c1e1.zip | |
IntelFsp2WrapperPkg: Add FSP*_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2781
Provides sample code to include FSPT_ARCH_UPD initial values with
UPD header revision set to 2.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'IntelFsp2WrapperPkg')
| -rw-r--r-- | IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c index 2d1368c3ed..96b47e23da 100644 --- a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c @@ -1,7 +1,7 @@ /** @file
Sample to provide TempRamInitParams data.
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -18,17 +18,39 @@ typedef struct { typedef struct {
FSP_UPD_HEADER FspUpdHeader;
+ //
+ // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.
+ //
+ FSPT_ARCH_UPD FsptArchUpd;
FSPT_CORE_UPD FsptCoreUpd;
} FSPT_UPD_CORE_DATA;
GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
{
0x4450555F54505346,
- 0x00,
+ //
+ // UPD header revision must be equal or greater than 2 when the structure is compliant with FSP spec 2.2.
+ //
+ 0x02,
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
},
+ //
+ // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.
+ //
+ {
+ 0x01,
+ {
+ 0x00, 0x00, 0x00
+ },
+ 0x00000020,
+ 0x00000000,
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ },
{
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicrocodeOffset)),
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicrocodeOffset)),
|