IntelFspPkg/FspSecCore add AsmGetFspBaseAddressNoStack and AsmGetFspInfoHeaderNoStack

Fix GCC issue on FspInfoHeaderRelativeOff.
Clean up comments for platform ID matching on Microcode and PcdFspBootFirmwareVolumeBase

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17496 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 3 insertions, 3 deletions

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index a0c9b1ed73..d0e56b2360 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -143,8 +143,8 @@ check_main_header:
    mov   ecx, MSR_IA32_PLATFORM_ID

    rdmsr

    mov   ecx, edx

-   shr   ecx, 50-32

-   and   ecx, 7h

+   shr   ecx, 50-32                          ; shift (50d-32d=18d=0x12) bits

+   and   ecx, 7h                             ; platform id at bit[52..50]

    mov   edx, 1

    shl   edx, cl

 

@@ -569,7 +569,7 @@ FspApiCommon   PROC C PUBLIC
   ;

   ; Pass BFV into the PEI Core

   ; It uses relative address to calucate the actual boot FV base

-  ; For FSP impleantion with single FV, PcdFlashFvRecoveryBase and

+  ; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and

   ; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,

   ; they are different. The code below can handle both cases.

   ;