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author | Yao, Jiewen <Jiewen.Yao@intel.com> | 2015-04-23 08:52:21 +0000 |
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committer | jyao1 <jyao1@Edk2> | 2015-04-23 08:52:21 +0000 |
commit | 9da591867c0bad1abbe17a321dc5b16d95226c6a (patch) | |
tree | d73d5eefb589fec2196b92e1cb741317300f16e0 /IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc | |
parent | 3b7f0a488be0ca7a2a8e4c352b0e10496bee9530 (diff) | |
download | edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.tar.gz edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.tar.bz2 edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.zip |
Update IntelFspPkg to support FSP1.1
-- Add BootLoaderTolumSize support
-- Extend FspApiCallingCheck with ApiParam for BootLoaderTolumSize
-- Rename all Bootloader to BootLoader as official name
-- Rename Ucode to Microcode
-- Remove FspSelfCheck API, because it is merged into SecPlatformInit
-- Add GetFspVpdDataPointer() in FspCommonLib.h
-- Document FspSecPlatformLib.h
-- Reorg FSP_PLAT_DATA data structure to let it match FSP spec.
-- Move helper function in FspSecCore to reduce platform enabling effort
-- Fix LibraryClasses declaration in DEC file.
-- Enhance PatchFv to check if it is valid FSP bin.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17196 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc')
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc b/IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc new file mode 100644 index 0000000000..6fbf430707 --- /dev/null +++ b/IntelFspPkg/FspSecCore/Ia32/MicrocodeLoad.inc @@ -0,0 +1,49 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+;------------------------------------------------------------------------------
+
+MSR_IA32_PLATFORM_ID EQU 000000017h
+MSR_IA32_BIOS_UPDT_TRIG EQU 000000079h
+MSR_IA32_BIOS_SIGN_ID EQU 00000008bh
+
+
+MicrocodeHdr STRUCT 1t
+ MicrocodeHdrVersion DWORD ?
+ MicrocodeHdrRevision DWORD ?
+ MicrocodeHdrDate DWORD ?
+ MicrocodeHdrProcessor DWORD ?
+ MicrocodeHdrChecksum DWORD ?
+ MicrocodeHdrLoader DWORD ?
+ MicrocodeHdrFlags DWORD ?
+ MicrocodeHdrDataSize DWORD ?
+ MicrocodeHdrTotalSize DWORD ?
+ MicrocodeHdrRsvd DWORD 3t DUP (?)
+MicrocodeHdr ENDS
+
+ExtSigHdr STRUCT 1t
+ ExtSigHdrCount DWORD ?
+ ExtSigHdrChecksum DWORD ?
+ ExtSigHdrRsvd DWORD 3t DUP (?)
+ExtSigHdr ENDS
+
+ExtSig STRUCT 1t
+ ExtSigProcessor DWORD ?
+ ExtSigFlags DWORD ?
+ ExtSigChecksum DWORD ?
+ExtSig ENDS
+
+LoadMicrocodeParams STRUCT 1t
+ MicrocodeCodeAddr DWORD ?
+ MicrocodeCodeSize DWORD ?
+LoadMicrocodeParams ENDS
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