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author | Yao, Jiewen <jiewen.yao@intel.com> | 2015-02-12 07:02:43 +0000 |
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committer | jyao1 <jyao1@Edk2> | 2015-02-12 07:02:43 +0000 |
commit | 95c95ac0efb10fe4b608a3388d928eb947c15085 (patch) | |
tree | f3c493443dfe606a7d2c5c991c7e1d75b177c92f /IntelFspPkg/FspSecCore | |
parent | 4701d96534f2228b6f4aa925606566d2c2bb55be (diff) | |
download | edk2-95c95ac0efb10fe4b608a3388d928eb947c15085.tar.gz edk2-95c95ac0efb10fe4b608a3388d928eb947c15085.tar.bz2 edk2-95c95ac0efb10fe4b608a3388d928eb947c15085.zip |
Fsp1.1 update.
Update ApiEntry.asm to use MACRO instead of direct XMM access.
Add sanity parameter check for FSP API.
Add sanity return code check for internal API.
Call LoadUcode before CarInit to meet silicon requirement.
Remove unnecessary VpdBase for PatchTable.
Add ASSERT for NULL check FSP1.1 entrypoint.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16834 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg/FspSecCore')
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm | 46 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s | 56 |
2 files changed, 62 insertions, 40 deletions
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm index 6c330833e0..7c6e60f0d1 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm @@ -41,9 +41,8 @@ EXTERN GetFspBaseAddress:PROC EXTERN GetBootFirmwareVolumeOffset:PROC
EXTERN Pei2LoaderSwitchStack:PROC
EXTERN FspSelfCheck(FspSelfCheckDflt):PROC
-EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC
EXTERN LoadUcode(LoadUcodeDflt):PROC
-EXTERN SecPlatformInit:PROC
+EXTERN SecPlatformInit(SecPlatformInitDflt):PROC
EXTERN SecCarInit:PROC
;
@@ -101,7 +100,7 @@ exit: FspSelfCheckDflt ENDP
;------------------------------------------------------------------------------
-PlatformBasicInitDflt PROC NEAR PUBLIC
+SecPlatformInitDflt PROC NEAR PUBLIC
; Inputs:
; eax -> Return address
; Outputs:
@@ -116,7 +115,7 @@ PlatformBasicInitDflt PROC NEAR PUBLIC xor eax, eax
exit:
jmp ebp
-PlatformBasicInitDflt ENDP
+SecPlatformInitDflt ENDP
;------------------------------------------------------------------------------
LoadUcodeDflt PROC NEAR PUBLIC
@@ -304,7 +303,6 @@ exit: LoadUcodeDflt ENDP
EstablishStackFsp PROC NEAR PRIVATE
- ; Following is the code copied from BYTFSP, need to figure out what it is doing..
;
; Save parameter pointer in edx
;
@@ -336,9 +334,9 @@ InvalidMicrocodeRegion: ;
push DATA_LEN_OF_PER0 ; Size of the data region
push 30524550h ; Signature of the data region 'PER0'
- movd eax, xmm4
- push eax
- movd eax, xmm5
+ LOAD_EDX
+ push edx
+ LOAD_EAX
push eax
rdtsc
push edx
@@ -387,9 +385,17 @@ TempRamInitApi PROC NEAR PUBLIC ; Save timestamp into XMM4 & XMM5
;
rdtsc
- movd xmm4, edx
- movd xmm5, eax
-
+ SAVE_EAX
+ SAVE_EDX
+
+ ;
+ ; Check Parameter
+ ;
+ mov eax, dword ptr [esp + 4]
+ cmp eax, 0
+ mov eax, 80000002h
+ jz NemInitExit
+
;
; CPUID/DeviceID check
;
@@ -400,16 +406,22 @@ TempRamInitApi PROC NEAR PUBLIC jnz NemInitExit
CALL_MMX SecPlatformInit
-
- ; Call Sec CAR Init
- CALL_MMX SecCarInit
+ cmp eax, 0
+ jnz NemInitExit
- ; @todo: ESP has been modified, we need to restore here.
- LOAD_REGS
- SAVE_REGS
; Load microcode
+ LOAD_ESP
CALL_MMX LoadUcode
+ cmp eax, 0
+ jnz NemInitExit
+
+ ; Call Sec CAR Init
+ LOAD_ESP
+ CALL_MMX SecCarInit
+ cmp eax, 0
+ jnz NemInitExit
+ LOAD_ESP
CALL_MMX EstablishStackFsp
NemInitExit:
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s index 203efd9e42..995aef6088 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s @@ -205,7 +205,7 @@ FspSelfCheckDfltExit: #------------------------------------------------------------------------------
-# PlatformBasicInitDflt
+# SecPlatformInitDflt
# Inputs:
# eax -> Return address
# Outputs:
@@ -214,15 +214,15 @@ FspSelfCheckDfltExit: # eax is cleared and ebp is used for return address.
# All others reserved.
#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)
-ASM_PFX(PlatformBasicInitDflt):
+ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)
+ASM_PFX(SecPlatformInitDflt):
#
# Save return address to EBP
#
movl %eax, %ebp
xorl %eax, %eax
-PlatformBasicInitDfltExit:
+SecPlatformInitDfltExit:
jmp *%ebp
@@ -244,7 +244,7 @@ ASM_PFX(LoadUcode): #
# Save return address to EBP
#
- movd %xmm7, %ebp
+ movd %mm7, %ebp
cmpl $0x00, %esp
jz ParamError
@@ -451,8 +451,6 @@ LoadUcodeExit: #----------------------------------------------------------------------------
# EstablishStackFsp
#
-# Following is the code copied from BYTFSP, need to figure out what it is doing..
-#
#----------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(EstablishStackFsp)
ASM_PFX(EstablishStackFsp):
@@ -487,9 +485,9 @@ EstablishStackFspExit: #
pushl $DATA_LEN_OF_PER0 # Size of the data region
pushl $0x30524550 # Signature of the data region 'PER0'
- movd %xmm4, %eax
- pushl %eax
- movd %xmm5, %eax
+ LOAD_EDX
+ pushl %edx
+ LOAD_EAX
pushl %eax
rdtsc
pushl %edx
@@ -537,8 +535,16 @@ ASM_PFX(TempRamInitApi): # Save timestamp into XMM4 & XMM5
#
rdtsc
- movd %edx, %xmm4
- movd %eax, %xmm5
+ SAVE_EAX
+ SAVE_EDX
+
+ #
+ # Check Parameter
+ #
+ movl 4(%esp), %eax
+ cmpl $0x00, %eax
+ movl $0x80000002, %eax
+ jz NemInitExit
#
# CPUID/DeviceID check
@@ -556,31 +562,35 @@ TempRamInitApiL0: movd %mm7, %esi
jmp ASM_PFX(SecPlatformInit)
TempRamInitApiL1:
+ cmpl $0x00, %eax
+ jnz NemInitExit
#
- # Call Sec CAR Init
+ # Load microcode
#
- movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit
+ LOAD_ESP
+ movl $TempRamInitApiL2, %esi #CALL_MMX LoadUcode
movd %mm7, %esi
- jmp ASM_PFX(SecCarInit)
+ jmp ASM_PFX(LoadUcode)
TempRamInitApiL2:
-
- # @todo: ESP has been modified, we need to restore here.
-
- LOAD_REGS
- SAVE_REGS
+ cmpl $0x00, %eax
+ jnz NemInitExit
#
- # Load microcode
+ # Call Sec CAR Init
#
- movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode
+ LOAD_ESP
+ movl $TempRamInitApiL3, %esi #CALL_MMX SecCarInit
movd %mm7, %esi
- jmp ASM_PFX(LoadUcode)
+ jmp ASM_PFX(SecCarInit)
TempRamInitApiL3:
+ cmpl $0x00, %eax
+ jnz NemInitExit
#
# EstablishStackFsp
#
+ LOAD_ESP
movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp
movd %mm7, %esi
jmp ASM_PFX(EstablishStackFsp)
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