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| author | jyao1 <jyao1> | 2014-07-24 06:52:43 +0000 |
|---|---|---|
| committer | jyao1 <jyao1@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-07-24 06:52:43 +0000 |
| commit | a33a2f62218e6e49a25d63474b7fe423d8ee4b71 (patch) | |
| tree | ca8e4dd491a71f4a7e36fbc17c5e95276d555b43 /IntelFspPkg/Include/FspInfoHeader.h | |
| parent | 34717ef034ed275a15683dafd29cb518af50fff0 (diff) | |
| download | edk2-a33a2f62218e6e49a25d63474b7fe423d8ee4b71.tar.gz edk2-a33a2f62218e6e49a25d63474b7fe423d8ee4b71.tar.bz2 edk2-a33a2f62218e6e49a25d63474b7fe423d8ee4b71.zip | |
Add IntelFspWrapper to support boot EDKII on FSP bin.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg/Include/FspInfoHeader.h')
| -rw-r--r-- | IntelFspPkg/Include/FspInfoHeader.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/IntelFspPkg/Include/FspInfoHeader.h b/IntelFspPkg/Include/FspInfoHeader.h new file mode 100644 index 0000000000..cde7b599c9 --- /dev/null +++ b/IntelFspPkg/Include/FspInfoHeader.h @@ -0,0 +1,105 @@ +/** @file
+ Intel FSP Info Header definition from Intel Firmware Support Package External
+ Architecture Specification, April 2014, revision 001.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _FSP_INFO_HEADER_H_
+#define _FSP_INFO_HEADER_H_
+
+///
+/// Fixed FSP header offset in the FSP image
+///
+#define FSP_INFO_HEADER_OFF 0x94
+
+#define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// Signature ('FSPH') for the FSP Information Header
+ ///
+ UINT32 Signature;
+ ///
+ /// Length of the FSP Information Header
+ ///
+ UINT32 HeaderLength;
+ ///
+ /// Reserved
+ ///
+ UINT8 Reserved1[3];
+ ///
+ /// Revision of the FSP Information Header
+ ///
+ UINT8 HeaderRevision;
+ ///
+ /// Revision of the FSP binary
+ ///
+ UINT32 ImageRevision;
+
+
+ ///
+ /// Signature string that will help match the FSP Binary to a supported
+ /// hardware configuration.
+ ///
+ CHAR8 ImageId[8];
+ ///
+ /// Size of the entire FSP binary
+ ///
+ UINT32 ImageSize;
+ ///
+ /// FSP binary preferred base address
+ ///
+ UINT32 ImageBase;
+
+
+ ///
+ /// Attribute for the FSP binary
+ ///
+ UINT32 ImageAttribute;
+ ///
+ /// Offset of the FSP configuration region
+ ///
+ UINT32 CfgRegionOffset;
+ ///
+ /// Size of the FSP configuration region
+ ///
+ UINT32 CfgRegionSize;
+ ///
+ /// Number of API entries this FSP supports
+ ///
+ UINT32 ApiEntryNum;
+
+
+ ///
+ /// TempRamInit API entry offset
+ ///
+ UINT32 TempRamInitEntryOffset;
+ ///
+ /// FspInit API entry offset
+ ///
+ UINT32 FspInitEntryOffset;
+ ///
+ /// NotifyPhase API entry offset
+ ///
+ UINT32 NotifyPhaseEntryOffset;
+ ///
+ /// Reserved
+ ///
+ UINT32 Reserved2;
+
+} FSP_INFO_HEADER;
+
+#pragma pack()
+
+#endif
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