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| author | Yao, Jiewen <Jiewen.Yao@intel.com> | 2015-04-23 08:52:21 +0000 |
|---|---|---|
| committer | jyao1 <jyao1@Edk2> | 2015-04-23 08:52:21 +0000 |
| commit | 9da591867c0bad1abbe17a321dc5b16d95226c6a (patch) | |
| tree | d73d5eefb589fec2196b92e1cb741317300f16e0 /IntelFspPkg/Include/FspInfoHeader.h | |
| parent | 3b7f0a488be0ca7a2a8e4c352b0e10496bee9530 (diff) | |
| download | edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.tar.gz edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.tar.bz2 edk2-9da591867c0bad1abbe17a321dc5b16d95226c6a.zip | |
Update IntelFspPkg to support FSP1.1
-- Add BootLoaderTolumSize support
-- Extend FspApiCallingCheck with ApiParam for BootLoaderTolumSize
-- Rename all Bootloader to BootLoader as official name
-- Rename Ucode to Microcode
-- Remove FspSelfCheck API, because it is merged into SecPlatformInit
-- Add GetFspVpdDataPointer() in FspCommonLib.h
-- Document FspSecPlatformLib.h
-- Reorg FSP_PLAT_DATA data structure to let it match FSP spec.
-- Move helper function in FspSecCore to reduce platform enabling effort
-- Fix LibraryClasses declaration in DEC file.
-- Enhance PatchFv to check if it is valid FSP bin.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17196 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg/Include/FspInfoHeader.h')
| -rw-r--r-- | IntelFspPkg/Include/FspInfoHeader.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/IntelFspPkg/Include/FspInfoHeader.h b/IntelFspPkg/Include/FspInfoHeader.h index 3033659ea0..9513acdb76 100644 --- a/IntelFspPkg/Include/FspInfoHeader.h +++ b/IntelFspPkg/Include/FspInfoHeader.h @@ -64,7 +64,7 @@ typedef struct { ///
UINT32 ImageSize;
///
- /// Byte 0x18: FSP binary preferred base address
+ /// Byte 0x1C: FSP binary preferred base address
///
UINT32 ImageBase;
@@ -78,7 +78,7 @@ typedef struct { ///
UINT32 CfgRegionOffset;
///
- /// Byte 0x24: Size of the FSP configuration region
+ /// Byte 0x28: Size of the FSP configuration region
///
UINT32 CfgRegionSize;
///
@@ -103,7 +103,7 @@ typedef struct { UINT32 NotifyPhaseEntryOffset;
///
- /// Below field is added in FSP 1.1
+ /// Below fields are added in FSP Revision 2
///
///
@@ -122,7 +122,7 @@ typedef struct { } FSP_INFO_HEADER;
///
-/// Below structure is added in FSP 1.1
+/// Below structure is added in FSP version 2
///
typedef struct {
///
|