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author | Yao, Jiewen <Jiewen.Yao@intel.com> | 2015-04-30 01:18:30 +0000 |
---|---|---|
committer | jyao1 <jyao1@Edk2> | 2015-04-30 01:18:30 +0000 |
commit | 16b7e82c2ba9465e87d634e1da6e3b322279f5f7 (patch) | |
tree | cc2d687000f211e04d31cefd66f1b879e1b9a395 /IntelFspPkg | |
parent | 8f2f2f1985ad5c76c85eff8be7d0f9da8b7afe4e (diff) | |
download | edk2-16b7e82c2ba9465e87d634e1da6e3b322279f5f7.tar.gz edk2-16b7e82c2ba9465e87d634e1da6e3b322279f5f7.tar.bz2 edk2-16b7e82c2ba9465e87d634e1da6e3b322279f5f7.zip |
Clean update API name for ASM function.
Add FSP_INFO_HEADER_SIGNATURE and FSP_INFO_EXTENDED_HEADER_SIGNATURE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17271 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg')
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm | 12 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s | 12 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspHelper.asm | 12 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/Ia32/FspHelper.s | 12 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/SecFsp.c | 4 | ||||
-rw-r--r-- | IntelFspPkg/FspSecCore/SecFsp.h | 14 | ||||
-rw-r--r-- | IntelFspPkg/Include/FspInfoHeader.h | 4 |
7 files changed, 43 insertions, 27 deletions
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm index d736f80358..a01b3c2d49 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm @@ -37,8 +37,8 @@ EXTERN FspApiCallingCheck:PROC ;
; Following functions will be provided in PlatformSecLib
;
-EXTERN GetFspBaseAddress:PROC
-EXTERN GetFspInfoHdr:PROC
+EXTERN AsmGetFspBaseAddress:PROC
+EXTERN AsmGetFspInfoHeader:PROC
EXTERN GetBootFirmwareVolumeOffset:PROC
EXTERN Loader2PeiSwitchStack:PROC
EXTERN LoadMicrocode(LoadMicrocodeDefault):PROC
@@ -506,7 +506,7 @@ FspApiCommon PROC C PUBLIC cmp eax, 3 ; FspMemoryInit API
jz @F
- call GetFspInfoHdr
+ call AsmGetFspInfoHeader
jmp Loader2PeiSwitchStack
@@:
@@ -523,7 +523,7 @@ FspApiCommon PROC C PUBLIC ; Update the FspInfoHeader pointer
;
push eax
- call GetFspInfoHdr
+ call AsmGetFspInfoHeader
mov [esp + 4], eax
pop eax
@@ -559,7 +559,7 @@ FspApiCommon PROC C PUBLIC ;
; Pass entry point of the PEI core
;
- call GetFspBaseAddress
+ call AsmGetFspBaseAddress
mov edi, eax
add edi, PcdGet32 (PcdFspAreaSize)
sub edi, 20h
@@ -573,7 +573,7 @@ FspApiCommon PROC C PUBLIC ; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
; they are different. The code below can handle both cases.
;
- call GetFspBaseAddress
+ call AsmGetFspBaseAddress
mov edi, eax
call GetBootFirmwareVolumeOffset
add eax, edi
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s index d0f5b20b96..e7b82d5e93 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s +++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s @@ -215,8 +215,8 @@ ASM_GLOBAL ASM_PFX(FspApiCallingCheck) #
# Following functions will be provided in PlatformSecLib
#
-ASM_GLOBAL ASM_PFX(GetFspBaseAddress)
-ASM_GLOBAL ASM_PFX(GetFspInfoHdr)
+ASM_GLOBAL ASM_PFX(AsmGetFspBaseAddress)
+ASM_GLOBAL ASM_PFX(AsmGetFspInfoHeader)
ASM_GLOBAL ASM_PFX(GetBootFirmwareVolumeOffset)
ASM_GLOBAL ASM_PFX(Loader2PeiSwitchStack)
@@ -718,7 +718,7 @@ FspApiCommonL1: jz FspApiCommonL2
cmpl $0x03, %eax # FspMemoryInit API
jz FspApiCommonL2
- call ASM_PFX(GetFspInfoHdr)
+ call ASM_PFX(AsmGetFspInfoHeader)
jmp Loader2PeiSwitchStack
FspApiCommonL2:
@@ -735,7 +735,7 @@ FspApiCommonL2: # Update the FspInfoHeader pointer
#
pushl %eax
- call ASM_PFX(GetFspInfoHdr)
+ call ASM_PFX(AsmGetFspInfoHeader)
movl %eax, 4(%esp)
popl %eax
@@ -773,7 +773,7 @@ FspApiCommonL2: #
# Pass entry point of the PEI core
#
- call ASM_PFX(GetFspBaseAddress)
+ call ASM_PFX(AsmGetFspBaseAddress)
movl %eax, %edi
addl PcdGet32(PcdFspAreaSize), %edi
subl $0x20, %edi
@@ -787,7 +787,7 @@ FspApiCommonL2: # PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
# they are different. The code below can handle both cases.
#
- call ASM_PFX(GetFspBaseAddress)
+ call ASM_PFX(AsmGetFspBaseAddress)
movl %eax, %edi
call ASM_PFX(GetBootFirmwareVolumeOffset)
addl %edi, %eax
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm b/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm index 655481c14f..8efea01aae 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm +++ b/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm @@ -22,18 +22,18 @@ FspInfoHeaderRelativeOff PROC NEAR PUBLIC DD 012345678h
FspInfoHeaderRelativeOff ENDP
-GetFspBaseAddress PROC NEAR PUBLIC
- mov eax, GetFspBaseAddress
+AsmGetFspBaseAddress PROC NEAR PUBLIC
+ mov eax, AsmGetFspBaseAddress
sub eax, dword ptr [FspInfoHeaderRelativeOff]
add eax, 01Ch
mov eax, dword ptr [eax]
ret
-GetFspBaseAddress ENDP
+AsmGetFspBaseAddress ENDP
-GetFspInfoHdr PROC NEAR PUBLIC
- mov eax, GetFspBaseAddress
+AsmGetFspInfoHeader PROC NEAR PUBLIC
+ mov eax, AsmGetFspBaseAddress
sub eax, dword ptr [FspInfoHeaderRelativeOff]
ret
-GetFspInfoHdr ENDP
+AsmGetFspInfoHeader ENDP
END
\ No newline at end of file diff --git a/IntelFspPkg/FspSecCore/Ia32/FspHelper.s b/IntelFspPkg/FspSecCore/Ia32/FspHelper.s index 5d1bf74c30..a6cf36259d 100644 --- a/IntelFspPkg/FspSecCore/Ia32/FspHelper.s +++ b/IntelFspPkg/FspSecCore/Ia32/FspHelper.s @@ -23,16 +23,16 @@ ASM_PFX(FspInfoHeaderRelativeOff): .long 0x012345678
-ASM_GLOBAL ASM_PFX(GetFspBaseAddress)
-ASM_PFX(GetFspBaseAddress):
- mov $GetFspBaseAddress, %eax
+ASM_GLOBAL ASM_PFX(AsmGetFspBaseAddress)
+ASM_PFX(AsmGetFspBaseAddress):
+ mov $AsmGetFspBaseAddress, %eax
sub $FspInfoHeaderRelativeOff, %eax
add $0x01C, %eax
mov (%eax), %eax
ret
-ASM_GLOBAL ASM_PFX(GetFspInfoHdr)
-ASM_PFX(GetFspInfoHdr):
- mov $GetFspBaseAddress, %eax
+ASM_GLOBAL ASM_PFX(AsmGetFspInfoHeader)
+ASM_PFX(AsmGetFspInfoHeader):
+ mov $AsmGetFspBaseAddress, %eax
sub $FspInfoHeaderRelativeOff, %eax
ret
diff --git a/IntelFspPkg/FspSecCore/SecFsp.c b/IntelFspPkg/FspSecCore/SecFsp.c index b4566045f9..a9aba7108e 100644 --- a/IntelFspPkg/FspSecCore/SecFsp.c +++ b/IntelFspPkg/FspSecCore/SecFsp.c @@ -32,7 +32,7 @@ FspGetExceptionHandler( IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor;
FSP_INFO_HEADER *FspInfoHeader;
- FspInfoHeader = (FSP_INFO_HEADER *)(GetFspBaseAddress() + FSP_INFO_HEADER_OFF);
+ FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader();
ExceptionHandler = IdtEntryTemplate;
IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;
Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;
@@ -171,7 +171,7 @@ FspGlobalDataInit ( // Get FSP Header offset
// It may have multiple FVs, so look into the last one for FSP header
//
- PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(GetFspBaseAddress() + FSP_INFO_HEADER_OFF);
+ PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader();
SecGetPlatformData (PeiFspData);
//
diff --git a/IntelFspPkg/FspSecCore/SecFsp.h b/IntelFspPkg/FspSecCore/SecFsp.h index 8e48a13f18..3e4e2a4b5c 100644 --- a/IntelFspPkg/FspSecCore/SecFsp.h +++ b/IntelFspPkg/FspSecCore/SecFsp.h @@ -80,7 +80,19 @@ FspDataPointerFixUp ( **/
UINT32
EFIAPI
-GetFspBaseAddress (
+AsmGetFspBaseAddress (
+ VOID
+ );
+
+/**
+ This interface gets FspInfoHeader pointer
+
+ @return FSP binary base address.
+
+**/
+UINT32
+EFIAPI
+AsmGetFspInfoHeader (
VOID
);
diff --git a/IntelFspPkg/Include/FspInfoHeader.h b/IntelFspPkg/Include/FspInfoHeader.h index 079ec98f96..951bc38507 100644 --- a/IntelFspPkg/Include/FspInfoHeader.h +++ b/IntelFspPkg/Include/FspInfoHeader.h @@ -29,6 +29,8 @@ #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
+#define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
+
#pragma pack(1)
typedef struct {
@@ -124,6 +126,8 @@ typedef struct { ///
/// Below structure is added in FSP version 2
///
+#define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')
+
typedef struct {
///
/// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header
|