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authorjyao1 <jyao1>2014-08-06 13:27:14 +0000
committerjyao1 <jyao1@6f19259b-4bc3-4df7-8a09-765794883524>2014-08-06 13:27:14 +0000
commita81fcd30c1aff139f0007c277c49c52bf55c303c (patch)
tree598d719348ac6667911ae81561a0dd9902793029 /IntelFspWrapperPkg/Library
parente7a8edfdf6128729737ec9eda360689a972b7c27 (diff)
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Eliminate duplicated file GUID.
Eliminate duplicate GUID definition. Do explicit data cast. Use StrnCpy instead of StrCpy. Update GCC assembly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15762 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspWrapperPkg/Library')
-rw-r--r--IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S13
1 files changed, 8 insertions, 5 deletions
diff --git a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
index 3145a484a3..24bc36b9c4 100644
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
+++ b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
@@ -22,6 +22,9 @@
#include "Fsp.h"
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)
+
ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
ASM_PFX(_TEXT_REALMODE):
#----------------------------------------------------------------------------
@@ -103,7 +106,7 @@ ASM_PFX(_ModuleEntryPoint):
# Transition to Flat 32 bit protected mode
# The jump to a far pointer causes the transition to 32 bit mode
#
- movl $ProtectedModeEntryLinearAddress, %esi
+ movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
jmp *%cs:(%si)
ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
@@ -134,8 +137,8 @@ ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
ASM_PFX(ProtectedModeEntryPoint):
# Find the fsp info header
- movl PcdGet32 (PcdFlashFvFspBase), %edi
- movl PcdGet32 (PcdFlashFvFspSize), %ecx
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx
movl FVH_SIGINATURE_OFFSET(%edi), %eax
cmp $FVH_SIGINATURE_VALID_VALUE, %eax
@@ -224,7 +227,7 @@ FspApiFailed:
.align 0x10
TempRamInitStack:
.long TempRamInitDone
- .long TempRamInitParams
+ .long ASM_PFX(TempRamInitParams)
#
# ROM-based Global-Descriptor Table for the Tiano PEI Phase
@@ -321,5 +324,5 @@ GdtDesc: # GDT descriptor
ASM_PFX(ProtectedModeEntryLinearAddress):
ProtectedModeEntryLinearOffset:
- .long ProtectedModeEntryPoint # Offset of our 32 bit code
+ .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
.word LINEAR_CODE_SEL