diff options
| author | Yao, Jiewen <jiewen.yao@intel.com> | 2015-10-27 04:00:08 +0000 |
|---|---|---|
| committer | jyao1 <jyao1@Edk2> | 2015-10-27 04:00:08 +0000 |
| commit | e620b72924b189c2741d700a6885fec71ea36e74 (patch) | |
| tree | 211c8f697b26ea187bbb9ada6d6be182acd15c86 /IntelFspWrapperPkg | |
| parent | d2de448338bf8f71c6727c3e60a39a1e419d5832 (diff) | |
| download | edk2-e620b72924b189c2741d700a6885fec71ea36e74.tar.gz edk2-e620b72924b189c2741d700a6885fec71ea36e74.tar.bz2 edk2-e620b72924b189c2741d700a6885fec71ea36e74.zip | |
Do not deadloop if Microcode not found in FspTempRamInit.
We do not consider microcode not found as critical error, because Microcode might be applied later.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18678 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspWrapperPkg')
| -rw-r--r-- | IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S | 10 | ||||
| -rw-r--r-- | IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm | 12 |
2 files changed, 21 insertions, 1 deletions
diff --git a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S index 24bc36b9c4..c0b84e075c 100644 --- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S +++ b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S @@ -210,12 +210,22 @@ FspHeaderFound: jmp *%eax
TempRamInitDone:
+ cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
+ je CallSecFspInit #If microcode not found, don't hang, but continue.
+
cmp $0x0, %eax
jnz FspApiFailed
# ECX: start of range
# EDX: end of range
+CallSecFspInit:
+ xorl %eax, %eax
movl %edx, %esp
+
+ # Align the stack at DWORD
+ addl $3, %esp
+ andl $0xFFFFFFFC, %esp
+
pushl %edx
pushl %ecx
pushl %eax # zero - no hob list yet
diff --git a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm index 0e0c5c5883..3c2e43a89c 100644 --- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm +++ b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm @@ -220,12 +220,22 @@ FspHeaderFound: jmp eax
TempRamInitDone:
- cmp eax, 0
+ cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
+ je CallSecFspInit ;If microcode not found, don't hang, but continue.
+
+ cmp eax, 0 ;Check if EFI_SUCCESS retuned.
jnz FspApiFailed
; ECX: start of range
; EDX: end of range
+CallSecFspInit:
+ xor eax, eax
mov esp, edx
+
+ ; Align the stack at DWORD
+ add esp, 3
+ and esp, 0FFFFFFFCh
+
push edx
push ecx
push eax ; zero - no hob list yet
|