diff options
| author | Star Zeng <star.zeng@intel.com> | 2018-01-16 16:41:42 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2018-01-17 10:39:19 +0800 |
| commit | ba5a29b790b39a3796456faed720223afbf358ca (patch) | |
| tree | cc61c30a5c1520b4f75ba954ae63d81b69e1ae2b /IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | |
| parent | cd4b3c9004a3a5a85e7c966b4273c4a535204345 (diff) | |
| download | edk2-ba5a29b790b39a3796456faed720223afbf358ca.tar.gz edk2-ba5a29b790b39a3796456faed720223afbf358ca.tar.bz2 edk2-ba5a29b790b39a3796456faed720223afbf358ca.zip | |
IntelSiliconPkg IntelVTdPmrPei: Refine comments about PHMR/PLMR.Limit
According to VTd spec, the real hardware decoded limit should be
PHMR/PLMR.Limit value + alignment value.
"Bits N:0 of the limit register are
decoded by hardware as all 1s."
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit e8097a74b763bfc439c273ddfef8e1d542d83ea7)
Diffstat (limited to 'IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c')
| -rw-r--r-- | IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c index 7147a19f53..8f86d4cd15 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License which accompanies this distribution.
@@ -60,7 +60,7 @@ typedef struct { PEI Memory Layout:
- +------------------+ <=============== PHMR.Limit (Top of memory)
+ +------------------+ <=============== PHMR.Limit (+ alignment) (Top of memory)
| Mem Resource |
| |
@@ -72,7 +72,7 @@ typedef struct { DMA Buffer | * DMA FREE * |
| | -------------- |
V | Read/Write Buf |
- =========== +==================+ <=============== PLMR.Limit
+ =========== +==================+ <=============== PLMR.Limit (+ alignment)
| PEI allocated |
| -------------- | <------- EfiFreeMemoryTop
| * PEI FREE * |
|