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author | Mudusuru, Giri P <giri.p.mudusuru@intel.com> | 2016-08-31 06:57:34 +0800 |
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committer | Jiewen Yao <jiewen.yao@intel.com> | 2016-09-03 06:14:18 +0800 |
commit | 72092534a9283291edd6b497c9aa934049c4b928 (patch) | |
tree | 50e88107ab2b7169ad7a7a6d643bab9adbbc2c45 /IntelSiliconPkg/Include | |
parent | 646a9e5b799b009426fe37af7ac8528a98cc96ce (diff) | |
download | edk2-72092534a9283291edd6b497c9aa934049c4b928.tar.gz edk2-72092534a9283291edd6b497c9aa934049c4b928.tar.bz2 edk2-72092534a9283291edd6b497c9aa934049c4b928.zip |
IntelSiliconPkg: Rename IGD structures to make it consistent
Renamed INTEL_IGD_* to IGD_* and IGD_OPREGION_VBT to IGD_OPREGION_MBOX4
to make it consistent with file name and other mailbox naming.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'IntelSiliconPkg/Include')
-rw-r--r-- | IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 39 |
1 files changed, 22 insertions, 17 deletions
diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h index 9982c9c9be..7f76c09bae 100644 --- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h +++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h @@ -36,8 +36,9 @@ **/
#pragma pack(1)
///
-/// OpRegion header (mailbox 0) structure. The OpRegion Header is used to
+/// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
/// identify a block of memory as the graphics driver OpRegion.
+/// Offset 0x0, Size 0x100
///
typedef struct {
CHAR8 SIGN[0x10]; ///< Offset 0x00 OpRegion Signature
@@ -49,16 +50,17 @@ typedef struct { UINT32 MBOX; ///< Offset 0x58 Supported Mailboxes
UINT32 DMOD; ///< Offset 0x5C Driver Model
UINT8 RSV1[0xA0]; ///< Offset 0x60 Reserved
-} INTEL_IGD_OPREGION_HEADER;
+} IGD_OPREGION_HEADER;
///
-/// OpRegion mailbox 1 (public ACPI Methods)
+/// OpRegion Mailbox 1 - Public ACPI Methods
+/// Offset 0x100, Size 0x100
///
typedef struct {
UINT32 DRDY; ///< Offset 0x100 Driver Readiness
UINT32 CSTS; ///< Offset 0x104 Status
UINT32 CEVT; ///< Offset 0x108 Current Event
- UINT8 RSV2[0x14]; ///< Offset 0x10C Reserved
+ UINT8 RSVD[0x14]; ///< Offset 0x10C Reserved Must be Zero
UINT32 DIDL[8]; ///< Offset 0x120 Supported Display Devices ID List
UINT32 CPDL[8]; ///< Offset 0x140 Currently Attached Display Devices List
UINT32 CADL[8]; ///< Offset 0x160 Currently Active Display Devices List
@@ -73,20 +75,22 @@ typedef struct { UINT32 CNOT; ///< Offset 0x1BC Current OS Notification
UINT32 NRDY; ///< Offset 0x1C0 Driver Status
UINT8 RSV3[0x3C]; ///< Offset 0x1C4 - 0x1FF Reserved
-} INTEL_IGD_OPREGION_MBOX1;
+} IGD_OPREGION_MBOX1;
///
-/// OpRegion mailbox 2 (Software SCI Interface).
+/// OpRegion Mailbox 2 - Software SCI Interface
+/// Offset 0x200, Size 0x100
///
typedef struct {
UINT32 SCIC; ///< Offset 0x200 Software SCI Command / Status / Data
UINT32 PARM; ///< Offset 0x204 Software SCI Parameters
UINT32 DSLP; ///< Offset 0x208 Driver Sleep Time Out
UINT8 RSV4[0xF4]; ///< Offset 0x20C - 0x2FF Reserved
-} INTEL_IGD_OPREGION_MBOX2;
+} IGD_OPREGION_MBOX2;
///
-/// OpRegion mailbox 3 (BIOS/Driver Communication - ASLE Support).
+/// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support
+/// Offset 0x300, Size 0x100
///
typedef struct {
UINT32 ARDY; ///< Offset 0x300 Driver Readiness
@@ -103,25 +107,26 @@ typedef struct { UINT32 PFMB; ///< Offset 0x396 PWM Frequency and Minimum Brightness
UINT32 CCDV; ///< Offset 0x39A Color Correction Default Values
UINT8 RSV5[0x62]; ///< Offset 0x39E - 0x3FF Reserved
-} INTEL_IGD_OPREGION_MBOX3;
+} IGD_OPREGION_MBOX3;
///
-/// OpRegion mailbox 4 (VBT).
+/// OpRegion Mailbox 4 - VBT Video BIOS Table
+/// Offset 0x400, Size 0x1800
///
typedef struct {
UINT8 RVBT[0x1800]; ///< Offset 0x400 - 0x1BFF Raw VBT Data
-} INTEL_IGD_OPREGION_VBT;
+} IGD_OPREGION_MBOX4;
///
/// IGD OpRegion Structure
///
typedef struct {
- INTEL_IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
- INTEL_IGD_OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
- INTEL_IGD_OPREGION_MBOX2 MBox2; ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)
- INTEL_IGD_OPREGION_MBOX3 MBox3; ///< Mailbox 3: BIOS to Driver Communication (Offset 0x300, Size 0x100)
- INTEL_IGD_OPREGION_VBT VBT; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1200)
-} IGD_IGD_OPREGION_STRUCTURE;
+ IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
+ IGD_OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
+ IGD_OPREGION_MBOX2 MBox2; ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)
+ IGD_OPREGION_MBOX3 MBox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
+ IGD_OPREGION_MBOX4 MBox4; ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
+} IGD_OPREGION_STRUCTURE;
#pragma pack()
#endif
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