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| author | Michael Zimmermann <sigmaepsilon92@gmail.com> | 2017-12-20 20:51:00 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-20 20:57:03 +0000 |
| commit | 889c7ca1b5e8eb3e3e2c04a5be76eb49e16834e5 (patch) | |
| tree | 1b86ce6d3aa98234358cafd3d41e4b01215237ca /IntelSiliconPkg | |
| parent | 3d817fd11af6a4981978f6c0d5648ce470aa92b5 (diff) | |
| download | edk2-889c7ca1b5e8eb3e3e2c04a5be76eb49e16834e5.tar.gz edk2-889c7ca1b5e8eb3e3e2c04a5be76eb49e16834e5.tar.bz2 edk2-889c7ca1b5e8eb3e3e2c04a5be76eb49e16834e5.zip | |
ArmPkg/ArmMmuLib ARM: fix page size granularity in initial MMU setting
From what I can see this bug dates back to the commit from 2011 where
support for this was added: 2cf4b60895f8a
The first problem is that PopulateLevel2PageTable overflows the
translation table buffer because it doesn't verify that the size
actually fits within one level 2 page table.
The second problem is that the loop in FillTranslationTable doesn't
care about the PhysicalBase or the RemainLength and always substracts
one section size from RemainLength.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'IntelSiliconPkg')
0 files changed, 0 insertions, 0 deletions