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| author | Star Zeng <star.zeng@intel.com> | 2018-01-16 18:48:52 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2018-01-17 10:48:57 +0800 |
| commit | 9dd8b1908e7d0585ba6b77d4586f6091842d925c (patch) | |
| tree | ff283a940cac5baf865e638c3cbcf8e7485af012 /IntelSiliconPkg | |
| parent | e8097a74b763bfc439c273ddfef8e1d542d83ea7 (diff) | |
| download | edk2-9dd8b1908e7d0585ba6b77d4586f6091842d925c.tar.gz edk2-9dd8b1908e7d0585ba6b77d4586f6091842d925c.tar.bz2 edk2-9dd8b1908e7d0585ba6b77d4586f6091842d925c.zip | |
IntelSiliconPkg IntelVTdPmrPei: Use HostAddressWidth in DMAR correctly
According to VTd spec, HostAddressWidth + 1 should be used as the real
host address width value.
Host Address Width:
This field indicates the maximum DMA physical
addressability supported by this platform. The
system address map reported by the BIOS
indicates what portions of this addresses are
populated.
The Host Address Width (HAW) of the platform is
computed as (N+1), where N is the value
reported in this field. For example, for a platform
supporting 40 bits of physical addressability, the
value of 100111b is reported in this field.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'IntelSiliconPkg')
| -rw-r--r-- | IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c index 8f86d4cd15..bb7ace4ca5 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c @@ -677,7 +677,7 @@ InitVTdPmrForAll ( LowBottom = 0;
LowTop = 0;
HighBottom = 0;
- HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth);
+ HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth + 1);
Status = SetDmaProtectedRange (
VTdInfo,
|