IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table.

We notice that there is real usage in PEI to show
the graphic out. As such we need report RMRR table
in PEI to let VTdPmrPei driver skip the IGD UMA region.

Now the VTD_INFO PPI uses the same DMAR data structure.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

1 files changed, 14 insertions, 11 deletions

diff --git a/IntelSiliconPkg/Include/Ppi/VtdInfo.h b/IntelSiliconPkg/Include/Ppi/VtdInfo.h
index e8be63f3b6..cf85d18981 100644
--- a/IntelSiliconPkg/Include/Ppi/VtdInfo.h
+++ b/IntelSiliconPkg/Include/Ppi/VtdInfo.h
@@ -17,22 +17,25 @@
 #ifndef __VTD_INFO_PPI_H__

 #define __VTD_INFO_PPI_H__

 

+#include <IndustryStandard/DmaRemappingReportingTable.h>

+

 #define EDKII_VTD_INFO_PPI_GUID \

     { \

       0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } \

     }

 

-typedef struct _EDKII_VTD_INFO_PPI  EDKII_VTD_INFO_PPI;

-

-#define EDKII_VTD_INFO_PPI_REVISION 0x00010000

-

-struct _EDKII_VTD_INFO_PPI {

-  UINT64                                  Revision;

-  UINT8                                   HostAddressWidth;

-  UINT8                                   Reserved[3];

-  UINT32                                  VTdEngineCount;

-  UINT64                                  VTdEngineAddress[1];

-};

+//

+// VTD info PPI just use same data structure as DMAR table.

+//

+// The reported information must include what is needed in PEI phase, e.g.

+//   the VTd engine (such as DRHD)

+//   the reserved DMA address in PEI for eary graphic (such as RMRR for graphic UMA)

+//

+// The reported information can be and might be a subset of full DMAR table, e.g.

+//   if some data is not avaiable (such as ANDD),

+//   if some data is not needed (such as RMRR for legacy USB).

+//

+typedef EFI_ACPI_DMAR_HEADER EDKII_VTD_INFO_PPI;

 

 extern EFI_GUID gEdkiiVTdInfoPpiGuid;