summaryrefslogtreecommitdiffstats
path: root/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
diff options
context:
space:
mode:
authorStar Zeng <star.zeng@intel.com>2018-10-25 16:20:34 +0800
committerStar Zeng <star.zeng@intel.com>2018-10-28 21:20:08 +0800
commit0cd645250306b244a5d6e0e293ed1786ec101641 (patch)
treed075fa1e687bd0caa48d190c5b31187ea9010a03 /MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
parent777920997152a2e68f664241f6080b64ff21edd6 (diff)
downloadedk2-0cd645250306b244a5d6e0e293ed1786ec101641.tar.gz
edk2-0cd645250306b244a5d6e0e293ed1786ec101641.tar.bz2
edk2-0cd645250306b244a5d6e0e293ed1786ec101641.zip
MdeModulePkg EhciDxe: Use common buffer for AsyncInterruptTransfer
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 In current code, EhcMonitorAsyncRequests (timer handler) will do unmap and map operations for AsyncIntTransfers to "Flush data from PCI controller specific address to mapped system memory address". EhcMonitorAsyncRequests EhcFlushAsyncIntMap PciIo->Unmap IoMmu->SetAttribute PciIo->Map IoMmu->SetAttribute This may impact the boot performance. Since the data buffer for EhcMonitorAsyncRequests is internal buffer, we can allocate common buffer by PciIo->AllocateBuffer and map the buffer with EfiPciIoOperationBusMasterCommonBuffer, then the unmap and map operations can be removed. /// /// Provides both read and write access to system memory by /// both the processor and a bus master. The buffer is coherent /// from both the processor's and the bus master's point of view. /// EfiPciIoOperationBusMasterCommonBuffer, Test done: USB KB works normally. USB disk read/write works normally. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c')
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c78
1 files changed, 2 insertions, 76 deletions
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
index ec8d796fab..b067fd02d1 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
@@ -778,7 +778,6 @@ EhciDelAsyncIntTransfer (
EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
RemoveEntryList (&Urb->UrbList);
- gBS->FreePool (Urb->Data);
EhcFreeUrb (Ehc, Urb);
return EFI_SUCCESS;
}
@@ -809,7 +808,6 @@ EhciDelAllAsyncIntTransfers (
EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
RemoveEntryList (&Urb->UrbList);
- gBS->FreePool (Urb->Data);
EhcFreeUrb (Ehc, Urb);
}
}
@@ -848,16 +846,8 @@ EhciInsertAsyncIntTransfer (
IN UINTN Interval
)
{
- VOID *Data;
URB *Urb;
- Data = AllocatePool (DataLen);
-
- if (Data == NULL) {
- DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__));
- return NULL;
- }
-
Urb = EhcCreateUrb (
Ehc,
DevAddr,
@@ -868,7 +858,8 @@ EhciInsertAsyncIntTransfer (
Hub,
EHC_INT_TRANSFER_ASYNC,
NULL,
- Data,
+ TRUE,
+ NULL,
DataLen,
Callback,
Context,
@@ -877,7 +868,6 @@ EhciInsertAsyncIntTransfer (
if (Urb == NULL) {
DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__));
- gBS->FreePool (Data);
return NULL;
}
@@ -892,60 +882,6 @@ EhciInsertAsyncIntTransfer (
}
/**
- Flush data from PCI controller specific address to mapped system
- memory address.
-
- @param Ehc The EHCI device.
- @param Urb The URB to unmap.
-
- @retval EFI_SUCCESS Success to flush data to mapped system memory.
- @retval EFI_DEVICE_ERROR Fail to flush data to mapped system memory.
-
-**/
-EFI_STATUS
-EhcFlushAsyncIntMap (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
- )
-{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN Len;
- VOID *Map;
-
- PciIo = Ehc->PciIo;
- Len = Urb->DataLen;
-
- if (Urb->Ep.Direction == EfiUsbDataIn) {
- MapOp = EfiPciIoOperationBusMasterWrite;
- } else {
- MapOp = EfiPciIoOperationBusMasterRead;
- }
-
- Status = PciIo->Unmap (PciIo, Urb->DataMap);
- if (EFI_ERROR (Status)) {
- goto ON_ERROR;
- }
-
- Urb->DataMap = NULL;
-
- Status = PciIo->Map (PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
- if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
- goto ON_ERROR;
- }
-
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
- return EFI_SUCCESS;
-
-ON_ERROR:
- return EFI_DEVICE_ERROR;
-}
-
-
-/**
Update the queue head for next round of asynchronous transfer.
@param Ehc The EHCI device.
@@ -1050,7 +986,6 @@ EhcMonitorAsyncRequests (
BOOLEAN Finished;
UINT8 *ProcBuf;
URB *Urb;
- EFI_STATUS Status;
OldTpl = gBS->RaiseTPL (EHC_TPL);
Ehc = (USB2_HC_DEV *) Context;
@@ -1069,15 +1004,6 @@ EhcMonitorAsyncRequests (
}
//
- // Flush any PCI posted write transactions from a PCI host
- // bridge to system memory.
- //
- Status = EhcFlushAsyncIntMap (Ehc, Urb);
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "EhcMonitorAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));
- }
-
- //
// Allocate a buffer then copy the transferred data for user.
// If failed to allocate the buffer, update the URB for next
// round of transfer. Ignore the data of this round.