MdeModulePkg: Apply uncrustify changes

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdeModulePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

2 files changed, 52 insertions, 50 deletions

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
index 9c18e6fddc..89e0a1b6a4 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
@@ -11,7 +11,7 @@
 

 EDKII_SD_MMC_HOST_CONTROLLER_PPI  mSdMmcHostControllerPpi = { GetSdMmcHcMmioBar };

 

-EFI_PEI_PPI_DESCRIPTOR   mPpiList = {

+EFI_PEI_PPI_DESCRIPTOR  mPpiList = {

   (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),

   &gEdkiiPeiSdMmcHostControllerPpiGuid,

   &mSdMmcHostControllerPpi

@@ -34,10 +34,10 @@ EFI_PEI_PPI_DESCRIPTOR   mPpiList = {
 EFI_STATUS

 EFIAPI

 GetSdMmcHcMmioBar (

-  IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,

-  IN     UINT8                            ControllerId,

-  IN OUT UINTN                            **MmioBar,

-     OUT UINT8                            *BarNum

+  IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI  *This,

+  IN     UINT8                             ControllerId,

+  IN OUT UINTN                             **MmioBar,

+  OUT UINT8                                *BarNum

   )

 {

   SD_MMC_HC_PEI_PRIVATE_DATA  *Private;

@@ -70,26 +70,26 @@ GetSdMmcHcMmioBar (
 EFI_STATUS

 EFIAPI

 InitializeSdMmcHcPeim (

-  IN EFI_PEI_FILE_HANDLE       FileHandle,

-  IN CONST EFI_PEI_SERVICES    **PeiServices

+  IN EFI_PEI_FILE_HANDLE     FileHandle,

+  IN CONST EFI_PEI_SERVICES  **PeiServices

   )

 {

-  EFI_BOOT_MODE                BootMode;

-  EFI_STATUS                   Status;

-  UINT16                       Bus;

-  UINT16                       Device;

-  UINT16                       Function;

-  UINT32                       Size;

-  UINT64                       MmioSize;

-  UINT8                        SubClass;

-  UINT8                        BaseClass;

-  UINT8                        SlotInfo;

-  UINT8                        SlotNum;

-  UINT8                        FirstBar;

-  UINT8                        Index;

-  UINT8                        Slot;

-  UINT32                       BarAddr;

-  SD_MMC_HC_PEI_PRIVATE_DATA   *Private;

+  EFI_BOOT_MODE               BootMode;

+  EFI_STATUS                  Status;

+  UINT16                      Bus;

+  UINT16                      Device;

+  UINT16                      Function;

+  UINT32                      Size;

+  UINT64                      MmioSize;

+  UINT8                       SubClass;

+  UINT8                       BaseClass;

+  UINT8                       SlotInfo;

+  UINT8                       SlotNum;

+  UINT8                       FirstBar;

+  UINT8                       Index;

+  UINT8                       Slot;

+  UINT32                      BarAddr;

+  SD_MMC_HC_PEI_PRIVATE_DATA  *Private;

 

   //

   // Shadow this PEIM to run from memory

@@ -106,7 +106,7 @@ InitializeSdMmcHcPeim (
     return EFI_SUCCESS;

   }

 

-  Private = (SD_MMC_HC_PEI_PRIVATE_DATA *) AllocateZeroPool (sizeof (SD_MMC_HC_PEI_PRIVATE_DATA));

+  Private = (SD_MMC_HC_PEI_PRIVATE_DATA *)AllocateZeroPool (sizeof (SD_MMC_HC_PEI_PRIVATE_DATA));

   if (Private == NULL) {

     DEBUG ((DEBUG_ERROR, "Failed to allocate memory for SD_MMC_HC_PEI_PRIVATE_DATA! \n"));

     return EFI_OUT_OF_RESOURCES;

@@ -129,15 +129,15 @@ InitializeSdMmcHcPeim (
           // Get the SD/MMC Pci host controller's Slot Info.

           //

           SlotInfo = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, SD_MMC_HC_PEI_SLOT_OFFSET));

-          FirstBar = (*(SD_MMC_HC_PEI_SLOT_INFO*)&SlotInfo).FirstBar;

-          SlotNum  = (*(SD_MMC_HC_PEI_SLOT_INFO*)&SlotInfo).SlotNum + 1;

+          FirstBar = (*(SD_MMC_HC_PEI_SLOT_INFO *)&SlotInfo).FirstBar;

+          SlotNum  = (*(SD_MMC_HC_PEI_SLOT_INFO *)&SlotInfo).SlotNum + 1;

           ASSERT ((FirstBar + SlotNum) < MAX_SD_MMC_SLOTS);

 

           for (Index = 0, Slot = FirstBar; Slot < (FirstBar + SlotNum); Index++, Slot++) {

             //

             // Get the SD/MMC Pci host controller's MMIO region size.

             //

-            PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));

+            PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16) ~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));

             PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot), 0xFFFFFFFF);

             Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot));

 

@@ -153,8 +153,8 @@ InitializeSdMmcHcPeim (
                 // Memory space: anywhere in 64 bit address space

                 //

                 MmioSize = Size & 0xFFFFFFF0;

-                PciWrite32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);

-                Size = PciRead32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));

+                PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);

+                Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));

                 //

                 // Fix the length to support some spefic 64 bit BAR

                 //

@@ -162,7 +162,7 @@ InitializeSdMmcHcPeim (
                 //

                 // Calculate the size of 64bit bar

                 //

-                MmioSize  |= LShiftU64 ((UINT64) Size, 32);

+                MmioSize |= LShiftU64 ((UINT64)Size, 32);

                 MmioSize  = (~(MmioSize)) + 1;

                 //

                 // Clean the high 32bits of this 64bit BAR to 0 as we only allow a 32bit BAR.

@@ -175,7 +175,8 @@ InitializeSdMmcHcPeim (
                 //

                 ASSERT (FALSE);

                 continue;

-            };

+            }

+

             //

             // Assign resource to the SdMmc Pci host controller's MMIO BAR.

             // Enable the SdMmc Pci host controller by setting BME and MSE bits of PCI_CMD register.

@@ -187,8 +188,9 @@ InitializeSdMmcHcPeim (
             //

             Private->MmioBar[Private->TotalSdMmcHcs].SlotNum++;

             Private->MmioBar[Private->TotalSdMmcHcs].MmioBarAddr[Index] = BarAddr;

-            BarAddr += (UINT32)MmioSize;

+            BarAddr                                                    += (UINT32)MmioSize;

           }

+

           Private->TotalSdMmcHcs++;

           ASSERT (Private->TotalSdMmcHcs < MAX_SD_MMC_HCS);

         }

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
index ee04a6b897..ade59dd6e3 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
@@ -22,10 +22,10 @@
 #include <Library/PeiServicesLib.h>

 #include <Library/MemoryAllocationLib.h>

 

-#define SD_MMC_HC_PEI_SIGNATURE    SIGNATURE_32 ('S', 'D', 'M', 'C')

+#define SD_MMC_HC_PEI_SIGNATURE  SIGNATURE_32 ('S', 'D', 'M', 'C')

 

-#define MAX_SD_MMC_HCS             8

-#define MAX_SD_MMC_SLOTS           6

+#define MAX_SD_MMC_HCS    8

+#define MAX_SD_MMC_SLOTS  6

 

 //

 // SD Host Controller SlotInfo Register Offset

@@ -33,23 +33,23 @@
 #define SD_MMC_HC_PEI_SLOT_OFFSET  0x40

 

 typedef struct {

-  UINT8    FirstBar:3;        // bit 0:2

-  UINT8    Reserved:1;        // bit 3

-  UINT8    SlotNum:3;         // bit 4:6

-  UINT8    Reserved1:1;       // bit 7

+  UINT8    FirstBar  : 3;     // bit 0:2

+  UINT8    Reserved  : 1;     // bit 3

+  UINT8    SlotNum   : 3;     // bit 4:6

+  UINT8    Reserved1 : 1;     // bit 7

 } SD_MMC_HC_PEI_SLOT_INFO;

 

 typedef struct {

-  UINTN                            SlotNum;

-  UINTN                            MmioBarAddr[MAX_SD_MMC_SLOTS];

+  UINTN    SlotNum;

+  UINTN    MmioBarAddr[MAX_SD_MMC_SLOTS];

 } SD_MMC_HC_PEI_BAR;

 

 typedef struct {

-  UINTN                            Signature;

-  EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;

-  EFI_PEI_PPI_DESCRIPTOR           PpiList;

-  UINTN                            TotalSdMmcHcs;

-  SD_MMC_HC_PEI_BAR                MmioBar[MAX_SD_MMC_HCS];

+  UINTN                               Signature;

+  EDKII_SD_MMC_HOST_CONTROLLER_PPI    SdMmcHostControllerPpi;

+  EFI_PEI_PPI_DESCRIPTOR              PpiList;

+  UINTN                               TotalSdMmcHcs;

+  SD_MMC_HC_PEI_BAR                   MmioBar[MAX_SD_MMC_HCS];

 } SD_MMC_HC_PEI_PRIVATE_DATA;

 

 #define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a)  CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)

@@ -71,10 +71,10 @@ typedef struct {
 EFI_STATUS

 EFIAPI

 GetSdMmcHcMmioBar (

-  IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,

-  IN     UINT8                            ControllerId,

-  IN OUT UINTN                            **MmioBar,

-     OUT UINT8                            *BarNum

+  IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI  *This,

+  IN     UINT8                             ControllerId,

+  IN OUT UINTN                             **MmioBar,

+  OUT UINT8                                *BarNum

   );

 

 #endif