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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-09-19 09:36:13 +0100
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-09-26 05:49:15 -0700
commit065ae7d717f9e49c3be12dada109d60dead0bb90 (patch)
tree1994e75536971a096087cb43320ebe42568c5698 /MdeModulePkg/Bus
parent587e9dfbbafe7d4e772c1870b8c880c6d7a8a70c (diff)
downloadedk2-065ae7d717f9e49c3be12dada109d60dead0bb90.tar.gz
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MdeModulePkg/PciBusDxe: make OPROM BAR degradation configurable
The 'universal' PCI bus driver in MdeModulePkg contains a quirk to degrade 64-bit PCI MMIO BARs to 32-bit in the presence of an option ROM on the same PCI controller. This quirk is highly specific to not just the X64 architecture in general, but to the PC platform in particular, given that only X64 platforms that require legacy PC BIOS compatibility require it. However, making the quirk dependent on the presence of the legacy BIOS protocol met with resistance, due to the fact that it introduces a dependency on the IntelFrameworkModulePkg package. So instead, make the quirk configurable, by introducing a feature flag PCD 'PcdPciDegradeResourceForOptionRom' which defaults to TRUE only for X64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus')
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf7
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c76
2 files changed, 43 insertions, 40 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index 330ccc8cbf..a3ab11fd8d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -97,9 +97,10 @@
gEfiLoadFile2ProtocolGuid ## SOMETIMES_PRODUCES
[FeaturePcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciBridgeIoAlignmentProbe ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdUnalignedPciIoEnable ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciBridgeIoAlignmentProbe ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdUnalignedPciIoEnable ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDegradeResourceForOptionRom ## CONSUMES
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize ## SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index b0632d53b8..e93134613b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -1058,48 +1058,50 @@ DegradeResource (
LIST_ENTRY *NextChildNodeLink;
PCI_RESOURCE_NODE *ResourceNode;
- //
- // If any child device has both option ROM and 64-bit BAR, degrade its PMEM64/MEM64
- // requests in case that if a legacy option ROM image can not access 64-bit resources.
- //
- ChildDeviceLink = Bridge->ChildList.ForwardLink;
- while (ChildDeviceLink != NULL && ChildDeviceLink != &Bridge->ChildList) {
- PciIoDevice = PCI_IO_DEVICE_FROM_LINK (ChildDeviceLink);
- if (PciIoDevice->RomSize != 0) {
- if (!IsListEmpty (&Mem64Node->ChildList)) {
- ChildNodeLink = Mem64Node->ChildList.ForwardLink;
- while (ChildNodeLink != &Mem64Node->ChildList) {
- ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
- NextChildNodeLink = ChildNodeLink->ForwardLink;
-
- if ((ResourceNode->PciDev == PciIoDevice) &&
- (ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
- ) {
- RemoveEntryList (ChildNodeLink);
- InsertResourceNode (Mem32Node, ResourceNode);
+ if (FeaturePcdGet (PcdPciDegradeResourceForOptionRom)) {
+ //
+ // If any child device has both option ROM and 64-bit BAR, degrade its PMEM64/MEM64
+ // requests in case that if a legacy option ROM image can not access 64-bit resources.
+ //
+ ChildDeviceLink = Bridge->ChildList.ForwardLink;
+ while (ChildDeviceLink != NULL && ChildDeviceLink != &Bridge->ChildList) {
+ PciIoDevice = PCI_IO_DEVICE_FROM_LINK (ChildDeviceLink);
+ if (PciIoDevice->RomSize != 0) {
+ if (!IsListEmpty (&Mem64Node->ChildList)) {
+ ChildNodeLink = Mem64Node->ChildList.ForwardLink;
+ while (ChildNodeLink != &Mem64Node->ChildList) {
+ ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
+ NextChildNodeLink = ChildNodeLink->ForwardLink;
+
+ if ((ResourceNode->PciDev == PciIoDevice) &&
+ (ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
+ ) {
+ RemoveEntryList (ChildNodeLink);
+ InsertResourceNode (Mem32Node, ResourceNode);
+ }
+ ChildNodeLink = NextChildNodeLink;
}
- ChildNodeLink = NextChildNodeLink;
- }
- }
+ }
- if (!IsListEmpty (&PMem64Node->ChildList)) {
- ChildNodeLink = PMem64Node->ChildList.ForwardLink;
- while (ChildNodeLink != &PMem64Node->ChildList) {
- ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
- NextChildNodeLink = ChildNodeLink->ForwardLink;
-
- if ((ResourceNode->PciDev == PciIoDevice) &&
- (ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
- ) {
- RemoveEntryList (ChildNodeLink);
- InsertResourceNode (PMem32Node, ResourceNode);
+ if (!IsListEmpty (&PMem64Node->ChildList)) {
+ ChildNodeLink = PMem64Node->ChildList.ForwardLink;
+ while (ChildNodeLink != &PMem64Node->ChildList) {
+ ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
+ NextChildNodeLink = ChildNodeLink->ForwardLink;
+
+ if ((ResourceNode->PciDev == PciIoDevice) &&
+ (ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
+ ) {
+ RemoveEntryList (ChildNodeLink);
+ InsertResourceNode (PMem32Node, ResourceNode);
+ }
+ ChildNodeLink = NextChildNodeLink;
}
- ChildNodeLink = NextChildNodeLink;
- }
- }
+ }
+ }
+ ChildDeviceLink = ChildDeviceLink->ForwardLink;
}
- ChildDeviceLink = ChildDeviceLink->ForwardLink;
}
//