summaryrefslogtreecommitdiffstats
path: root/MdeModulePkg/Bus
diff options
context:
space:
mode:
authorTian Feng <feng.tian@intel.com>2015-06-09 03:21:11 +0000
committererictian <erictian@Edk2>2015-06-09 03:21:11 +0000
commit3ee12d880015bb96037e6db33d8b2d76ee4a49e1 (patch)
tree28b9b4dd3033cdddda14496717905e492dd0a0fe /MdeModulePkg/Bus
parentc17c4a1ffdc1894a5c13a67229c22fa6c2c99b93 (diff)
downloadedk2-3ee12d880015bb96037e6db33d8b2d76ee4a49e1.tar.gz
edk2-3ee12d880015bb96037e6db33d8b2d76ee4a49e1.tar.bz2
edk2-3ee12d880015bb96037e6db33d8b2d76ee4a49e1.zip
MdeModulePkg/XhciDxe: Update async polling interval to 1ms.
Updating the async polling interval from 50ms to 1ms for better performance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tian Feng <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17585 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus')
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 729a8c0dd5..9927f79783 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -67,9 +67,9 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
#define XHC_POLL_DELAY (1000)
//
// XHC async transfer timer interval, set by experience.
-// The unit is 100us, takes 50ms as interval.
+// The unit is 100us, takes 1ms as interval.
//
-#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(50)
+#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
//
// XHC raises TPL to TPL_NOTIFY to serialize all its operations