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authorMichael Kubacki <michael.kubacki@microsoft.com>2021-12-05 14:54:02 -0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2021-12-07 17:24:28 +0000
commit1436aea4d5707e672672a11bda72be2c63c936c3 (patch)
tree370c9d5bd8823aa8ea7bce71a0f29bff71feff67 /MdeModulePkg/Bus
parent7c7184e201a90a1d2376e615e55e3f4074731468 (diff)
downloadedk2-1436aea4d5707e672672a11bda72be2c63c936c3.tar.gz
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MdeModulePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdeModulePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdeModulePkg/Bus')
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c803
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPei.c97
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPei.h336
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.c94
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.h2
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.c111
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.h24
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiS3.c39
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.c58
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.h28
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/DevicePath.c66
-rw-r--r--MdeModulePkg/Bus/Ata/AhciPei/DmaMem.c118
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c1039
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h414
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c591
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h346
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c31
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c590
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h68
-rw-r--r--MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c498
-rw-r--r--MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h279
-rw-r--r--MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c325
-rw-r--r--MdeModulePkg/Bus/Ata/AtaBusDxe/ComponentName.c35
-rw-r--r--MdeModulePkg/Bus/I2c/I2cDxe/I2cBus.c437
-rw-r--r--MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.c27
-rw-r--r--MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.h174
-rw-r--r--MdeModulePkg/Bus/I2c/I2cDxe/I2cHost.c215
-rw-r--r--MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.c21
-rw-r--r--MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.h15
-rw-r--r--MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.c130
-rw-r--r--MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.h12
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/ComponentName.c42
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdCtrller.c559
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c159
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.c160
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h247
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.c255
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.h88
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2MouseDxe/ComponentName.c29
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.c185
-rw-r--r--MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.h77
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.c34
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.h13
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c923
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h114
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.c50
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h18
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c169
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h157
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c381
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h72
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c321
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h301
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c172
-rw-r--r--MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h49
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/DmaMem.c89
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c592
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.h116
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhciReg.h127
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhciSched.c142
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhciSched.h18
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.c297
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.h300
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.c247
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.h31
-rw-r--r--MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.c912
-rw-r--r--MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.h210
-rw-r--r--MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c260
-rw-r--r--MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c30
-rw-r--r--MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.c143
-rw-r--r--MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c929
-rw-r--r--MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h42
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/ComponentName.c47
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c345
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.h187
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c629
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.h82
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.c39
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.h30
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c386
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h17
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c320
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c66
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c118
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c148
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h137
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c134
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h4
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c204
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h39
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c191
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h24
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c27
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c60
-rw-r--r--MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h4
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c23
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h14
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c145
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h257
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c67
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h42
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c214
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h54
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c49
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h25
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c730
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h100
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c1268
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h138
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c121
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h42
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c680
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h77
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c629
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h46
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c246
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h33
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c14
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h2
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c1519
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h180
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c55
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h2
-rw-r--r--MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c1328
-rw-r--r--MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h81
-rw-r--r--MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h15
-rw-r--r--MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h82
-rw-r--r--MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c594
-rw-r--r--MdeModulePkg/Bus/Pci/PciSioSerialDxe/ComponentName.c51
-rw-r--r--MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.c669
-rw-r--r--MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h398
-rw-r--r--MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c472
-rw-r--r--MdeModulePkg/Bus/Pci/SataControllerDxe/ComponentName.c41
-rw-r--r--MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c203
-rw-r--r--MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h134
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ComponentName.c36
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c435
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c395
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c365
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h271
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c845
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h284
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c66
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h36
-rw-r--r--MdeModulePkg/Bus/Pci/UfsPciHcDxe/ComponentName.c33
-rw-r--r--MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.c145
-rw-r--r--MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.h70
-rw-r--r--MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c25
-rw-r--r--MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.h20
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.c32
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.h11
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c858
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h86
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.c43
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.h6
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c320
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h132
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c93
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h140
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c293
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h89
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c170
-rw-r--r--MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h51
-rw-r--r--MdeModulePkg/Bus/Pci/UhciPei/DmaMem.c83
-rw-r--r--MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.c1210
-rw-r--r--MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h541
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.c19
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.h2
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c243
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.h63
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c866
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h193
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c197
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h356
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c1270
-rw-r--r--MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h1148
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c127
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c204
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.h58
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c558
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h135
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h324
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c1038
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhciSched.h1082
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiBusDxe/ComponentName.c24
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.c413
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.h79
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ComponentName.c34
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c2359
-rw-r--r--MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.h541
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c85
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c222
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h126
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c142
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h23
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c846
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h161
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/ComponentName.c33
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c615
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.h101
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDiskInfo.c6
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.c483
-rw-r--r--MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.h163
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/DmaMem.c85
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.c167
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.h118
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.c142
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.h23
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c862
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h173
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/ComponentName.c31
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.c336
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.h53
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/SdDiskInfo.c4
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/SdDxe.c304
-rw-r--r--MdeModulePkg/Bus/Sd/SdDxe/SdDxe.h135
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/DmaMem.c85
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.c285
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.h152
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.c138
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.h21
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.c512
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.h1137
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/ComponentName.c25
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsDevConfigProtocol.c55
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.c326
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h259
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c630
-rw-r--r--MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.h1137
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.c216
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.h37
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/PeiAtapi.c351
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.c68
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.h85
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.c366
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.h112
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBotPei/UsbPeim.h1
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/ComponentName.c36
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c541
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.h239
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.c366
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.h76
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c332
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.h58
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.c393
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.h116
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.c496
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.h36
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.c196
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.h117
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.c57
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.h106
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/UsbIoPeim.c215
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c533
-rw-r--r--MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h123
-rw-r--r--MdeModulePkg/Bus/Usb/UsbKbDxe/ComponentName.c37
-rw-r--r--MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.c294
-rw-r--r--MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.h231
-rw-r--r--MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.c861
-rw-r--r--MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.h91
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/ComponentName.c23
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMass.h65
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.c431
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.h217
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.c136
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.h74
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.c197
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.h36
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.c41
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.h30
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.c242
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.h46
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/ComponentName.c38
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/MouseHid.c192
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.c226
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.h139
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseDxe/ComponentName.c38
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseDxe/MouseHid.c194
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.c226
-rw-r--r--MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.h143
280 files changed, 34755 insertions, 33644 deletions
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
index 7636ad27c8..7b97887c5d 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
@@ -10,9 +10,9 @@
#include "AhciPei.h"
-#define ATA_CMD_TRUST_NON_DATA 0x5B
-#define ATA_CMD_TRUST_RECEIVE 0x5C
-#define ATA_CMD_TRUST_SEND 0x5E
+#define ATA_CMD_TRUST_NON_DATA 0x5B
+#define ATA_CMD_TRUST_RECEIVE 0x5C
+#define ATA_CMD_TRUST_SEND 0x5E
//
// Look up table (IsWrite) for EFI_ATA_PASS_THRU_CMD_PROTOCOL
@@ -25,7 +25,7 @@ EFI_ATA_PASS_THRU_CMD_PROTOCOL mAtaPassThruCmdProtocols[2] = {
//
// Look up table (Lba48Bit, IsIsWrite) for ATA_CMD
//
-UINT8 mAtaCommands[2][2] = {
+UINT8 mAtaCommands[2][2] = {
{
ATA_CMD_READ_SECTORS, // 28-bit LBA; PIO read
ATA_CMD_WRITE_SECTORS // 28-bit LBA; PIO write
@@ -47,16 +47,16 @@ UINT8 mAtaTrustCommands[2] = {
//
// Look up table (Lba48Bit) for maximum transfer block number
//
-#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
+#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
//
// Due to limited resource for VTd PEI DMA buffer on platforms, the driver
// limits the maximum transfer block number for 48-bit addressing.
// Here, setting to 0x800 means that for device with 512-byte block size, the
// maximum buffer for DMA mapping will be 1M bytes in size.
//
-#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x800
+#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x800
-UINT32 mMaxTransferBlockNumber[2] = {
+UINT32 mMaxTransferBlockNumber[2] = {
MAX_28BIT_TRANSFER_BLOCK_NUM,
MAX_48BIT_TRANSFER_BLOCK_NUM
};
@@ -64,8 +64,7 @@ UINT32 mMaxTransferBlockNumber[2] = {
//
// The maximum total sectors count in 28 bit addressing mode
//
-#define MAX_28BIT_ADDRESSING_CAPACITY 0xfffffff
-
+#define MAX_28BIT_ADDRESSING_CAPACITY 0xfffffff
/**
Read AHCI Operation register.
@@ -78,11 +77,11 @@ UINT32 mMaxTransferBlockNumber[2] = {
**/
UINT32
AhciReadReg (
- IN UINTN AhciBar,
- IN UINT32 Offset
+ IN UINTN AhciBar,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
Data = 0;
Data = MmioRead32 (AhciBar + Offset);
@@ -100,9 +99,9 @@ AhciReadReg (
**/
VOID
AhciWriteReg (
- IN UINTN AhciBar,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN UINTN AhciBar,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
MmioWrite32 (AhciBar + Offset, Data);
@@ -118,12 +117,12 @@ AhciWriteReg (
**/
VOID
AhciAndReg (
- IN UINTN AhciBar,
- IN UINT32 Offset,
- IN UINT32 AndData
+ IN UINTN AhciBar,
+ IN UINT32 Offset,
+ IN UINT32 AndData
)
{
- UINT32 Data;
+ UINT32 Data;
Data = AhciReadReg (AhciBar, Offset);
Data &= AndData;
@@ -141,12 +140,12 @@ AhciAndReg (
**/
VOID
AhciOrReg (
- IN UINTN AhciBar,
- IN UINT32 Offset,
- IN UINT32 OrData
+ IN UINTN AhciBar,
+ IN UINT32 Offset,
+ IN UINT32 OrData
)
{
- UINT32 Data;
+ UINT32 Data;
Data = AhciReadReg (AhciBar, Offset);
Data |= OrData;
@@ -171,17 +170,17 @@ AhciOrReg (
EFI_STATUS
EFIAPI
AhciWaitMmioSet (
- IN UINTN AhciBar,
- IN UINT32 Offset,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT32 Offset,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT32 Delay;
+ UINT32 Value;
+ UINT32 Delay;
- Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);
+ Delay = (UINT32)(DivU64x32 (Timeout, 1000) + 1);
do {
Value = AhciReadReg (AhciBar, Offset) & MaskValue;
@@ -196,7 +195,6 @@ AhciWaitMmioSet (
MicroSecondDelay (100);
Delay--;
-
} while (Delay > 0);
return EFI_TIMEOUT;
@@ -215,14 +213,14 @@ AhciWaitMmioSet (
**/
EFI_STATUS
AhciCheckMemSet (
- IN UINTN Address,
- IN UINT32 MaskValue,
- IN UINT32 TestValue
+ IN UINTN Address,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue
)
{
- UINT32 Value;
+ UINT32 Value;
- Value = *(volatile UINT32 *) Address;
+ Value = *(volatile UINT32 *)Address;
Value &= MaskValue;
if (Value == TestValue) {
@@ -246,15 +244,15 @@ AhciCheckMemSet (
**/
EFI_STATUS
AhciWaitMemSet (
- IN EFI_PHYSICAL_ADDRESS Address,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN EFI_PHYSICAL_ADDRESS Address,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
+ UINT32 Value;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -273,7 +271,7 @@ AhciWaitMemSet (
// compiler from optimizing the access to the memory address
// to only read once.
//
- Value = *(volatile UINT32 *) (UINTN) Address;
+ Value = *(volatile UINT32 *)(UINTN)Address;
Value &= MaskValue;
if (Value == TestValue) {
@@ -286,7 +284,6 @@ AhciWaitMemSet (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -303,11 +300,11 @@ AhciWaitMemSet (
**/
VOID
AhciClearPortStatus (
- IN UINTN AhciBar,
- IN UINT8 Port
+ IN UINTN AhciBar,
+ IN UINT8 Port
)
{
- UINT32 Offset;
+ UINT32 Offset;
//
// Clear any error status
@@ -341,12 +338,12 @@ AhciClearPortStatus (
**/
EFI_STATUS
AhciEnableFisReceive (
- IN UINTN AhciBar,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
+ UINT32 Offset;
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_FRE);
@@ -369,13 +366,13 @@ AhciEnableFisReceive (
**/
EFI_STATUS
AhciDisableFisReceive (
- IN UINTN AhciBar,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
- UINT32 Data;
+ UINT32 Offset;
+ UINT32 Data;
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
Data = AhciReadReg (AhciBar, Offset);
@@ -395,7 +392,7 @@ AhciDisableFisReceive (
return EFI_SUCCESS;
}
- AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_FRE));
+ AhciAndReg (AhciBar, Offset, (UINT32) ~(AHCI_PORT_CMD_FRE));
return AhciWaitMmioSet (
AhciBar,
@@ -423,26 +420,26 @@ AhciDisableFisReceive (
**/
VOID
AhciBuildCommand (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN EFI_AHCI_COMMAND_FIS *CommandFis,
- IN EFI_AHCI_COMMAND_LIST *CommandList,
- IN UINT8 CommandSlotNumber,
- IN OUT VOID *DataPhysicalAddr,
- IN UINT32 DataLength
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN EFI_AHCI_COMMAND_FIS *CommandFis,
+ IN EFI_AHCI_COMMAND_LIST *CommandList,
+ IN UINT8 CommandSlotNumber,
+ IN OUT VOID *DataPhysicalAddr,
+ IN UINT32 DataLength
)
{
- EFI_AHCI_REGISTERS *AhciRegisters;
- UINTN AhciBar;
- UINT64 BaseAddr;
- UINT32 PrdtNumber;
- UINT32 PrdtIndex;
- UINTN RemainedData;
- UINTN MemAddr;
- DATA_64 Data64;
- UINT32 Offset;
+ EFI_AHCI_REGISTERS *AhciRegisters;
+ UINTN AhciBar;
+ UINT64 BaseAddr;
+ UINT32 PrdtNumber;
+ UINT32 PrdtIndex;
+ UINTN RemainedData;
+ UINTN MemAddr;
+ DATA_64 Data64;
+ UINT32 Offset;
AhciRegisters = &Private->AhciRegisters;
AhciBar = Private->MmioBase;
@@ -467,11 +464,11 @@ AhciBuildCommand (
return;
}
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * FisIndex;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * FisIndex;
BaseAddr = Data64.Uint64;
- ZeroMem ((VOID *)((UINTN) BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS));
+ ZeroMem ((VOID *)((UINTN)BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS));
ZeroMem (AhciRegisters->AhciCmdTable, sizeof (EFI_AHCI_COMMAND_TABLE));
@@ -480,10 +477,10 @@ AhciBuildCommand (
CopyMem (&AhciRegisters->AhciCmdTable->CommandFis, CommandFis, sizeof (EFI_AHCI_COMMAND_FIS));
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
- AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_DLAE | AHCI_PORT_CMD_ATAPI));
+ AhciAndReg (AhciBar, Offset, (UINT32) ~(AHCI_PORT_CMD_DLAE | AHCI_PORT_CMD_ATAPI));
- RemainedData = (UINTN) DataLength;
- MemAddr = (UINTN) DataPhysicalAddr;
+ RemainedData = (UINTN)DataLength;
+ MemAddr = (UINTN)DataPhysicalAddr;
CommandList->AhciCmdPrdtl = PrdtNumber;
for (PrdtIndex = 0; PrdtIndex < PrdtNumber; PrdtIndex++) {
@@ -493,11 +490,11 @@ AhciBuildCommand (
AhciRegisters->AhciCmdTable->PrdtTable[PrdtIndex].AhciPrdtDbc = AHCI_MAX_DATA_PER_PRDT - 1;
}
- Data64.Uint64 = (UINT64)MemAddr;
+ Data64.Uint64 = (UINT64)MemAddr;
AhciRegisters->AhciCmdTable->PrdtTable[PrdtIndex].AhciPrdtDba = Data64.Uint32.Lower32;
AhciRegisters->AhciCmdTable->PrdtTable[PrdtIndex].AhciPrdtDbau = Data64.Uint32.Upper32;
- RemainedData -= AHCI_MAX_DATA_PER_PRDT;
- MemAddr += AHCI_MAX_DATA_PER_PRDT;
+ RemainedData -= AHCI_MAX_DATA_PER_PRDT;
+ MemAddr += AHCI_MAX_DATA_PER_PRDT;
}
//
@@ -508,12 +505,12 @@ AhciBuildCommand (
}
CopyMem (
- (VOID *) ((UINTN) AhciRegisters->AhciCmdList + (UINTN) CommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST)),
+ (VOID *)((UINTN)AhciRegisters->AhciCmdList + (UINTN)CommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST)),
CommandList,
sizeof (EFI_AHCI_COMMAND_LIST)
);
- Data64.Uint64 = (UINT64)(UINTN) AhciRegisters->AhciCmdTable;
+ Data64.Uint64 = (UINT64)(UINTN)AhciRegisters->AhciCmdTable;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtba = Data64.Uint32.Lower32;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtbau = Data64.Uint32.Upper32;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdPmp = PortMultiplier;
@@ -530,8 +527,8 @@ AhciBuildCommand (
**/
VOID
AhciBuildCommandFis (
- IN OUT EFI_AHCI_COMMAND_FIS *CmdFis,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock
+ IN OUT EFI_AHCI_COMMAND_FIS *CmdFis,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock
)
{
ZeroMem (CmdFis, sizeof (EFI_AHCI_COMMAND_FIS));
@@ -540,25 +537,25 @@ AhciBuildCommandFis (
//
// Indicator it's a command
//
- CmdFis->AhciCFisCmdInd = 0x1;
- CmdFis->AhciCFisCmd = AtaCommandBlock->AtaCommand;
+ CmdFis->AhciCFisCmdInd = 0x1;
+ CmdFis->AhciCFisCmd = AtaCommandBlock->AtaCommand;
- CmdFis->AhciCFisFeature = AtaCommandBlock->AtaFeatures;
- CmdFis->AhciCFisFeatureExp = AtaCommandBlock->AtaFeaturesExp;
+ CmdFis->AhciCFisFeature = AtaCommandBlock->AtaFeatures;
+ CmdFis->AhciCFisFeatureExp = AtaCommandBlock->AtaFeaturesExp;
- CmdFis->AhciCFisSecNum = AtaCommandBlock->AtaSectorNumber;
- CmdFis->AhciCFisSecNumExp = AtaCommandBlock->AtaSectorNumberExp;
+ CmdFis->AhciCFisSecNum = AtaCommandBlock->AtaSectorNumber;
+ CmdFis->AhciCFisSecNumExp = AtaCommandBlock->AtaSectorNumberExp;
- CmdFis->AhciCFisClyLow = AtaCommandBlock->AtaCylinderLow;
- CmdFis->AhciCFisClyLowExp = AtaCommandBlock->AtaCylinderLowExp;
+ CmdFis->AhciCFisClyLow = AtaCommandBlock->AtaCylinderLow;
+ CmdFis->AhciCFisClyLowExp = AtaCommandBlock->AtaCylinderLowExp;
- CmdFis->AhciCFisClyHigh = AtaCommandBlock->AtaCylinderHigh;
- CmdFis->AhciCFisClyHighExp = AtaCommandBlock->AtaCylinderHighExp;
+ CmdFis->AhciCFisClyHigh = AtaCommandBlock->AtaCylinderHigh;
+ CmdFis->AhciCFisClyHighExp = AtaCommandBlock->AtaCylinderHighExp;
CmdFis->AhciCFisSecCount = AtaCommandBlock->AtaSectorCount;
CmdFis->AhciCFisSecCountExp = AtaCommandBlock->AtaSectorCountExp;
- CmdFis->AhciCFisDevHead = (UINT8) (AtaCommandBlock->AtaDeviceHead | 0xE0);
+ CmdFis->AhciCFisDevHead = (UINT8)(AtaCommandBlock->AtaDeviceHead | 0xE0);
}
/**
@@ -575,13 +572,13 @@ AhciBuildCommandFis (
**/
EFI_STATUS
AhciStopCommand (
- IN UINTN AhciBar,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
- UINT32 Data;
+ UINT32 Offset;
+ UINT32 Data;
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
Data = AhciReadReg (AhciBar, Offset);
@@ -591,7 +588,7 @@ AhciStopCommand (
}
if ((Data & AHCI_PORT_CMD_ST) != 0) {
- AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_ST));
+ AhciAndReg (AhciBar, Offset, (UINT32) ~(AHCI_PORT_CMD_ST));
}
return AhciWaitMmioSet (
@@ -618,26 +615,26 @@ AhciStopCommand (
**/
EFI_STATUS
AhciStartCommand (
- IN UINTN AhciBar,
- IN UINT8 Port,
- IN UINT8 CommandSlot,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT8 Port,
+ IN UINT8 CommandSlot,
+ IN UINT64 Timeout
)
{
- UINT32 CmdSlotBit;
- EFI_STATUS Status;
- UINT32 PortStatus;
- UINT32 StartCmd;
- UINT32 PortTfd;
- UINT32 Offset;
- UINT32 Capability;
+ UINT32 CmdSlotBit;
+ EFI_STATUS Status;
+ UINT32 PortStatus;
+ UINT32 StartCmd;
+ UINT32 PortTfd;
+ UINT32 Offset;
+ UINT32 Capability;
//
// Collect AHCI controller information
//
Capability = AhciReadReg (AhciBar, AHCI_CAPABILITY_OFFSET);
- CmdSlotBit = (UINT32) (1 << CommandSlot);
+ CmdSlotBit = (UINT32)(1 << CommandSlot);
AhciClearPortStatus (
AhciBar,
@@ -653,17 +650,17 @@ AhciStartCommand (
return Status;
}
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
PortStatus = AhciReadReg (AhciBar, Offset);
StartCmd = 0;
if ((PortStatus & AHCI_PORT_CMD_ALPE) != 0) {
- StartCmd = AhciReadReg (AhciBar, Offset);
+ StartCmd = AhciReadReg (AhciBar, Offset);
StartCmd &= ~AHCI_PORT_CMD_ICC_MASK;
StartCmd |= AHCI_PORT_CMD_ACTIVE;
}
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
PortTfd = AhciReadReg (AhciBar, Offset);
if ((PortTfd & (AHCI_PORT_TFD_BSY | AHCI_PORT_TFD_DRQ)) != 0) {
@@ -689,7 +686,7 @@ AhciStartCommand (
//
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CI;
AhciAndReg (AhciBar, Offset, 0);
- AhciOrReg (AhciBar, Offset, CmdSlotBit);
+ AhciOrReg (AhciBar, Offset, CmdSlotBit);
return EFI_SUCCESS;
}
@@ -718,40 +715,40 @@ AhciStartCommand (
**/
EFI_STATUS
AhciPioTransfer (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *MapData;
- EFI_AHCI_REGISTERS *AhciRegisters;
- UINTN AhciBar;
- BOOLEAN InfiniteWait;
- UINT32 Offset;
- UINT32 OldRfisLo;
- UINT32 OldRfisHi;
- UINT32 OldCmdListLo;
- UINT32 OldCmdListHi;
- DATA_64 Data64;
- UINT32 FisBaseAddr;
- UINT32 Delay;
- EFI_AHCI_COMMAND_FIS CFis;
- EFI_AHCI_COMMAND_LIST CmdList;
- UINT32 PortTfd;
- UINT32 PrdCount;
- BOOLEAN PioFisReceived;
- BOOLEAN D2hFisReceived;
+ EFI_STATUS Status;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *MapData;
+ EFI_AHCI_REGISTERS *AhciRegisters;
+ UINTN AhciBar;
+ BOOLEAN InfiniteWait;
+ UINT32 Offset;
+ UINT32 OldRfisLo;
+ UINT32 OldRfisHi;
+ UINT32 OldCmdListLo;
+ UINT32 OldCmdListHi;
+ DATA_64 Data64;
+ UINT32 FisBaseAddr;
+ UINT32 Delay;
+ EFI_AHCI_COMMAND_FIS CFis;
+ EFI_AHCI_COMMAND_LIST CmdList;
+ UINT32 PortTfd;
+ UINT32 PrdCount;
+ BOOLEAN PioFisReceived;
+ BOOLEAN D2hFisReceived;
//
// Current driver implementation supports up to a maximum of AHCI_MAX_PRDT_NUMBER
@@ -762,14 +759,16 @@ AhciPioTransfer (
DEBUG_ERROR,
"%a: Driver only support a maximum of 0x%x PRDT entries, "
"current number of data byte 0x%x is too large, maximum allowed is 0x%x.\n",
- __FUNCTION__, AHCI_MAX_PRDT_NUMBER, DataCount,
+ __FUNCTION__,
+ AHCI_MAX_PRDT_NUMBER,
+ DataCount,
AHCI_MAX_PRDT_NUMBER * AHCI_MAX_DATA_PER_PRDT
));
return EFI_UNSUPPORTED;
}
- MapOp = Read ? EdkiiIoMmuOperationBusMasterWrite :
- EdkiiIoMmuOperationBusMasterRead;
+ MapOp = Read ? EdkiiIoMmuOperationBusMasterWrite :
+ EdkiiIoMmuOperationBusMasterRead;
MapLength = DataCount;
Status = IoMmuMap (
MapOp,
@@ -783,9 +782,9 @@ AhciPioTransfer (
return EFI_OUT_OF_RESOURCES;
}
- AhciRegisters = &Private->AhciRegisters;
- AhciBar = Private->MmioBase;
- InfiniteWait = (Timeout == 0) ? TRUE : FALSE;
+ AhciRegisters = &Private->AhciRegisters;
+ AhciBar = Private->MmioBase;
+ InfiniteWait = (Timeout == 0) ? TRUE : FALSE;
//
// Fill FIS base address register
@@ -794,23 +793,23 @@ AhciPioTransfer (
OldRfisLo = AhciReadReg (AhciBar, Offset);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FBU;
OldRfisHi = AhciReadReg (AhciBar, Offset);
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * FisIndex;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * FisIndex;
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FB;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32);
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FBU;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FBU;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32);
//
// Single task environment, we only use one command table for all port
//
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLB;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLB;
OldCmdListLo = AhciReadReg (AhciBar, Offset);
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLBU;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLBU;
OldCmdListHi = AhciReadReg (AhciBar, Offset);
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciCmdList);
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciCmdList);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLB;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32);
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLBU;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLBU;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32);
//
@@ -854,16 +853,17 @@ AhciPioTransfer (
// Wait device sends the PIO setup fis before data transfer
//
Status = EFI_TIMEOUT;
- Delay = (UINT32) DivU64x32 (Timeout, 1000) + 1;
+ Delay = (UINT32)DivU64x32 (Timeout, 1000) + 1;
do {
PioFisReceived = FALSE;
D2hFisReceived = FALSE;
- Offset = FisBaseAddr + AHCI_PIO_FIS_OFFSET;
- Status = AhciCheckMemSet (Offset, AHCI_FIS_TYPE_MASK, AHCI_FIS_PIO_SETUP);
+ Offset = FisBaseAddr + AHCI_PIO_FIS_OFFSET;
+ Status = AhciCheckMemSet (Offset, AHCI_FIS_TYPE_MASK, AHCI_FIS_PIO_SETUP);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "%a: PioFisReceived.\n", __FUNCTION__));
PioFisReceived = TRUE;
}
+
//
// According to SATA 2.6 spec section 11.7, D2h FIS means an error encountered.
// But Qemu and Marvel 9230 sata controller may just receive a D2h FIS from
@@ -879,8 +879,8 @@ AhciPioTransfer (
}
if (PioFisReceived || D2hFisReceived) {
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
- PortTfd = AhciReadReg (AhciBar, (UINT32) Offset);
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
+ PortTfd = AhciReadReg (AhciBar, (UINT32)Offset);
//
// PxTFD will be updated if there is a D2H or SetupFIS received.
//
@@ -889,7 +889,7 @@ AhciPioTransfer (
break;
}
- PrdCount = *(volatile UINT32 *) (&(AhciRegisters->AhciCmdList[0].AhciCmdPrdbc));
+ PrdCount = *(volatile UINT32 *)(&(AhciRegisters->AhciCmdList[0].AhciCmdPrdbc));
if (PrdCount == DataCount) {
Status = EFI_SUCCESS;
break;
@@ -899,7 +899,7 @@ AhciPioTransfer (
//
// Stall for 100 microseconds.
//
- MicroSecondDelay(100);
+ MicroSecondDelay (100);
Delay--;
if (Delay == 0) {
@@ -922,8 +922,8 @@ AhciPioTransfer (
goto Exit;
}
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
- PortTfd = AhciReadReg (AhciBar, (UINT32) Offset);
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
+ PortTfd = AhciReadReg (AhciBar, (UINT32)Offset);
if ((PortTfd & AHCI_PORT_TFD_ERR) != 0) {
Status = EFI_DEVICE_ERROR;
}
@@ -979,25 +979,25 @@ Exit:
**/
EFI_STATUS
AhciNonDataTransfer (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- UINTN AhciBar;
- EFI_AHCI_REGISTERS *AhciRegisters;
- UINTN FisBaseAddr;
- UINTN Offset;
- UINT32 PortTfd;
- EFI_AHCI_COMMAND_FIS CFis;
- EFI_AHCI_COMMAND_LIST CmdList;
-
- AhciBar = Private->MmioBase;
+ EFI_STATUS Status;
+ UINTN AhciBar;
+ EFI_AHCI_REGISTERS *AhciRegisters;
+ UINTN FisBaseAddr;
+ UINTN Offset;
+ UINT32 PortTfd;
+ EFI_AHCI_COMMAND_FIS CFis;
+ EFI_AHCI_COMMAND_LIST CmdList;
+
+ AhciBar = Private->MmioBase;
AhciRegisters = &Private->AhciRegisters;
//
@@ -1047,8 +1047,8 @@ AhciNonDataTransfer (
goto Exit;
}
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
- PortTfd = AhciReadReg (AhciBar, (UINT32) Offset);
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
+ PortTfd = AhciReadReg (AhciBar, (UINT32)Offset);
if ((PortTfd & AHCI_PORT_TFD_ERR) != 0) {
Status = EFI_DEVICE_ERROR;
}
@@ -1082,13 +1082,13 @@ Exit:
**/
EFI_STATUS
AhciReset (
- IN UINTN AhciBar,
- IN UINT64 Timeout
+ IN UINTN AhciBar,
+ IN UINT64 Timeout
)
{
- UINT32 Delay;
- UINT32 Value;
- UINT32 Capability;
+ UINT32 Delay;
+ UINT32 Value;
+ UINT32 Capability;
//
// Collect AHCI controller information
@@ -1104,10 +1104,10 @@ AhciReset (
AhciOrReg (AhciBar, AHCI_GHC_OFFSET, AHCI_GHC_RESET);
- Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);
+ Delay = (UINT32)(DivU64x32 (Timeout, 1000) + 1);
do {
- Value = AhciReadReg(AhciBar, AHCI_GHC_OFFSET);
+ Value = AhciReadReg (AhciBar, AHCI_GHC_OFFSET);
if ((Value & AHCI_GHC_RESET) == 0) {
return EFI_SUCCESS;
}
@@ -1115,7 +1115,7 @@ AhciReset (
//
// Stall for 100 microseconds.
//
- MicroSecondDelay(100);
+ MicroSecondDelay (100);
Delay--;
} while (Delay > 0);
@@ -1141,16 +1141,16 @@ AhciReset (
**/
EFI_STATUS
AhciIdentify (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN ATA_IDENTIFY_DATA *Buffer
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN ATA_IDENTIFY_DATA *Buffer
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK Acb;
- EFI_ATA_STATUS_BLOCK Asb;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK Acb;
+ EFI_ATA_STATUS_BLOCK Asb;
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1178,7 +1178,6 @@ AhciIdentify (
return Status;
}
-
/**
Collect the number of bits set within a port bitmap.
@@ -1189,10 +1188,10 @@ AhciIdentify (
**/
UINT8
AhciGetNumberOfPortsFromMap (
- IN UINT32 PortBitMap
+ IN UINT32 PortBitMap
)
{
- UINT8 NumberOfPorts;
+ UINT8 NumberOfPorts;
NumberOfPorts = 0;
@@ -1200,6 +1199,7 @@ AhciGetNumberOfPortsFromMap (
if ((PortBitMap & ((UINT32)BIT0)) != 0) {
NumberOfPorts++;
}
+
PortBitMap = PortBitMap >> 1;
}
@@ -1220,9 +1220,9 @@ AhciGetNumberOfPortsFromMap (
**/
EFI_STATUS
AhciGetPortFromMap (
- IN UINT32 PortBitMap,
- IN UINT8 PortIndex,
- OUT UINT8 *Port
+ IN UINT32 PortBitMap,
+ IN UINT8 PortIndex,
+ OUT UINT8 *Port
)
{
if (PortIndex == 0) {
@@ -1242,6 +1242,7 @@ AhciGetPortFromMap (
return EFI_SUCCESS;
}
}
+
PortBitMap = PortBitMap >> 1;
*Port = *Port + 1;
}
@@ -1260,22 +1261,22 @@ AhciGetPortFromMap (
**/
EFI_STATUS
AhciCreateTransferDescriptor (
- IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
+ IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN AhciBar;
- EFI_AHCI_REGISTERS *AhciRegisters;
- EFI_PHYSICAL_ADDRESS DeviceAddress;
- VOID *Base;
- VOID *Mapping;
- UINT32 Capability;
- UINT32 PortImplementBitMap;
- UINT8 MaxPortNumber;
- UINT8 MaxCommandSlotNumber;
- UINTN MaxRFisSize;
- UINTN MaxCmdListSize;
- UINTN MaxCmdTableSize;
+ EFI_STATUS Status;
+ UINTN AhciBar;
+ EFI_AHCI_REGISTERS *AhciRegisters;
+ EFI_PHYSICAL_ADDRESS DeviceAddress;
+ VOID *Base;
+ VOID *Mapping;
+ UINT32 Capability;
+ UINT32 PortImplementBitMap;
+ UINT8 MaxPortNumber;
+ UINT8 MaxCommandSlotNumber;
+ UINTN MaxRFisSize;
+ UINTN MaxCmdListSize;
+ UINTN MaxCmdTableSize;
AhciBar = Private->MmioBase;
AhciRegisters = &Private->AhciRegisters;
@@ -1288,7 +1289,7 @@ AhciCreateTransferDescriptor (
//
// Get the number of command slots per port supported by this HBA.
//
- MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1);
+ MaxCommandSlotNumber = (UINT8)(((Capability & 0x1F00) >> 8) + 1);
ASSERT (MaxCommandSlotNumber > 0);
if (MaxCommandSlotNumber == 0) {
return EFI_DEVICE_ERROR;
@@ -1299,10 +1300,11 @@ AhciCreateTransferDescriptor (
// allocated for recived FIS.
//
PortImplementBitMap = AhciReadReg (AhciBar, AHCI_PI_OFFSET);
- MaxPortNumber = (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1);
+ MaxPortNumber = (UINT8)(UINTN)(HighBitSet32 (PortImplementBitMap) + 1);
if (MaxPortNumber == 0) {
return EFI_DEVICE_ERROR;
}
+
//
// Get the number of ports that actually needed to be initialized.
//
@@ -1312,16 +1314,17 @@ AhciCreateTransferDescriptor (
// Allocate memory for received FIS.
//
MaxRFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS);
- Status = IoMmuAllocateBuffer (
- EFI_SIZE_TO_PAGES (MaxRFisSize),
- &Base,
- &DeviceAddress,
- &Mapping
- );
+ Status = IoMmuAllocateBuffer (
+ EFI_SIZE_TO_PAGES (MaxRFisSize),
+ &Base,
+ &DeviceAddress,
+ &Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) Base));
+
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Base));
AhciRegisters->AhciRFis = Base;
AhciRegisters->AhciRFisMap = Mapping;
AhciRegisters->MaxRFisSize = MaxRFisSize;
@@ -1333,17 +1336,18 @@ AhciCreateTransferDescriptor (
// list for each port.
//
MaxCmdListSize = 1 * sizeof (EFI_AHCI_COMMAND_LIST);
- Status = IoMmuAllocateBuffer (
- EFI_SIZE_TO_PAGES (MaxCmdListSize),
- &Base,
- &DeviceAddress,
- &Mapping
- );
+ Status = IoMmuAllocateBuffer (
+ EFI_SIZE_TO_PAGES (MaxCmdListSize),
+ &Base,
+ &DeviceAddress,
+ &Mapping
+ );
if (EFI_ERROR (Status)) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) Base));
+
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Base));
AhciRegisters->AhciCmdList = Base;
AhciRegisters->AhciCmdListMap = Mapping;
AhciRegisters->MaxCmdListSize = MaxCmdListSize;
@@ -1354,17 +1358,18 @@ AhciCreateTransferDescriptor (
// According to AHCI 1.3 spec, a PRD table can contain maximum 65535 entries.
//
MaxCmdTableSize = sizeof (EFI_AHCI_COMMAND_TABLE);
- Status = IoMmuAllocateBuffer (
- EFI_SIZE_TO_PAGES (MaxCmdTableSize),
- &Base,
- &DeviceAddress,
- &Mapping
- );
+ Status = IoMmuAllocateBuffer (
+ EFI_SIZE_TO_PAGES (MaxCmdTableSize),
+ &Base,
+ &DeviceAddress,
+ &Mapping
+ );
if (EFI_ERROR (Status)) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) Base));
+
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Base));
AhciRegisters->AhciCmdTable = Base;
AhciRegisters->AhciCmdTableMap = Mapping;
AhciRegisters->MaxCmdTableSize = MaxCmdTableSize;
@@ -1375,19 +1380,19 @@ AhciCreateTransferDescriptor (
ErrorExit:
if (AhciRegisters->AhciRFisMap != NULL) {
IoMmuFreeBuffer (
- EFI_SIZE_TO_PAGES (AhciRegisters->MaxRFisSize),
- AhciRegisters->AhciRFis,
- AhciRegisters->AhciRFisMap
- );
+ EFI_SIZE_TO_PAGES (AhciRegisters->MaxRFisSize),
+ AhciRegisters->AhciRFis,
+ AhciRegisters->AhciRFisMap
+ );
AhciRegisters->AhciRFis = NULL;
}
if (AhciRegisters->AhciCmdListMap != NULL) {
IoMmuFreeBuffer (
- EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdListSize),
- AhciRegisters->AhciCmdList,
- AhciRegisters->AhciCmdListMap
- );
+ EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdListSize),
+ AhciRegisters->AhciCmdList,
+ AhciRegisters->AhciCmdListMap
+ );
AhciRegisters->AhciCmdList = NULL;
}
@@ -1408,12 +1413,12 @@ ErrorExit:
**/
EFI_LBA
GetAtapi6Capacity (
- IN ATA_IDENTIFY_DATA *IdentifyData
+ IN ATA_IDENTIFY_DATA *IdentifyData
)
{
- EFI_LBA Capacity;
- EFI_LBA TmpLba;
- UINTN Index;
+ EFI_LBA Capacity;
+ EFI_LBA TmpLba;
+ UINTN Index;
if ((IdentifyData->command_set_supported_83 & BIT10) == 0) {
//
@@ -1430,7 +1435,7 @@ GetAtapi6Capacity (
//
// Lower byte goes first: word[100] is the lowest word, word[103] is highest
//
- TmpLba = IdentifyData->maximum_lba_for_48bit_addressing[Index];
+ TmpLba = IdentifyData->maximum_lba_for_48bit_addressing[Index];
Capacity |= LShiftU64 (TmpLba, 16 * Index);
}
@@ -1458,29 +1463,35 @@ GetAtapi6Capacity (
**/
EFI_STATUS
IdentifyAtaDevice (
- IN OUT PEI_AHCI_ATA_DEVICE_DATA *DeviceData
+ IN OUT PEI_AHCI_ATA_DEVICE_DATA *DeviceData
)
{
- ATA_IDENTIFY_DATA *IdentifyData;
- EFI_PEI_BLOCK_IO2_MEDIA *Media;
- EFI_LBA Capacity;
- UINT32 MaxSectorCount;
- UINT16 PhyLogicSectorSupport;
+ ATA_IDENTIFY_DATA *IdentifyData;
+ EFI_PEI_BLOCK_IO2_MEDIA *Media;
+ EFI_LBA Capacity;
+ UINT32 MaxSectorCount;
+ UINT16 PhyLogicSectorSupport;
IdentifyData = DeviceData->IdentifyData;
Media = &DeviceData->Media;
if ((IdentifyData->config & BIT15) != 0) {
DEBUG ((
- DEBUG_ERROR, "%a: Not a hard disk device on Port 0x%x PortMultiplierPort 0x%x\n",
- __FUNCTION__, DeviceData->Port, DeviceData->PortMultiplier
+ DEBUG_ERROR,
+ "%a: Not a hard disk device on Port 0x%x PortMultiplierPort 0x%x\n",
+ __FUNCTION__,
+ DeviceData->Port,
+ DeviceData->PortMultiplier
));
return EFI_UNSUPPORTED;
}
DEBUG ((
- DEBUG_INFO, "%a: Identify Device: Port 0x%x PortMultiplierPort 0x%x\n",
- __FUNCTION__, DeviceData->Port, DeviceData->PortMultiplier
+ DEBUG_INFO,
+ "%a: Identify Device: Port 0x%x PortMultiplierPort 0x%x\n",
+ __FUNCTION__,
+ DeviceData->Port,
+ DeviceData->PortMultiplier
));
//
@@ -1502,7 +1513,7 @@ IdentifyAtaDevice (
// This is a hard disk <= 120GB capacity, treat it as normal hard disk
//
Capacity = ((UINT32)IdentifyData->user_addressable_sectors_hi << 16) |
- IdentifyData->user_addressable_sectors_lo;
+ IdentifyData->user_addressable_sectors_lo;
DeviceData->Lba48Bit = FALSE;
}
@@ -1510,7 +1521,8 @@ IdentifyAtaDevice (
DEBUG ((DEBUG_ERROR, "%a: Invalid Capacity (0) for ATA device.\n", __FUNCTION__));
return EFI_UNSUPPORTED;
}
- Media->LastBlock = (EFI_PEI_LBA) (Capacity - 1);
+
+ Media->LastBlock = (EFI_PEI_LBA)(Capacity - 1);
Media->BlockSize = 0x200;
//
@@ -1518,16 +1530,18 @@ IdentifyAtaDevice (
//
PhyLogicSectorSupport = IdentifyData->phy_logic_sector_support;
DEBUG ((
- DEBUG_INFO, "%a: PhyLogicSectorSupport = 0x%x\n",
- __FUNCTION__, PhyLogicSectorSupport
+ DEBUG_INFO,
+ "%a: PhyLogicSectorSupport = 0x%x\n",
+ __FUNCTION__,
+ PhyLogicSectorSupport
));
if ((PhyLogicSectorSupport & (BIT14 | BIT15)) == BIT14) {
//
// Check logical block size
//
if ((PhyLogicSectorSupport & BIT12) != 0) {
- Media->BlockSize = (UINT32) (((IdentifyData->logic_sector_size_hi << 16) |
- IdentifyData->logic_sector_size_lo) * sizeof (UINT16));
+ Media->BlockSize = (UINT32)(((IdentifyData->logic_sector_size_hi << 16) |
+ IdentifyData->logic_sector_size_lo) * sizeof (UINT16));
}
}
@@ -1541,8 +1555,11 @@ IdentifyAtaDevice (
}
DEBUG ((
- DEBUG_INFO, "%a: BlockSize = 0x%x, LastBlock = 0x%lx\n",
- __FUNCTION__, Media->BlockSize, Media->LastBlock
+ DEBUG_INFO,
+ "%a: BlockSize = 0x%x, LastBlock = 0x%lx\n",
+ __FUNCTION__,
+ Media->BlockSize,
+ Media->LastBlock
));
if ((IdentifyData->trusted_computing_support & BIT0) != 0) {
@@ -1583,16 +1600,16 @@ IdentifyAtaDevice (
**/
EFI_STATUS
CreateNewDevice (
- IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINTN DeviceIndex,
- IN UINT16 Port,
- IN UINT16 PortMultiplier,
- IN UINT8 FisIndex,
- IN ATA_IDENTIFY_DATA *IdentifyData
+ IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINTN DeviceIndex,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN ATA_IDENTIFY_DATA *IdentifyData
)
{
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- EFI_STATUS Status;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ EFI_STATUS Status;
DeviceData = AllocateZeroPool (sizeof (PEI_AHCI_ATA_DEVICE_DATA));
if (DeviceData == NULL) {
@@ -1622,6 +1639,7 @@ CreateNewDevice (
Private->TrustComputingDevices++;
DeviceData->TrustComputingDeviceIndex = Private->TrustComputingDevices;
}
+
Private->ActiveDevices++;
InsertTailList (&Private->DeviceList, &DeviceData->Link);
@@ -1644,25 +1662,25 @@ CreateNewDevice (
**/
EFI_STATUS
AhciModeInitialization (
- IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
+ IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN AhciBar;
- UINT32 Capability;
- UINT32 Value;
- UINT8 MaxPortNumber;
- UINT32 PortImplementBitMap;
- UINT32 PortInitializeBitMap;
- EFI_AHCI_REGISTERS *AhciRegisters;
- UINT8 PortIndex;
- UINT8 Port;
- DATA_64 Data64;
- UINT32 Data;
- UINT32 Offset;
- UINT32 PhyDetectDelay;
- UINTN DeviceIndex;
- ATA_IDENTIFY_DATA IdentifyData;
+ EFI_STATUS Status;
+ UINTN AhciBar;
+ UINT32 Capability;
+ UINT32 Value;
+ UINT8 MaxPortNumber;
+ UINT32 PortImplementBitMap;
+ UINT32 PortInitializeBitMap;
+ EFI_AHCI_REGISTERS *AhciRegisters;
+ UINT8 PortIndex;
+ UINT8 Port;
+ DATA_64 Data64;
+ UINT32 Data;
+ UINT32 Offset;
+ UINT32 PhyDetectDelay;
+ UINTN DeviceIndex;
+ ATA_IDENTIFY_DATA IdentifyData;
AhciBar = Private->MmioBase;
@@ -1690,7 +1708,8 @@ AhciModeInitialization (
DEBUG ((
DEBUG_ERROR,
"%a: Transfer-related data allocation failed with %r.\n",
- __FUNCTION__, Status
+ __FUNCTION__,
+ Status
));
return EFI_OUT_OF_RESOURCES;
}
@@ -1698,7 +1717,7 @@ AhciModeInitialization (
//
// Get the number of command slots per port supported by this HBA.
//
- MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1);
+ MaxPortNumber = (UINT8)((Capability & 0x1F) + 1);
//
// Get the bit map of those ports exposed by this HBA.
@@ -1710,7 +1729,7 @@ AhciModeInitialization (
//
// Get the number of ports that actually needed to be initialized.
//
- MaxPortNumber = MIN (MaxPortNumber, (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1));
+ MaxPortNumber = MIN (MaxPortNumber, (UINT8)(UINTN)(HighBitSet32 (PortImplementBitMap) + 1));
MaxPortNumber = MIN (MaxPortNumber, AhciGetNumberOfPortsFromMap (Private->PortBitMap));
PortInitializeBitMap = Private->PortBitMap & PortImplementBitMap;
@@ -1719,7 +1738,7 @@ AhciModeInitialization (
//
// Enumerate ATA ports
//
- for (PortIndex = 1; PortIndex <= MaxPortNumber; PortIndex ++) {
+ for (PortIndex = 1; PortIndex <= MaxPortNumber; PortIndex++) {
Status = AhciGetPortFromMap (PortInitializeBitMap, PortIndex, &Port);
if (EFI_ERROR (Status)) {
//
@@ -1733,21 +1752,21 @@ AhciModeInitialization (
// Initialize FIS Base Address Register and Command List Base Address
// Register for use.
//
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFis) +
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciRFis) +
sizeof (EFI_AHCI_RECEIVED_FIS) * (PortIndex - 1);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FB;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_FBU;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32);
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciCmdList);
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLB;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciCmdList);
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLB;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CLBU;
AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32);
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_CMD;
- Data = AhciReadReg (AhciBar, Offset);
+ Data = AhciReadReg (AhciBar, Offset);
if ((Data & AHCI_PORT_CMD_CPD) != 0) {
AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_POD);
}
@@ -1777,7 +1796,7 @@ AhciModeInitialization (
// Wait no longer than 15 ms to wait the Phy to detect the presence of a device.
//
PhyDetectDelay = AHCI_BUS_PHY_DETECT_TIMEOUT;
- Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_SSTS;
+ Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_SSTS;
do {
Data = AhciReadReg (AhciBar, Offset) & AHCI_PORT_SSTS_DET_MASK;
if ((Data == AHCI_PORT_SSTS_DET_PCE) || (Data == AHCI_PORT_SSTS_DET)) {
@@ -1806,9 +1825,10 @@ AhciModeInitialization (
PhyDetectDelay = 16 * 1000;
do {
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_SERR;
- if (AhciReadReg(AhciBar, Offset) != 0) {
+ if (AhciReadReg (AhciBar, Offset) != 0) {
AhciWriteReg (AhciBar, Offset, AhciReadReg (AhciBar, Offset));
}
+
Offset = AHCI_PORT_START + Port * AHCI_PORT_REG_WIDTH + AHCI_PORT_TFD;
Data = AhciReadReg (AhciBar, Offset) & AHCI_PORT_TFD_MASK;
@@ -1824,7 +1844,9 @@ AhciModeInitialization (
DEBUG ((
DEBUG_ERROR,
"%a: Port %d device presence detected but phy not ready (TFD=0x%x).\n",
- __FUNCTION__, Port, Data
+ __FUNCTION__,
+ Port,
+ Data
));
continue;
}
@@ -1844,7 +1866,8 @@ AhciModeInitialization (
DEBUG ((
DEBUG_ERROR,
"%a: Error occurred when waiting for the first D2H register FIS - %r\n",
- __FUNCTION__, Status
+ __FUNCTION__,
+ Status
));
continue;
}
@@ -1856,6 +1879,7 @@ AhciModeInitialization (
DEBUG ((DEBUG_ERROR, "%a: AhciIdentify() failed with %r\n", __FUNCTION__, Status));
continue;
}
+
DEBUG ((DEBUG_INFO, "%a: ATA hard disk found on Port %d.\n", __FUNCTION__, Port));
} else {
continue;
@@ -1898,17 +1922,17 @@ AhciModeInitialization (
**/
EFI_STATUS
TransferAtaDevice (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- IN OUT VOID *Buffer,
- IN EFI_LBA StartLba,
- IN UINT32 TransferLength,
- IN BOOLEAN IsWrite
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ IN OUT VOID *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINT32 TransferLength,
+ IN BOOLEAN IsWrite
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- EDKII_PEI_ATA_PASS_THRU_PPI *AtaPassThru;
- EFI_ATA_COMMAND_BLOCK Acb;
- EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ EDKII_PEI_ATA_PASS_THRU_PPI *AtaPassThru;
+ EFI_ATA_COMMAND_BLOCK Acb;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
Private = DeviceData->Private;
AtaPassThru = &Private->AtaPassThruPpi;
@@ -1916,10 +1940,11 @@ TransferAtaDevice (
//
// Ensure Lba48Bit and IsWrite are valid boolean values
//
- ASSERT ((UINTN) DeviceData->Lba48Bit < 2);
- ASSERT ((UINTN) IsWrite < 2);
- if (((UINTN) DeviceData->Lba48Bit >= 2) ||
- ((UINTN) IsWrite >= 2)) {
+ ASSERT ((UINTN)DeviceData->Lba48Bit < 2);
+ ASSERT ((UINTN)IsWrite < 2);
+ if (((UINTN)DeviceData->Lba48Bit >= 2) ||
+ ((UINTN)IsWrite >= 2))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1927,21 +1952,21 @@ TransferAtaDevice (
// Prepare for ATA command block.
//
ZeroMem (&Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
- Acb.AtaCommand = mAtaCommands[DeviceData->Lba48Bit][IsWrite];
- Acb.AtaSectorNumber = (UINT8) StartLba;
- Acb.AtaCylinderLow = (UINT8) RShiftU64 (StartLba, 8);
- Acb.AtaCylinderHigh = (UINT8) RShiftU64 (StartLba, 16);
- Acb.AtaDeviceHead = (UINT8) (BIT7 | BIT6 | BIT5 |
- (DeviceData->PortMultiplier == 0xFFFF ?
+ Acb.AtaCommand = mAtaCommands[DeviceData->Lba48Bit][IsWrite];
+ Acb.AtaSectorNumber = (UINT8)StartLba;
+ Acb.AtaCylinderLow = (UINT8)RShiftU64 (StartLba, 8);
+ Acb.AtaCylinderHigh = (UINT8)RShiftU64 (StartLba, 16);
+ Acb.AtaDeviceHead = (UINT8)(BIT7 | BIT6 | BIT5 |
+ (DeviceData->PortMultiplier == 0xFFFF ?
0 : (DeviceData->PortMultiplier << 4)));
- Acb.AtaSectorCount = (UINT8) TransferLength;
+ Acb.AtaSectorCount = (UINT8)TransferLength;
if (DeviceData->Lba48Bit) {
- Acb.AtaSectorNumberExp = (UINT8) RShiftU64 (StartLba, 24);
- Acb.AtaCylinderLowExp = (UINT8) RShiftU64 (StartLba, 32);
- Acb.AtaCylinderHighExp = (UINT8) RShiftU64 (StartLba, 40);
- Acb.AtaSectorCountExp = (UINT8) (TransferLength >> 8);
+ Acb.AtaSectorNumberExp = (UINT8)RShiftU64 (StartLba, 24);
+ Acb.AtaCylinderLowExp = (UINT8)RShiftU64 (StartLba, 32);
+ Acb.AtaCylinderHighExp = (UINT8)RShiftU64 (StartLba, 40);
+ Acb.AtaSectorCountExp = (UINT8)(TransferLength >> 8);
} else {
- Acb.AtaDeviceHead = (UINT8) (Acb.AtaDeviceHead | RShiftU64 (StartLba, 24));
+ Acb.AtaDeviceHead = (UINT8)(Acb.AtaDeviceHead | RShiftU64 (StartLba, 24));
}
//
@@ -1952,9 +1977,10 @@ TransferAtaDevice (
Packet.OutDataBuffer = Buffer;
Packet.OutTransferLength = TransferLength;
} else {
- Packet.InDataBuffer = Buffer;
- Packet.InTransferLength = TransferLength;
+ Packet.InDataBuffer = Buffer;
+ Packet.InTransferLength = TransferLength;
}
+
Packet.Asb = NULL;
Packet.Acb = &Acb;
Packet.Protocol = mAtaPassThruCmdProtocols[IsWrite];
@@ -2035,22 +2061,22 @@ TransferAtaDevice (
**/
EFI_STATUS
TrustTransferAtaDevice (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- EDKII_PEI_ATA_PASS_THRU_PPI *AtaPassThru;
- EFI_ATA_COMMAND_BLOCK Acb;
- EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- VOID *NewBuffer;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ EDKII_PEI_ATA_PASS_THRU_PPI *AtaPassThru;
+ EFI_ATA_COMMAND_BLOCK Acb;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ VOID *NewBuffer;
Private = DeviceData->Private;
AtaPassThru = &Private->AtaPassThruPpi;
@@ -2058,8 +2084,8 @@ TrustTransferAtaDevice (
//
// Ensure IsTrustSend are valid boolean values
//
- ASSERT ((UINTN) IsTrustSend < 2);
- if ((UINTN) IsTrustSend >= 2) {
+ ASSERT ((UINTN)IsTrustSend < 2);
+ if ((UINTN)IsTrustSend >= 2) {
return EFI_INVALID_PARAMETER;
}
@@ -2068,22 +2094,23 @@ TrustTransferAtaDevice (
//
ZeroMem (&Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
if (TransferLength == 0) {
- Acb.AtaCommand = ATA_CMD_TRUST_NON_DATA;
+ Acb.AtaCommand = ATA_CMD_TRUST_NON_DATA;
} else {
- Acb.AtaCommand = mAtaTrustCommands[IsTrustSend];
+ Acb.AtaCommand = mAtaTrustCommands[IsTrustSend];
}
- Acb.AtaFeatures = SecurityProtocolId;
- Acb.AtaSectorCount = (UINT8) (TransferLength / 512);
- Acb.AtaSectorNumber = (UINT8) ((TransferLength / 512) >> 8);
+
+ Acb.AtaFeatures = SecurityProtocolId;
+ Acb.AtaSectorCount = (UINT8)(TransferLength / 512);
+ Acb.AtaSectorNumber = (UINT8)((TransferLength / 512) >> 8);
//
// NOTE: ATA Spec has no explicitly definition for Security Protocol Specific layout.
// Here use big endian for Cylinder register.
//
- Acb.AtaCylinderHigh = (UINT8) SecurityProtocolSpecificData;
- Acb.AtaCylinderLow = (UINT8) (SecurityProtocolSpecificData >> 8);
- Acb.AtaDeviceHead = (UINT8) (BIT7 | BIT6 | BIT5 |
- (DeviceData->PortMultiplier == 0xFFFF ?
- 0 : (DeviceData->PortMultiplier << 4)));
+ Acb.AtaCylinderHigh = (UINT8)SecurityProtocolSpecificData;
+ Acb.AtaCylinderLow = (UINT8)(SecurityProtocolSpecificData >> 8);
+ Acb.AtaDeviceHead = (UINT8)(BIT7 | BIT6 | BIT5 |
+ (DeviceData->PortMultiplier == 0xFFFF ?
+ 0 : (DeviceData->PortMultiplier << 4)));
//
// Prepare for ATA pass through packet.
@@ -2092,14 +2119,15 @@ TrustTransferAtaDevice (
if (TransferLength == 0) {
Packet.InTransferLength = 0;
Packet.OutTransferLength = 0;
- Packet.Protocol = EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA;
+ Packet.Protocol = EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA;
} else if (IsTrustSend) {
//
// Check the alignment of the incoming buffer prior to invoking underlying
// ATA PassThru PPI.
//
if ((AtaPassThru->Mode->IoAlign > 1) &&
- !IS_ALIGNED (Buffer, AtaPassThru->Mode->IoAlign)) {
+ !IS_ALIGNED (Buffer, AtaPassThru->Mode->IoAlign))
+ {
NewBuffer = AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TransferLength),
AtaPassThru->Mode->IoAlign
@@ -2111,18 +2139,20 @@ TrustTransferAtaDevice (
CopyMem (NewBuffer, Buffer, TransferLength);
Buffer = NewBuffer;
}
- Packet.OutDataBuffer = Buffer;
- Packet.OutTransferLength = (UINT32) TransferLength;
- Packet.Protocol = mAtaPassThruCmdProtocols[IsTrustSend];
+
+ Packet.OutDataBuffer = Buffer;
+ Packet.OutTransferLength = (UINT32)TransferLength;
+ Packet.Protocol = mAtaPassThruCmdProtocols[IsTrustSend];
} else {
- Packet.InDataBuffer = Buffer;
- Packet.InTransferLength = (UINT32) TransferLength;
- Packet.Protocol = mAtaPassThruCmdProtocols[IsTrustSend];
+ Packet.InDataBuffer = Buffer;
+ Packet.InTransferLength = (UINT32)TransferLength;
+ Packet.Protocol = mAtaPassThruCmdProtocols[IsTrustSend];
}
- Packet.Asb = NULL;
- Packet.Acb = &Acb;
- Packet.Timeout = Timeout;
- Packet.Length = EFI_ATA_PASS_THRU_LENGTH_BYTES;
+
+ Packet.Asb = NULL;
+ Packet.Acb = &Acb;
+ Packet.Timeout = Timeout;
+ Packet.Length = EFI_ATA_PASS_THRU_LENGTH_BYTES;
Status = AtaPassThru->PassThru (
AtaPassThru,
@@ -2135,5 +2165,6 @@ TrustTransferAtaDevice (
*TransferLengthOut = Packet.InTransferLength;
}
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.c
index 31b072c118..208b7e9a36 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.c
@@ -40,7 +40,6 @@ EFI_PEI_NOTIFY_DESCRIPTOR mAhciEndOfPeiNotifyListTemplate = {
AhciPeimEndOfPei
};
-
/**
Free the DMA resources allocated by an ATA AHCI controller.
@@ -50,10 +49,10 @@ EFI_PEI_NOTIFY_DESCRIPTOR mAhciEndOfPeiNotifyListTemplate = {
**/
VOID
AhciFreeDmaResource (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_AHCI_REGISTERS *AhciRegisters;
+ EFI_AHCI_REGISTERS *AhciRegisters;
ASSERT (Private != NULL);
@@ -61,18 +60,18 @@ AhciFreeDmaResource (
if (AhciRegisters->AhciRFisMap != NULL) {
IoMmuFreeBuffer (
- EFI_SIZE_TO_PAGES (AhciRegisters->MaxRFisSize),
- AhciRegisters->AhciRFis,
- AhciRegisters->AhciRFisMap
- );
+ EFI_SIZE_TO_PAGES (AhciRegisters->MaxRFisSize),
+ AhciRegisters->AhciRFis,
+ AhciRegisters->AhciRFisMap
+ );
}
if (AhciRegisters->AhciCmdListMap != NULL) {
IoMmuFreeBuffer (
- EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdListSize),
- AhciRegisters->AhciCmdList,
- AhciRegisters->AhciCmdListMap
- );
+ EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdListSize),
+ AhciRegisters->AhciCmdList,
+ AhciRegisters->AhciCmdListMap
+ );
}
if (AhciRegisters->AhciCmdTableMap != NULL) {
@@ -82,7 +81,6 @@ AhciFreeDmaResource (
AhciRegisters->AhciCmdTableMap
);
}
-
}
/**
@@ -104,7 +102,7 @@ AhciPeimEndOfPei (
IN VOID *Ppi
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
AhciFreeDmaResource (Private);
@@ -124,20 +122,20 @@ AhciPeimEndOfPei (
EFI_STATUS
EFIAPI
AtaAhciPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- EFI_BOOT_MODE BootMode;
- EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *AhciHcPpi;
- UINT8 Controller;
- UINTN MmioBase;
- UINTN DevicePathLength;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINT32 PortBitMap;
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- UINT8 NumberOfPorts;
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *AhciHcPpi;
+ UINT8 Controller;
+ UINTN MmioBase;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT32 PortBitMap;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ UINT8 NumberOfPorts;
DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));
@@ -157,7 +155,7 @@ AtaAhciPeimEntry (
&gEdkiiPeiAtaAhciHostControllerPpiGuid,
0,
NULL,
- (VOID **) &AhciHcPpi
+ (VOID **)&AhciHcPpi
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Failed to locate AtaAhciHostControllerPpi.\n", __FUNCTION__));
@@ -187,8 +185,10 @@ AtaAhciPeimEntry (
);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate get the device path for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate get the device path for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return Status;
}
@@ -199,8 +199,10 @@ AtaAhciPeimEntry (
Status = AhciIsHcDevicePathValid (DevicePath, DevicePathLength);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: The device path is invalid for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: The device path is invalid for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
continue;
@@ -231,8 +233,10 @@ AtaAhciPeimEntry (
Private = AllocateZeroPool (sizeof (PEI_AHCI_CONTROLLER_PRIVATE_DATA));
if (Private == NULL) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate private data for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate private data for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return EFI_OUT_OF_RESOURCES;
}
@@ -260,8 +264,8 @@ AtaAhciPeimEntry (
continue;
}
- Private->AtaPassThruMode.Attributes = EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL |
- EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL;
+ Private->AtaPassThruMode.Attributes = EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL |
+ EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL;
Private->AtaPassThruMode.IoAlign = sizeof (UINTN);
Private->AtaPassThruPpi.Revision = EDKII_PEI_ATA_PASS_THRU_PPI_REVISION;
Private->AtaPassThruPpi.Mode = &Private->AtaPassThruMode;
@@ -274,18 +278,18 @@ AtaAhciPeimEntry (
&mAhciAtaPassThruPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->AtaPassThruPpiList.Ppi = &Private->AtaPassThruPpi;
+ Private->AtaPassThruPpiList.Ppi = &Private->AtaPassThruPpi;
PeiServicesInstallPpi (&Private->AtaPassThruPpiList);
- Private->BlkIoPpi.GetNumberOfBlockDevices = AhciBlockIoGetDeviceNo;
- Private->BlkIoPpi.GetBlockDeviceMediaInfo = AhciBlockIoGetMediaInfo;
- Private->BlkIoPpi.ReadBlocks = AhciBlockIoReadBlocks;
+ Private->BlkIoPpi.GetNumberOfBlockDevices = AhciBlockIoGetDeviceNo;
+ Private->BlkIoPpi.GetBlockDeviceMediaInfo = AhciBlockIoGetMediaInfo;
+ Private->BlkIoPpi.ReadBlocks = AhciBlockIoReadBlocks;
CopyMem (
&Private->BlkIoPpiList,
&mAhciBlkIoPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
+ Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
PeiServicesInstallPpi (&Private->BlkIoPpiList);
Private->BlkIo2Ppi.Revision = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;
@@ -297,14 +301,15 @@ AtaAhciPeimEntry (
&mAhciBlkIo2PpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
+ Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
PeiServicesInstallPpi (&Private->BlkIo2PpiList);
if (Private->TrustComputingDevices != 0) {
DEBUG ((
DEBUG_INFO,
"%a: Security Security Command PPI will be produced for Controller %d.\n",
- __FUNCTION__, Controller
+ __FUNCTION__,
+ Controller
));
Private->StorageSecurityPpi.Revision = EDKII_STORAGE_SECURITY_PPI_REVISION;
Private->StorageSecurityPpi.GetNumberofDevices = AhciStorageSecurityGetDeviceNo;
@@ -316,7 +321,7 @@ AtaAhciPeimEntry (
&mAhciStorageSecurityPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
+ Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
PeiServicesInstallPpi (&Private->StorageSecurityPpiList);
}
@@ -325,11 +330,13 @@ AtaAhciPeimEntry (
&mAhciEndOfPeiNotifyListTemplate,
sizeof (EFI_PEI_NOTIFY_DESCRIPTOR)
);
- PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
+ PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
DEBUG ((
- DEBUG_INFO, "%a: Controller %d has been successfully initialized.\n",
- __FUNCTION__, Controller
+ DEBUG_INFO,
+ "%a: Controller %d has been successfully initialized.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
}
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.h b/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.h
index 2be78076be..43ad4639bd 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.h
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPei.h
@@ -33,7 +33,7 @@
//
// Structure forward declarations
//
-typedef struct _PEI_AHCI_CONTROLLER_PRIVATE_DATA PEI_AHCI_CONTROLLER_PRIVATE_DATA;
+typedef struct _PEI_AHCI_CONTROLLER_PRIVATE_DATA PEI_AHCI_CONTROLLER_PRIVATE_DATA;
#include "AhciPeiPassThru.h"
#include "AhciPeiBlockIo.h"
@@ -46,107 +46,107 @@ typedef struct _PEI_AHCI_CONTROLLER_PRIVATE_DATA PEI_AHCI_CONTROLLER_PRIVATE_DA
// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
// The value is in millisecond units. Add a bit of margin for robustness.
//
-#define AHCI_BUS_PHY_DETECT_TIMEOUT 15
+#define AHCI_BUS_PHY_DETECT_TIMEOUT 15
//
// Refer SATA1.0a spec, the bus reset time should be less than 1s.
// The value is in 100ns units.
//
-#define AHCI_PEI_RESET_TIMEOUT 10000000
+#define AHCI_PEI_RESET_TIMEOUT 10000000
//
// Time out Value for ATA pass through protocol, in 100ns units.
//
-#define ATA_TIMEOUT 30000000
+#define ATA_TIMEOUT 30000000
//
// Maximal number of Physical Region Descriptor Table entries supported.
//
-#define AHCI_MAX_PRDT_NUMBER 8
+#define AHCI_MAX_PRDT_NUMBER 8
-#define AHCI_CAPABILITY_OFFSET 0x0000
-#define AHCI_CAP_SAM BIT18
-#define AHCI_CAP_SSS BIT27
+#define AHCI_CAPABILITY_OFFSET 0x0000
+#define AHCI_CAP_SAM BIT18
+#define AHCI_CAP_SSS BIT27
-#define AHCI_GHC_OFFSET 0x0004
-#define AHCI_GHC_RESET BIT0
-#define AHCI_GHC_ENABLE BIT31
+#define AHCI_GHC_OFFSET 0x0004
+#define AHCI_GHC_RESET BIT0
+#define AHCI_GHC_ENABLE BIT31
-#define AHCI_IS_OFFSET 0x0008
-#define AHCI_PI_OFFSET 0x000C
+#define AHCI_IS_OFFSET 0x0008
+#define AHCI_PI_OFFSET 0x000C
-#define AHCI_MAX_PORTS 32
+#define AHCI_MAX_PORTS 32
typedef struct {
- UINT32 Lower32;
- UINT32 Upper32;
+ UINT32 Lower32;
+ UINT32 Upper32;
} DATA_32;
typedef union {
- DATA_32 Uint32;
- UINT64 Uint64;
+ DATA_32 Uint32;
+ UINT64 Uint64;
} DATA_64;
-#define AHCI_ATAPI_SIG_MASK 0xFFFF0000
-#define AHCI_ATA_DEVICE_SIG 0x00000000
+#define AHCI_ATAPI_SIG_MASK 0xFFFF0000
+#define AHCI_ATA_DEVICE_SIG 0x00000000
//
// Each PRDT entry can point to a memory block up to 4M byte
//
-#define AHCI_MAX_DATA_PER_PRDT 0x400000
+#define AHCI_MAX_DATA_PER_PRDT 0x400000
-#define AHCI_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device
-#define AHCI_FIS_REGISTER_H2D_LENGTH 20
-#define AHCI_FIS_REGISTER_D2H 0x34 //Register FIS - Device to Host
-#define AHCI_FIS_PIO_SETUP 0x5F //PIO Setup FIS - Device to Host
+#define AHCI_FIS_REGISTER_H2D 0x27 // Register FIS - Host to Device
+#define AHCI_FIS_REGISTER_H2D_LENGTH 20
+#define AHCI_FIS_REGISTER_D2H 0x34 // Register FIS - Device to Host
+#define AHCI_FIS_PIO_SETUP 0x5F // PIO Setup FIS - Device to Host
-#define AHCI_D2H_FIS_OFFSET 0x40
-#define AHCI_PIO_FIS_OFFSET 0x20
-#define AHCI_FIS_TYPE_MASK 0xFF
+#define AHCI_D2H_FIS_OFFSET 0x40
+#define AHCI_PIO_FIS_OFFSET 0x20
+#define AHCI_FIS_TYPE_MASK 0xFF
//
// Port register
//
-#define AHCI_PORT_START 0x0100
-#define AHCI_PORT_REG_WIDTH 0x0080
-#define AHCI_PORT_CLB 0x0000
-#define AHCI_PORT_CLBU 0x0004
-#define AHCI_PORT_FB 0x0008
-#define AHCI_PORT_FBU 0x000C
-#define AHCI_PORT_IS 0x0010
-#define AHCI_PORT_IE 0x0014
-#define AHCI_PORT_CMD 0x0018
-#define AHCI_PORT_CMD_ST BIT0
-#define AHCI_PORT_CMD_SUD BIT1
-#define AHCI_PORT_CMD_POD BIT2
-#define AHCI_PORT_CMD_CLO BIT3
-#define AHCI_PORT_CMD_FRE BIT4
-#define AHCI_PORT_CMD_FR BIT14
-#define AHCI_PORT_CMD_CR BIT15
-#define AHCI_PORT_CMD_CPD BIT20
-#define AHCI_PORT_CMD_ATAPI BIT24
-#define AHCI_PORT_CMD_DLAE BIT25
-#define AHCI_PORT_CMD_ALPE BIT26
-#define AHCI_PORT_CMD_ACTIVE (1 << 28)
-#define AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
-
-#define AHCI_PORT_TFD 0x0020
-#define AHCI_PORT_TFD_ERR BIT0
-#define AHCI_PORT_TFD_DRQ BIT3
-#define AHCI_PORT_TFD_BSY BIT7
-#define AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
-
-#define AHCI_PORT_SIG 0x0024
-#define AHCI_PORT_SSTS 0x0028
-#define AHCI_PORT_SSTS_DET_MASK 0x000F
-#define AHCI_PORT_SSTS_DET 0x0001
-#define AHCI_PORT_SSTS_DET_PCE 0x0003
-
-#define AHCI_PORT_SCTL 0x002C
-#define AHCI_PORT_SCTL_IPM_INIT 0x0300
-
-#define AHCI_PORT_SERR 0x0030
-#define AHCI_PORT_CI 0x0038
-
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
-#define TIMER_PERIOD_SECONDS(Seconds) MultU64x32((UINT64)(Seconds), 10000000)
+#define AHCI_PORT_START 0x0100
+#define AHCI_PORT_REG_WIDTH 0x0080
+#define AHCI_PORT_CLB 0x0000
+#define AHCI_PORT_CLBU 0x0004
+#define AHCI_PORT_FB 0x0008
+#define AHCI_PORT_FBU 0x000C
+#define AHCI_PORT_IS 0x0010
+#define AHCI_PORT_IE 0x0014
+#define AHCI_PORT_CMD 0x0018
+#define AHCI_PORT_CMD_ST BIT0
+#define AHCI_PORT_CMD_SUD BIT1
+#define AHCI_PORT_CMD_POD BIT2
+#define AHCI_PORT_CMD_CLO BIT3
+#define AHCI_PORT_CMD_FRE BIT4
+#define AHCI_PORT_CMD_FR BIT14
+#define AHCI_PORT_CMD_CR BIT15
+#define AHCI_PORT_CMD_CPD BIT20
+#define AHCI_PORT_CMD_ATAPI BIT24
+#define AHCI_PORT_CMD_DLAE BIT25
+#define AHCI_PORT_CMD_ALPE BIT26
+#define AHCI_PORT_CMD_ACTIVE (1 << 28)
+#define AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
+
+#define AHCI_PORT_TFD 0x0020
+#define AHCI_PORT_TFD_ERR BIT0
+#define AHCI_PORT_TFD_DRQ BIT3
+#define AHCI_PORT_TFD_BSY BIT7
+#define AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
+
+#define AHCI_PORT_SIG 0x0024
+#define AHCI_PORT_SSTS 0x0028
+#define AHCI_PORT_SSTS_DET_MASK 0x000F
+#define AHCI_PORT_SSTS_DET 0x0001
+#define AHCI_PORT_SSTS_DET_PCE 0x0003
+
+#define AHCI_PORT_SCTL 0x002C
+#define AHCI_PORT_SCTL_IPM_INIT 0x0300
+
+#define AHCI_PORT_SERR 0x0030
+#define AHCI_PORT_CI 0x0038
+
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define TIMER_PERIOD_SECONDS(Seconds) MultU64x32((UINT64)(Seconds), 10000000)
#pragma pack(1)
@@ -170,19 +170,19 @@ typedef struct {
// The entry Data structure is listed at the following.
//
typedef struct {
- UINT32 AhciCmdCfl:5; //Command FIS Length
- UINT32 AhciCmdA:1; //ATAPI
- UINT32 AhciCmdW:1; //Write
- UINT32 AhciCmdP:1; //Prefetchable
- UINT32 AhciCmdR:1; //Reset
- UINT32 AhciCmdB:1; //BIST
- UINT32 AhciCmdC:1; //Clear Busy upon R_OK
- UINT32 AhciCmdRsvd:1;
- UINT32 AhciCmdPmp:4; //Port Multiplier Port
- UINT32 AhciCmdPrdtl:16; //Physical Region Descriptor Table Length
- UINT32 AhciCmdPrdbc; //Physical Region Descriptor Byte Count
- UINT32 AhciCmdCtba; //Command Table Descriptor Base Address
- UINT32 AhciCmdCtbau; //Command Table Descriptor Base Address Upper 32-BITs
+ UINT32 AhciCmdCfl : 5; // Command FIS Length
+ UINT32 AhciCmdA : 1; // ATAPI
+ UINT32 AhciCmdW : 1; // Write
+ UINT32 AhciCmdP : 1; // Prefetchable
+ UINT32 AhciCmdR : 1; // Reset
+ UINT32 AhciCmdB : 1; // BIST
+ UINT32 AhciCmdC : 1; // Clear Busy upon R_OK
+ UINT32 AhciCmdRsvd : 1;
+ UINT32 AhciCmdPmp : 4; // Port Multiplier Port
+ UINT32 AhciCmdPrdtl : 16; // Physical Region Descriptor Table Length
+ UINT32 AhciCmdPrdbc; // Physical Region Descriptor Byte Count
+ UINT32 AhciCmdCtba; // Command Table Descriptor Base Address
+ UINT32 AhciCmdCtbau; // Command Table Descriptor Base Address Upper 32-BITs
UINT32 AhciCmdRsvd1[4];
} EFI_AHCI_COMMAND_LIST;
@@ -192,28 +192,28 @@ typedef struct {
// specified in the Serial ATA Revision 2.6 specification.
//
typedef struct {
- UINT8 AhciCFisType;
- UINT8 AhciCFisPmNum:4;
- UINT8 AhciCFisRsvd:1;
- UINT8 AhciCFisRsvd1:1;
- UINT8 AhciCFisRsvd2:1;
- UINT8 AhciCFisCmdInd:1;
- UINT8 AhciCFisCmd;
- UINT8 AhciCFisFeature;
- UINT8 AhciCFisSecNum;
- UINT8 AhciCFisClyLow;
- UINT8 AhciCFisClyHigh;
- UINT8 AhciCFisDevHead;
- UINT8 AhciCFisSecNumExp;
- UINT8 AhciCFisClyLowExp;
- UINT8 AhciCFisClyHighExp;
- UINT8 AhciCFisFeatureExp;
- UINT8 AhciCFisSecCount;
- UINT8 AhciCFisSecCountExp;
- UINT8 AhciCFisRsvd3;
- UINT8 AhciCFisControl;
- UINT8 AhciCFisRsvd4[4];
- UINT8 AhciCFisRsvd5[44];
+ UINT8 AhciCFisType;
+ UINT8 AhciCFisPmNum : 4;
+ UINT8 AhciCFisRsvd : 1;
+ UINT8 AhciCFisRsvd1 : 1;
+ UINT8 AhciCFisRsvd2 : 1;
+ UINT8 AhciCFisCmdInd : 1;
+ UINT8 AhciCFisCmd;
+ UINT8 AhciCFisFeature;
+ UINT8 AhciCFisSecNum;
+ UINT8 AhciCFisClyLow;
+ UINT8 AhciCFisClyHigh;
+ UINT8 AhciCFisDevHead;
+ UINT8 AhciCFisSecNumExp;
+ UINT8 AhciCFisClyLowExp;
+ UINT8 AhciCFisClyHighExp;
+ UINT8 AhciCFisFeatureExp;
+ UINT8 AhciCFisSecCount;
+ UINT8 AhciCFisSecCountExp;
+ UINT8 AhciCFisRsvd3;
+ UINT8 AhciCFisControl;
+ UINT8 AhciCFisRsvd4[4];
+ UINT8 AhciCFisRsvd5[44];
} EFI_AHCI_COMMAND_FIS;
//
@@ -230,12 +230,12 @@ typedef struct {
// list entry for this command slot.
//
typedef struct {
- UINT32 AhciPrdtDba; //Data Base Address
- UINT32 AhciPrdtDbau; //Data Base Address Upper 32-BITs
+ UINT32 AhciPrdtDba; // Data Base Address
+ UINT32 AhciPrdtDbau; // Data Base Address Upper 32-BITs
UINT32 AhciPrdtRsvd;
- UINT32 AhciPrdtDbc:22; //Data Byte Count
- UINT32 AhciPrdtRsvd1:9;
- UINT32 AhciPrdtIoc:1; //Interrupt on Completion
+ UINT32 AhciPrdtDbc : 22; // Data Byte Count
+ UINT32 AhciPrdtRsvd1 : 9;
+ UINT32 AhciPrdtIoc : 1; // Interrupt on Completion
} EFI_AHCI_COMMAND_PRDT;
//
@@ -268,7 +268,7 @@ typedef struct {
//
// Unique signature for AHCI ATA device information structure.
//
-#define AHCI_PEI_ATA_DEVICE_DATA_SIGNATURE SIGNATURE_32 ('A', 'P', 'A', 'D')
+#define AHCI_PEI_ATA_DEVICE_DATA_SIGNATURE SIGNATURE_32 ('A', 'P', 'A', 'D')
//
// AHCI mode device information structure.
@@ -301,7 +301,7 @@ typedef struct {
//
// Unique signature for private data structure.
//
-#define AHCI_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('A','P','C','P')
+#define AHCI_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('A','P','C','P')
//
// ATA AHCI controller private data structure.
@@ -348,7 +348,7 @@ struct _PEI_AHCI_CONTROLLER_PRIVATE_DATA {
//
// Global variables
//
-extern UINT32 mMaxTransferBlockNumber[2];
+extern UINT32 mMaxTransferBlockNumber[2];
//
// Internal functions
@@ -394,9 +394,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
@@ -420,11 +420,11 @@ IoMmuFreeBuffer (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -438,7 +438,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -470,7 +470,7 @@ AhciPeimEndOfPei (
**/
UINT8
AhciGetNumberOfPortsFromMap (
- IN UINT32 PortBitMap
+ IN UINT32 PortBitMap
);
/**
@@ -497,16 +497,16 @@ AhciGetNumberOfPortsFromMap (
**/
EFI_STATUS
AhciPioTransfer (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout
);
/**
@@ -529,13 +529,13 @@ AhciPioTransfer (
**/
EFI_STATUS
AhciNonDataTransfer (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT8 FisIndex,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT8 FisIndex,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout
);
/**
@@ -554,7 +554,7 @@ AhciNonDataTransfer (
**/
EFI_STATUS
AhciModeInitialization (
- IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
+ IN OUT PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private
);
/**
@@ -576,11 +576,11 @@ AhciModeInitialization (
**/
EFI_STATUS
TransferAtaDevice (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- IN OUT VOID *Buffer,
- IN EFI_LBA StartLba,
- IN UINT32 TransferLength,
- IN BOOLEAN IsWrite
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ IN OUT VOID *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINT32 TransferLength,
+ IN BOOLEAN IsWrite
);
/**
@@ -621,14 +621,14 @@ TransferAtaDevice (
**/
EFI_STATUS
TrustTransferAtaDevice (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
);
/**
@@ -662,9 +662,9 @@ NextDevicePathNode (
**/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
);
/**
@@ -680,8 +680,8 @@ GetDevicePathInstanceSize (
**/
EFI_STATUS
AhciIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
);
/**
@@ -702,11 +702,11 @@ AhciIsHcDevicePathValid (
**/
EFI_STATUS
AhciBuildDevicePath (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -723,9 +723,9 @@ AhciBuildDevicePath (
**/
UINT8
AhciS3GetEumeratePorts (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength,
- OUT UINT32 *PortBitMap
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength,
+ OUT UINT32 *PortBitMap
);
#endif
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.c
index e7c7a39539..c5d1f3fffb 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.c
@@ -23,12 +23,12 @@
**/
PEI_AHCI_ATA_DEVICE_DATA *
SearchDeviceByIndex (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINTN DeviceIndex
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINTN DeviceIndex
)
{
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- LIST_ENTRY *Node;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ LIST_ENTRY *Node;
if ((DeviceIndex == 0) || (DeviceIndex > Private->ActiveDevices)) {
return NULL;
@@ -66,26 +66,26 @@ SearchDeviceByIndex (
**/
EFI_STATUS
AccessAtaDevice (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- IN OUT UINT8 *Buffer,
- IN EFI_LBA StartLba,
- IN UINTN NumberOfBlocks
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ IN OUT UINT8 *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINTN NumberOfBlocks
)
{
- EFI_STATUS Status;
- UINTN MaxTransferBlockNumber;
- UINTN TransferBlockNumber;
- UINTN BlockSize;
+ EFI_STATUS Status;
+ UINTN MaxTransferBlockNumber;
+ UINTN TransferBlockNumber;
+ UINTN BlockSize;
//
// Ensure Lba48Bit is a valid boolean value
//
- ASSERT ((UINTN) DeviceData->Lba48Bit < 2);
- if ((UINTN) DeviceData->Lba48Bit >= 2) {
+ ASSERT ((UINTN)DeviceData->Lba48Bit < 2);
+ if ((UINTN)DeviceData->Lba48Bit >= 2) {
return EFI_INVALID_PARAMETER;
}
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
MaxTransferBlockNumber = mMaxTransferBlockNumber[DeviceData->Lba48Bit];
BlockSize = DeviceData->Media.BlockSize;
@@ -93,20 +93,24 @@ AccessAtaDevice (
if (NumberOfBlocks > MaxTransferBlockNumber) {
TransferBlockNumber = MaxTransferBlockNumber;
NumberOfBlocks -= MaxTransferBlockNumber;
- } else {
+ } else {
TransferBlockNumber = NumberOfBlocks;
NumberOfBlocks = 0;
}
+
DEBUG ((
- DEBUG_BLKIO, "%a: Blocking AccessAtaDevice, TransferBlockNumber = %x; StartLba = %x\n",
- __FUNCTION__, TransferBlockNumber, StartLba
+ DEBUG_BLKIO,
+ "%a: Blocking AccessAtaDevice, TransferBlockNumber = %x; StartLba = %x\n",
+ __FUNCTION__,
+ TransferBlockNumber,
+ StartLba
));
Status = TransferAtaDevice (
DeviceData,
Buffer,
StartLba,
- (UINT32) TransferBlockNumber,
+ (UINT32)TransferBlockNumber,
FALSE // Read
);
if (EFI_ERROR (Status)) {
@@ -134,15 +138,15 @@ AccessAtaDevice (
**/
EFI_STATUS
AhciRead (
- IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
- OUT VOID *Buffer,
- IN EFI_LBA StartLba,
- IN UINTN BufferSize
+ IN PEI_AHCI_ATA_DEVICE_DATA *DeviceData,
+ OUT VOID *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINTN BufferSize
)
{
- EFI_STATUS Status;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
+ EFI_STATUS Status;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
//
// Check parameters.
@@ -163,7 +167,8 @@ AhciRead (
if (StartLba > DeviceData->Media.LastBlock) {
return EFI_INVALID_PARAMETER;
}
- NumberOfBlocks = BufferSize / BlockSize;
+
+ NumberOfBlocks = BufferSize / BlockSize;
if (NumberOfBlocks - 1 > DeviceData->Media.LastBlock - StartLba) {
return EFI_INVALID_PARAMETER;
}
@@ -176,7 +181,6 @@ AhciRead (
return Status;
}
-
/**
Gets the count of block I/O devices that one specific block driver detects.
@@ -201,13 +205,13 @@ AhciBlockIoGetDeviceNo (
OUT UINTN *NumberBlockDevices
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
+ Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
*NumberBlockDevices = Private->ActiveDevices;
return EFI_SUCCESS;
@@ -263,10 +267,10 @@ AhciBlockIoGetMediaInfo (
OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -276,9 +280,9 @@ AhciBlockIoGetMediaInfo (
return EFI_NOT_FOUND;
}
- MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE) EDKII_PEI_BLOCK_DEVICE_TYPE_ATA_HARD_DISK;
+ MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE)EDKII_PEI_BLOCK_DEVICE_TYPE_ATA_HARD_DISK;
MediaInfo->MediaPresent = TRUE;
- MediaInfo->LastBlock = (UINTN) DeviceData->Media.LastBlock;
+ MediaInfo->LastBlock = (UINTN)DeviceData->Media.LastBlock;
MediaInfo->BlockSize = DeviceData->Media.BlockSize;
return EFI_SUCCESS;
@@ -329,8 +333,8 @@ AhciBlockIoReadBlocks (
OUT VOID *Buffer
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
@@ -369,13 +373,13 @@ AhciBlockIoGetDeviceNo2 (
OUT UINTN *NumberBlockDevices
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
+ Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
*NumberBlockDevices = Private->ActiveDevices;
return EFI_SUCCESS;
@@ -431,10 +435,10 @@ AhciBlockIoGetMediaInfo2 (
OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -498,7 +502,7 @@ AhciBlockIoReadBlocks2 (
OUT VOID *Buffer
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.h b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.h
index 5896ae5acf..451a7cc936 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.h
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiBlockIo.h
@@ -14,7 +14,7 @@
//
// ATA hard disk device for EFI_PEI_BLOCK_DEVICE_TYPE
//
-#define EDKII_PEI_BLOCK_DEVICE_TYPE_ATA_HARD_DISK 8
+#define EDKII_PEI_BLOCK_DEVICE_TYPE_ATA_HARD_DISK 8
/**
Gets the count of block I/O devices that one specific block driver detects.
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.c
index 191b78c885..d5ed93dc4f 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.c
@@ -25,20 +25,21 @@
**/
PEI_AHCI_ATA_DEVICE_DATA *
SearchDeviceByPort (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort
)
{
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- LIST_ENTRY *Node;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ LIST_ENTRY *Node;
Node = GetFirstNode (&Private->DeviceList);
while (!IsNull (&Private->DeviceList, Node)) {
DeviceData = AHCI_PEI_ATA_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceData->Port == Port) &&
- (DeviceData->PortMultiplier == PortMultiplierPort)) {
+ (DeviceData->PortMultiplier == PortMultiplierPort))
+ {
return DeviceData;
}
@@ -82,21 +83,21 @@ SearchDeviceByPort (
**/
EFI_STATUS
AhciPassThruExecute (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN UINT8 FisIndex,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN UINT8 FisIndex,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
switch (Packet->Protocol) {
case EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA:
Status = AhciNonDataTransfer (
Private,
- (UINT8) Port,
- (UINT8) PortMultiplierPort,
+ (UINT8)Port,
+ (UINT8)PortMultiplierPort,
FisIndex,
Packet->Acb,
Packet->Asb,
@@ -106,8 +107,8 @@ AhciPassThruExecute (
case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN:
Status = AhciPioTransfer (
Private,
- (UINT8) Port,
- (UINT8) PortMultiplierPort,
+ (UINT8)Port,
+ (UINT8)PortMultiplierPort,
FisIndex,
TRUE,
Packet->Acb,
@@ -120,8 +121,8 @@ AhciPassThruExecute (
case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_OUT:
Status = AhciPioTransfer (
Private,
- (UINT8) Port,
- (UINT8) PortMultiplierPort,
+ (UINT8)Port,
+ (UINT8)PortMultiplierPort,
FisIndex,
FALSE,
Packet->Acb,
@@ -176,19 +177,19 @@ AhciPassThruExecute (
EFI_STATUS
EFIAPI
AhciAtaPassThruPassThru (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
)
{
- UINT32 IoAlign;
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- UINT32 MaxSectorCount;
- UINT32 BlockSize;
+ UINT32 IoAlign;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ UINT32 MaxSectorCount;
+ UINT32 BlockSize;
- if (This == NULL || Packet == NULL) {
+ if ((This == NULL) || (Packet == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -205,7 +206,7 @@ AhciAtaPassThruPassThru (
return EFI_INVALID_PARAMETER;
}
- Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_PASS_THRU (This);
+ Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_PASS_THRU (This);
DeviceData = SearchDeviceByPort (Private, Port, PortMultiplierPort);
if (DeviceData == NULL) {
return EFI_NOT_FOUND;
@@ -218,7 +219,8 @@ AhciAtaPassThruPassThru (
// Convert the transfer length from sector count to byte.
//
if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) &&
- (Packet->InTransferLength != 0)) {
+ (Packet->InTransferLength != 0))
+ {
Packet->InTransferLength = Packet->InTransferLength * BlockSize;
}
@@ -226,7 +228,8 @@ AhciAtaPassThruPassThru (
// Convert the transfer length from sector count to byte.
//
if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) &&
- (Packet->OutTransferLength != 0)) {
+ (Packet->OutTransferLength != 0))
+ {
Packet->OutTransferLength = Packet->OutTransferLength * BlockSize;
}
@@ -236,7 +239,8 @@ AhciAtaPassThruPassThru (
// command, then no data is transferred and EFI_BAD_BUFFER_SIZE is returned.
//
if (((Packet->InTransferLength != 0) && (Packet->InTransferLength > MaxSectorCount * BlockSize)) ||
- ((Packet->OutTransferLength != 0) && (Packet->OutTransferLength > MaxSectorCount * BlockSize))) {
+ ((Packet->OutTransferLength != 0) && (Packet->OutTransferLength > MaxSectorCount * BlockSize)))
+ {
return EFI_BAD_BUFFER_SIZE;
}
@@ -284,15 +288,15 @@ AhciAtaPassThruPassThru (
EFI_STATUS
EFIAPI
AhciAtaPassThruGetNextPort (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN OUT UINT16 *Port
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN OUT UINT16 *Port
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- LIST_ENTRY *Node;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ LIST_ENTRY *Node;
- if (This == NULL || Port == NULL) {
+ if ((This == NULL) || (Port == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -318,7 +322,7 @@ AhciAtaPassThruGetNextPort (
while (!IsNull (&Private->DeviceList, Node)) {
DeviceData = AHCI_PEI_ATA_DEVICE_INFO_FROM_THIS (Node);
- if (DeviceData->Port > *Port){
+ if (DeviceData->Port > *Port) {
*Port = DeviceData->Port;
goto Exit;
}
@@ -393,16 +397,16 @@ Exit:
EFI_STATUS
EFIAPI
AhciAtaPassThruGetNextDevice (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN UINT16 Port,
- IN OUT UINT16 *PortMultiplierPort
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN OUT UINT16 *PortMultiplierPort
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- LIST_ENTRY *Node;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ LIST_ENTRY *Node;
- if (This == NULL || PortMultiplierPort == NULL) {
+ if ((This == NULL) || (PortMultiplierPort == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -425,7 +429,8 @@ AhciAtaPassThruGetNextDevice (
DeviceData = AHCI_PEI_ATA_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceData->Port == Port) &&
- (DeviceData->PortMultiplier > *PortMultiplierPort)){
+ (DeviceData->PortMultiplier > *PortMultiplierPort))
+ {
*PortMultiplierPort = DeviceData->PortMultiplier;
goto Exit;
}
@@ -444,7 +449,7 @@ AhciAtaPassThruGetNextDevice (
while (!IsNull (&Private->DeviceList, Node)) {
DeviceData = AHCI_PEI_ATA_DEVICE_INFO_FROM_THIS (Node);
- if (DeviceData->Port == Port){
+ if (DeviceData->Port == Port) {
*PortMultiplierPort = DeviceData->PortMultiplier;
goto Exit;
}
@@ -490,14 +495,14 @@ Exit:
EFI_STATUS
EFIAPI
AhciAtaPassThruGetDevicePath (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.h b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.h
index 94395aade4..de61916ba2 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.h
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiPassThru.h
@@ -49,10 +49,10 @@
EFI_STATUS
EFIAPI
AhciAtaPassThruPassThru (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet
);
/**
@@ -90,8 +90,8 @@ AhciAtaPassThruPassThru (
EFI_STATUS
EFIAPI
AhciAtaPassThruGetNextPort (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN OUT UINT16 *Port
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN OUT UINT16 *Port
);
/**
@@ -144,9 +144,9 @@ AhciAtaPassThruGetNextPort (
EFI_STATUS
EFIAPI
AhciAtaPassThruGetNextDevice (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- IN UINT16 Port,
- IN OUT UINT16 *PortMultiplierPort
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ IN UINT16 Port,
+ IN OUT UINT16 *PortMultiplierPort
);
/**
@@ -169,9 +169,9 @@ AhciAtaPassThruGetNextDevice (
EFI_STATUS
EFIAPI
AhciAtaPassThruGetDevicePath (
- IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_ATA_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
#endif
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiS3.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiS3.c
index bf0489fa6b..42e4203a22 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiS3.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiS3.c
@@ -28,19 +28,19 @@
**/
UINT8
AhciS3GetEumeratePorts (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength,
- OUT UINT32 *PortBitMap
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength,
+ OUT UINT32 *PortBitMap
)
{
- EFI_STATUS Status;
- UINT8 DummyData;
- UINTN S3InitDevicesLength;
- EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
- UINTN DevicePathInstLength;
- BOOLEAN EntireEnd;
- SATA_DEVICE_PATH *SataDeviceNode;
+ EFI_STATUS Status;
+ UINT8 DummyData;
+ UINTN S3InitDevicesLength;
+ EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ UINTN DevicePathInstLength;
+ BOOLEAN EntireEnd;
+ SATA_DEVICE_PATH *SataDeviceNode;
*PortBitMap = 0;
@@ -51,7 +51,7 @@ AhciS3GetEumeratePorts (
S3InitDevices = NULL;
S3InitDevicesLength = sizeof (DummyData);
EntireEnd = FALSE;
- Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
+ Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
if (Status != EFI_BUFFER_TOO_SMALL) {
return 0;
} else {
@@ -87,7 +87,7 @@ AhciS3GetEumeratePorts (
}
DevicePathInst = S3InitDevices;
- S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN) S3InitDevices + DevicePathInstLength);
+ S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN)S3InitDevices + DevicePathInstLength);
if (HcDevicePathLength >= DevicePathInstLength) {
continue;
@@ -101,25 +101,30 @@ AhciS3GetEumeratePorts (
DevicePathInst,
HcDevicePath,
HcDevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)
- ) == 0) {
+ ) == 0)
+ {
//
// Get the port number.
//
while (DevicePathInst->Type != END_DEVICE_PATH_TYPE) {
if ((DevicePathInst->Type == MESSAGING_DEVICE_PATH) &&
- (DevicePathInst->SubType == MSG_SATA_DP)) {
- SataDeviceNode = (SATA_DEVICE_PATH *) DevicePathInst;
+ (DevicePathInst->SubType == MSG_SATA_DP))
+ {
+ SataDeviceNode = (SATA_DEVICE_PATH *)DevicePathInst;
//
// For now, the driver only support upto AHCI_MAX_PORTS ports and
// devices directly connected to a HBA.
//
if ((SataDeviceNode->HBAPortNumber >= AHCI_MAX_PORTS) ||
- (SataDeviceNode->PortMultiplierPortNumber != 0xFFFF)) {
+ (SataDeviceNode->PortMultiplierPortNumber != 0xFFFF))
+ {
break;
}
+
*PortBitMap |= (UINT32)BIT0 << SataDeviceNode->HBAPortNumber;
break;
}
+
DevicePathInst = NextDevicePathNode (DevicePathInst);
}
}
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.c
index 1bc25a7888..40e042082c 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.c
@@ -24,12 +24,12 @@
**/
PEI_AHCI_ATA_DEVICE_DATA *
SearchTrustComputingDeviceByIndex (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINTN TrustComputingDeviceIndex
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINTN TrustComputingDeviceIndex
)
{
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- LIST_ENTRY *Node;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ LIST_ENTRY *Node;
Node = GetFirstNode (&Private->DeviceList);
while (!IsNull (&Private->DeviceList, Node)) {
@@ -58,17 +58,17 @@ SearchTrustComputingDeviceByIndex (
EFI_STATUS
EFIAPI
AhciStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberofDevices == NULL) {
+ if ((This == NULL) || (NumberofDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
+ Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
*NumberofDevices = Private->TrustComputingDevices;
return EFI_SUCCESS;
@@ -102,17 +102,17 @@ AhciStorageSecurityGetDeviceNo (
EFI_STATUS
EFIAPI
AhciStorageSecurityGetDevicePath (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- IN UINTN DeviceIndex,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
- EFI_STATUS Status;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ EFI_STATUS Status;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -229,18 +229,18 @@ AhciStorageSecurityGetDevicePath (
EFI_STATUS
EFIAPI
AhciStorageSecurityReceiveData (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- IN UINTN DeviceIndex,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
if ((PayloadBuffer == NULL) || (PayloadTransferSize == NULL) || (PayloadBufferSize == 0)) {
return EFI_INVALID_PARAMETER;
@@ -349,8 +349,8 @@ AhciStorageSecuritySendData (
IN VOID *PayloadBuffer
)
{
- PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
- PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
+ PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_AHCI_ATA_DEVICE_DATA *DeviceData;
if ((PayloadBuffer == NULL) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.h b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.h
index 905cdb88a7..a13533ea57 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.h
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciPeiStorageSecurity.h
@@ -24,8 +24,8 @@
EFI_STATUS
EFIAPI
AhciStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
);
/**
@@ -56,10 +56,10 @@ AhciStorageSecurityGetDeviceNo (
EFI_STATUS
EFIAPI
AhciStorageSecurityGetDevicePath (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- IN UINTN DeviceIndex,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -151,14 +151,14 @@ AhciStorageSecurityGetDevicePath (
EFI_STATUS
EFIAPI
AhciStorageSecurityReceiveData (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- IN UINTN DeviceIndex,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ IN UINTN DeviceIndex,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
);
/**
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/DevicePath.c b/MdeModulePkg/Bus/Ata/AhciPei/DevicePath.c
index 65d6fcb32a..81f8743d40 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/DevicePath.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/DevicePath.c
@@ -17,8 +17,8 @@ SATA_DEVICE_PATH mAhciSataDevicePathNodeTemplate = {
MESSAGING_DEVICE_PATH,
MSG_SATA_DP,
{
- (UINT8) (sizeof (SATA_DEVICE_PATH)),
- (UINT8) ((sizeof (SATA_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (SATA_DEVICE_PATH)),
+ (UINT8)((sizeof (SATA_DEVICE_PATH)) >> 8)
}
},
0x0, // HBAPortNumber
@@ -33,8 +33,8 @@ EFI_DEVICE_PATH_PROTOCOL mAhciEndDevicePathNodeTemplate = {
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
- (UINT8) (sizeof (EFI_DEVICE_PATH_PROTOCOL)),
- (UINT8) ((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
+ (UINT8)(sizeof (EFI_DEVICE_PATH_PROTOCOL)),
+ (UINT8)((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
}
};
@@ -79,7 +79,7 @@ NextDevicePathNode (
)
{
ASSERT (Node != NULL);
- return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength(Node));
+ return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength (Node));
}
/**
@@ -97,14 +97,14 @@ NextDevicePathNode (
**/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
)
{
- EFI_DEVICE_PATH_PROTOCOL *Walker;
+ EFI_DEVICE_PATH_PROTOCOL *Walker;
- if (DevicePath == NULL || InstanceSize == NULL || EntireDevicePathEnd == NULL) {
+ if ((DevicePath == NULL) || (InstanceSize == NULL) || (EntireDevicePathEnd == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -130,7 +130,7 @@ GetDevicePathInstanceSize (
//
// Compute the size of the device path instance
//
- *InstanceSize = ((UINTN) Walker - (UINTN) (DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ *InstanceSize = ((UINTN)Walker - (UINTN)(DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
return EFI_SUCCESS;
}
@@ -148,12 +148,12 @@ GetDevicePathInstanceSize (
**/
EFI_STATUS
AhciIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
)
{
- EFI_DEVICE_PATH_PROTOCOL *Start;
- UINTN Size;
+ EFI_DEVICE_PATH_PROTOCOL *Start;
+ UINTN Size;
if (DevicePath == NULL) {
return EFI_INVALID_PARAMETER;
@@ -168,22 +168,24 @@ AhciIsHcDevicePathValid (
Start = DevicePath;
while (!(DevicePath->Type == END_DEVICE_PATH_TYPE &&
- DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE)) {
+ DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE))
+ {
DevicePath = NextDevicePathNode (DevicePath);
//
// Prevent overflow and invalid zero in the 'Length' field of a device path
// node.
//
- if ((UINTN) DevicePath <= (UINTN) Start) {
+ if ((UINTN)DevicePath <= (UINTN)Start) {
return EFI_INVALID_PARAMETER;
}
//
// Prevent touching memory beyond given DevicePathLength.
//
- if ((UINTN) DevicePath - (UINTN) Start >
- DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)) {
+ if ((UINTN)DevicePath - (UINTN)Start >
+ DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL))
+ {
return EFI_INVALID_PARAMETER;
}
}
@@ -191,7 +193,7 @@ AhciIsHcDevicePathValid (
//
// Check if the device path and its size match each other.
//
- Size = ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ Size = ((UINTN)DevicePath - (UINTN)Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
if (Size != DevicePathLength) {
return EFI_INVALID_PARAMETER;
}
@@ -217,17 +219,17 @@ AhciIsHcDevicePathValid (
**/
EFI_STATUS
AhciBuildDevicePath (
- IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
- SATA_DEVICE_PATH *SataDeviceNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
+ SATA_DEVICE_PATH *SataDeviceNode;
- if (DevicePathLength == NULL || DevicePath == NULL) {
+ if ((DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -251,8 +253,8 @@ AhciBuildDevicePath (
//
// Construct the SATA device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
CopyMem (
DevicePathWalker,
&mAhciSataDevicePathNodeTemplate,
@@ -265,8 +267,8 @@ AhciBuildDevicePath (
//
// Construct the end device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- sizeof (SATA_DEVICE_PATH));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ sizeof (SATA_DEVICE_PATH));
CopyMem (
DevicePathWalker,
&mAhciEndDevicePathNodeTemplate,
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/DmaMem.c b/MdeModulePkg/Bus/Ata/AhciPei/DmaMem.c
index 3a506d8c2c..c4c08988d5 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/DmaMem.c
@@ -20,15 +20,15 @@ GetIoMmu (
VOID
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = NULL;
Status = PeiServicesLocatePpi (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
- (VOID **) &IoMmu
+ (VOID **)&IoMmu
);
if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
return IoMmu;
@@ -58,48 +58,50 @@ GetIoMmu (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ UINT64 Attribute;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
if (IoMmu != NULL) {
Status = IoMmu->Map (
- IoMmu,
- Operation,
- HostAddress,
- NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ IoMmu,
+ Operation,
+ HostAddress,
+ NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -110,9 +112,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -127,11 +130,11 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -141,6 +144,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -175,7 +179,7 @@ IoMmuAllocateBuffer (
EFI_PHYSICAL_ADDRESS HostPhyAddress;
EDKII_IOMMU_PPI *IoMmu;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
IoMmu = GetIoMmu ();
@@ -192,18 +196,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = IoMmu->Map (
- IoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -221,10 +226,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -242,13 +249,13 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -259,5 +266,6 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index aec7d0cfbe..a240be940d 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -25,7 +25,7 @@ AhciReadReg (
IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (PciIo != NULL);
@@ -35,7 +35,7 @@ AhciReadReg (
PciIo,
EfiPciIoWidthUint32,
EFI_AHCI_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
@@ -65,12 +65,12 @@ AhciWriteReg (
PciIo,
EfiPciIoWidthUint32,
EFI_AHCI_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
- return ;
+ return;
}
/**
@@ -89,11 +89,11 @@ AhciAndReg (
IN UINT32 AndData
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (PciIo != NULL);
- Data = AhciReadReg (PciIo, Offset);
+ Data = AhciReadReg (PciIo, Offset);
Data &= AndData;
@@ -116,11 +116,11 @@ AhciOrReg (
IN UINT32 OrData
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (PciIo != NULL);
- Data = AhciReadReg (PciIo, Offset);
+ Data = AhciReadReg (PciIo, Offset);
Data |= OrData;
@@ -143,16 +143,16 @@ AhciOrReg (
EFI_STATUS
EFIAPI
AhciWaitMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINTN Offset,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINTN Offset,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
+ UINT32 Value;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -166,7 +166,7 @@ AhciWaitMmioSet (
//
// Access PCI MMIO space to see if the value is the tested one.
//
- Value = AhciReadReg (PciIo, (UINT32) Offset) & MaskValue;
+ Value = AhciReadReg (PciIo, (UINT32)Offset) & MaskValue;
if (Value == TestValue) {
return EFI_SUCCESS;
@@ -178,7 +178,6 @@ AhciWaitMmioSet (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -199,15 +198,15 @@ AhciWaitMmioSet (
EFI_STATUS
EFIAPI
AhciWaitMemSet (
- IN EFI_PHYSICAL_ADDRESS Address,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN EFI_PHYSICAL_ADDRESS Address,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
+ UINT32 Value;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -226,7 +225,7 @@ AhciWaitMemSet (
// compiler from optimizing the access to the memory address
// to only read once.
//
- Value = *(volatile UINT32 *) (UINTN) Address;
+ Value = *(volatile UINT32 *)(UINTN)Address;
Value &= MaskValue;
if (Value == TestValue) {
@@ -239,7 +238,6 @@ AhciWaitMemSet (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -258,14 +256,14 @@ AhciWaitMemSet (
EFI_STATUS
EFIAPI
AhciCheckMemSet (
- IN UINTN Address,
- IN UINT32 MaskValue,
- IN UINT32 TestValue
+ IN UINTN Address,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue
)
{
- UINT32 Value;
+ UINT32 Value;
- Value = *(volatile UINT32 *) Address;
+ Value = *(volatile UINT32 *)Address;
Value &= MaskValue;
if (Value == TestValue) {
@@ -275,7 +273,6 @@ AhciCheckMemSet (
return EFI_NOT_READY;
}
-
/**
Clear the port interrupt and error status. It will also clear
@@ -288,11 +285,11 @@ AhciCheckMemSet (
VOID
EFIAPI
AhciClearPortStatus (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port
)
{
- UINT32 Offset;
+ UINT32 Offset;
//
// Clear any error status
@@ -325,16 +322,16 @@ AhciClearPortStatus (
VOID
EFIAPI
AhciDumpPortStatus (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- UINTN Offset;
- UINT32 Data;
- UINTN FisBaseAddr;
- EFI_STATUS Status;
+ UINTN Offset;
+ UINT32 Data;
+ UINTN FisBaseAddr;
+ EFI_STATUS Status;
ASSERT (PciIo != NULL);
@@ -358,7 +355,7 @@ AhciDumpPortStatus (
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
Data = AhciReadReg (PciIo, (UINT32)Offset);
- AtaStatusBlock->AtaStatus = (UINT8)Data;
+ AtaStatusBlock->AtaStatus = (UINT8)Data;
if ((AtaStatusBlock->AtaStatus & BIT0) != 0) {
AtaStatusBlock->AtaError = (UINT8)(Data >> 8);
}
@@ -366,7 +363,6 @@ AhciDumpPortStatus (
}
}
-
/**
Enable the FIS running for giving port.
@@ -382,12 +378,12 @@ AhciDumpPortStatus (
EFI_STATUS
EFIAPI
AhciEnableFisReceive (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
+ UINT32 Offset;
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
@@ -411,13 +407,13 @@ AhciEnableFisReceive (
EFI_STATUS
EFIAPI
AhciDisableFisReceive (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
- UINT32 Data;
+ UINT32 Offset;
+ UINT32 Data;
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
Data = AhciReadReg (PciIo, Offset);
@@ -436,7 +432,7 @@ AhciDisableFisReceive (
return EFI_SUCCESS;
}
- AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_FRE));
+ AhciAndReg (PciIo, Offset, (UINT32) ~(EFI_AHCI_PORT_CMD_FRE));
return AhciWaitMmioSet (
PciIo,
@@ -447,8 +443,6 @@ AhciDisableFisReceive (
);
}
-
-
/**
Build the command list, command table and prepare the fis receiver.
@@ -468,26 +462,26 @@ AhciDisableFisReceive (
VOID
EFIAPI
AhciBuildCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_COMMAND_FIS *CommandFis,
- IN EFI_AHCI_COMMAND_LIST *CommandList,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN UINT8 CommandSlotNumber,
- IN OUT VOID *DataPhysicalAddr,
- IN UINT32 DataLength
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_COMMAND_FIS *CommandFis,
+ IN EFI_AHCI_COMMAND_LIST *CommandList,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN UINT8 CommandSlotNumber,
+ IN OUT VOID *DataPhysicalAddr,
+ IN UINT32 DataLength
)
{
- UINT64 BaseAddr;
- UINT32 PrdtNumber;
- UINT32 PrdtIndex;
- UINTN RemainedData;
- UINTN MemAddr;
- DATA_64 Data64;
- UINT32 Offset;
+ UINT64 BaseAddr;
+ UINT32 PrdtNumber;
+ UINT32 PrdtIndex;
+ UINTN RemainedData;
+ UINTN MemAddr;
+ DATA_64 Data64;
+ UINT32 Offset;
//
// Filling the PRDT
@@ -501,11 +495,11 @@ AhciBuildCommand (
//
ASSERT (PrdtNumber <= 65535);
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port;
BaseAddr = Data64.Uint64;
- ZeroMem ((VOID *)((UINTN) BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS));
+ ZeroMem ((VOID *)((UINTN)BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS));
ZeroMem (AhciRegisters->AhciCommandTable, sizeof (EFI_AHCI_COMMAND_TABLE));
@@ -526,11 +520,11 @@ AhciBuildCommand (
AhciOrReg (PciIo, Offset, (EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI));
} else {
- AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI));
+ AhciAndReg (PciIo, Offset, (UINT32) ~(EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI));
}
- RemainedData = (UINTN) DataLength;
- MemAddr = (UINTN) DataPhysicalAddr;
+ RemainedData = (UINTN)DataLength;
+ MemAddr = (UINTN)DataPhysicalAddr;
CommandList->AhciCmdPrdtl = PrdtNumber;
for (PrdtIndex = 0; PrdtIndex < PrdtNumber; PrdtIndex++) {
@@ -540,11 +534,11 @@ AhciBuildCommand (
AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDbc = EFI_AHCI_MAX_DATA_PER_PRDT - 1;
}
- Data64.Uint64 = (UINT64)MemAddr;
+ Data64.Uint64 = (UINT64)MemAddr;
AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDba = Data64.Uint32.Lower32;
AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDbau = Data64.Uint32.Upper32;
- RemainedData -= EFI_AHCI_MAX_DATA_PER_PRDT;
- MemAddr += EFI_AHCI_MAX_DATA_PER_PRDT;
+ RemainedData -= EFI_AHCI_MAX_DATA_PER_PRDT;
+ MemAddr += EFI_AHCI_MAX_DATA_PER_PRDT;
}
//
@@ -555,16 +549,15 @@ AhciBuildCommand (
}
CopyMem (
- (VOID *) ((UINTN) AhciRegisters->AhciCmdList + (UINTN) CommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST)),
+ (VOID *)((UINTN)AhciRegisters->AhciCmdList + (UINTN)CommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST)),
CommandList,
sizeof (EFI_AHCI_COMMAND_LIST)
);
- Data64.Uint64 = (UINT64)(UINTN) AhciRegisters->AhciCommandTablePciAddr;
+ Data64.Uint64 = (UINT64)(UINTN)AhciRegisters->AhciCommandTablePciAddr;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtba = Data64.Uint32.Lower32;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtbau = Data64.Uint32.Upper32;
AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdPmp = PortMultiplier;
-
}
/**
@@ -577,8 +570,8 @@ AhciBuildCommand (
VOID
EFIAPI
AhciBuildCommandFis (
- IN OUT EFI_AHCI_COMMAND_FIS *CmdFis,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock
+ IN OUT EFI_AHCI_COMMAND_FIS *CmdFis,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock
)
{
ZeroMem (CmdFis, sizeof (EFI_AHCI_COMMAND_FIS));
@@ -587,25 +580,25 @@ AhciBuildCommandFis (
//
// Indicator it's a command
//
- CmdFis->AhciCFisCmdInd = 0x1;
- CmdFis->AhciCFisCmd = AtaCommandBlock->AtaCommand;
+ CmdFis->AhciCFisCmdInd = 0x1;
+ CmdFis->AhciCFisCmd = AtaCommandBlock->AtaCommand;
- CmdFis->AhciCFisFeature = AtaCommandBlock->AtaFeatures;
- CmdFis->AhciCFisFeatureExp = AtaCommandBlock->AtaFeaturesExp;
+ CmdFis->AhciCFisFeature = AtaCommandBlock->AtaFeatures;
+ CmdFis->AhciCFisFeatureExp = AtaCommandBlock->AtaFeaturesExp;
- CmdFis->AhciCFisSecNum = AtaCommandBlock->AtaSectorNumber;
- CmdFis->AhciCFisSecNumExp = AtaCommandBlock->AtaSectorNumberExp;
+ CmdFis->AhciCFisSecNum = AtaCommandBlock->AtaSectorNumber;
+ CmdFis->AhciCFisSecNumExp = AtaCommandBlock->AtaSectorNumberExp;
- CmdFis->AhciCFisClyLow = AtaCommandBlock->AtaCylinderLow;
- CmdFis->AhciCFisClyLowExp = AtaCommandBlock->AtaCylinderLowExp;
+ CmdFis->AhciCFisClyLow = AtaCommandBlock->AtaCylinderLow;
+ CmdFis->AhciCFisClyLowExp = AtaCommandBlock->AtaCylinderLowExp;
- CmdFis->AhciCFisClyHigh = AtaCommandBlock->AtaCylinderHigh;
- CmdFis->AhciCFisClyHighExp = AtaCommandBlock->AtaCylinderHighExp;
+ CmdFis->AhciCFisClyHigh = AtaCommandBlock->AtaCylinderHigh;
+ CmdFis->AhciCFisClyHighExp = AtaCommandBlock->AtaCylinderHighExp;
CmdFis->AhciCFisSecCount = AtaCommandBlock->AtaSectorCount;
CmdFis->AhciCFisSecCountExp = AtaCommandBlock->AtaSectorCountExp;
- CmdFis->AhciCFisDevHead = (UINT8) (AtaCommandBlock->AtaDeviceHead | 0xE0);
+ CmdFis->AhciCFisDevHead = (UINT8)(AtaCommandBlock->AtaDeviceHead | 0xE0);
}
/**
@@ -621,11 +614,11 @@ EFI_STATUS
AhciWaitDeviceReady (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Port
- )
+ )
{
- UINT32 PhyDetectDelay;
- UINT32 Data;
- UINT32 Offset;
+ UINT32 PhyDetectDelay;
+ UINT32 Data;
+ UINT32 Offset;
//
// According to SATA1.0a spec section 5.2, we need to wait for PxTFD.BSY and PxTFD.DRQ
@@ -634,9 +627,10 @@ AhciWaitDeviceReady (
PhyDetectDelay = 16 * 1000;
do {
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SERR;
- if (AhciReadReg(PciIo, Offset) != 0) {
- AhciWriteReg (PciIo, Offset, AhciReadReg(PciIo, Offset));
+ if (AhciReadReg (PciIo, Offset) != 0) {
+ AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset));
}
+
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_TFD_MASK;
@@ -656,7 +650,6 @@ AhciWaitDeviceReady (
}
}
-
/**
Reset the SATA port. Algorithm follows AHCI spec 1.3.1 section 10.4.2
@@ -681,7 +674,7 @@ AhciResetPort (
// SW is required to keep DET set to 0x1 at least for 1 milisecond to ensure that
// at least one COMRESET signal is sent.
//
- MicroSecondDelay(1000);
+ MicroSecondDelay (1000);
AhciAndReg (PciIo, Offset, ~(UINT32)EFI_AHCI_PORT_SSTS_DET_MASK);
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;
@@ -715,7 +708,7 @@ AhciRecoverPortError (
UINT32 PortTfd;
EFI_STATUS Status;
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS;
PortInterrupt = AhciReadReg (PciIo, Offset);
if ((PortInterrupt & EFI_AHCI_PORT_IS_FATAL_ERROR_MASK) == 0) {
//
@@ -738,7 +731,7 @@ AhciRecoverPortError (
// If TFD.BSY or TFD.DRQ is still set it means that drive is hung and software has
// to reset it before sending any additional commands.
//
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
PortTfd = AhciReadReg (PciIo, Offset);
if ((PortTfd & (EFI_AHCI_PORT_TFD_BSY | EFI_AHCI_PORT_TFD_DRQ)) != 0) {
Status = AhciResetPort (PciIo, Port);
@@ -768,16 +761,17 @@ AhciCheckFisReceived (
IN SATA_FIS_TYPE FisType
)
{
- UINT32 Offset;
- UINT32 PortInterrupt;
- UINT32 PortTfd;
+ UINT32 Offset;
+ UINT32 PortInterrupt;
+ UINT32 PortTfd;
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS;
PortInterrupt = AhciReadReg (PciIo, Offset);
if ((PortInterrupt & EFI_AHCI_PORT_IS_ERROR_MASK) != 0) {
DEBUG ((DEBUG_ERROR, "AHCI: Error interrupt reported PxIS: %X\n", PortInterrupt));
return EFI_DEVICE_ERROR;
}
+
//
// For PIO setup FIS - According to SATA 2.6 spec section 11.7, D2h FIS means an error encountered.
// But Qemu and Marvel 9230 sata controller may just receive a D2h FIS from device
@@ -786,10 +780,11 @@ AhciCheckFisReceived (
// By this way, we can know if there is a real error happened.
//
if (((FisType == SataFisD2H) && ((PortInterrupt & EFI_AHCI_PORT_IS_DHRS) != 0)) ||
- ((FisType == SataFisPioSetup) && (PortInterrupt & (EFI_AHCI_PORT_IS_PSS | EFI_AHCI_PORT_IS_DHRS)) != 0) ||
- ((FisType == SataFisDmaSetup) && (PortInterrupt & (EFI_AHCI_PORT_IS_DSS | EFI_AHCI_PORT_IS_DHRS)) != 0)) {
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
- PortTfd = AhciReadReg (PciIo, (UINT32) Offset);
+ ((FisType == SataFisPioSetup) && ((PortInterrupt & (EFI_AHCI_PORT_IS_PSS | EFI_AHCI_PORT_IS_DHRS)) != 0)) ||
+ ((FisType == SataFisDmaSetup) && ((PortInterrupt & (EFI_AHCI_PORT_IS_DSS | EFI_AHCI_PORT_IS_DHRS)) != 0)))
+ {
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
+ PortTfd = AhciReadReg (PciIo, (UINT32)Offset);
if ((PortTfd & EFI_AHCI_PORT_TFD_ERR) != 0) {
return EFI_DEVICE_ERROR;
} else {
@@ -836,6 +831,7 @@ AhciWaitUntilFisReceived (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 100 microseconds.
//
@@ -929,30 +925,30 @@ AhciPrintStatusBlock (
EFI_STATUS
EFIAPI
AhciPioTransfer (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *Map;
- UINTN MapLength;
- EFI_PCI_IO_PROTOCOL_OPERATION Flag;
- EFI_AHCI_COMMAND_FIS CFis;
- EFI_AHCI_COMMAND_LIST CmdList;
- UINT32 PrdCount;
- UINT32 Retry;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *Map;
+ UINTN MapLength;
+ EFI_PCI_IO_PROTOCOL_OPERATION Flag;
+ EFI_AHCI_COMMAND_FIS CFis;
+ EFI_AHCI_COMMAND_LIST CmdList;
+ UINT32 PrdCount;
+ UINT32 Retry;
if (Read) {
Flag = EfiPciIoOperationBusMasterWrite;
@@ -964,14 +960,14 @@ AhciPioTransfer (
// construct command list and command table with pci bus address
//
MapLength = DataCount;
- Status = PciIo->Map (
- PciIo,
- Flag,
- MemoryAddr,
- &MapLength,
- &PhyAddr,
- &Map
- );
+ Status = PciIo->Map (
+ PciIo,
+ Flag,
+ MemoryAddr,
+ &MapLength,
+ &PhyAddr,
+ &Map
+ );
if (EFI_ERROR (Status) || (DataCount != MapLength)) {
return EFI_BAD_BUFFER_SIZE;
@@ -1005,11 +1001,11 @@ AhciPioTransfer (
DEBUG ((DEBUG_VERBOSE, "Starting command for PIO transfer:\n"));
AhciPrintCommandBlock (AtaCommandBlock, DEBUG_VERBOSE);
Status = AhciStartCommand (
- PciIo,
- Port,
- 0,
- Timeout
- );
+ PciIo,
+ Port,
+ 0,
+ Timeout
+ );
if (EFI_ERROR (Status)) {
break;
}
@@ -1017,7 +1013,7 @@ AhciPioTransfer (
if (Read && (AtapiCommand == 0)) {
Status = AhciWaitUntilFisReceived (PciIo, Port, Timeout, SataFisPioSetup);
if (Status == EFI_SUCCESS) {
- PrdCount = *(volatile UINT32 *) (&(AhciRegisters->AhciCmdList[0].AhciCmdPrdbc));
+ PrdCount = *(volatile UINT32 *)(&(AhciRegisters->AhciCmdList[0].AhciCmdPrdbc));
if (PrdCount == DataCount) {
Status = EFI_SUCCESS;
} else {
@@ -1052,9 +1048,9 @@ AhciPioTransfer (
);
PciIo->Unmap (
- PciIo,
- Map
- );
+ PciIo,
+ Map
+ );
AhciDumpPortStatus (PciIo, AhciRegisters, Port, AtaStatusBlock);
@@ -1101,31 +1097,31 @@ AhciPioTransfer (
EFI_STATUS
EFIAPI
AhciDmaTransfer (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *Map;
- UINTN MapLength;
- EFI_PCI_IO_PROTOCOL_OPERATION Flag;
- EFI_AHCI_COMMAND_FIS CFis;
- EFI_AHCI_COMMAND_LIST CmdList;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_TPL OldTpl;
- UINT32 Retry;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *Map;
+ UINTN MapLength;
+ EFI_PCI_IO_PROTOCOL_OPERATION Flag;
+ EFI_AHCI_COMMAND_FIS CFis;
+ EFI_AHCI_COMMAND_LIST CmdList;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_TPL OldTpl;
+ UINT32 Retry;
Map = NULL;
PciIo = Instance->PciIo;
@@ -1151,24 +1147,25 @@ AhciDmaTransfer (
}
MapLength = DataCount;
- Status = PciIo->Map (
- PciIo,
- Flag,
- MemoryAddr,
- &MapLength,
- &PhyAddr,
- &Map
- );
+ Status = PciIo->Map (
+ PciIo,
+ Flag,
+ MemoryAddr,
+ &MapLength,
+ &PhyAddr,
+ &Map
+ );
if (EFI_ERROR (Status) || (DataCount != MapLength)) {
return EFI_BAD_BUFFER_SIZE;
}
+
if (Task != NULL) {
Task->Map = Map;
}
}
- if (Task == NULL || (Task != NULL && !Task->IsStart)) {
+ if ((Task == NULL) || ((Task != NULL) && !Task->IsStart)) {
AhciBuildCommandFis (&CFis, AtaCommandBlock);
ZeroMem (&CmdList, sizeof (EFI_AHCI_COMMAND_LIST));
@@ -1191,6 +1188,7 @@ AhciDmaTransfer (
//
MicroSecondDelay (100);
}
+
gBS->RestoreTPL (OldTpl);
for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
AhciBuildCommand (
@@ -1210,14 +1208,15 @@ AhciDmaTransfer (
DEBUG ((DEBUG_VERBOSE, "Starting command for sync DMA transfer:\n"));
AhciPrintCommandBlock (AtaCommandBlock, DEBUG_VERBOSE);
Status = AhciStartCommand (
- PciIo,
- Port,
- 0,
- Timeout
- );
+ PciIo,
+ Port,
+ 0,
+ Timeout
+ );
if (EFI_ERROR (Status)) {
break;
}
+
Status = AhciWaitUntilFisReceived (PciIo, Port, Timeout, SataFisD2H);
if (Status == EFI_DEVICE_ERROR) {
DEBUG ((DEBUG_ERROR, "DMA command failed at retry: %d\n", Retry));
@@ -1248,15 +1247,16 @@ AhciDmaTransfer (
DEBUG ((DEBUG_VERBOSE, "Starting command for async DMA transfer:\n"));
AhciPrintCommandBlock (AtaCommandBlock, DEBUG_VERBOSE);
Status = AhciStartCommand (
- PciIo,
- Port,
- 0,
- Timeout
- );
+ PciIo,
+ Port,
+ 0,
+ Timeout
+ );
if (!EFI_ERROR (Status)) {
Task->IsStart = TRUE;
}
}
+
if (Task->IsStart) {
Status = AhciCheckFisReceived (PciIo, Port, SataFisD2H);
if (Status == EFI_DEVICE_ERROR) {
@@ -1270,12 +1270,12 @@ AhciDmaTransfer (
//
if (Status == EFI_SUCCESS) {
Task->IsStart = FALSE;
- Status = EFI_NOT_READY;
+ Status = EFI_NOT_READY;
}
}
if (Status == EFI_NOT_READY) {
- if (!Task->InfiniteWait && Task->RetryTimes == 0) {
+ if (!Task->InfiniteWait && (Task->RetryTimes == 0)) {
Status = EFI_TIMEOUT;
} else {
Task->RetryTimes--;
@@ -1291,9 +1291,10 @@ AhciDmaTransfer (
// EFI_NOT_READY that means the command doesn't finished, try again.), first do the
// context cleanup, then set the packet's Asb status.
//
- if (Task == NULL ||
+ if ((Task == NULL) ||
((Task != NULL) && (Status != EFI_NOT_READY))
- ) {
+ )
+ {
AhciStopCommand (
PciIo,
Port,
@@ -1358,22 +1359,22 @@ AhciDmaTransfer (
EFI_STATUS
EFIAPI
AhciNonDataTransfer (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
)
{
- EFI_STATUS Status;
- EFI_AHCI_COMMAND_FIS CFis;
- EFI_AHCI_COMMAND_LIST CmdList;
- UINT32 Retry;
+ EFI_STATUS Status;
+ EFI_AHCI_COMMAND_FIS CFis;
+ EFI_AHCI_COMMAND_LIST CmdList;
+ UINT32 Retry;
//
// Package read needed
@@ -1402,11 +1403,11 @@ AhciNonDataTransfer (
DEBUG ((DEBUG_VERBOSE, "Starting command for non data transfer:\n"));
AhciPrintCommandBlock (AtaCommandBlock, DEBUG_VERBOSE);
Status = AhciStartCommand (
- PciIo,
- Port,
- 0,
- Timeout
- );
+ PciIo,
+ Port,
+ 0,
+ Timeout
+ );
if (EFI_ERROR (Status)) {
break;
}
@@ -1467,13 +1468,13 @@ AhciNonDataTransfer (
EFI_STATUS
EFIAPI
AhciStopCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT64 Timeout
)
{
- UINT32 Offset;
- UINT32 Data;
+ UINT32 Offset;
+ UINT32 Data;
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
Data = AhciReadReg (PciIo, Offset);
@@ -1483,7 +1484,7 @@ AhciStopCommand (
}
if ((Data & EFI_AHCI_PORT_CMD_ST) != 0) {
- AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_ST));
+ AhciAndReg (PciIo, Offset, (UINT32) ~(EFI_AHCI_PORT_CMD_ST));
}
return AhciWaitMmioSet (
@@ -1511,26 +1512,26 @@ AhciStopCommand (
EFI_STATUS
EFIAPI
AhciStartCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT8 CommandSlot,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT8 CommandSlot,
+ IN UINT64 Timeout
)
{
- UINT32 CmdSlotBit;
- EFI_STATUS Status;
- UINT32 PortStatus;
- UINT32 StartCmd;
- UINT32 PortTfd;
- UINT32 Offset;
- UINT32 Capability;
+ UINT32 CmdSlotBit;
+ EFI_STATUS Status;
+ UINT32 PortStatus;
+ UINT32 StartCmd;
+ UINT32 PortTfd;
+ UINT32 Offset;
+ UINT32 Capability;
//
// Collect AHCI controller information
//
- Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);
+ Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);
- CmdSlotBit = (UINT32) (1 << CommandSlot);
+ CmdSlotBit = (UINT32)(1 << CommandSlot);
AhciClearPortStatus (
PciIo,
@@ -1547,17 +1548,17 @@ AhciStartCommand (
return Status;
}
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
PortStatus = AhciReadReg (PciIo, Offset);
StartCmd = 0;
if ((PortStatus & EFI_AHCI_PORT_CMD_ALPE) != 0) {
- StartCmd = AhciReadReg (PciIo, Offset);
+ StartCmd = AhciReadReg (PciIo, Offset);
StartCmd &= ~EFI_AHCI_PORT_CMD_ICC_MASK;
StartCmd |= EFI_AHCI_PORT_CMD_ACTIVE;
}
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
PortTfd = AhciReadReg (PciIo, Offset);
if ((PortTfd & (EFI_AHCI_PORT_TFD_BSY | EFI_AHCI_PORT_TFD_DRQ)) != 0) {
@@ -1588,7 +1589,6 @@ AhciStartCommand (
return EFI_SUCCESS;
}
-
/**
Do AHCI HBA reset.
@@ -1603,17 +1603,17 @@ AhciStartCommand (
EFI_STATUS
EFIAPI
AhciReset (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT32 Value;
+ UINT64 Delay;
+ UINT32 Value;
//
// Make sure that GHC.AE bit is set before accessing any AHCI registers.
//
- Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);
+ Value = AhciReadReg (PciIo, EFI_AHCI_GHC_OFFSET);
if ((Value & EFI_AHCI_GHC_ENABLE) == 0) {
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
@@ -1621,10 +1621,10 @@ AhciReset (
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET);
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
- Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);
+ Value = AhciReadReg (PciIo, EFI_AHCI_GHC_OFFSET);
if ((Value & EFI_AHCI_GHC_RESET) == 0) {
break;
@@ -1633,7 +1633,7 @@ AhciReset (
//
// Stall for 100 microseconds.
//
- MicroSecondDelay(100);
+ MicroSecondDelay (100);
Delay--;
} while (Delay > 0);
@@ -1661,19 +1661,19 @@ AhciReset (
EFI_STATUS
EFIAPI
AhciAtaSmartReturnStatusCheck (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- UINT8 LBAMid;
- UINT8 LBAHigh;
- UINTN FisBaseAddr;
- UINT32 Value;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ UINT8 LBAMid;
+ UINT8 LBAHigh;
+ UINTN FisBaseAddr;
+ UINT32 Value;
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
@@ -1713,7 +1713,7 @@ AhciAtaSmartReturnStatusCheck (
FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS);
- Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET);
+ Value = *(UINT32 *)(FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET);
if ((Value & EFI_AHCI_FIS_TYPE_MASK) == EFI_AHCI_FIS_REGISTER_D2H) {
LBAMid = ((UINT8 *)(UINTN)(FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET))[5];
@@ -1725,18 +1725,18 @@ AhciAtaSmartReturnStatusCheck (
//
DEBUG ((DEBUG_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n"));
REPORT_STATUS_CODE (
- EFI_PROGRESS_CODE,
- (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
- );
+ EFI_PROGRESS_CODE,
+ (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
+ );
} else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
//
// The threshold exceeded condition is detected by the device
//
DEBUG ((DEBUG_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n"));
REPORT_STATUS_CODE (
- EFI_PROGRESS_CODE,
- (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
- );
+ EFI_PROGRESS_CODE,
+ (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
+ );
}
}
@@ -1757,16 +1757,16 @@ AhciAtaSmartReturnStatusCheck (
VOID
EFIAPI
AhciAtaSmartSupport (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_IDENTIFY_DATA *IdentifyData,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_IDENTIFY_DATA *IdentifyData,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
//
// Detect if the device supports S.M.A.R.T.
@@ -1775,8 +1775,12 @@ AhciAtaSmartSupport (
//
// S.M.A.R.T is not supported by the device
//
- DEBUG ((DEBUG_INFO, "S.M.A.R.T feature is not supported at port [%d] PortMultiplier [%d]!\n",
- Port, PortMultiplier));
+ DEBUG ((
+ DEBUG_INFO,
+ "S.M.A.R.T feature is not supported at port [%d] PortMultiplier [%d]!\n",
+ Port,
+ PortMultiplier
+ ));
REPORT_STATUS_CODE (
EFI_ERROR_CODE | EFI_ERROR_MINOR,
(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
@@ -1786,7 +1790,6 @@ AhciAtaSmartSupport (
// Check if the feature is enabled. If not, then enable S.M.A.R.T.
//
if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) {
-
REPORT_STATUS_CODE (
EFI_PROGRESS_CODE,
(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE)
@@ -1815,7 +1818,6 @@ AhciAtaSmartSupport (
NULL
);
-
if (!EFI_ERROR (Status)) {
//
// Send S.M.A.R.T AutoSave command to device
@@ -1851,11 +1853,15 @@ AhciAtaSmartSupport (
AtaStatusBlock
);
- DEBUG ((DEBUG_INFO, "Enabled S.M.A.R.T feature at port [%d] PortMultiplier [%d]!\n",
- Port, PortMultiplier));
+ DEBUG ((
+ DEBUG_INFO,
+ "Enabled S.M.A.R.T feature at port [%d] PortMultiplier [%d]!\n",
+ Port,
+ PortMultiplier
+ ));
}
- return ;
+ return;
}
/**
@@ -1876,18 +1882,18 @@ AhciAtaSmartSupport (
EFI_STATUS
EFIAPI
AhciIdentify (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN OUT EFI_IDENTIFY_DATA *Buffer
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT EFI_IDENTIFY_DATA *Buffer
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
- if (PciIo == NULL || AhciRegisters == NULL || Buffer == NULL) {
+ if ((PciIo == NULL) || (AhciRegisters == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1934,18 +1940,18 @@ AhciIdentify (
EFI_STATUS
EFIAPI
AhciIdentifyPacket (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN OUT EFI_IDENTIFY_DATA *Buffer
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT EFI_IDENTIFY_DATA *Buffer
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
- if (PciIo == NULL || AhciRegisters == NULL) {
+ if ((PciIo == NULL) || (AhciRegisters == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1994,29 +2000,29 @@ AhciIdentifyPacket (
EFI_STATUS
EFIAPI
AhciDeviceSetFeature (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN UINT16 Feature,
- IN UINT32 FeatureSpecificData,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN UINT16 Feature,
+ IN UINT32 FeatureSpecificData,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK));
AtaCommandBlock.AtaCommand = ATA_CMD_SET_FEATURES;
- AtaCommandBlock.AtaFeatures = (UINT8) Feature;
- AtaCommandBlock.AtaFeaturesExp = (UINT8) (Feature >> 8);
- AtaCommandBlock.AtaSectorCount = (UINT8) FeatureSpecificData;
- AtaCommandBlock.AtaSectorNumber = (UINT8) (FeatureSpecificData >> 8);
- AtaCommandBlock.AtaCylinderLow = (UINT8) (FeatureSpecificData >> 16);
- AtaCommandBlock.AtaCylinderHigh = (UINT8) (FeatureSpecificData >> 24);
+ AtaCommandBlock.AtaFeatures = (UINT8)Feature;
+ AtaCommandBlock.AtaFeaturesExp = (UINT8)(Feature >> 8);
+ AtaCommandBlock.AtaSectorCount = (UINT8)FeatureSpecificData;
+ AtaCommandBlock.AtaSectorNumber = (UINT8)(FeatureSpecificData >> 8);
+ AtaCommandBlock.AtaCylinderLow = (UINT8)(FeatureSpecificData >> 16);
+ AtaCommandBlock.AtaCylinderHigh = (UINT8)(FeatureSpecificData >> 24);
Status = AhciNonDataTransfer (
PciIo,
@@ -2052,46 +2058,46 @@ AhciDeviceSetFeature (
EFI_STATUS
EFIAPI
AhciPacketCommandExecute (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
)
{
- EFI_STATUS Status;
- VOID *Buffer;
- UINT32 Length;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
- BOOLEAN Read;
-
- if (Packet == NULL || Packet->Cdb == NULL) {
+ EFI_STATUS Status;
+ VOID *Buffer;
+ UINT32 Length;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ BOOLEAN Read;
+
+ if ((Packet == NULL) || (Packet->Cdb == NULL)) {
return EFI_INVALID_PARAMETER;
}
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK));
- AtaCommandBlock.AtaCommand = ATA_CMD_PACKET;
+ AtaCommandBlock.AtaCommand = ATA_CMD_PACKET;
//
// No OVL; No DMA
//
- AtaCommandBlock.AtaFeatures = 0x00;
+ AtaCommandBlock.AtaFeatures = 0x00;
//
// set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device
// determine how many data should be transferred.
//
- AtaCommandBlock.AtaCylinderLow = (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff);
- AtaCommandBlock.AtaCylinderHigh = (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8);
+ AtaCommandBlock.AtaCylinderLow = (UINT8)(ATAPI_MAX_BYTE_COUNT & 0x00ff);
+ AtaCommandBlock.AtaCylinderHigh = (UINT8)(ATAPI_MAX_BYTE_COUNT >> 8);
if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) {
Buffer = Packet->InDataBuffer;
Length = Packet->InTransferLength;
- Read = TRUE;
+ Read = TRUE;
} else {
Buffer = Packet->OutDataBuffer;
Length = Packet->OutTransferLength;
- Read = FALSE;
+ Read = FALSE;
}
if (Length == 0) {
@@ -2124,6 +2130,7 @@ AhciPacketCommandExecute (
NULL
);
}
+
return Status;
}
@@ -2137,13 +2144,13 @@ AhciPacketCommandExecute (
EFI_STATUS
EFIAPI
AhciCreateTransferDescriptor (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN OUT EFI_AHCI_REGISTERS *AhciRegisters
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN OUT EFI_AHCI_REGISTERS *AhciRegisters
)
{
- EFI_STATUS Status;
- UINTN Bytes;
- VOID *Buffer;
+ EFI_STATUS Status;
+ UINTN Bytes;
+ VOID *Buffer;
UINT32 Capability;
UINT32 PortImplementBitMap;
@@ -2161,31 +2168,31 @@ AhciCreateTransferDescriptor (
//
// Collect AHCI controller information
//
- Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);
+ Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);
//
// Get the number of command slots per port supported by this HBA.
//
- MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1);
- Support64Bit = (BOOLEAN) (((Capability & BIT31) != 0) ? TRUE : FALSE);
+ MaxCommandSlotNumber = (UINT8)(((Capability & 0x1F00) >> 8) + 1);
+ Support64Bit = (BOOLEAN)(((Capability & BIT31) != 0) ? TRUE : FALSE);
- PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);
+ PortImplementBitMap = AhciReadReg (PciIo, EFI_AHCI_PI_OFFSET);
//
// Get the highest bit of implemented ports which decides how many bytes are allocated for received FIS.
//
- MaxPortNumber = (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1);
+ MaxPortNumber = (UINT8)(UINTN)(HighBitSet32 (PortImplementBitMap) + 1);
if (MaxPortNumber == 0) {
return EFI_DEVICE_ERROR;
}
- MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS);
- Status = PciIo->AllocateBuffer (
- PciIo,
- AllocateAnyPages,
- EfiBootServicesData,
- EFI_SIZE_TO_PAGES ((UINTN) MaxReceiveFisSize),
- &Buffer,
- 0
- );
+ MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS);
+ Status = PciIo->AllocateBuffer (
+ PciIo,
+ AllocateAnyPages,
+ EfiBootServicesData,
+ EFI_SIZE_TO_PAGES ((UINTN)MaxReceiveFisSize),
+ &Buffer,
+ 0
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
@@ -2195,7 +2202,7 @@ AhciCreateTransferDescriptor (
AhciRegisters->AhciRFis = Buffer;
AhciRegisters->MaxReceiveFisSize = MaxReceiveFisSize;
- Bytes = (UINTN)MaxReceiveFisSize;
+ Bytes = (UINTN)MaxReceiveFisSize;
Status = PciIo->Map (
PciIo,
@@ -2221,22 +2228,23 @@ AhciCreateTransferDescriptor (
Status = EFI_DEVICE_ERROR;
goto Error5;
}
+
AhciRegisters->AhciRFisPciAddr = (EFI_AHCI_RECEIVED_FIS *)(UINTN)AhciRFisPciAddr;
//
// Allocate memory for command list
// Note that the implementation is a single task model which only use a command list for all ports.
//
- Buffer = NULL;
+ Buffer = NULL;
MaxCommandListSize = MaxCommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST);
- Status = PciIo->AllocateBuffer (
- PciIo,
- AllocateAnyPages,
- EfiBootServicesData,
- EFI_SIZE_TO_PAGES ((UINTN) MaxCommandListSize),
- &Buffer,
- 0
- );
+ Status = PciIo->AllocateBuffer (
+ PciIo,
+ AllocateAnyPages,
+ EfiBootServicesData,
+ EFI_SIZE_TO_PAGES ((UINTN)MaxCommandListSize),
+ &Buffer,
+ 0
+ );
if (EFI_ERROR (Status)) {
//
@@ -2250,7 +2258,7 @@ AhciCreateTransferDescriptor (
AhciRegisters->AhciCmdList = Buffer;
AhciRegisters->MaxCommandListSize = MaxCommandListSize;
- Bytes = (UINTN)MaxCommandListSize;
+ Bytes = (UINTN)MaxCommandListSize;
Status = PciIo->Map (
PciIo,
@@ -2276,20 +2284,21 @@ AhciCreateTransferDescriptor (
Status = EFI_DEVICE_ERROR;
goto Error3;
}
+
AhciRegisters->AhciCmdListPciAddr = (EFI_AHCI_COMMAND_LIST *)(UINTN)AhciCmdListPciAddr;
//
// Allocate memory for command table
// According to AHCI 1.3 spec, a PRD table can contain maximum 65535 entries.
//
- Buffer = NULL;
+ Buffer = NULL;
MaxCommandTableSize = sizeof (EFI_AHCI_COMMAND_TABLE);
Status = PciIo->AllocateBuffer (
PciIo,
AllocateAnyPages,
EfiBootServicesData,
- EFI_SIZE_TO_PAGES ((UINTN) MaxCommandTableSize),
+ EFI_SIZE_TO_PAGES ((UINTN)MaxCommandTableSize),
&Buffer,
0
);
@@ -2306,7 +2315,7 @@ AhciCreateTransferDescriptor (
AhciRegisters->AhciCommandTable = Buffer;
AhciRegisters->MaxCommandTableSize = MaxCommandTableSize;
- Bytes = (UINTN)MaxCommandTableSize;
+ Bytes = (UINTN)MaxCommandTableSize;
Status = PciIo->Map (
PciIo,
@@ -2332,6 +2341,7 @@ AhciCreateTransferDescriptor (
Status = EFI_DEVICE_ERROR;
goto Error1;
}
+
AhciRegisters->AhciCommandTablePciAddr = (EFI_AHCI_COMMAND_TABLE *)(UINTN)AhciCommandTablePciAddr;
return EFI_SUCCESS;
@@ -2346,7 +2356,7 @@ Error1:
Error2:
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) MaxCommandTableSize),
+ EFI_SIZE_TO_PAGES ((UINTN)MaxCommandTableSize),
AhciRegisters->AhciCommandTable
);
Error3:
@@ -2357,7 +2367,7 @@ Error3:
Error4:
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) MaxCommandListSize),
+ EFI_SIZE_TO_PAGES ((UINTN)MaxCommandListSize),
AhciRegisters->AhciCmdList
);
Error5:
@@ -2368,7 +2378,7 @@ Error5:
Error6:
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) MaxReceiveFisSize),
+ EFI_SIZE_TO_PAGES ((UINTN)MaxReceiveFisSize),
AhciRegisters->AhciRFis
);
@@ -2391,19 +2401,19 @@ Error6:
**/
EFI_STATUS
AhciReadLogExt (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN OUT UINT8 *Buffer,
- IN UINT8 LogNumber,
- IN UINT8 PageNumber
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT UINT8 *Buffer,
+ IN UINT8 LogNumber,
+ IN UINT8 PageNumber
)
{
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
- if (PciIo == NULL || AhciRegisters == NULL || Buffer == NULL) {
+ if ((PciIo == NULL) || (AhciRegisters == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -2450,11 +2460,11 @@ AhciReadLogExt (
**/
EFI_STATUS
AhciEnableDevSlp (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_IDENTIFY_DATA *IdentifyData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_IDENTIFY_DATA *IdentifyData
)
{
EFI_STATUS Status;
@@ -2488,19 +2498,28 @@ AhciEnableDevSlp (
DEBUG ((DEBUG_INFO, "Port CMD/DEVSLP = %08x / %08x\n", PortCmd, PortDevSlp));
if (((PortDevSlp & AHCI_PORT_DEVSLP_DSP) == 0) ||
((PortCmd & (EFI_AHCI_PORT_CMD_HPCP | EFI_AHCI_PORT_CMD_MPSP)) != 0)
- ) {
+ )
+ {
return EFI_UNSUPPORTED;
}
//
// Do not enable DevSlp if the device doesn't support DevSlp
//
- DEBUG ((DEBUG_INFO, "IDENTIFY DEVICE: [77] = %04x, [78] = %04x, [79] = %04x\n",
- IdentifyData->AtaData.reserved_77,
- IdentifyData->AtaData.serial_ata_features_supported, IdentifyData->AtaData.serial_ata_features_enabled));
+ DEBUG ((
+ DEBUG_INFO,
+ "IDENTIFY DEVICE: [77] = %04x, [78] = %04x, [79] = %04x\n",
+ IdentifyData->AtaData.reserved_77,
+ IdentifyData->AtaData.serial_ata_features_supported,
+ IdentifyData->AtaData.serial_ata_features_enabled
+ ));
if ((IdentifyData->AtaData.serial_ata_features_supported & BIT8) == 0) {
- DEBUG ((DEBUG_INFO, "DevSlp feature is not supported for device at port [%d] PortMultiplier [%d]!\n",
- Port, PortMultiplier));
+ DEBUG ((
+ DEBUG_INFO,
+ "DevSlp feature is not supported for device at port [%d] PortMultiplier [%d]!\n",
+ Port,
+ PortMultiplier
+ ));
return EFI_UNSUPPORTED;
}
@@ -2509,16 +2528,27 @@ AhciEnableDevSlp (
//
if ((IdentifyData->AtaData.serial_ata_features_enabled & BIT8) != 0) {
Status = AhciDeviceSetFeature (
- PciIo, AhciRegisters, Port, 0, ATA_SUB_CMD_ENABLE_SATA_FEATURE, 0x09, ATA_ATAPI_TIMEOUT
- );
- DEBUG ((DEBUG_INFO, "DevSlp set feature for device at port [%d] PortMultiplier [%d] - %r\n",
- Port, PortMultiplier, Status));
+ PciIo,
+ AhciRegisters,
+ Port,
+ 0,
+ ATA_SUB_CMD_ENABLE_SATA_FEATURE,
+ 0x09,
+ ATA_ATAPI_TIMEOUT
+ );
+ DEBUG ((
+ DEBUG_INFO,
+ "DevSlp set feature for device at port [%d] PortMultiplier [%d] - %r\n",
+ Port,
+ PortMultiplier,
+ Status
+ ));
if (EFI_ERROR (Status)) {
return Status;
}
}
- Status = AhciReadLogExt(PciIo, AhciRegisters, Port, PortMultiplier, LogData, 0x30, 0x08);
+ Status = AhciReadLogExt (PciIo, AhciRegisters, Port, PortMultiplier, LogData, 0x30, 0x08);
//
// Clear PxCMD.ST and PxDEVSLP.ADSE before updating PxDEVSLP.DITO and PxDEVSLP.MDAT.
@@ -2541,8 +2571,13 @@ AhciEnableDevSlp (
ZeroMem (&DevSlpTiming, sizeof (DevSlpTiming));
} else {
CopyMem (&DevSlpTiming, &LogData[48], sizeof (DevSlpTiming));
- DEBUG ((DEBUG_INFO, "DevSlpTiming: Supported(%d), Deto(%d), Madt(%d)\n",
- DevSlpTiming.Supported, DevSlpTiming.Deto, DevSlpTiming.Madt));
+ DEBUG ((
+ DEBUG_INFO,
+ "DevSlpTiming: Supported(%d), Deto(%d), Madt(%d)\n",
+ DevSlpTiming.Supported,
+ DevSlpTiming.Deto,
+ DevSlpTiming.Madt
+ ));
}
//
@@ -2574,11 +2609,16 @@ AhciEnableDevSlp (
}
}
-
AhciWriteReg (PciIo, Offset + EFI_AHCI_PORT_CMD, PortCmd);
- DEBUG ((DEBUG_INFO, "Enabled DevSlp feature at port [%d] PortMultiplier [%d], Port CMD/DEVSLP = %08x / %08x\n",
- Port, PortMultiplier, PortCmd, PortDevSlp));
+ DEBUG ((
+ DEBUG_INFO,
+ "Enabled DevSlp feature at port [%d] PortMultiplier [%d], Port CMD/DEVSLP = %08x / %08x\n",
+ Port,
+ PortMultiplier,
+ PortCmd,
+ PortDevSlp
+ ));
return EFI_SUCCESS;
}
@@ -2595,28 +2635,38 @@ AhciEnableDevSlp (
**/
EFI_STATUS
AhciSpinUpDisk (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN OUT EFI_IDENTIFY_DATA *IdentifyData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT EFI_IDENTIFY_DATA *IdentifyData
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_ATA_STATUS_BLOCK AtaStatusBlock;
- UINT8 Buffer[512];
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ UINT8 Buffer[512];
if (IdentifyData->AtaData.specific_config == ATA_SPINUP_CFG_REQUIRED_IDD_INCOMPLETE) {
//
// Use SET_FEATURE subcommand to spin up the device.
//
Status = AhciDeviceSetFeature (
- PciIo, AhciRegisters, Port, PortMultiplier,
- ATA_SUB_CMD_PUIS_SET_DEVICE_SPINUP, 0x00, ATA_SPINUP_TIMEOUT
+ PciIo,
+ AhciRegisters,
+ Port,
+ PortMultiplier,
+ ATA_SUB_CMD_PUIS_SET_DEVICE_SPINUP,
+ 0x00,
+ ATA_SPINUP_TIMEOUT
);
- DEBUG ((DEBUG_INFO, "CMD_PUIS_SET_DEVICE_SPINUP for device at port [%d] PortMultiplier [%d] - %r!\n",
- Port, PortMultiplier, Status));
+ DEBUG ((
+ DEBUG_INFO,
+ "CMD_PUIS_SET_DEVICE_SPINUP for device at port [%d] PortMultiplier [%d] - %r!\n",
+ Port,
+ PortMultiplier,
+ Status
+ ));
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2631,8 +2681,8 @@ AhciSpinUpDisk (
//
// Perform READ SECTORS PIO Data-In command to Read LBA 0
//
- AtaCommandBlock.AtaCommand = ATA_CMD_READ_SECTORS;
- AtaCommandBlock.AtaSectorCount = 0x1;
+ AtaCommandBlock.AtaCommand = ATA_CMD_READ_SECTORS;
+ AtaCommandBlock.AtaSectorCount = 0x1;
Status = AhciPioTransfer (
PciIo,
@@ -2649,8 +2699,13 @@ AhciSpinUpDisk (
ATA_SPINUP_TIMEOUT,
NULL
);
- DEBUG ((DEBUG_INFO, "Read LBA 0 for device at port [%d] PortMultiplier [%d] - %r!\n",
- Port, PortMultiplier, Status));
+ DEBUG ((
+ DEBUG_INFO,
+ "Read LBA 0 for device at port [%d] PortMultiplier [%d] - %r!\n",
+ Port,
+ PortMultiplier,
+ Status
+ ));
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2662,14 +2717,24 @@ AhciSpinUpDisk (
ZeroMem (IdentifyData, sizeof (*IdentifyData));
Status = AhciIdentify (PciIo, AhciRegisters, Port, PortMultiplier, IdentifyData);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Read IDD failed for device at port [%d] PortMultiplier [%d] - %r!\n",
- Port, PortMultiplier, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "Read IDD failed for device at port [%d] PortMultiplier [%d] - %r!\n",
+ Port,
+ PortMultiplier,
+ Status
+ ));
return Status;
}
- DEBUG ((DEBUG_INFO, "IDENTIFY DEVICE: [0] = %016x, [2] = %016x, [83] = %016x, [86] = %016x\n",
- IdentifyData->AtaData.config, IdentifyData->AtaData.specific_config,
- IdentifyData->AtaData.command_set_supported_83, IdentifyData->AtaData.command_set_feature_enb_86));
+ DEBUG ((
+ DEBUG_INFO,
+ "IDENTIFY DEVICE: [0] = %016x, [2] = %016x, [83] = %016x, [86] = %016x\n",
+ IdentifyData->AtaData.config,
+ IdentifyData->AtaData.specific_config,
+ IdentifyData->AtaData.command_set_supported_83,
+ IdentifyData->AtaData.command_set_feature_enb_86
+ ));
//
// Check if IDD is incomplete
//
@@ -2691,13 +2756,13 @@ AhciSpinUpDisk (
**/
EFI_STATUS
AhciPuisEnable (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EFI_SUCCESS;
if (mAtaAtapiPolicy->PuisEnable == 0) {
@@ -2705,10 +2770,17 @@ AhciPuisEnable (
} else if (mAtaAtapiPolicy->PuisEnable == 1) {
Status = AhciDeviceSetFeature (PciIo, AhciRegisters, Port, PortMultiplier, ATA_SUB_CMD_ENABLE_PUIS, 0x00, ATA_ATAPI_TIMEOUT);
}
- DEBUG ((DEBUG_INFO, "%a PUIS feature at port [%d] PortMultiplier [%d] - %r!\n",
+
+ DEBUG ((
+ DEBUG_INFO,
+ "%a PUIS feature at port [%d] PortMultiplier [%d] - %r!\n",
(mAtaAtapiPolicy->PuisEnable == 0) ? "Disable" : (
- (mAtaAtapiPolicy->PuisEnable == 1) ? "Enable" : "Skip"
- ), Port, PortMultiplier, Status));
+ (mAtaAtapiPolicy->PuisEnable == 1) ? "Enable" : "Skip"
+ ),
+ Port,
+ PortMultiplier,
+ Status
+ ));
return Status;
}
@@ -2723,28 +2795,28 @@ AhciPuisEnable (
EFI_STATUS
EFIAPI
AhciModeInitialization (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
- UINT32 Capability;
- UINT8 MaxPortNumber;
- UINT32 PortImplementBitMap;
-
- EFI_AHCI_REGISTERS *AhciRegisters;
-
- UINT8 Port;
- DATA_64 Data64;
- UINT32 Offset;
- UINT32 Data;
- EFI_IDENTIFY_DATA Buffer;
- EFI_ATA_DEVICE_TYPE DeviceType;
- EFI_ATA_COLLECTIVE_MODE *SupportedModes;
- EFI_ATA_TRANSFER_MODE TransferMode;
- UINT32 PhyDetectDelay;
- UINT32 Value;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
+ UINT32 Capability;
+ UINT8 MaxPortNumber;
+ UINT32 PortImplementBitMap;
+
+ EFI_AHCI_REGISTERS *AhciRegisters;
+
+ UINT8 Port;
+ DATA_64 Data64;
+ UINT32 Offset;
+ UINT32 Data;
+ EFI_IDENTIFY_DATA Buffer;
+ EFI_ATA_DEVICE_TYPE DeviceType;
+ EFI_ATA_COLLECTIVE_MODE *SupportedModes;
+ EFI_ATA_TRANSFER_MODE TransferMode;
+ UINT32 PhyDetectDelay;
+ UINT32 Value;
if (Instance == NULL) {
return EFI_INVALID_PARAMETER;
@@ -2767,7 +2839,7 @@ AhciModeInitialization (
//
// Make sure that GHC.AE bit is set before accessing any AHCI registers.
//
- Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);
+ Value = AhciReadReg (PciIo, EFI_AHCI_GHC_OFFSET);
if ((Value & EFI_AHCI_GHC_ENABLE) == 0) {
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
@@ -2785,31 +2857,33 @@ AhciModeInitialization (
NULL
);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"AhciModeInitialization: failed to enable 64-bit DMA on 64-bit capable controller (%r)\n",
- Status));
+ Status
+ ));
}
}
//
// Get the number of command slots per port supported by this HBA.
//
- MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1);
+ MaxPortNumber = (UINT8)((Capability & 0x1F) + 1);
//
// Get the bit map of those ports exposed by this HBA.
// It indicates which ports that the HBA supports are available for software to use.
//
- PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);
+ PortImplementBitMap = AhciReadReg (PciIo, EFI_AHCI_PI_OFFSET);
AhciRegisters = &Instance->AhciRegisters;
- Status = AhciCreateTransferDescriptor (PciIo, AhciRegisters);
+ Status = AhciCreateTransferDescriptor (PciIo, AhciRegisters);
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- for (Port = 0; Port < EFI_AHCI_MAX_PORTS; Port ++) {
+ for (Port = 0; Port < EFI_AHCI_MAX_PORTS; Port++) {
if ((PortImplementBitMap & (((UINT32)BIT0) << Port)) != 0) {
//
// According to AHCI spec, MaxPortNumber should be equal or greater than the number of implemented ports.
@@ -2827,20 +2901,20 @@ AhciModeInitialization (
//
// Initialize FIS Base Address Register and Command List Base Address Register for use.
//
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFisPciAddr) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port;
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_FB;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciRFisPciAddr) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_FB;
AhciWriteReg (PciIo, Offset, Data64.Uint32.Lower32);
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_FBU;
AhciWriteReg (PciIo, Offset, Data64.Uint32.Upper32);
- Data64.Uint64 = (UINTN) (AhciRegisters->AhciCmdListPciAddr);
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CLB;
+ Data64.Uint64 = (UINTN)(AhciRegisters->AhciCmdListPciAddr);
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CLB;
AhciWriteReg (PciIo, Offset, Data64.Uint32.Lower32);
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CLBU;
AhciWriteReg (PciIo, Offset, Data64.Uint32.Upper32);
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
- Data = AhciReadReg (PciIo, Offset);
+ Data = AhciReadReg (PciIo, Offset);
if ((Data & EFI_AHCI_PORT_CMD_CPD) != 0) {
AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_POD);
}
@@ -2875,7 +2949,7 @@ AhciModeInitialization (
// Wait for the Phy to detect the presence of a device.
//
PhyDetectDelay = EFI_AHCI_BUS_PHY_DETECT_TIMEOUT;
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;
do {
Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK;
if ((Data == EFI_AHCI_PORT_SSTS_DET_PCE) || (Data == EFI_AHCI_PORT_SSTS_DET)) {
@@ -2910,7 +2984,7 @@ AhciModeInitialization (
Offset,
0x0000FFFF,
0x00000101,
- EFI_TIMER_PERIOD_SECONDS(16)
+ EFI_TIMER_PERIOD_SECONDS (16)
);
if (EFI_ERROR (Status)) {
continue;
@@ -2934,9 +3008,12 @@ AhciModeInitialization (
}
DEBUG ((
- DEBUG_INFO, "IDENTIFY DEVICE: [0] = %016x, [2] = %016x, [83] = %016x, [86] = %016x\n",
- Buffer.AtaData.config, Buffer.AtaData.specific_config,
- Buffer.AtaData.command_set_supported_83, Buffer.AtaData.command_set_feature_enb_86
+ DEBUG_INFO,
+ "IDENTIFY DEVICE: [0] = %016x, [2] = %016x, [83] = %016x, [86] = %016x\n",
+ Buffer.AtaData.config,
+ Buffer.AtaData.specific_config,
+ Buffer.AtaData.command_set_supported_83,
+ Buffer.AtaData.command_set_feature_enb_86
));
if ((Buffer.AtaData.config & BIT2) != 0) {
//
@@ -2959,8 +3036,14 @@ AhciModeInitialization (
} else {
continue;
}
- DEBUG ((DEBUG_INFO, "port [%d] port multitplier [%d] has a [%a]\n",
- Port, 0, DeviceType == EfiIdeCdrom ? "cdrom" : "harddisk"));
+
+ DEBUG ((
+ DEBUG_INFO,
+ "port [%d] port multitplier [%d] has a [%a]\n",
+ Port,
+ 0,
+ DeviceType == EfiIdeCdrom ? "cdrom" : "harddisk"
+ ));
//
// If the device is a hard disk, then try to enable S.M.A.R.T feature
@@ -3004,7 +3087,7 @@ AhciModeInitialization (
TransferMode.ModeCategory = EFI_ATA_MODE_FLOW_PIO;
}
- TransferMode.ModeNumber = (UINT8) (SupportedModes->PioMode.Mode);
+ TransferMode.ModeNumber = (UINT8)(SupportedModes->PioMode.Mode);
//
// Set supported DMA mode on this IDE device. Note that UDMA & MDMA can't
@@ -3014,10 +3097,10 @@ AhciModeInitialization (
//
if (SupportedModes->UdmaMode.Valid) {
TransferMode.ModeCategory = EFI_ATA_MODE_UDMA;
- TransferMode.ModeNumber = (UINT8) (SupportedModes->UdmaMode.Mode);
+ TransferMode.ModeNumber = (UINT8)(SupportedModes->UdmaMode.Mode);
} else if (SupportedModes->MultiWordDmaMode.Valid) {
TransferMode.ModeCategory = EFI_ATA_MODE_MDMA;
- TransferMode.ModeNumber = (UINT8) SupportedModes->MultiWordDmaMode.Mode;
+ TransferMode.ModeNumber = (UINT8)SupportedModes->MultiWordDmaMode.Mode;
}
Status = AhciDeviceSetFeature (PciIo, AhciRegisters, Port, 0, 0x03, (UINT32)(*(UINT8 *)&TransferMode), ATA_ATAPI_TIMEOUT);
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index ced2648970..7802ebd200 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -5,192 +5,193 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef __ATA_HC_AHCI_MODE_H__
#define __ATA_HC_AHCI_MODE_H__
-#define EFI_AHCI_BAR_INDEX 0x05
+#define EFI_AHCI_BAR_INDEX 0x05
-#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
-#define EFI_AHCI_CAP_SAM BIT18
-#define EFI_AHCI_CAP_SSS BIT27
-#define EFI_AHCI_CAP_S64A BIT31
-#define EFI_AHCI_GHC_OFFSET 0x0004
-#define EFI_AHCI_GHC_RESET BIT0
-#define EFI_AHCI_GHC_IE BIT1
-#define EFI_AHCI_GHC_ENABLE BIT31
-#define EFI_AHCI_IS_OFFSET 0x0008
-#define EFI_AHCI_PI_OFFSET 0x000C
+#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
+#define EFI_AHCI_CAP_SAM BIT18
+#define EFI_AHCI_CAP_SSS BIT27
+#define EFI_AHCI_CAP_S64A BIT31
+#define EFI_AHCI_GHC_OFFSET 0x0004
+#define EFI_AHCI_GHC_RESET BIT0
+#define EFI_AHCI_GHC_IE BIT1
+#define EFI_AHCI_GHC_ENABLE BIT31
+#define EFI_AHCI_IS_OFFSET 0x0008
+#define EFI_AHCI_PI_OFFSET 0x000C
-#define EFI_AHCI_MAX_PORTS 32
+#define EFI_AHCI_MAX_PORTS 32
-#define AHCI_CAPABILITY2_OFFSET 0x0024
-#define AHCI_CAP2_SDS BIT3
-#define AHCI_CAP2_SADM BIT4
+#define AHCI_CAPABILITY2_OFFSET 0x0024
+#define AHCI_CAP2_SDS BIT3
+#define AHCI_CAP2_SADM BIT4
typedef struct {
- UINT32 Lower32;
- UINT32 Upper32;
+ UINT32 Lower32;
+ UINT32 Upper32;
} DATA_32;
typedef union {
- DATA_32 Uint32;
- UINT64 Uint64;
+ DATA_32 Uint32;
+ UINT64 Uint64;
} DATA_64;
//
// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
// Add a bit of margin for robustness.
//
-#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
+#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
//
// Refer SATA1.0a spec, the FIS enable time should be less than 500ms.
//
-#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)
+#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)
//
// Refer SATA1.0a spec, the bus reset time should be less than 1s.
//
-#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)
+#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)
-#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000
-#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000
-#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000
-#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000
+#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000
+#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000
+#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000
+#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000
//
// Each PRDT entry can point to a memory block up to 4M byte
//
-#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000
-
-#define EFI_AHCI_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device
-#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20
-#define EFI_AHCI_FIS_REGISTER_D2H 0x34 //Register FIS - Device to Host
-#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20
-#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39 //DMA Activate FIS - Device to Host
-#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4
-#define EFI_AHCI_FIS_DMA_SETUP 0x41 //DMA Setup FIS - Bi-directional
-#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28
-#define EFI_AHCI_FIS_DATA 0x46 //Data FIS - Bi-directional
-#define EFI_AHCI_FIS_BIST 0x58 //BIST Activate FIS - Bi-directional
-#define EFI_AHCI_FIS_BIST_LENGTH 12
-#define EFI_AHCI_FIS_PIO_SETUP 0x5F //PIO Setup FIS - Device to Host
-#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20
-#define EFI_AHCI_FIS_SET_DEVICE 0xA1 //Set Device Bits FIS - Device to Host
-#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8
-
-#define EFI_AHCI_D2H_FIS_OFFSET 0x40
-#define EFI_AHCI_DMA_FIS_OFFSET 0x00
-#define EFI_AHCI_PIO_FIS_OFFSET 0x20
-#define EFI_AHCI_SDB_FIS_OFFSET 0x58
-#define EFI_AHCI_FIS_TYPE_MASK 0xFF
-#define EFI_AHCI_U_FIS_OFFSET 0x60
+#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000
+
+#define EFI_AHCI_FIS_REGISTER_H2D 0x27 // Register FIS - Host to Device
+#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20
+#define EFI_AHCI_FIS_REGISTER_D2H 0x34 // Register FIS - Device to Host
+#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20
+#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39 // DMA Activate FIS - Device to Host
+#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4
+#define EFI_AHCI_FIS_DMA_SETUP 0x41 // DMA Setup FIS - Bi-directional
+#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28
+#define EFI_AHCI_FIS_DATA 0x46 // Data FIS - Bi-directional
+#define EFI_AHCI_FIS_BIST 0x58 // BIST Activate FIS - Bi-directional
+#define EFI_AHCI_FIS_BIST_LENGTH 12
+#define EFI_AHCI_FIS_PIO_SETUP 0x5F // PIO Setup FIS - Device to Host
+#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20
+#define EFI_AHCI_FIS_SET_DEVICE 0xA1 // Set Device Bits FIS - Device to Host
+#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8
+
+#define EFI_AHCI_D2H_FIS_OFFSET 0x40
+#define EFI_AHCI_DMA_FIS_OFFSET 0x00
+#define EFI_AHCI_PIO_FIS_OFFSET 0x20
+#define EFI_AHCI_SDB_FIS_OFFSET 0x58
+#define EFI_AHCI_FIS_TYPE_MASK 0xFF
+#define EFI_AHCI_U_FIS_OFFSET 0x60
//
// Port register
//
-#define EFI_AHCI_PORT_START 0x0100
-#define EFI_AHCI_PORT_REG_WIDTH 0x0080
-#define EFI_AHCI_PORT_CLB 0x0000
-#define EFI_AHCI_PORT_CLBU 0x0004
-#define EFI_AHCI_PORT_FB 0x0008
-#define EFI_AHCI_PORT_FBU 0x000C
-#define EFI_AHCI_PORT_IS 0x0010
-#define EFI_AHCI_PORT_IS_DHRS BIT0
-#define EFI_AHCI_PORT_IS_PSS BIT1
-#define EFI_AHCI_PORT_IS_DSS BIT2
-#define EFI_AHCI_PORT_IS_SDBS BIT3
-#define EFI_AHCI_PORT_IS_UFS BIT4
-#define EFI_AHCI_PORT_IS_DPS BIT5
-#define EFI_AHCI_PORT_IS_PCS BIT6
-#define EFI_AHCI_PORT_IS_DIS BIT7
-#define EFI_AHCI_PORT_IS_PRCS BIT22
-#define EFI_AHCI_PORT_IS_IPMS BIT23
-#define EFI_AHCI_PORT_IS_OFS BIT24
-#define EFI_AHCI_PORT_IS_INFS BIT26
-#define EFI_AHCI_PORT_IS_IFS BIT27
-#define EFI_AHCI_PORT_IS_HBDS BIT28
-#define EFI_AHCI_PORT_IS_HBFS BIT29
-#define EFI_AHCI_PORT_IS_TFES BIT30
-#define EFI_AHCI_PORT_IS_CPDS BIT31
-#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF
-#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F
-#define EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS | EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
-#define EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
-
-#define EFI_AHCI_PORT_IE 0x0014
-#define EFI_AHCI_PORT_CMD 0x0018
-#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE
-#define EFI_AHCI_PORT_CMD_ST BIT0
-#define EFI_AHCI_PORT_CMD_SUD BIT1
-#define EFI_AHCI_PORT_CMD_POD BIT2
-#define EFI_AHCI_PORT_CMD_CLO BIT3
-#define EFI_AHCI_PORT_CMD_FRE BIT4
-#define EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 | BIT9 | BIT10 | BIT11 | BIT12)
-#define EFI_AHCI_PORT_CMD_CCS_SHIFT 8
-#define EFI_AHCI_PORT_CMD_FR BIT14
-#define EFI_AHCI_PORT_CMD_CR BIT15
-#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL)
-#define EFI_AHCI_PORT_CMD_PMA BIT17
-#define EFI_AHCI_PORT_CMD_HPCP BIT18
-#define EFI_AHCI_PORT_CMD_MPSP BIT19
-#define EFI_AHCI_PORT_CMD_CPD BIT20
-#define EFI_AHCI_PORT_CMD_ESP BIT21
-#define EFI_AHCI_PORT_CMD_ATAPI BIT24
-#define EFI_AHCI_PORT_CMD_DLAE BIT25
-#define EFI_AHCI_PORT_CMD_ALPE BIT26
-#define EFI_AHCI_PORT_CMD_ASP BIT27
-#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
-#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )
-#define EFI_AHCI_PORT_TFD 0x0020
-#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
-#define EFI_AHCI_PORT_TFD_BSY BIT7
-#define EFI_AHCI_PORT_TFD_DRQ BIT3
-#define EFI_AHCI_PORT_TFD_ERR BIT0
-#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00
-#define EFI_AHCI_PORT_SIG 0x0024
-#define EFI_AHCI_PORT_SSTS 0x0028
-#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F
-#define EFI_AHCI_PORT_SSTS_DET 0x0001
-#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003
-#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0
-#define EFI_AHCI_PORT_SCTL 0x002C
-#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F
-#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)
-#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001
-#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003
-#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0
-#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00
-#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300
-#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100
-#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200
-#define EFI_AHCI_PORT_SERR 0x0030
-#define EFI_AHCI_PORT_SERR_RDIE BIT0
-#define EFI_AHCI_PORT_SERR_RCE BIT1
-#define EFI_AHCI_PORT_SERR_TDIE BIT8
-#define EFI_AHCI_PORT_SERR_PCDIE BIT9
-#define EFI_AHCI_PORT_SERR_PE BIT10
-#define EFI_AHCI_PORT_SERR_IE BIT11
-#define EFI_AHCI_PORT_SERR_PRC BIT16
-#define EFI_AHCI_PORT_SERR_PIE BIT17
-#define EFI_AHCI_PORT_SERR_CW BIT18
-#define EFI_AHCI_PORT_SERR_BDE BIT19
-#define EFI_AHCI_PORT_SERR_DE BIT20
-#define EFI_AHCI_PORT_SERR_CRCE BIT21
-#define EFI_AHCI_PORT_SERR_HE BIT22
-#define EFI_AHCI_PORT_SERR_LSE BIT23
-#define EFI_AHCI_PORT_SERR_TSTE BIT24
-#define EFI_AHCI_PORT_SERR_UFT BIT25
-#define EFI_AHCI_PORT_SERR_EX BIT26
-#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF
-#define EFI_AHCI_PORT_SACT 0x0034
-#define EFI_AHCI_PORT_CI 0x0038
-#define EFI_AHCI_PORT_SNTF 0x003C
-#define AHCI_PORT_DEVSLP 0x0044
-#define AHCI_PORT_DEVSLP_ADSE BIT0
-#define AHCI_PORT_DEVSLP_DSP BIT1
-#define AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC
-#define AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00
-#define AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000
-#define AHCI_PORT_DEVSLP_DM_MASK 0x1E000000
+#define EFI_AHCI_PORT_START 0x0100
+#define EFI_AHCI_PORT_REG_WIDTH 0x0080
+#define EFI_AHCI_PORT_CLB 0x0000
+#define EFI_AHCI_PORT_CLBU 0x0004
+#define EFI_AHCI_PORT_FB 0x0008
+#define EFI_AHCI_PORT_FBU 0x000C
+#define EFI_AHCI_PORT_IS 0x0010
+#define EFI_AHCI_PORT_IS_DHRS BIT0
+#define EFI_AHCI_PORT_IS_PSS BIT1
+#define EFI_AHCI_PORT_IS_DSS BIT2
+#define EFI_AHCI_PORT_IS_SDBS BIT3
+#define EFI_AHCI_PORT_IS_UFS BIT4
+#define EFI_AHCI_PORT_IS_DPS BIT5
+#define EFI_AHCI_PORT_IS_PCS BIT6
+#define EFI_AHCI_PORT_IS_DIS BIT7
+#define EFI_AHCI_PORT_IS_PRCS BIT22
+#define EFI_AHCI_PORT_IS_IPMS BIT23
+#define EFI_AHCI_PORT_IS_OFS BIT24
+#define EFI_AHCI_PORT_IS_INFS BIT26
+#define EFI_AHCI_PORT_IS_IFS BIT27
+#define EFI_AHCI_PORT_IS_HBDS BIT28
+#define EFI_AHCI_PORT_IS_HBFS BIT29
+#define EFI_AHCI_PORT_IS_TFES BIT30
+#define EFI_AHCI_PORT_IS_CPDS BIT31
+#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF
+#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F
+#define EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS | EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
+#define EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
+
+#define EFI_AHCI_PORT_IE 0x0014
+#define EFI_AHCI_PORT_CMD 0x0018
+#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE
+#define EFI_AHCI_PORT_CMD_ST BIT0
+#define EFI_AHCI_PORT_CMD_SUD BIT1
+#define EFI_AHCI_PORT_CMD_POD BIT2
+#define EFI_AHCI_PORT_CMD_CLO BIT3
+#define EFI_AHCI_PORT_CMD_FRE BIT4
+#define EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 | BIT9 | BIT10 | BIT11 | BIT12)
+#define EFI_AHCI_PORT_CMD_CCS_SHIFT 8
+#define EFI_AHCI_PORT_CMD_FR BIT14
+#define EFI_AHCI_PORT_CMD_CR BIT15
+#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL)
+#define EFI_AHCI_PORT_CMD_PMA BIT17
+#define EFI_AHCI_PORT_CMD_HPCP BIT18
+#define EFI_AHCI_PORT_CMD_MPSP BIT19
+#define EFI_AHCI_PORT_CMD_CPD BIT20
+#define EFI_AHCI_PORT_CMD_ESP BIT21
+#define EFI_AHCI_PORT_CMD_ATAPI BIT24
+#define EFI_AHCI_PORT_CMD_DLAE BIT25
+#define EFI_AHCI_PORT_CMD_ALPE BIT26
+#define EFI_AHCI_PORT_CMD_ASP BIT27
+#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
+#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )
+#define EFI_AHCI_PORT_TFD 0x0020
+#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
+#define EFI_AHCI_PORT_TFD_BSY BIT7
+#define EFI_AHCI_PORT_TFD_DRQ BIT3
+#define EFI_AHCI_PORT_TFD_ERR BIT0
+#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00
+#define EFI_AHCI_PORT_SIG 0x0024
+#define EFI_AHCI_PORT_SSTS 0x0028
+#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F
+#define EFI_AHCI_PORT_SSTS_DET 0x0001
+#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003
+#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0
+#define EFI_AHCI_PORT_SCTL 0x002C
+#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F
+#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)
+#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001
+#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003
+#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0
+#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00
+#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300
+#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100
+#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200
+#define EFI_AHCI_PORT_SERR 0x0030
+#define EFI_AHCI_PORT_SERR_RDIE BIT0
+#define EFI_AHCI_PORT_SERR_RCE BIT1
+#define EFI_AHCI_PORT_SERR_TDIE BIT8
+#define EFI_AHCI_PORT_SERR_PCDIE BIT9
+#define EFI_AHCI_PORT_SERR_PE BIT10
+#define EFI_AHCI_PORT_SERR_IE BIT11
+#define EFI_AHCI_PORT_SERR_PRC BIT16
+#define EFI_AHCI_PORT_SERR_PIE BIT17
+#define EFI_AHCI_PORT_SERR_CW BIT18
+#define EFI_AHCI_PORT_SERR_BDE BIT19
+#define EFI_AHCI_PORT_SERR_DE BIT20
+#define EFI_AHCI_PORT_SERR_CRCE BIT21
+#define EFI_AHCI_PORT_SERR_HE BIT22
+#define EFI_AHCI_PORT_SERR_LSE BIT23
+#define EFI_AHCI_PORT_SERR_TSTE BIT24
+#define EFI_AHCI_PORT_SERR_UFT BIT25
+#define EFI_AHCI_PORT_SERR_EX BIT26
+#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF
+#define EFI_AHCI_PORT_SACT 0x0034
+#define EFI_AHCI_PORT_CI 0x0038
+#define EFI_AHCI_PORT_SNTF 0x003C
+#define AHCI_PORT_DEVSLP 0x0044
+#define AHCI_PORT_DEVSLP_ADSE BIT0
+#define AHCI_PORT_DEVSLP_DSP BIT1
+#define AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC
+#define AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00
+#define AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000
+#define AHCI_PORT_DEVSLP_DM_MASK 0x1E000000
#define AHCI_COMMAND_RETRIES 5
@@ -200,20 +201,20 @@ typedef union {
// The entry data structure is listed at the following.
//
typedef struct {
- UINT32 AhciCmdCfl:5; //Command FIS Length
- UINT32 AhciCmdA:1; //ATAPI
- UINT32 AhciCmdW:1; //Write
- UINT32 AhciCmdP:1; //Prefetchable
- UINT32 AhciCmdR:1; //Reset
- UINT32 AhciCmdB:1; //BIST
- UINT32 AhciCmdC:1; //Clear Busy upon R_OK
- UINT32 AhciCmdRsvd:1;
- UINT32 AhciCmdPmp:4; //Port Multiplier Port
- UINT32 AhciCmdPrdtl:16; //Physical Region Descriptor Table Length
- UINT32 AhciCmdPrdbc; //Physical Region Descriptor Byte Count
- UINT32 AhciCmdCtba; //Command Table Descriptor Base Address
- UINT32 AhciCmdCtbau; //Command Table Descriptor Base Address Upper 32-BITs
- UINT32 AhciCmdRsvd1[4];
+ UINT32 AhciCmdCfl : 5; // Command FIS Length
+ UINT32 AhciCmdA : 1; // ATAPI
+ UINT32 AhciCmdW : 1; // Write
+ UINT32 AhciCmdP : 1; // Prefetchable
+ UINT32 AhciCmdR : 1; // Reset
+ UINT32 AhciCmdB : 1; // BIST
+ UINT32 AhciCmdC : 1; // Clear Busy upon R_OK
+ UINT32 AhciCmdRsvd : 1;
+ UINT32 AhciCmdPmp : 4; // Port Multiplier Port
+ UINT32 AhciCmdPrdtl : 16; // Physical Region Descriptor Table Length
+ UINT32 AhciCmdPrdbc; // Physical Region Descriptor Byte Count
+ UINT32 AhciCmdCtba; // Command Table Descriptor Base Address
+ UINT32 AhciCmdCtbau; // Command Table Descriptor Base Address Upper 32-BITs
+ UINT32 AhciCmdRsvd1[4];
} EFI_AHCI_COMMAND_LIST;
//
@@ -223,11 +224,11 @@ typedef struct {
//
typedef struct {
UINT8 AhciCFisType;
- UINT8 AhciCFisPmNum:4;
- UINT8 AhciCFisRsvd:1;
- UINT8 AhciCFisRsvd1:1;
- UINT8 AhciCFisRsvd2:1;
- UINT8 AhciCFisCmdInd:1;
+ UINT8 AhciCFisPmNum : 4;
+ UINT8 AhciCFisRsvd : 1;
+ UINT8 AhciCFisRsvd1 : 1;
+ UINT8 AhciCFisRsvd2 : 1;
+ UINT8 AhciCFisCmdInd : 1;
UINT8 AhciCFisCmd;
UINT8 AhciCFisFeature;
UINT8 AhciCFisSecNum;
@@ -266,12 +267,12 @@ typedef struct {
// list entry for this command slot.
//
typedef struct {
- UINT32 AhciPrdtDba; //Data Base Address
- UINT32 AhciPrdtDbau; //Data Base Address Upper 32-BITs
- UINT32 AhciPrdtRsvd;
- UINT32 AhciPrdtDbc:22; //Data Byte Count
- UINT32 AhciPrdtRsvd1:9;
- UINT32 AhciPrdtIoc:1; //Interrupt on Completion
+ UINT32 AhciPrdtDba; // Data Base Address
+ UINT32 AhciPrdtDbau; // Data Base Address Upper 32-BITs
+ UINT32 AhciPrdtRsvd;
+ UINT32 AhciPrdtDbc : 22; // Data Byte Count
+ UINT32 AhciPrdtRsvd1 : 9;
+ UINT32 AhciPrdtIoc : 1; // Interrupt on Completion
} EFI_AHCI_COMMAND_PRDT;
//
@@ -288,24 +289,24 @@ typedef struct {
// Received FIS structure
//
typedef struct {
- UINT8 AhciDmaSetupFis[0x1C]; // Dma Setup Fis: offset 0x00
- UINT8 AhciDmaSetupFisRsvd[0x04];
- UINT8 AhciPioSetupFis[0x14]; // Pio Setup Fis: offset 0x20
- UINT8 AhciPioSetupFisRsvd[0x0C];
- UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40
- UINT8 AhciD2HRegisterFisRsvd[0x04];
- UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58
- UINT8 AhciUnknownFis[0x40]; // Unknown Fis: offset 0x60
- UINT8 AhciUnknownFisRsvd[0x60];
+ UINT8 AhciDmaSetupFis[0x1C]; // Dma Setup Fis: offset 0x00
+ UINT8 AhciDmaSetupFisRsvd[0x04];
+ UINT8 AhciPioSetupFis[0x14]; // Pio Setup Fis: offset 0x20
+ UINT8 AhciPioSetupFisRsvd[0x0C];
+ UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40
+ UINT8 AhciD2HRegisterFisRsvd[0x04];
+ UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58
+ UINT8 AhciUnknownFis[0x40]; // Unknown Fis: offset 0x60
+ UINT8 AhciUnknownFisRsvd[0x60];
} EFI_AHCI_RECEIVED_FIS;
typedef struct {
- UINT8 Madt : 5;
- UINT8 Reserved_5 : 3;
- UINT8 Deto;
- UINT16 Reserved_16;
- UINT32 Reserved_32 : 31;
- UINT32 Supported : 1;
+ UINT8 Madt : 5;
+ UINT8 Reserved_5 : 3;
+ UINT8 Deto;
+ UINT16 Reserved_16;
+ UINT32 Reserved_32 : 31;
+ UINT32 Supported : 1;
} DEVSLP_TIMING_VARIABLES;
#pragma pack()
@@ -343,11 +344,11 @@ typedef struct {
EFI_STATUS
EFIAPI
AhciPacketCommandExecute (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
);
/**
@@ -366,10 +367,10 @@ AhciPacketCommandExecute (
EFI_STATUS
EFIAPI
AhciStartCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT8 CommandSlot,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT8 CommandSlot,
+ IN UINT64 Timeout
);
/**
@@ -387,10 +388,9 @@ AhciStartCommand (
EFI_STATUS
EFIAPI
AhciStopCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Port,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Port,
+ IN UINT64 Timeout
);
#endif
-
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
index 1c94b5f39d..1070516b35 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
@@ -12,7 +12,7 @@
//
// EFI_DRIVER_BINDING_PROTOCOL instance
//
-EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding = {
AtaAtapiPassThruSupported,
AtaAtapiPassThruStart,
AtaAtapiPassThruStop,
@@ -21,7 +21,7 @@ EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding = {
NULL
};
-ATA_ATAPI_PASS_THRU_INSTANCE gAtaAtapiPassThruInstanceTemplate = {
+ATA_ATAPI_PASS_THRU_INSTANCE gAtaAtapiPassThruInstanceTemplate = {
ATA_ATAPI_PASS_THRU_SIGNATURE,
0, // Controller Handle
NULL, // PciIo Protocol
@@ -78,8 +78,8 @@ ATA_ATAPI_PASS_THRU_INSTANCE gAtaAtapiPassThruInstanceTemplate = {
},
EfiAtaUnknownMode, // Work Mode
{ // IdeRegisters
- {0},
- {0}
+ { 0 },
+ { 0 }
},
{ // AhciRegisters
0
@@ -101,13 +101,13 @@ ATA_ATAPI_PASS_THRU_INSTANCE gAtaAtapiPassThruInstanceTemplate = {
}
};
-ATAPI_DEVICE_PATH mAtapiDevicePathTemplate = {
+ATAPI_DEVICE_PATH mAtapiDevicePathTemplate = {
{
MESSAGING_DEVICE_PATH,
MSG_ATAPI_DP,
{
- (UINT8) (sizeof (ATAPI_DEVICE_PATH)),
- (UINT8) ((sizeof (ATAPI_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (ATAPI_DEVICE_PATH)),
+ (UINT8)((sizeof (ATAPI_DEVICE_PATH)) >> 8)
}
},
0,
@@ -115,13 +115,13 @@ ATAPI_DEVICE_PATH mAtapiDevicePathTemplate = {
0
};
-SATA_DEVICE_PATH mSataDevicePathTemplate = {
+SATA_DEVICE_PATH mSataDevicePathTemplate = {
{
MESSAGING_DEVICE_PATH,
MSG_SATA_DP,
{
- (UINT8) (sizeof (SATA_DEVICE_PATH)),
- (UINT8) ((sizeof (SATA_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (SATA_DEVICE_PATH)),
+ (UINT8)((sizeof (SATA_DEVICE_PATH)) >> 8)
}
},
0,
@@ -129,15 +129,15 @@ SATA_DEVICE_PATH mSataDevicePathTemplate = {
0
};
-UINT8 mScsiId[TARGET_MAX_BYTES] = {
+UINT8 mScsiId[TARGET_MAX_BYTES] = {
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF
};
-EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
-EDKII_ATA_ATAPI_POLICY_PROTOCOL mDefaultAtaAtapiPolicy = {
+EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
+EDKII_ATA_ATAPI_POLICY_PROTOCOL mDefaultAtaAtapiPolicy = {
EDKII_ATA_ATAPI_POLICY_VERSION,
2, // PuisEnable
0, // DeviceSleepEnable
@@ -183,11 +183,11 @@ EDKII_ATA_ATAPI_POLICY_PROTOCOL mDefaultAtaAtapiPolicy = {
EFI_STATUS
EFIAPI
AtaPassThruPassThruExecute (
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN ATA_NONBLOCK_TASK *Task OPTIONAL
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN ATA_NONBLOCK_TASK *Task OPTIONAL
)
{
EFI_ATA_PASS_THRU_CMD_PROTOCOL Protocol;
@@ -271,11 +271,12 @@ AtaPassThruPassThruExecute (
Task
);
break;
- default :
+ default:
return EFI_UNSUPPORTED;
}
+
break;
- case EfiAtaAhciMode :
+ case EfiAtaAhciMode:
if (PortMultiplierPort == 0xFFFF) {
//
// If there is no port multiplier, PortMultiplierPort will be 0xFFFF
@@ -284,6 +285,7 @@ AtaPassThruPassThruExecute (
//
PortMultiplierPort = 0;
}
+
switch (Protocol) {
case EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA:
Status = AhciNonDataTransfer (
@@ -367,9 +369,10 @@ AtaPassThruPassThruExecute (
Task
);
break;
- default :
+ default:
return EFI_UNSUPPORTED;
}
+
break;
default:
@@ -392,16 +395,16 @@ VOID
EFIAPI
AsyncNonBlockingTransferRoutine (
EFI_EVENT Event,
- VOID* Context
+ VOID *Context
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *EntryHeader;
- ATA_NONBLOCK_TASK *Task;
- EFI_STATUS Status;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *EntryHeader;
+ ATA_NONBLOCK_TASK *Task;
+ EFI_STATUS Status;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- Instance = (ATA_ATAPI_PASS_THRU_INSTANCE *) Context;
+ Instance = (ATA_ATAPI_PASS_THRU_INSTANCE *)Context;
EntryHeader = &Instance->NonBlockingTaskList;
//
// Get the Tasks from the Tasks List and execute it, until there is
@@ -459,11 +462,11 @@ AsyncNonBlockingTransferRoutine (
EFI_STATUS
EFIAPI
InitializeAtaAtapiPassThru (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -526,9 +529,9 @@ InitializeAtaAtapiPassThru (
EFI_STATUS
EFIAPI
AtaAtapiPassThruSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
@@ -544,7 +547,7 @@ AtaAtapiPassThruSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID *) &ParentDevicePath,
+ (VOID *)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -555,20 +558,21 @@ AtaAtapiPassThruSupported (
//
return Status;
}
+
//
// Close the protocol because we don't use it here
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
Status = gBS->OpenProtocol (
Controller,
&gEfiIdeControllerInitProtocolGuid,
- (VOID **) &IdeControllerInit,
+ (VOID **)&IdeControllerInit,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -585,11 +589,11 @@ AtaAtapiPassThruSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiIdeControllerInitProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiIdeControllerInitProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Now test the EfiPciIoProtocol
@@ -597,7 +601,7 @@ AtaAtapiPassThruSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -605,6 +609,7 @@ AtaAtapiPassThruSupported (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Now further check the PCI header: Base class (offset 0x0B) and
// Sub Class (offset 0x0A). This controller should be an ATA controller
@@ -665,9 +670,9 @@ AtaAtapiPassThruSupported (
EFI_STATUS
EFIAPI
AtaAtapiPassThruStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
@@ -684,14 +689,14 @@ AtaAtapiPassThruStart (
DEBUG ((DEBUG_INFO, "==AtaAtapiPassThru Start== Controller = %x\n", Controller));
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiIdeControllerInitProtocolGuid,
- (VOID **) &IdeControllerInit,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiIdeControllerInitProtocolGuid,
+ (VOID **)&IdeControllerInit,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Open Ide_Controller_Init Error, Status=%r", Status));
@@ -701,7 +706,7 @@ AtaAtapiPassThruStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -730,12 +735,12 @@ AtaAtapiPassThruStart (
);
if (!EFI_ERROR (Status)) {
EnabledPciAttributes &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- EnabledPciAttributes,
- NULL
- );
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationEnable,
+ EnabledPciAttributes,
+ NULL
+ );
}
if (EFI_ERROR (Status)) {
@@ -765,8 +770,8 @@ AtaAtapiPassThruStart (
Instance->OriginalPciAttributes = OriginalPciAttributes;
Instance->AtaPassThru.Mode = &Instance->AtaPassThruMode;
Instance->ExtScsiPassThru.Mode = &Instance->ExtScsiPassThruMode;
- InitializeListHead(&Instance->DeviceList);
- InitializeListHead(&Instance->NonBlockingTaskList);
+ InitializeListHead (&Instance->DeviceList);
+ InitializeListHead (&Instance->NonBlockingTaskList);
Instance->TimerEvent = NULL;
@@ -799,8 +804,10 @@ AtaAtapiPassThruStart (
Status = gBS->InstallMultipleProtocolInterfaces (
&Controller,
- &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru),
- &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru),
+ &gEfiAtaPassThruProtocolGuid,
+ &(Instance->AtaPassThru),
+ &gEfiExtScsiPassThruProtocolGuid,
+ &(Instance->ExtScsiPassThru),
NULL
);
ASSERT_EFI_ERROR (Status);
@@ -828,6 +835,7 @@ ErrorExit:
DestroyDeviceInfoList (Instance);
FreePool (Instance);
}
+
return EFI_UNSUPPORTED;
}
@@ -860,24 +868,24 @@ ErrorExit:
EFI_STATUS
EFIAPI
AtaAtapiPassThruStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_AHCI_REGISTERS *AhciRegisters;
+ EFI_STATUS Status;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_AHCI_REGISTERS *AhciRegisters;
DEBUG ((DEBUG_INFO, "==AtaAtapiPassThru Stop== Controller = %x\n", Controller));
Status = gBS->OpenProtocol (
Controller,
&gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
+ (VOID **)&AtaPassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -891,8 +899,10 @@ AtaAtapiPassThruStop (
Status = gBS->UninstallMultipleProtocolInterfaces (
Controller,
- &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru),
- &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru),
+ &gEfiAtaPassThruProtocolGuid,
+ &(Instance->AtaPassThru),
+ &gEfiExtScsiPassThruProtocolGuid,
+ &(Instance->ExtScsiPassThru),
NULL
);
@@ -917,6 +927,7 @@ AtaAtapiPassThruStop (
gBS->CloseEvent (Instance->TimerEvent);
Instance->TimerEvent = NULL;
}
+
DestroyAsynTaskList (Instance, FALSE);
//
// Free allocated resource
@@ -947,7 +958,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) AhciRegisters->MaxCommandTableSize),
+ EFI_SIZE_TO_PAGES ((UINTN)AhciRegisters->MaxCommandTableSize),
AhciRegisters->AhciCommandTable
);
PciIo->Unmap (
@@ -956,7 +967,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) AhciRegisters->MaxCommandListSize),
+ EFI_SIZE_TO_PAGES ((UINTN)AhciRegisters->MaxCommandListSize),
AhciRegisters->AhciCmdList
);
PciIo->Unmap (
@@ -965,7 +976,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
- EFI_SIZE_TO_PAGES ((UINTN) AhciRegisters->MaxReceiveFisSize),
+ EFI_SIZE_TO_PAGES ((UINTN)AhciRegisters->MaxReceiveFisSize),
AhciRegisters->AhciRFis
);
}
@@ -1002,9 +1013,9 @@ LIST_ENTRY *
EFIAPI
SearchDeviceInfoList (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN UINT16 Port,
- IN UINT16 PortMultiplier,
- IN EFI_ATA_DEVICE_TYPE DeviceType
+ IN UINT16 Port,
+ IN UINT16 PortMultiplier,
+ IN EFI_ATA_DEVICE_TYPE DeviceType
)
{
EFI_ATA_DEVICE_INFO *DeviceInfo;
@@ -1022,13 +1033,15 @@ SearchDeviceInfoList (
//
if ((Instance->Mode == EfiAtaAhciMode) &&
(DeviceInfo->Type == EfiIdeCdrom) &&
- (PortMultiplier == 0xFF)) {
- PortMultiplier = 0xFFFF;
+ (PortMultiplier == 0xFF))
+ {
+ PortMultiplier = 0xFFFF;
}
if ((DeviceInfo->Type == DeviceType) &&
(Port == DeviceInfo->Port) &&
- (PortMultiplier == DeviceInfo->PortMultiplier)) {
+ (PortMultiplier == DeviceInfo->PortMultiplier))
+ {
return Node;
}
@@ -1056,11 +1069,11 @@ SearchDeviceInfoList (
EFI_STATUS
EFIAPI
CreateNewDeviceInfo (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN UINT16 Port,
- IN UINT16 PortMultiplier,
- IN EFI_ATA_DEVICE_TYPE DeviceType,
- IN EFI_IDENTIFY_DATA *IdentifyData
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplier,
+ IN EFI_ATA_DEVICE_TYPE DeviceType,
+ IN EFI_IDENTIFY_DATA *IdentifyData
)
{
EFI_ATA_DEVICE_INFO *DeviceInfo;
@@ -1114,6 +1127,7 @@ DestroyDeviceInfoList (
if (DeviceInfo->IdentifyData != NULL) {
FreePool (DeviceInfo->IdentifyData);
}
+
FreePool (DeviceInfo);
}
}
@@ -1129,14 +1143,14 @@ DestroyDeviceInfoList (
VOID
EFIAPI
DestroyAsynTaskList (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN BOOLEAN IsSigEvent
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *DelEntry;
- ATA_NONBLOCK_TASK *Task;
- EFI_TPL OldTpl;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *DelEntry;
+ ATA_NONBLOCK_TASK *Task;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
if (!IsListEmpty (&Instance->NonBlockingTaskList)) {
@@ -1144,8 +1158,9 @@ DestroyAsynTaskList (
// Free the Subtask list.
//
for (Entry = (&Instance->NonBlockingTaskList)->ForwardLink;
- Entry != (&Instance->NonBlockingTaskList);
- ) {
+ Entry != (&Instance->NonBlockingTaskList);
+ )
+ {
DelEntry = Entry;
Entry = Entry->ForwardLink;
Task = ATA_NON_BLOCK_TASK_FROM_ENTRY (DelEntry);
@@ -1155,9 +1170,11 @@ DestroyAsynTaskList (
Task->Packet->Asb->AtaStatus = 0x01;
gBS->SignalEvent (Task->Event);
}
+
FreePool (Task);
}
}
+
gBS->RestoreTPL (OldTpl);
}
@@ -1175,12 +1192,12 @@ DestroyAsynTaskList (
EFI_STATUS
EFIAPI
EnumerateAttachedDevice (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
)
{
- EFI_STATUS Status;
- PCI_TYPE00 PciData;
- UINT8 ClassCode;
+ EFI_STATUS Status;
+ PCI_TYPE00 PciData;
+ UINT8 ClassCode;
Status = EFI_SUCCESS;
@@ -1196,7 +1213,7 @@ EnumerateAttachedDevice (
ClassCode = PciData.Hdr.ClassCode[1];
switch (ClassCode) {
- case PCI_CLASS_MASS_STORAGE_IDE :
+ case PCI_CLASS_MASS_STORAGE_IDE:
//
// The ATA controller is working at IDE mode
//
@@ -1207,8 +1224,9 @@ EnumerateAttachedDevice (
Status = EFI_DEVICE_ERROR;
goto Done;
}
+
break;
- case PCI_CLASS_MASS_STORAGE_SATADPA :
+ case PCI_CLASS_MASS_STORAGE_SATADPA:
//
// The ATA controller is working at AHCI mode
//
@@ -1222,7 +1240,7 @@ EnumerateAttachedDevice (
}
break;
- default :
+ default:
Status = EFI_UNSUPPORTED;
}
@@ -1262,41 +1280,41 @@ Done:
EFI_STATUS
EFIAPI
AtaPassThruPassThru (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
- EFI_IDENTIFY_DATA *IdentifyData;
- UINT64 Capacity;
- UINT32 MaxSectorCount;
- ATA_NONBLOCK_TASK *Task;
- EFI_TPL OldTpl;
- UINT32 BlockSize;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
+ EFI_IDENTIFY_DATA *IdentifyData;
+ UINT64 Capacity;
+ UINT32 MaxSectorCount;
+ ATA_NONBLOCK_TASK *Task;
+ EFI_TPL OldTpl;
+ UINT32 BlockSize;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->InDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->InDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->OutDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->OutDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->Asb, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->Asb, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk);
if (Node == NULL) {
- Node = SearchDeviceInfoList(Instance, Port, PortMultiplierPort, EfiIdeCdrom);
+ Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeCdrom);
if (Node == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -1327,7 +1345,7 @@ AtaPassThruPassThru (
// Check logical block size
//
if ((IdentifyData->AtaData.phy_logic_sector_support & BIT12) != 0) {
- BlockSize = (UINT32) (((IdentifyData->AtaData.logic_sector_size_hi << 16) | IdentifyData->AtaData.logic_sector_size_lo) * sizeof (UINT16));
+ BlockSize = (UINT32)(((IdentifyData->AtaData.logic_sector_size_hi << 16) | IdentifyData->AtaData.logic_sector_size_lo) * sizeof (UINT16));
}
}
@@ -1335,7 +1353,8 @@ AtaPassThruPassThru (
// convert the transfer length from sector count to byte.
//
if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) &&
- (Packet->InTransferLength != 0)) {
+ (Packet->InTransferLength != 0))
+ {
Packet->InTransferLength = Packet->InTransferLength * BlockSize;
}
@@ -1343,7 +1362,8 @@ AtaPassThruPassThru (
// convert the transfer length from sector count to byte.
//
if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) &&
- (Packet->OutTransferLength != 0)) {
+ (Packet->OutTransferLength != 0))
+ {
Packet->OutTransferLength = Packet->OutTransferLength * BlockSize;
}
@@ -1353,7 +1373,8 @@ AtaPassThruPassThru (
// is returned.
//
if (((Packet->InTransferLength != 0) && (Packet->InTransferLength > MaxSectorCount * BlockSize)) ||
- ((Packet->OutTransferLength != 0) && (Packet->OutTransferLength > MaxSectorCount * BlockSize))) {
+ ((Packet->OutTransferLength != 0) && (Packet->OutTransferLength > MaxSectorCount * BlockSize)))
+ {
return EFI_BAD_BUFFER_SIZE;
}
@@ -1372,7 +1393,7 @@ AtaPassThruPassThru (
Task->Packet = Packet;
Task->Event = Event;
Task->IsStart = FALSE;
- Task->RetryTimes = DivU64x32(Packet->Timeout, 1000) + 1;
+ Task->RetryTimes = DivU64x32 (Packet->Timeout, 1000) + 1;
if (Packet->Timeout == 0) {
Task->InfiniteWait = TRUE;
} else {
@@ -1429,13 +1450,13 @@ AtaPassThruPassThru (
EFI_STATUS
EFIAPI
AtaPassThruGetNextPort (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN OUT UINT16 *Port
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT16 *Port
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -1468,7 +1489,8 @@ AtaPassThruGetNextPort (
DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceInfo->Type == EfiIdeHarddisk) &&
- (DeviceInfo->Port > *Port)){
+ (DeviceInfo->Port > *Port))
+ {
*Port = DeviceInfo->Port;
goto Exit;
}
@@ -1538,14 +1560,14 @@ Exit:
EFI_STATUS
EFIAPI
AtaPassThruGetNextDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN OUT UINT16 *PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN OUT UINT16 *PortMultiplierPort
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -1570,8 +1592,9 @@ AtaPassThruGetNextDevice (
DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceInfo->Type == EfiIdeHarddisk) &&
- (DeviceInfo->Port == Port) &&
- (DeviceInfo->PortMultiplier > *PortMultiplierPort)){
+ (DeviceInfo->Port == Port) &&
+ (DeviceInfo->PortMultiplier > *PortMultiplierPort))
+ {
*PortMultiplierPort = DeviceInfo->PortMultiplier;
goto Exit;
}
@@ -1590,7 +1613,8 @@ AtaPassThruGetNextDevice (
DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceInfo->Type == EfiIdeHarddisk) &&
- (DeviceInfo->Port == Port)){
+ (DeviceInfo->Port == Port))
+ {
*PortMultiplierPort = DeviceInfo->PortMultiplier;
goto Exit;
}
@@ -1650,15 +1674,15 @@ Exit:
EFI_STATUS
EFIAPI
AtaPassThruBuildDevicePath (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- EFI_DEV_PATH *DevicePathNode;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
+ EFI_DEV_PATH *DevicePathNode;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -1669,7 +1693,7 @@ AtaPassThruBuildDevicePath (
return EFI_INVALID_PARAMETER;
}
- Node = SearchDeviceInfoList(Instance, Port, PortMultiplierPort, EfiIdeHarddisk);
+ Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk);
if (Node == NULL) {
return EFI_NOT_FOUND;
}
@@ -1679,8 +1703,9 @@ AtaPassThruBuildDevicePath (
if (DevicePathNode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
- DevicePathNode->Atapi.PrimarySecondary = (UINT8) Port;
- DevicePathNode->Atapi.SlaveMaster = (UINT8) PortMultiplierPort;
+
+ DevicePathNode->Atapi.PrimarySecondary = (UINT8)Port;
+ DevicePathNode->Atapi.SlaveMaster = (UINT8)PortMultiplierPort;
DevicePathNode->Atapi.Lun = 0;
} else {
DevicePathNode = AllocateCopyPool (sizeof (SATA_DEVICE_PATH), &mSataDevicePathTemplate);
@@ -1693,7 +1718,7 @@ AtaPassThruBuildDevicePath (
DevicePathNode->Sata.Lun = 0;
}
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) DevicePathNode;
+ *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePathNode;
return EFI_SUCCESS;
}
@@ -1737,22 +1762,22 @@ AtaPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
AtaPassThruGetDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT16 *Port,
- OUT UINT16 *PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT16 *Port,
+ OUT UINT16 *PortMultiplierPort
)
{
- EFI_DEV_PATH *DevicePathNode;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
+ EFI_DEV_PATH *DevicePathNode;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
//
// Validate parameters passed in.
//
- if (DevicePath == NULL || Port == NULL || PortMultiplierPort == NULL) {
+ if ((DevicePath == NULL) || (Port == NULL) || (PortMultiplierPort == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1761,13 +1786,14 @@ AtaPassThruGetDevice (
//
if ((DevicePath->Type != MESSAGING_DEVICE_PATH) ||
((DevicePath->SubType != MSG_SATA_DP) &&
- (DevicePath->SubType != MSG_ATAPI_DP)) ||
- ((DevicePathNodeLength(DevicePath) != sizeof(ATAPI_DEVICE_PATH)) &&
- (DevicePathNodeLength(DevicePath) != sizeof(SATA_DEVICE_PATH)))) {
+ (DevicePath->SubType != MSG_ATAPI_DP)) ||
+ ((DevicePathNodeLength (DevicePath) != sizeof (ATAPI_DEVICE_PATH)) &&
+ (DevicePathNodeLength (DevicePath) != sizeof (SATA_DEVICE_PATH))))
+ {
return EFI_UNSUPPORTED;
}
- DevicePathNode = (EFI_DEV_PATH *) DevicePath;
+ DevicePathNode = (EFI_DEV_PATH *)DevicePath;
if (Instance->Mode == EfiAtaIdeMode) {
*Port = DevicePathNode->Atapi.PrimarySecondary;
@@ -1777,7 +1803,7 @@ AtaPassThruGetDevice (
*PortMultiplierPort = DevicePathNode->Sata.PortMultiplierPortNumber;
}
- Node = SearchDeviceInfoList(Instance, *Port, *PortMultiplierPort, EfiIdeHarddisk);
+ Node = SearchDeviceInfoList (Instance, *Port, *PortMultiplierPort, EfiIdeHarddisk);
if (Node == NULL) {
return EFI_NOT_FOUND;
@@ -1813,8 +1839,8 @@ AtaPassThruGetDevice (
EFI_STATUS
EFIAPI
AtaPassThruResetPort (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port
)
{
//
@@ -1857,13 +1883,13 @@ AtaPassThruResetPort (
EFI_STATUS
EFIAPI
AtaPassThruResetDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -1900,12 +1926,12 @@ AtaPassThruResetDevice (
EFI_STATUS
EFIAPI
AtaPacketRequestSense (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN VOID *SenseData,
- IN UINT8 SenseDataLength,
- IN UINT64 Timeout
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN VOID *SenseData,
+ IN UINT8 SenseDataLength,
+ IN UINT64 Timeout
)
{
EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET Packet;
@@ -1974,24 +2000,24 @@ AtaPacketRequestSense (
EFI_STATUS
EFIAPI
ExtScsiPassThruPassThru (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
- EFI_STATUS Status;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- UINT8 Port;
- UINT8 PortMultiplier;
- EFI_ATA_HC_WORK_MODE Mode;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
- BOOLEAN SenseReq;
- EFI_SCSI_SENSE_DATA *PtrSenseData;
- UINTN SenseDataLen;
- EFI_STATUS SenseStatus;
+ EFI_STATUS Status;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ UINT8 Port;
+ UINT8 PortMultiplier;
+ EFI_ATA_HC_WORK_MODE Mode;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
+ BOOLEAN SenseReq;
+ EFI_SCSI_SENSE_DATA *PtrSenseData;
+ UINTN SenseDataLen;
+ EFI_STATUS SenseStatus;
SenseDataLen = 0;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -2004,7 +2030,8 @@ ExtScsiPassThruPassThru (
// Don't support variable length CDB
//
if ((Packet->CdbLength != 6) && (Packet->CdbLength != 10) &&
- (Packet->CdbLength != 12) && (Packet->CdbLength != 16)) {
+ (Packet->CdbLength != 12) && (Packet->CdbLength != 16))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -2012,15 +2039,15 @@ ExtScsiPassThruPassThru (
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->InDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->InDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->OutDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->OutDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->SenseData, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->SenseData, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
@@ -2045,7 +2072,7 @@ ExtScsiPassThruPassThru (
Port = Target[0];
PortMultiplier = Target[1];
- Node = SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom);
+ Node = SearchDeviceInfoList (Instance, Port, PortMultiplier, EfiIdeCdrom);
if (Node == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -2057,7 +2084,7 @@ ExtScsiPassThruPassThru (
// Normally it should NOT be passed down through ExtScsiPassThru protocol interface.
// But to response EFI_DISK_INFO.Identify() request from ScsiDisk, we should handle this command.
//
- if (*((UINT8*)Packet->Cdb) == ATA_CMD_IDENTIFY_DEVICE) {
+ if (*((UINT8 *)Packet->Cdb) == ATA_CMD_IDENTIFY_DEVICE) {
CopyMem (Packet->InDataBuffer, DeviceInfo->IdentifyData, sizeof (EFI_IDENTIFY_DATA));
//
// For IDENTIFY DEVICE cmd, we don't need to get sense data.
@@ -2088,9 +2115,10 @@ ExtScsiPassThruPassThru (
//
PortMultiplier = 0;
}
+
Status = AhciPacketCommandExecute (Instance->PciIo, &Instance->AhciRegisters, Port, PortMultiplier, Packet);
break;
- default :
+ default:
Status = EFI_DEVICE_ERROR;
break;
}
@@ -2098,7 +2126,7 @@ ExtScsiPassThruPassThru (
//
// If the cmd doesn't get executed correctly, then check sense data.
//
- if (EFI_ERROR (Status) && (Packet->SenseDataLength != 0) && (*((UINT8*)Packet->Cdb) != ATA_CMD_REQUEST_SENSE)) {
+ if (EFI_ERROR (Status) && (Packet->SenseDataLength != 0) && (*((UINT8 *)Packet->Cdb) != ATA_CMD_REQUEST_SENSE)) {
PtrSenseData = AllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (EFI_SCSI_SENSE_DATA)), This->Mode->IoAlign);
if (PtrSenseData == NULL) {
return EFI_DEVICE_ERROR;
@@ -2117,7 +2145,7 @@ ExtScsiPassThruPassThru (
break;
}
- CopyMem ((UINT8*)Packet->SenseData + SenseDataLen, PtrSenseData, sizeof (EFI_SCSI_SENSE_DATA));
+ CopyMem ((UINT8 *)Packet->SenseData + SenseDataLen, PtrSenseData, sizeof (EFI_SCSI_SENSE_DATA));
SenseDataLen += sizeof (EFI_SCSI_SENSE_DATA);
//
@@ -2125,12 +2153,15 @@ ExtScsiPassThruPassThru (
// skip the loop.
//
if ((PtrSenseData->Sense_Key == EFI_SCSI_SK_NO_SENSE) ||
- (SenseDataLen + sizeof (EFI_SCSI_SENSE_DATA) > Packet->SenseDataLength)) {
+ (SenseDataLen + sizeof (EFI_SCSI_SENSE_DATA) > Packet->SenseDataLength))
+ {
SenseReq = FALSE;
}
}
+
FreeAlignedPages (PtrSenseData, EFI_SIZE_TO_PAGES (sizeof (EFI_SCSI_SENSE_DATA)));
}
+
//
// Update the SenseDataLength field to the data length received.
//
@@ -2167,20 +2198,20 @@ ExtScsiPassThruPassThru (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target,
- IN OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ IN OUT UINT64 *Lun
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
- UINT8 *Target8;
- UINT16 *Target16;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
+ UINT8 *Target8;
+ UINT16 *Target16;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
- if (Target == NULL || Lun == NULL) {
+ if ((Target == NULL) || (Lun == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -2191,7 +2222,7 @@ ExtScsiPassThruGetNextTargetLun (
Target8 = *Target;
Target16 = (UINT16 *)*Target;
- if (CompareMem(Target8, mScsiId, TARGET_MAX_BYTES) != 0) {
+ if (CompareMem (Target8, mScsiId, TARGET_MAX_BYTES) != 0) {
//
// For ATAPI device, we use 2 least significant bytes to represent the location of SCSI device.
// So the higher bytes in Target array should be 0xFF.
@@ -2205,7 +2236,8 @@ ExtScsiPassThruGetNextTargetLun (
// previous target id to see if it is returned by previous call.
//
if ((*Target16 != Instance->PreviousTargetId) ||
- (*Lun != Instance->PreviousLun)) {
+ (*Lun != Instance->PreviousLun))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -2223,9 +2255,10 @@ ExtScsiPassThruGetNextTargetLun (
DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceInfo->Type == EfiIdeCdrom) &&
- ((Target8[0] < DeviceInfo->Port) ||
- ((Target8[0] == DeviceInfo->Port) &&
- (Target8[1] < (UINT8)DeviceInfo->PortMultiplier)))) {
+ ((Target8[0] < DeviceInfo->Port) ||
+ ((Target8[0] == DeviceInfo->Port) &&
+ (Target8[1] < (UINT8)DeviceInfo->PortMultiplier))))
+ {
Target8[0] = (UINT8)DeviceInfo->Port;
Target8[1] = (UINT8)DeviceInfo->PortMultiplier;
goto Exit;
@@ -2297,16 +2330,16 @@ Exit:
EFI_STATUS
EFIAPI
ExtScsiPassThruBuildDevicePath (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- EFI_DEV_PATH *DevicePathNode;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- UINT8 Port;
- UINT8 PortMultiplier;
+ EFI_DEV_PATH *DevicePathNode;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ UINT8 Port;
+ UINT8 PortMultiplier;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -2327,7 +2360,7 @@ ExtScsiPassThruBuildDevicePath (
return EFI_NOT_FOUND;
}
- if (SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom) == NULL) {
+ if (SearchDeviceInfoList (Instance, Port, PortMultiplier, EfiIdeCdrom) == NULL) {
return EFI_NOT_FOUND;
}
@@ -2339,14 +2372,14 @@ ExtScsiPassThruBuildDevicePath (
DevicePathNode->Atapi.PrimarySecondary = Port;
DevicePathNode->Atapi.SlaveMaster = PortMultiplier;
- DevicePathNode->Atapi.Lun = (UINT16) Lun;
+ DevicePathNode->Atapi.Lun = (UINT16)Lun;
} else {
DevicePathNode = AllocateCopyPool (sizeof (SATA_DEVICE_PATH), &mSataDevicePathTemplate);
if (DevicePathNode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
- DevicePathNode->Sata.HBAPortNumber = Port;
+ DevicePathNode->Sata.HBAPortNumber = Port;
//
// For CD-ROM working in the AHCI mode, only 8 bits are used to record
// the PortMultiplier information. If the CD-ROM is directly attached
@@ -2354,10 +2387,10 @@ ExtScsiPassThruBuildDevicePath (
// to 0xFFFF according to the UEFI spec.
//
DevicePathNode->Sata.PortMultiplierPortNumber = PortMultiplier == 0xFF ? 0xFFFF : PortMultiplier;
- DevicePathNode->Sata.Lun = (UINT16) Lun;
+ DevicePathNode->Sata.Lun = (UINT16)Lun;
}
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) DevicePathNode;
+ *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePathNode;
return EFI_SUCCESS;
}
@@ -2384,54 +2417,56 @@ ExtScsiPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 **Target,
+ OUT UINT64 *Lun
)
{
- EFI_DEV_PATH *DevicePathNode;
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
+ EFI_DEV_PATH *DevicePathNode;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
//
// Validate parameters passed in.
//
- if (DevicePath == NULL || Target == NULL || Lun == NULL) {
+ if ((DevicePath == NULL) || (Target == NULL) || (Lun == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (*Target == NULL) {
return EFI_INVALID_PARAMETER;
}
+
//
// Check whether the DevicePath belongs to SCSI_DEVICE_PATH
//
if ((DevicePath->Type != MESSAGING_DEVICE_PATH) ||
((DevicePath->SubType != MSG_ATAPI_DP) &&
- (DevicePath->SubType != MSG_SATA_DP)) ||
- ((DevicePathNodeLength(DevicePath) != sizeof(ATAPI_DEVICE_PATH)) &&
- (DevicePathNodeLength(DevicePath) != sizeof(SATA_DEVICE_PATH)))) {
+ (DevicePath->SubType != MSG_SATA_DP)) ||
+ ((DevicePathNodeLength (DevicePath) != sizeof (ATAPI_DEVICE_PATH)) &&
+ (DevicePathNodeLength (DevicePath) != sizeof (SATA_DEVICE_PATH))))
+ {
return EFI_UNSUPPORTED;
}
SetMem (*Target, TARGET_MAX_BYTES, 0xFF);
- DevicePathNode = (EFI_DEV_PATH *) DevicePath;
+ DevicePathNode = (EFI_DEV_PATH *)DevicePath;
if (Instance->Mode == EfiAtaIdeMode) {
- (*Target)[0] = (UINT8) DevicePathNode->Atapi.PrimarySecondary;
- (*Target)[1] = (UINT8) DevicePathNode->Atapi.SlaveMaster;
- *Lun = (UINT8) DevicePathNode->Atapi.Lun;
+ (*Target)[0] = (UINT8)DevicePathNode->Atapi.PrimarySecondary;
+ (*Target)[1] = (UINT8)DevicePathNode->Atapi.SlaveMaster;
+ *Lun = (UINT8)DevicePathNode->Atapi.Lun;
} else {
- (*Target)[0] = (UINT8) DevicePathNode->Sata.HBAPortNumber;
- (*Target)[1] = (UINT8) DevicePathNode->Sata.PortMultiplierPortNumber;
- *Lun = (UINT8) DevicePathNode->Sata.Lun;
+ (*Target)[0] = (UINT8)DevicePathNode->Sata.HBAPortNumber;
+ (*Target)[1] = (UINT8)DevicePathNode->Sata.PortMultiplierPortNumber;
+ *Lun = (UINT8)DevicePathNode->Sata.Lun;
}
- Node = SearchDeviceInfoList(Instance, (*Target)[0], (*Target)[1], EfiIdeCdrom);
+ Node = SearchDeviceInfoList (Instance, (*Target)[0], (*Target)[1], EfiIdeCdrom);
if (Node == NULL) {
return EFI_NOT_FOUND;
@@ -2458,7 +2493,7 @@ ExtScsiPassThruGetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetChannel (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
)
{
//
@@ -2489,15 +2524,15 @@ ExtScsiPassThruResetChannel (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- UINT8 Port;
- UINT8 PortMultiplier;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ UINT8 Port;
+ UINT8 PortMultiplier;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
//
@@ -2506,6 +2541,7 @@ ExtScsiPassThruResetTargetLun (
if (Lun != 0) {
return EFI_INVALID_PARAMETER;
}
+
//
// The layout of Target array:
// ________________________________________________________________________
@@ -2520,7 +2556,7 @@ ExtScsiPassThruResetTargetLun (
Port = Target[0];
PortMultiplier = Target[1];
- Node = SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom);
+ Node = SearchDeviceInfoList (Instance, Port, PortMultiplier, EfiIdeCdrom);
if (Node == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -2556,26 +2592,26 @@ ExtScsiPassThruResetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTarget (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target
)
{
- ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- LIST_ENTRY *Node;
- EFI_ATA_DEVICE_INFO *DeviceInfo;
- UINT8 *Target8;
- UINT16 *Target16;
+ ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
+ LIST_ENTRY *Node;
+ EFI_ATA_DEVICE_INFO *DeviceInfo;
+ UINT8 *Target8;
+ UINT16 *Target16;
Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
- if (Target == NULL || *Target == NULL) {
+ if ((Target == NULL) || (*Target == NULL)) {
return EFI_INVALID_PARAMETER;
}
Target8 = *Target;
Target16 = (UINT16 *)*Target;
- if (CompareMem(Target8, mScsiId, TARGET_MAX_BYTES) != 0) {
+ if (CompareMem (Target8, mScsiId, TARGET_MAX_BYTES) != 0) {
//
// For ATAPI device, we use 2 least significant bytes to represent the location of SCSI device.
// So the higher bytes in Target array should be 0xFF.
@@ -2605,9 +2641,10 @@ ExtScsiPassThruGetNextTarget (
DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node);
if ((DeviceInfo->Type == EfiIdeCdrom) &&
- ((Target8[0] < DeviceInfo->Port) ||
- ((Target8[0] == DeviceInfo->Port) &&
- (Target8[1] < (UINT8)DeviceInfo->PortMultiplier)))) {
+ ((Target8[0] < DeviceInfo->Port) ||
+ ((Target8[0] == DeviceInfo->Port) &&
+ (Target8[1] < (UINT8)DeviceInfo->PortMultiplier))))
+ {
Target8[0] = (UINT8)DeviceInfo->Port;
Target8[1] = (UINT8)DeviceInfo->PortMultiplier;
goto Exit;
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
index 5f582b9b3e..62ba6d6680 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
@@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef __ATA_ATAPI_PASS_THRU_H__
#define __ATA_ATAPI_PASS_THRU_H__
@@ -36,14 +37,14 @@
#include "IdeMode.h"
#include "AhciMode.h"
-extern EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2;
-extern EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
+extern EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
-#define ATA_ATAPI_PASS_THRU_SIGNATURE SIGNATURE_32 ('a', 'a', 'p', 't')
-#define ATA_ATAPI_DEVICE_SIGNATURE SIGNATURE_32 ('a', 'd', 'e', 'v')
+#define ATA_ATAPI_PASS_THRU_SIGNATURE SIGNATURE_32 ('a', 'a', 'p', 't')
+#define ATA_ATAPI_DEVICE_SIGNATURE SIGNATURE_32 ('a', 'd', 'e', 'v')
#define ATA_NONBLOCKING_TASK_SIGNATURE SIGNATURE_32 ('a', 't', 's', 'k')
typedef struct _ATA_NONBLOCK_TASK ATA_NONBLOCK_TASK;
@@ -66,88 +67,88 @@ typedef enum {
// Ahci mode device info
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ LIST_ENTRY Link;
- UINT16 Port;
- UINT16 PortMultiplier;
- EFI_ATA_DEVICE_TYPE Type;
+ UINT16 Port;
+ UINT16 PortMultiplier;
+ EFI_ATA_DEVICE_TYPE Type;
- EFI_IDENTIFY_DATA *IdentifyData;
+ EFI_IDENTIFY_DATA *IdentifyData;
} EFI_ATA_DEVICE_INFO;
typedef struct {
- UINT32 Signature;
+ UINT32 Signature;
- EFI_HANDLE ControllerHandle;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit;
+ EFI_HANDLE ControllerHandle;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit;
- EFI_ATA_PASS_THRU_MODE AtaPassThruMode;
- EFI_ATA_PASS_THRU_PROTOCOL AtaPassThru;
- EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
+ EFI_ATA_PASS_THRU_MODE AtaPassThruMode;
+ EFI_ATA_PASS_THRU_PROTOCOL AtaPassThru;
+ EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
- EFI_ATA_HC_WORK_MODE Mode;
+ EFI_ATA_HC_WORK_MODE Mode;
- EFI_IDE_REGISTERS IdeRegisters[EfiIdeMaxChannel];
- EFI_AHCI_REGISTERS AhciRegisters;
+ EFI_IDE_REGISTERS IdeRegisters[EfiIdeMaxChannel];
+ EFI_AHCI_REGISTERS AhciRegisters;
//
// The attached device list
//
- LIST_ENTRY DeviceList;
- UINT64 EnabledPciAttributes;
- UINT64 OriginalPciAttributes;
+ LIST_ENTRY DeviceList;
+ UINT64 EnabledPciAttributes;
+ UINT64 OriginalPciAttributes;
//
// For AtaPassThru protocol, using the following bytes to record the previous call in
// GetNextPort()/GetNextDevice().
//
- UINT16 PreviousPort;
- UINT16 PreviousPortMultiplier;
+ UINT16 PreviousPort;
+ UINT16 PreviousPortMultiplier;
//
// For ExtScsiPassThru protocol, using the following bytes to record the previous call in
// GetNextTarget()/GetNextTargetLun().
//
- UINT16 PreviousTargetId;
- UINT64 PreviousLun;
+ UINT16 PreviousTargetId;
+ UINT64 PreviousLun;
//
// For Non-blocking.
//
- EFI_EVENT TimerEvent;
- LIST_ENTRY NonBlockingTaskList;
+ EFI_EVENT TimerEvent;
+ LIST_ENTRY NonBlockingTaskList;
} ATA_ATAPI_PASS_THRU_INSTANCE;
//
// Task for Non-blocking mode.
//
struct _ATA_NONBLOCK_TASK {
- UINT32 Signature;
- LIST_ENTRY Link;
-
- UINT16 Port;
- UINT16 PortMultiplier;
- EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
- BOOLEAN IsStart;
- EFI_EVENT Event;
- UINT64 RetryTimes;
- BOOLEAN InfiniteWait;
- VOID *Map; // Pointer to map.
- VOID *TableMap; // Pointer to PRD table map.
- EFI_ATA_DMA_PRD *MapBaseAddress; // Pointer to range Base address for Map.
- UINTN PageCount; // The page numbers used by PCIO freebuffer.
+ UINT32 Signature;
+ LIST_ENTRY Link;
+
+ UINT16 Port;
+ UINT16 PortMultiplier;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
+ BOOLEAN IsStart;
+ EFI_EVENT Event;
+ UINT64 RetryTimes;
+ BOOLEAN InfiniteWait;
+ VOID *Map; // Pointer to map.
+ VOID *TableMap; // Pointer to PRD table map.
+ EFI_ATA_DMA_PRD *MapBaseAddress; // Pointer to range Base address for Map.
+ UINTN PageCount; // The page numbers used by PCIO freebuffer.
};
//
// Timeout value which uses 100ns as a unit.
// It means 3 second span.
//
-#define ATA_ATAPI_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
-#define ATA_SPINUP_TIMEOUT EFI_TIMER_PERIOD_SECONDS(10)
+#define ATA_ATAPI_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
+#define ATA_SPINUP_TIMEOUT EFI_TIMER_PERIOD_SECONDS(10)
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
#define ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS(a) \
CR (a, \
@@ -295,11 +296,11 @@ AtaAtapiPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -347,9 +348,9 @@ AtaAtapiPassThruComponentNameGetControllerName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -390,9 +391,9 @@ AtaAtapiPassThruSupported (
EFI_STATUS
EFIAPI
AtaAtapiPassThruStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -424,10 +425,10 @@ AtaAtapiPassThruStart (
EFI_STATUS
EFIAPI
AtaAtapiPassThruStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -446,9 +447,9 @@ LIST_ENTRY *
EFIAPI
SearchDeviceInfoList (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN UINT16 Port,
- IN UINT16 PortMultiplier,
- IN EFI_ATA_DEVICE_TYPE DeviceType
+ IN UINT16 Port,
+ IN UINT16 PortMultiplier,
+ IN EFI_ATA_DEVICE_TYPE DeviceType
);
/**
@@ -470,10 +471,10 @@ EFI_STATUS
EFIAPI
CreateNewDeviceInfo (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN UINT16 Port,
- IN UINT16 PortMultiplier,
- IN EFI_ATA_DEVICE_TYPE DeviceType,
- IN EFI_IDENTIFY_DATA *IdentifyData
+ IN UINT16 Port,
+ IN UINT16 PortMultiplier,
+ IN EFI_ATA_DEVICE_TYPE DeviceType,
+ IN EFI_IDENTIFY_DATA *IdentifyData
);
/**
@@ -499,7 +500,7 @@ DestroyDeviceInfoList (
VOID
EFIAPI
DestroyAsynTaskList (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN BOOLEAN IsSigEvent
);
@@ -517,7 +518,7 @@ DestroyAsynTaskList (
EFI_STATUS
EFIAPI
EnumerateAttachedDevice (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -532,7 +533,7 @@ VOID
EFIAPI
AsyncNonBlockingTransferRoutine (
EFI_EVENT Event,
- VOID* Context
+ VOID *Context
);
/**
@@ -567,11 +568,11 @@ AsyncNonBlockingTransferRoutine (
EFI_STATUS
EFIAPI
AtaPassThruPassThru (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
);
/**
@@ -608,8 +609,8 @@ AtaPassThruPassThru (
EFI_STATUS
EFIAPI
AtaPassThruGetNextPort (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN OUT UINT16 *Port
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT16 *Port
);
/**
@@ -657,9 +658,9 @@ AtaPassThruGetNextPort (
EFI_STATUS
EFIAPI
AtaPassThruGetNextDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN OUT UINT16 *PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN OUT UINT16 *PortMultiplierPort
);
/**
@@ -697,10 +698,10 @@ AtaPassThruGetNextDevice (
EFI_STATUS
EFIAPI
AtaPassThruBuildDevicePath (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -743,10 +744,10 @@ AtaPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
AtaPassThruGetDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT16 *Port,
- OUT UINT16 *PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT16 *Port,
+ OUT UINT16 *PortMultiplierPort
);
/**
@@ -776,8 +777,8 @@ AtaPassThruGetDevice (
EFI_STATUS
EFIAPI
AtaPassThruResetPort (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port
);
/**
@@ -814,9 +815,9 @@ AtaPassThruResetPort (
EFI_STATUS
EFIAPI
AtaPassThruResetDevice (
- IN EFI_ATA_PASS_THRU_PROTOCOL *This,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort
+ IN EFI_ATA_PASS_THRU_PROTOCOL *This,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort
);
/**
@@ -863,11 +864,11 @@ AtaPassThruResetDevice (
EFI_STATUS
EFIAPI
ExtScsiPassThruPassThru (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
);
/**
@@ -899,9 +900,9 @@ ExtScsiPassThruPassThru (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target,
- IN OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ IN OUT UINT64 *Lun
);
/**
@@ -934,10 +935,10 @@ ExtScsiPassThruGetNextTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruBuildDevicePath (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -962,10 +963,10 @@ ExtScsiPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 **Target,
+ OUT UINT64 *Lun
);
/**
@@ -982,7 +983,7 @@ ExtScsiPassThruGetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetChannel (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
);
/**
@@ -1007,9 +1008,9 @@ ExtScsiPassThruResetChannel (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun
);
/**
@@ -1037,8 +1038,8 @@ ExtScsiPassThruResetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTarget (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target
);
/**
@@ -1052,7 +1053,7 @@ ExtScsiPassThruGetNextTarget (
EFI_STATUS
EFIAPI
IdeModeInitialization (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -1066,7 +1067,7 @@ IdeModeInitialization (
EFI_STATUS
EFIAPI
AhciModeInitialization (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -1094,16 +1095,16 @@ AhciModeInitialization (
EFI_STATUS
EFIAPI
AhciNonDataTransfer (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1134,19 +1135,19 @@ AhciNonDataTransfer (
EFI_STATUS
EFIAPI
AhciDmaTransfer (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1177,19 +1178,19 @@ AhciDmaTransfer (
EFI_STATUS
EFIAPI
AhciPioTransfer (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_AHCI_REGISTERS *AhciRegisters,
- IN UINT8 Port,
- IN UINT8 PortMultiplier,
- IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
- IN UINT8 AtapiCommandLength,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN OUT VOID *MemoryAddr,
- IN UINT32 DataCount,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS *AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
+ IN UINT8 AtapiCommandLength,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN OUT VOID *MemoryAddr,
+ IN UINT32 DataCount,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1213,12 +1214,12 @@ AhciPioTransfer (
EFI_STATUS
EFIAPI
AtaNonDataCommandIn (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1284,16 +1285,15 @@ AtaUdmaInOut (
EFI_STATUS
EFIAPI
AtaPioDataInOut (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN OUT VOID *Buffer,
- IN UINT64 ByteCount,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN OUT VOID *Buffer,
+ IN UINT64 ByteCount,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
);
#endif
-
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c
index 663f777e15..cda5dbe8cd 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c
@@ -11,22 +11,22 @@
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruDriverNameTable[] = {
{ "eng;en", L"AtaAtapiPassThru Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
// Controller name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruIdeControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruIdeControllerNameTable[] = {
{ "eng;en", L"IDE Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruAhciControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruAhciControllerNameTable[] = {
{ "eng;en", L"AHCI Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
@@ -41,9 +41,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComp
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) AtaAtapiPassThruComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) AtaAtapiPassThruComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)AtaAtapiPassThruComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)AtaAtapiPassThruComponentNameGetControllerName,
"en"
};
@@ -103,7 +103,6 @@ AtaAtapiPassThruComponentNameGetDriverName (
);
}
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -175,11 +174,11 @@ AtaAtapiPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -187,7 +186,7 @@ AtaAtapiPassThruComponentNameGetControllerName (
VOID *Interface;
ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
- if (Language == NULL || ControllerName == NULL) {
+ if ((Language == NULL) || (ControllerName == NULL)) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
index 9a6d0e60e4..75403886e4 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
@@ -19,11 +19,11 @@
UINT8
EFIAPI
IdeReadPortB (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port
)
{
- UINT8 Data;
+ UINT8 Data;
ASSERT (PciIo != NULL);
@@ -35,7 +35,7 @@ IdeReadPortB (
PciIo,
EfiPciIoWidthUint8,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
1,
&Data
);
@@ -52,9 +52,9 @@ IdeReadPortB (
VOID
EFIAPI
IdeWritePortB (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port,
- IN UINT8 Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port,
+ IN UINT8 Data
)
{
ASSERT (PciIo != NULL);
@@ -66,7 +66,7 @@ IdeWritePortB (
PciIo,
EfiPciIoWidthUint8,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
1,
&Data
);
@@ -82,9 +82,9 @@ IdeWritePortB (
VOID
EFIAPI
IdeWritePortW (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port,
- IN UINT16 Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port,
+ IN UINT16 Data
)
{
ASSERT (PciIo != NULL);
@@ -96,7 +96,7 @@ IdeWritePortW (
PciIo,
EfiPciIoWidthUint16,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
1,
&Data
);
@@ -112,9 +112,9 @@ IdeWritePortW (
VOID
EFIAPI
IdeWritePortDW (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port,
- IN UINT32 Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port,
+ IN UINT32 Data
)
{
ASSERT (PciIo != NULL);
@@ -126,7 +126,7 @@ IdeWritePortDW (
PciIo,
EfiPciIoWidthUint32,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
1,
&Data
);
@@ -146,10 +146,10 @@ IdeWritePortDW (
VOID
EFIAPI
IdeWritePortWMultiple (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port,
- IN UINTN Count,
- IN VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port,
+ IN UINTN Count,
+ IN VOID *Buffer
)
{
ASSERT (PciIo != NULL);
@@ -162,11 +162,10 @@ IdeWritePortWMultiple (
PciIo,
EfiPciIoWidthFifoUint16,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
Count,
- (UINT16 *) Buffer
+ (UINT16 *)Buffer
);
-
}
/**
@@ -183,10 +182,10 @@ IdeWritePortWMultiple (
VOID
EFIAPI
IdeReadPortWMultiple (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT16 Port,
- IN UINTN Count,
- IN VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT16 Port,
+ IN UINTN Count,
+ IN VOID *Buffer
)
{
ASSERT (PciIo != NULL);
@@ -199,11 +198,10 @@ IdeReadPortWMultiple (
PciIo,
EfiPciIoWidthFifoUint16,
EFI_PCI_IO_PASS_THROUGH_BAR,
- (UINT64) Port,
+ (UINT64)Port,
Count,
- (UINT16 *) Buffer
+ (UINT16 *)Buffer
);
-
}
/**
@@ -219,12 +217,12 @@ IdeReadPortWMultiple (
VOID
EFIAPI
DumpAllIdeRegisters (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_ATA_STATUS_BLOCK StatusBlock;
+ EFI_ATA_STATUS_BLOCK StatusBlock;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -284,6 +282,7 @@ DumpAllIdeRegisters (
DEBUG ((DEBUG_ERROR, "CheckRegisterStatus()-- %02x : Error : Address Mark Not Found\n", StatusBlock.AtaError));
}
}
+
DEBUG_CODE_END ();
}
@@ -301,11 +300,11 @@ DumpAllIdeRegisters (
EFI_STATUS
EFIAPI
CheckStatusRegister (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters
)
{
- UINT8 StatusRegister;
+ UINT8 StatusRegister;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -319,6 +318,7 @@ CheckStatusRegister (
return EFI_DEVICE_ERROR;
}
}
+
return EFI_SUCCESS;
}
@@ -342,14 +342,14 @@ CheckStatusRegister (
EFI_STATUS
EFIAPI
DRQClear (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT8 StatusRegister;
- BOOLEAN InfiniteWait;
+ UINT64 Delay;
+ UINT8 StatusRegister;
+ BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -360,7 +360,7 @@ DRQClear (
InfiniteWait = FALSE;
}
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus);
@@ -381,11 +381,11 @@ DRQClear (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
+
/**
This function is used to poll for the DRQ bit clear in the Alternate
Status Register. DRQ is cleared when the device is finished
@@ -410,9 +410,9 @@ DRQClear2 (
IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT8 AltRegister;
- BOOLEAN InfiniteWait;
+ UINT64 Delay;
+ UINT8 AltRegister;
+ BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -423,7 +423,7 @@ DRQClear2 (
InfiniteWait = FALSE;
}
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev);
@@ -444,7 +444,6 @@ DRQClear2 (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -485,10 +484,10 @@ DRQReady (
IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT8 StatusRegister;
- UINT8 ErrorRegister;
- BOOLEAN InfiniteWait;
+ UINT64 Delay;
+ UINT8 StatusRegister;
+ UINT8 ErrorRegister;
+ BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -499,7 +498,7 @@ DRQReady (
InfiniteWait = FALSE;
}
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
//
// Read Status Register will clear interrupt
@@ -516,6 +515,7 @@ DRQReady (
if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
+
return EFI_DEVICE_ERROR;
}
@@ -536,6 +536,7 @@ DRQReady (
return EFI_TIMEOUT;
}
+
/**
This function is used to poll for the DRQ bit set in the Alternate Status Register.
DRQ is set when the device is ready to transfer data. So this function is called after
@@ -569,10 +570,10 @@ DRQReady2 (
IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT8 AltRegister;
- UINT8 ErrorRegister;
- BOOLEAN InfiniteWait;
+ UINT64 Delay;
+ UINT8 AltRegister;
+ UINT8 ErrorRegister;
+ BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -583,7 +584,7 @@ DRQReady2 (
InfiniteWait = FALSE;
}
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
//
@@ -600,6 +601,7 @@ DRQReady2 (
if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
+
return EFI_DEVICE_ERROR;
}
@@ -621,9 +623,6 @@ DRQReady2 (
return EFI_TIMEOUT;
}
-
-
-
/**
This function is used to poll for the BSY bit clear in the Status Register. BSY
is clear when the device is not busy. Every command must be sent after device is not busy.
@@ -645,9 +644,9 @@ WaitForBSYClear (
IN UINT64 Timeout
)
{
- UINT64 Delay;
- UINT8 StatusRegister;
- BOOLEAN InfiniteWait;
+ UINT64 Delay;
+ UINT8 StatusRegister;
+ BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
@@ -658,7 +657,7 @@ WaitForBSYClear (
InfiniteWait = FALSE;
}
- Delay = DivU64x32(Timeout, 1000) + 1;
+ Delay = DivU64x32 (Timeout, 1000) + 1;
do {
StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus);
@@ -672,13 +671,11 @@ WaitForBSYClear (
MicroSecondDelay (100);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
-
/**
Get IDE i/o port registers' base addresses by mode.
@@ -729,15 +726,15 @@ WaitForBSYClear (
EFI_STATUS
EFIAPI
GetIdeRegisterIoAddr (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN OUT EFI_IDE_REGISTERS *IdeRegisters
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN OUT EFI_IDE_REGISTERS *IdeRegisters
)
{
- EFI_STATUS Status;
- PCI_TYPE00 PciData;
- UINT16 CommandBlockBaseAddr;
- UINT16 ControlBlockBaseAddr;
- UINT16 BusMasterBaseAddr;
+ EFI_STATUS Status;
+ PCI_TYPE00 PciData;
+ UINT16 CommandBlockBaseAddr;
+ UINT16 ControlBlockBaseAddr;
+ UINT16 BusMasterBaseAddr;
if ((PciIo == NULL) || (IdeRegisters == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -755,7 +752,7 @@ GetIdeRegisterIoAddr (
return Status;
}
- BusMasterBaseAddr = (UINT16) ((PciData.Device.Bar[4] & 0x0000fff0));
+ BusMasterBaseAddr = (UINT16)((PciData.Device.Bar[4] & 0x0000fff0));
if ((PciData.Hdr.ClassCode[0] & IDE_PRIMARY_OPERATING_MODE) == 0) {
CommandBlockBaseAddr = 0x1f0;
@@ -764,26 +761,27 @@ GetIdeRegisterIoAddr (
//
// The BARs should be of IO type
//
- if ((PciData.Device.Bar[0] & BIT0) == 0 ||
- (PciData.Device.Bar[1] & BIT0) == 0) {
+ if (((PciData.Device.Bar[0] & BIT0) == 0) ||
+ ((PciData.Device.Bar[1] & BIT0) == 0))
+ {
return EFI_UNSUPPORTED;
}
- CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[0] & 0x0000fff8);
- ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[1] & 0x0000fffc) + 2);
+ CommandBlockBaseAddr = (UINT16)(PciData.Device.Bar[0] & 0x0000fff8);
+ ControlBlockBaseAddr = (UINT16)((PciData.Device.Bar[1] & 0x0000fffc) + 2);
}
//
// Calculate IDE primary channel I/O register base address.
//
IdeRegisters[EfiIdePrimary].Data = CommandBlockBaseAddr;
- IdeRegisters[EfiIdePrimary].ErrOrFeature = (UINT16) (CommandBlockBaseAddr + 0x01);
- IdeRegisters[EfiIdePrimary].SectorCount = (UINT16) (CommandBlockBaseAddr + 0x02);
- IdeRegisters[EfiIdePrimary].SectorNumber = (UINT16) (CommandBlockBaseAddr + 0x03);
- IdeRegisters[EfiIdePrimary].CylinderLsb = (UINT16) (CommandBlockBaseAddr + 0x04);
- IdeRegisters[EfiIdePrimary].CylinderMsb = (UINT16) (CommandBlockBaseAddr + 0x05);
- IdeRegisters[EfiIdePrimary].Head = (UINT16) (CommandBlockBaseAddr + 0x06);
- IdeRegisters[EfiIdePrimary].CmdOrStatus = (UINT16) (CommandBlockBaseAddr + 0x07);
+ IdeRegisters[EfiIdePrimary].ErrOrFeature = (UINT16)(CommandBlockBaseAddr + 0x01);
+ IdeRegisters[EfiIdePrimary].SectorCount = (UINT16)(CommandBlockBaseAddr + 0x02);
+ IdeRegisters[EfiIdePrimary].SectorNumber = (UINT16)(CommandBlockBaseAddr + 0x03);
+ IdeRegisters[EfiIdePrimary].CylinderLsb = (UINT16)(CommandBlockBaseAddr + 0x04);
+ IdeRegisters[EfiIdePrimary].CylinderMsb = (UINT16)(CommandBlockBaseAddr + 0x05);
+ IdeRegisters[EfiIdePrimary].Head = (UINT16)(CommandBlockBaseAddr + 0x06);
+ IdeRegisters[EfiIdePrimary].CmdOrStatus = (UINT16)(CommandBlockBaseAddr + 0x07);
IdeRegisters[EfiIdePrimary].AltOrDev = ControlBlockBaseAddr;
IdeRegisters[EfiIdePrimary].BusMasterBaseAddr = BusMasterBaseAddr;
@@ -794,33 +792,33 @@ GetIdeRegisterIoAddr (
//
// The BARs should be of IO type
//
- if ((PciData.Device.Bar[2] & BIT0) == 0 ||
- (PciData.Device.Bar[3] & BIT0) == 0) {
+ if (((PciData.Device.Bar[2] & BIT0) == 0) ||
+ ((PciData.Device.Bar[3] & BIT0) == 0))
+ {
return EFI_UNSUPPORTED;
}
- CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[2] & 0x0000fff8);
- ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[3] & 0x0000fffc) + 2);
+ CommandBlockBaseAddr = (UINT16)(PciData.Device.Bar[2] & 0x0000fff8);
+ ControlBlockBaseAddr = (UINT16)((PciData.Device.Bar[3] & 0x0000fffc) + 2);
}
//
// Calculate IDE secondary channel I/O register base address.
//
IdeRegisters[EfiIdeSecondary].Data = CommandBlockBaseAddr;
- IdeRegisters[EfiIdeSecondary].ErrOrFeature = (UINT16) (CommandBlockBaseAddr + 0x01);
- IdeRegisters[EfiIdeSecondary].SectorCount = (UINT16) (CommandBlockBaseAddr + 0x02);
- IdeRegisters[EfiIdeSecondary].SectorNumber = (UINT16) (CommandBlockBaseAddr + 0x03);
- IdeRegisters[EfiIdeSecondary].CylinderLsb = (UINT16) (CommandBlockBaseAddr + 0x04);
- IdeRegisters[EfiIdeSecondary].CylinderMsb = (UINT16) (CommandBlockBaseAddr + 0x05);
- IdeRegisters[EfiIdeSecondary].Head = (UINT16) (CommandBlockBaseAddr + 0x06);
- IdeRegisters[EfiIdeSecondary].CmdOrStatus = (UINT16) (CommandBlockBaseAddr + 0x07);
+ IdeRegisters[EfiIdeSecondary].ErrOrFeature = (UINT16)(CommandBlockBaseAddr + 0x01);
+ IdeRegisters[EfiIdeSecondary].SectorCount = (UINT16)(CommandBlockBaseAddr + 0x02);
+ IdeRegisters[EfiIdeSecondary].SectorNumber = (UINT16)(CommandBlockBaseAddr + 0x03);
+ IdeRegisters[EfiIdeSecondary].CylinderLsb = (UINT16)(CommandBlockBaseAddr + 0x04);
+ IdeRegisters[EfiIdeSecondary].CylinderMsb = (UINT16)(CommandBlockBaseAddr + 0x05);
+ IdeRegisters[EfiIdeSecondary].Head = (UINT16)(CommandBlockBaseAddr + 0x06);
+ IdeRegisters[EfiIdeSecondary].CmdOrStatus = (UINT16)(CommandBlockBaseAddr + 0x07);
IdeRegisters[EfiIdeSecondary].AltOrDev = ControlBlockBaseAddr;
- IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = (UINT16) (BusMasterBaseAddr + 0x8);
+ IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = (UINT16)(BusMasterBaseAddr + 0x8);
return EFI_SUCCESS;
}
-
/**
Send ATA Ext command into device with NON_DATA protocol.
@@ -836,10 +834,10 @@ GetIdeRegisterIoAddr (
EFI_STATUS
EFIAPI
AtaIssueCommand (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN UINT64 Timeout
)
{
EFI_STATUS Status;
@@ -861,7 +859,7 @@ AtaIssueCommand (
//
// Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
//
- IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8) (0xe0 | DeviceHead));
+ IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)(0xe0 | DeviceHead));
//
// set all the command parameters
@@ -934,15 +932,15 @@ AtaIssueCommand (
EFI_STATUS
EFIAPI
AtaPioDataInOut (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN OUT VOID *Buffer,
- IN UINT64 ByteCount,
- IN BOOLEAN Read,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN OUT VOID *Buffer,
+ IN UINT64 ByteCount,
+ IN BOOLEAN Read,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
)
{
UINTN WordCount;
@@ -963,7 +961,7 @@ AtaPioDataInOut (
goto Exit;
}
- Buffer16 = (UINT16 *) Buffer;
+ Buffer16 = (UINT16 *)Buffer;
//
// According to PIO data in protocol, host can perform a series of reads to
@@ -987,7 +985,7 @@ AtaPioDataInOut (
//
WordCount = 0;
- while (WordCount < RShiftU64(ByteCount, 1)) {
+ while (WordCount < RShiftU64 (ByteCount, 1)) {
//
// Poll DRQ bit set, data transfer can be performed only when DRQ is ready
//
@@ -1000,8 +998,8 @@ AtaPioDataInOut (
//
// Get the byte count for one series of read
//
- if ((WordCount + Increment) > RShiftU64(ByteCount, 1)) {
- Increment = (UINTN)(RShiftU64(ByteCount, 1) - WordCount);
+ if ((WordCount + Increment) > RShiftU64 (ByteCount, 1)) {
+ Increment = (UINTN)(RShiftU64 (ByteCount, 1) - WordCount);
}
if (Read) {
@@ -1069,12 +1067,12 @@ Exit:
EFI_STATUS
EFIAPI
AtaNonDataCommandIn (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
- IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
- IN UINT64 Timeout,
- IN ATA_NONBLOCK_TASK *Task
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
+ IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
+ IN UINT64 Timeout,
+ IN ATA_NONBLOCK_TASK *Task
)
{
EFI_STATUS Status;
@@ -1133,16 +1131,16 @@ Exit:
**/
EFI_STATUS
AtaUdmStatusWait (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN UINT64 Timeout
- )
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN UINT64 Timeout
+ )
{
- UINT8 RegisterValue;
- EFI_STATUS Status;
- UINT16 IoPortForBmis;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
+ UINT8 RegisterValue;
+ EFI_STATUS Status;
+ UINT16 IoPortForBmis;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -1159,7 +1157,7 @@ AtaUdmStatusWait (
break;
}
- IoPortForBmis = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
+ IoPortForBmis = (UINT16)(IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
RegisterValue = IdeReadPortB (PciIo, IoPortForBmis);
if (((RegisterValue & BMIS_ERROR) != 0) || (Timeout == 0)) {
DEBUG ((DEBUG_ERROR, "ATA UDMA operation fails\n"));
@@ -1171,6 +1169,7 @@ AtaUdmStatusWait (
Status = EFI_SUCCESS;
break;
}
+
//
// Stall for 100 microseconds.
//
@@ -1197,14 +1196,14 @@ AtaUdmStatusWait (
**/
EFI_STATUS
AtaUdmStatusCheck (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN ATA_NONBLOCK_TASK *Task,
- IN EFI_IDE_REGISTERS *IdeRegisters
- )
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN ATA_NONBLOCK_TASK *Task,
+ IN EFI_IDE_REGISTERS *IdeRegisters
+ )
{
- UINT8 RegisterValue;
- UINT16 IoPortForBmis;
- EFI_STATUS Status;
+ UINT8 RegisterValue;
+ UINT16 IoPortForBmis;
+ EFI_STATUS Status;
Task->RetryTimes--;
@@ -1213,7 +1212,7 @@ AtaUdmStatusCheck (
return EFI_DEVICE_ERROR;
}
- IoPortForBmis = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
+ IoPortForBmis = (UINT16)(IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
RegisterValue = IdeReadPortB (PciIo, IoPortForBmis);
if ((RegisterValue & BMIS_ERROR) != 0) {
@@ -1273,36 +1272,36 @@ AtaUdmaInOut (
IN ATA_NONBLOCK_TASK *Task
)
{
- EFI_STATUS Status;
- UINT16 IoPortForBmic;
- UINT16 IoPortForBmis;
- UINT16 IoPortForBmid;
-
- UINTN PrdTableSize;
- EFI_PHYSICAL_ADDRESS PrdTableMapAddr;
- VOID *PrdTableMap;
- EFI_PHYSICAL_ADDRESS PrdTableBaseAddr;
- EFI_ATA_DMA_PRD *TempPrdBaseAddr;
- UINTN PrdTableNum;
-
- UINT8 RegisterValue;
- UINTN PageCount;
- UINTN ByteCount;
- UINTN ByteRemaining;
- UINT8 DeviceControl;
-
- VOID *BufferMap;
- EFI_PHYSICAL_ADDRESS BufferMapAddress;
- EFI_PCI_IO_PROTOCOL_OPERATION PciIoOperation;
-
- UINT8 DeviceHead;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_TPL OldTpl;
-
- UINTN AlignmentMask;
- UINTN RealPageCount;
- EFI_PHYSICAL_ADDRESS BaseAddr;
- EFI_PHYSICAL_ADDRESS BaseMapAddr;
+ EFI_STATUS Status;
+ UINT16 IoPortForBmic;
+ UINT16 IoPortForBmis;
+ UINT16 IoPortForBmid;
+
+ UINTN PrdTableSize;
+ EFI_PHYSICAL_ADDRESS PrdTableMapAddr;
+ VOID *PrdTableMap;
+ EFI_PHYSICAL_ADDRESS PrdTableBaseAddr;
+ EFI_ATA_DMA_PRD *TempPrdBaseAddr;
+ UINTN PrdTableNum;
+
+ UINT8 RegisterValue;
+ UINTN PageCount;
+ UINTN ByteCount;
+ UINTN ByteRemaining;
+ UINT8 DeviceControl;
+
+ VOID *BufferMap;
+ EFI_PHYSICAL_ADDRESS BufferMapAddress;
+ EFI_PCI_IO_PROTOCOL_OPERATION PciIoOperation;
+
+ UINT8 DeviceHead;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_TPL OldTpl;
+
+ UINTN AlignmentMask;
+ UINTN RealPageCount;
+ EFI_PHYSICAL_ADDRESS BaseAddr;
+ EFI_PHYSICAL_ADDRESS BaseMapAddr;
Status = EFI_SUCCESS;
PrdTableMap = NULL;
@@ -1329,6 +1328,7 @@ AtaUdmaInOut (
//
MicroSecondDelay (1000);
}
+
gBS->RestoreTPL (OldTpl);
//
@@ -1341,9 +1341,9 @@ AtaUdmaInOut (
//
// Set relevant IO Port address.
//
- IoPortForBmic = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIC_OFFSET);
- IoPortForBmis = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
- IoPortForBmid = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMID_OFFSET);
+ IoPortForBmic = (UINT16)(IdeRegisters->BusMasterBaseAddr + BMIC_OFFSET);
+ IoPortForBmis = (UINT16)(IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
+ IoPortForBmid = (UINT16)(IdeRegisters->BusMasterBaseAddr + BMID_OFFSET);
//
// For Blocking mode, start the command.
@@ -1355,7 +1355,7 @@ AtaUdmaInOut (
// Calculate the number of PRD entry.
// Every entry in PRD table can specify a 64K memory region.
//
- PrdTableNum = (UINTN)(RShiftU64(DataLength, 16) + 1);
+ PrdTableNum = (UINTN)(RShiftU64 (DataLength, 16) + 1);
//
// Make sure that the memory region of PRD table is not cross 64K boundary
@@ -1378,14 +1378,14 @@ AtaUdmaInOut (
//
ASSERT (RealPageCount > PageCount);
- Status = PciIo->AllocateBuffer (
- PciIo,
- AllocateAnyPages,
- EfiBootServicesData,
- RealPageCount,
- (VOID **)&BaseAddr,
- 0
- );
+ Status = PciIo->AllocateBuffer (
+ PciIo,
+ AllocateAnyPages,
+ EfiBootServicesData,
+ RealPageCount,
+ (VOID **)&BaseAddr,
+ 0
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
@@ -1394,7 +1394,7 @@ AtaUdmaInOut (
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
- (VOID*)(UINTN)BaseAddr,
+ (VOID *)(UINTN)BaseAddr,
&ByteCount,
&BaseMapAddr,
&PrdTableMap
@@ -1405,18 +1405,18 @@ AtaUdmaInOut (
// it means the DMA operation may be broken into several discontinuous smaller chunks.
// Can't handle this case.
//
- PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr);
+ PciIo->FreeBuffer (PciIo, RealPageCount, (VOID *)(UINTN)BaseAddr);
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID *) ((UINTN) BaseAddr), ByteCount);
+ ZeroMem ((VOID *)((UINTN)BaseAddr), ByteCount);
//
// Calculate the 64K align address as PRD Table base address.
//
AlignmentMask = SIZE_64KB - 1;
- PrdTableBaseAddr = ((UINTN) BaseAddr + AlignmentMask) & ~AlignmentMask;
- PrdTableMapAddr = ((UINTN) BaseMapAddr + AlignmentMask) & ~AlignmentMask;
+ PrdTableBaseAddr = ((UINTN)BaseAddr + AlignmentMask) & ~AlignmentMask;
+ PrdTableMapAddr = ((UINTN)BaseMapAddr + AlignmentMask) & ~AlignmentMask;
//
// Map the host address of DataBuffer to DMA master address.
@@ -1438,7 +1438,7 @@ AtaUdmaInOut (
);
if (EFI_ERROR (Status) || (ByteCount != DataLength)) {
PciIo->Unmap (PciIo, PrdTableMap);
- PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr);
+ PciIo->FreeBuffer (PciIo, RealPageCount, (VOID *)(UINTN)BaseAddr);
return EFI_OUT_OF_RESOURCES;
}
@@ -1452,17 +1452,17 @@ AtaUdmaInOut (
// Fill the PRD table with appropriate bus master address of data buffer and data length.
//
ByteRemaining = ByteCount;
- TempPrdBaseAddr = (EFI_ATA_DMA_PRD*)(UINTN)PrdTableBaseAddr;
+ TempPrdBaseAddr = (EFI_ATA_DMA_PRD *)(UINTN)PrdTableBaseAddr;
while (ByteRemaining != 0) {
if (ByteRemaining <= 0x10000) {
- TempPrdBaseAddr->RegionBaseAddr = (UINT32) ((UINTN) BufferMapAddress);
- TempPrdBaseAddr->ByteCount = (UINT16) ByteRemaining;
+ TempPrdBaseAddr->RegionBaseAddr = (UINT32)((UINTN)BufferMapAddress);
+ TempPrdBaseAddr->ByteCount = (UINT16)ByteRemaining;
TempPrdBaseAddr->EndOfTable = 0x8000;
break;
}
- TempPrdBaseAddr->RegionBaseAddr = (UINT32) ((UINTN) BufferMapAddress);
- TempPrdBaseAddr->ByteCount = (UINT16) 0x0;
+ TempPrdBaseAddr->RegionBaseAddr = (UINT32)((UINTN)BufferMapAddress);
+ TempPrdBaseAddr->ByteCount = (UINT16)0x0;
ByteRemaining -= 0x10000;
BufferMapAddress += 0x10000;
@@ -1485,7 +1485,7 @@ AtaUdmaInOut (
//
// Read BMIS register and clear ERROR and INTR bit
//
- RegisterValue = IdeReadPortB(PciIo, IoPortForBmis);
+ RegisterValue = IdeReadPortB (PciIo, IoPortForBmis);
RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
IdeWritePortB (PciIo, IoPortForBmis, RegisterValue);
@@ -1497,18 +1497,19 @@ AtaUdmaInOut (
//
// Set BMIC register to identify the operation direction
//
- RegisterValue = IdeReadPortB(PciIo, IoPortForBmic);
+ RegisterValue = IdeReadPortB (PciIo, IoPortForBmic);
if (Read) {
RegisterValue |= BMIC_NREAD;
} else {
- RegisterValue &= ~((UINT8) BMIC_NREAD);
+ RegisterValue &= ~((UINT8)BMIC_NREAD);
}
+
IdeWritePortB (PciIo, IoPortForBmic, RegisterValue);
if (Task != NULL) {
Task->Map = BufferMap;
Task->TableMap = PrdTableMap;
- Task->MapBaseAddress = (EFI_ATA_DMA_PRD*)(UINTN)BaseAddr;
+ Task->MapBaseAddress = (EFI_ATA_DMA_PRD *)(UINTN)BaseAddr;
Task->PageCount = RealPageCount;
Task->IsStart = TRUE;
}
@@ -1528,13 +1529,13 @@ AtaUdmaInOut (
Status = EFI_DEVICE_ERROR;
goto Exit;
}
+
//
// Set START bit of BMIC register
//
- RegisterValue = IdeReadPortB(PciIo, IoPortForBmic);
+ RegisterValue = IdeReadPortB (PciIo, IoPortForBmic);
RegisterValue |= BMIC_START;
- IdeWritePortB(PciIo, IoPortForBmic, RegisterValue);
-
+ IdeWritePortB (PciIo, IoPortForBmic, RegisterValue);
}
//
@@ -1552,7 +1553,7 @@ AtaUdmaInOut (
// out, or a error has been happened, it needs to clear the register and free
// buffer.
//
- if ((Task == NULL) || Status != EFI_NOT_READY) {
+ if ((Task == NULL) || (Status != EFI_NOT_READY)) {
//
// Read BMIS register and clear ERROR and INTR bit
//
@@ -1563,13 +1564,13 @@ AtaUdmaInOut (
//
// Read Status Register of IDE device to clear interrupt
//
- RegisterValue = IdeReadPortB(PciIo, IdeRegisters->CmdOrStatus);
+ RegisterValue = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus);
//
// Clear START bit of BMIC register
//
- RegisterValue = IdeReadPortB(PciIo, IoPortForBmic);
- RegisterValue &= ~((UINT8) BMIC_START);
+ RegisterValue = IdeReadPortB (PciIo, IoPortForBmic);
+ RegisterValue &= ~((UINT8)BMIC_START);
IdeWritePortB (PciIo, IoPortForBmic, RegisterValue);
//
@@ -1582,21 +1583,20 @@ AtaUdmaInOut (
// Stall for 10 milliseconds.
//
MicroSecondDelay (10000);
-
}
Exit:
//
// Free all allocated resource
//
- if ((Task == NULL) || Status != EFI_NOT_READY) {
+ if ((Task == NULL) || (Status != EFI_NOT_READY)) {
if (Task != NULL) {
PciIo->Unmap (PciIo, Task->TableMap);
PciIo->FreeBuffer (PciIo, Task->PageCount, Task->MapBaseAddress);
PciIo->Unmap (PciIo, Task->Map);
} else {
PciIo->Unmap (PciIo, PrdTableMap);
- PciIo->FreeBuffer (PciIo, RealPageCount, (VOID*)(UINTN)BaseAddr);
+ PciIo->FreeBuffer (PciIo, RealPageCount, (VOID *)(UINTN)BaseAddr);
PciIo->Unmap (PciIo, BufferMap);
}
@@ -1622,12 +1622,12 @@ Exit:
EFI_STATUS
EFIAPI
AtaPacketReadPendingData (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters
)
{
- UINT8 AltRegister;
- UINT16 TempWordBuffer;
+ UINT8 AltRegister;
+ UINT16 TempWordBuffer;
AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev);
if ((AltRegister & ATA_STSREG_BSY) == ATA_STSREG_BSY) {
@@ -1646,6 +1646,7 @@ AtaPacketReadPendingData (
TempWordBuffer = IdeReadPortB (PciIo, IdeRegisters->AltOrDev);
}
}
+
return EFI_SUCCESS;
}
@@ -1670,12 +1671,12 @@ AtaPacketReadPendingData (
EFI_STATUS
EFIAPI
AtaPacketReadWrite (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN OUT VOID *Buffer,
- IN OUT UINT32 *ByteCount,
- IN BOOLEAN Read,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN OUT VOID *Buffer,
+ IN OUT UINT32 *ByteCount,
+ IN BOOLEAN Read,
+ IN UINT64 Timeout
)
{
UINT32 RequiredWordCount;
@@ -1803,17 +1804,17 @@ AtaPacketReadWrite (
EFI_STATUS
EFIAPI
AtaPacketCommandExecute (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
)
{
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- EFI_STATUS Status;
- UINT8 Count;
- UINT8 PacketCommand[12];
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_STATUS Status;
+ UINT8 Count;
+ UINT8 PacketCommand[12];
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
@@ -1836,9 +1837,9 @@ AtaPacketCommandExecute (
// set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device
// determine how many data should be transferred.
//
- AtaCommandBlock.AtaCylinderLow = (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff);
- AtaCommandBlock.AtaCylinderHigh = (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8);
- AtaCommandBlock.AtaDeviceHead = (UINT8) (Device << 0x4);
+ AtaCommandBlock.AtaCylinderLow = (UINT8)(ATAPI_MAX_BYTE_COUNT & 0x00ff);
+ AtaCommandBlock.AtaCylinderHigh = (UINT8)(ATAPI_MAX_BYTE_COUNT >> 8);
+ AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4);
AtaCommandBlock.AtaCommand = ATA_CMD_PACKET;
IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)(0xe0 | (Device << 0x4)));
@@ -1864,7 +1865,7 @@ AtaPacketCommandExecute (
// Send out ATAPI command packet
//
for (Count = 0; Count < 6; Count++) {
- IdeWritePortW (PciIo, IdeRegisters->Data, *((UINT16*)PacketCommand + Count));
+ IdeWritePortW (PciIo, IdeRegisters->Data, *((UINT16 *)PacketCommand + Count));
//
// Stall for 10 microseconds.
//
@@ -1897,7 +1898,6 @@ AtaPacketCommandExecute (
return Status;
}
-
/**
Set the calculated Best transfer mode to a detected device.
@@ -1922,8 +1922,8 @@ SetDeviceTransferMode (
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
@@ -1971,14 +1971,14 @@ SetDriveParameters (
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
AtaCommandBlock.AtaCommand = ATA_CMD_INIT_DRIVE_PARAM;
AtaCommandBlock.AtaSectorCount = DriveParameters->Sector;
- AtaCommandBlock.AtaDeviceHead = (UINT8) ((Device << 0x4) + DriveParameters->Heads);
+ AtaCommandBlock.AtaDeviceHead = (UINT8)((Device << 0x4) + DriveParameters->Heads);
//
// Send Init drive parameters
@@ -2032,10 +2032,10 @@ IdeAtaSmartReturnStatusCheck (
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
- UINT8 LBAMid;
- UINT8 LBAHigh;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ UINT8 LBAMid;
+ UINT8 LBAHigh;
ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
@@ -2043,7 +2043,7 @@ IdeAtaSmartReturnStatusCheck (
AtaCommandBlock.AtaFeatures = ATA_SMART_RETURN_STATUS;
AtaCommandBlock.AtaCylinderLow = ATA_CONSTANT_4F;
AtaCommandBlock.AtaCylinderHigh = ATA_CONSTANT_C2;
- AtaCommandBlock.AtaDeviceHead = (UINT8) ((Device << 0x4) | 0xe0);
+ AtaCommandBlock.AtaDeviceHead = (UINT8)((Device << 0x4) | 0xe0);
//
// Send S.M.A.R.T Read Return Status command to device
@@ -2079,18 +2079,18 @@ IdeAtaSmartReturnStatusCheck (
//
DEBUG ((DEBUG_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n"));
REPORT_STATUS_CODE (
- EFI_PROGRESS_CODE,
- (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
- );
+ EFI_PROGRESS_CODE,
+ (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
+ );
} else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
//
// The threshold exceeded condition is detected by the device
//
DEBUG ((DEBUG_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n"));
REPORT_STATUS_CODE (
- EFI_PROGRESS_CODE,
- (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
- );
+ EFI_PROGRESS_CODE,
+ (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
+ );
}
return EFI_SUCCESS;
@@ -2116,8 +2116,8 @@ IdeAtaSmartSupport (
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
)
{
- EFI_STATUS Status;
- EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCK AtaCommandBlock;
//
// Detect if the device supports S.M.A.R.T.
@@ -2126,8 +2126,12 @@ IdeAtaSmartSupport (
//
// S.M.A.R.T is not supported by the device
//
- DEBUG ((DEBUG_INFO, "S.M.A.R.T feature is not supported at [%a] channel [%a] device!\n",
- (Channel == 1) ? "secondary" : "primary", (Device == 1) ? "slave" : "master"));
+ DEBUG ((
+ DEBUG_INFO,
+ "S.M.A.R.T feature is not supported at [%a] channel [%a] device!\n",
+ (Channel == 1) ? "secondary" : "primary",
+ (Device == 1) ? "slave" : "master"
+ ));
REPORT_STATUS_CODE (
EFI_ERROR_CODE | EFI_ERROR_MINOR,
(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
@@ -2137,7 +2141,6 @@ IdeAtaSmartSupport (
// Check if the feature is enabled. If not, then enable S.M.A.R.T.
//
if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) {
-
REPORT_STATUS_CODE (
EFI_PROGRESS_CODE,
(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE)
@@ -2149,7 +2152,7 @@ IdeAtaSmartSupport (
AtaCommandBlock.AtaFeatures = ATA_SMART_ENABLE_OPERATION;
AtaCommandBlock.AtaCylinderLow = ATA_CONSTANT_4F;
AtaCommandBlock.AtaCylinderHigh = ATA_CONSTANT_C2;
- AtaCommandBlock.AtaDeviceHead = (UINT8) ((Device << 0x4) | 0xe0);
+ AtaCommandBlock.AtaDeviceHead = (UINT8)((Device << 0x4) | 0xe0);
//
// Send S.M.A.R.T Enable command to device
@@ -2174,7 +2177,7 @@ IdeAtaSmartSupport (
AtaCommandBlock.AtaSectorCount = 0xF1;
AtaCommandBlock.AtaCylinderLow = ATA_CONSTANT_4F;
AtaCommandBlock.AtaCylinderHigh = ATA_CONSTANT_C2;
- AtaCommandBlock.AtaDeviceHead = (UINT8) ((Device << 0x4) | 0xe0);
+ AtaCommandBlock.AtaDeviceHead = (UINT8)((Device << 0x4) | 0xe0);
Status = AtaNonDataCommandIn (
Instance->PciIo,
@@ -2195,15 +2198,17 @@ IdeAtaSmartSupport (
}
}
- DEBUG ((DEBUG_INFO, "Enabled S.M.A.R.T feature at [%a] channel [%a] device!\n",
- (Channel == 1) ? "secondary" : "primary", (Device == 1) ? "slave" : "master"));
-
+ DEBUG ((
+ DEBUG_INFO,
+ "Enabled S.M.A.R.T feature at [%a] channel [%a] device!\n",
+ (Channel == 1) ? "secondary" : "primary",
+ (Device == 1) ? "slave" : "master"
+ ));
}
- return ;
+ return;
}
-
/**
Sends out an ATA Identify Command to the specified device.
@@ -2315,7 +2320,7 @@ AtaIdentifyPacket (
Status = AtaPioDataInOut (
Instance->PciIo,
&Instance->IdeRegisters[Channel],
- (VOID *) Buffer,
+ (VOID *)Buffer,
sizeof (EFI_IDENTIFY_DATA),
TRUE,
&AtaCommandBlock,
@@ -2327,7 +2332,6 @@ AtaIdentifyPacket (
return Status;
}
-
/**
This function is used for detect whether the IDE device exists in the
specified Channel as the specified Device Number.
@@ -2357,22 +2361,22 @@ DetectAndConfigIdeDevice (
IN UINT8 IdeChannel
)
{
- EFI_STATUS Status;
- UINT8 SectorCountReg;
- UINT8 LBALowReg;
- UINT8 LBAMidReg;
- UINT8 LBAHighReg;
- EFI_ATA_DEVICE_TYPE DeviceType;
- UINT8 IdeDevice;
- EFI_IDE_REGISTERS *IdeRegisters;
- EFI_IDENTIFY_DATA Buffer;
+ EFI_STATUS Status;
+ UINT8 SectorCountReg;
+ UINT8 LBALowReg;
+ UINT8 LBAMidReg;
+ UINT8 LBAHighReg;
+ EFI_ATA_DEVICE_TYPE DeviceType;
+ UINT8 IdeDevice;
+ EFI_IDE_REGISTERS *IdeRegisters;
+ EFI_IDENTIFY_DATA Buffer;
EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_ATA_COLLECTIVE_MODE *SupportedModes;
- EFI_ATA_TRANSFER_MODE TransferMode;
- EFI_ATA_DRIVE_PARMS DriveParameters;
+ EFI_ATA_COLLECTIVE_MODE *SupportedModes;
+ EFI_ATA_TRANSFER_MODE TransferMode;
+ EFI_ATA_DRIVE_PARMS DriveParameters;
IdeRegisters = &Instance->IdeRegisters[IdeChannel];
IdeInit = Instance->IdeControllerInit;
@@ -2392,7 +2396,7 @@ DetectAndConfigIdeDevice (
Status = WaitForBSYClear (PciIo, IdeRegisters, 350000000);
if (EFI_ERROR (Status)) {
- DEBUG((DEBUG_ERROR, "New detecting method: Send Execute Diagnostic Command: WaitForBSYClear: Status: %d\n", Status));
+ DEBUG ((DEBUG_ERROR, "New detecting method: Send Execute Diagnostic Command: WaitForBSYClear: Status: %d\n", Status));
continue;
}
@@ -2453,9 +2457,13 @@ DetectAndConfigIdeDevice (
continue;
}
- DEBUG ((DEBUG_INFO, "[%a] channel [%a] [%a] device\n",
- (IdeChannel == 1) ? "secondary" : "primary ", (IdeDevice == 1) ? "slave " : "master",
- DeviceType == EfiIdeCdrom ? "cdrom " : "harddisk"));
+ DEBUG ((
+ DEBUG_INFO,
+ "[%a] channel [%a] [%a] device\n",
+ (IdeChannel == 1) ? "secondary" : "primary ",
+ (IdeDevice == 1) ? "slave " : "master",
+ DeviceType == EfiIdeCdrom ? "cdrom " : "harddisk"
+ ));
//
// If the device is a hard disk, then try to enable S.M.A.R.T feature
//
@@ -2497,9 +2505,9 @@ DetectAndConfigIdeDevice (
TransferMode.ModeCategory = EFI_ATA_MODE_FLOW_PIO;
}
- TransferMode.ModeNumber = (UINT8) (SupportedModes->PioMode.Mode);
+ TransferMode.ModeNumber = (UINT8)(SupportedModes->PioMode.Mode);
- if (SupportedModes->ExtModeCount == 0){
+ if (SupportedModes->ExtModeCount == 0) {
Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL);
if (EFI_ERROR (Status)) {
@@ -2516,8 +2524,8 @@ DetectAndConfigIdeDevice (
//
if (SupportedModes->UdmaMode.Valid) {
TransferMode.ModeCategory = EFI_ATA_MODE_UDMA;
- TransferMode.ModeNumber = (UINT8) (SupportedModes->UdmaMode.Mode);
- Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL);
+ TransferMode.ModeNumber = (UINT8)(SupportedModes->UdmaMode.Mode);
+ Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set transfer Mode Fail, Status = %r\n", Status));
@@ -2525,8 +2533,8 @@ DetectAndConfigIdeDevice (
}
} else if (SupportedModes->MultiWordDmaMode.Valid) {
TransferMode.ModeCategory = EFI_ATA_MODE_MDMA;
- TransferMode.ModeNumber = (UINT8) SupportedModes->MultiWordDmaMode.Mode;
- Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL);
+ TransferMode.ModeNumber = (UINT8)SupportedModes->MultiWordDmaMode.Mode;
+ Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set transfer Mode Fail, Status = %r\n", Status));
@@ -2543,9 +2551,9 @@ DetectAndConfigIdeDevice (
//
// Init driver parameters
//
- DriveParameters.Sector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->sectors_per_track;
- DriveParameters.Heads = (UINT8) (((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->heads - 1);
- DriveParameters.MultipleSector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->multi_sector_cmd_max_sct_cnt;
+ DriveParameters.Sector = (UINT8)((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->sectors_per_track;
+ DriveParameters.Heads = (UINT8)(((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->heads - 1);
+ DriveParameters.MultipleSector = (UINT8)((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->multi_sector_cmd_max_sct_cnt;
Status = SetDriveParameters (Instance, IdeChannel, IdeDevice, &DriveParameters, NULL);
}
@@ -2568,10 +2576,10 @@ DetectAndConfigIdeDevice (
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_ENABLE));
}
}
+
return EFI_SUCCESS;
}
-
/**
Initialize ATA host controller at IDE mode.
@@ -2583,7 +2591,7 @@ DetectAndConfigIdeDevice (
EFI_STATUS
EFIAPI
IdeModeInitialization (
- IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
+ IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
)
{
EFI_STATUS Status;
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h
index c39ebd0667..ce6c9151cd 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h
@@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef __ATA_HC_IDE_MODE_H__
#define __ATA_HC_IDE_MODE_H__
@@ -59,50 +60,50 @@ typedef enum {
#define BMIS_INTERRUPT BIT2
#define BMIS_ERROR BIT1
-#define BMIC_OFFSET 0x00
-#define BMIS_OFFSET 0x02
-#define BMID_OFFSET 0x04
+#define BMIC_OFFSET 0x00
+#define BMIS_OFFSET 0x02
+#define BMID_OFFSET 0x04
//
// IDE transfer mode
//
-#define EFI_ATA_MODE_DEFAULT_PIO 0x00
-#define EFI_ATA_MODE_FLOW_PIO 0x01
-#define EFI_ATA_MODE_MDMA 0x04
-#define EFI_ATA_MODE_UDMA 0x08
+#define EFI_ATA_MODE_DEFAULT_PIO 0x00
+#define EFI_ATA_MODE_FLOW_PIO 0x01
+#define EFI_ATA_MODE_MDMA 0x04
+#define EFI_ATA_MODE_UDMA 0x08
typedef struct {
- UINT32 RegionBaseAddr;
- UINT16 ByteCount;
- UINT16 EndOfTable;
+ UINT32 RegionBaseAddr;
+ UINT16 ByteCount;
+ UINT16 EndOfTable;
} EFI_ATA_DMA_PRD;
typedef struct {
- UINT8 ModeNumber : 3;
- UINT8 ModeCategory : 5;
+ UINT8 ModeNumber : 3;
+ UINT8 ModeCategory : 5;
} EFI_ATA_TRANSFER_MODE;
typedef struct {
- UINT8 Sector;
- UINT8 Heads;
- UINT8 MultipleSector;
+ UINT8 Sector;
+ UINT8 Heads;
+ UINT8 MultipleSector;
} EFI_ATA_DRIVE_PARMS;
//
// IDE registers set
//
typedef struct {
- UINT16 Data;
- UINT16 ErrOrFeature;
- UINT16 SectorCount;
- UINT16 SectorNumber;
- UINT16 CylinderLsb;
- UINT16 CylinderMsb;
- UINT16 Head;
- UINT16 CmdOrStatus;
- UINT16 AltOrDev;
-
- UINT16 BusMasterBaseAddr;
+ UINT16 Data;
+ UINT16 ErrOrFeature;
+ UINT16 SectorCount;
+ UINT16 SectorNumber;
+ UINT16 CylinderLsb;
+ UINT16 CylinderMsb;
+ UINT16 Head;
+ UINT16 CmdOrStatus;
+ UINT16 AltOrDev;
+
+ UINT16 BusMasterBaseAddr;
} EFI_IDE_REGISTERS;
//
@@ -164,8 +165,8 @@ typedef struct {
EFI_STATUS
EFIAPI
GetIdeRegisterIoAddr (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN OUT EFI_IDE_REGISTERS *IdeRegisters
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN OUT EFI_IDE_REGISTERS *IdeRegisters
);
/**
@@ -187,12 +188,11 @@ GetIdeRegisterIoAddr (
EFI_STATUS
EFIAPI
AtaPacketCommandExecute (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_IDE_REGISTERS *IdeRegisters,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_IDE_REGISTERS *IdeRegisters,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
);
#endif
-
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
index 6c3268896b..a729c087ff 100644
--- a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
+++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
@@ -15,7 +15,7 @@
//
// ATA Bus Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gAtaBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gAtaBusDriverBinding = {
AtaBusDriverBindingSupported,
AtaBusDriverBindingStart,
AtaBusDriverBindingStop,
@@ -27,9 +27,9 @@ EFI_DRIVER_BINDING_PROTOCOL gAtaBusDriverBinding = {
//
// Template for ATA Child Device.
//
-ATA_DEVICE gAtaDeviceTemplate = {
- ATA_DEVICE_SIGNATURE, // Signature
- NULL, // Handle
+ATA_DEVICE gAtaDeviceTemplate = {
+ ATA_DEVICE_SIGNATURE, // Signature
+ NULL, // Handle
{ // BlockIo
EFI_BLOCK_IO_PROTOCOL_REVISION,
NULL,
@@ -65,25 +65,27 @@ ATA_DEVICE gAtaDeviceTemplate = {
AtaDiskInfoSenseData,
AtaDiskInfoWhichIde
},
- NULL, // DevicePath
+ NULL, // DevicePath
{
AtaStorageSecurityReceiveData,
AtaStorageSecuritySendData
},
- NULL, // AtaBusDriverData
- 0, // Port
- 0, // PortMultiplierPort
- { 0, }, // Packet
- {{ 0}, }, // Acb
- NULL, // Asb
- FALSE, // UdmaValid
- FALSE, // Lba48Bit
- NULL, // IdentifyData
- NULL, // ControllerNameTable
- {L'\0', }, // ModelName
- {NULL, NULL}, // AtaTaskList
- {NULL, NULL}, // AtaSubTaskList
- FALSE // Abort
+ NULL, // AtaBusDriverData
+ 0, // Port
+ 0, // PortMultiplierPort
+ { 0, }, // Packet
+ {
+ { 0 },
+ }, // Acb
+ NULL, // Asb
+ FALSE, // UdmaValid
+ FALSE, // Lba48Bit
+ NULL, // IdentifyData
+ NULL, // ControllerNameTable
+ { L'\0', }, // ModelName
+ { NULL, NULL }, // AtaTaskList
+ { NULL, NULL }, // AtaSubTaskList
+ FALSE // Abort
};
/**
@@ -101,8 +103,8 @@ ATA_DEVICE gAtaDeviceTemplate = {
**/
VOID *
AllocateAlignedBuffer (
- IN ATA_DEVICE *AtaDevice,
- IN UINTN BufferSize
+ IN ATA_DEVICE *AtaDevice,
+ IN UINTN BufferSize
)
{
return AllocateAlignedPages (EFI_SIZE_TO_PAGES (BufferSize), AtaDevice->AtaBusDriverData->AtaPassThru->Mode->IoAlign);
@@ -120,8 +122,8 @@ AllocateAlignedBuffer (
**/
VOID
FreeAlignedBuffer (
- IN VOID *Buffer,
- IN UINTN BufferSize
+ IN VOID *Buffer,
+ IN UINTN BufferSize
)
{
if (Buffer != NULL) {
@@ -129,7 +131,6 @@ FreeAlignedBuffer (
}
}
-
/**
Release all the resources allocated for the ATA device.
@@ -143,11 +144,11 @@ ReleaseAtaResources (
IN ATA_DEVICE *AtaDevice
)
{
- ATA_BUS_ASYN_SUB_TASK *SubTask;
- ATA_BUS_ASYN_TASK *AtaTask;
- LIST_ENTRY *Entry;
- LIST_ENTRY *DelEntry;
- EFI_TPL OldTpl;
+ ATA_BUS_ASYN_SUB_TASK *SubTask;
+ ATA_BUS_ASYN_TASK *AtaTask;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *DelEntry;
+ EFI_TPL OldTpl;
FreeUnicodeStringTable (AtaDevice->ControllerNameTable);
FreeAlignedBuffer (AtaDevice->Asb, sizeof (EFI_ATA_STATUS_BLOCK));
@@ -155,14 +156,16 @@ ReleaseAtaResources (
if (AtaDevice->DevicePath != NULL) {
FreePool (AtaDevice->DevicePath);
}
+
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
if (!IsListEmpty (&AtaDevice->AtaSubTaskList)) {
//
// Free the Subtask list.
//
- for(Entry = AtaDevice->AtaSubTaskList.ForwardLink;
- Entry != (&AtaDevice->AtaSubTaskList);
- ) {
+ for (Entry = AtaDevice->AtaSubTaskList.ForwardLink;
+ Entry != (&AtaDevice->AtaSubTaskList);
+ )
+ {
DelEntry = Entry;
Entry = Entry->ForwardLink;
SubTask = ATA_ASYN_SUB_TASK_FROM_ENTRY (DelEntry);
@@ -171,13 +174,15 @@ ReleaseAtaResources (
FreeAtaSubTask (SubTask);
}
}
+
if (!IsListEmpty (&AtaDevice->AtaTaskList)) {
//
// Free the Subtask list.
//
- for(Entry = AtaDevice->AtaTaskList.ForwardLink;
- Entry != (&AtaDevice->AtaTaskList);
- ) {
+ for (Entry = AtaDevice->AtaTaskList.ForwardLink;
+ Entry != (&AtaDevice->AtaTaskList);
+ )
+ {
DelEntry = Entry;
Entry = Entry->ForwardLink;
AtaTask = ATA_ASYN_TASK_FROM_ENTRY (DelEntry);
@@ -186,11 +191,11 @@ ReleaseAtaResources (
FreePool (AtaTask);
}
}
+
gBS->RestoreTPL (OldTpl);
FreePool (AtaDevice);
}
-
/**
Registers an ATA device.
@@ -210,29 +215,29 @@ ReleaseAtaResources (
**/
EFI_STATUS
RegisterAtaDevice (
- IN OUT ATA_BUS_DRIVER_DATA *AtaBusDriverData,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort
+ IN OUT ATA_BUS_DRIVER_DATA *AtaBusDriverData,
+ IN UINT16 Port,
+ IN UINT16 PortMultiplierPort
)
{
- EFI_STATUS Status;
- ATA_DEVICE *AtaDevice;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
- EFI_HANDLE DeviceHandle;
-
- AtaDevice = NULL;
- NewDevicePathNode = NULL;
- DevicePath = NULL;
+ EFI_STATUS Status;
+ ATA_DEVICE *AtaDevice;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
+ EFI_HANDLE DeviceHandle;
+
+ AtaDevice = NULL;
+ NewDevicePathNode = NULL;
+ DevicePath = NULL;
RemainingDevicePath = NULL;
//
// Build device path
//
AtaPassThru = AtaBusDriverData->AtaPassThru;
- Status = AtaPassThru->BuildDevicePath (AtaPassThru, Port, PortMultiplierPort, &NewDevicePathNode);
+ Status = AtaPassThru->BuildDevicePath (AtaPassThru, Port, PortMultiplierPort, &NewDevicePathNode);
if (EFI_ERROR (Status)) {
goto Done;
}
@@ -243,10 +248,10 @@ RegisterAtaDevice (
goto Done;
}
- DeviceHandle = NULL;
+ DeviceHandle = NULL;
RemainingDevicePath = DevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
- if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd(RemainingDevicePath)) {
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
+ if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd (RemainingDevicePath)) {
Status = EFI_ALREADY_STARTED;
FreePool (DevicePath);
goto Done;
@@ -270,11 +275,12 @@ RegisterAtaDevice (
AtaDevice->DevicePath = DevicePath;
AtaDevice->Port = Port;
AtaDevice->PortMultiplierPort = PortMultiplierPort;
- AtaDevice->Asb = AllocateAlignedBuffer (AtaDevice, sizeof (EFI_ATA_STATUS_BLOCK));
+ AtaDevice->Asb = AllocateAlignedBuffer (AtaDevice, sizeof (EFI_ATA_STATUS_BLOCK));
if (AtaDevice->Asb == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Done;
}
+
AtaDevice->IdentifyData = AllocateAlignedBuffer (AtaDevice, sizeof (ATA_IDENTIFY_DATA));
if (AtaDevice->IdentifyData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -368,13 +374,14 @@ RegisterAtaDevice (
if (EFI_ERROR (Status)) {
goto Done;
}
+
DEBUG ((DEBUG_INFO, "Successfully Install Storage Security Protocol on the ATA device\n"));
}
gBS->OpenProtocol (
AtaBusDriverData->Controller,
&gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
+ (VOID **)&AtaPassThru,
AtaBusDriverData->DriverBindingHandle,
AtaDevice->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -389,10 +396,10 @@ Done:
ReleaseAtaResources (AtaDevice);
DEBUG ((DEBUG_ERROR | DEBUG_INIT, "Failed to initialize Port %x PortMultiplierPort %x, status = %r\n", Port, PortMultiplierPort, Status));
}
+
return Status;
}
-
/**
Unregisters an ATA device.
@@ -409,25 +416,25 @@ Done:
**/
EFI_STATUS
UnregisterAtaDevice (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
- EFI_BLOCK_IO2_PROTOCOL *BlockIo2;
- ATA_DEVICE *AtaDevice;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *StorageSecurity;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ EFI_BLOCK_IO2_PROTOCOL *BlockIo2;
+ ATA_DEVICE *AtaDevice;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *StorageSecurity;
- BlockIo2 = NULL;
- BlockIo = NULL;
+ BlockIo2 = NULL;
+ BlockIo = NULL;
Status = gBS->OpenProtocol (
Handle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -439,7 +446,7 @@ UnregisterAtaDevice (
Status = gBS->OpenProtocol (
Handle,
&gEfiBlockIo2ProtocolGuid,
- (VOID **) &BlockIo2,
+ (VOID **)&BlockIo2,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -488,13 +495,13 @@ UnregisterAtaDevice (
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
- This->DriverBindingHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ (VOID **)&AtaPassThru,
+ This->DriverBindingHandle,
+ Handle,
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
return Status;
}
@@ -504,7 +511,7 @@ UnregisterAtaDevice (
Status = gBS->OpenProtocol (
Handle,
&gEfiStorageSecurityCommandProtocolGuid,
- (VOID **) &StorageSecurity,
+ (VOID **)&StorageSecurity,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -518,13 +525,13 @@ UnregisterAtaDevice (
);
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
- This->DriverBindingHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ (VOID **)&AtaPassThru,
+ This->DriverBindingHandle,
+ Handle,
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
return Status;
}
}
@@ -533,8 +540,6 @@ UnregisterAtaDevice (
return EFI_SUCCESS;
}
-
-
/**
Tests to see if this driver supports a given controller. If a child device is provided,
it further tests to see if this driver supports creating a handle for the specified child device.
@@ -585,11 +590,11 @@ AtaBusDriverBindingSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- UINT16 Port;
- UINT16 PortMultiplierPort;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ UINT16 Port;
+ UINT16 PortMultiplierPort;
//
// Test EFI_ATA_PASS_THRU_PROTOCOL on controller handle.
@@ -597,7 +602,7 @@ AtaBusDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
+ (VOID **)&AtaPassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -619,11 +624,11 @@ AtaBusDriverBindingSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_UNSUPPORTED;
}
@@ -637,11 +642,11 @@ AtaBusDriverBindingSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return Status;
}
}
@@ -650,11 +655,11 @@ AtaBusDriverBindingSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Open the EFI Device Path protocol needed to perform the supported test
@@ -662,7 +667,7 @@ AtaBusDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -670,7 +675,6 @@ AtaBusDriverBindingSupported (
return Status;
}
-
/**
Starts a device controller or a bus controller.
@@ -714,19 +718,19 @@ AtaBusDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- ATA_BUS_DRIVER_DATA *AtaBusDriverData;
- UINT16 Port;
- UINT16 PortMultiplierPort;
+ EFI_STATUS Status;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ ATA_BUS_DRIVER_DATA *AtaBusDriverData;
+ UINT16 Port;
+ UINT16 PortMultiplierPort;
AtaBusDriverData = NULL;
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -747,7 +751,7 @@ AtaBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiAtaPassThruProtocolGuid,
- (VOID **) &AtaPassThru,
+ (VOID **)&AtaPassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -766,9 +770,9 @@ AtaBusDriverBindingStart (
goto ErrorExit;
}
- AtaBusDriverData->AtaPassThru = AtaPassThru;
- AtaBusDriverData->Controller = Controller;
- AtaBusDriverData->ParentDevicePath = ParentDevicePath;
+ AtaBusDriverData->AtaPassThru = AtaPassThru;
+ AtaBusDriverData->Controller = Controller;
+ AtaBusDriverData->ParentDevicePath = ParentDevicePath;
AtaBusDriverData->DriverBindingHandle = This->DriverBindingHandle;
Status = gBS->InstallMultipleProtocolInterfaces (
@@ -780,12 +784,11 @@ AtaBusDriverBindingStart (
if (EFI_ERROR (Status)) {
goto ErrorExit;
}
-
} else {
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &AtaBusDriverData,
+ (VOID **)&AtaBusDriverData,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -826,14 +829,16 @@ AtaBusDriverBindingStart (
//
break;
}
+
RegisterAtaDevice (AtaBusDriverData, Port, PortMultiplierPort);
}
}
+
Status = EFI_SUCCESS;
} else if (!IsDevicePathEnd (RemainingDevicePath)) {
Status = AtaPassThru->GetDevice (AtaPassThru, RemainingDevicePath, &Port, &PortMultiplierPort);
if (!EFI_ERROR (Status)) {
- Status = RegisterAtaDevice (AtaBusDriverData,Port, PortMultiplierPort);
+ Status = RegisterAtaDevice (AtaBusDriverData, Port, PortMultiplierPort);
}
}
@@ -852,17 +857,15 @@ ErrorExit:
}
gBS->CloseProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return Status;
-
}
-
/**
Stops a device controller or a bus controller.
@@ -892,42 +895,42 @@ ErrorExit:
EFI_STATUS
EFIAPI
AtaBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- BOOLEAN AllChildrenStopped;
- UINTN Index;
- ATA_BUS_DRIVER_DATA *AtaBusDriverData;
+ EFI_STATUS Status;
+ BOOLEAN AllChildrenStopped;
+ UINTN Index;
+ ATA_BUS_DRIVER_DATA *AtaBusDriverData;
if (NumberOfChildren == 0) {
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &AtaBusDriverData,
+ (VOID **)&AtaBusDriverData,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
);
if (!EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiCallerIdGuid,
- AtaBusDriverData,
- NULL
- );
+ Controller,
+ &gEfiCallerIdGuid,
+ AtaBusDriverData,
+ NULL
+ );
FreePool (AtaBusDriverData);
}
gBS->CloseProtocol (
- Controller,
- &gEfiAtaPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiAtaPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_SUCCESS;
}
@@ -935,7 +938,6 @@ AtaBusDriverBindingStop (
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
Status = UnregisterAtaDevice (This, Controller, ChildHandleBuffer[Index]);
if (EFI_ERROR (Status)) {
AllChildrenStopped = FALSE;
@@ -949,7 +951,6 @@ AtaBusDriverBindingStop (
return EFI_SUCCESS;
}
-
/**
Reset the Block Device.
@@ -964,13 +965,13 @@ AtaBusDriverBindingStop (
EFI_STATUS
EFIAPI
AtaBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- ATA_DEVICE *AtaDevice;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ ATA_DEVICE *AtaDevice;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
@@ -986,7 +987,6 @@ AtaBlockIoReset (
return Status;
}
-
/**
Read/Write BufferSize bytes from Lba from/into Buffer.
@@ -1015,30 +1015,30 @@ AtaBlockIoReset (
**/
EFI_STATUS
BlockIoReadWrite (
- IN VOID *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer,
- IN BOOLEAN IsBlockIo2,
- IN BOOLEAN IsWrite
+ IN VOID *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer,
+ IN BOOLEAN IsBlockIo2,
+ IN BOOLEAN IsWrite
)
{
- ATA_DEVICE *AtaDevice;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UINTN IoAlign;
+ ATA_DEVICE *AtaDevice;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UINTN IoAlign;
if (IsBlockIo2) {
- Media = ((EFI_BLOCK_IO2_PROTOCOL *) This)->Media;
- AtaDevice = ATA_DEVICE_FROM_BLOCK_IO2 (This);
+ Media = ((EFI_BLOCK_IO2_PROTOCOL *)This)->Media;
+ AtaDevice = ATA_DEVICE_FROM_BLOCK_IO2 (This);
} else {
- Media = ((EFI_BLOCK_IO_PROTOCOL *) This)->Media;
- AtaDevice = ATA_DEVICE_FROM_BLOCK_IO (This);
+ Media = ((EFI_BLOCK_IO_PROTOCOL *)This)->Media;
+ AtaDevice = ATA_DEVICE_FROM_BLOCK_IO (This);
}
if (MediaId != Media->MediaId) {
@@ -1057,6 +1057,7 @@ BlockIoReadWrite (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -1065,13 +1066,13 @@ BlockIoReadWrite (
return EFI_BAD_BUFFER_SIZE;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if ((Lba + NumberOfBlocks - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1087,7 +1088,6 @@ BlockIoReadWrite (
return Status;
}
-
/**
Read BufferSize bytes from Lba into Buffer.
@@ -1110,17 +1110,16 @@ BlockIoReadWrite (
EFI_STATUS
EFIAPI
AtaBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- return BlockIoReadWrite ((VOID *) This, MediaId, Lba, NULL, BufferSize, Buffer, FALSE, FALSE);
+ return BlockIoReadWrite ((VOID *)This, MediaId, Lba, NULL, BufferSize, Buffer, FALSE, FALSE);
}
-
/**
Write BufferSize bytes from Lba into Buffer.
@@ -1144,17 +1143,16 @@ AtaBlockIoReadBlocks (
EFI_STATUS
EFIAPI
AtaBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- return BlockIoReadWrite ((VOID *) This, MediaId, Lba, NULL, BufferSize, Buffer, FALSE, TRUE);
+ return BlockIoReadWrite ((VOID *)This, MediaId, Lba, NULL, BufferSize, Buffer, FALSE, TRUE);
}
-
/**
Flush the Block Device.
@@ -1168,7 +1166,7 @@ AtaBlockIoWriteBlocks (
EFI_STATUS
EFIAPI
AtaBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
)
{
//
@@ -1195,9 +1193,9 @@ AtaBlockIoResetEx (
IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- ATA_DEVICE *AtaDevice;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ ATA_DEVICE *AtaDevice;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
@@ -1252,10 +1250,9 @@ AtaBlockIoReadBlocksEx (
OUT VOID *Buffer
)
{
- return BlockIoReadWrite ((VOID *) This, MediaId, Lba, Token, BufferSize, Buffer, TRUE, FALSE);
+ return BlockIoReadWrite ((VOID *)This, MediaId, Lba, Token, BufferSize, Buffer, TRUE, FALSE);
}
-
/**
Write BufferSize bytes from Lba into Buffer.
@@ -1289,10 +1286,9 @@ AtaBlockIoWriteBlocksEx (
IN VOID *Buffer
)
{
- return BlockIoReadWrite ((VOID *) This, MediaId, Lba, Token, BufferSize, Buffer, TRUE, TRUE);
+ return BlockIoReadWrite ((VOID *)This, MediaId, Lba, Token, BufferSize, Buffer, TRUE, TRUE);
}
-
/**
Flush the Block Device.
@@ -1314,12 +1310,14 @@ AtaBlockIoFlushBlocksEx (
//
// Signal event and return directly.
//
- if (Token != NULL && Token->Event != NULL) {
+ if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
+
/**
Provides inquiry information for the controller type.
@@ -1339,15 +1337,14 @@ AtaBlockIoFlushBlocksEx (
EFI_STATUS
EFIAPI
AtaDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
)
{
return EFI_NOT_FOUND;
}
-
/**
Provides identify information for the controller type.
@@ -1369,13 +1366,13 @@ AtaDiskInfoInquiry (
EFI_STATUS
EFIAPI
AtaDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
)
{
- EFI_STATUS Status;
- ATA_DEVICE *AtaDevice;
+ EFI_STATUS Status;
+ ATA_DEVICE *AtaDevice;
AtaDevice = ATA_DEVICE_FROM_DISK_INFO (This);
@@ -1384,12 +1381,12 @@ AtaDiskInfoIdentify (
Status = EFI_SUCCESS;
CopyMem (IdentifyData, AtaDevice->IdentifyData, sizeof (ATA_IDENTIFY_DATA));
}
+
*IdentifyDataSize = sizeof (ATA_IDENTIFY_DATA);
return Status;
}
-
/**
Provides sense data information for the controller type.
@@ -1410,16 +1407,15 @@ AtaDiskInfoIdentify (
EFI_STATUS
EFIAPI
AtaDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
)
{
return EFI_NOT_FOUND;
}
-
/**
This function is used by the IDE bus driver to get controller information.
@@ -1434,16 +1430,16 @@ AtaDiskInfoSenseData (
EFI_STATUS
EFIAPI
AtaDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
)
{
- ATA_DEVICE *AtaDevice;
+ ATA_DEVICE *AtaDevice;
- AtaDevice = ATA_DEVICE_FROM_DISK_INFO (This);
- *IdeChannel = AtaDevice->Port;
- *IdeDevice = AtaDevice->PortMultiplierPort;
+ AtaDevice = ATA_DEVICE_FROM_DISK_INFO (This);
+ *IdeChannel = AtaDevice->Port;
+ *IdeDevice = AtaDevice->PortMultiplierPort;
return EFI_SUCCESS;
}
@@ -1523,22 +1519,22 @@ AtaDiskInfoWhichIde (
EFI_STATUS
EFIAPI
AtaStorageSecurityReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
)
{
- EFI_STATUS Status;
- ATA_DEVICE *Private;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ ATA_DEVICE *Private;
+ EFI_TPL OldTpl;
DEBUG ((DEBUG_INFO, "EFI Storage Security Protocol - Read\n"));
- if ((PayloadBuffer == NULL || PayloadTransferSize == NULL) && PayloadBufferSize != 0) {
+ if (((PayloadBuffer == NULL) || (PayloadTransferSize == NULL)) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1634,18 +1630,18 @@ AtaStorageSecurityReceiveData (
EFI_STATUS
EFIAPI
AtaStorageSecuritySendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
)
{
- EFI_STATUS Status;
- ATA_DEVICE *Private;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ ATA_DEVICE *Private;
+ EFI_TPL OldTpl;
DEBUG ((DEBUG_INFO, "EFI Storage Security Protocol - Send\n"));
if ((PayloadBuffer == NULL) && (PayloadBufferSize != 0)) {
@@ -1687,12 +1683,12 @@ AtaStorageSecuritySendData (
**/
EFI_STATUS
EFIAPI
-InitializeAtaBus(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeAtaBus (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h
index a5a8652099..4428c484fd 100644
--- a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h
+++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h
@@ -38,27 +38,27 @@
//
// Time out value for ATA pass through protocol
//
-#define ATA_TIMEOUT EFI_TIMER_PERIOD_SECONDS (3)
+#define ATA_TIMEOUT EFI_TIMER_PERIOD_SECONDS (3)
//
// Maximum number of times to retry ATA command
//
-#define MAX_RETRY_TIMES 3
+#define MAX_RETRY_TIMES 3
//
// The maximum total sectors count in 28 bit addressing mode
//
-#define MAX_28BIT_ADDRESSING_CAPACITY 0xfffffff
+#define MAX_28BIT_ADDRESSING_CAPACITY 0xfffffff
//
// The maximum ATA transaction sector count in 28 bit addressing mode.
//
-#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
+#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
//
// The maximum ATA transaction sector count in 48 bit addressing mode.
//
-//#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x10000
+// #define MAX_48BIT_TRANSFER_BLOCK_NUM 0x10000
//
// BugBug: if the TransferLength is equal with 0x10000 (the 48bit max length),
@@ -66,109 +66,109 @@
// seems not ready. Change the Maximum Sector Numbers to 0xFFFF to work round
// this issue.
//
-#define MAX_48BIT_TRANSFER_BLOCK_NUM 0xFFFF
+#define MAX_48BIT_TRANSFER_BLOCK_NUM 0xFFFF
//
// The maximum model name in ATA identify data
//
-#define MAX_MODEL_NAME_LEN 40
+#define MAX_MODEL_NAME_LEN 40
-#define ATA_TASK_SIGNATURE SIGNATURE_32 ('A', 'T', 'S', 'K')
-#define ATA_DEVICE_SIGNATURE SIGNATURE_32 ('A', 'B', 'I', 'D')
-#define ATA_SUB_TASK_SIGNATURE SIGNATURE_32 ('A', 'S', 'T', 'S')
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define ATA_TASK_SIGNATURE SIGNATURE_32 ('A', 'T', 'S', 'K')
+#define ATA_DEVICE_SIGNATURE SIGNATURE_32 ('A', 'B', 'I', 'D')
+#define ATA_SUB_TASK_SIGNATURE SIGNATURE_32 ('A', 'S', 'T', 'S')
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
//
// ATA bus data structure for ATA controller
//
typedef struct {
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_HANDLE Controller;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_HANDLE DriverBindingHandle;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_HANDLE Controller;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_HANDLE DriverBindingHandle;
} ATA_BUS_DRIVER_DATA;
//
// ATA device data structure for each child device
//
typedef struct {
- UINT32 Signature;
+ UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_BLOCK_IO_PROTOCOL BlockIo;
- EFI_BLOCK_IO2_PROTOCOL BlockIo2;
- EFI_BLOCK_IO_MEDIA BlockMedia;
- EFI_DISK_INFO_PROTOCOL DiskInfo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
+ EFI_HANDLE Handle;
+ EFI_BLOCK_IO_PROTOCOL BlockIo;
+ EFI_BLOCK_IO2_PROTOCOL BlockIo2;
+ EFI_BLOCK_IO_MEDIA BlockMedia;
+ EFI_DISK_INFO_PROTOCOL DiskInfo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
- ATA_BUS_DRIVER_DATA *AtaBusDriverData;
- UINT16 Port;
- UINT16 PortMultiplierPort;
+ ATA_BUS_DRIVER_DATA *AtaBusDriverData;
+ UINT16 Port;
+ UINT16 PortMultiplierPort;
//
// Buffer for the execution of ATA pass through protocol
//
- EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
- EFI_ATA_COMMAND_BLOCK Acb;
- EFI_ATA_STATUS_BLOCK *Asb;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_ATA_COMMAND_BLOCK Acb;
+ EFI_ATA_STATUS_BLOCK *Asb;
- BOOLEAN UdmaValid;
- BOOLEAN Lba48Bit;
+ BOOLEAN UdmaValid;
+ BOOLEAN Lba48Bit;
//
// Cached data for ATA identify data
//
- ATA_IDENTIFY_DATA *IdentifyData;
+ ATA_IDENTIFY_DATA *IdentifyData;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
- CHAR16 ModelName[MAX_MODEL_NAME_LEN + 1];
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ CHAR16 ModelName[MAX_MODEL_NAME_LEN + 1];
- LIST_ENTRY AtaTaskList;
- LIST_ENTRY AtaSubTaskList;
- BOOLEAN Abort;
+ LIST_ENTRY AtaTaskList;
+ LIST_ENTRY AtaSubTaskList;
+ BOOLEAN Abort;
} ATA_DEVICE;
//
// Sub-Task for the non blocking I/O
//
typedef struct {
- UINT32 Signature;
- ATA_DEVICE *AtaDevice;
- EFI_BLOCK_IO2_TOKEN *Token;
- UINTN *UnsignalledEventCount;
- EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
- BOOLEAN *IsError;// Indicate whether meeting error during source allocation for new task.
- LIST_ENTRY TaskEntry;
+ UINT32 Signature;
+ ATA_DEVICE *AtaDevice;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ UINTN *UnsignalledEventCount;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET Packet;
+ BOOLEAN *IsError;// Indicate whether meeting error during source allocation for new task.
+ LIST_ENTRY TaskEntry;
} ATA_BUS_ASYN_SUB_TASK;
//
// Task for the non blocking I/O
//
typedef struct {
- UINT32 Signature;
- EFI_BLOCK_IO2_TOKEN *Token;
- ATA_DEVICE *AtaDevice;
- UINT8 *Buffer;
- EFI_LBA StartLba;
- UINTN NumberOfBlocks;
- BOOLEAN IsWrite;
- LIST_ENTRY TaskEntry;
+ UINT32 Signature;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ ATA_DEVICE *AtaDevice;
+ UINT8 *Buffer;
+ EFI_LBA StartLba;
+ UINTN NumberOfBlocks;
+ BOOLEAN IsWrite;
+ LIST_ENTRY TaskEntry;
} ATA_BUS_ASYN_TASK;
-#define ATA_DEVICE_FROM_BLOCK_IO(a) CR (a, ATA_DEVICE, BlockIo, ATA_DEVICE_SIGNATURE)
-#define ATA_DEVICE_FROM_BLOCK_IO2(a) CR (a, ATA_DEVICE, BlockIo2, ATA_DEVICE_SIGNATURE)
-#define ATA_DEVICE_FROM_DISK_INFO(a) CR (a, ATA_DEVICE, DiskInfo, ATA_DEVICE_SIGNATURE)
-#define ATA_DEVICE_FROM_STORAGE_SECURITY(a) CR (a, ATA_DEVICE, StorageSecurity, ATA_DEVICE_SIGNATURE)
-#define ATA_ASYN_SUB_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_SUB_TASK, TaskEntry, ATA_SUB_TASK_SIGNATURE)
-#define ATA_ASYN_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_TASK, TaskEntry, ATA_TASK_SIGNATURE)
+#define ATA_DEVICE_FROM_BLOCK_IO(a) CR (a, ATA_DEVICE, BlockIo, ATA_DEVICE_SIGNATURE)
+#define ATA_DEVICE_FROM_BLOCK_IO2(a) CR (a, ATA_DEVICE, BlockIo2, ATA_DEVICE_SIGNATURE)
+#define ATA_DEVICE_FROM_DISK_INFO(a) CR (a, ATA_DEVICE, DiskInfo, ATA_DEVICE_SIGNATURE)
+#define ATA_DEVICE_FROM_STORAGE_SECURITY(a) CR (a, ATA_DEVICE, StorageSecurity, ATA_DEVICE_SIGNATURE)
+#define ATA_ASYN_SUB_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_SUB_TASK, TaskEntry, ATA_SUB_TASK_SIGNATURE)
+#define ATA_ASYN_TASK_FROM_ENTRY(a) CR (a, ATA_BUS_ASYN_TASK, TaskEntry, ATA_TASK_SIGNATURE)
//
// Global Variables
//
-extern EFI_DRIVER_BINDING_PROTOCOL gAtaBusDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gAtaBusComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gAtaBusComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gAtaBusDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gAtaBusComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gAtaBusComponentName2;
/**
Allocates an aligned buffer for ATA device.
@@ -185,8 +185,8 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gAtaBusComponentName2;
**/
VOID *
AllocateAlignedBuffer (
- IN ATA_DEVICE *AtaDevice,
- IN UINTN BufferSize
+ IN ATA_DEVICE *AtaDevice,
+ IN UINTN BufferSize
);
/**
@@ -201,8 +201,8 @@ AllocateAlignedBuffer (
**/
VOID
FreeAlignedBuffer (
- IN VOID *Buffer,
- IN UINTN BufferSize
+ IN VOID *Buffer,
+ IN UINTN BufferSize
);
/**
@@ -230,10 +230,9 @@ FreeAtaSubTask (
**/
EFI_STATUS
ResetAtaDevice (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
);
-
/**
Discovers whether it is a valid ATA device.
@@ -250,7 +249,7 @@ ResetAtaDevice (
**/
EFI_STATUS
DiscoverAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice
+ IN OUT ATA_DEVICE *AtaDevice
);
/**
@@ -272,13 +271,13 @@ DiscoverAtaDevice (
**/
EFI_STATUS
-AccessAtaDevice(
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT UINT8 *Buffer,
- IN EFI_LBA StartLba,
- IN UINTN NumberOfBlocks,
- IN BOOLEAN IsWrite,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+AccessAtaDevice (
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT UINT8 *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINTN NumberOfBlocks,
+ IN BOOLEAN IsWrite,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -313,19 +312,20 @@ AccessAtaDevice(
EFI_STATUS
EFIAPI
TrustTransferAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
);
//
// Protocol interface prototypes
//
+
/**
Tests to see if this driver supports a given controller. If a child device is provided,
it further tests to see if this driver supports creating a handle for the specified child device.
@@ -448,13 +448,12 @@ AtaBusDriverBindingStart (
EFI_STATUS
EFIAPI
AtaBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
-
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -502,7 +501,6 @@ AtaBusComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -574,14 +572,13 @@ AtaBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
-
/**
Reset the Block Device.
@@ -596,11 +593,10 @@ AtaBusComponentNameGetControllerName (
EFI_STATUS
EFIAPI
AtaBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
-
/**
Read BufferSize bytes from Lba into Buffer.
@@ -623,14 +619,13 @@ AtaBlockIoReset (
EFI_STATUS
EFIAPI
AtaBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
-
/**
Write BufferSize bytes from Lba into Buffer.
@@ -654,14 +649,13 @@ AtaBlockIoReadBlocks (
EFI_STATUS
EFIAPI
AtaBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
-
/**
Flush the Block Device.
@@ -675,7 +669,7 @@ AtaBlockIoWriteBlocks (
EFI_STATUS
EFIAPI
AtaBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
);
/**
@@ -797,7 +791,7 @@ AtaBlockIoFlushBlocksEx (
VOID
EFIAPI
AtaTerminateNonBlockingTask (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
);
/**
@@ -819,12 +813,11 @@ AtaTerminateNonBlockingTask (
EFI_STATUS
EFIAPI
AtaDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
);
-
/**
Provides identify information for the controller type.
@@ -846,12 +839,11 @@ AtaDiskInfoInquiry (
EFI_STATUS
EFIAPI
AtaDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
);
-
/**
Provides sense data information for the controller type.
@@ -872,13 +864,12 @@ AtaDiskInfoIdentify (
EFI_STATUS
EFIAPI
AtaDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
);
-
/**
This function is used by the IDE bus driver to get controller information.
@@ -893,9 +884,9 @@ AtaDiskInfoSenseData (
EFI_STATUS
EFIAPI
AtaDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
);
/**
@@ -973,14 +964,14 @@ AtaDiskInfoWhichIde (
EFI_STATUS
EFIAPI
AtaStorageSecurityReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
);
/**
@@ -1047,13 +1038,13 @@ AtaStorageSecurityReceiveData (
EFI_STATUS
EFIAPI
AtaStorageSecuritySendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
);
/**
@@ -1069,7 +1060,7 @@ AtaStorageSecuritySendData (
**/
VOID
InitiateTPerReset (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c
index c947a778a0..4334169d25 100644
--- a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c
+++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c
@@ -19,16 +19,16 @@
#include "AtaBus.h"
-#define ATA_CMD_TRUST_NON_DATA 0x5B
-#define ATA_CMD_TRUST_RECEIVE 0x5C
-#define ATA_CMD_TRUST_RECEIVE_DMA 0x5D
-#define ATA_CMD_TRUST_SEND 0x5E
-#define ATA_CMD_TRUST_SEND_DMA 0x5F
+#define ATA_CMD_TRUST_NON_DATA 0x5B
+#define ATA_CMD_TRUST_RECEIVE 0x5C
+#define ATA_CMD_TRUST_RECEIVE_DMA 0x5D
+#define ATA_CMD_TRUST_SEND 0x5E
+#define ATA_CMD_TRUST_SEND_DMA 0x5F
//
// Look up table (UdmaValid, IsWrite) for EFI_ATA_PASS_THRU_CMD_PROTOCOL
//
-EFI_ATA_PASS_THRU_CMD_PROTOCOL mAtaPassThruCmdProtocols[][2] = {
+EFI_ATA_PASS_THRU_CMD_PROTOCOL mAtaPassThruCmdProtocols[][2] = {
{
EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN,
EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_OUT
@@ -42,7 +42,7 @@ EFI_ATA_PASS_THRU_CMD_PROTOCOL mAtaPassThruCmdProtocols[][2] = {
//
// Look up table (UdmaValid, Lba48Bit, IsIsWrite) for ATA_CMD
//
-UINT8 mAtaCommands[][2][2] = {
+UINT8 mAtaCommands[][2][2] = {
{
{
ATA_CMD_READ_SECTORS, // 28-bit LBA; PIO read
@@ -68,7 +68,7 @@ UINT8 mAtaCommands[][2][2] = {
//
// Look up table (UdmaValid, IsTrustSend) for ATA_CMD
//
-UINT8 mAtaTrustCommands[2][2] = {
+UINT8 mAtaTrustCommands[2][2] = {
{
ATA_CMD_TRUST_RECEIVE, // PIO read
ATA_CMD_TRUST_SEND // PIO write
@@ -79,16 +79,14 @@ UINT8 mAtaTrustCommands[2][2] = {
}
};
-
//
// Look up table (Lba48Bit) for maximum transfer block number
//
-UINTN mMaxTransferBlockNumber[] = {
+UINTN mMaxTransferBlockNumber[] = {
MAX_28BIT_TRANSFER_BLOCK_NUM,
MAX_48BIT_TRANSFER_BLOCK_NUM
};
-
/**
Wrapper for EFI_ATA_PASS_THRU_PROTOCOL.PassThru().
@@ -112,21 +110,21 @@ UINTN mMaxTransferBlockNumber[] = {
**/
EFI_STATUS
AtaDevicePassThru (
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *TaskPacket OPTIONAL,
- IN OUT EFI_EVENT Event OPTIONAL
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *TaskPacket OPTIONAL,
+ IN OUT EFI_EVENT Event OPTIONAL
)
{
- EFI_STATUS Status;
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
- EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
+ EFI_STATUS Status;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
//
// Assemble packet. If it is non blocking mode, the Ata driver should keep each
// subtask and clean them when the event is signaled.
//
if (TaskPacket != NULL) {
- Packet = TaskPacket;
+ Packet = TaskPacket;
Packet->Asb = AllocateAlignedBuffer (AtaDevice, sizeof (EFI_ATA_STATUS_BLOCK));
if (Packet->Asb == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -135,7 +133,7 @@ AtaDevicePassThru (
CopyMem (Packet->Asb, AtaDevice->Asb, sizeof (EFI_ATA_STATUS_BLOCK));
Packet->Acb = AllocateCopyPool (sizeof (EFI_ATA_COMMAND_BLOCK), &AtaDevice->Acb);
} else {
- Packet = &AtaDevice->Packet;
+ Packet = &AtaDevice->Packet;
Packet->Asb = AtaDevice->Asb;
Packet->Acb = &AtaDevice->Acb;
}
@@ -159,7 +157,6 @@ AtaDevicePassThru (
return Status;
}
-
/**
Wrapper for EFI_ATA_PASS_THRU_PROTOCOL.ResetDevice().
@@ -173,10 +170,10 @@ AtaDevicePassThru (
**/
EFI_STATUS
ResetAtaDevice (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
)
{
- EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
+ EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru;
AtaPassThru = AtaDevice->AtaBusDriverData->AtaPassThru;
@@ -196,7 +193,6 @@ ResetAtaDevice (
);
}
-
/**
Prints ATA model name to ATA device structure.
@@ -216,20 +212,20 @@ PrintAtaModelName (
CHAR8 *Source;
CHAR16 *Destination;
- Source = AtaDevice->IdentifyData->ModelName;
+ Source = AtaDevice->IdentifyData->ModelName;
Destination = AtaDevice->ModelName;
//
// Swap the byte order in the original module name.
//
for (Index = 0; Index < MAX_MODEL_NAME_LEN; Index += 2) {
- Destination[Index] = Source[Index + 1];
- Destination[Index + 1] = Source[Index];
+ Destination[Index] = Source[Index + 1];
+ Destination[Index + 1] = Source[Index];
}
+
AtaDevice->ModelName[MAX_MODEL_NAME_LEN] = L'\0';
}
-
/**
Gets ATA device Capacity according to ATA 6.
@@ -244,13 +240,13 @@ PrintAtaModelName (
**/
EFI_LBA
GetAtapi6Capacity (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
)
{
- EFI_LBA Capacity;
- EFI_LBA TmpLba;
- UINTN Index;
- ATA_IDENTIFY_DATA *IdentifyData;
+ EFI_LBA Capacity;
+ EFI_LBA TmpLba;
+ UINTN Index;
+ ATA_IDENTIFY_DATA *IdentifyData;
IdentifyData = AtaDevice->IdentifyData;
if ((IdentifyData->command_set_supported_83 & BIT10) == 0) {
@@ -268,14 +264,13 @@ GetAtapi6Capacity (
//
// Lower byte goes first: word[100] is the lowest word, word[103] is highest
//
- TmpLba = IdentifyData->maximum_lba_for_48bit_addressing[Index];
+ TmpLba = IdentifyData->maximum_lba_for_48bit_addressing[Index];
Capacity |= LShiftU64 (TmpLba, 16 * Index);
}
return Capacity;
}
-
/**
Identifies ATA device via the Identify data.
@@ -291,14 +286,14 @@ GetAtapi6Capacity (
**/
EFI_STATUS
IdentifyAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice
+ IN OUT ATA_DEVICE *AtaDevice
)
{
- ATA_IDENTIFY_DATA *IdentifyData;
- EFI_BLOCK_IO_MEDIA *BlockMedia;
- EFI_LBA Capacity;
- UINT16 PhyLogicSectorSupport;
- UINT16 UdmaMode;
+ ATA_IDENTIFY_DATA *IdentifyData;
+ EFI_BLOCK_IO_MEDIA *BlockMedia;
+ EFI_LBA Capacity;
+ UINT16 PhyLogicSectorSupport;
+ UINT16 UdmaMode;
IdentifyData = AtaDevice->IdentifyData;
@@ -334,16 +329,16 @@ IdentifyAtaDevice (
//
// This is a hard disk <= 120GB capacity, treat it as normal hard disk
//
- Capacity = ((UINT32)IdentifyData->user_addressable_sectors_hi << 16) | IdentifyData->user_addressable_sectors_lo;
+ Capacity = ((UINT32)IdentifyData->user_addressable_sectors_hi << 16) | IdentifyData->user_addressable_sectors_lo;
AtaDevice->Lba48Bit = FALSE;
}
//
// Block Media Information:
//
- BlockMedia = &AtaDevice->BlockMedia;
+ BlockMedia = &AtaDevice->BlockMedia;
BlockMedia->LastBlock = Capacity - 1;
- BlockMedia->IoAlign = AtaDevice->AtaBusDriverData->AtaPassThru->Mode->IoAlign;
+ BlockMedia->IoAlign = AtaDevice->AtaBusDriverData->AtaPassThru->Mode->IoAlign;
//
// Check whether Long Physical Sector Feature is supported
//
@@ -353,23 +348,26 @@ IdentifyAtaDevice (
// Check whether one physical block contains multiple physical blocks
//
if ((PhyLogicSectorSupport & BIT13) != 0) {
- BlockMedia->LogicalBlocksPerPhysicalBlock = (UINT32) (1 << (PhyLogicSectorSupport & 0x000f));
+ BlockMedia->LogicalBlocksPerPhysicalBlock = (UINT32)(1 << (PhyLogicSectorSupport & 0x000f));
//
// Check lowest alignment of logical blocks within physical block
//
if ((IdentifyData->alignment_logic_in_phy_blocks & (BIT14 | BIT15)) == BIT14) {
- BlockMedia->LowestAlignedLba = (EFI_LBA) ((BlockMedia->LogicalBlocksPerPhysicalBlock - ((UINT32)IdentifyData->alignment_logic_in_phy_blocks & 0x3fff)) %
- BlockMedia->LogicalBlocksPerPhysicalBlock);
+ BlockMedia->LowestAlignedLba = (EFI_LBA)((BlockMedia->LogicalBlocksPerPhysicalBlock - ((UINT32)IdentifyData->alignment_logic_in_phy_blocks & 0x3fff)) %
+ BlockMedia->LogicalBlocksPerPhysicalBlock);
}
}
+
//
// Check logical block size
//
if ((PhyLogicSectorSupport & BIT12) != 0) {
- BlockMedia->BlockSize = (UINT32) (((IdentifyData->logic_sector_size_hi << 16) | IdentifyData->logic_sector_size_lo) * sizeof (UINT16));
+ BlockMedia->BlockSize = (UINT32)(((IdentifyData->logic_sector_size_hi << 16) | IdentifyData->logic_sector_size_lo) * sizeof (UINT16));
}
+
AtaDevice->BlockIo.Revision = EFI_BLOCK_IO_PROTOCOL_REVISION2;
}
+
//
// Get ATA model name from identify data structure.
//
@@ -378,7 +376,6 @@ IdentifyAtaDevice (
return EFI_SUCCESS;
}
-
/**
Discovers whether it is a valid ATA device.
@@ -395,7 +392,7 @@ IdentifyAtaDevice (
**/
EFI_STATUS
DiscoverAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice
+ IN OUT ATA_DEVICE *AtaDevice
)
{
EFI_STATUS Status;
@@ -406,19 +403,19 @@ DiscoverAtaDevice (
//
// Prepare for ATA command block.
//
- Acb = ZeroMem (&AtaDevice->Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
- Acb->AtaCommand = ATA_CMD_IDENTIFY_DRIVE;
- Acb->AtaDeviceHead = (UINT8) (BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
+ Acb = ZeroMem (&AtaDevice->Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
+ Acb->AtaCommand = ATA_CMD_IDENTIFY_DRIVE;
+ Acb->AtaDeviceHead = (UINT8)(BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
//
// Prepare for ATA pass through packet.
//
- Packet = ZeroMem (&AtaDevice->Packet, sizeof (EFI_ATA_PASS_THRU_COMMAND_PACKET));
- Packet->InDataBuffer = AtaDevice->IdentifyData;
+ Packet = ZeroMem (&AtaDevice->Packet, sizeof (EFI_ATA_PASS_THRU_COMMAND_PACKET));
+ Packet->InDataBuffer = AtaDevice->IdentifyData;
Packet->InTransferLength = sizeof (ATA_IDENTIFY_DATA);
- Packet->Protocol = EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN;
- Packet->Length = EFI_ATA_PASS_THRU_LENGTH_BYTES | EFI_ATA_PASS_THRU_LENGTH_SECTOR_COUNT;
- Packet->Timeout = ATA_TIMEOUT;
+ Packet->Protocol = EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN;
+ Packet->Length = EFI_ATA_PASS_THRU_LENGTH_BYTES | EFI_ATA_PASS_THRU_LENGTH_SECTOR_COUNT;
+ Packet->Timeout = ATA_TIMEOUT;
Retry = MAX_RETRY_TIMES;
do {
@@ -463,13 +460,13 @@ DiscoverAtaDevice (
**/
EFI_STATUS
TransferAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *TaskPacket OPTIONAL,
- IN OUT VOID *Buffer,
- IN EFI_LBA StartLba,
- IN UINT32 TransferLength,
- IN BOOLEAN IsWrite,
- IN EFI_EVENT Event OPTIONAL
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *TaskPacket OPTIONAL,
+ IN OUT VOID *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINT32 TransferLength,
+ IN BOOLEAN IsWrite,
+ IN EFI_EVENT Event OPTIONAL
)
{
EFI_ATA_COMMAND_BLOCK *Acb;
@@ -478,26 +475,26 @@ TransferAtaDevice (
//
// Ensure AtaDevice->UdmaValid, AtaDevice->Lba48Bit and IsWrite are valid boolean values
//
- ASSERT ((UINTN) AtaDevice->UdmaValid < 2);
- ASSERT ((UINTN) AtaDevice->Lba48Bit < 2);
- ASSERT ((UINTN) IsWrite < 2);
+ ASSERT ((UINTN)AtaDevice->UdmaValid < 2);
+ ASSERT ((UINTN)AtaDevice->Lba48Bit < 2);
+ ASSERT ((UINTN)IsWrite < 2);
//
// Prepare for ATA command block.
//
- Acb = ZeroMem (&AtaDevice->Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
- Acb->AtaCommand = mAtaCommands[AtaDevice->UdmaValid][AtaDevice->Lba48Bit][IsWrite];
- Acb->AtaSectorNumber = (UINT8) StartLba;
- Acb->AtaCylinderLow = (UINT8) RShiftU64 (StartLba, 8);
- Acb->AtaCylinderHigh = (UINT8) RShiftU64 (StartLba, 16);
- Acb->AtaDeviceHead = (UINT8) (BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
- Acb->AtaSectorCount = (UINT8) TransferLength;
+ Acb = ZeroMem (&AtaDevice->Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
+ Acb->AtaCommand = mAtaCommands[AtaDevice->UdmaValid][AtaDevice->Lba48Bit][IsWrite];
+ Acb->AtaSectorNumber = (UINT8)StartLba;
+ Acb->AtaCylinderLow = (UINT8)RShiftU64 (StartLba, 8);
+ Acb->AtaCylinderHigh = (UINT8)RShiftU64 (StartLba, 16);
+ Acb->AtaDeviceHead = (UINT8)(BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
+ Acb->AtaSectorCount = (UINT8)TransferLength;
if (AtaDevice->Lba48Bit) {
- Acb->AtaSectorNumberExp = (UINT8) RShiftU64 (StartLba, 24);
- Acb->AtaCylinderLowExp = (UINT8) RShiftU64 (StartLba, 32);
- Acb->AtaCylinderHighExp = (UINT8) RShiftU64 (StartLba, 40);
- Acb->AtaSectorCountExp = (UINT8) (TransferLength >> 8);
+ Acb->AtaSectorNumberExp = (UINT8)RShiftU64 (StartLba, 24);
+ Acb->AtaCylinderLowExp = (UINT8)RShiftU64 (StartLba, 32);
+ Acb->AtaCylinderHighExp = (UINT8)RShiftU64 (StartLba, 40);
+ Acb->AtaSectorCountExp = (UINT8)(TransferLength >> 8);
} else {
- Acb->AtaDeviceHead = (UINT8) (Acb->AtaDeviceHead | RShiftU64 (StartLba, 24));
+ Acb->AtaDeviceHead = (UINT8)(Acb->AtaDeviceHead | RShiftU64 (StartLba, 24));
}
//
@@ -510,15 +507,15 @@ TransferAtaDevice (
}
if (IsWrite) {
- Packet->OutDataBuffer = Buffer;
+ Packet->OutDataBuffer = Buffer;
Packet->OutTransferLength = TransferLength;
} else {
- Packet->InDataBuffer = Buffer;
+ Packet->InDataBuffer = Buffer;
Packet->InTransferLength = TransferLength;
}
Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsWrite];
- Packet->Length = EFI_ATA_PASS_THRU_LENGTH_SECTOR_COUNT;
+ Packet->Length = EFI_ATA_PASS_THRU_LENGTH_SECTOR_COUNT;
//
// |------------------------|-----------------|------------------------|-----------------|
// | ATA PIO Transfer Mode | Transfer Rate | ATA DMA Transfer Mode | Transfer Rate |
@@ -544,12 +541,12 @@ TransferAtaDevice (
//
// Calculate the maximum timeout value for DMA read/write operation.
//
- Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 2100000) + 31);
+ Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 2100000) + 31);
} else {
//
// Calculate the maximum timeout value for PIO read/write operation
//
- Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 3300000) + 31);
+ Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 3300000) + 31);
}
return AtaDevicePassThru (AtaDevice, TaskPacket, Event);
@@ -570,6 +567,7 @@ FreeAtaSubTask (
if (Task->Packet.Asb != NULL) {
FreeAlignedBuffer (Task->Packet.Asb, sizeof (EFI_ATA_STATUS_BLOCK));
}
+
if (Task->Packet.Acb != NULL) {
FreePool (Task->Packet.Acb);
}
@@ -590,14 +588,14 @@ FreeAtaSubTask (
VOID
EFIAPI
AtaTerminateNonBlockingTask (
- IN ATA_DEVICE *AtaDevice
+ IN ATA_DEVICE *AtaDevice
)
{
- BOOLEAN SubTaskEmpty;
- EFI_TPL OldTpl;
- ATA_BUS_ASYN_TASK *AtaTask;
- LIST_ENTRY *Entry;
- LIST_ENTRY *List;
+ BOOLEAN SubTaskEmpty;
+ EFI_TPL OldTpl;
+ ATA_BUS_ASYN_TASK *AtaTask;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *List;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
//
@@ -607,13 +605,14 @@ AtaTerminateNonBlockingTask (
List = &AtaDevice->AtaTaskList;
for (Entry = GetFirstNode (List); !IsNull (List, Entry);) {
- AtaTask = ATA_ASYN_TASK_FROM_ENTRY (Entry);
+ AtaTask = ATA_ASYN_TASK_FROM_ENTRY (Entry);
AtaTask->Token->TransactionStatus = EFI_ABORTED;
gBS->SignalEvent (AtaTask->Token->Event);
Entry = RemoveEntryList (Entry);
FreePool (AtaTask);
}
+
gBS->RestoreTPL (OldTpl);
do {
@@ -628,7 +627,7 @@ AtaTerminateNonBlockingTask (
//
// Aborting operation has been done. From now on, don't need to abort normal operation.
//
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
AtaDevice->Abort = FALSE;
gBS->RestoreTPL (OldTpl);
}
@@ -644,17 +643,17 @@ AtaTerminateNonBlockingTask (
VOID
EFIAPI
AtaNonBlockingCallBack (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- ATA_BUS_ASYN_SUB_TASK *Task;
- ATA_BUS_ASYN_TASK *AtaTask;
- ATA_DEVICE *AtaDevice;
- LIST_ENTRY *Entry;
- EFI_STATUS Status;
+ ATA_BUS_ASYN_SUB_TASK *Task;
+ ATA_BUS_ASYN_TASK *AtaTask;
+ ATA_DEVICE *AtaDevice;
+ LIST_ENTRY *Entry;
+ EFI_STATUS Status;
- Task = (ATA_BUS_ASYN_SUB_TASK *) Context;
+ Task = (ATA_BUS_ASYN_SUB_TASK *)Context;
gBS->CloseEvent (Event);
AtaDevice = Task->AtaDevice;
@@ -682,7 +681,7 @@ AtaNonBlockingCallBack (
//
// Reduce the SubEventCount, till it comes to zero.
//
- (*Task->UnsignalledEventCount) --;
+ (*Task->UnsignalledEventCount)--;
DEBUG ((DEBUG_BLKIO, "UnsignalledEventCount = %d\n", *Task->UnsignalledEventCount));
//
@@ -702,7 +701,6 @@ AtaNonBlockingCallBack (
FreePool (Task->UnsignalledEventCount);
FreePool (Task->IsError);
-
//
// Finish all subtasks and move to the next task in AtaTaskList.
//
@@ -723,6 +721,7 @@ AtaNonBlockingCallBack (
AtaTask->Token->TransactionStatus = Status;
gBS->SignalEvent (AtaTask->Token->Event);
}
+
RemoveEntryList (Entry);
FreePool (AtaTask);
}
@@ -763,27 +762,27 @@ AtaNonBlockingCallBack (
**/
EFI_STATUS
-AccessAtaDevice(
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT UINT8 *Buffer,
- IN EFI_LBA StartLba,
- IN UINTN NumberOfBlocks,
- IN BOOLEAN IsWrite,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+AccessAtaDevice (
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT UINT8 *Buffer,
+ IN EFI_LBA StartLba,
+ IN UINTN NumberOfBlocks,
+ IN BOOLEAN IsWrite,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- UINTN MaxTransferBlockNumber;
- UINTN TransferBlockNumber;
- UINTN BlockSize;
- ATA_BUS_ASYN_SUB_TASK *SubTask;
- UINTN *EventCount;
- UINTN TempCount;
- ATA_BUS_ASYN_TASK *AtaTask;
- EFI_EVENT SubEvent;
- UINTN Index;
- BOOLEAN *IsError;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINTN MaxTransferBlockNumber;
+ UINTN TransferBlockNumber;
+ UINTN BlockSize;
+ ATA_BUS_ASYN_SUB_TASK *SubTask;
+ UINTN *EventCount;
+ UINTN TempCount;
+ ATA_BUS_ASYN_TASK *AtaTask;
+ EFI_EVENT SubEvent;
+ UINTN Index;
+ BOOLEAN *IsError;
+ EFI_TPL OldTpl;
TempCount = 0;
Status = EFI_SUCCESS;
@@ -797,7 +796,7 @@ AccessAtaDevice(
//
// Ensure AtaDevice->Lba48Bit is a valid boolean value
//
- ASSERT ((UINTN) AtaDevice->Lba48Bit < 2);
+ ASSERT ((UINTN)AtaDevice->Lba48Bit < 2);
MaxTransferBlockNumber = mMaxTransferBlockNumber[AtaDevice->Lba48Bit];
BlockSize = AtaDevice->BlockMedia.BlockSize;
@@ -813,6 +812,7 @@ AccessAtaDevice(
gBS->RestoreTPL (OldTpl);
return EFI_OUT_OF_RESOURCES;
}
+
AtaTask->AtaDevice = AtaDevice;
AtaTask->Buffer = Buffer;
AtaTask->IsWrite = IsWrite;
@@ -825,10 +825,11 @@ AccessAtaDevice(
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
}
+
gBS->RestoreTPL (OldTpl);
Token->TransactionStatus = EFI_SUCCESS;
- EventCount = AllocateZeroPool (sizeof (UINTN));
+ EventCount = AllocateZeroPool (sizeof (UINTN));
if (EventCount == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -838,8 +839,9 @@ AccessAtaDevice(
FreePool (EventCount);
return EFI_OUT_OF_RESOURCES;
}
+
DEBUG ((DEBUG_BLKIO, "Allocation IsError Addr=%x\n", IsError));
- *IsError = FALSE;
+ *IsError = FALSE;
TempCount = (NumberOfBlocks + MaxTransferBlockNumber - 1) / MaxTransferBlockNumber;
*EventCount = TempCount;
DEBUG ((DEBUG_BLKIO, "AccessAtaDevice, NumberOfBlocks=%x\n", NumberOfBlocks));
@@ -858,7 +860,7 @@ AccessAtaDevice(
if (NumberOfBlocks > MaxTransferBlockNumber) {
TransferBlockNumber = MaxTransferBlockNumber;
NumberOfBlocks -= MaxTransferBlockNumber;
- } else {
+ } else {
TransferBlockNumber = NumberOfBlocks;
NumberOfBlocks = 0;
}
@@ -876,7 +878,7 @@ AccessAtaDevice(
goto EXIT;
}
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
SubTask->UnsignalledEventCount = EventCount;
SubTask->Signature = ATA_SUB_TASK_SIGNATURE;
SubTask->AtaDevice = AtaDevice;
@@ -901,13 +903,13 @@ AccessAtaDevice(
goto EXIT;
}
- Status = TransferAtaDevice (AtaDevice, &SubTask->Packet, Buffer, StartLba, (UINT32) TransferBlockNumber, IsWrite, SubEvent);
+ Status = TransferAtaDevice (AtaDevice, &SubTask->Packet, Buffer, StartLba, (UINT32)TransferBlockNumber, IsWrite, SubEvent);
} else {
//
// Blocking Mode.
//
DEBUG ((DEBUG_BLKIO, "Blocking AccessAtaDevice, TransferBlockNumber=%x; StartLba = %x\n", TransferBlockNumber, StartLba));
- Status = TransferAtaDevice (AtaDevice, NULL, Buffer, StartLba, (UINT32) TransferBlockNumber, IsWrite, NULL);
+ Status = TransferAtaDevice (AtaDevice, NULL, Buffer, StartLba, (UINT32)TransferBlockNumber, IsWrite, NULL);
}
if (EFI_ERROR (Status)) {
@@ -925,10 +927,10 @@ EXIT:
// Release resource at non-blocking mode.
//
if (EFI_ERROR (Status)) {
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
Token->TransactionStatus = Status;
- *EventCount = (*EventCount) - (TempCount - Index);
- *IsError = TRUE;
+ *EventCount = (*EventCount) - (TempCount - Index);
+ *IsError = TRUE;
if (*EventCount == 0) {
FreePool (EventCount);
@@ -943,6 +945,7 @@ EXIT:
if (SubEvent != NULL) {
gBS->CloseEvent (SubEvent);
}
+
gBS->RestoreTPL (OldTpl);
}
}
@@ -982,14 +985,14 @@ EXIT:
EFI_STATUS
EFIAPI
TrustTransferAtaDevice (
- IN OUT ATA_DEVICE *AtaDevice,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN OUT ATA_DEVICE *AtaDevice,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
)
{
EFI_ATA_COMMAND_BLOCK *Acb;
@@ -1001,27 +1004,28 @@ TrustTransferAtaDevice (
//
// Ensure AtaDevice->UdmaValid and IsTrustSend are valid boolean values
//
- ASSERT ((UINTN) AtaDevice->UdmaValid < 2);
- ASSERT ((UINTN) IsTrustSend < 2);
+ ASSERT ((UINTN)AtaDevice->UdmaValid < 2);
+ ASSERT ((UINTN)IsTrustSend < 2);
//
// Prepare for ATA command block.
//
Acb = ZeroMem (&AtaDevice->Acb, sizeof (EFI_ATA_COMMAND_BLOCK));
if (TransferLength == 0) {
- Acb->AtaCommand = ATA_CMD_TRUST_NON_DATA;
+ Acb->AtaCommand = ATA_CMD_TRUST_NON_DATA;
} else {
- Acb->AtaCommand = mAtaTrustCommands[AtaDevice->UdmaValid][IsTrustSend];
+ Acb->AtaCommand = mAtaTrustCommands[AtaDevice->UdmaValid][IsTrustSend];
}
- Acb->AtaFeatures = SecurityProtocolId;
- Acb->AtaSectorCount = (UINT8) (TransferLength / 512);
- Acb->AtaSectorNumber = (UINT8) ((TransferLength / 512) >> 8);
+
+ Acb->AtaFeatures = SecurityProtocolId;
+ Acb->AtaSectorCount = (UINT8)(TransferLength / 512);
+ Acb->AtaSectorNumber = (UINT8)((TransferLength / 512) >> 8);
//
// NOTE: ATA Spec has no explicitly definition for Security Protocol Specific layout.
// Here use big endian for Cylinder register.
//
- Acb->AtaCylinderHigh = (UINT8) SecurityProtocolSpecificData;
- Acb->AtaCylinderLow = (UINT8) (SecurityProtocolSpecificData >> 8);
- Acb->AtaDeviceHead = (UINT8) (BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
+ Acb->AtaCylinderHigh = (UINT8)SecurityProtocolSpecificData;
+ Acb->AtaCylinderLow = (UINT8)(SecurityProtocolSpecificData >> 8);
+ Acb->AtaDeviceHead = (UINT8)(BIT7 | BIT6 | BIT5 | (AtaDevice->PortMultiplierPort == 0xFFFF ? 0 : (AtaDevice->PortMultiplierPort << 4)));
//
// Prepare for ATA pass through packet.
@@ -1030,7 +1034,7 @@ TrustTransferAtaDevice (
if (TransferLength == 0) {
Packet->InTransferLength = 0;
Packet->OutTransferLength = 0;
- Packet->Protocol = EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA;
+ Packet->Protocol = EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA;
} else if (IsTrustSend) {
//
// Check the alignment of the incoming buffer prior to invoking underlying ATA PassThru
@@ -1046,22 +1050,25 @@ TrustTransferAtaDevice (
FreePool (Buffer);
Buffer = NewBuffer;
}
- Packet->OutDataBuffer = Buffer;
- Packet->OutTransferLength = (UINT32) TransferLength;
- Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsTrustSend];
+
+ Packet->OutDataBuffer = Buffer;
+ Packet->OutTransferLength = (UINT32)TransferLength;
+ Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsTrustSend];
} else {
- Packet->InDataBuffer = Buffer;
- Packet->InTransferLength = (UINT32) TransferLength;
- Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsTrustSend];
+ Packet->InDataBuffer = Buffer;
+ Packet->InTransferLength = (UINT32)TransferLength;
+ Packet->Protocol = mAtaPassThruCmdProtocols[AtaDevice->UdmaValid][IsTrustSend];
}
- Packet->Length = EFI_ATA_PASS_THRU_LENGTH_BYTES;
- Packet->Timeout = Timeout;
+
+ Packet->Length = EFI_ATA_PASS_THRU_LENGTH_BYTES;
+ Packet->Timeout = Timeout;
Status = AtaDevicePassThru (AtaDevice, NULL, NULL);
if (TransferLengthOut != NULL) {
- if (! IsTrustSend) {
+ if (!IsTrustSend) {
*TransferLengthOut = Packet->InTransferLength;
}
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/ComponentName.c b/MdeModulePkg/Bus/Ata/AtaBusDxe/ComponentName.c
index bb219072fb..920e26cc75 100644
--- a/MdeModulePkg/Bus/Ata/AtaBusDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/ComponentName.c
@@ -11,20 +11,19 @@
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaBusDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaBusDriverNameTable[] = {
{ "eng;en", L"ATA Bus Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
// Controller name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaBusControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaBusControllerNameTable[] = {
{ "eng;en", L"ATA Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
-
//
// EFI Component Name Protocol
//
@@ -37,9 +36,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gAtaBusComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaBusComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) AtaBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) AtaBusComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaBusComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)AtaBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)AtaBusComponentNameGetControllerName,
"en"
};
@@ -99,7 +98,6 @@ AtaBusComponentNameGetDriverName (
);
}
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -171,11 +169,11 @@ AtaBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -205,13 +203,14 @@ AtaBusComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the child context
//
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
gAtaBusDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -219,9 +218,11 @@ AtaBusComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
- AtaDevice = ATA_DEVICE_FROM_BLOCK_IO (BlockIo);
- ControllerNameTable =AtaDevice->ControllerNameTable;
+
+ AtaDevice = ATA_DEVICE_FROM_BLOCK_IO (BlockIo);
+ ControllerNameTable = AtaDevice->ControllerNameTable;
}
+
return LookupUnicodeString2 (
Language,
This->SupportedLanguages,
diff --git a/MdeModulePkg/Bus/I2c/I2cDxe/I2cBus.c b/MdeModulePkg/Bus/I2c/I2cDxe/I2cBus.c
index fa58632703..eafd3bc851 100644
--- a/MdeModulePkg/Bus/I2c/I2cDxe/I2cBus.c
+++ b/MdeModulePkg/Bus/I2c/I2cDxe/I2cBus.c
@@ -12,7 +12,7 @@
//
// EFI_DRIVER_BINDING_PROTOCOL instance
//
-EFI_DRIVER_BINDING_PROTOCOL gI2cBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gI2cBusDriverBinding = {
I2cBusDriverSupported,
I2cBusDriverStart,
I2cBusDriverStop,
@@ -24,7 +24,7 @@ EFI_DRIVER_BINDING_PROTOCOL gI2cBusDriverBinding = {
//
// Template for I2C Bus Child Device.
//
-I2C_DEVICE_CONTEXT gI2cDeviceContextTemplate = {
+I2C_DEVICE_CONTEXT gI2cDeviceContextTemplate = {
I2C_DEVICE_SIGNATURE,
NULL,
{ // I2cIo Protocol
@@ -42,13 +42,13 @@ I2C_DEVICE_CONTEXT gI2cDeviceContextTemplate = {
//
// Template for controller device path node.
//
-CONTROLLER_DEVICE_PATH gControllerDevicePathTemplate = {
+CONTROLLER_DEVICE_PATH gControllerDevicePathTemplate = {
{
HARDWARE_DEVICE_PATH,
HW_CONTROLLER_DP,
{
- (UINT8) (sizeof (CONTROLLER_DEVICE_PATH)),
- (UINT8) ((sizeof (CONTROLLER_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (CONTROLLER_DEVICE_PATH)),
+ (UINT8)((sizeof (CONTROLLER_DEVICE_PATH)) >> 8)
}
},
0
@@ -57,39 +57,40 @@ CONTROLLER_DEVICE_PATH gControllerDevicePathTemplate = {
//
// Template for vendor device path node.
//
-VENDOR_DEVICE_PATH gVendorDevicePathTemplate = {
+VENDOR_DEVICE_PATH gVendorDevicePathTemplate = {
{
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
{
- (UINT8) (sizeof (VENDOR_DEVICE_PATH)),
- (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+ (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
}
},
- { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }}
+ { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
+ }
};
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mI2cBusDriverNameTable[] = {
- { "eng;en", (CHAR16 *) L"I2C Bus Driver" },
- { NULL , NULL }
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mI2cBusDriverNameTable[] = {
+ { "eng;en", (CHAR16 *)L"I2C Bus Driver" },
+ { NULL, NULL }
};
//
// EFI Component Name Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gI2cBusComponentName = {
- (EFI_COMPONENT_NAME_GET_DRIVER_NAME) I2cBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME_GET_CONTROLLER_NAME) I2cBusComponentNameGetControllerName,
+ (EFI_COMPONENT_NAME_GET_DRIVER_NAME)I2cBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME_GET_CONTROLLER_NAME)I2cBusComponentNameGetControllerName,
"eng"
};
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gI2cBusComponentName2 = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gI2cBusComponentName2 = {
I2cBusComponentNameGetDriverName,
I2cBusComponentNameGetControllerName,
"en"
@@ -138,8 +139,8 @@ EFI_STATUS
EFIAPI
I2cBusComponentNameGetDriverName (
IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -222,11 +223,11 @@ I2cBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
I2cBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
@@ -254,16 +255,16 @@ CheckRemainingDevicePath (
IN UINT32 RemainingControllerNumber
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *SystemDevicePath;
- EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
- UINTN EntryCount;
- UINTN Index;
- BOOLEAN SystemHasControllerNode;
- UINT32 SystemControllerNumber;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *SystemDevicePath;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
+ UINTN EntryCount;
+ UINTN Index;
+ BOOLEAN SystemHasControllerNode;
+ UINT32 SystemControllerNumber;
SystemHasControllerNode = FALSE;
- SystemControllerNumber = 0;
+ SystemControllerNumber = 0;
Status = gBS->OpenProtocolInformation (
Controller,
@@ -280,7 +281,7 @@ CheckRemainingDevicePath (
Status = gBS->OpenProtocol (
OpenInfoBuffer[Index].ControllerHandle,
&gEfiDevicePathProtocolGuid,
- (VOID **) &SystemDevicePath,
+ (VOID **)&SystemDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -291,7 +292,8 @@ CheckRemainingDevicePath (
//
while (!IsDevicePathEnd (SystemDevicePath)) {
if ((DevicePathType (SystemDevicePath) == HARDWARE_DEVICE_PATH) &&
- (DevicePathSubType (SystemDevicePath) == HW_VENDOR_DP)) {
+ (DevicePathSubType (SystemDevicePath) == HW_VENDOR_DP))
+ {
//
// Check if vendor device path is same between system device path and remaining device path
//
@@ -301,31 +303,37 @@ CheckRemainingDevicePath (
//
SystemDevicePath = NextDevicePathNode (SystemDevicePath);
if ((DevicePathType (SystemDevicePath) == HARDWARE_DEVICE_PATH) &&
- (DevicePathSubType (SystemDevicePath) == HW_CONTROLLER_DP)) {
+ (DevicePathSubType (SystemDevicePath) == HW_CONTROLLER_DP))
+ {
SystemHasControllerNode = TRUE;
- SystemControllerNumber = ((CONTROLLER_DEVICE_PATH *) SystemDevicePath)->ControllerNumber;
+ SystemControllerNumber = ((CONTROLLER_DEVICE_PATH *)SystemDevicePath)->ControllerNumber;
} else {
SystemHasControllerNode = FALSE;
- SystemControllerNumber = 0;
+ SystemControllerNumber = 0;
}
+
if (((SystemHasControllerNode) && (!RemainingHasControllerNode) && (SystemControllerNumber == 0)) ||
((!SystemHasControllerNode) && (RemainingHasControllerNode) && (RemainingControllerNumber == 0)) ||
((SystemHasControllerNode) && (RemainingHasControllerNode) && (SystemControllerNumber == RemainingControllerNumber)) ||
- ((!SystemHasControllerNode) && (!RemainingHasControllerNode))) {
- DEBUG ((DEBUG_ERROR, "This I2C device has been already started.\n"));
- Status = EFI_UNSUPPORTED;
- break;
+ ((!SystemHasControllerNode) && (!RemainingHasControllerNode)))
+ {
+ DEBUG ((DEBUG_ERROR, "This I2C device has been already started.\n"));
+ Status = EFI_UNSUPPORTED;
+ break;
}
}
}
+
SystemDevicePath = NextDevicePathNode (SystemDevicePath);
}
+
if (EFI_ERROR (Status)) {
break;
}
}
}
}
+
FreePool (OpenInfoBuffer);
return Status;
}
@@ -380,16 +388,16 @@ I2cBusDriverSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
- EFI_I2C_HOST_PROTOCOL *I2cHost;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
- BOOLEAN RemainingHasControllerNode;
- UINT32 RemainingControllerNumber;
+ EFI_STATUS Status;
+ EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
+ EFI_I2C_HOST_PROTOCOL *I2cHost;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+ BOOLEAN RemainingHasControllerNode;
+ UINT32 RemainingControllerNumber;
RemainingHasControllerNode = FALSE;
- RemainingControllerNumber = 0;
+ RemainingControllerNumber = 0;
//
// Determine if the I2c Enumerate Protocol is available
@@ -397,7 +405,7 @@ I2cBusDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cEnumerateProtocolGuid,
- (VOID **) &I2cEnumerate,
+ (VOID **)&I2cEnumerate,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -408,17 +416,17 @@ I2cBusDriverSupported (
if (!EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiI2cEnumerateProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cEnumerateProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -430,11 +438,11 @@ I2cBusDriverSupported (
if (!EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if ((RemainingDevicePath != NULL) && !IsDevicePathEnd (RemainingDevicePath)) {
@@ -442,20 +450,23 @@ I2cBusDriverSupported (
// Check if the first node of RemainingDevicePath is a hardware vendor device path
//
if ((DevicePathType (RemainingDevicePath) != HARDWARE_DEVICE_PATH) ||
- (DevicePathSubType (RemainingDevicePath) != HW_VENDOR_DP)) {
+ (DevicePathSubType (RemainingDevicePath) != HW_VENDOR_DP))
+ {
return EFI_UNSUPPORTED;
}
+
//
// Check if the second node of RemainingDevicePath is a controller node
//
DevPathNode = NextDevicePathNode (RemainingDevicePath);
if (!IsDevicePathEnd (DevPathNode)) {
if ((DevicePathType (DevPathNode) != HARDWARE_DEVICE_PATH) ||
- (DevicePathSubType (DevPathNode) != HW_CONTROLLER_DP)) {
+ (DevicePathSubType (DevPathNode) != HW_CONTROLLER_DP))
+ {
return EFI_UNSUPPORTED;
} else {
RemainingHasControllerNode = TRUE;
- RemainingControllerNumber = ((CONTROLLER_DEVICE_PATH *) DevPathNode)->ControllerNumber;
+ RemainingControllerNumber = ((CONTROLLER_DEVICE_PATH *)DevPathNode)->ControllerNumber;
}
}
}
@@ -466,7 +477,7 @@ I2cBusDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cHostProtocolGuid,
- (VOID **) &I2cHost,
+ (VOID **)&I2cHost,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -474,17 +485,17 @@ I2cBusDriverSupported (
if (!EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiI2cHostProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cHostProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
-
if (Status == EFI_ALREADY_STARTED) {
if ((RemainingDevicePath == NULL) ||
- ((RemainingDevicePath != NULL) && IsDevicePathEnd (RemainingDevicePath))) {
+ ((RemainingDevicePath != NULL) && IsDevicePathEnd (RemainingDevicePath)))
+ {
//
// If RemainingDevicePath is NULL or is the End of Device Path Node, return EFI_SUCCESS.
//
@@ -549,16 +560,16 @@ I2cBusDriverStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
- EFI_I2C_HOST_PROTOCOL *I2cHost;
- I2C_BUS_CONTEXT *I2cBusContext;
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
+ EFI_I2C_HOST_PROTOCOL *I2cHost;
+ I2C_BUS_CONTEXT *I2cBusContext;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- I2cBusContext = NULL;
- ParentDevicePath = NULL;
- I2cEnumerate = NULL;
- I2cHost = NULL;
+ I2cBusContext = NULL;
+ ParentDevicePath = NULL;
+ I2cEnumerate = NULL;
+ I2cHost = NULL;
//
// Determine if the I2C controller is available
@@ -566,7 +577,7 @@ I2cBusDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cHostProtocolGuid,
- (VOID**)&I2cHost,
+ (VOID **)&I2cHost,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -580,7 +591,7 @@ I2cBusDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &I2cBusContext,
+ (VOID **)&I2cBusContext,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -597,7 +608,7 @@ I2cBusDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cEnumerateProtocolGuid,
- (VOID**)&I2cEnumerate,
+ (VOID **)&I2cEnumerate,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -608,13 +619,13 @@ I2cBusDriverStart (
}
Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&ParentDevicePath,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
DEBUG ((DEBUG_ERROR, "I2cBus: open device path error, Status = %r\n", Status));
goto Error;
@@ -661,7 +672,7 @@ I2cBusDriverStart (
//
// Parent controller used to create children
//
- I2cBusContext->Controller = Controller;
+ I2cBusContext->Controller = Controller;
//
// Parent controller device path used to create children device path
//
@@ -693,29 +704,29 @@ Error:
DEBUG ((DEBUG_ERROR, "I2cBus: Start() function failed, Status = %r\n", Status));
if (ParentDevicePath != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if (I2cHost != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiI2cHostProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cHostProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if (I2cEnumerate != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiI2cEnumerateProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cEnumerateProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if (I2cBusContext != NULL) {
@@ -735,7 +746,6 @@ Error:
return Status;
}
-
/**
Stops a device controller or a bus controller.
@@ -771,60 +781,60 @@ I2cBusDriverStop (
IN EFI_HANDLE *ChildHandleBuffer
)
{
- I2C_BUS_CONTEXT *I2cBusContext;
- EFI_STATUS Status;
- BOOLEAN AllChildrenStopped;
- UINTN Index;
+ I2C_BUS_CONTEXT *I2cBusContext;
+ EFI_STATUS Status;
+ BOOLEAN AllChildrenStopped;
+ UINTN Index;
if (NumberOfChildren == 0) {
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiI2cHostProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cHostProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiI2cEnumerateProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cEnumerateProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &I2cBusContext,
+ (VOID **)&I2cBusContext,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
);
if (!EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiCallerIdGuid,
- I2cBusContext,
- NULL
- );
+ Controller,
+ &gEfiCallerIdGuid,
+ I2cBusContext,
+ NULL
+ );
//
// No more child now, free bus context data.
//
FreePool (I2cBusContext);
}
+
return Status;
}
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
Status = UnRegisterI2cDevice (This, Controller, ChildHandleBuffer[Index]);
if (EFI_ERROR (Status)) {
AllChildrenStopped = FALSE;
@@ -834,6 +844,7 @@ I2cBusDriverStop (
if (!AllChildrenStopped) {
return EFI_DEVICE_ERROR;
}
+
return EFI_SUCCESS;
}
@@ -853,22 +864,22 @@ I2cBusDriverStop (
**/
EFI_STATUS
RegisterI2cDevice (
- IN I2C_BUS_CONTEXT *I2cBusContext,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN I2C_BUS_CONTEXT *I2cBusContext,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- I2C_DEVICE_CONTEXT *I2cDeviceContext;
- EFI_STATUS Status;
- CONST EFI_I2C_DEVICE *Device;
- CONST EFI_I2C_DEVICE *TempDevice;
- UINT32 RemainingPathDeviceIndex;
- EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
- BOOLEAN BuildControllerNode;
- UINTN Count;
-
- Status = EFI_SUCCESS;
- BuildControllerNode = TRUE;
+ I2C_DEVICE_CONTEXT *I2cDeviceContext;
+ EFI_STATUS Status;
+ CONST EFI_I2C_DEVICE *Device;
+ CONST EFI_I2C_DEVICE *TempDevice;
+ UINT32 RemainingPathDeviceIndex;
+ EFI_DEVICE_PATH_PROTOCOL *DevPathNode;
+ BOOLEAN BuildControllerNode;
+ UINTN Count;
+
+ Status = EFI_SUCCESS;
+ BuildControllerNode = TRUE;
//
// Default DeviceIndex
@@ -884,12 +895,13 @@ RegisterI2cDevice (
//
DevPathNode = NextDevicePathNode (RemainingDevicePath);
if ((DevicePathType (DevPathNode) == HARDWARE_DEVICE_PATH) &&
- (DevicePathSubType(DevPathNode) == HW_CONTROLLER_DP)) {
+ (DevicePathSubType (DevPathNode) == HW_CONTROLLER_DP))
+ {
//
// RemainingDevicePath != NULL and RemainingDevicePath contains Controller Node,
// add Controller Node to Device Path on child handle.
//
- RemainingPathDeviceIndex = ((CONTROLLER_DEVICE_PATH *) DevPathNode)->ControllerNumber;
+ RemainingPathDeviceIndex = ((CONTROLLER_DEVICE_PATH *)DevPathNode)->ControllerNumber;
} else {
//
// RemainingDevicePath != NULL and RemainingDevicePath does not contain Controller Node,
@@ -908,12 +920,13 @@ RegisterI2cDevice (
// Get the next I2C device
//
Status = I2cBusContext->I2cEnumerate->Enumerate (I2cBusContext->I2cEnumerate, &Device);
- if (EFI_ERROR (Status) || Device == NULL) {
+ if (EFI_ERROR (Status) || (Device == NULL)) {
if (RemainingDevicePath != NULL) {
Status = EFI_NOT_FOUND;
} else {
Status = EFI_SUCCESS;
}
+
break;
}
@@ -937,14 +950,16 @@ RegisterI2cDevice (
// Get the next I2C device
//
Status = I2cBusContext->I2cEnumerate->Enumerate (I2cBusContext->I2cEnumerate, &TempDevice);
- if (EFI_ERROR (Status) || TempDevice == NULL) {
+ if (EFI_ERROR (Status) || (TempDevice == NULL)) {
Status = EFI_SUCCESS;
break;
}
+
if (CompareGuid (Device->DeviceGuid, TempDevice->DeviceGuid)) {
Count++;
}
}
+
if (Count == 1) {
//
// RemainingDevicePath == NULL and only DeviceIndex 0 is present on the I2C bus,
@@ -958,7 +973,8 @@ RegisterI2cDevice (
// Find I2C device reported in Remaining Device Path
//
if ((!CompareGuid (&((VENDOR_DEVICE_PATH *)RemainingDevicePath)->Guid, Device->DeviceGuid)) ||
- (RemainingPathDeviceIndex != Device->DeviceIndex)) {
+ (RemainingPathDeviceIndex != Device->DeviceIndex))
+ {
continue;
}
}
@@ -976,11 +992,11 @@ RegisterI2cDevice (
//
// Initialize the specific device context
//
- I2cDeviceContext->I2cBusContext = I2cBusContext;
- I2cDeviceContext->I2cDevice = Device;
- I2cDeviceContext->I2cIo.DeviceGuid = Device->DeviceGuid;
- I2cDeviceContext->I2cIo.DeviceIndex = Device->DeviceIndex;
- I2cDeviceContext->I2cIo.HardwareRevision = Device->HardwareRevision;
+ I2cDeviceContext->I2cBusContext = I2cBusContext;
+ I2cDeviceContext->I2cDevice = Device;
+ I2cDeviceContext->I2cIo.DeviceGuid = Device->DeviceGuid;
+ I2cDeviceContext->I2cIo.DeviceIndex = Device->DeviceIndex;
+ I2cDeviceContext->I2cIo.HardwareRevision = Device->HardwareRevision;
I2cDeviceContext->I2cIo.I2cControllerCapabilities = I2cBusContext->I2cHost->I2cControllerCapabilities;
//
@@ -996,12 +1012,13 @@ RegisterI2cDevice (
// Install the protocol
//
Status = gBS->InstallMultipleProtocolInterfaces (
- &I2cDeviceContext->Handle,
- &gEfiI2cIoProtocolGuid,
- &I2cDeviceContext->I2cIo,
- &gEfiDevicePathProtocolGuid,
- I2cDeviceContext->DevicePath,
- NULL );
+ &I2cDeviceContext->Handle,
+ &gEfiI2cIoProtocolGuid,
+ &I2cDeviceContext->I2cIo,
+ &gEfiDevicePathProtocolGuid,
+ I2cDeviceContext->DevicePath,
+ NULL
+ );
if (EFI_ERROR (Status)) {
//
// Free resources for this I2C device
@@ -1016,7 +1033,7 @@ RegisterI2cDevice (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cHostProtocolGuid,
- (VOID **) &I2cBusContext->I2cHost,
+ (VOID **)&I2cBusContext->I2cHost,
I2cBusContext->DriverBindingHandle,
I2cDeviceContext->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -1048,7 +1065,6 @@ RegisterI2cDevice (
return Status;
}
-
/**
Queue an I2C transaction for execution on the I2C device.
@@ -1130,11 +1146,11 @@ I2cBusQueueRequest (
OUT EFI_STATUS *I2cStatus OPTIONAL
)
{
- CONST EFI_I2C_DEVICE *I2cDevice;
- I2C_BUS_CONTEXT *I2cBusContext;
- CONST EFI_I2C_HOST_PROTOCOL *I2cHost;
- I2C_DEVICE_CONTEXT *I2cDeviceContext;
- EFI_STATUS Status;
+ CONST EFI_I2C_DEVICE *I2cDevice;
+ I2C_BUS_CONTEXT *I2cBusContext;
+ CONST EFI_I2C_HOST_PROTOCOL *I2cHost;
+ I2C_DEVICE_CONTEXT *I2cDeviceContext;
+ EFI_STATUS Status;
if (RequestPacket == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1161,7 +1177,7 @@ I2cBusQueueRequest (
Status = I2cHost->QueueRequest (
I2cHost,
I2cDevice->I2cBusConfiguration,
- I2cDevice->SlaveAddressArray [SlaveAddressIndex],
+ I2cDevice->SlaveAddressArray[SlaveAddressIndex],
Event,
RequestPacket,
I2cStatus
@@ -1180,7 +1196,7 @@ I2cBusQueueRequest (
**/
VOID
ReleaseI2cDeviceContext (
- IN I2C_DEVICE_CONTEXT *I2cDeviceContext
+ IN I2C_DEVICE_CONTEXT *I2cDeviceContext
)
{
if (I2cDeviceContext == NULL) {
@@ -1210,22 +1226,22 @@ ReleaseI2cDeviceContext (
**/
EFI_STATUS
UnRegisterI2cDevice (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
)
{
- EFI_STATUS Status;
- I2C_DEVICE_CONTEXT *I2cDeviceContext;
- EFI_I2C_IO_PROTOCOL *I2cIo;
- EFI_I2C_HOST_PROTOCOL *I2cHost;
+ EFI_STATUS Status;
+ I2C_DEVICE_CONTEXT *I2cDeviceContext;
+ EFI_I2C_IO_PROTOCOL *I2cIo;
+ EFI_I2C_HOST_PROTOCOL *I2cHost;
I2cIo = NULL;
Status = gBS->OpenProtocol (
Handle,
&gEfiI2cIoProtocolGuid,
- (VOID **) &I2cIo,
+ (VOID **)&I2cIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1267,13 +1283,13 @@ UnRegisterI2cDevice (
// Keep parent and child relationship
//
gBS->OpenProtocol (
- Controller,
- &gEfiI2cHostProtocolGuid,
- (VOID **) &I2cHost,
- This->DriverBindingHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiI2cHostProtocolGuid,
+ (VOID **)&I2cHost,
+ This->DriverBindingHandle,
+ Handle,
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
return Status;
}
@@ -1299,8 +1315,8 @@ UnRegisterI2cDevice (
**/
EFI_STATUS
I2cBusDevicePathAppend (
- IN I2C_DEVICE_CONTEXT *I2cDeviceContext,
- IN BOOLEAN BuildControllerNode
+ IN I2C_DEVICE_CONTEXT *I2cDeviceContext,
+ IN BOOLEAN BuildControllerNode
)
{
EFI_DEVICE_PATH_PROTOCOL *PreviousDevicePath;
@@ -1311,10 +1327,10 @@ I2cBusDevicePathAppend (
// Build vendor device path
//
CopyMem (&gVendorDevicePathTemplate.Guid, I2cDeviceContext->I2cDevice->DeviceGuid, sizeof (EFI_GUID));
- I2cDeviceContext->DevicePath = AppendDevicePathNode (
- I2cDeviceContext->I2cBusContext->ParentDevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &gVendorDevicePathTemplate
- );
+ I2cDeviceContext->DevicePath = AppendDevicePathNode (
+ I2cDeviceContext->I2cBusContext->ParentDevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&gVendorDevicePathTemplate
+ );
ASSERT (I2cDeviceContext->DevicePath != NULL);
if (I2cDeviceContext->DevicePath == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -1324,12 +1340,12 @@ I2cBusDevicePathAppend (
//
// Build the final I2C device path with controller node
//
- PreviousDevicePath = I2cDeviceContext->DevicePath;
+ PreviousDevicePath = I2cDeviceContext->DevicePath;
gControllerDevicePathTemplate.ControllerNumber = I2cDeviceContext->I2cDevice->DeviceIndex;
- I2cDeviceContext->DevicePath = AppendDevicePathNode (
- I2cDeviceContext->DevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &gControllerDevicePathTemplate
- );
+ I2cDeviceContext->DevicePath = AppendDevicePathNode (
+ I2cDeviceContext->DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&gControllerDevicePathTemplate
+ );
gBS->FreePool (PreviousDevicePath);
ASSERT (I2cDeviceContext->DevicePath != NULL);
if (I2cDeviceContext->DevicePath == NULL) {
@@ -1353,12 +1369,12 @@ I2cBusDevicePathAppend (
**/
EFI_STATUS
EFIAPI
-InitializeI2cBus(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeI2cBus (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -1373,7 +1389,6 @@ InitializeI2cBus(
);
ASSERT_EFI_ERROR (Status);
-
return Status;
}
@@ -1392,15 +1407,15 @@ InitializeI2cBus(
EFI_STATUS
EFIAPI
I2cBusUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
)
{
- EFI_STATUS Status;
- EFI_HANDLE *DeviceHandleBuffer;
- UINTN DeviceHandleCount;
- UINTN Index;
- EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
- EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
+ EFI_STATUS Status;
+ EFI_HANDLE *DeviceHandleBuffer;
+ UINTN DeviceHandleCount;
+ UINTN Index;
+ EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
//
// Get the list of all I2C Controller handles in the handle database.
@@ -1455,7 +1470,7 @@ I2cBusUnload (
Status = gBS->HandleProtocol (
gI2cBusDriverBinding.DriverBindingHandle,
&gEfiComponentNameProtocolGuid,
- (VOID **) &ComponentName
+ (VOID **)&ComponentName
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
@@ -1468,7 +1483,7 @@ I2cBusUnload (
Status = gBS->HandleProtocol (
gI2cBusDriverBinding.DriverBindingHandle,
&gEfiComponentName2ProtocolGuid,
- (VOID **) &ComponentName2
+ (VOID **)&ComponentName2
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
diff --git a/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.c b/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.c
index bb5d83927c..0c733f0c3d 100644
--- a/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.c
+++ b/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.c
@@ -20,21 +20,21 @@
**/
EFI_STATUS
EFIAPI
-InitializeI2c(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeI2c (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
//
- Status = InitializeI2cHost ( ImageHandle, SystemTable );
- if ( !EFI_ERROR ( Status ))
- {
- Status = InitializeI2cBus ( ImageHandle, SystemTable );
+ Status = InitializeI2cHost (ImageHandle, SystemTable);
+ if ( !EFI_ERROR (Status)) {
+ Status = InitializeI2cBus (ImageHandle, SystemTable);
}
+
return Status;
}
@@ -53,17 +53,18 @@ InitializeI2c(
EFI_STATUS
EFIAPI
I2cUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Disconnect the drivers
//
- Status = I2cBusUnload ( ImageHandle );
- if ( !EFI_ERROR ( Status )) {
- Status = I2cHostUnload ( ImageHandle );
+ Status = I2cBusUnload (ImageHandle);
+ if ( !EFI_ERROR (Status)) {
+ Status = I2cHostUnload (ImageHandle);
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.h b/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.h
index 49f1e9b17b..c684fa4437 100644
--- a/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.h
+++ b/MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.h
@@ -30,24 +30,24 @@
#include <Protocol/I2cBusConfigurationManagement.h>
#include <Protocol/LoadedImage.h>
-#define I2C_DEVICE_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'D')
-#define I2C_HOST_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'H')
-#define I2C_REQUEST_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'R')
+#define I2C_DEVICE_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'D')
+#define I2C_HOST_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'H')
+#define I2C_REQUEST_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'R')
//
// Synchronize access to the list of requests
//
-#define TPL_I2C_SYNC TPL_NOTIFY
+#define TPL_I2C_SYNC TPL_NOTIFY
//
// I2C bus context
//
typedef struct {
- EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
- EFI_I2C_HOST_PROTOCOL *I2cHost;
- EFI_HANDLE Controller;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_HANDLE DriverBindingHandle;
+ EFI_I2C_ENUMERATE_PROTOCOL *I2cEnumerate;
+ EFI_I2C_HOST_PROTOCOL *I2cHost;
+ EFI_HANDLE Controller;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_HANDLE DriverBindingHandle;
} I2C_BUS_CONTEXT;
//
@@ -57,36 +57,36 @@ typedef struct {
//
// Structure identification
//
- UINT32 Signature;
+ UINT32 Signature;
//
// I2c device handle
//
- EFI_HANDLE Handle;
+ EFI_HANDLE Handle;
//
// Upper level API to support the I2C device I/O
//
- EFI_I2C_IO_PROTOCOL I2cIo;
+ EFI_I2C_IO_PROTOCOL I2cIo;
//
// Device path for this device
//
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
//
// Platform specific data for this device
//
- CONST EFI_I2C_DEVICE *I2cDevice;
+ CONST EFI_I2C_DEVICE *I2cDevice;
//
// Context for the common I/O support including the
// lower level API to the host controller.
//
- I2C_BUS_CONTEXT *I2cBusContext;
+ I2C_BUS_CONTEXT *I2cBusContext;
} I2C_DEVICE_CONTEXT;
-#define I2C_DEVICE_CONTEXT_FROM_PROTOCOL(a) CR (a, I2C_DEVICE_CONTEXT, I2cIo, I2C_DEVICE_SIGNATURE)
+#define I2C_DEVICE_CONTEXT_FROM_PROTOCOL(a) CR (a, I2C_DEVICE_CONTEXT, I2cIo, I2C_DEVICE_SIGNATURE)
//
// I2C Request
@@ -95,41 +95,41 @@ typedef struct {
//
// Signature
//
- UINT32 Signature;
+ UINT32 Signature;
//
// Next request in the pending request list
//
- LIST_ENTRY Link;
+ LIST_ENTRY Link;
//
// I2C bus configuration for the operation
//
- UINTN I2cBusConfiguration;
+ UINTN I2cBusConfiguration;
//
// I2C slave address for the operation
//
- UINTN SlaveAddress;
+ UINTN SlaveAddress;
//
// Event to set for asynchronous operations, NULL for
// synchronous operations
//
- EFI_EVENT Event;
+ EFI_EVENT Event;
//
// I2C operation description
//
- EFI_I2C_REQUEST_PACKET *RequestPacket;
+ EFI_I2C_REQUEST_PACKET *RequestPacket;
//
// Optional buffer to receive the I2C operation completion status
//
- EFI_STATUS *Status;
+ EFI_STATUS *Status;
} I2C_REQUEST;
-#define I2C_REQUEST_FROM_ENTRY(a) CR (a, I2C_REQUEST, Link, I2C_REQUEST_SIGNATURE);
+#define I2C_REQUEST_FROM_ENTRY(a) CR (a, I2C_REQUEST, Link, I2C_REQUEST_SIGNATURE);
//
// I2C host context
@@ -138,66 +138,66 @@ typedef struct {
//
// Structure identification
//
- UINTN Signature;
+ UINTN Signature;
//
// Current I2C bus configuration
//
- UINTN I2cBusConfiguration;
+ UINTN I2cBusConfiguration;
//
// I2C bus configuration management event
//
- EFI_EVENT I2cBusConfigurationEvent;
+ EFI_EVENT I2cBusConfigurationEvent;
//
// I2C operation completion event
//
- EFI_EVENT I2cEvent;
+ EFI_EVENT I2cEvent;
//
// I2C operation and I2C bus configuration management status
//
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// I2C bus configuration management operation pending
//
- BOOLEAN I2cBusConfigurationManagementPending;
+ BOOLEAN I2cBusConfigurationManagementPending;
//
// I2C request list maintained by I2C Host
//
- LIST_ENTRY RequestList;
+ LIST_ENTRY RequestList;
//
// Upper level API
//
- EFI_I2C_HOST_PROTOCOL I2cHost;
+ EFI_I2C_HOST_PROTOCOL I2cHost;
//
// I2C bus configuration management protocol
//
- EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
+ EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
//
// Lower level API for I2C master (controller)
//
- EFI_I2C_MASTER_PROTOCOL *I2cMaster;
+ EFI_I2C_MASTER_PROTOCOL *I2cMaster;
} I2C_HOST_CONTEXT;
-#define I2C_HOST_CONTEXT_FROM_PROTOCOL(a) CR (a, I2C_HOST_CONTEXT, I2cHost, I2C_HOST_SIGNATURE)
+#define I2C_HOST_CONTEXT_FROM_PROTOCOL(a) CR (a, I2C_HOST_CONTEXT, I2cHost, I2C_HOST_SIGNATURE)
//
// Global Variables
//
-extern EFI_COMPONENT_NAME_PROTOCOL gI2cBusComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gI2cBusComponentName2;
-extern EFI_DRIVER_BINDING_PROTOCOL gI2cBusDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gI2cBusComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gI2cBusComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gI2cBusDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gI2cHostComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gI2cHostComponentName2;
-extern EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gI2cHostComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gI2cHostComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding;
/**
Start the I2C driver
@@ -217,7 +217,7 @@ extern EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding;
EFI_STATUS
RegisterI2cDevice (
IN I2C_BUS_CONTEXT *I2cBus,
- IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
@@ -237,9 +237,9 @@ RegisterI2cDevice (
**/
EFI_STATUS
UnRegisterI2cDevice (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
);
/**
@@ -256,8 +256,8 @@ UnRegisterI2cDevice (
**/
EFI_STATUS
I2cBusDevicePathAppend (
- IN I2C_DEVICE_CONTEXT *I2cDeviceContext,
- IN BOOLEAN BuildControllerNode
+ IN I2C_DEVICE_CONTEXT *I2cDeviceContext,
+ IN BOOLEAN BuildControllerNode
);
/**
@@ -514,9 +514,9 @@ I2cBusDriverStop (
EFI_STATUS
EFIAPI
I2cBusComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
);
/**
@@ -590,11 +590,11 @@ I2cBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
I2cBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -610,9 +610,9 @@ I2cBusComponentNameGetControllerName (
**/
EFI_STATUS
EFIAPI
-InitializeI2cBus(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeI2cBus (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
);
/**
@@ -630,7 +630,7 @@ InitializeI2cBus(
EFI_STATUS
EFIAPI
I2cBusUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
);
/**
@@ -643,7 +643,7 @@ I2cBusUnload (
**/
VOID
ReleaseI2cDeviceContext (
- IN I2C_DEVICE_CONTEXT *I2cDeviceContext
+ IN I2C_DEVICE_CONTEXT *I2cDeviceContext
);
/**
@@ -657,8 +657,8 @@ ReleaseI2cDeviceContext (
**/
EFI_STATUS
I2cHostRequestComplete (
- I2C_HOST_CONTEXT *I2cHost,
- EFI_STATUS Status
+ I2C_HOST_CONTEXT *I2cHost,
+ EFI_STATUS Status
);
/**
@@ -688,7 +688,7 @@ I2cHostRequestComplete (
**/
EFI_STATUS
I2cHostRequestEnable (
- I2C_HOST_CONTEXT *I2cHost
+ I2C_HOST_CONTEXT *I2cHost
);
/**
@@ -779,9 +779,9 @@ I2cHostDriverSupported (
EFI_STATUS
EFIAPI
I2cHostDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -813,10 +813,10 @@ I2cHostDriverStart (
EFI_STATUS
EFIAPI
I2cHostDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -861,9 +861,9 @@ I2cHostDriverStop (
EFI_STATUS
EFIAPI
I2cHostComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
);
/**
@@ -937,11 +937,11 @@ I2cHostComponentNameGetDriverName (
EFI_STATUS
EFIAPI
I2cHostComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -956,8 +956,8 @@ I2cHostComponentNameGetControllerName (
VOID
EFIAPI
I2cHostRequestCompleteEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -972,8 +972,8 @@ I2cHostRequestCompleteEvent (
VOID
EFIAPI
I2cHostI2cBusConfigurationAvailable (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -1065,9 +1065,9 @@ I2cHostQueueRequest (
**/
EFI_STATUS
EFIAPI
-InitializeI2cHost(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeI2cHost (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
);
/**
@@ -1085,7 +1085,7 @@ InitializeI2cHost(
EFI_STATUS
EFIAPI
I2cHostUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
);
-#endif // __I2C_DXE_H__
+#endif // __I2C_DXE_H__
diff --git a/MdeModulePkg/Bus/I2c/I2cDxe/I2cHost.c b/MdeModulePkg/Bus/I2c/I2cDxe/I2cHost.c
index 8dec43bcb1..a4b3302b6b 100644
--- a/MdeModulePkg/Bus/I2c/I2cDxe/I2cHost.c
+++ b/MdeModulePkg/Bus/I2c/I2cDxe/I2cHost.c
@@ -10,7 +10,7 @@
#include "I2cDxe.h"
-EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding = {
I2cHostDriverSupported,
I2cHostDriverStart,
I2cHostDriverStop,
@@ -22,24 +22,24 @@ EFI_DRIVER_BINDING_PROTOCOL gI2cHostDriverBinding = {
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mI2cHostDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mI2cHostDriverNameTable[] = {
{ "eng;en", L"I2c Host Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
// EFI Component Name Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gI2cHostComponentName = {
- (EFI_COMPONENT_NAME_GET_DRIVER_NAME) I2cHostComponentNameGetDriverName,
- (EFI_COMPONENT_NAME_GET_CONTROLLER_NAME) I2cHostComponentNameGetControllerName,
+ (EFI_COMPONENT_NAME_GET_DRIVER_NAME)I2cHostComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME_GET_CONTROLLER_NAME)I2cHostComponentNameGetControllerName,
"eng"
};
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gI2cHostComponentName2 = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gI2cHostComponentName2 = {
I2cHostComponentNameGetDriverName,
I2cHostComponentNameGetControllerName,
"en"
@@ -88,8 +88,8 @@ EFI_STATUS
EFIAPI
I2cHostComponentNameGetDriverName (
IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -172,11 +172,11 @@ I2cHostComponentNameGetDriverName (
EFI_STATUS
EFIAPI
I2cHostComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME2_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME2_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
@@ -232,9 +232,9 @@ I2cHostDriverSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_I2C_MASTER_PROTOCOL *I2cMaster;
- EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
- EFI_STATUS Status;
+ EFI_I2C_MASTER_PROTOCOL *I2cMaster;
+ EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
+ EFI_STATUS Status;
//
// Locate I2C Bus Configuration Management Protocol
@@ -255,11 +255,11 @@ I2cHostDriverSupported (
// Close the protocol because we don't use it here
//
gBS->CloseProtocol (
- Controller,
- &gEfiI2cBusConfigurationManagementProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cBusConfigurationManagementProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Locate I2C Master Protocol
@@ -317,15 +317,15 @@ I2cHostDriverSupported (
EFI_STATUS
EFIAPI
I2cHostDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_I2C_MASTER_PROTOCOL *I2cMaster;
- EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
- I2C_HOST_CONTEXT *I2cHostContext;
+ EFI_STATUS Status;
+ EFI_I2C_MASTER_PROTOCOL *I2cMaster;
+ EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
+ I2C_HOST_CONTEXT *I2cHostContext;
I2cMaster = NULL;
I2cHostContext = NULL;
@@ -379,8 +379,8 @@ I2cHostDriverStart (
I2cHostContext->Signature = I2C_HOST_SIGNATURE;
I2cHostContext->I2cMaster = I2cMaster;
I2cHostContext->I2cBusConfigurationManagement = I2cBusConfigurationManagement;
- I2cHostContext->I2cBusConfiguration = (UINTN) -1;
- InitializeListHead(&I2cHostContext->RequestList);
+ I2cHostContext->I2cBusConfiguration = (UINTN)-1;
+ InitializeListHead (&I2cHostContext->RequestList);
//
// Reset the controller
@@ -441,11 +441,11 @@ Exit:
DEBUG ((DEBUG_ERROR, "I2cHost: Start() function failed, Status = %r\n", Status));
if (I2cBusConfigurationManagement != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiI2cBusConfigurationManagementProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiI2cBusConfigurationManagementProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if ((I2cHostContext != NULL) && (I2cHostContext->I2cEvent != NULL)) {
@@ -501,16 +501,16 @@ Exit:
EFI_STATUS
EFIAPI
I2cHostDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- I2C_HOST_CONTEXT *I2cHostContext;
- EFI_I2C_HOST_PROTOCOL *I2cHost;
- EFI_TPL TplPrevious;
+ EFI_STATUS Status;
+ I2C_HOST_CONTEXT *I2cHostContext;
+ EFI_I2C_HOST_PROTOCOL *I2cHost;
+ EFI_TPL TplPrevious;
TplPrevious = EfiGetCurrentTpl ();
if (TplPrevious > TPL_I2C_SYNC) {
@@ -521,7 +521,7 @@ I2cHostDriverStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiI2cHostProtocolGuid,
- (VOID **) &I2cHost,
+ (VOID **)&I2cHost,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -542,9 +542,9 @@ I2cHostDriverStop (
// If there is pending request or pending bus configuration, do not stop
//
Status = EFI_DEVICE_ERROR;
- if (( !I2cHostContext->I2cBusConfigurationManagementPending )
- && IsListEmpty (&I2cHostContext->RequestList)) {
-
+ if ( (!I2cHostContext->I2cBusConfigurationManagementPending)
+ && IsListEmpty (&I2cHostContext->RequestList))
+ {
//
// Remove the I2C host protocol
//
@@ -602,16 +602,16 @@ I2cHostDriverStop (
VOID
EFIAPI
I2cHostI2cBusConfigurationAvailable (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- I2C_HOST_CONTEXT *I2cHostContext;
- EFI_I2C_MASTER_PROTOCOL *I2cMaster;
- I2C_REQUEST *I2cRequest;
- LIST_ENTRY *EntryHeader;
- LIST_ENTRY *Entry;
- EFI_STATUS Status;
+ I2C_HOST_CONTEXT *I2cHostContext;
+ EFI_I2C_MASTER_PROTOCOL *I2cMaster;
+ I2C_REQUEST *I2cRequest;
+ LIST_ENTRY *EntryHeader;
+ LIST_ENTRY *Entry;
+ EFI_STATUS Status;
//
// Mark this I2C bus configuration management operation as complete
@@ -637,7 +637,7 @@ I2cHostI2cBusConfigurationAvailable (
// Unknown I2C bus configuration
// Force next operation to enable the I2C bus configuration
//
- I2cHostContext->I2cBusConfiguration = (UINTN) -1;
+ I2cHostContext->I2cBusConfiguration = (UINTN)-1;
//
// Do not continue current I2C request
@@ -649,8 +649,8 @@ I2cHostI2cBusConfigurationAvailable (
// Get the first request in the link with FIFO order
//
EntryHeader = &I2cHostContext->RequestList;
- Entry = GetFirstNode (EntryHeader);
- I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
+ Entry = GetFirstNode (EntryHeader);
+ I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
//
// Update the I2C bus configuration of the current I2C request
@@ -669,7 +669,7 @@ I2cHostI2cBusConfigurationAvailable (
);
if (EFI_ERROR (Status)) {
- DEBUG((DEBUG_ERROR, "I2cHostI2cBusConfigurationAvailable: Error starting I2C operation, %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "I2cHostI2cBusConfigurationAvailable: Error starting I2C operation, %r\n", Status));
}
}
@@ -686,20 +686,20 @@ I2cHostI2cBusConfigurationAvailable (
**/
EFI_STATUS
I2cHostRequestComplete (
- I2C_HOST_CONTEXT *I2cHostContext,
- EFI_STATUS Status
+ I2C_HOST_CONTEXT *I2cHostContext,
+ EFI_STATUS Status
)
{
- I2C_REQUEST *I2cRequest;
- LIST_ENTRY *EntryHeader;
- LIST_ENTRY *Entry;
+ I2C_REQUEST *I2cRequest;
+ LIST_ENTRY *EntryHeader;
+ LIST_ENTRY *Entry;
//
// Remove the current I2C request from the list
//
EntryHeader = &I2cHostContext->RequestList;
- Entry = GetFirstNode (EntryHeader);
- I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
+ Entry = GetFirstNode (EntryHeader);
+ I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
//
// Save the status for QueueRequest
@@ -725,7 +725,7 @@ I2cHostRequestComplete (
//
// If there is more I2C request, start next one
//
- if(!IsListEmpty (EntryHeader)) {
+ if (!IsListEmpty (EntryHeader)) {
I2cHostRequestEnable (I2cHostContext);
}
@@ -744,11 +744,11 @@ I2cHostRequestComplete (
VOID
EFIAPI
I2cHostRequestCompleteEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- I2C_HOST_CONTEXT *I2cHostContext;
+ I2C_HOST_CONTEXT *I2cHostContext;
//
// Handle the completion event
@@ -784,16 +784,16 @@ I2cHostRequestCompleteEvent (
**/
EFI_STATUS
I2cHostRequestEnable (
- I2C_HOST_CONTEXT *I2cHostContext
+ I2C_HOST_CONTEXT *I2cHostContext
)
{
- UINTN I2cBusConfiguration;
- CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
- I2C_REQUEST *I2cRequest;
- EFI_STATUS Status;
- EFI_TPL TplPrevious;
- LIST_ENTRY *EntryHeader;
- LIST_ENTRY *Entry;
+ UINTN I2cBusConfiguration;
+ CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *I2cBusConfigurationManagement;
+ I2C_REQUEST *I2cRequest;
+ EFI_STATUS Status;
+ EFI_TPL TplPrevious;
+ LIST_ENTRY *EntryHeader;
+ LIST_ENTRY *Entry;
//
// Assume pending request
@@ -807,7 +807,7 @@ I2cHostRequestEnable (
//
EntryHeader = &I2cHostContext->RequestList;
Entry = GetFirstNode (EntryHeader);
- I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
+ I2cRequest = I2C_REQUEST_FROM_ENTRY (Entry);
I2cBusConfiguration = I2cRequest->I2cBusConfiguration;
@@ -820,16 +820,16 @@ I2cHostRequestEnable (
// Update bus configuration for this device's requesting bus configuration
//
Status = I2cBusConfigurationManagement->EnableI2cBusConfiguration (
- I2cBusConfigurationManagement,
- I2cBusConfiguration,
- I2cHostContext->I2cBusConfigurationEvent,
- &I2cHostContext->Status
- );
+ I2cBusConfigurationManagement,
+ I2cBusConfiguration,
+ I2cHostContext->I2cBusConfigurationEvent,
+ &I2cHostContext->Status
+ );
} else {
//
// I2C bus configuration is same, no need change configuration and start I2c transaction directly
//
- TplPrevious = gBS->RaiseTPL ( TPL_I2C_SYNC );
+ TplPrevious = gBS->RaiseTPL (TPL_I2C_SYNC);
//
// Same I2C bus configuration
@@ -840,8 +840,9 @@ I2cHostRequestEnable (
//
// Release the thread synchronization
//
- gBS->RestoreTPL ( TplPrevious );
+ gBS->RestoreTPL (TplPrevious);
}
+
return Status;
}
@@ -965,12 +966,12 @@ I2cHostQueueRequest (
// For synchronous transaction, register an event used to wait for finishing synchronous transaction
//
Status = gBS->CreateEvent (
- 0,
- TPL_I2C_SYNC,
- NULL,
- NULL,
- &SyncEvent
- );
+ 0,
+ TPL_I2C_SYNC,
+ NULL,
+ NULL,
+ &SyncEvent
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1007,7 +1008,7 @@ I2cHostQueueRequest (
//
// Copy request packet into private buffer, as RequestPacket may be freed during asynchronous transaction
//
- RequestPacketSize = sizeof (UINTN) + RequestPacket->OperationCount * sizeof (EFI_I2C_OPERATION);
+ RequestPacketSize = sizeof (UINTN) + RequestPacket->OperationCount * sizeof (EFI_I2C_OPERATION);
I2cRequest->RequestPacket = AllocateZeroPool (RequestPacketSize);
ASSERT (I2cRequest->RequestPacket != NULL);
CopyMem (I2cRequest->RequestPacket, RequestPacket, RequestPacketSize);
@@ -1015,7 +1016,7 @@ I2cHostQueueRequest (
//
// Synchronize with the other threads
//
- gBS->RaiseTPL ( TPL_I2C_SYNC );
+ gBS->RaiseTPL (TPL_I2C_SYNC);
FirstRequest = IsListEmpty (&I2cHostContext->RequestList);
@@ -1085,12 +1086,12 @@ I2cHostQueueRequest (
**/
EFI_STATUS
EFIAPI
-InitializeI2cHost(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeI2cHost (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -1122,15 +1123,15 @@ InitializeI2cHost(
EFI_STATUS
EFIAPI
I2cHostUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
)
{
- EFI_STATUS Status;
- EFI_HANDLE *DeviceHandleBuffer;
- UINTN DeviceHandleCount;
- UINTN Index;
- EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
- EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
+ EFI_STATUS Status;
+ EFI_HANDLE *DeviceHandleBuffer;
+ UINTN DeviceHandleCount;
+ UINTN Index;
+ EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
//
// Get the list of all I2C Controller handles in the handle database.
@@ -1185,7 +1186,7 @@ I2cHostUnload (
Status = gBS->HandleProtocol (
gI2cHostDriverBinding.DriverBindingHandle,
&gEfiComponentNameProtocolGuid,
- (VOID **) &ComponentName
+ (VOID **)&ComponentName
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
@@ -1198,7 +1199,7 @@ I2cHostUnload (
Status = gBS->HandleProtocol (
gI2cHostDriverBinding.DriverBindingHandle,
&gEfiComponentName2ProtocolGuid,
- (VOID **) &ComponentName2
+ (VOID **)&ComponentName2
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
diff --git a/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.c b/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.c
index 84f4c5d16c..85b04bd97e 100644
--- a/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.c
@@ -12,9 +12,9 @@
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mIsaBusDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mIsaBusDriverNameTable[] = {
{ "eng;en", L"PI ISA BUS Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
@@ -29,9 +29,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gIsaBusComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gIsaBusComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) IsaBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) IsaBusComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gIsaBusComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)IsaBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)IsaBusComponentNameGetControllerName,
"en"
};
@@ -91,7 +91,6 @@ IsaBusComponentNameGetDriverName (
);
}
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -163,11 +162,11 @@ IsaBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
IsaBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
diff --git a/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.h b/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.h
index c8d4601e8b..e19dbbd4c1 100644
--- a/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.h
+++ b/MdeModulePkg/Bus/Isa/IsaBusDxe/ComponentName.h
@@ -13,8 +13,8 @@
#include <Protocol/ComponentName.h>
#include <Protocol/ComponentName2.h>
-extern EFI_COMPONENT_NAME_PROTOCOL gIsaBusComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gIsaBusComponentName2;
+extern EFI_COMPONENT_NAME_PROTOCOL gIsaBusComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gIsaBusComponentName2;
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -63,7 +63,6 @@ IsaBusComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -135,11 +134,11 @@ IsaBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
IsaBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
#endif
diff --git a/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.c b/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.c
index ccda7c3f70..38ea13a203 100644
--- a/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.c
+++ b/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.c
@@ -43,13 +43,13 @@
EFI_STATUS
EFIAPI
IsaBusDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- VOID *Instance;
+ EFI_STATUS Status;
+ VOID *Instance;
Status = gBS->OpenProtocol (
Controller,
@@ -61,11 +61,11 @@ IsaBusDriverBindingSupported (
);
if (!EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiIsaHcProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiIsaHcProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
if (EFI_ERROR (Status)) {
@@ -82,17 +82,17 @@ IsaBusDriverBindingSupported (
);
if (!EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
return Status;
}
-ISA_BUS_CHILD_PRIVATE_DATA mIsaBusChildPrivateTemplate = {
+ISA_BUS_CHILD_PRIVATE_DATA mIsaBusChildPrivateTemplate = {
ISA_BUS_CHILD_PRIVATE_DATA_SIGNATURE,
FALSE
};
@@ -123,10 +123,10 @@ IsaBusCreateChild (
IN OUT EFI_HANDLE *ChildHandle
)
{
- EFI_STATUS Status;
- ISA_BUS_PRIVATE_DATA *Private;
- EFI_ISA_HC_PROTOCOL *IsaHc;
- ISA_BUS_CHILD_PRIVATE_DATA *Child;
+ EFI_STATUS Status;
+ ISA_BUS_PRIVATE_DATA *Private;
+ EFI_ISA_HC_PROTOCOL *IsaHc;
+ ISA_BUS_CHILD_PRIVATE_DATA *Child;
Private = ISA_BUS_PRIVATE_DATA_FROM_THIS (This);
@@ -137,8 +137,10 @@ IsaBusCreateChild (
Status = gBS->InstallMultipleProtocolInterfaces (
ChildHandle,
- &gEfiIsaHcProtocolGuid, Private->IsaHc,
- &gEfiCallerIdGuid, Child,
+ &gEfiIsaHcProtocolGuid,
+ Private->IsaHc,
+ &gEfiCallerIdGuid,
+ Child,
NULL
);
if (EFI_ERROR (Status)) {
@@ -149,7 +151,7 @@ IsaBusCreateChild (
return gBS->OpenProtocol (
Private->IsaHcHandle,
&gEfiIsaHcProtocolGuid,
- (VOID **) &IsaHc,
+ (VOID **)&IsaHc,
gIsaBusDriverBinding.DriverBindingHandle,
*ChildHandle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -177,21 +179,21 @@ IsaBusCreateChild (
EFI_STATUS
EFIAPI
IsaBusDestroyChild (
- IN EFI_SERVICE_BINDING_PROTOCOL *This,
- IN EFI_HANDLE ChildHandle
+ IN EFI_SERVICE_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE ChildHandle
)
{
- EFI_STATUS Status;
- ISA_BUS_PRIVATE_DATA *Private;
- EFI_ISA_HC_PROTOCOL *IsaHc;
- ISA_BUS_CHILD_PRIVATE_DATA *Child;
+ EFI_STATUS Status;
+ ISA_BUS_PRIVATE_DATA *Private;
+ EFI_ISA_HC_PROTOCOL *IsaHc;
+ ISA_BUS_CHILD_PRIVATE_DATA *Child;
Private = ISA_BUS_PRIVATE_DATA_FROM_THIS (This);
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiCallerIdGuid,
- (VOID **) &Child,
+ (VOID **)&Child,
gIsaBusDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -207,25 +209,27 @@ IsaBusDestroyChild (
}
Child->InDestroying = TRUE;
- Status = gBS->CloseProtocol (
- Private->IsaHcHandle,
- &gEfiIsaHcProtocolGuid,
- gIsaBusDriverBinding.DriverBindingHandle,
- ChildHandle
- );
+ Status = gBS->CloseProtocol (
+ Private->IsaHcHandle,
+ &gEfiIsaHcProtocolGuid,
+ gIsaBusDriverBinding.DriverBindingHandle,
+ ChildHandle
+ );
ASSERT_EFI_ERROR (Status);
if (!EFI_ERROR (Status)) {
Status = gBS->UninstallMultipleProtocolInterfaces (
ChildHandle,
- &gEfiIsaHcProtocolGuid, Private->IsaHc,
- &gEfiCallerIdGuid, Child,
+ &gEfiIsaHcProtocolGuid,
+ Private->IsaHc,
+ &gEfiCallerIdGuid,
+ Child,
NULL
);
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
Private->IsaHcHandle,
&gEfiIsaHcProtocolGuid,
- (VOID **) &IsaHc,
+ (VOID **)&IsaHc,
gIsaBusDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -242,7 +246,7 @@ IsaBusDestroyChild (
return Status;
}
-ISA_BUS_PRIVATE_DATA mIsaBusPrivateTemplate = {
+ISA_BUS_PRIVATE_DATA mIsaBusPrivateTemplate = {
ISA_BUS_PRIVATE_DATA_SIGNATURE,
{
IsaBusCreateChild,
@@ -278,19 +282,19 @@ ISA_BUS_PRIVATE_DATA mIsaBusPrivateTemplate = {
EFI_STATUS
EFIAPI
IsaBusDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- ISA_BUS_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ ISA_BUS_PRIVATE_DATA *Private;
Status = gBS->OpenProtocol (
Controller,
&gEfiIsaHcProtocolGuid,
- (VOID **) &mIsaBusPrivateTemplate.IsaHc,
+ (VOID **)&mIsaBusPrivateTemplate.IsaHc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -302,7 +306,7 @@ IsaBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -324,7 +328,8 @@ IsaBusDriverBindingStart (
Status = gBS->InstallMultipleProtocolInterfaces (
&Controller,
- &gEfiIsaHcServiceBindingProtocolGuid, &Private->ServiceBinding,
+ &gEfiIsaHcServiceBindingProtocolGuid,
+ &Private->ServiceBinding,
NULL
);
ASSERT_EFI_ERROR (Status);
@@ -350,22 +355,22 @@ IsaBusDriverBindingStart (
EFI_STATUS
EFIAPI
IsaBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_SERVICE_BINDING_PROTOCOL *ServiceBinding;
- ISA_BUS_PRIVATE_DATA *Private;
- UINTN Index;
- BOOLEAN AllChildrenStopped;
+ EFI_STATUS Status;
+ EFI_SERVICE_BINDING_PROTOCOL *ServiceBinding;
+ ISA_BUS_PRIVATE_DATA *Private;
+ UINTN Index;
+ BOOLEAN AllChildrenStopped;
Status = gBS->OpenProtocol (
Controller,
&gEfiIsaHcServiceBindingProtocolGuid,
- (VOID **) &ServiceBinding,
+ (VOID **)&ServiceBinding,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -379,7 +384,8 @@ IsaBusDriverBindingStop (
if (NumberOfChildren == 0) {
Status = gBS->UninstallMultipleProtocolInterfaces (
Controller,
- &gEfiIsaHcServiceBindingProtocolGuid, &Private->ServiceBinding,
+ &gEfiIsaHcServiceBindingProtocolGuid,
+ &Private->ServiceBinding,
NULL
);
if (!EFI_ERROR (Status)) {
@@ -415,7 +421,7 @@ IsaBusDriverBindingStop (
//
// ISA Bus Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gIsaBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gIsaBusDriverBinding = {
IsaBusDriverBindingSupported,
IsaBusDriverBindingStart,
IsaBusDriverBindingStop,
@@ -440,7 +446,7 @@ InitializeIsaBus (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
diff --git a/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.h b/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.h
index 939a08b509..102f84a828 100644
--- a/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.h
+++ b/MdeModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.h
@@ -26,15 +26,15 @@ typedef struct {
EFI_ISA_HC_PROTOCOL *IsaHc; ///< ISA HC protocol produced by the ISA Host Controller driver
EFI_HANDLE IsaHcHandle; ///< ISA HC handle created by the ISA Host Controller driver
} ISA_BUS_PRIVATE_DATA;
-#define ISA_BUS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('_', 'i', 's', 'b')
-#define ISA_BUS_PRIVATE_DATA_FROM_THIS(a) CR (a, ISA_BUS_PRIVATE_DATA, ServiceBinding, ISA_BUS_PRIVATE_DATA_SIGNATURE)
+#define ISA_BUS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('_', 'i', 's', 'b')
+#define ISA_BUS_PRIVATE_DATA_FROM_THIS(a) CR (a, ISA_BUS_PRIVATE_DATA, ServiceBinding, ISA_BUS_PRIVATE_DATA_SIGNATURE)
typedef struct {
- UINT32 Signature;
- BOOLEAN InDestroying; ///< Flag to avoid DestroyChild() re-entry.
+ UINT32 Signature;
+ BOOLEAN InDestroying; ///< Flag to avoid DestroyChild() re-entry.
} ISA_BUS_CHILD_PRIVATE_DATA;
-#define ISA_BUS_CHILD_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('_', 'i', 's', 'c')
+#define ISA_BUS_CHILD_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('_', 'i', 's', 'c')
-extern EFI_DRIVER_BINDING_PROTOCOL gIsaBusDriverBinding;
+extern EFI_DRIVER_BINDING_PROTOCOL gIsaBusDriverBinding;
#endif
diff --git a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/ComponentName.c b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/ComponentName.c
index 3d2e9de67b..d36e2becd6 100644
--- a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/ComponentName.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -58,7 +59,6 @@ Ps2KeyboardComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -130,14 +130,13 @@ Ps2KeyboardComponentNameGetDriverName (
EFI_STATUS
EFIAPI
Ps2KeyboardComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
-
//
// EFI Component Name Protocol
//
@@ -150,14 +149,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gPs2KeyboardComponent
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPs2KeyboardComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) Ps2KeyboardComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) Ps2KeyboardComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPs2KeyboardComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)Ps2KeyboardComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)Ps2KeyboardComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPs2KeyboardDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPs2KeyboardDriverNameTable[] = {
{
"eng;en",
L"PS/2 Keyboard Driver"
@@ -295,16 +293,17 @@ Ps2KeyboardComponentNameGetDriverName (
EFI_STATUS
EFIAPI
Ps2KeyboardComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ EFI_STATUS Status;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+
//
// This is a device driver, so ChildHandle must be NULL.
//
@@ -319,13 +318,14 @@ Ps2KeyboardComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiSimpleTextInProtocolGuid,
- (VOID **) &ConIn,
+ (VOID **)&ConIn,
gKeyboardControllerDriver.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
diff --git a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdCtrller.c b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdCtrller.c
index d8d050b0a9..77dc226222 100644
--- a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdCtrller.c
+++ b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdCtrller.c
@@ -9,13 +9,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ps2Keyboard.h"
struct {
- UINT8 ScanCode; ///< follows value defined in Scan Code Set1
- UINT16 EfiScanCode;
- CHAR16 UnicodeChar;
- CHAR16 ShiftUnicodeChar;
-}
-ConvertKeyboardScanCodeToEfiKey[] = {
-
+ UINT8 ScanCode; ///< follows value defined in Scan Code Set1
+ UINT16 EfiScanCode;
+ CHAR16 UnicodeChar;
+ CHAR16 ShiftUnicodeChar;
+} ConvertKeyboardScanCodeToEfiKey[] = {
{
0x01, // Escape
SCAN_ESC,
@@ -335,7 +333,7 @@ ConvertKeyboardScanCodeToEfiKey[] = {
L'?'
},
{
- 0x36, //Right Shift
+ 0x36, // Right Shift
SCAN_NULL,
0x0000,
0x0000
@@ -347,7 +345,7 @@ ConvertKeyboardScanCodeToEfiKey[] = {
L'*'
},
{
- 0x38, //Left Alt/Extended Right Alt
+ 0x38, // Left Alt/Extended Right Alt
SCAN_NULL,
0x0000,
0x0000
@@ -359,7 +357,7 @@ ConvertKeyboardScanCodeToEfiKey[] = {
L' '
},
{
- 0x3A, //CapsLock
+ 0x3A, // CapsLock
SCAN_NULL,
0x0000,
0x0000
@@ -527,19 +525,19 @@ ConvertKeyboardScanCodeToEfiKey[] = {
0x0000
},
{
- 0x5B, //Left LOGO
+ 0x5B, // Left LOGO
SCAN_NULL,
0x0000,
0x0000
},
{
- 0x5C, //Right LOGO
+ 0x5C, // Right LOGO
SCAN_NULL,
0x0000,
0x0000
},
{
- 0x5D, //Menu key
+ 0x5D, // Menu key
SCAN_NULL,
0x0000,
0x0000
@@ -557,9 +555,7 @@ ConvertKeyboardScanCodeToEfiKey[] = {
//
UINTN mWaitForValueTimeOut = KEYBOARD_WAITFORVALUE_TIMEOUT;
-BOOLEAN mEnableMouseInterface;
-
-
+BOOLEAN mEnableMouseInterface;
/**
Return the count of scancode in the queue.
@@ -570,7 +566,7 @@ BOOLEAN mEnableMouseInterface;
**/
UINTN
GetScancodeBufCount (
- IN SCAN_CODE_QUEUE *Queue
+ IN SCAN_CODE_QUEUE *Queue
)
{
if (Queue->Head <= Queue->Tail) {
@@ -594,13 +590,13 @@ GetScancodeBufCount (
**/
EFI_STATUS
GetScancodeBufHead (
- IN SCAN_CODE_QUEUE *Queue,
- IN UINTN Count,
- OUT UINT8 *Buf
+ IN SCAN_CODE_QUEUE *Queue,
+ IN UINTN Count,
+ OUT UINT8 *Buf
)
{
- UINTN Index;
- UINTN Pos;
+ UINTN Index;
+ UINTN Pos;
//
// check the valid range of parameter 'Count'
@@ -608,6 +604,7 @@ GetScancodeBufHead (
if (GetScancodeBufCount (Queue) < Count) {
return EFI_NOT_READY;
}
+
//
// retrieve the values
//
@@ -632,12 +629,12 @@ GetScancodeBufHead (
**/
EFI_STATUS
PopScancodeBufHead (
- IN SCAN_CODE_QUEUE *Queue,
- IN UINTN Count,
- OUT UINT8 *Buf OPTIONAL
+ IN SCAN_CODE_QUEUE *Queue,
+ IN UINTN Count,
+ OUT UINT8 *Buf OPTIONAL
)
{
- UINTN Index;
+ UINTN Index;
//
// Check the valid range of parameter 'Count'
@@ -645,6 +642,7 @@ PopScancodeBufHead (
if (GetScancodeBufCount (Queue) < Count) {
return EFI_NOT_READY;
}
+
//
// Retrieve and remove the values
//
@@ -665,8 +663,8 @@ PopScancodeBufHead (
**/
VOID
PushScancodeBufTail (
- IN SCAN_CODE_QUEUE *Queue,
- IN UINT8 Scancode
+ IN SCAN_CODE_QUEUE *Queue,
+ IN UINT8 Scancode
)
{
if (GetScancodeBufCount (Queue) == KEYBOARD_SCAN_CODE_MAX_COUNT - 1) {
@@ -674,7 +672,7 @@ PushScancodeBufTail (
}
Queue->Buffer[Queue->Tail] = Scancode;
- Queue->Tail = (Queue->Tail + 1) % KEYBOARD_SCAN_CODE_MAX_COUNT;
+ Queue->Tail = (Queue->Tail + 1) % KEYBOARD_SCAN_CODE_MAX_COUNT;
}
/**
@@ -687,7 +685,7 @@ PushScancodeBufTail (
**/
UINT8
KeyReadDataRegister (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
)
{
@@ -703,8 +701,8 @@ KeyReadDataRegister (
**/
VOID
KeyWriteDataRegister (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN UINT8 Data
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN UINT8 Data
)
{
IoWrite8 (ConsoleIn->DataRegisterAddress, Data);
@@ -720,7 +718,7 @@ KeyWriteDataRegister (
**/
UINT8
KeyReadStatusRegister (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
)
{
return IoRead8 (ConsoleIn->StatusRegisterAddress);
@@ -735,8 +733,8 @@ KeyReadStatusRegister (
**/
VOID
KeyWriteCommandRegister (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN UINT8 Data
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN UINT8 Data
)
{
IoWrite8 (ConsoleIn->CommandRegisterAddress, Data);
@@ -751,8 +749,8 @@ KeyWriteCommandRegister (
**/
VOID
KeyboardError (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN CHAR16 *ErrMsg
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN CHAR16 *ErrMsg
)
{
ConsoleIn->KeyboardErr = TRUE;
@@ -772,28 +770,28 @@ KeyboardError (
VOID
EFIAPI
KeyboardTimerHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- UINT8 Data;
- EFI_TPL OldTpl;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ UINT8 Data;
+ EFI_TPL OldTpl;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *) Context;
+ ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *)Context;
//
// Enter critical section
//
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
- if (((KEYBOARD_CONSOLE_IN_DEV *) Context)->KeyboardErr) {
+ if (((KEYBOARD_CONSOLE_IN_DEV *)Context)->KeyboardErr) {
//
// Leave critical section and return
//
gBS->RestoreTPL (OldTpl);
- return ;
+ return;
}
//
@@ -805,14 +803,16 @@ KeyboardTimerHandler (
//
while ((KeyReadStatusRegister (ConsoleIn) & (KEYBOARD_STATUS_REGISTER_TRANSMIT_TIMEOUT|KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA)) ==
- KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA
- ) {
+ KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA
+ )
+ {
//
// Read one byte of the scan code and store it into the memory buffer
//
Data = KeyReadDataRegister (ConsoleIn);
PushScancodeBufTail (&ConsoleIn->ScancodeQueue, Data);
}
+
KeyGetchar (ConsoleIn);
//
@@ -876,15 +876,15 @@ KeyboardRead (
**/
EFI_STATUS
KeyboardWrite (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN UINT8 Data
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN UINT8 Data
)
{
UINT32 TimeOut;
UINT32 RegEmptied;
- TimeOut = 0;
- RegEmptied = 0;
+ TimeOut = 0;
+ RegEmptied = 0;
//
// wait for input buffer empty
@@ -901,6 +901,7 @@ KeyboardWrite (
if (RegEmptied == 0) {
return EFI_TIMEOUT;
}
+
//
// Write it
//
@@ -921,15 +922,15 @@ KeyboardWrite (
**/
EFI_STATUS
KeyboardCommand (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN UINT8 Data
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN UINT8 Data
)
{
UINT32 TimeOut;
UINT32 RegEmptied;
- TimeOut = 0;
- RegEmptied = 0;
+ TimeOut = 0;
+ RegEmptied = 0;
//
// Wait For Input Buffer Empty
@@ -946,6 +947,7 @@ KeyboardCommand (
if (RegEmptied == 0) {
return EFI_TIMEOUT;
}
+
//
// issue the command
//
@@ -985,8 +987,8 @@ KeyboardCommand (
**/
EFI_STATUS
KeyboardWaitForValue (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN UINT8 Value
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN UINT8 Value
)
{
UINT8 Data;
@@ -994,9 +996,9 @@ KeyboardWaitForValue (
UINT32 SumTimeOut;
UINT32 GotIt;
- GotIt = 0;
- TimeOut = 0;
- SumTimeOut = 0;
+ GotIt = 0;
+ TimeOut = 0;
+ SumTimeOut = 0;
//
// Make sure the initial value of 'Data' is different from 'Value'
@@ -1005,6 +1007,7 @@ KeyboardWaitForValue (
if (Data == Value) {
Data = 1;
}
+
//
// Read from 8042 (multiple times if needed)
// until the expected value appears
@@ -1034,6 +1037,7 @@ KeyboardWaitForValue (
break;
}
}
+
//
// Check results
//
@@ -1042,7 +1046,6 @@ KeyboardWaitForValue (
} else {
return EFI_TIMEOUT;
}
-
}
/**
@@ -1056,7 +1059,7 @@ KeyboardWaitForValue (
**/
EFI_STATUS
UpdateStatusLights (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
)
{
EFI_STATUS Status;
@@ -1106,28 +1109,28 @@ UpdateStatusLights (
**/
VOID
InitializeKeyState (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- OUT EFI_KEY_STATE *KeyState
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ OUT EFI_KEY_STATE *KeyState
)
{
- KeyState->KeyShiftState = EFI_SHIFT_STATE_VALID
- | (ConsoleIn->LeftCtrl ? EFI_LEFT_CONTROL_PRESSED : 0)
- | (ConsoleIn->RightCtrl ? EFI_RIGHT_CONTROL_PRESSED : 0)
- | (ConsoleIn->LeftAlt ? EFI_LEFT_ALT_PRESSED : 0)
- | (ConsoleIn->RightAlt ? EFI_RIGHT_ALT_PRESSED : 0)
- | (ConsoleIn->LeftShift ? EFI_LEFT_SHIFT_PRESSED : 0)
- | (ConsoleIn->RightShift ? EFI_RIGHT_SHIFT_PRESSED : 0)
- | (ConsoleIn->LeftLogo ? EFI_LEFT_LOGO_PRESSED : 0)
- | (ConsoleIn->RightLogo ? EFI_RIGHT_LOGO_PRESSED : 0)
- | (ConsoleIn->Menu ? EFI_MENU_KEY_PRESSED : 0)
- | (ConsoleIn->SysReq ? EFI_SYS_REQ_PRESSED : 0)
- ;
+ KeyState->KeyShiftState = EFI_SHIFT_STATE_VALID
+ | (ConsoleIn->LeftCtrl ? EFI_LEFT_CONTROL_PRESSED : 0)
+ | (ConsoleIn->RightCtrl ? EFI_RIGHT_CONTROL_PRESSED : 0)
+ | (ConsoleIn->LeftAlt ? EFI_LEFT_ALT_PRESSED : 0)
+ | (ConsoleIn->RightAlt ? EFI_RIGHT_ALT_PRESSED : 0)
+ | (ConsoleIn->LeftShift ? EFI_LEFT_SHIFT_PRESSED : 0)
+ | (ConsoleIn->RightShift ? EFI_RIGHT_SHIFT_PRESSED : 0)
+ | (ConsoleIn->LeftLogo ? EFI_LEFT_LOGO_PRESSED : 0)
+ | (ConsoleIn->RightLogo ? EFI_RIGHT_LOGO_PRESSED : 0)
+ | (ConsoleIn->Menu ? EFI_MENU_KEY_PRESSED : 0)
+ | (ConsoleIn->SysReq ? EFI_SYS_REQ_PRESSED : 0)
+ ;
KeyState->KeyToggleState = EFI_TOGGLE_STATE_VALID
- | (ConsoleIn->CapsLock ? EFI_CAPS_LOCK_ACTIVE : 0)
- | (ConsoleIn->NumLock ? EFI_NUM_LOCK_ACTIVE : 0)
- | (ConsoleIn->ScrollLock ? EFI_SCROLL_LOCK_ACTIVE : 0)
- | (ConsoleIn->IsSupportPartialKey ? EFI_KEY_STATE_EXPOSED : 0)
- ;
+ | (ConsoleIn->CapsLock ? EFI_CAPS_LOCK_ACTIVE : 0)
+ | (ConsoleIn->NumLock ? EFI_NUM_LOCK_ACTIVE : 0)
+ | (ConsoleIn->ScrollLock ? EFI_SCROLL_LOCK_ACTIVE : 0)
+ | (ConsoleIn->IsSupportPartialKey ? EFI_KEY_STATE_EXPOSED : 0)
+ ;
}
/**
@@ -1140,7 +1143,7 @@ InitializeKeyState (
**/
VOID
KeyGetchar (
- IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
)
{
EFI_STATUS Status;
@@ -1154,8 +1157,8 @@ KeyGetchar (
//
// 3 bytes most
//
- UINT8 ScancodeArr[3];
- UINT32 ScancodeArrPos;
+ UINT8 ScancodeArr[3];
+ UINT32 ScancodeArrPos;
//
// Check if there are enough bytes of scancode representing a single key
@@ -1165,32 +1168,33 @@ KeyGetchar (
Extend0 = FALSE;
Extend1 = FALSE;
ScancodeArrPos = 0;
- Status = GetScancodeBufHead (&ConsoleIn->ScancodeQueue, ScancodeArrPos + 1, ScancodeArr);
+ Status = GetScancodeBufHead (&ConsoleIn->ScancodeQueue, ScancodeArrPos + 1, ScancodeArr);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
if (ScancodeArr[ScancodeArrPos] == SCANCODE_EXTENDED0) {
//
// E0 to look ahead 2 bytes
//
- Extend0 = TRUE;
+ Extend0 = TRUE;
ScancodeArrPos = 1;
Status = GetScancodeBufHead (&ConsoleIn->ScancodeQueue, ScancodeArrPos + 1, ScancodeArr);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
} else if (ScancodeArr[ScancodeArrPos] == SCANCODE_EXTENDED1) {
//
// E1 to look ahead 3 bytes
//
- Extend1 = TRUE;
+ Extend1 = TRUE;
ScancodeArrPos = 2;
Status = GetScancodeBufHead (&ConsoleIn->ScancodeQueue, ScancodeArrPos + 1, ScancodeArr);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
}
+
//
// if we reach this position, scancodes for a key is in buffer now,pop them
//
@@ -1207,115 +1211,123 @@ KeyGetchar (
// Check for special keys and update the driver state.
//
switch (ScanCode) {
+ case SCANCODE_CTRL_MAKE:
+ if (Extend0) {
+ ConsoleIn->RightCtrl = TRUE;
+ } else {
+ ConsoleIn->LeftCtrl = TRUE;
+ }
- case SCANCODE_CTRL_MAKE:
- if (Extend0) {
- ConsoleIn->RightCtrl = TRUE;
- } else {
- ConsoleIn->LeftCtrl = TRUE;
- }
- break;
- case SCANCODE_CTRL_BREAK:
- if (Extend0) {
- ConsoleIn->RightCtrl = FALSE;
- } else {
- ConsoleIn->LeftCtrl = FALSE;
- }
- break;
+ break;
+ case SCANCODE_CTRL_BREAK:
+ if (Extend0) {
+ ConsoleIn->RightCtrl = FALSE;
+ } else {
+ ConsoleIn->LeftCtrl = FALSE;
+ }
- case SCANCODE_ALT_MAKE:
+ break;
+
+ case SCANCODE_ALT_MAKE:
if (Extend0) {
ConsoleIn->RightAlt = TRUE;
} else {
- ConsoleIn->LeftAlt = TRUE;
+ ConsoleIn->LeftAlt = TRUE;
}
- break;
- case SCANCODE_ALT_BREAK:
+
+ break;
+ case SCANCODE_ALT_BREAK:
if (Extend0) {
ConsoleIn->RightAlt = FALSE;
} else {
- ConsoleIn->LeftAlt = FALSE;
+ ConsoleIn->LeftAlt = FALSE;
}
- break;
- case SCANCODE_LEFT_SHIFT_MAKE:
- //
- // To avoid recognize PRNT_SCRN key as a L_SHIFT key
- // because PRNT_SCRN key generates E0 followed by L_SHIFT scan code.
- // If it the second byte of the PRNT_ScRN skip it.
- //
- if (!Extend0) {
- ConsoleIn->LeftShift = TRUE;
break;
- }
- continue;
- case SCANCODE_LEFT_SHIFT_BREAK:
- if (!Extend0) {
- ConsoleIn->LeftShift = FALSE;
- }
- break;
+ case SCANCODE_LEFT_SHIFT_MAKE:
+ //
+ // To avoid recognize PRNT_SCRN key as a L_SHIFT key
+ // because PRNT_SCRN key generates E0 followed by L_SHIFT scan code.
+ // If it the second byte of the PRNT_ScRN skip it.
+ //
+ if (!Extend0) {
+ ConsoleIn->LeftShift = TRUE;
+ break;
+ }
- case SCANCODE_RIGHT_SHIFT_MAKE:
- ConsoleIn->RightShift = TRUE;
- break;
- case SCANCODE_RIGHT_SHIFT_BREAK:
- ConsoleIn->RightShift = FALSE;
- break;
+ continue;
- case SCANCODE_LEFT_LOGO_MAKE:
- ConsoleIn->LeftLogo = TRUE;
- break;
- case SCANCODE_LEFT_LOGO_BREAK:
- ConsoleIn->LeftLogo = FALSE;
- break;
+ case SCANCODE_LEFT_SHIFT_BREAK:
+ if (!Extend0) {
+ ConsoleIn->LeftShift = FALSE;
+ }
- case SCANCODE_RIGHT_LOGO_MAKE:
- ConsoleIn->RightLogo = TRUE;
- break;
- case SCANCODE_RIGHT_LOGO_BREAK:
- ConsoleIn->RightLogo = FALSE;
- break;
+ break;
- case SCANCODE_MENU_MAKE:
- ConsoleIn->Menu = TRUE;
- break;
- case SCANCODE_MENU_BREAK:
- ConsoleIn->Menu = FALSE;
- break;
+ case SCANCODE_RIGHT_SHIFT_MAKE:
+ ConsoleIn->RightShift = TRUE;
+ break;
+ case SCANCODE_RIGHT_SHIFT_BREAK:
+ ConsoleIn->RightShift = FALSE;
+ break;
+
+ case SCANCODE_LEFT_LOGO_MAKE:
+ ConsoleIn->LeftLogo = TRUE;
+ break;
+ case SCANCODE_LEFT_LOGO_BREAK:
+ ConsoleIn->LeftLogo = FALSE;
+ break;
+
+ case SCANCODE_RIGHT_LOGO_MAKE:
+ ConsoleIn->RightLogo = TRUE;
+ break;
+ case SCANCODE_RIGHT_LOGO_BREAK:
+ ConsoleIn->RightLogo = FALSE;
+ break;
+
+ case SCANCODE_MENU_MAKE:
+ ConsoleIn->Menu = TRUE;
+ break;
+ case SCANCODE_MENU_BREAK:
+ ConsoleIn->Menu = FALSE;
+ break;
+
+ case SCANCODE_SYS_REQ_MAKE:
+ if (Extend0) {
+ ConsoleIn->SysReq = TRUE;
+ }
+
+ break;
+ case SCANCODE_SYS_REQ_BREAK:
+ if (Extend0) {
+ ConsoleIn->SysReq = FALSE;
+ }
- case SCANCODE_SYS_REQ_MAKE:
- if (Extend0) {
+ break;
+
+ case SCANCODE_SYS_REQ_MAKE_WITH_ALT:
ConsoleIn->SysReq = TRUE;
- }
- break;
- case SCANCODE_SYS_REQ_BREAK:
- if (Extend0) {
+ break;
+ case SCANCODE_SYS_REQ_BREAK_WITH_ALT:
ConsoleIn->SysReq = FALSE;
- }
- break;
-
- case SCANCODE_SYS_REQ_MAKE_WITH_ALT:
- ConsoleIn->SysReq = TRUE;
- break;
- case SCANCODE_SYS_REQ_BREAK_WITH_ALT:
- ConsoleIn->SysReq = FALSE;
- break;
+ break;
- case SCANCODE_CAPS_LOCK_MAKE:
- ConsoleIn->CapsLock = (BOOLEAN)!ConsoleIn->CapsLock;
- UpdateStatusLights (ConsoleIn);
- break;
- case SCANCODE_NUM_LOCK_MAKE:
- ConsoleIn->NumLock = (BOOLEAN)!ConsoleIn->NumLock;
- UpdateStatusLights (ConsoleIn);
- break;
- case SCANCODE_SCROLL_LOCK_MAKE:
- if (!Extend0) {
- ConsoleIn->ScrollLock = (BOOLEAN)!ConsoleIn->ScrollLock;
+ case SCANCODE_CAPS_LOCK_MAKE:
+ ConsoleIn->CapsLock = (BOOLEAN) !ConsoleIn->CapsLock;
UpdateStatusLights (ConsoleIn);
- }
- break;
+ break;
+ case SCANCODE_NUM_LOCK_MAKE:
+ ConsoleIn->NumLock = (BOOLEAN) !ConsoleIn->NumLock;
+ UpdateStatusLights (ConsoleIn);
+ break;
+ case SCANCODE_SCROLL_LOCK_MAKE:
+ if (!Extend0) {
+ ConsoleIn->ScrollLock = (BOOLEAN) !ConsoleIn->ScrollLock;
+ UpdateStatusLights (ConsoleIn);
+ }
+
+ break;
}
}
@@ -1333,9 +1345,10 @@ KeyGetchar (
// Handle Ctrl+Alt+Del hotkey
//
if ((ConsoleIn->LeftCtrl || ConsoleIn->RightCtrl) &&
- (ConsoleIn->LeftAlt || ConsoleIn->RightAlt ) &&
- ScanCode == SCANCODE_DELETE_MAKE
- ) {
+ (ConsoleIn->LeftAlt || ConsoleIn->RightAlt) &&
+ (ScanCode == SCANCODE_DELETE_MAKE)
+ )
+ {
gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);
}
@@ -1349,34 +1362,34 @@ KeyGetchar (
//
// Key Pad "/" shares the same scancode as that of "/" except Key Pad "/" has E0 prefix
//
- if (Extend0 && ScanCode == 0x35) {
+ if (Extend0 && (ScanCode == 0x35)) {
KeyData.Key.UnicodeChar = L'/';
KeyData.Key.ScanCode = SCAN_NULL;
- //
- // PAUSE shares the same scancode as that of NUM except PAUSE has E1 prefix
- //
- } else if (Extend1 && ScanCode == SCANCODE_NUM_LOCK_MAKE) {
+ //
+ // PAUSE shares the same scancode as that of NUM except PAUSE has E1 prefix
+ //
+ } else if (Extend1 && (ScanCode == SCANCODE_NUM_LOCK_MAKE)) {
KeyData.Key.UnicodeChar = CHAR_NULL;
KeyData.Key.ScanCode = SCAN_PAUSE;
- //
- // PAUSE shares the same scancode as that of SCROLL except PAUSE (CTRL pressed) has E0 prefix
- //
- } else if (Extend0 && ScanCode == SCANCODE_SCROLL_LOCK_MAKE) {
+ //
+ // PAUSE shares the same scancode as that of SCROLL except PAUSE (CTRL pressed) has E0 prefix
+ //
+ } else if (Extend0 && (ScanCode == SCANCODE_SCROLL_LOCK_MAKE)) {
KeyData.Key.UnicodeChar = CHAR_NULL;
KeyData.Key.ScanCode = SCAN_PAUSE;
- //
- // PRNT_SCRN shares the same scancode as that of Key Pad "*" except PRNT_SCRN has E0 prefix
- //
- } else if (Extend0 && ScanCode == SCANCODE_SYS_REQ_MAKE) {
+ //
+ // PRNT_SCRN shares the same scancode as that of Key Pad "*" except PRNT_SCRN has E0 prefix
+ //
+ } else if (Extend0 && (ScanCode == SCANCODE_SYS_REQ_MAKE)) {
KeyData.Key.UnicodeChar = CHAR_NULL;
KeyData.Key.ScanCode = SCAN_NULL;
- //
- // Except the above special case, all others can be handled by convert table
- //
+ //
+ // Except the above special case, all others can be handled by convert table
+ //
} else {
for (Index = 0; ConvertKeyboardScanCodeToEfiKey[Index].ScanCode != TABLE_END; Index++) {
if (ScanCode == ConvertKeyboardScanCodeToEfiKey[Index].ScanCode) {
@@ -1384,7 +1397,8 @@ KeyGetchar (
KeyData.Key.UnicodeChar = ConvertKeyboardScanCodeToEfiKey[Index].UnicodeChar;
if ((ConsoleIn->LeftShift || ConsoleIn->RightShift) &&
- (ConvertKeyboardScanCodeToEfiKey[Index].UnicodeChar != ConvertKeyboardScanCodeToEfiKey[Index].ShiftUnicodeChar)) {
+ (ConvertKeyboardScanCodeToEfiKey[Index].UnicodeChar != ConvertKeyboardScanCodeToEfiKey[Index].ShiftUnicodeChar))
+ {
KeyData.Key.UnicodeChar = ConvertKeyboardScanCodeToEfiKey[Index].ShiftUnicodeChar;
//
// Need not return associated shift state if a class of printable characters that
@@ -1392,16 +1406,18 @@ KeyGetchar (
//
KeyData.KeyState.KeyShiftState &= ~(EFI_LEFT_SHIFT_PRESSED | EFI_RIGHT_SHIFT_PRESSED);
}
+
//
// alphabetic key is affected by CapsLock State
//
if (ConsoleIn->CapsLock) {
- if (KeyData.Key.UnicodeChar >= L'a' && KeyData.Key.UnicodeChar <= L'z') {
- KeyData.Key.UnicodeChar = (UINT16) (KeyData.Key.UnicodeChar - L'a' + L'A');
- } else if (KeyData.Key.UnicodeChar >= L'A' && KeyData.Key.UnicodeChar <= L'Z') {
- KeyData.Key.UnicodeChar = (UINT16) (KeyData.Key.UnicodeChar - L'A' + L'a');
+ if ((KeyData.Key.UnicodeChar >= L'a') && (KeyData.Key.UnicodeChar <= L'z')) {
+ KeyData.Key.UnicodeChar = (UINT16)(KeyData.Key.UnicodeChar - L'a' + L'A');
+ } else if ((KeyData.Key.UnicodeChar >= L'A') && (KeyData.Key.UnicodeChar <= L'Z')) {
+ KeyData.Key.UnicodeChar = (UINT16)(KeyData.Key.UnicodeChar - L'A' + L'a');
}
}
+
break;
}
}
@@ -1410,10 +1426,10 @@ KeyGetchar (
//
// distinguish numeric key pad keys' 'up symbol' and 'down symbol'
//
- if (ScanCode >= 0x47 && ScanCode <= 0x53) {
+ if ((ScanCode >= 0x47) && (ScanCode <= 0x53)) {
if (ConsoleIn->NumLock && !(ConsoleIn->LeftShift || ConsoleIn->RightShift) && !Extend0) {
KeyData.Key.ScanCode = SCAN_NULL;
- } else if (ScanCode != 0x4a && ScanCode != 0x4e) {
+ } else if ((ScanCode != 0x4a) && (ScanCode != 0x4e)) {
KeyData.Key.UnicodeChar = CHAR_NULL;
}
}
@@ -1421,9 +1437,9 @@ KeyGetchar (
//
// If the key can not be converted then just return.
//
- if (KeyData.Key.ScanCode == SCAN_NULL && KeyData.Key.UnicodeChar == CHAR_NULL) {
+ if ((KeyData.Key.ScanCode == SCAN_NULL) && (KeyData.Key.UnicodeChar == CHAR_NULL)) {
if (!ConsoleIn->IsSupportPartialKey) {
- return ;
+ return;
}
}
@@ -1465,28 +1481,28 @@ KeyGetchar (
**/
EFI_STATUS
InitKeyboard (
- IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN BOOLEAN ExtendedVerification
+ IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- EFI_STATUS Status1;
- UINT8 CommandByte;
- EFI_PS2_POLICY_PROTOCOL *Ps2Policy;
- UINT32 TryTime;
+ EFI_STATUS Status;
+ EFI_STATUS Status1;
+ UINT8 CommandByte;
+ EFI_PS2_POLICY_PROTOCOL *Ps2Policy;
+ UINT32 TryTime;
- Status = EFI_SUCCESS;
- mEnableMouseInterface = TRUE;
- TryTime = 0;
+ Status = EFI_SUCCESS;
+ mEnableMouseInterface = TRUE;
+ TryTime = 0;
//
// Get Ps2 policy to set this
//
gBS->LocateProtocol (
- &gEfiPs2PolicyProtocolGuid,
- NULL,
- (VOID **) &Ps2Policy
- );
+ &gEfiPs2PolicyProtocolGuid,
+ NULL,
+ (VOID **)&Ps2Policy
+ );
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
EFI_PROGRESS_CODE,
@@ -1501,8 +1517,9 @@ InitKeyboard (
if ((KeyReadStatusRegister (ConsoleIn) & KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA) != 0) {
while (!EFI_ERROR (Status) && TryTime < KEYBOARD_MAX_TRY) {
Status = KeyboardRead (ConsoleIn, &CommandByte);
- TryTime ++;
+ TryTime++;
}
+
//
// Exceed the max try times. The device may be error.
//
@@ -1511,6 +1528,7 @@ InitKeyboard (
goto Done;
}
}
+
//
// We should disable mouse interface during the initialization process
// since mouse device output could block keyboard device output in the
@@ -1544,6 +1562,7 @@ InitKeyboard (
KeyboardError (ConsoleIn, L"\n\r");
goto Done;
}
+
//
// Test the mouse enabling bit
//
@@ -1597,16 +1616,17 @@ InitKeyboard (
goto Done;
}
}
+
//
// Don't enable mouse interface later
//
mEnableMouseInterface = FALSE;
-
}
if (Ps2Policy != NULL) {
Ps2Policy->Ps2InitHardware (ConsoleIn->Handle);
}
+
//
// Write 8042 Command Byte, set System Flag
// While at the same time:
@@ -1640,10 +1660,10 @@ InitKeyboard (
//
// Clear Memory Scancode Buffer
//
- ConsoleIn->ScancodeQueue.Head = 0;
- ConsoleIn->ScancodeQueue.Tail = 0;
- ConsoleIn->EfiKeyQueue.Head = 0;
- ConsoleIn->EfiKeyQueue.Tail = 0;
+ ConsoleIn->ScancodeQueue.Head = 0;
+ ConsoleIn->ScancodeQueue.Tail = 0;
+ ConsoleIn->EfiKeyQueue.Head = 0;
+ ConsoleIn->EfiKeyQueue.Tail = 0;
ConsoleIn->EfiKeyQueueForNotify.Head = 0;
ConsoleIn->EfiKeyQueueForNotify.Tail = 0;
@@ -1692,6 +1712,7 @@ InitKeyboard (
);
goto Done;
}
+
//
// Keyboard reset with a BAT(Basic Assurance Test)
//
@@ -1706,12 +1727,13 @@ InitKeyboard (
KeyboardError (ConsoleIn, L"Some specific value not acquired from 8042 controller!\n\r");
goto Done;
}
+
//
// wait for BAT completion code
//
- mWaitForValueTimeOut = KEYBOARD_BAT_TIMEOUT;
+ mWaitForValueTimeOut = KEYBOARD_BAT_TIMEOUT;
- Status = KeyboardWaitForValue (ConsoleIn, KEYBOARD_8048_RETURN_8042_BAT_SUCCESS);
+ Status = KeyboardWaitForValue (ConsoleIn, KEYBOARD_8048_RETURN_8042_BAT_SUCCESS);
if (EFI_ERROR (Status)) {
KeyboardError (ConsoleIn, L"Keyboard self test failed!\n\r");
goto Done;
@@ -1746,43 +1768,46 @@ InitKeyboard (
goto Done;
}
- //
- // Clear Keyboard Scancode Buffer
- //
- Status = KeyboardWrite (ConsoleIn, KEYBOARD_8048_COMMAND_CLEAR_OUTPUT_DATA);
- if (EFI_ERROR (Status)) {
- KeyboardError (ConsoleIn, L"8042 controller data write error!\n\r");
- goto Done;
- }
-
- Status = KeyboardWaitForValue (ConsoleIn, KEYBOARD_8048_RETURN_8042_ACK);
- if (EFI_ERROR (Status)) {
- KeyboardError (ConsoleIn, L"Some specific value not acquired from 8042 controller!\n\r");
- goto Done;
- }
- //
- if (Ps2Policy != NULL) {
- if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_CAPSLOCK) == EFI_KEYBOARD_CAPSLOCK) {
- ConsoleIn->CapsLock = TRUE;
+ //
+ // Clear Keyboard Scancode Buffer
+ //
+ Status = KeyboardWrite (ConsoleIn, KEYBOARD_8048_COMMAND_CLEAR_OUTPUT_DATA);
+ if (EFI_ERROR (Status)) {
+ KeyboardError (ConsoleIn, L"8042 controller data write error!\n\r");
+ goto Done;
}
- if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_NUMLOCK) == EFI_KEYBOARD_NUMLOCK) {
- ConsoleIn->NumLock = TRUE;
+ Status = KeyboardWaitForValue (ConsoleIn, KEYBOARD_8048_RETURN_8042_ACK);
+ if (EFI_ERROR (Status)) {
+ KeyboardError (ConsoleIn, L"Some specific value not acquired from 8042 controller!\n\r");
+ goto Done;
}
- if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_SCROLLLOCK) == EFI_KEYBOARD_SCROLLLOCK) {
- ConsoleIn->ScrollLock = TRUE;
+ //
+ if (Ps2Policy != NULL) {
+ if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_CAPSLOCK) == EFI_KEYBOARD_CAPSLOCK) {
+ ConsoleIn->CapsLock = TRUE;
+ }
+
+ if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_NUMLOCK) == EFI_KEYBOARD_NUMLOCK) {
+ ConsoleIn->NumLock = TRUE;
+ }
+
+ if ((Ps2Policy->KeyboardLight & EFI_KEYBOARD_SCROLLLOCK) == EFI_KEYBOARD_SCROLLLOCK) {
+ ConsoleIn->ScrollLock = TRUE;
+ }
}
- }
- //
- // Update Keyboard Lights
- //
- Status = UpdateStatusLights (ConsoleIn);
- if (EFI_ERROR (Status)) {
- KeyboardError (ConsoleIn, L"Update keyboard status lights error!\n\r");
- goto Done;
+
+ //
+ // Update Keyboard Lights
+ //
+ Status = UpdateStatusLights (ConsoleIn);
+ if (EFI_ERROR (Status)) {
+ KeyboardError (ConsoleIn, L"Update keyboard status lights error!\n\r");
+ goto Done;
}
}
+
//
// At last, we can now enable the mouse interface if appropriate
//
@@ -1804,10 +1829,8 @@ Done:
} else {
return EFI_DEVICE_ERROR;
}
-
}
-
/**
Check whether there is Ps/2 Keyboard device in system by 0xF4 Keyboard Command
If Keyboard receives 0xF4, it will respond with 'ACK'. If it doesn't respond, the device
@@ -1821,11 +1844,11 @@ Done:
BOOLEAN
EFIAPI
CheckKeyboardConnect (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
)
{
- EFI_STATUS Status;
- UINTN WaitForValueTimeOutBcakup;
+ EFI_STATUS Status;
+ UINTN WaitForValueTimeOutBcakup;
//
// enable keyboard itself and wait for its ack
@@ -1840,15 +1863,16 @@ CheckKeyboardConnect (
if (EFI_ERROR (Status)) {
return FALSE;
}
+
//
// wait for 1s
//
WaitForValueTimeOutBcakup = mWaitForValueTimeOut;
- mWaitForValueTimeOut = KEYBOARD_WAITFORVALUE_TIMEOUT;
- Status = KeyboardWaitForValue (
- ConsoleIn,
- KEYBOARD_CMDECHO_ACK
- );
+ mWaitForValueTimeOut = KEYBOARD_WAITFORVALUE_TIMEOUT;
+ Status = KeyboardWaitForValue (
+ ConsoleIn,
+ KEYBOARD_CMDECHO_ACK
+ );
mWaitForValueTimeOut = WaitForValueTimeOutBcakup;
if (EFI_ERROR (Status)) {
@@ -1860,4 +1884,3 @@ CheckKeyboardConnect (
return TRUE;
}
}
-
diff --git a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c
index 835f33cfa8..b1ab17af37 100644
--- a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c
+++ b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c
@@ -7,7 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Ps2Keyboard.h"
/**
@@ -20,10 +19,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
BOOLEAN
IsEfikeyBufEmpty (
- IN EFI_KEY_QUEUE *Queue
+ IN EFI_KEY_QUEUE *Queue
)
{
- return (BOOLEAN) (Queue->Head == Queue->Tail);
+ return (BOOLEAN)(Queue->Head == Queue->Tail);
}
/**
@@ -37,19 +36,21 @@ IsEfikeyBufEmpty (
**/
EFI_STATUS
PopEfikeyBufHead (
- IN EFI_KEY_QUEUE *Queue,
- OUT EFI_KEY_DATA *KeyData OPTIONAL
+ IN EFI_KEY_QUEUE *Queue,
+ OUT EFI_KEY_DATA *KeyData OPTIONAL
)
{
if (IsEfikeyBufEmpty (Queue)) {
return EFI_NOT_READY;
}
+
//
// Retrieve and remove the values
//
if (KeyData != NULL) {
CopyMem (KeyData, &Queue->Buffer[Queue->Head], sizeof (EFI_KEY_DATA));
}
+
Queue->Head = (Queue->Head + 1) % KEYBOARD_EFI_KEY_MAX_COUNT;
return EFI_SUCCESS;
}
@@ -62,8 +63,8 @@ PopEfikeyBufHead (
**/
VOID
PushEfikeyBufTail (
- IN EFI_KEY_QUEUE *Queue,
- IN EFI_KEY_DATA *KeyData
+ IN EFI_KEY_QUEUE *Queue,
+ IN EFI_KEY_DATA *KeyData
)
{
if ((Queue->Tail + 1) % KEYBOARD_EFI_KEY_MAX_COUNT == Queue->Head) {
@@ -72,6 +73,7 @@ PushEfikeyBufTail (
//
PopEfikeyBufHead (Queue, NULL);
}
+
CopyMem (&Queue->Buffer[Queue->Tail], KeyData, sizeof (EFI_KEY_DATA));
Queue->Tail = (Queue->Tail + 1) % KEYBOARD_EFI_KEY_MAX_COUNT;
}
@@ -98,24 +100,27 @@ IsKeyRegistered (
ASSERT (RegsiteredData != NULL && InputData != NULL);
if ((RegsiteredData->Key.ScanCode != InputData->Key.ScanCode) ||
- (RegsiteredData->Key.UnicodeChar != InputData->Key.UnicodeChar)) {
+ (RegsiteredData->Key.UnicodeChar != InputData->Key.UnicodeChar))
+ {
return FALSE;
}
//
// Assume KeyShiftState/KeyToggleState = 0 in Registered key data means these state could be ignored.
//
- if (RegsiteredData->KeyState.KeyShiftState != 0 &&
- RegsiteredData->KeyState.KeyShiftState != InputData->KeyState.KeyShiftState) {
+ if ((RegsiteredData->KeyState.KeyShiftState != 0) &&
+ (RegsiteredData->KeyState.KeyShiftState != InputData->KeyState.KeyShiftState))
+ {
return FALSE;
}
- if (RegsiteredData->KeyState.KeyToggleState != 0 &&
- RegsiteredData->KeyState.KeyToggleState != InputData->KeyState.KeyToggleState) {
+
+ if ((RegsiteredData->KeyState.KeyToggleState != 0) &&
+ (RegsiteredData->KeyState.KeyToggleState != InputData->KeyState.KeyToggleState))
+ {
return FALSE;
}
return TRUE;
-
}
/**
@@ -136,13 +141,13 @@ IsKeyRegistered (
**/
EFI_STATUS
KeyboardReadKeyStrokeWorker (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev,
- OUT EFI_KEY_DATA *KeyData
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev,
+ OUT EFI_KEY_DATA *KeyData
)
{
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
if (KeyData == NULL) {
return EFI_INVALID_PARAMETER;
@@ -185,9 +190,9 @@ KeyboardEfiReset (
IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ EFI_TPL OldTpl;
ConsoleIn = KEYBOARD_CONSOLE_IN_DEV_FROM_THIS (This);
if (ConsoleIn->KeyboardErr) {
@@ -232,6 +237,7 @@ KeyboardEfiReset (
ConsoleIn->DevicePath
);
}
+
//
// Report the status If keyboard is locked
//
@@ -261,9 +267,9 @@ KeyboardReadKeyStroke (
OUT EFI_INPUT_KEY *Key
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- EFI_KEY_DATA KeyData;
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ EFI_KEY_DATA KeyData;
ConsoleIn = KEYBOARD_CONSOLE_IN_DEV_FROM_THIS (This);
@@ -280,21 +286,23 @@ KeyboardReadKeyStroke (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// If it is partial keystroke, skip it.
//
- if (KeyData.Key.ScanCode == SCAN_NULL && KeyData.Key.UnicodeChar == CHAR_NULL) {
+ if ((KeyData.Key.ScanCode == SCAN_NULL) && (KeyData.Key.UnicodeChar == CHAR_NULL)) {
continue;
}
+
//
// Translate the CTRL-Alpha characters to their corresponding control value
// (ctrl-a = 0x0001 through ctrl-Z = 0x001A)
//
if ((KeyData.KeyState.KeyShiftState & (EFI_LEFT_CONTROL_PRESSED | EFI_RIGHT_CONTROL_PRESSED)) != 0) {
- if (KeyData.Key.UnicodeChar >= L'a' && KeyData.Key.UnicodeChar <= L'z') {
- KeyData.Key.UnicodeChar = (CHAR16) (KeyData.Key.UnicodeChar - L'a' + 1);
- } else if (KeyData.Key.UnicodeChar >= L'A' && KeyData.Key.UnicodeChar <= L'Z') {
- KeyData.Key.UnicodeChar = (CHAR16) (KeyData.Key.UnicodeChar - L'A' + 1);
+ if ((KeyData.Key.UnicodeChar >= L'a') && (KeyData.Key.UnicodeChar <= L'z')) {
+ KeyData.Key.UnicodeChar = (CHAR16)(KeyData.Key.UnicodeChar - L'a' + 1);
+ } else if ((KeyData.Key.UnicodeChar >= L'A') && (KeyData.Key.UnicodeChar <= L'Z')) {
+ KeyData.Key.UnicodeChar = (CHAR16)(KeyData.Key.UnicodeChar - L'A' + 1);
}
}
@@ -314,15 +322,15 @@ KeyboardReadKeyStroke (
VOID
EFIAPI
KeyboardWaitForKey (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EFI_TPL OldTpl;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- EFI_KEY_DATA KeyData;
+ EFI_TPL OldTpl;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ EFI_KEY_DATA KeyData;
- ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *) Context;
+ ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *)Context;
//
// Enter critical section
@@ -344,10 +352,11 @@ KeyboardWaitForKey (
&(ConsoleIn->EfiKeyQueue.Buffer[ConsoleIn->EfiKeyQueue.Head]),
sizeof (EFI_KEY_DATA)
);
- if (KeyData.Key.ScanCode == SCAN_NULL && KeyData.Key.UnicodeChar == CHAR_NULL) {
+ if ((KeyData.Key.ScanCode == SCAN_NULL) && (KeyData.Key.UnicodeChar == CHAR_NULL)) {
PopEfikeyBufHead (&ConsoleIn->EfiKeyQueue, &KeyData);
continue;
}
+
//
// if there is pending value key, signal the event.
//
@@ -355,6 +364,7 @@ KeyboardWaitForKey (
break;
}
}
+
//
// Leave critical section and return
//
@@ -372,8 +382,8 @@ KeyboardWaitForKey (
VOID
EFIAPI
KeyboardWaitForKeyEx (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
@@ -399,7 +409,7 @@ KeyboardEfiResetEx (
)
{
- KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
ConsoleInDev = TEXT_INPUT_EX_KEYBOARD_CONSOLE_IN_DEV_FROM_THIS (This);
@@ -428,12 +438,12 @@ KeyboardEfiResetEx (
EFI_STATUS
EFIAPI
KeyboardReadKeyStrokeEx (
- IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
- OUT EFI_KEY_DATA *KeyData
+ IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
+ OUT EFI_KEY_DATA *KeyData
)
{
- KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
if (KeyData == NULL) {
return EFI_INVALID_PARAMETER;
@@ -465,9 +475,9 @@ KeyboardSetState (
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
+ EFI_TPL OldTpl;
if (KeyToggleState == NULL) {
return EFI_INVALID_PARAMETER;
@@ -501,12 +511,15 @@ KeyboardSetState (
if ((*KeyToggleState & EFI_SCROLL_LOCK_ACTIVE) == EFI_SCROLL_LOCK_ACTIVE) {
ConsoleInDev->ScrollLock = TRUE;
}
+
if ((*KeyToggleState & EFI_NUM_LOCK_ACTIVE) == EFI_NUM_LOCK_ACTIVE) {
ConsoleInDev->NumLock = TRUE;
}
+
if ((*KeyToggleState & EFI_CAPS_LOCK_ACTIVE) == EFI_CAPS_LOCK_ACTIVE) {
ConsoleInDev->CapsLock = TRUE;
}
+
if ((*KeyToggleState & EFI_KEY_STATE_EXPOSED) == EFI_KEY_STATE_EXPOSED) {
ConsoleInDev->IsSupportPartialKey = TRUE;
}
@@ -523,7 +536,6 @@ Exit:
gBS->RestoreTPL (OldTpl);
return Status;
-
}
/**
@@ -553,14 +565,14 @@ KeyboardRegisterKeyNotify (
OUT VOID **NotifyHandle
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
- EFI_TPL OldTpl;
- LIST_ENTRY *Link;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *NewNotify;
-
- if (KeyData == NULL || NotifyHandle == NULL || KeyNotificationFunction == NULL) {
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
+ EFI_TPL OldTpl;
+ LIST_ENTRY *Link;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *NewNotify;
+
+ if ((KeyData == NULL) || (NotifyHandle == NULL) || (KeyNotificationFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -584,7 +596,7 @@ KeyboardRegisterKeyNotify (
if (IsKeyRegistered (&CurrentNotify->KeyData, KeyData)) {
if (CurrentNotify->KeyNotificationFn == KeyNotificationFunction) {
*NotifyHandle = CurrentNotify;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
goto Exit;
}
}
@@ -593,7 +605,7 @@ KeyboardRegisterKeyNotify (
//
// Allocate resource to save the notification function
//
- NewNotify = (KEYBOARD_CONSOLE_IN_EX_NOTIFY *) AllocateZeroPool (sizeof (KEYBOARD_CONSOLE_IN_EX_NOTIFY));
+ NewNotify = (KEYBOARD_CONSOLE_IN_EX_NOTIFY *)AllocateZeroPool (sizeof (KEYBOARD_CONSOLE_IN_EX_NOTIFY));
if (NewNotify == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
@@ -604,8 +616,8 @@ KeyboardRegisterKeyNotify (
CopyMem (&NewNotify->KeyData, KeyData, sizeof (EFI_KEY_DATA));
InsertTailList (&ConsoleInDev->NotifyList, &NewNotify->NotifyEntry);
- *NotifyHandle = NewNotify;
- Status = EFI_SUCCESS;
+ *NotifyHandle = NewNotify;
+ Status = EFI_SUCCESS;
Exit:
//
@@ -613,7 +625,6 @@ Exit:
//
gBS->RestoreTPL (OldTpl);
return Status;
-
}
/**
@@ -634,11 +645,11 @@ KeyboardUnregisterKeyNotify (
IN VOID *NotificationHandle
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
- EFI_TPL OldTpl;
- LIST_ENTRY *Link;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleInDev;
+ EFI_TPL OldTpl;
+ LIST_ENTRY *Link;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
if (NotificationHandle == NULL) {
return EFI_INVALID_PARAMETER;
@@ -691,19 +702,19 @@ Exit:
VOID
EFIAPI
KeyNotifyProcessHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EFI_STATUS Status;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- EFI_KEY_DATA KeyData;
- LIST_ENTRY *Link;
- LIST_ENTRY *NotifyList;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ EFI_KEY_DATA KeyData;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NotifyList;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ EFI_TPL OldTpl;
- ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *) Context;
+ ConsoleIn = (KEYBOARD_CONSOLE_IN_DEV *)Context;
//
// Invoke notification functions.
@@ -722,6 +733,7 @@ KeyNotifyProcessHandler (
if (EFI_ERROR (Status)) {
break;
}
+
for (Link = GetFirstNode (NotifyList); !IsNull (NotifyList, Link); Link = GetNextNode (NotifyList, Link)) {
CurrentNotify = CR (Link, KEYBOARD_CONSOLE_IN_EX_NOTIFY, NotifyEntry, KEYBOARD_CONSOLE_IN_EX_NOTIFY_SIGNATURE);
if (IsKeyRegistered (&CurrentNotify->KeyData, &KeyData)) {
@@ -730,4 +742,3 @@ KeyNotifyProcessHandler (
}
}
}
-
diff --git a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.c b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.c
index 855fda742e..a328931f59 100644
--- a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.c
+++ b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.c
@@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Function prototypes
//
+
/**
Test controller is a keyboard Controller.
@@ -26,9 +27,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_STATUS
EFIAPI
KbdControllerDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -43,9 +44,9 @@ KbdControllerDriverSupported (
EFI_STATUS
EFIAPI
KbdControllerDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -65,10 +66,10 @@ KbdControllerDriverStart (
EFI_STATUS
EFIAPI
KbdControllerDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -81,13 +82,13 @@ KbdControllerDriverStop (
**/
EFI_STATUS
KbdFreeNotifyList (
- IN OUT LIST_ENTRY *ListHead
+ IN OUT LIST_ENTRY *ListHead
);
//
// DriverBinding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gKeyboardControllerDriver = {
+EFI_DRIVER_BINDING_PROTOCOL gKeyboardControllerDriver = {
KbdControllerDriverSupported,
KbdControllerDriverStart,
KbdControllerDriverStop,
@@ -109,15 +110,15 @@ EFI_DRIVER_BINDING_PROTOCOL gKeyboardControllerDriver = {
EFI_STATUS
EFIAPI
KbdControllerDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_SIO_PROTOCOL *Sio;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- ACPI_HID_DEVICE_PATH *Acpi;
+ EFI_STATUS Status;
+ EFI_SIO_PROTOCOL *Sio;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ ACPI_HID_DEVICE_PATH *Acpi;
//
// Check whether the controller is keyboard.
@@ -125,7 +126,7 @@ KbdControllerDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -135,16 +136,17 @@ KbdControllerDriverSupported (
}
do {
- Acpi = (ACPI_HID_DEVICE_PATH *) DevicePath;
+ Acpi = (ACPI_HID_DEVICE_PATH *)DevicePath;
DevicePath = NextDevicePathNode (DevicePath);
} while (!IsDevicePathEnd (DevicePath));
- if (DevicePathType (Acpi) != ACPI_DEVICE_PATH ||
- (DevicePathSubType (Acpi) != ACPI_DP && DevicePathSubType (Acpi) != ACPI_EXTENDED_DP)) {
+ if ((DevicePathType (Acpi) != ACPI_DEVICE_PATH) ||
+ ((DevicePathSubType (Acpi) != ACPI_DP) && (DevicePathSubType (Acpi) != ACPI_EXTENDED_DP)))
+ {
return EFI_UNSUPPORTED;
}
- if (Acpi->HID != EISA_PNP_ID (0x303) || Acpi->UID != 0) {
+ if ((Acpi->HID != EISA_PNP_ID (0x303)) || (Acpi->UID != 0)) {
return EFI_UNSUPPORTED;
}
@@ -154,7 +156,7 @@ KbdControllerDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiSioProtocolGuid,
- (VOID **) &Sio,
+ (VOID **)&Sio,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -188,25 +190,25 @@ KbdControllerDriverSupported (
EFI_STATUS
EFIAPI
KbdControllerDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_STATUS Status1;
- EFI_SIO_PROTOCOL *Sio;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- UINT8 Data;
- EFI_STATUS_CODE_VALUE StatusCode;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STATUS Status;
+ EFI_STATUS Status1;
+ EFI_SIO_PROTOCOL *Sio;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ UINT8 Data;
+ EFI_STATUS_CODE_VALUE StatusCode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
StatusCode = 0;
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,6 +216,7 @@ KbdControllerDriverStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Report that the keyboard is being enabled
//
@@ -229,7 +232,7 @@ KbdControllerDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiSioProtocolGuid,
- (VOID **) &Sio,
+ (VOID **)&Sio,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -237,15 +240,17 @@ KbdControllerDriverStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Allocate private data
//
ConsoleIn = AllocateZeroPool (sizeof (KEYBOARD_CONSOLE_IN_DEV));
if (ConsoleIn == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
+
//
// Setup the device instance
//
@@ -283,8 +288,8 @@ KbdControllerDriverStart (
// If nobody decodes KBC I/O port, it will read back as 0xFF.
// Check the Time-Out and Parity bit to see if it has an active KBC in system
//
- Status = EFI_DEVICE_ERROR;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED;
+ Status = EFI_DEVICE_ERROR;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED;
goto ErrorExit;
}
}
@@ -300,10 +305,11 @@ KbdControllerDriverStart (
&((ConsoleIn->ConIn).WaitForKey)
);
if (EFI_ERROR (Status)) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
+
//
// Setup the WaitForKeyEx event
//
@@ -315,10 +321,11 @@ KbdControllerDriverStart (
&(ConsoleIn->ConInEx.WaitForKeyEx)
);
if (EFI_ERROR (Status)) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
+
// Setup a periodic timer, used for reading keystrokes at a fixed interval
//
Status = gBS->CreateEvent (
@@ -329,8 +336,8 @@ KbdControllerDriverStart (
&ConsoleIn->TimerEvent
);
if (EFI_ERROR (Status)) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
@@ -340,8 +347,8 @@ KbdControllerDriverStart (
KEYBOARD_TIMER_INTERVAL
);
if (EFI_ERROR (Status)) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
@@ -353,8 +360,8 @@ KbdControllerDriverStart (
&ConsoleIn->KeyNotifyProcessEvent
);
if (EFI_ERROR (Status)) {
- Status = EFI_OUT_OF_RESOURCES;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
+ Status = EFI_OUT_OF_RESOURCES;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR;
goto ErrorExit;
}
@@ -369,8 +376,8 @@ KbdControllerDriverStart (
//
Status = ConsoleIn->ConInEx.Reset (&ConsoleIn->ConInEx, FeaturePcdGet (PcdPs2KbdExtendedVerification));
if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
- StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED;
+ Status = EFI_DEVICE_ERROR;
+ StatusCode = EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED;
goto ErrorExit;
}
@@ -396,7 +403,6 @@ KbdControllerDriverStart (
FALSE
);
-
//
// Install protocol interfaces for the keyboard device.
//
@@ -434,16 +440,20 @@ ErrorExit:
if ((ConsoleIn != NULL) && (ConsoleIn->TimerEvent != NULL)) {
gBS->CloseEvent (ConsoleIn->TimerEvent);
}
+
if ((ConsoleIn != NULL) && (ConsoleIn->ConInEx.WaitForKeyEx != NULL)) {
gBS->CloseEvent (ConsoleIn->ConInEx.WaitForKeyEx);
}
+
if ((ConsoleIn != NULL) && (ConsoleIn->KeyNotifyProcessEvent != NULL)) {
gBS->CloseEvent (ConsoleIn->KeyNotifyProcessEvent);
}
+
KbdFreeNotifyList (&ConsoleIn->NotifyList);
if ((ConsoleIn != NULL) && (ConsoleIn->ControllerNameTable != NULL)) {
FreeUnicodeStringTable (ConsoleIn->ControllerNameTable);
}
+
//
// Since there will be no timer handler for keyboard input any more,
// exhaust input data just in case there is still keyboard data left
@@ -451,7 +461,7 @@ ErrorExit:
if (ConsoleIn != NULL) {
Status1 = EFI_SUCCESS;
while (!EFI_ERROR (Status1) && (Status != EFI_DEVICE_ERROR)) {
- Status1 = KeyboardRead (ConsoleIn, &Data);;
+ Status1 = KeyboardRead (ConsoleIn, &Data);
}
}
@@ -486,16 +496,16 @@ ErrorExit:
EFI_STATUS
EFIAPI
KbdControllerDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
- KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
- UINT8 Data;
+ EFI_STATUS Status;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
+ KEYBOARD_CONSOLE_IN_DEV *ConsoleIn;
+ UINT8 Data;
//
// Disable Keyboard
@@ -503,7 +513,7 @@ KbdControllerDriverStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiSimpleTextInProtocolGuid,
- (VOID **) &ConIn,
+ (VOID **)&ConIn,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -511,6 +521,7 @@ KbdControllerDriverStop (
if (EFI_ERROR (Status)) {
return Status;
}
+
Status = gBS->OpenProtocol (
Controller,
&gEfiSimpleTextInputExProtocolGuid,
@@ -545,8 +556,9 @@ KbdControllerDriverStop (
//
Status = EFI_SUCCESS;
while (!EFI_ERROR (Status)) {
- Status = KeyboardRead (ConsoleIn, &Data);;
+ Status = KeyboardRead (ConsoleIn, &Data);
}
+
//
// Uninstall the SimpleTextIn and SimpleTextInEx protocols
//
@@ -576,14 +588,17 @@ KbdControllerDriverStop (
gBS->CloseEvent ((ConsoleIn->ConIn).WaitForKey);
(ConsoleIn->ConIn).WaitForKey = NULL;
}
+
if (ConsoleIn->ConInEx.WaitForKeyEx != NULL) {
gBS->CloseEvent (ConsoleIn->ConInEx.WaitForKeyEx);
ConsoleIn->ConInEx.WaitForKeyEx = NULL;
}
+
if (ConsoleIn->KeyNotifyProcessEvent != NULL) {
gBS->CloseEvent (ConsoleIn->KeyNotifyProcessEvent);
ConsoleIn->KeyNotifyProcessEvent = NULL;
}
+
KbdFreeNotifyList (&ConsoleIn->NotifyList);
FreeUnicodeStringTable (ConsoleIn->ControllerNameTable);
gBS->FreePool (ConsoleIn);
@@ -601,14 +616,15 @@ KbdControllerDriverStop (
**/
EFI_STATUS
KbdFreeNotifyList (
- IN OUT LIST_ENTRY *ListHead
+ IN OUT LIST_ENTRY *ListHead
)
{
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *NotifyNode;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *NotifyNode;
if (ListHead == NULL) {
return EFI_INVALID_PARAMETER;
}
+
while (!IsListEmpty (ListHead)) {
NotifyNode = CR (
ListHead->ForwardLink,
@@ -635,12 +651,12 @@ KbdFreeNotifyList (
**/
EFI_STATUS
EFIAPI
-InitializePs2Keyboard(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializePs2Keyboard (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -655,7 +671,5 @@ InitializePs2Keyboard(
);
ASSERT_EFI_ERROR (Status);
-
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h
index c2762db038..ca1dd9b2c2 100644
--- a/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h
+++ b/MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h
@@ -41,79 +41,79 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gPs2KeyboardComponentName2;
//
// Driver Private Data
//
-#define KEYBOARD_CONSOLE_IN_DEV_SIGNATURE SIGNATURE_32 ('k', 'k', 'e', 'y')
-#define KEYBOARD_CONSOLE_IN_EX_NOTIFY_SIGNATURE SIGNATURE_32 ('k', 'c', 'e', 'n')
+#define KEYBOARD_CONSOLE_IN_DEV_SIGNATURE SIGNATURE_32 ('k', 'k', 'e', 'y')
+#define KEYBOARD_CONSOLE_IN_EX_NOTIFY_SIGNATURE SIGNATURE_32 ('k', 'c', 'e', 'n')
typedef struct _KEYBOARD_CONSOLE_IN_EX_NOTIFY {
- UINTN Signature;
- EFI_KEY_DATA KeyData;
- EFI_KEY_NOTIFY_FUNCTION KeyNotificationFn;
- LIST_ENTRY NotifyEntry;
+ UINTN Signature;
+ EFI_KEY_DATA KeyData;
+ EFI_KEY_NOTIFY_FUNCTION KeyNotificationFn;
+ LIST_ENTRY NotifyEntry;
} KEYBOARD_CONSOLE_IN_EX_NOTIFY;
#define KEYBOARD_SCAN_CODE_MAX_COUNT 32
typedef struct {
- UINT8 Buffer[KEYBOARD_SCAN_CODE_MAX_COUNT];
- UINTN Head;
- UINTN Tail;
+ UINT8 Buffer[KEYBOARD_SCAN_CODE_MAX_COUNT];
+ UINTN Head;
+ UINTN Tail;
} SCAN_CODE_QUEUE;
-#define KEYBOARD_EFI_KEY_MAX_COUNT 256
+#define KEYBOARD_EFI_KEY_MAX_COUNT 256
typedef struct {
- EFI_KEY_DATA Buffer[KEYBOARD_EFI_KEY_MAX_COUNT];
- UINTN Head;
- UINTN Tail;
+ EFI_KEY_DATA Buffer[KEYBOARD_EFI_KEY_MAX_COUNT];
+ UINTN Head;
+ UINTN Tail;
} EFI_KEY_QUEUE;
typedef struct {
- UINTN Signature;
-
- EFI_HANDLE Handle;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL ConIn;
- EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL ConInEx;
-
- EFI_EVENT TimerEvent;
-
- UINT32 DataRegisterAddress;
- UINT32 StatusRegisterAddress;
- UINT32 CommandRegisterAddress;
-
- BOOLEAN LeftCtrl;
- BOOLEAN RightCtrl;
- BOOLEAN LeftAlt;
- BOOLEAN RightAlt;
- BOOLEAN LeftShift;
- BOOLEAN RightShift;
- BOOLEAN LeftLogo;
- BOOLEAN RightLogo;
- BOOLEAN Menu;
- BOOLEAN SysReq;
-
- BOOLEAN CapsLock;
- BOOLEAN NumLock;
- BOOLEAN ScrollLock;
-
- BOOLEAN IsSupportPartialKey;
+ UINTN Signature;
+
+ EFI_HANDLE Handle;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL ConIn;
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL ConInEx;
+
+ EFI_EVENT TimerEvent;
+
+ UINT32 DataRegisterAddress;
+ UINT32 StatusRegisterAddress;
+ UINT32 CommandRegisterAddress;
+
+ BOOLEAN LeftCtrl;
+ BOOLEAN RightCtrl;
+ BOOLEAN LeftAlt;
+ BOOLEAN RightAlt;
+ BOOLEAN LeftShift;
+ BOOLEAN RightShift;
+ BOOLEAN LeftLogo;
+ BOOLEAN RightLogo;
+ BOOLEAN Menu;
+ BOOLEAN SysReq;
+
+ BOOLEAN CapsLock;
+ BOOLEAN NumLock;
+ BOOLEAN ScrollLock;
+
+ BOOLEAN IsSupportPartialKey;
//
// Queue storing key scancodes
//
- SCAN_CODE_QUEUE ScancodeQueue;
- EFI_KEY_QUEUE EfiKeyQueue;
- EFI_KEY_QUEUE EfiKeyQueueForNotify;
+ SCAN_CODE_QUEUE ScancodeQueue;
+ EFI_KEY_QUEUE EfiKeyQueue;
+ EFI_KEY_QUEUE EfiKeyQueueForNotify;
//
// Error state
//
- BOOLEAN KeyboardErr;
+ BOOLEAN KeyboardErr;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
//
// Notification Function List
//
- LIST_ENTRY NotifyList;
- EFI_EVENT KeyNotifyProcessEvent;
+ LIST_ENTRY NotifyList;
+ EFI_EVENT KeyNotifyProcessEvent;
} KEYBOARD_CONSOLE_IN_DEV;
#define KEYBOARD_CONSOLE_IN_DEV_FROM_THIS(a) CR (a, KEYBOARD_CONSOLE_IN_DEV, ConIn, KEYBOARD_CONSOLE_IN_DEV_SIGNATURE)
@@ -124,11 +124,12 @@ typedef struct {
KEYBOARD_CONSOLE_IN_DEV_SIGNATURE \
)
-#define TABLE_END 0x0
+#define TABLE_END 0x0
//
// Driver entry point
//
+
/**
The user Entry Point for module Ps2Keyboard. The user code starts with this function.
@@ -142,58 +143,57 @@ typedef struct {
EFI_STATUS
EFIAPI
InstallPs2KeyboardDriver (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
);
#define KEYBOARD_8042_DATA_REGISTER 0x60
#define KEYBOARD_8042_STATUS_REGISTER 0x64
#define KEYBOARD_8042_COMMAND_REGISTER 0x64
-#define KEYBOARD_KBEN 0xF4
-#define KEYBOARD_CMDECHO_ACK 0xFA
-
-#define KEYBOARD_MAX_TRY 256 // 256
-#define KEYBOARD_TIMEOUT 65536 // 0.07s
-#define KEYBOARD_WAITFORVALUE_TIMEOUT 1000000 // 1s
-#define KEYBOARD_BAT_TIMEOUT 4000000 // 4s
-#define KEYBOARD_TIMER_INTERVAL 200000 // 0.02s
-#define SCANCODE_EXTENDED0 0xE0
-#define SCANCODE_EXTENDED1 0xE1
-#define SCANCODE_CTRL_MAKE 0x1D
-#define SCANCODE_CTRL_BREAK 0x9D
-#define SCANCODE_ALT_MAKE 0x38
-#define SCANCODE_ALT_BREAK 0xB8
-#define SCANCODE_LEFT_SHIFT_MAKE 0x2A
-#define SCANCODE_LEFT_SHIFT_BREAK 0xAA
-#define SCANCODE_RIGHT_SHIFT_MAKE 0x36
-#define SCANCODE_RIGHT_SHIFT_BREAK 0xB6
-#define SCANCODE_CAPS_LOCK_MAKE 0x3A
-#define SCANCODE_NUM_LOCK_MAKE 0x45
-#define SCANCODE_SCROLL_LOCK_MAKE 0x46
-#define SCANCODE_DELETE_MAKE 0x53
-#define SCANCODE_LEFT_LOGO_MAKE 0x5B //GUI key defined in Keyboard scan code
-#define SCANCODE_LEFT_LOGO_BREAK 0xDB
-#define SCANCODE_RIGHT_LOGO_MAKE 0x5C
-#define SCANCODE_RIGHT_LOGO_BREAK 0xDC
-#define SCANCODE_MENU_MAKE 0x5D //APPS key defined in Keyboard scan code
-#define SCANCODE_MENU_BREAK 0xDD
-#define SCANCODE_SYS_REQ_MAKE 0x37
-#define SCANCODE_SYS_REQ_BREAK 0xB7
-#define SCANCODE_SYS_REQ_MAKE_WITH_ALT 0x54
-#define SCANCODE_SYS_REQ_BREAK_WITH_ALT 0xD4
-
-#define SCANCODE_MAX_MAKE 0x60
-
-
-#define KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA BIT0 ///< 0 - Output register has no data; 1 - Output register has data
-#define KEYBOARD_STATUS_REGISTER_HAS_INPUT_DATA BIT1 ///< 0 - Input register has no data; 1 - Input register has data
-#define KEYBOARD_STATUS_REGISTER_SYSTEM_FLAG BIT2 ///< Set to 0 after power on reset
-#define KEYBOARD_STATUS_REGISTER_INPUT_DATA_TYPE BIT3 ///< 0 - Data in input register is data; 1 - Data in input register is command
-#define KEYBOARD_STATUS_REGISTER_ENABLE_FLAG BIT4 ///< 0 - Keyboard is disable; 1 - Keyboard is enable
-#define KEYBOARD_STATUS_REGISTER_TRANSMIT_TIMEOUT BIT5 ///< 0 - Transmit is complete without timeout; 1 - Transmit is timeout without complete
-#define KEYBOARD_STATUS_REGISTER_RECEIVE_TIMEOUT BIT6 ///< 0 - Receive is complete without timeout; 1 - Receive is timeout without complete
-#define KEYBOARD_STATUS_REGISTER_PARITY BIT7 ///< 0 - Odd parity; 1 - Even parity
+#define KEYBOARD_KBEN 0xF4
+#define KEYBOARD_CMDECHO_ACK 0xFA
+
+#define KEYBOARD_MAX_TRY 256 // 256
+#define KEYBOARD_TIMEOUT 65536 // 0.07s
+#define KEYBOARD_WAITFORVALUE_TIMEOUT 1000000 // 1s
+#define KEYBOARD_BAT_TIMEOUT 4000000 // 4s
+#define KEYBOARD_TIMER_INTERVAL 200000 // 0.02s
+#define SCANCODE_EXTENDED0 0xE0
+#define SCANCODE_EXTENDED1 0xE1
+#define SCANCODE_CTRL_MAKE 0x1D
+#define SCANCODE_CTRL_BREAK 0x9D
+#define SCANCODE_ALT_MAKE 0x38
+#define SCANCODE_ALT_BREAK 0xB8
+#define SCANCODE_LEFT_SHIFT_MAKE 0x2A
+#define SCANCODE_LEFT_SHIFT_BREAK 0xAA
+#define SCANCODE_RIGHT_SHIFT_MAKE 0x36
+#define SCANCODE_RIGHT_SHIFT_BREAK 0xB6
+#define SCANCODE_CAPS_LOCK_MAKE 0x3A
+#define SCANCODE_NUM_LOCK_MAKE 0x45
+#define SCANCODE_SCROLL_LOCK_MAKE 0x46
+#define SCANCODE_DELETE_MAKE 0x53
+#define SCANCODE_LEFT_LOGO_MAKE 0x5B// GUI key defined in Keyboard scan code
+#define SCANCODE_LEFT_LOGO_BREAK 0xDB
+#define SCANCODE_RIGHT_LOGO_MAKE 0x5C
+#define SCANCODE_RIGHT_LOGO_BREAK 0xDC
+#define SCANCODE_MENU_MAKE 0x5D// APPS key defined in Keyboard scan code
+#define SCANCODE_MENU_BREAK 0xDD
+#define SCANCODE_SYS_REQ_MAKE 0x37
+#define SCANCODE_SYS_REQ_BREAK 0xB7
+#define SCANCODE_SYS_REQ_MAKE_WITH_ALT 0x54
+#define SCANCODE_SYS_REQ_BREAK_WITH_ALT 0xD4
+
+#define SCANCODE_MAX_MAKE 0x60
+
+#define KEYBOARD_STATUS_REGISTER_HAS_OUTPUT_DATA BIT0 ///< 0 - Output register has no data; 1 - Output register has data
+#define KEYBOARD_STATUS_REGISTER_HAS_INPUT_DATA BIT1 ///< 0 - Input register has no data; 1 - Input register has data
+#define KEYBOARD_STATUS_REGISTER_SYSTEM_FLAG BIT2 ///< Set to 0 after power on reset
+#define KEYBOARD_STATUS_REGISTER_INPUT_DATA_TYPE BIT3 ///< 0 - Data in input register is data; 1 - Data in input register is command
+#define KEYBOARD_STATUS_REGISTER_ENABLE_FLAG BIT4 ///< 0 - Keyboard is disable; 1 - Keyboard is enable
+#define KEYBOARD_STATUS_REGISTER_TRANSMIT_TIMEOUT BIT5 ///< 0 - Transmit is complete without timeout; 1 - Transmit is timeout without complete
+#define KEYBOARD_STATUS_REGISTER_RECEIVE_TIMEOUT BIT6 ///< 0 - Receive is complete without timeout; 1 - Receive is timeout without complete
+#define KEYBOARD_STATUS_REGISTER_PARITY BIT7 ///< 0 - Odd parity; 1 - Even parity
#define KEYBOARD_8042_COMMAND_READ 0x20
#define KEYBOARD_8042_COMMAND_WRITE 0x60
@@ -203,14 +203,13 @@ InstallPs2KeyboardDriver (
#define KEYBOARD_8042_COMMAND_KEYBOARD_INTERFACE_SELF_TEST 0xAB
#define KEYBOARD_8042_COMMAND_DISABLE_KEYBOARD_INTERFACE 0xAD
-#define KEYBOARD_8048_COMMAND_CLEAR_OUTPUT_DATA 0xF4
-#define KEYBOARD_8048_COMMAND_RESET 0xFF
-#define KEYBOARD_8048_COMMAND_SELECT_SCAN_CODE_SET 0xF0
-
-#define KEYBOARD_8048_RETURN_8042_BAT_SUCCESS 0xAA
-#define KEYBOARD_8048_RETURN_8042_BAT_ERROR 0xFC
-#define KEYBOARD_8048_RETURN_8042_ACK 0xFA
+#define KEYBOARD_8048_COMMAND_CLEAR_OUTPUT_DATA 0xF4
+#define KEYBOARD_8048_COMMAND_RESET 0xFF
+#define KEYBOARD_8048_COMMAND_SELECT_SCAN_CODE_SET 0xF0
+#define KEYBOARD_8048_RETURN_8042_BAT_SUCCESS 0xAA
+#define KEYBOARD_8048_RETURN_8042_BAT_ERROR 0xFC
+#define KEYBOARD_8048_RETURN_8042_ACK 0xFA
//
// Keyboard Controller Status
@@ -221,6 +220,7 @@ InstallPs2KeyboardDriver (
//
// Other functions that are used among .c files
//
+
/**
Show keyboard status lights according to
indicators in ConsoleIn.
@@ -232,7 +232,7 @@ InstallPs2KeyboardDriver (
**/
EFI_STATUS
UpdateStatusLights (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
);
/**
@@ -261,7 +261,7 @@ KeyboardRead (
**/
VOID
KeyGetchar (
- IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
);
/**
@@ -273,8 +273,8 @@ KeyGetchar (
VOID
EFIAPI
KeyNotifyProcessHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -290,11 +290,10 @@ KeyNotifyProcessHandler (
**/
EFI_STATUS
InitKeyboard (
- IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- IN BOOLEAN ExtendedVerification
+ IN OUT KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ IN BOOLEAN ExtendedVerification
);
-
/**
Timer event handler: read a series of scancodes from 8042
and put them into memory scancode buffer.
@@ -309,8 +308,8 @@ InitKeyboard (
VOID
EFIAPI
KeyboardTimerHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -358,8 +357,8 @@ KeyboardReadKeyStroke (
VOID
EFIAPI
KeyboardWaitForKey (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -372,7 +371,7 @@ KeyboardWaitForKey (
**/
UINT8
KeyReadStatusRegister (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
);
/**
@@ -388,7 +387,7 @@ KeyReadStatusRegister (
BOOLEAN
EFIAPI
CheckKeyboardConnect (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn
);
/**
@@ -402,8 +401,8 @@ CheckKeyboardConnect (
VOID
EFIAPI
KeyboardWaitForKeyEx (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
//
@@ -447,8 +446,8 @@ KeyboardEfiResetEx (
EFI_STATUS
EFIAPI
KeyboardReadKeyStrokeEx (
- IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
- OUT EFI_KEY_DATA *KeyData
+ IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
+ OUT EFI_KEY_DATA *KeyData
);
/**
@@ -526,8 +525,8 @@ KeyboardUnregisterKeyNotify (
**/
VOID
PushEfikeyBufTail (
- IN EFI_KEY_QUEUE *Queue,
- IN EFI_KEY_DATA *KeyData
+ IN EFI_KEY_QUEUE *Queue,
+ IN EFI_KEY_DATA *KeyData
);
/**
@@ -556,8 +555,8 @@ IsKeyRegistered (
**/
VOID
InitializeKeyState (
- IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
- OUT EFI_KEY_STATE *KeyState
+ IN KEYBOARD_CONSOLE_IN_DEV *ConsoleIn,
+ OUT EFI_KEY_STATE *KeyState
);
#endif
diff --git a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.c b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.c
index d8fed87c16..d31665c25d 100644
--- a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.c
+++ b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.c
@@ -9,9 +9,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ps2Mouse.h"
#include "CommPs2.h"
-UINT8 SampleRateTbl[MaxSampleRate] = { 0xa, 0x14, 0x28, 0x3c, 0x50, 0x64, 0xc8 };
+UINT8 SampleRateTbl[MaxSampleRate] = { 0xa, 0x14, 0x28, 0x3c, 0x50, 0x64, 0xc8 };
-UINT8 ResolutionTbl[MaxResolution] = { 0, 1, 2, 3 };
+UINT8 ResolutionTbl[MaxResolution] = { 0, 1, 2, 3 };
/**
Issue self test command via IsaIo interface.
@@ -34,6 +34,7 @@ KbcSelfTest (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Read return code
//
@@ -45,6 +46,7 @@ KbcSelfTest (
if (Data != 0x55) {
return EFI_DEVICE_ERROR;
}
+
//
// Set system flag
//
@@ -63,7 +65,7 @@ KbcSelfTest (
return Status;
}
- Data |= CMD_SYS_FLAG;
+ Data |= CMD_SYS_FLAG;
Status = Out8042Data (Data);
if (EFI_ERROR (Status)) {
return Status;
@@ -149,7 +151,7 @@ KbcDisableKb (
**/
EFI_STATUS
CheckKbStatus (
- OUT BOOLEAN *KeyboardEnable
+ OUT BOOLEAN *KeyboardEnable
)
{
EFI_STATUS Status;
@@ -167,6 +169,7 @@ CheckKbStatus (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check keyboard enable or not
//
@@ -201,6 +204,7 @@ PS2MouseReset (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check BAT Complete Code
//
@@ -212,6 +216,7 @@ PS2MouseReset (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check BAT Complete Code
//
@@ -231,7 +236,7 @@ PS2MouseReset (
**/
EFI_STATUS
PS2MouseSetSampleRate (
- IN MOUSE_SR SampleRate
+ IN MOUSE_SR SampleRate
)
{
EFI_STATUS Status;
@@ -258,7 +263,7 @@ PS2MouseSetSampleRate (
**/
EFI_STATUS
PS2MouseSetResolution (
- IN MOUSE_RE Resolution
+ IN MOUSE_RE Resolution
)
{
EFI_STATUS Status;
@@ -285,7 +290,7 @@ PS2MouseSetResolution (
**/
EFI_STATUS
PS2MouseSetScaling (
- IN MOUSE_SF Scaling
+ IN MOUSE_SF Scaling
)
{
//
@@ -321,7 +326,7 @@ PS2MouseEnable (
**/
EFI_STATUS
PS2MouseGetPacket (
- PS2_MOUSE_DEV *MouseDev
+ PS2_MOUSE_DEV *MouseDev
)
{
@@ -336,111 +341,112 @@ PS2MouseGetPacket (
BOOLEAN LButton;
BOOLEAN RButton;
- KeyboardEnable = FALSE;
- State = PS2_READ_BYTE_ONE;
+ KeyboardEnable = FALSE;
+ State = PS2_READ_BYTE_ONE;
//
// State machine to get mouse packet
//
while (1) {
-
switch (State) {
- case PS2_READ_BYTE_ONE:
- //
- // Read mouse first byte data, if failed, immediately return
- //
- KbcDisableAux ();
- Count = 1;
- Status = PS2MouseRead (&Data, &Count, State);
- if (EFI_ERROR (Status)) {
- KbcEnableAux ();
- return EFI_NOT_READY;
- }
-
- if (Count != 1) {
- KbcEnableAux ();
- return EFI_NOT_READY;
- }
-
- if (IS_PS2_SYNC_BYTE (Data)) {
- Packet[0] = Data;
- State = PS2_READ_DATA_BYTE;
-
- CheckKbStatus (&KeyboardEnable);
- KbcDisableKb ();
- KbcEnableAux ();
- }
- break;
+ case PS2_READ_BYTE_ONE:
+ //
+ // Read mouse first byte data, if failed, immediately return
+ //
+ KbcDisableAux ();
+ Count = 1;
+ Status = PS2MouseRead (&Data, &Count, State);
+ if (EFI_ERROR (Status)) {
+ KbcEnableAux ();
+ return EFI_NOT_READY;
+ }
- case PS2_READ_DATA_BYTE:
- Count = 2;
- Status = PS2MouseRead ((Packet + 1), &Count, State);
- if (EFI_ERROR (Status)) {
- if (KeyboardEnable) {
- KbcEnableKb ();
+ if (Count != 1) {
+ KbcEnableAux ();
+ return EFI_NOT_READY;
+ }
+
+ if (IS_PS2_SYNC_BYTE (Data)) {
+ Packet[0] = Data;
+ State = PS2_READ_DATA_BYTE;
+
+ CheckKbStatus (&KeyboardEnable);
+ KbcDisableKb ();
+ KbcEnableAux ();
+ }
+
+ break;
+
+ case PS2_READ_DATA_BYTE:
+ Count = 2;
+ Status = PS2MouseRead ((Packet + 1), &Count, State);
+ if (EFI_ERROR (Status)) {
+ if (KeyboardEnable) {
+ KbcEnableKb ();
+ }
+
+ return EFI_NOT_READY;
+ }
+
+ if (Count != 2) {
+ if (KeyboardEnable) {
+ KbcEnableKb ();
+ }
+
+ return EFI_NOT_READY;
}
- return EFI_NOT_READY;
- }
+ State = PS2_PROCESS_PACKET;
+ break;
- if (Count != 2) {
+ case PS2_PROCESS_PACKET:
if (KeyboardEnable) {
KbcEnableKb ();
}
- return EFI_NOT_READY;
- }
+ //
+ // Decode the packet
+ //
+ RelativeMovementX = Packet[1];
+ RelativeMovementY = Packet[2];
+ //
+ // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
+ // Byte 0 | Y overflow | X overflow | Y sign bit | X sign bit | Always 1 | Middle Btn | Right Btn | Left Btn
+ // Byte 1 | 8 bit X Movement
+ // Byte 2 | 8 bit Y Movement
+ //
+ // X sign bit + 8 bit X Movement : 9-bit signed twos complement integer that presents the relative displacement of the device in the X direction since the last data transmission.
+ // Y sign bit + 8 bit Y Movement : Same as X sign bit + 8 bit X Movement.
+ //
+ //
+ // First, Clear X and Y high 8 bits
+ //
+ RelativeMovementX = (INT16)(RelativeMovementX & 0xFF);
+ RelativeMovementY = (INT16)(RelativeMovementY & 0xFF);
+ //
+ // Second, if the 9-bit signed twos complement integer is negative, set the high 8 bit 0xff
+ //
+ if ((Packet[0] & 0x10) != 0) {
+ RelativeMovementX = (INT16)(RelativeMovementX | 0xFF00);
+ }
- State = PS2_PROCESS_PACKET;
- break;
+ if ((Packet[0] & 0x20) != 0) {
+ RelativeMovementY = (INT16)(RelativeMovementY | 0xFF00);
+ }
+
+ RButton = (UINT8)(Packet[0] & 0x2);
+ LButton = (UINT8)(Packet[0] & 0x1);
+
+ //
+ // Update mouse state
+ //
+ MouseDev->State.RelativeMovementX += RelativeMovementX;
+ MouseDev->State.RelativeMovementY -= RelativeMovementY;
+ MouseDev->State.RightButton = (UINT8)(RButton ? TRUE : FALSE);
+ MouseDev->State.LeftButton = (UINT8)(LButton ? TRUE : FALSE);
+ MouseDev->StateChanged = TRUE;
- case PS2_PROCESS_PACKET:
- if (KeyboardEnable) {
- KbcEnableKb ();
- }
- //
- // Decode the packet
- //
- RelativeMovementX = Packet[1];
- RelativeMovementY = Packet[2];
- //
- // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
- // Byte 0 | Y overflow | X overflow | Y sign bit | X sign bit | Always 1 | Middle Btn | Right Btn | Left Btn
- // Byte 1 | 8 bit X Movement
- // Byte 2 | 8 bit Y Movement
- //
- // X sign bit + 8 bit X Movement : 9-bit signed twos complement integer that presents the relative displacement of the device in the X direction since the last data transmission.
- // Y sign bit + 8 bit Y Movement : Same as X sign bit + 8 bit X Movement.
- //
- //
- // First, Clear X and Y high 8 bits
- //
- RelativeMovementX = (INT16) (RelativeMovementX & 0xFF);
- RelativeMovementY = (INT16) (RelativeMovementY & 0xFF);
- //
- // Second, if the 9-bit signed twos complement integer is negative, set the high 8 bit 0xff
- //
- if ((Packet[0] & 0x10) != 0) {
- RelativeMovementX = (INT16) (RelativeMovementX | 0xFF00);
- }
- if ((Packet[0] & 0x20) != 0) {
- RelativeMovementY = (INT16) (RelativeMovementY | 0xFF00);
- }
-
-
- RButton = (UINT8) (Packet[0] & 0x2);
- LButton = (UINT8) (Packet[0] & 0x1);
-
- //
- // Update mouse state
- //
- MouseDev->State.RelativeMovementX += RelativeMovementX;
- MouseDev->State.RelativeMovementY -= RelativeMovementY;
- MouseDev->State.RightButton = (UINT8) (RButton ? TRUE : FALSE);
- MouseDev->State.LeftButton = (UINT8) (LButton ? TRUE : FALSE);
- MouseDev->StateChanged = TRUE;
-
- return EFI_SUCCESS;
+ return EFI_SUCCESS;
}
}
}
@@ -456,15 +462,15 @@ PS2MouseGetPacket (
**/
EFI_STATUS
PS2MouseRead (
- OUT UINT8 *Buffer,
- IN OUT UINTN *BufSize,
- IN UINTN State
+ OUT UINT8 *Buffer,
+ IN OUT UINTN *BufSize,
+ IN UINTN State
)
{
EFI_STATUS Status;
UINTN BytesRead;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
if (State == PS2_READ_BYTE_ONE) {
//
@@ -478,17 +484,18 @@ PS2MouseRead (
}
for (BytesRead = 0; BytesRead < *BufSize; BytesRead++) {
-
Status = WaitOutputFull (TIMEOUT);
if (EFI_ERROR (Status)) {
break;
}
+
Buffer[BytesRead] = IoRead8 (KBC_DATA_PORT);
}
+
//
// Verify the correct number of bytes read
//
- if (BytesRead == 0 || BytesRead != *BufSize) {
+ if ((BytesRead == 0) || (BytesRead != *BufSize)) {
Status = EFI_NOT_FOUND;
}
@@ -499,6 +506,7 @@ PS2MouseRead (
//
// 8042 I/O function
//
+
/**
I/O work flow of outing 8042 command.
@@ -509,7 +517,7 @@ PS2MouseRead (
**/
EFI_STATUS
Out8042Command (
- IN UINT8 Command
+ IN UINT8 Command
)
{
EFI_STATUS Status;
@@ -521,6 +529,7 @@ Out8042Command (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Send command
//
@@ -544,10 +553,11 @@ Out8042Command (
**/
EFI_STATUS
Out8042Data (
- IN UINT8 Data
+ IN UINT8 Data
)
{
EFI_STATUS Status;
+
//
// Wait keyboard controller input buffer empty
//
@@ -570,10 +580,10 @@ Out8042Data (
**/
EFI_STATUS
In8042Data (
- IN OUT UINT8 *Data
+ IN OUT UINT8 *Data
)
{
- UINTN Delay;
+ UINTN Delay;
Delay = TIMEOUT / 50;
@@ -609,8 +619,8 @@ In8042Data (
**/
EFI_STATUS
Out8042AuxCommand (
- IN UINT8 Command,
- IN BOOLEAN Resend
+ IN UINT8 Command,
+ IN BOOLEAN Resend
)
{
EFI_STATUS Status;
@@ -623,6 +633,7 @@ Out8042AuxCommand (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Send write to auxiliary device command
//
@@ -632,6 +643,7 @@ Out8042AuxCommand (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Send auxiliary device command
//
@@ -650,13 +662,11 @@ Out8042AuxCommand (
// Receive mouse acknowledge, command send success
//
return EFI_SUCCESS;
-
} else if (Resend) {
//
// Resend fail
//
return EFI_DEVICE_ERROR;
-
} else if (Data == PS2_RESEND) {
//
// Resend command
@@ -665,13 +675,11 @@ Out8042AuxCommand (
if (EFI_ERROR (Status)) {
return Status;
}
-
} else {
//
// Invalid return code
//
return EFI_DEVICE_ERROR;
-
}
return EFI_SUCCESS;
@@ -687,10 +695,11 @@ Out8042AuxCommand (
**/
EFI_STATUS
Out8042AuxData (
- IN UINT8 Data
+ IN UINT8 Data
)
{
EFI_STATUS Status;
+
//
// Wait keyboard controller input buffer empty
//
@@ -698,6 +707,7 @@ Out8042AuxData (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Send write to auxiliary device command
//
@@ -728,7 +738,7 @@ Out8042AuxData (
**/
EFI_STATUS
In8042AuxData (
- IN OUT UINT8 *Data
+ IN OUT UINT8 *Data
)
{
EFI_STATUS Status;
@@ -746,7 +756,6 @@ In8042AuxData (
return EFI_SUCCESS;
}
-
/**
Check keyboard controller status, if it is output buffer full and for auxiliary device.
@@ -758,7 +767,7 @@ CheckForInput (
VOID
)
{
- UINT8 Data;
+ UINT8 Data;
Data = IoRead8 (KBC_CMD_STS_PORT);
@@ -782,11 +791,11 @@ CheckForInput (
**/
EFI_STATUS
WaitInputEmpty (
- IN UINTN Timeout
+ IN UINTN Timeout
)
{
- UINTN Delay;
- UINT8 Data;
+ UINTN Delay;
+ UINT8 Data;
Delay = Timeout / 50;
@@ -821,11 +830,11 @@ WaitInputEmpty (
**/
EFI_STATUS
WaitOutputFull (
- IN UINTN Timeout
+ IN UINTN Timeout
)
{
- UINTN Delay;
- UINT8 Data;
+ UINTN Delay;
+ UINT8 Data;
Delay = Timeout / 50;
diff --git a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.h b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.h
index 60da421211..cc4486fbc2 100644
--- a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.h
+++ b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/CommPs2.h
@@ -11,18 +11,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ps2Mouse.h"
-#define PS2_PACKET_LENGTH 3
-#define PS2_SYNC_MASK 0xc
-#define PS2_SYNC_BYTE 0x8
+#define PS2_PACKET_LENGTH 3
+#define PS2_SYNC_MASK 0xc
+#define PS2_SYNC_BYTE 0x8
#define IS_PS2_SYNC_BYTE(byte) ((byte & PS2_SYNC_MASK) == PS2_SYNC_BYTE)
-#define PS2_READ_BYTE_ONE 0
-#define PS2_READ_DATA_BYTE 1
-#define PS2_PROCESS_PACKET 2
+#define PS2_READ_BYTE_ONE 0
+#define PS2_READ_DATA_BYTE 1
+#define PS2_PROCESS_PACKET 2
-#define TIMEOUT 50000
-#define BAT_TIMEOUT 500000
+#define TIMEOUT 50000
+#define BAT_TIMEOUT 500000
//
// 8042 I/O Port
@@ -42,31 +42,31 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define ENABLE_KB 0xae
#define WRITE_AUX_DEV 0xd4
-#define CMD_SYS_FLAG 0x04
-#define CMD_KB_STS 0x10
-#define CMD_KB_DIS 0x10
-#define CMD_KB_EN 0x0
+#define CMD_SYS_FLAG 0x04
+#define CMD_KB_STS 0x10
+#define CMD_KB_DIS 0x10
+#define CMD_KB_EN 0x0
//
// 8042 Auxiliary Device Command
//
-#define SETSF1_CMD 0xe6
-#define SETSF2_CMD 0xe7
-#define SETRE_CMD 0xe8
-#define READ_CMD 0xeb
-#define SETRM_CMD 0xf0
-#define SETSR_CMD 0xf3
-#define ENABLE_CMD 0xf4
-#define DISABLE_CMD 0xf5
-#define RESET_CMD 0xff
+#define SETSF1_CMD 0xe6
+#define SETSF2_CMD 0xe7
+#define SETRE_CMD 0xe8
+#define READ_CMD 0xeb
+#define SETRM_CMD 0xf0
+#define SETSR_CMD 0xf3
+#define ENABLE_CMD 0xf4
+#define DISABLE_CMD 0xf5
+#define RESET_CMD 0xff
//
// return code
//
-#define PS2_ACK 0xfa
-#define PS2_RESEND 0xfe
-#define PS2MOUSE_BAT1 0xaa
-#define PS2MOUSE_BAT2 0x0
+#define PS2_ACK 0xfa
+#define PS2_RESEND 0xfe
+#define PS2MOUSE_BAT1 0xaa
+#define PS2MOUSE_BAT2 0x0
//
// Keyboard Controller Status
@@ -78,7 +78,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// General Time Out
///
-#define KBC_TIM 0x40
+#define KBC_TIM 0x40
///
/// Output buffer for auxiliary device (PS/2):
/// 0 - Holds keyboard data
@@ -176,7 +176,7 @@ KbcDisableKb (
**/
EFI_STATUS
CheckKbStatus (
- OUT BOOLEAN *KeyboardEnable
+ OUT BOOLEAN *KeyboardEnable
);
/**
@@ -198,7 +198,7 @@ PS2MouseReset (
**/
EFI_STATUS
PS2MouseSetSampleRate (
- IN MOUSE_SR SampleRate
+ IN MOUSE_SR SampleRate
);
/**
@@ -210,7 +210,7 @@ PS2MouseSetSampleRate (
**/
EFI_STATUS
PS2MouseSetResolution (
- IN MOUSE_RE Resolution
+ IN MOUSE_RE Resolution
);
/**
@@ -222,7 +222,7 @@ PS2MouseSetResolution (
**/
EFI_STATUS
PS2MouseSetScaling (
- IN MOUSE_SF Scaling
+ IN MOUSE_SF Scaling
);
/**
@@ -246,7 +246,7 @@ PS2MouseEnable (
**/
EFI_STATUS
PS2MouseGetPacket (
- PS2_MOUSE_DEV *MouseDev
+ PS2_MOUSE_DEV *MouseDev
);
/**
@@ -260,14 +260,15 @@ PS2MouseGetPacket (
**/
EFI_STATUS
PS2MouseRead (
- OUT UINT8 *Buffer,
- IN OUT UINTN *BufSize,
- IN UINTN State
+ OUT UINT8 *Buffer,
+ IN OUT UINTN *BufSize,
+ IN UINTN State
);
//
// 8042 I/O function
//
+
/**
I/O work flow of outing 8042 command.
@@ -278,7 +279,7 @@ PS2MouseRead (
**/
EFI_STATUS
Out8042Command (
- IN UINT8 Command
+ IN UINT8 Command
);
/**
@@ -291,7 +292,7 @@ Out8042Command (
**/
EFI_STATUS
In8042Data (
- IN OUT UINT8 *Data
+ IN OUT UINT8 *Data
);
/**
@@ -304,7 +305,7 @@ In8042Data (
**/
EFI_STATUS
Out8042Data (
- IN UINT8 Data
+ IN UINT8 Data
);
/**
@@ -318,8 +319,8 @@ Out8042Data (
**/
EFI_STATUS
Out8042AuxCommand (
- IN UINT8 Command,
- IN BOOLEAN Resend
+ IN UINT8 Command,
+ IN BOOLEAN Resend
);
/**
@@ -332,7 +333,7 @@ Out8042AuxCommand (
**/
EFI_STATUS
In8042AuxData (
- IN OUT UINT8 *Data
+ IN OUT UINT8 *Data
);
/**
@@ -345,7 +346,7 @@ In8042AuxData (
**/
EFI_STATUS
Out8042AuxData (
- IN UINT8 Data
+ IN UINT8 Data
);
/**
@@ -369,7 +370,7 @@ CheckForInput (
**/
EFI_STATUS
WaitInputEmpty (
- IN UINTN Timeout
+ IN UINTN Timeout
);
/**
@@ -382,8 +383,7 @@ WaitInputEmpty (
**/
EFI_STATUS
WaitOutputFull (
- IN UINTN Timeout
+ IN UINTN Timeout
);
#endif
-
diff --git a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/ComponentName.c b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/ComponentName.c
index 3dd8efb1dc..94ab267d92 100644
--- a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/ComponentName.c
@@ -20,14 +20,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gPs2MouseComponentNam
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPs2MouseComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) Ps2MouseComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) Ps2MouseComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPs2MouseComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)Ps2MouseComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)Ps2MouseComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPs2MouseDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPs2MouseDriverNameTable[] = {
{
"eng;en",
L"PS/2 Mouse Driver"
@@ -165,16 +164,16 @@ Ps2MouseComponentNameGetDriverName (
EFI_STATUS
EFIAPI
Ps2MouseComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
- PS2_MOUSE_DEV *MouseDev;
+ EFI_STATUS Status;
+ EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
+ PS2_MOUSE_DEV *MouseDev;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -182,6 +181,7 @@ Ps2MouseComponentNameGetControllerName (
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
+
//
// Check Controller's handle
//
@@ -190,13 +190,14 @@ Ps2MouseComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiSimplePointerProtocolGuid,
- (VOID **) &SimplePointerProtocol,
+ (VOID **)&SimplePointerProtocol,
gPS2MouseDriver.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
diff --git a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.c b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.c
index ebcb2a43dc..fb61f75e08 100644
--- a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.c
+++ b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.c
@@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// DriverBinding Protocol Instance
///
-EFI_DRIVER_BINDING_PROTOCOL gPS2MouseDriver = {
+EFI_DRIVER_BINDING_PROTOCOL gPS2MouseDriver = {
PS2MouseDriverSupported,
PS2MouseDriverStart,
PS2MouseDriverStop,
@@ -39,15 +39,15 @@ EFI_DRIVER_BINDING_PROTOCOL gPS2MouseDriver = {
EFI_STATUS
EFIAPI
PS2MouseDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_SIO_PROTOCOL *Sio;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- ACPI_HID_DEVICE_PATH *Acpi;
+ EFI_STATUS Status;
+ EFI_SIO_PROTOCOL *Sio;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ ACPI_HID_DEVICE_PATH *Acpi;
//
// Check whether the controller is keyboard.
@@ -55,7 +55,7 @@ PS2MouseDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -65,37 +65,38 @@ PS2MouseDriverSupported (
}
do {
- Acpi = (ACPI_HID_DEVICE_PATH *) DevicePath;
+ Acpi = (ACPI_HID_DEVICE_PATH *)DevicePath;
DevicePath = NextDevicePathNode (DevicePath);
} while (!IsDevicePathEnd (DevicePath));
- if (DevicePathType (Acpi) != ACPI_DEVICE_PATH ||
- (DevicePathSubType (Acpi) != ACPI_DP && DevicePathSubType (Acpi) != ACPI_EXTENDED_DP)) {
+ if ((DevicePathType (Acpi) != ACPI_DEVICE_PATH) ||
+ ((DevicePathSubType (Acpi) != ACPI_DP) && (DevicePathSubType (Acpi) != ACPI_EXTENDED_DP)))
+ {
return EFI_UNSUPPORTED;
}
switch (Acpi->HID) {
- case EISA_PNP_ID (0xF03):
+ case EISA_PNP_ID (0xF03):
//
// Microsoft PS/2 style mouse
//
- case EISA_PNP_ID (0xF13):
- //
- // PS/2 Port for PS/2-style Mice
- //
- break;
-
- case EISA_PNP_ID (0x303):
- //
- // IBM Enhanced (101/102-key, PS/2 mouse support)
- //
- if (Acpi->UID == 1) {
+ case EISA_PNP_ID (0xF13):
+ //
+ // PS/2 Port for PS/2-style Mice
+ //
break;
- }
- default:
- return EFI_UNSUPPORTED;
- break;
+ case EISA_PNP_ID (0x303):
+ //
+ // IBM Enhanced (101/102-key, PS/2 mouse support)
+ //
+ if (Acpi->UID == 1) {
+ break;
+ }
+
+ default:
+ return EFI_UNSUPPORTED;
+ break;
}
//
@@ -104,7 +105,7 @@ PS2MouseDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiSioProtocolGuid,
- (VOID **) &Sio,
+ (VOID **)&Sio,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -143,21 +144,21 @@ PS2MouseDriverSupported (
EFI_STATUS
EFIAPI
PS2MouseDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_STATUS EmptyStatus;
- EFI_SIO_PROTOCOL *Sio;
- PS2_MOUSE_DEV *MouseDev;
- UINT8 Data;
- EFI_TPL OldTpl;
- EFI_STATUS_CODE_VALUE StatusCode;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STATUS Status;
+ EFI_STATUS EmptyStatus;
+ EFI_SIO_PROTOCOL *Sio;
+ PS2_MOUSE_DEV *MouseDev;
+ UINT8 Data;
+ EFI_TPL OldTpl;
+ EFI_STATUS_CODE_VALUE StatusCode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- StatusCode = 0;
+ StatusCode = 0;
//
// Open the device path protocol
@@ -165,7 +166,7 @@ PS2MouseDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -173,6 +174,7 @@ PS2MouseDriverStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Report that the keyboard is being enabled
//
@@ -188,7 +190,7 @@ PS2MouseDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiSioProtocolGuid,
- (VOID **) &Sio,
+ (VOID **)&Sio,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -196,6 +198,7 @@ PS2MouseDriverStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Raise TPL to avoid keyboard operation impact
//
@@ -209,6 +212,7 @@ PS2MouseDriverStart (
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
+
//
// Setup the device instance
//
@@ -223,14 +227,14 @@ PS2MouseDriverStart (
//
// Resolution = 4 counts/mm
//
- MouseDev->Mode.ResolutionX = 4;
- MouseDev->Mode.ResolutionY = 4;
- MouseDev->Mode.LeftButton = TRUE;
- MouseDev->Mode.RightButton = TRUE;
+ MouseDev->Mode.ResolutionX = 4;
+ MouseDev->Mode.ResolutionY = 4;
+ MouseDev->Mode.LeftButton = TRUE;
+ MouseDev->Mode.RightButton = TRUE;
- MouseDev->SimplePointerProtocol.Reset = MouseReset;
- MouseDev->SimplePointerProtocol.GetState = MouseGetState;
- MouseDev->SimplePointerProtocol.Mode = &(MouseDev->Mode);
+ MouseDev->SimplePointerProtocol.Reset = MouseReset;
+ MouseDev->SimplePointerProtocol.GetState = MouseGetState;
+ MouseDev->SimplePointerProtocol.Mode = &(MouseDev->Mode);
//
// Initialize keyboard controller if necessary
@@ -275,15 +279,15 @@ PS2MouseDriverStart (
// Reset the mouse
//
Status = MouseDev->SimplePointerProtocol.Reset (
- &MouseDev->SimplePointerProtocol,
- FeaturePcdGet (PcdPs2MouseExtendedVerification)
- );
+ &MouseDev->SimplePointerProtocol,
+ FeaturePcdGet (PcdPs2MouseExtendedVerification)
+ );
if (EFI_ERROR (Status)) {
//
// mouse not connected
//
- Status = EFI_SUCCESS;
- StatusCode = EFI_PERIPHERAL_MOUSE | EFI_P_EC_NOT_DETECTED;
+ Status = EFI_SUCCESS;
+ StatusCode = EFI_PERIPHERAL_MOUSE | EFI_P_EC_NOT_DETECTED;
goto ErrorExit;
}
@@ -307,6 +311,7 @@ PS2MouseDriverStart (
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
+
//
// Setup a periodic timer, used to poll mouse state
//
@@ -321,6 +326,7 @@ PS2MouseDriverStart (
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
+
//
// Start timer to poll mouse (100 samples per second)
//
@@ -346,7 +352,6 @@ PS2MouseDriverStart (
FALSE
);
-
//
// Install protocol interfaces for the mouse device.
//
@@ -441,21 +446,21 @@ ErrorExit:
EFI_STATUS
EFIAPI
PS2MouseDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
- PS2_MOUSE_DEV *MouseDev;
- UINT8 Data;
+ EFI_STATUS Status;
+ EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
+ PS2_MOUSE_DEV *MouseDev;
+ UINT8 Data;
Status = gBS->OpenProtocol (
Controller,
&gEfiSimplePointerProtocolGuid,
- (VOID **) &SimplePointerProtocol,
+ (VOID **)&SimplePointerProtocol,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -535,15 +540,15 @@ PS2MouseDriverStop (
EFI_STATUS
EFIAPI
MouseReset (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- PS2_MOUSE_DEV *MouseDev;
- EFI_TPL OldTpl;
- BOOLEAN KeyboardEnable;
- UINT8 Data;
+ EFI_STATUS Status;
+ PS2_MOUSE_DEV *MouseDev;
+ EFI_TPL OldTpl;
+ BOOLEAN KeyboardEnable;
+ UINT8 Data;
MouseDev = PS2_MOUSE_DEV_FROM_THIS (This);
@@ -625,6 +630,7 @@ MouseReset (
goto Exit;
}
}
+
Exit:
gBS->RestoreTPL (OldTpl);
@@ -646,11 +652,11 @@ Exit:
**/
BOOLEAN
CheckMouseConnect (
- IN PS2_MOUSE_DEV *MouseDev
+ IN PS2_MOUSE_DEV *MouseDev
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = PS2MouseEnable ();
if (!EFI_ERROR (Status)) {
@@ -673,12 +679,12 @@ CheckMouseConnect (
EFI_STATUS
EFIAPI
MouseGetState (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN OUT EFI_SIMPLE_POINTER_STATE *State
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN OUT EFI_SIMPLE_POINTER_STATE *State
)
{
- PS2_MOUSE_DEV *MouseDev;
- EFI_TPL OldTpl;
+ PS2_MOUSE_DEV *MouseDev;
+ EFI_TPL OldTpl;
MouseDev = PS2_MOUSE_DEV_FROM_THIS (This);
@@ -717,13 +723,13 @@ MouseGetState (
VOID
EFIAPI
MouseWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- PS2_MOUSE_DEV *MouseDev;
+ PS2_MOUSE_DEV *MouseDev;
- MouseDev = (PS2_MOUSE_DEV *) Context;
+ MouseDev = (PS2_MOUSE_DEV *)Context;
//
// Someone is waiting on the mouse event, if there's
@@ -732,7 +738,6 @@ MouseWaitForInput (
if (MouseDev->StateChanged) {
gBS->SignalEvent (Event);
}
-
}
/**
@@ -751,9 +756,9 @@ PollMouse (
)
{
- PS2_MOUSE_DEV *MouseDev;
+ PS2_MOUSE_DEV *MouseDev;
- MouseDev = (PS2_MOUSE_DEV *) Context;
+ MouseDev = (PS2_MOUSE_DEV *)Context;
//
// Polling mouse packet data
@@ -773,12 +778,12 @@ PollMouse (
**/
EFI_STATUS
EFIAPI
-InitializePs2Mouse(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializePs2Mouse (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -793,7 +798,5 @@ InitializePs2Mouse(
);
ASSERT_EFI_ERROR (Status);
-
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.h b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.h
index 1f7c310ad1..968cb47e82 100644
--- a/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.h
+++ b/MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2Mouse.h
@@ -69,29 +69,29 @@ typedef enum {
//
// Driver Private Data
//
-#define PS2_MOUSE_DEV_SIGNATURE SIGNATURE_32 ('p', 's', '2', 'm')
+#define PS2_MOUSE_DEV_SIGNATURE SIGNATURE_32 ('p', 's', '2', 'm')
typedef struct {
- UINTN Signature;
+ UINTN Signature;
- EFI_HANDLE Handle;
- EFI_SIMPLE_POINTER_PROTOCOL SimplePointerProtocol;
- EFI_SIMPLE_POINTER_STATE State;
- EFI_SIMPLE_POINTER_MODE Mode;
- BOOLEAN StateChanged;
+ EFI_HANDLE Handle;
+ EFI_SIMPLE_POINTER_PROTOCOL SimplePointerProtocol;
+ EFI_SIMPLE_POINTER_STATE State;
+ EFI_SIMPLE_POINTER_MODE Mode;
+ BOOLEAN StateChanged;
//
// PS2 Mouse device specific information
//
- MOUSE_SR SampleRate;
- MOUSE_RE Resolution;
- MOUSE_SF Scaling;
- UINT8 DataPackageSize;
+ MOUSE_SR SampleRate;
+ MOUSE_RE Resolution;
+ MOUSE_SF Scaling;
+ UINT8 DataPackageSize;
- EFI_EVENT TimerEvent;
+ EFI_EVENT TimerEvent;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
} PS2_MOUSE_DEV;
#define PS2_MOUSE_DEV_FROM_THIS(a) CR (a, PS2_MOUSE_DEV, SimplePointerProtocol, PS2_MOUSE_DEV_SIGNATURE)
@@ -99,6 +99,7 @@ typedef struct {
//
// Function prototypes
//
+
/**
Test to see if this driver supports ControllerHandle. Any ControllerHandle
than contains a IsaIo protocol can be supported.
@@ -116,9 +117,9 @@ typedef struct {
EFI_STATUS
EFIAPI
PS2MouseDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -139,9 +140,9 @@ PS2MouseDriverSupported (
EFI_STATUS
EFIAPI
PS2MouseDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -161,15 +162,16 @@ PS2MouseDriverStart (
EFI_STATUS
EFIAPI
PS2MouseDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -217,7 +219,6 @@ Ps2MouseComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -289,11 +290,11 @@ Ps2MouseComponentNameGetDriverName (
EFI_STATUS
EFIAPI
Ps2MouseComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -311,8 +312,8 @@ Ps2MouseComponentNameGetControllerName (
EFI_STATUS
EFIAPI
MouseReset (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -328,8 +329,8 @@ MouseReset (
EFI_STATUS
EFIAPI
MouseGetState (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN OUT EFI_SIMPLE_POINTER_STATE *State
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN OUT EFI_SIMPLE_POINTER_STATE *State
);
/**
@@ -344,8 +345,8 @@ MouseGetState (
VOID
EFIAPI
MouseWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -373,7 +374,7 @@ PollMouse (
**/
EFI_STATUS
In8042Data (
- IN OUT UINT8 *Data
+ IN OUT UINT8 *Data
);
/**
@@ -387,7 +388,7 @@ In8042Data (
**/
BOOLEAN
CheckMouseConnect (
- IN PS2_MOUSE_DEV *MouseDev
+ IN PS2_MOUSE_DEV *MouseDev
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.c
index a2132d072b..ee83af2789 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ehci.h"
-
//
// EFI Component Name Protocol
//
@@ -22,19 +21,17 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName =
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) EhciComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) EhciComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)EhciComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)EhciComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEhciDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEhciDriverNameTable[] = {
{ "eng;en", L"Usb Ehci Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
-
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -162,16 +159,16 @@ EhciComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EhciComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- USB2_HC_DEV *EhciDev;
- EFI_USB2_HC_PROTOCOL *Usb2Hc;
+ EFI_STATUS Status;
+ USB2_HC_DEV *EhciDev;
+ EFI_USB2_HC_PROTOCOL *Usb2Hc;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -179,6 +176,7 @@ EhciComponentNameGetControllerName (
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
+
//
// Make sure this driver is currently managing ControllerHandle
//
@@ -190,13 +188,14 @@ EhciComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
gEhciDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,5 +213,4 @@ EhciComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gEhciComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.h b/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.h
index 739592a6f6..d67cbf0709 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/ComponentName.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _COMPONENT_NAME_H_
#define _COMPONENT_NAME_H_
-
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -58,7 +57,6 @@ EhciComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -130,12 +128,11 @@ EhciComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EhciComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
#endif
-
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
index 0e41ee17ec..0b7270f4e9 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
@@ -16,7 +16,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Ehci.h"
//
@@ -24,23 +23,23 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// to the UEFI protocol's port state (change).
//
USB_PORT_STATE_MAP mUsbPortStateMap[] = {
- {PORTSC_CONN, USB_PORT_STAT_CONNECTION},
- {PORTSC_ENABLED, USB_PORT_STAT_ENABLE},
- {PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},
- {PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},
- {PORTSC_RESET, USB_PORT_STAT_RESET},
- {PORTSC_POWER, USB_PORT_STAT_POWER},
- {PORTSC_OWNER, USB_PORT_STAT_OWNER}
+ { PORTSC_CONN, USB_PORT_STAT_CONNECTION },
+ { PORTSC_ENABLED, USB_PORT_STAT_ENABLE },
+ { PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND },
+ { PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT },
+ { PORTSC_RESET, USB_PORT_STAT_RESET },
+ { PORTSC_POWER, USB_PORT_STAT_POWER },
+ { PORTSC_OWNER, USB_PORT_STAT_OWNER }
};
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
- {PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},
- {PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},
- {PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}
+ { PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION },
+ { PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE },
+ { PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT }
};
EFI_DRIVER_BINDING_PROTOCOL
-gEhciDriverBinding = {
+ gEhciDriverBinding = {
EhcDriverBindingSupported,
EhcDriverBindingStart,
EhcDriverBindingStop,
@@ -71,19 +70,19 @@ EhcGetCapability (
OUT UINT8 *Is64BitCapable
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
*MaxSpeed = EFI_USB_SPEED_HIGH;
- *PortNumber = (UINT8) (Ehc->HcStructParams & HCSP_NPORTS);
- *Is64BitCapable = (UINT8) Ehc->Support64BitDma;
+ *PortNumber = (UINT8)(Ehc->HcStructParams & HCSP_NPORTS);
+ *Is64BitCapable = (UINT8)Ehc->Support64BitDma;
DEBUG ((DEBUG_INFO, "EhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
@@ -91,7 +90,6 @@ EhcGetCapability (
return EFI_SUCCESS;
}
-
/**
Provides software reset for the USB host controller.
@@ -108,13 +106,13 @@ EhcGetCapability (
EFI_STATUS
EFIAPI
EhcReset (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT16 Attributes
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT16 Attributes
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
Ehc = EHC_FROM_THIS (This);
@@ -129,55 +127,55 @@ EhcReset (
);
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
switch (Attributes) {
- case EFI_USB_HC_RESET_GLOBAL:
- //
- // Flow through, same behavior as Host Controller Reset
- //
- case EFI_USB_HC_RESET_HOST_CONTROLLER:
+ case EFI_USB_HC_RESET_GLOBAL:
//
- // Host Controller must be Halt when Reset it
+ // Flow through, same behavior as Host Controller Reset
//
- if (EhcIsDebugPortInUse (Ehc, NULL)) {
- Status = EFI_SUCCESS;
- goto ON_EXIT;
- }
+ case EFI_USB_HC_RESET_HOST_CONTROLLER:
+ //
+ // Host Controller must be Halt when Reset it
+ //
+ if (EhcIsDebugPortInUse (Ehc, NULL)) {
+ Status = EFI_SUCCESS;
+ goto ON_EXIT;
+ }
- if (!EhcIsHalt (Ehc)) {
- Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);
+ if (!EhcIsHalt (Ehc)) {
+ Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);
- if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
- goto ON_EXIT;
+ if (EFI_ERROR (Status)) {
+ Status = EFI_DEVICE_ERROR;
+ goto ON_EXIT;
+ }
}
- }
- //
- // Clean up the asynchronous transfers, currently only
- // interrupt supports asynchronous operation.
- //
- EhciDelAllAsyncIntTransfers (Ehc);
- EhcAckAllInterrupt (Ehc);
- EhcFreeSched (Ehc);
+ //
+ // Clean up the asynchronous transfers, currently only
+ // interrupt supports asynchronous operation.
+ //
+ EhciDelAllAsyncIntTransfers (Ehc);
+ EhcAckAllInterrupt (Ehc);
+ EhcFreeSched (Ehc);
- Status = EhcResetHC (Ehc, EHC_RESET_TIMEOUT);
+ Status = EhcResetHC (Ehc, EHC_RESET_TIMEOUT);
- if (EFI_ERROR (Status)) {
- goto ON_EXIT;
- }
+ if (EFI_ERROR (Status)) {
+ goto ON_EXIT;
+ }
- Status = EhcInitHC (Ehc);
- break;
+ Status = EhcInitHC (Ehc);
+ break;
- case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
- case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
- Status = EFI_UNSUPPORTED;
- break;
+ case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
+ case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
+ Status = EFI_UNSUPPORTED;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -186,7 +184,6 @@ ON_EXIT:
return Status;
}
-
/**
Retrieve the current state of the USB host controller.
@@ -207,15 +204,15 @@ EhcGetState (
OUT EFI_USB_HC_STATE *State
)
{
- EFI_TPL OldTpl;
- USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ USB2_HC_DEV *Ehc;
if (State == NULL) {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {
*State = EfiUsbHcStateHalt;
@@ -229,7 +226,6 @@ EhcGetState (
return EFI_SUCCESS;
}
-
/**
Sets the USB host controller to a specific state.
@@ -245,14 +241,14 @@ EhcGetState (
EFI_STATUS
EFIAPI
EhcSetState (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN EFI_USB_HC_STATE State
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN EFI_USB_HC_STATE State
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- EFI_USB_HC_STATE CurState;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_USB_HC_STATE CurState;
Status = EhcGetState (This, &CurState);
@@ -264,39 +260,39 @@ EhcSetState (
return EFI_SUCCESS;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
switch (State) {
- case EfiUsbHcStateHalt:
- Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);
- break;
-
- case EfiUsbHcStateOperational:
- if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR)) {
- Status = EFI_DEVICE_ERROR;
+ case EfiUsbHcStateHalt:
+ Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);
break;
- }
- //
- // Software must not write a one to this field unless the host controller
- // is in the Halted state. Doing so will yield undefined results.
- // refers to Spec[EHCI1.0-2.3.1]
- //
- if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {
- Status = EFI_DEVICE_ERROR;
- break;
- }
+ case EfiUsbHcStateOperational:
+ if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR)) {
+ Status = EFI_DEVICE_ERROR;
+ break;
+ }
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
- break;
+ //
+ // Software must not write a one to this field unless the host controller
+ // is in the Halted state. Doing so will yield undefined results.
+ // refers to Spec[EHCI1.0-2.3.1]
+ //
+ if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {
+ Status = EFI_DEVICE_ERROR;
+ break;
+ }
- case EfiUsbHcStateSuspend:
- Status = EFI_UNSUPPORTED;
- break;
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ case EfiUsbHcStateSuspend:
+ Status = EFI_UNSUPPORTED;
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
DEBUG ((DEBUG_INFO, "EhcSetState: exit status %r\n", Status));
@@ -304,7 +300,6 @@ EhcSetState (
return Status;
}
-
/**
Retrieves the current status of a USB root hub port.
@@ -327,23 +322,23 @@ EhcGetRootHubPortStatus (
OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- UINTN Index;
- UINTN MapSize;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ UINTN Index;
+ UINTN MapSize;
+ EFI_STATUS Status;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
- Status = EFI_SUCCESS;
+ Ehc = EHC_FROM_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -352,15 +347,15 @@ EhcGetRootHubPortStatus (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
if (EhcIsDebugPortInUse (Ehc, &PortNumber)) {
goto ON_EXIT;
}
- State = EhcReadOpReg (Ehc, Offset);
+ State = EhcReadOpReg (Ehc, Offset);
//
// Identify device speed. If in K state, it is low speed.
@@ -370,7 +365,6 @@ EhcGetRootHubPortStatus (
//
if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
-
} else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {
PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
}
@@ -382,7 +376,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
@@ -390,7 +384,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -399,7 +393,6 @@ ON_EXIT:
return Status;
}
-
/**
Sets a feature for the specified root hub port.
@@ -420,16 +413,16 @@ EhcSetRootHubPortFeature (
IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
-
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
- Status = EFI_SUCCESS;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
+
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -438,8 +431,8 @@ EhcSetRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ State = EhcReadOpReg (Ehc, Offset);
//
// Mask off the port status change bits, these bits are
@@ -448,58 +441,59 @@ EhcSetRootHubPortFeature (
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Sofeware can't set this bit, Port can only be enable by
- // EHCI as a part of the reset and enable
- //
- State |= PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Sofeware can't set this bit, Port can only be enable by
+ // EHCI as a part of the reset and enable
+ //
+ State |= PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortSuspend:
- State |= PORTSC_SUSPEND;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ State |= PORTSC_SUSPEND;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Make sure Host Controller not halt before reset it
- //
- if (EhcIsHalt (Ehc)) {
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
+ case EfiUsbPortReset:
+ //
+ // Make sure Host Controller not halt before reset it
+ //
+ if (EhcIsHalt (Ehc)) {
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "EhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
- break;
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "EhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
+ break;
+ }
}
- }
-
- //
- // Set one to PortReset bit must also set zero to PortEnable bit
- //
- State |= PORTSC_RESET;
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
- case EfiUsbPortPower:
- //
- // Set port power bit when PPC is 1
- //
- if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {
- State |= PORTSC_POWER;
+ //
+ // Set one to PortReset bit must also set zero to PortEnable bit
+ //
+ State |= PORTSC_RESET;
+ State &= ~PORTSC_ENABLED;
EhcWriteOpReg (Ehc, Offset, State);
- }
- break;
+ break;
- case EfiUsbPortOwner:
- State |= PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortPower:
+ //
+ // Set port power bit when PPC is 1
+ //
+ if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {
+ State |= PORTSC_POWER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ }
- default:
- Status = EFI_INVALID_PARAMETER;
+ break;
+
+ case EfiUsbPortOwner:
+ State |= PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -509,7 +503,6 @@ ON_EXIT:
return Status;
}
-
/**
Clears a feature for the specified root hub port.
@@ -533,16 +526,16 @@ EhcClearRootHubPortFeature (
IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
-
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
- Status = EFI_SUCCESS;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
+
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -551,90 +544,91 @@ EhcClearRootHubPortFeature (
goto ON_EXIT;
}
- Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
+ State = EhcReadOpReg (Ehc, Offset);
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Clear PORT_ENABLE feature means disable port.
- //
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
-
- case EfiUsbPortSuspend:
- //
- // A write of zero to this bit is ignored by the host
- // controller. The host controller will unconditionally
- // set this bit to a zero when:
- // 1. software sets the Forct Port Resume bit to a zero from a one.
- // 2. software sets the Port Reset bit to a one frome a zero.
- //
- State &= ~PORSTSC_RESUME;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Clear PORT_ENABLE feature means disable port.
+ //
+ State &= ~PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Clear PORT_RESET means clear the reset signal.
- //
- State &= ~PORTSC_RESET;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ //
+ // A write of zero to this bit is ignored by the host
+ // controller. The host controller will unconditionally
+ // set this bit to a zero when:
+ // 1. software sets the Forct Port Resume bit to a zero from a one.
+ // 2. software sets the Port Reset bit to a one frome a zero.
+ //
+ State &= ~PORSTSC_RESUME;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOwner:
- //
- // Clear port owner means this port owned by EHC
- //
- State &= ~PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortReset:
+ //
+ // Clear PORT_RESET means clear the reset signal.
+ //
+ State &= ~PORTSC_RESET;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortConnectChange:
- //
- // Clear connect status change
- //
- State |= PORTSC_CONN_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ //
+ // Clear port owner means this port owned by EHC
+ //
+ State &= ~PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortEnableChange:
- //
- // Clear enable status change
- //
- State |= PORTSC_ENABLE_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortConnectChange:
+ //
+ // Clear connect status change
+ //
+ State |= PORTSC_CONN_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOverCurrentChange:
- //
- // Clear PortOverCurrent change
- //
- State |= PORTSC_OVERCUR_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnableChange:
+ //
+ // Clear enable status change
+ //
+ State |= PORTSC_ENABLE_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortPower:
- //
- // Clear port power bit when PPC is 1
- //
- if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {
- State &= ~PORTSC_POWER;
+ case EfiUsbPortOverCurrentChange:
+ //
+ // Clear PortOverCurrent change
+ //
+ State |= PORTSC_OVERCUR_CHANGE;
EhcWriteOpReg (Ehc, Offset, State);
- }
- break;
- case EfiUsbPortSuspendChange:
- case EfiUsbPortResetChange:
- //
- // Not supported or not related operation
- //
- break;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
- break;
+ case EfiUsbPortPower:
+ //
+ // Clear port power bit when PPC is 1
+ //
+ if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {
+ State &= ~PORTSC_POWER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ }
+
+ break;
+ case EfiUsbPortSuspendChange:
+ case EfiUsbPortResetChange:
+ //
+ // Not supported or not related operation
+ //
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
+ break;
}
ON_EXIT:
@@ -643,7 +637,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits control transfer to a target USB device.
@@ -684,11 +677,11 @@ EhcControlTransfer (
OUT UINT32 *TransferResult
)
{
- USB2_HC_DEV *Ehc;
- URB *Urb;
- EFI_TPL OldTpl;
- UINT8 Endpoint;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ URB *Urb;
+ EFI_TPL OldTpl;
+ UINT8 Endpoint;
+ EFI_STATUS Status;
//
// Validate parameters
@@ -699,22 +692,26 @@ EhcControlTransfer (
if ((TransferDirection != EfiUsbDataIn) &&
(TransferDirection != EfiUsbDataOut) &&
- (TransferDirection != EfiUsbNoData)) {
+ (TransferDirection != EfiUsbNoData))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection == EfiUsbNoData) &&
- ((Data != NULL) || (*DataLength != 0))) {
+ ((Data != NULL) || (*DataLength != 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection != EfiUsbNoData) &&
- ((Data == NULL) || (*DataLength == 0))) {
+ ((Data == NULL) || (*DataLength == 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -722,8 +719,8 @@ EhcControlTransfer (
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
Status = EFI_DEVICE_ERROR;
*TransferResult = EFI_USB_ERR_SYSTEM;
@@ -746,23 +743,23 @@ EhcControlTransfer (
// endpoint is bidirectional. EhcCreateUrb expects this
// combination of Ep addr and its direction.
//
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Urb = EhcCreateUrb (
- Ehc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- 0,
- MaximumPacketLength,
- Translator,
- EHC_CTRL_TRANSFER,
- Request,
- Data,
- *DataLength,
- NULL,
- NULL,
- 1
- );
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
+ Urb = EhcCreateUrb (
+ Ehc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ 0,
+ MaximumPacketLength,
+ Translator,
+ EHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ *DataLength,
+ NULL,
+ NULL,
+ 1
+ );
if (Urb == NULL) {
DEBUG ((DEBUG_ERROR, "EhcControlTransfer: failed to create URB"));
@@ -800,7 +797,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits bulk transfer to a bulk endpoint of a USB device.
@@ -848,16 +844,17 @@ EhcBulkTransfer (
OUT UINT32 *TransferResult
)
{
- USB2_HC_DEV *Ehc;
- URB *Urb;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ URB *Urb;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
//
// Validate the parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -867,12 +864,13 @@ EhcBulkTransfer (
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))
+ {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -940,7 +938,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits an asynchronous interrupt transfer to an
interrupt endpoint of a USB device.
@@ -973,24 +970,24 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcAsyncInterruptTransfer (
- IN EFI_USB2_HC_PROTOCOL * This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN BOOLEAN IsNewTransfer,
- IN OUT UINT8 *DataToggle,
- IN UINTN PollingInterval,
- IN UINTN DataLength,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR * Translator,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
- IN VOID *Context OPTIONAL
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN BOOLEAN IsNewTransfer,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN PollingInterval,
+ IN UINTN DataLength,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
+ IN VOID *Context OPTIONAL
)
{
- USB2_HC_DEV *Ehc;
- URB *Urb;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ URB *Urb;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
//
// Validate parameters
@@ -1013,8 +1010,8 @@ EhcAsyncInterruptTransfer (
}
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
//
// Delete Async interrupt transfer request. DataToggle will return
@@ -1065,7 +1062,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits synchronous interrupt transfer to an interrupt endpoint
of a USB device.
@@ -1109,16 +1105,17 @@ EhcSyncInterruptTransfer (
OUT UINT32 *TransferResult
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- URB *Urb;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ URB *Urb;
+ EFI_STATUS Status;
//
// Validates parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1128,12 +1125,13 @@ EhcSyncInterruptTransfer (
if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
+ ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072)))
+ {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = EHC_FROM_THIS (This);
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = EHC_FROM_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -1195,7 +1193,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits isochronous transfer to a target USB device.
@@ -1235,7 +1232,6 @@ EhcIsochronousTransfer (
return EFI_UNSUPPORTED;
}
-
/**
Submits Async isochronous transfer to a target USB device.
@@ -1291,8 +1287,8 @@ EhcAsyncIsochronousTransfer (
EFI_STATUS
EFIAPI
EhcDriverEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EfiLibInstallDriverBindingComponentName2 (
@@ -1305,7 +1301,6 @@ EhcDriverEntryPoint (
);
}
-
/**
Test to see if this driver supports ControllerHandle. Any
ControllerHandle that has Usb2HcProtocol installed will
@@ -1322,14 +1317,14 @@ EhcDriverEntryPoint (
EFI_STATUS
EFIAPI
EhcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- USB_CLASSC UsbClassCReg;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ USB_CLASSC UsbClassCReg;
//
// Test whether there is PCI IO Protocol attached on the controller handle.
@@ -1337,7 +1332,7 @@ EhcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1363,9 +1358,9 @@ EhcDriverBindingSupported (
//
// Test whether the controller belongs to Ehci type
//
- if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) || (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB)
- || ((UsbClassCReg.ProgInterface != PCI_IF_EHCI) && (UsbClassCReg.ProgInterface != PCI_IF_UHCI) && (UsbClassCReg.ProgInterface != PCI_IF_OHCI))) {
-
+ if ( (UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) || (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB)
+ || ((UsbClassCReg.ProgInterface != PCI_IF_EHCI) && (UsbClassCReg.ProgInterface != PCI_IF_UHCI) && (UsbClassCReg.ProgInterface != PCI_IF_OHCI)))
+ {
Status = EFI_UNSUPPORTED;
}
@@ -1391,15 +1386,15 @@ ON_EXIT:
**/
EFI_STATUS
EhcGetUsbDebugPortInfo (
- IN USB2_HC_DEV *Ehc
- )
+ IN USB2_HC_DEV *Ehc
+ )
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT16 PciStatus;
- UINT8 CapabilityPtr;
- UINT8 CapabilityId;
- UINT16 DebugPort;
- EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 PciStatus;
+ UINT8 CapabilityPtr;
+ UINT8 CapabilityId;
+ UINT16 DebugPort;
+ EFI_STATUS Status;
ASSERT (Ehc->PciIo != NULL);
PciIo = Ehc->PciIo;
@@ -1503,7 +1498,6 @@ EhcGetUsbDebugPortInfo (
return EFI_SUCCESS;
}
-
/**
Create and initialize a USB2_HC_DEV.
@@ -1522,8 +1516,8 @@ EhcCreateUsb2Hc (
IN UINT64 OriginalPciAttributes
)
{
- USB2_HC_DEV *Ehc;
- EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ EFI_STATUS Status;
Ehc = AllocateZeroPool (sizeof (USB2_HC_DEV));
@@ -1534,23 +1528,23 @@ EhcCreateUsb2Hc (
//
// Init EFI_USB2_HC_PROTOCOL interface and private data structure
//
- Ehc->Signature = USB2_HC_DEV_SIGNATURE;
-
- Ehc->Usb2Hc.GetCapability = EhcGetCapability;
- Ehc->Usb2Hc.Reset = EhcReset;
- Ehc->Usb2Hc.GetState = EhcGetState;
- Ehc->Usb2Hc.SetState = EhcSetState;
- Ehc->Usb2Hc.ControlTransfer = EhcControlTransfer;
- Ehc->Usb2Hc.BulkTransfer = EhcBulkTransfer;
- Ehc->Usb2Hc.AsyncInterruptTransfer = EhcAsyncInterruptTransfer;
- Ehc->Usb2Hc.SyncInterruptTransfer = EhcSyncInterruptTransfer;
- Ehc->Usb2Hc.IsochronousTransfer = EhcIsochronousTransfer;
- Ehc->Usb2Hc.AsyncIsochronousTransfer = EhcAsyncIsochronousTransfer;
- Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus;
- Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature;
- Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
- Ehc->Usb2Hc.MajorRevision = 0x2;
- Ehc->Usb2Hc.MinorRevision = 0x0;
+ Ehc->Signature = USB2_HC_DEV_SIGNATURE;
+
+ Ehc->Usb2Hc.GetCapability = EhcGetCapability;
+ Ehc->Usb2Hc.Reset = EhcReset;
+ Ehc->Usb2Hc.GetState = EhcGetState;
+ Ehc->Usb2Hc.SetState = EhcSetState;
+ Ehc->Usb2Hc.ControlTransfer = EhcControlTransfer;
+ Ehc->Usb2Hc.BulkTransfer = EhcBulkTransfer;
+ Ehc->Usb2Hc.AsyncInterruptTransfer = EhcAsyncInterruptTransfer;
+ Ehc->Usb2Hc.SyncInterruptTransfer = EhcSyncInterruptTransfer;
+ Ehc->Usb2Hc.IsochronousTransfer = EhcIsochronousTransfer;
+ Ehc->Usb2Hc.AsyncIsochronousTransfer = EhcAsyncIsochronousTransfer;
+ Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus;
+ Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature;
+ Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
+ Ehc->Usb2Hc.MajorRevision = 0x2;
+ Ehc->Usb2Hc.MinorRevision = 0x0;
Ehc->PciIo = PciIo;
Ehc->DevicePath = DevicePath;
@@ -1603,14 +1597,14 @@ EhcCreateUsb2Hc (
VOID
EFIAPI
EhcExitBootService (
- EFI_EVENT Event,
- VOID *Context
+ EFI_EVENT Event,
+ VOID *Context
)
{
- USB2_HC_DEV *Ehc;
+ USB2_HC_DEV *Ehc;
- Ehc = (USB2_HC_DEV *) Context;
+ Ehc = (USB2_HC_DEV *)Context;
//
// Reset the Host Controller
@@ -1618,7 +1612,6 @@ EhcExitBootService (
EhcResetHC (Ehc, EHC_RESET_TIMEOUT);
}
-
/**
Starting the Usb EHCI Driver.
@@ -1635,30 +1628,30 @@ EhcExitBootService (
EFI_STATUS
EFIAPI
EhcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- USB2_HC_DEV *Ehc;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_PCI_IO_PROTOCOL *Instance;
- UINT64 Supports;
- UINT64 OriginalPciAttributes;
- BOOLEAN PciAttributesSaved;
- USB_CLASSC UsbClassCReg;
- EFI_HANDLE *HandleBuffer;
- UINTN NumberOfHandles;
- UINTN Index;
- UINTN CompanionSegmentNumber;
- UINTN CompanionBusNumber;
- UINTN CompanionDeviceNumber;
- UINTN CompanionFunctionNumber;
- UINTN EhciSegmentNumber;
- UINTN EhciBusNumber;
- UINTN EhciDeviceNumber;
- UINTN EhciFunctionNumber;
+ EFI_STATUS Status;
+ USB2_HC_DEV *Ehc;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *Instance;
+ UINT64 Supports;
+ UINT64 OriginalPciAttributes;
+ BOOLEAN PciAttributesSaved;
+ USB_CLASSC UsbClassCReg;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ UINTN CompanionSegmentNumber;
+ UINTN CompanionBusNumber;
+ UINTN CompanionDeviceNumber;
+ UINTN CompanionFunctionNumber;
+ UINTN EhciSegmentNumber;
+ UINTN EhciBusNumber;
+ UINTN EhciDeviceNumber;
+ UINTN EhciFunctionNumber;
EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
//
@@ -1667,7 +1660,7 @@ EhcDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1681,14 +1674,14 @@ EhcDriverBindingStart (
// Open Device Path Protocol for on USB host controller
//
HcDevicePath = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &HcDevicePath,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&HcDevicePath,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
PciAttributesSaved = FALSE;
//
@@ -1704,6 +1697,7 @@ EhcDriverBindingStart (
if (EFI_ERROR (Status)) {
goto CLOSE_PCIIO;
}
+
PciAttributesSaved = TRUE;
Status = PciIo->Attributes (
@@ -1714,12 +1708,12 @@ EhcDriverBindingStart (
);
if (!EFI_ERROR (Status)) {
Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
}
if (EFI_ERROR (Status)) {
@@ -1742,21 +1736,23 @@ EhcDriverBindingStart (
Status = EFI_UNSUPPORTED;
goto CLOSE_PCIIO;
}
+
//
// Determine if the device is UHCI or OHCI host controller or not. If yes, then find out the
// companion usb ehci host controller and force EHCI driver get attached to it before
// UHCI or OHCI driver attaches to UHCI or OHCI host controller.
//
- if ((UsbClassCReg.ProgInterface == PCI_IF_UHCI || UsbClassCReg.ProgInterface == PCI_IF_OHCI) &&
- (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&
- (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB)) {
+ if (((UsbClassCReg.ProgInterface == PCI_IF_UHCI) || (UsbClassCReg.ProgInterface == PCI_IF_OHCI)) &&
+ (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&
+ (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB))
+ {
Status = PciIo->GetLocation (
- PciIo,
- &CompanionSegmentNumber,
- &CompanionBusNumber,
- &CompanionDeviceNumber,
- &CompanionFunctionNumber
- );
+ PciIo,
+ &CompanionSegmentNumber,
+ &CompanionBusNumber,
+ &CompanionDeviceNumber,
+ &CompanionFunctionNumber
+ );
if (EFI_ERROR (Status)) {
goto CLOSE_PCIIO;
}
@@ -1777,19 +1773,19 @@ EhcDriverBindingStart (
// Get the device path on this handle
//
Status = gBS->HandleProtocol (
- HandleBuffer[Index],
- &gEfiPciIoProtocolGuid,
- (VOID **)&Instance
- );
+ HandleBuffer[Index],
+ &gEfiPciIoProtocolGuid,
+ (VOID **)&Instance
+ );
ASSERT_EFI_ERROR (Status);
Status = Instance->Pci.Read (
- Instance,
- EfiPciIoWidthUint8,
- PCI_CLASSCODE_OFFSET,
- sizeof (USB_CLASSC) / sizeof (UINT8),
- &UsbClassCReg
- );
+ Instance,
+ EfiPciIoWidthUint8,
+ PCI_CLASSCODE_OFFSET,
+ sizeof (USB_CLASSC) / sizeof (UINT8),
+ &UsbClassCReg
+ );
if (EFI_ERROR (Status)) {
Status = EFI_UNSUPPORTED;
@@ -1797,33 +1793,36 @@ EhcDriverBindingStart (
}
if ((UsbClassCReg.ProgInterface == PCI_IF_EHCI) &&
- (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&
- (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB)) {
+ (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&
+ (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB))
+ {
Status = Instance->GetLocation (
- Instance,
- &EhciSegmentNumber,
- &EhciBusNumber,
- &EhciDeviceNumber,
- &EhciFunctionNumber
- );
+ Instance,
+ &EhciSegmentNumber,
+ &EhciBusNumber,
+ &EhciDeviceNumber,
+ &EhciFunctionNumber
+ );
if (EFI_ERROR (Status)) {
goto CLOSE_PCIIO;
}
+
//
// Currently, the judgment on the companion usb host controller is through the
// same bus number, which may vary on different platform.
//
if (EhciBusNumber == CompanionBusNumber) {
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
- EhcDriverBindingStart(This, HandleBuffer[Index], NULL);
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
+ EhcDriverBindingStart (This, HandleBuffer[Index], NULL);
}
}
}
+
Status = EFI_NOT_FOUND;
goto CLOSE_PCIIO;
}
@@ -1854,9 +1853,13 @@ EhcDriverBindingStart (
if (!EFI_ERROR (Status)) {
Ehc->Support64BitDma = TRUE;
} else {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
- __FUNCTION__, Controller, Status));
+ __FUNCTION__,
+ Controller,
+ Status
+ ));
}
}
@@ -1937,7 +1940,6 @@ EhcDriverBindingStart (
FALSE
);
-
DEBUG ((DEBUG_INFO, "EhcDriverBindingStart: EHCI started for controller @ %p\n", Controller));
return EFI_SUCCESS;
@@ -1959,11 +1961,11 @@ CLOSE_PCIIO:
// Restore original PCI attributes
//
PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- OriginalPciAttributes,
- NULL
- );
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ OriginalPciAttributes,
+ NULL
+ );
}
gBS->CloseProtocol (
@@ -1976,7 +1978,6 @@ CLOSE_PCIIO:
return Status;
}
-
/**
Stop this driver on ControllerHandle. Support stopping any child handles
created by this driver.
@@ -1993,10 +1994,10 @@ CLOSE_PCIIO:
EFI_STATUS
EFIAPI
EhcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -2012,7 +2013,7 @@ EhcDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -2066,11 +2067,11 @@ EhcDriverBindingStop (
// Restore original PCI attributes
//
PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- Ehc->OriginalPciAttributes,
- NULL
- );
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ Ehc->OriginalPciAttributes,
+ NULL
+ );
gBS->CloseProtocol (
Controller,
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h
index 65933d9439..393cc209dc 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h
@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_H_
#define _EFI_EHCI_H_
-
#include <Uefi.h>
#include <Protocol/Usb2HostController.h>
@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Pci.h>
-typedef struct _USB2_HC_DEV USB2_HC_DEV;
+typedef struct _USB2_HC_DEV USB2_HC_DEV;
#include "UsbHcMem.h"
#include "EhciReg.h"
@@ -44,64 +43,63 @@ typedef struct _USB2_HC_DEV USB2_HC_DEV;
// EHC timeout experience values
//
-#define EHC_1_MICROSECOND 1
-#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
-#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
+#define EHC_1_MICROSECOND 1
+#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
+#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
//
// EHCI register operation timeout, set by experience
//
-#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
-#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
+#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
+#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
//
// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
//
-#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
+#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
//
// Sync and Async transfer polling interval, set by experience,
// and the unit of Async is 100us, means 1ms as interval.
//
-#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
-#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
+#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
+#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
//
// EHCI debug port control status register bit definition
//
-#define USB_DEBUG_PORT_IN_USE BIT10
-#define USB_DEBUG_PORT_ENABLE BIT28
-#define USB_DEBUG_PORT_OWNER BIT30
-#define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \
+#define USB_DEBUG_PORT_IN_USE BIT10
+#define USB_DEBUG_PORT_ENABLE BIT28
+#define USB_DEBUG_PORT_OWNER BIT30
+#define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \
USB_DEBUG_PORT_OWNER)
//
// EHC raises TPL to TPL_NOTIFY to serialize all its operations
// to protect shared data structures.
//
-#define EHC_TPL TPL_NOTIFY
-
-#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
+#define EHC_TPL TPL_NOTIFY
+#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
-#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
-#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
-#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
+#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
+#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
-#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
+#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
struct _USB2_HC_DEV {
- UINTN Signature;
- EFI_USB2_HC_PROTOCOL Usb2Hc;
+ UINTN Signature;
+ EFI_USB2_HC_PROTOCOL Usb2Hc;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINT64 OriginalPciAttributes;
- USBHC_MEM_POOL *MemPool;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT64 OriginalPciAttributes;
+ USBHC_MEM_POOL *MemPool;
//
// Schedule data shared between asynchronous and periodic
@@ -112,58 +110,57 @@ struct _USB2_HC_DEV {
// For control transfer, even the short read happens, try the
// status stage.
//
- EHC_QTD *ShortReadStop;
- EFI_EVENT PollTimer;
+ EHC_QTD *ShortReadStop;
+ EFI_EVENT PollTimer;
//
// ExitBootServicesEvent is used to stop the EHC DMA operation
// after exit boot service.
//
- EFI_EVENT ExitBootServiceEvent;
+ EFI_EVENT ExitBootServiceEvent;
//
// Asynchronous(bulk and control) transfer schedule data:
// ReclaimHead is used as the head of the asynchronous transfer
// list. It acts as the reclamation header.
//
- EHC_QH *ReclaimHead;
+ EHC_QH *ReclaimHead;
//
// Periodic (interrupt) transfer schedule data:
//
- VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
- VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
- VOID *PeriodFrameMap;
+ VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
+ VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
+ VOID *PeriodFrameMap;
- EHC_QH *PeriodOne;
- LIST_ENTRY AsyncIntTransfers;
+ EHC_QH *PeriodOne;
+ LIST_ENTRY AsyncIntTransfers;
//
// EHCI configuration data
//
- UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
- UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
- UINT32 CapLen; // Capability length
+ UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
+ UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
+ UINT32 CapLen; // Capability length
//
// Misc
//
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// EHCI debug port info
//
- UINT16 DebugPortOffset; // The offset of debug port mmio register
- UINT8 DebugPortBarNum; // The bar number of debug port mmio register
- UINT8 DebugPortNum; // The port number of usb debug port
+ UINT16 DebugPortOffset; // The offset of debug port mmio register
+ UINT8 DebugPortBarNum; // The bar number of debug port mmio register
+ UINT8 DebugPortNum; // The port number of usb debug port
- BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
+ BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
};
-
-extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
/**
Test to see if this driver supports ControllerHandle. Any
@@ -181,9 +178,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
EFI_STATUS
EFIAPI
EhcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -202,9 +199,9 @@ EhcDriverBindingSupported (
EFI_STATUS
EFIAPI
EhcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -223,11 +220,10 @@ EhcDriverBindingStart (
EFI_STATUS
EFIAPI
EhcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
#endif
-
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.c
index 55cbb68570..79888bf3a5 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.c
@@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Ehci.h"
/**
@@ -19,7 +18,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
EhcDumpStatus (
- IN UINT32 State
+ IN UINT32 State
)
{
if (EHC_BIT_IS_SET (State, QTD_STAT_DO_PING)) {
@@ -57,7 +56,6 @@ EhcDumpStatus (
DEBUG ((DEBUG_VERBOSE, "\n"));
}
-
/**
Dump the fields of a QTD.
@@ -67,12 +65,12 @@ EhcDumpStatus (
**/
VOID
EhcDumpQtd (
- IN EHC_QTD *Qtd,
- IN CHAR8 *Msg
+ IN EHC_QTD *Qtd,
+ IN CHAR8 *Msg
)
{
- QTD_HW *QtdHw;
- UINTN Index;
+ QTD_HW *QtdHw;
+ UINTN Index;
if (Msg != NULL) {
DEBUG ((DEBUG_VERBOSE, Msg));
@@ -89,13 +87,10 @@ EhcDumpQtd (
if (QtdHw->Pid == QTD_PID_SETUP) {
DEBUG ((DEBUG_VERBOSE, "PID : Setup\n"));
-
} else if (QtdHw->Pid == QTD_PID_INPUT) {
DEBUG ((DEBUG_VERBOSE, "PID : IN\n"));
-
} else if (QtdHw->Pid == QTD_PID_OUTPUT) {
DEBUG ((DEBUG_VERBOSE, "PID : OUT\n"));
-
}
DEBUG ((DEBUG_VERBOSE, "Error Count : %d\n", QtdHw->ErrCnt));
@@ -109,7 +104,6 @@ EhcDumpQtd (
}
}
-
/**
Dump the queue head.
@@ -120,22 +114,27 @@ EhcDumpQtd (
**/
VOID
EhcDumpQh (
- IN EHC_QH *Qh,
- IN CHAR8 *Msg,
- IN BOOLEAN DumpBuf
+ IN EHC_QH *Qh,
+ IN CHAR8 *Msg,
+ IN BOOLEAN DumpBuf
)
{
- EHC_QTD *Qtd;
- QH_HW *QhHw;
- LIST_ENTRY *Entry;
- UINTN Index;
+ EHC_QTD *Qtd;
+ QH_HW *QhHw;
+ LIST_ENTRY *Entry;
+ UINTN Index;
if (Msg != NULL) {
DEBUG ((DEBUG_VERBOSE, Msg));
}
- DEBUG ((DEBUG_VERBOSE, "Queue head @ 0x%p, interval %ld, next qh %p\n",
- Qh, (UINT64)Qh->Interval, Qh->NextQh));
+ DEBUG ((
+ DEBUG_VERBOSE,
+ "Queue head @ 0x%p, interval %ld, next qh %p\n",
+ Qh,
+ (UINT64)Qh->Interval,
+ Qh->NextQh
+ ));
QhHw = &Qh->QhHw;
@@ -166,10 +165,8 @@ EhcDumpQh (
if (QhHw->Pid == QTD_PID_SETUP) {
DEBUG ((DEBUG_VERBOSE, "PID : Setup\n"));
-
} else if (QhHw->Pid == QTD_PID_INPUT) {
DEBUG ((DEBUG_VERBOSE, "PID : IN\n"));
-
} else if (QhHw->Pid == QTD_PID_OUTPUT) {
DEBUG ((DEBUG_VERBOSE, "PID : OUT\n"));
}
@@ -196,7 +193,6 @@ EhcDumpQh (
}
}
-
/**
Dump the buffer in the form of hex.
@@ -206,15 +202,15 @@ EhcDumpQh (
**/
VOID
EhcDumpBuf (
- IN UINT8 *Buf,
- IN UINTN Len
+ IN UINT8 *Buf,
+ IN UINTN Len
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < Len; Index++) {
if (Index % 16 == 0) {
- DEBUG ((DEBUG_VERBOSE,"\n"));
+ DEBUG ((DEBUG_VERBOSE, "\n"));
}
DEBUG ((DEBUG_VERBOSE, "%02x ", Buf[Index]));
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h
index eff85dcec8..2ed2d46f96 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciDebug.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_DEBUG_H_
#define _EFI_EHCI_DEBUG_H_
-
/**
Dump the fields of a QTD.
@@ -20,11 +19,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
EhcDumpQtd (
- IN EHC_QTD *Qtd,
- IN CHAR8 *Msg
+ IN EHC_QTD *Qtd,
+ IN CHAR8 *Msg
);
-
/**
Dump the queue head.
@@ -35,12 +33,11 @@ EhcDumpQtd (
**/
VOID
EhcDumpQh (
- IN EHC_QH *Qh,
- IN CHAR8 *Msg,
- IN BOOLEAN DumpBuf
+ IN EHC_QH *Qh,
+ IN CHAR8 *Msg,
+ IN BOOLEAN DumpBuf
);
-
/**
Dump the buffer in the form of hex.
@@ -50,9 +47,8 @@ EhcDumpQh (
**/
VOID
EhcDumpBuf (
- IN UINT8 *Buf,
- IN UINTN Len
+ IN UINT8 *Buf,
+ IN UINTN Len
);
-
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c
index 7bd01c1aee..912048eee9 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.c
@@ -7,10 +7,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Ehci.h"
-
/**
Read EHCI capability register.
@@ -23,18 +21,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT32
EhcReadCapRegister (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
Status = Ehc->PciIo->Mem.Read (
Ehc->PciIo,
EfiPciIoWidthUint32,
EHC_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
@@ -59,12 +57,12 @@ EhcReadCapRegister (
**/
UINT32
EhcReadDbgRegister (
- IN CONST USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN CONST USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
Status = Ehc->PciIo->Mem.Read (
Ehc->PciIo,
@@ -83,7 +81,6 @@ EhcReadDbgRegister (
return Data;
}
-
/**
Check whether the host controller has an in-use debug port.
@@ -105,11 +102,11 @@ EhcReadDbgRegister (
**/
BOOLEAN
EhcIsDebugPortInUse (
- IN CONST USB2_HC_DEV *Ehc,
- IN CONST UINT8 *PortNumber OPTIONAL
+ IN CONST USB2_HC_DEV *Ehc,
+ IN CONST UINT8 *PortNumber OPTIONAL
)
{
- UINT32 State;
+ UINT32 State;
if (Ehc->DebugPortNum == 0) {
//
@@ -121,7 +118,7 @@ EhcIsDebugPortInUse (
//
// The Debug Port Number field in HCSPARAMS is one-based.
//
- if (PortNumber != NULL && *PortNumber != Ehc->DebugPortNum - 1) {
+ if ((PortNumber != NULL) && (*PortNumber != Ehc->DebugPortNum - 1)) {
//
// The caller specified a port, but it's not the debug port of the host
// controller.
@@ -132,11 +129,10 @@ EhcIsDebugPortInUse (
//
// Deduce usage from the Control Register.
//
- State = EhcReadDbgRegister(Ehc, 0);
+ State = EhcReadDbgRegister (Ehc, 0);
return (State & USB_DEBUG_PORT_IN_USE_MASK) == USB_DEBUG_PORT_IN_USE_MASK;
}
-
/**
Read EHCI Operation register.
@@ -149,12 +145,12 @@ EhcIsDebugPortInUse (
**/
UINT32
EhcReadOpReg (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
ASSERT (Ehc->CapLen != 0);
@@ -175,7 +171,6 @@ EhcReadOpReg (
return Data;
}
-
/**
Write the data to the EHCI operation register.
@@ -186,12 +181,12 @@ EhcReadOpReg (
**/
VOID
EhcWriteOpReg (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Ehc->CapLen != 0);
@@ -209,7 +204,6 @@ EhcWriteOpReg (
}
}
-
/**
Set one bit of the operational register while keeping other bits.
@@ -220,19 +214,18 @@ EhcWriteOpReg (
**/
VOID
EhcSetOpRegBit (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data |= Bit;
EhcWriteOpReg (Ehc, Offset, Data);
}
-
/**
Clear one bit of the operational register while keeping other bits.
@@ -243,19 +236,18 @@ EhcSetOpRegBit (
**/
VOID
EhcClearOpRegBit (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data &= ~Bit;
EhcWriteOpReg (Ehc, Offset, Data);
}
-
/**
Wait the operation register's bit as specified by Bit
to become set (or clear).
@@ -272,14 +264,14 @@ EhcClearOpRegBit (
**/
EFI_STATUS
EhcWaitOpRegBit (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
)
{
- UINT32 Index;
+ UINT32 Index;
for (Index = 0; Index < Timeout / EHC_SYNC_POLL_INTERVAL + 1; Index++) {
if (EHC_REG_BIT_IS_SET (Ehc, Offset, Bit) == WaitToSet) {
@@ -292,7 +284,6 @@ EhcWaitOpRegBit (
return EFI_TIMEOUT;
}
-
/**
Add support for UEFI Over Legacy (UoL) feature, stop
the legacy USB SMI support.
@@ -302,13 +293,13 @@ EhcWaitOpRegBit (
**/
VOID
EhcClearLegacySupport (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
- UINT32 ExtendCap;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT32 Value;
- UINT32 TimeOut;
+ UINT32 ExtendCap;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 Value;
+ UINT32 TimeOut;
DEBUG ((DEBUG_INFO, "EhcClearLegacySupport: called to clear legacy support\n"));
@@ -337,8 +328,6 @@ EhcClearLegacySupport (
PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ExtendCap + 0x4, 1, &Value);
}
-
-
/**
Set door bell and wait it to be ACKed by host controller.
This function is used to synchronize with the hardware.
@@ -352,12 +341,12 @@ EhcClearLegacySupport (
**/
EFI_STATUS
EhcSetAndWaitDoorBell (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_IAAD);
@@ -376,7 +365,6 @@ EhcSetAndWaitDoorBell (
return Status;
}
-
/**
Clear all the interrutp status bits, these bits
are Write-Clean.
@@ -386,13 +374,12 @@ EhcSetAndWaitDoorBell (
**/
VOID
EhcAckAllInterrupt (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK);
}
-
/**
Enable the periodic schedule then wait EHC to
actually enable it.
@@ -406,11 +393,11 @@ EhcAckAllInterrupt (
**/
EFI_STATUS
EhcEnablePeriodSchd (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);
@@ -418,11 +405,6 @@ EhcEnablePeriodSchd (
return Status;
}
-
-
-
-
-
/**
Enable asynchrounous schedule.
@@ -435,11 +417,11 @@ EhcEnablePeriodSchd (
**/
EFI_STATUS
EhcEnableAsyncSchd (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_ASYNC);
@@ -447,12 +429,6 @@ EhcEnableAsyncSchd (
return Status;
}
-
-
-
-
-
-
/**
Whether Ehc is halted.
@@ -464,13 +440,12 @@ EhcEnableAsyncSchd (
**/
BOOLEAN
EhcIsHalt (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT);
}
-
/**
Whether system error occurred.
@@ -482,13 +457,12 @@ EhcIsHalt (
**/
BOOLEAN
EhcIsSysError (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR);
}
-
/**
Reset the host controller.
@@ -501,11 +475,11 @@ EhcIsSysError (
**/
EFI_STATUS
EhcResetHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Host can only be reset when it is halt. If not so, halt it
@@ -523,7 +497,6 @@ EhcResetHC (
return Status;
}
-
/**
Halt the host controller.
@@ -536,18 +509,17 @@ EhcResetHC (
**/
EFI_STATUS
EhcHaltHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcClearOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout);
return Status;
}
-
/**
Set the EHCI to run.
@@ -560,18 +532,17 @@ EhcHaltHC (
**/
EFI_STATUS
EhcRunHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, FALSE, Timeout);
return Status;
}
-
/**
Initialize the HC hardware.
EHCI spec lists the five things to do to initialize the hardware:
@@ -589,12 +560,12 @@ EhcRunHC (
**/
EFI_STATUS
EhcInitHC (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
- EFI_STATUS Status;
- UINT32 Index;
- UINT32 RegVal;
+ EFI_STATUS Status;
+ UINT32 Index;
+ UINT32 RegVal;
// This ASSERT crashes the BeagleBoard. There is some issue in the USB stack.
// This ASSERT needs to be removed so the BeagleBoard will boot. When we fix
@@ -629,15 +600,15 @@ EhcInitHC (
// 3. Power up all ports if EHCI has Port Power Control (PPC) support
//
if (Ehc->HcStructParams & HCSP_PPC) {
- for (Index = 0; Index < (UINT8) (Ehc->HcStructParams & HCSP_NPORTS); Index++) {
+ for (Index = 0; Index < (UINT8)(Ehc->HcStructParams & HCSP_NPORTS); Index++) {
//
// Do not clear port status bits on initialization. Otherwise devices will
// not enumerate properly at startup.
//
- RegVal = EhcReadOpReg(Ehc, (UINT32)(EHC_PORT_STAT_OFFSET + (4 * Index)));
+ RegVal = EhcReadOpReg (Ehc, (UINT32)(EHC_PORT_STAT_OFFSET + (4 * Index)));
RegVal &= ~PORTSC_CHANGE_MASK;
RegVal |= PORTSC_POWER;
- EhcWriteOpReg (Ehc, (UINT32) (EHC_PORT_STAT_OFFSET + (4 * Index)), RegVal);
+ EhcWriteOpReg (Ehc, (UINT32)(EHC_PORT_STAT_OFFSET + (4 * Index)), RegVal);
}
}
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
index 911cd2135f..064de362cb 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
@@ -14,20 +14,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// EHCI register offset
//
-
//
// Capability register offset
//
-#define EHC_CAPLENGTH_OFFSET 0 // Capability register length offset
-#define EHC_HCSPARAMS_OFFSET 0x04 // Structural Parameters 04-07h
-#define EHC_HCCPARAMS_OFFSET 0x08 // Capability parameters offset
+#define EHC_CAPLENGTH_OFFSET 0 // Capability register length offset
+#define EHC_HCSPARAMS_OFFSET 0x04 // Structural Parameters 04-07h
+#define EHC_HCCPARAMS_OFFSET 0x08 // Capability parameters offset
//
// Capability register bit definition
//
-#define HCSP_NPORTS 0x0F // Number of root hub port
-#define HCSP_PPC 0x10 // Port Power Control
-#define HCCP_64BIT 0x01 // 64-bit addressing capability
+#define HCSP_NPORTS 0x0F // Number of root hub port
+#define HCSP_PPC 0x10 // Port Power Control
+#define HCCP_64BIT 0x01 // 64-bit addressing capability
//
// Operational register offset
@@ -42,66 +41,66 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define EHC_CONFIG_FLAG_OFFSET 0x40 // Configure flag register offset
#define EHC_PORT_STAT_OFFSET 0x44 // Port status/control offset
-#define EHC_FRAME_LEN 1024
+#define EHC_FRAME_LEN 1024
//
// Register bit definition
//
-#define CONFIGFLAG_ROUTE_EHC 0x01 // Route port to EHC
-
-#define USBCMD_RUN 0x01 // Run/stop
-#define USBCMD_RESET 0x02 // Start the host controller reset
-#define USBCMD_ENABLE_PERIOD 0x10 // Enable periodic schedule
-#define USBCMD_ENABLE_ASYNC 0x20 // Enable asynchronous schedule
-#define USBCMD_IAAD 0x40 // Interrupt on async advance doorbell
-
-#define USBSTS_IAA 0x20 // Interrupt on async advance
-#define USBSTS_PERIOD_ENABLED 0x4000 // Periodic schedule status
-#define USBSTS_ASYNC_ENABLED 0x8000 // Asynchronous schedule status
-#define USBSTS_HALT 0x1000 // Host controller halted
-#define USBSTS_SYS_ERROR 0x10 // Host system error
-#define USBSTS_INTACK_MASK 0x003F // Mask for the interrupt ACK, the WC
+#define CONFIGFLAG_ROUTE_EHC 0x01 // Route port to EHC
+
+#define USBCMD_RUN 0x01 // Run/stop
+#define USBCMD_RESET 0x02 // Start the host controller reset
+#define USBCMD_ENABLE_PERIOD 0x10 // Enable periodic schedule
+#define USBCMD_ENABLE_ASYNC 0x20 // Enable asynchronous schedule
+#define USBCMD_IAAD 0x40 // Interrupt on async advance doorbell
+
+#define USBSTS_IAA 0x20 // Interrupt on async advance
+#define USBSTS_PERIOD_ENABLED 0x4000 // Periodic schedule status
+#define USBSTS_ASYNC_ENABLED 0x8000 // Asynchronous schedule status
+#define USBSTS_HALT 0x1000 // Host controller halted
+#define USBSTS_SYS_ERROR 0x10 // Host system error
+#define USBSTS_INTACK_MASK 0x003F // Mask for the interrupt ACK, the WC
// (write clean) bits in USBSTS register
-#define PORTSC_CONN 0x01 // Current Connect Status
-#define PORTSC_CONN_CHANGE 0x02 // Connect Status Change
-#define PORTSC_ENABLED 0x04 // Port Enable / Disable
-#define PORTSC_ENABLE_CHANGE 0x08 // Port Enable / Disable Change
-#define PORTSC_OVERCUR 0x10 // Over current Active
-#define PORTSC_OVERCUR_CHANGE 0x20 // Over current Change
-#define PORSTSC_RESUME 0x40 // Force Port Resume
-#define PORTSC_SUSPEND 0x80 // Port Suspend State
-#define PORTSC_RESET 0x100 // Port Reset
-#define PORTSC_LINESTATE_K 0x400 // Line Status K-state
-#define PORTSC_LINESTATE_J 0x800 // Line Status J-state
-#define PORTSC_POWER 0x1000 // Port Power
-#define PORTSC_OWNER 0x2000 // Port Owner
-#define PORTSC_CHANGE_MASK 0x2A // Mask of the port change bits,
+#define PORTSC_CONN 0x01 // Current Connect Status
+#define PORTSC_CONN_CHANGE 0x02 // Connect Status Change
+#define PORTSC_ENABLED 0x04 // Port Enable / Disable
+#define PORTSC_ENABLE_CHANGE 0x08 // Port Enable / Disable Change
+#define PORTSC_OVERCUR 0x10 // Over current Active
+#define PORTSC_OVERCUR_CHANGE 0x20 // Over current Change
+#define PORSTSC_RESUME 0x40 // Force Port Resume
+#define PORTSC_SUSPEND 0x80 // Port Suspend State
+#define PORTSC_RESET 0x100 // Port Reset
+#define PORTSC_LINESTATE_K 0x400 // Line Status K-state
+#define PORTSC_LINESTATE_J 0x800 // Line Status J-state
+#define PORTSC_POWER 0x1000 // Port Power
+#define PORTSC_OWNER 0x2000 // Port Owner
+#define PORTSC_CHANGE_MASK 0x2A // Mask of the port change bits,
// they are WC (write clean)
//
// PCI Configuration Registers
//
-#define EHC_BAR_INDEX 0 // how many bytes away from USB_BASE to 0x10
+#define EHC_BAR_INDEX 0 // how many bytes away from USB_BASE to 0x10
//
// Debug port capability id
//
-#define EHC_DEBUG_PORT_CAP_ID 0x0A
+#define EHC_DEBUG_PORT_CAP_ID 0x0A
-#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
+#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
#define EHC_ADDR(High, QhHw32) \
((VOID *) (UINTN) (LShiftU64 ((High), 32) | ((QhHw32) & 0xFFFFFFF0)))
-#define EHCI_IS_DATAIN(EndpointAddr) EHC_BIT_IS_SET((EndpointAddr), 0x80)
+#define EHCI_IS_DATAIN(EndpointAddr) EHC_BIT_IS_SET((EndpointAddr), 0x80)
//
// Structure to map the hardware port states to the
// UEFI's port states.
//
typedef struct {
- UINT16 HwState;
- UINT16 UefiState;
+ UINT16 HwState;
+ UINT16 UefiState;
} USB_PORT_STATE_MAP;
//
@@ -109,9 +108,9 @@ typedef struct {
//
#pragma pack(1)
typedef struct {
- UINT8 ProgInterface;
- UINT8 SubClassCode;
- UINT8 BaseCode;
+ UINT8 ProgInterface;
+ UINT8 SubClassCode;
+ UINT8 BaseCode;
} USB_CLASSC;
#pragma pack()
@@ -126,8 +125,8 @@ typedef struct {
**/
UINT32
EhcReadCapRegister (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
);
/**
@@ -151,8 +150,8 @@ EhcReadCapRegister (
**/
BOOLEAN
EhcIsDebugPortInUse (
- IN CONST USB2_HC_DEV *Ehc,
- IN CONST UINT8 *PortNumber OPTIONAL
+ IN CONST USB2_HC_DEV *Ehc,
+ IN CONST UINT8 *PortNumber OPTIONAL
);
/**
@@ -166,11 +165,10 @@ EhcIsDebugPortInUse (
**/
UINT32
EhcReadOpReg (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
);
-
/**
Write the data to the EHCI operation register.
@@ -181,9 +179,9 @@ EhcReadOpReg (
**/
VOID
EhcWriteOpReg (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -196,9 +194,9 @@ EhcWriteOpReg (
**/
VOID
EhcSetOpRegBit (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -211,9 +209,9 @@ EhcSetOpRegBit (
**/
VOID
EhcClearOpRegBit (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -225,11 +223,9 @@ EhcClearOpRegBit (
**/
VOID
EhcClearLegacySupport (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
-
/**
Set door bell and wait it to be ACKed by host controller.
This function is used to synchronize with the hardware.
@@ -243,11 +239,10 @@ EhcClearLegacySupport (
**/
EFI_STATUS
EhcSetAndWaitDoorBell (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
);
-
/**
Clear all the interrutp status bits, these bits are Write-Clean.
@@ -256,11 +251,9 @@ EhcSetAndWaitDoorBell (
**/
VOID
EhcAckAllInterrupt (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
-
/**
Whether Ehc is halted.
@@ -272,10 +265,9 @@ EhcAckAllInterrupt (
**/
BOOLEAN
EhcIsHalt (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
/**
Whether system error occurred.
@@ -287,10 +279,9 @@ EhcIsHalt (
**/
BOOLEAN
EhcIsSysError (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
/**
Reset the host controller.
@@ -303,11 +294,10 @@ EhcIsSysError (
**/
EFI_STATUS
EhcResetHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
);
-
/**
Halt the host controller.
@@ -320,11 +310,10 @@ EhcResetHC (
**/
EFI_STATUS
EhcHaltHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
);
-
/**
Set the EHCI to run.
@@ -337,12 +326,10 @@ EhcHaltHC (
**/
EFI_STATUS
EhcRunHC (
- IN USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
);
-
-
/**
Initialize the HC hardware.
EHCI spec lists the five things to do to initialize the hardware:
@@ -360,7 +347,7 @@ EhcRunHC (
**/
EFI_STATUS
EhcInitHC (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
index 34ee40c4bb..5da26afbe1 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ehci.h"
-
/**
Create helper QTD/QH for the EHCI device.
@@ -22,14 +21,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
EhcCreateHelpQ (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
- USB_ENDPOINT Ep;
- EHC_QH *Qh;
- QH_HW *QhHw;
- EHC_QTD *Qtd;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ USB_ENDPOINT Ep;
+ EHC_QH *Qh;
+ QH_HW *QhHw;
+ EHC_QTD *Qtd;
+ EFI_PHYSICAL_ADDRESS PciAddr;
//
// Create an inactive Qtd to terminate the short packet read.
@@ -40,25 +39,25 @@ EhcCreateHelpQ (
return EFI_OUT_OF_RESOURCES;
}
- Qtd->QtdHw.Status = QTD_STAT_HALTED;
- Ehc->ShortReadStop = Qtd;
+ Qtd->QtdHw.Status = QTD_STAT_HALTED;
+ Ehc->ShortReadStop = Qtd;
//
// Create a QH to act as the EHC reclamation header.
// Set the header to loopback to itself.
//
- Ep.DevAddr = 0;
- Ep.EpAddr = 1;
- Ep.Direction = EfiUsbDataIn;
- Ep.DevSpeed = EFI_USB_SPEED_HIGH;
- Ep.MaxPacket = 64;
- Ep.HubAddr = 0;
- Ep.HubPort = 0;
- Ep.Toggle = 0;
- Ep.Type = EHC_BULK_TRANSFER;
- Ep.PollRate = 1;
-
- Qh = EhcCreateQh (Ehc, &Ep);
+ Ep.DevAddr = 0;
+ Ep.EpAddr = 1;
+ Ep.Direction = EfiUsbDataIn;
+ Ep.DevSpeed = EFI_USB_SPEED_HIGH;
+ Ep.MaxPacket = 64;
+ Ep.HubAddr = 0;
+ Ep.HubPort = 0;
+ Ep.Toggle = 0;
+ Ep.Type = EHC_BULK_TRANSFER;
+ Ep.PollRate = 1;
+
+ Qh = EhcCreateQh (Ehc, &Ep);
if (Qh == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -66,7 +65,7 @@ EhcCreateHelpQ (
PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
QhHw = &Qh->QhHw;
- QhHw->HorizonLink = QH_LINK (PciAddr + OFFSET_OF(EHC_QH, QhHw), EHC_TYPE_QH, FALSE);
+ QhHw->HorizonLink = QH_LINK (PciAddr + OFFSET_OF (EHC_QH, QhHw), EHC_TYPE_QH, FALSE);
QhHw->Status = QTD_STAT_HALTED;
QhHw->ReclaimHead = 1;
Qh->NextQh = Qh;
@@ -75,10 +74,10 @@ EhcCreateHelpQ (
//
// Create a dummy QH to act as the terminator for periodical schedule
//
- Ep.EpAddr = 2;
- Ep.Type = EHC_INT_TRANSFER_SYNC;
+ Ep.EpAddr = 2;
+ Ep.Type = EHC_INT_TRANSFER_SYNC;
- Qh = EhcCreateQh (Ehc, &Ep);
+ Qh = EhcCreateQh (Ehc, &Ep);
if (Qh == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -90,7 +89,6 @@ EhcCreateHelpQ (
return EFI_SUCCESS;
}
-
/**
Initialize the schedule data structure such as frame list.
@@ -102,7 +100,7 @@ EhcCreateHelpQ (
**/
EFI_STATUS
EhcInitSched (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
EFI_PCI_IO_PROTOCOL *PciIo;
@@ -154,8 +152,8 @@ EhcInitSched (
return EFI_OUT_OF_RESOURCES;
}
- Ehc->PeriodFrame = Buf;
- Ehc->PeriodFrameMap = Map;
+ Ehc->PeriodFrame = Buf;
+ Ehc->PeriodFrameMap = Map;
//
// Program the FRAMELISTBASE register with the low 32 bit addr
@@ -191,13 +189,13 @@ EhcInitSched (
//
// Initialize the frame list entries then set the registers
//
- Ehc->PeriodFrameHost = AllocateZeroPool (EHC_FRAME_LEN * sizeof (UINTN));
+ Ehc->PeriodFrameHost = AllocateZeroPool (EHC_FRAME_LEN * sizeof (UINTN));
if (Ehc->PeriodFrameHost == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (EHC_QH));
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (EHC_QH));
for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
//
@@ -242,7 +240,6 @@ ErrorExit1:
return Status;
}
-
/**
Free the schedule data. It may be partially initialized.
@@ -251,10 +248,10 @@ ErrorExit1:
**/
VOID
EhcFreeSched (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0);
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0);
@@ -300,7 +297,6 @@ EhcFreeSched (
}
}
-
/**
Link the queue head to the asynchronous schedule list.
UEFI only supports one CTRL/BULK transfer at a time
@@ -314,30 +310,29 @@ EhcFreeSched (
**/
VOID
EhcLinkQhToAsync (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
)
{
- EHC_QH *Head;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ EHC_QH *Head;
+ EFI_PHYSICAL_ADDRESS PciAddr;
//
// Append the queue head after the reclaim header, then
// fix the hardware visiable parts (EHCI R1.0 page 72).
// ReclaimHead is always linked to the EHCI's AsynListAddr.
//
- Head = Ehc->ReclaimHead;
+ Head = Ehc->ReclaimHead;
- Qh->NextQh = Head->NextQh;
- Head->NextQh = Qh;
+ Qh->NextQh = Head->NextQh;
+ Head->NextQh = Qh;
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh->NextQh, sizeof (EHC_QH));
- Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head->NextQh, sizeof (EHC_QH));
- Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh->NextQh, sizeof (EHC_QH));
+ Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head->NextQh, sizeof (EHC_QH));
+ Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
}
-
/**
Unlink a queue head from the asynchronous schedule list.
Need to synchronize with hardware.
@@ -348,13 +343,13 @@ EhcLinkQhToAsync (
**/
VOID
EhcUnlinkQhFromAsync (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
)
{
- EHC_QH *Head;
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ EHC_QH *Head;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PciAddr;
ASSERT (Ehc->ReclaimHead->NextQh == Qh);
@@ -363,13 +358,13 @@ EhcUnlinkQhFromAsync (
// visiable part: Only need to loopback the ReclaimHead. The Qh
// is pointing to ReclaimHead (which is staill in the list).
//
- Head = Ehc->ReclaimHead;
+ Head = Ehc->ReclaimHead;
- Head->NextQh = Qh->NextQh;
- Qh->NextQh = NULL;
+ Head->NextQh = Qh->NextQh;
+ Qh->NextQh = NULL;
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head->NextQh, sizeof (EHC_QH));
- Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head->NextQh, sizeof (EHC_QH));
+ Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
//
// Set and wait the door bell to synchronize with the hardware
@@ -381,7 +376,6 @@ EhcUnlinkQhFromAsync (
}
}
-
/**
Link a queue head for interrupt transfer to the periodic
schedule frame list. This code is very much the same as
@@ -393,23 +387,23 @@ EhcUnlinkQhFromAsync (
**/
VOID
EhcLinkQhToPeriod (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
)
{
- UINTN Index;
- EHC_QH *Prev;
- EHC_QH *Next;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ UINTN Index;
+ EHC_QH *Prev;
+ EHC_QH *Next;
+ EFI_PHYSICAL_ADDRESS PciAddr;
for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
//
// First QH can't be NULL because we always keep PeriodOne
// heads on the frame list
//
- ASSERT (!EHC_LINK_TERMINATED (((UINT32*)Ehc->PeriodFrame)[Index]));
- Next = (EHC_QH*)((UINTN*)Ehc->PeriodFrameHost)[Index];
- Prev = NULL;
+ ASSERT (!EHC_LINK_TERMINATED (((UINT32 *)Ehc->PeriodFrame)[Index]));
+ Next = (EHC_QH *)((UINTN *)Ehc->PeriodFrameHost)[Index];
+ Prev = NULL;
//
// Now, insert the queue head (Qh) into this frame:
@@ -422,8 +416,8 @@ EhcLinkQhToPeriod (
// Then, insert the Qh between then
//
while (Next->Interval > Qh->Interval) {
- Prev = Next;
- Next = Next->NextQh;
+ Prev = Next;
+ Next = Next->NextQh;
}
ASSERT (Next != NULL);
@@ -449,15 +443,15 @@ EhcLinkQhToPeriod (
//
ASSERT ((Index == 0) && (Qh->NextQh == NULL));
- Prev = Next;
- Next = Next->NextQh;
+ Prev = Next;
+ Next = Next->NextQh;
- Qh->NextQh = Next;
- Prev->NextQh = Qh;
+ Qh->NextQh = Next;
+ Prev->NextQh = Qh;
- Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
- Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
+ Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
break;
}
@@ -467,24 +461,23 @@ EhcLinkQhToPeriod (
// guarranted by 2^n polling interval.
//
if (Qh->NextQh == NULL) {
- Qh->NextQh = Next;
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Next, sizeof (EHC_QH));
- Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ Qh->NextQh = Next;
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Next, sizeof (EHC_QH));
+ Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
}
PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
if (Prev == NULL) {
- ((UINT32*)Ehc->PeriodFrame)[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
- ((UINTN*)Ehc->PeriodFrameHost)[Index] = (UINTN)Qh;
+ ((UINT32 *)Ehc->PeriodFrame)[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ ((UINTN *)Ehc->PeriodFrameHost)[Index] = (UINTN)Qh;
} else {
- Prev->NextQh = Qh;
- Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
+ Prev->NextQh = Qh;
+ Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
}
}
}
-
/**
Unlink an interrupt queue head from the periodic
schedule frame list.
@@ -495,30 +488,30 @@ EhcLinkQhToPeriod (
**/
VOID
EhcUnlinkQhFromPeriod (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
)
{
- UINTN Index;
- EHC_QH *Prev;
- EHC_QH *This;
+ UINTN Index;
+ EHC_QH *Prev;
+ EHC_QH *This;
for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
//
// Frame link can't be NULL because we always keep PeroidOne
// on the frame list
//
- ASSERT (!EHC_LINK_TERMINATED (((UINT32*)Ehc->PeriodFrame)[Index]));
- This = (EHC_QH*)((UINTN*)Ehc->PeriodFrameHost)[Index];
- Prev = NULL;
+ ASSERT (!EHC_LINK_TERMINATED (((UINT32 *)Ehc->PeriodFrame)[Index]));
+ This = (EHC_QH *)((UINTN *)Ehc->PeriodFrameHost)[Index];
+ Prev = NULL;
//
// Walk through the frame's QH list to find the
// queue head to remove
//
while ((This != NULL) && (This != Qh)) {
- Prev = This;
- This = This->NextQh;
+ Prev = This;
+ This = This->NextQh;
}
//
@@ -533,16 +526,15 @@ EhcUnlinkQhFromPeriod (
//
// Qh is the first entry in the frame
//
- ((UINT32*)Ehc->PeriodFrame)[Index] = Qh->QhHw.HorizonLink;
- ((UINTN*)Ehc->PeriodFrameHost)[Index] = (UINTN)Qh->NextQh;
+ ((UINT32 *)Ehc->PeriodFrame)[Index] = Qh->QhHw.HorizonLink;
+ ((UINTN *)Ehc->PeriodFrameHost)[Index] = (UINTN)Qh->NextQh;
} else {
- Prev->NextQh = Qh->NextQh;
- Prev->QhHw.HorizonLink = Qh->QhHw.HorizonLink;
+ Prev->NextQh = Qh->NextQh;
+ Prev->QhHw.HorizonLink = Qh->QhHw.HorizonLink;
}
}
}
-
/**
Check the URB's execution result and update the URB's
result accordingly.
@@ -555,23 +547,23 @@ EhcUnlinkQhFromPeriod (
**/
BOOLEAN
EhcCheckUrbResult (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
)
{
- LIST_ENTRY *Entry;
- EHC_QTD *Qtd;
- QTD_HW *QtdHw;
- UINT8 State;
- BOOLEAN Finished;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ LIST_ENTRY *Entry;
+ EHC_QTD *Qtd;
+ QTD_HW *QtdHw;
+ UINT8 State;
+ BOOLEAN Finished;
+ EFI_PHYSICAL_ADDRESS PciAddr;
ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
- Finished = TRUE;
- Urb->Completed = 0;
+ Finished = TRUE;
+ Urb->Completed = 0;
- Urb->Result = EFI_USB_NOERROR;
+ Urb->Result = EFI_USB_NOERROR;
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
Urb->Result |= EFI_USB_ERR_SYSTEM;
@@ -581,7 +573,7 @@ EhcCheckUrbResult (
BASE_LIST_FOR_EACH (Entry, &Urb->Qh->Qtds) {
Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
QtdHw = &Qtd->QtdHw;
- State = (UINT8) QtdHw->Status;
+ State = (UINT8)QtdHw->Status;
if (EHC_BIT_IS_SET (State, QTD_STAT_HALTED)) {
//
@@ -606,7 +598,6 @@ EhcCheckUrbResult (
Finished = TRUE;
goto ON_EXIT;
-
} else if (EHC_BIT_IS_SET (State, QTD_STAT_ACTIVE)) {
//
// The QTD is still active, no need to check furthur.
@@ -615,7 +606,6 @@ EhcCheckUrbResult (
Finished = FALSE;
goto ON_EXIT;
-
} else {
//
// This QTD is finished OK or met short packet read. Update the
@@ -657,12 +647,11 @@ ON_EXIT:
// NOTICE: don't move DT update before the loop, otherwise there is
// a race condition that DT is wrong.
//
- Urb->DataToggle = (UINT8) Urb->Qh->QhHw.DataToggle;
+ Urb->DataToggle = (UINT8)Urb->Qh->QhHw.DataToggle;
return Finished;
}
-
/**
Execute the transfer by polling the URB. This is a synchronous operation.
@@ -677,16 +666,16 @@ ON_EXIT:
**/
EFI_STATUS
EhcExecTransfer (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb,
- IN UINTN TimeOut
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb,
+ IN UINTN TimeOut
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN Loop;
- BOOLEAN Finished;
- BOOLEAN InfiniteLoop;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN Loop;
+ BOOLEAN Finished;
+ BOOLEAN InfiniteLoop;
Status = EFI_SUCCESS;
Loop = TimeOut * EHC_1_MILLISECOND;
@@ -717,7 +706,6 @@ EhcExecTransfer (
EhcDumpQh (Urb->Qh, NULL, FALSE);
Status = EFI_TIMEOUT;
-
} else if (Urb->Result != EFI_USB_NOERROR) {
DEBUG ((DEBUG_ERROR, "EhcExecTransfer: transfer failed with %x\n", Urb->Result));
EhcDumpQh (Urb->Qh, NULL, FALSE);
@@ -728,7 +716,6 @@ EhcExecTransfer (
return Status;
}
-
/**
Delete a single asynchronous interrupt transfer for
the device and endpoint.
@@ -744,10 +731,10 @@ EhcExecTransfer (
**/
EFI_STATUS
EhciDelAsyncIntTransfer (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpNum,
- OUT UINT8 *DataToggle
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpNum,
+ OUT UINT8 *DataToggle
)
{
LIST_ENTRY *Entry;
@@ -762,7 +749,8 @@ EhciDelAsyncIntTransfer (
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
if ((Urb->Ep.DevAddr == DevAddr) && (Urb->Ep.EpAddr == EpNum) &&
- (Urb->Ep.Direction == Direction)) {
+ (Urb->Ep.Direction == Direction))
+ {
//
// Check the URB status to retrieve the next data toggle
// from the associated queue head.
@@ -782,7 +770,6 @@ EhciDelAsyncIntTransfer (
return EFI_NOT_FOUND;
}
-
/**
Remove all the asynchronous interrutp transfers.
@@ -791,12 +778,12 @@ EhciDelAsyncIntTransfer (
**/
VOID
EhciDelAllAsyncIntTransfers (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- URB *Urb;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ URB *Urb;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Ehc->AsyncIntTransfers) {
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
@@ -830,21 +817,21 @@ EhciDelAllAsyncIntTransfers (
**/
URB *
EhciInsertAsyncIntTransfer (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
)
{
- VOID *Data;
- URB *Urb;
+ VOID *Data;
+ URB *Urb;
Data = AllocatePool (DataLen);
@@ -899,16 +886,16 @@ EhciInsertAsyncIntTransfer (
**/
EFI_STATUS
EhcFlushAsyncIntMap (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN Len;
- VOID *Map;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN Len;
+ VOID *Map;
PciIo = Ehc->PciIo;
Len = Urb->DataLen;
@@ -931,15 +918,14 @@ EhcFlushAsyncIntMap (
goto ON_ERROR;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
return EFI_SUCCESS;
ON_ERROR:
return EFI_DEVICE_ERROR;
}
-
/**
Update the queue head for next round of asynchronous transfer.
@@ -949,17 +935,17 @@ ON_ERROR:
**/
VOID
EhcUpdateAsyncRequest (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
)
{
- LIST_ENTRY *Entry;
- EHC_QTD *FirstQtd;
- QH_HW *QhHw;
- EHC_QTD *Qtd;
- QTD_HW *QtdHw;
- UINTN Index;
- EFI_PHYSICAL_ADDRESS PciAddr;
+ LIST_ENTRY *Entry;
+ EHC_QTD *FirstQtd;
+ QH_HW *QhHw;
+ EHC_QTD *Qtd;
+ QTD_HW *QtdHw;
+ UINTN Index;
+ EFI_PHYSICAL_ADDRESS PciAddr;
Qtd = NULL;
@@ -985,13 +971,13 @@ EhcUpdateAsyncRequest (
QtdHw->Status = QTD_STAT_ACTIVE;
QtdHw->ErrCnt = QTD_MAX_ERR;
QtdHw->CurPage = 0;
- QtdHw->TotalBytes = (UINT32) Qtd->DataLen;
+ QtdHw->TotalBytes = (UINT32)Qtd->DataLen;
//
// calculate physical address by offset.
//
- PciAddr = (UINTN)Urb->DataPhy + ((UINTN)Qtd->Data - (UINTN)Urb->Data);
- QtdHw->Page[0] = EHC_LOW_32BIT (PciAddr);
- QtdHw->PageHigh[0]= EHC_HIGH_32BIT (PciAddr);
+ PciAddr = (UINTN)Urb->DataPhy + ((UINTN)Qtd->Data - (UINTN)Urb->Data);
+ QtdHw->Page[0] = EHC_LOW_32BIT (PciAddr);
+ QtdHw->PageHigh[0] = EHC_HIGH_32BIT (PciAddr);
}
//
@@ -1000,30 +986,29 @@ EhcUpdateAsyncRequest (
// zero out the overlay area and set NextQtd to the first
// QTD. DateToggle bit is left untouched.
//
- QhHw = &Urb->Qh->QhHw;
- QhHw->CurQtd = QTD_LINK (0, TRUE);
- QhHw->AltQtd = 0;
+ QhHw = &Urb->Qh->QhHw;
+ QhHw->CurQtd = QTD_LINK (0, TRUE);
+ QhHw->AltQtd = 0;
- QhHw->Status = 0;
- QhHw->Pid = 0;
- QhHw->ErrCnt = 0;
- QhHw->CurPage = 0;
- QhHw->Ioc = 0;
- QhHw->TotalBytes = 0;
+ QhHw->Status = 0;
+ QhHw->Pid = 0;
+ QhHw->ErrCnt = 0;
+ QhHw->CurPage = 0;
+ QhHw->Ioc = 0;
+ QhHw->TotalBytes = 0;
for (Index = 0; Index < 5; Index++) {
QhHw->Page[Index] = 0;
QhHw->PageHigh[Index] = 0;
}
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, FirstQtd, sizeof (EHC_QTD));
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, FirstQtd, sizeof (EHC_QTD));
QhHw->NextQtd = QTD_LINK (PciAddr, FALSE);
}
- return ;
+ return;
}
-
/**
Interrupt transfer periodic check handler.
@@ -1034,21 +1019,21 @@ EhcUpdateAsyncRequest (
VOID
EFIAPI
EhcMonitorAsyncRequests (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB2_HC_DEV *Ehc;
- EFI_TPL OldTpl;
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- BOOLEAN Finished;
- UINT8 *ProcBuf;
- URB *Urb;
- EFI_STATUS Status;
-
- OldTpl = gBS->RaiseTPL (EHC_TPL);
- Ehc = (USB2_HC_DEV *) Context;
+ USB2_HC_DEV *Ehc;
+ EFI_TPL OldTpl;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ BOOLEAN Finished;
+ UINT8 *ProcBuf;
+ URB *Urb;
+ EFI_STATUS Status;
+
+ OldTpl = gBS->RaiseTPL (EHC_TPL);
+ Ehc = (USB2_HC_DEV *)Context;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Ehc->AsyncIntTransfers) {
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
@@ -1113,7 +1098,7 @@ EhcMonitorAsyncRequests (
// his callback. Some drivers may has a lower TPL restriction.
//
gBS->RestoreTPL (OldTpl);
- (Urb->Callback) (ProcBuf, Urb->Completed, Urb->Context, Urb->Result);
+ (Urb->Callback)(ProcBuf, Urb->Completed, Urb->Context, Urb->Result);
OldTpl = gBS->RaiseTPL (EHC_TPL);
}
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h
index 34fb9a3be2..b5fc616952 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_SCHED_H_
#define _EFI_EHCI_SCHED_H_
-
/**
Initialize the schedule data structure such as frame list.
@@ -22,10 +21,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
EhcInitSched (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
/**
Free the schedule data. It may be partially initialized.
@@ -34,10 +32,9 @@ EhcInitSched (
**/
VOID
EhcFreeSched (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
-
/**
Link the queue head to the asynchronous schedule list.
UEFI only supports one CTRL/BULK transfer at a time
@@ -51,11 +48,10 @@ EhcFreeSched (
**/
VOID
EhcLinkQhToAsync (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
);
-
/**
Unlink a queue head from the asynchronous schedule list.
Need to synchronize with hardware.
@@ -66,11 +62,10 @@ EhcLinkQhToAsync (
**/
VOID
EhcUnlinkQhFromAsync (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
);
-
/**
Link a queue head for interrupt transfer to the periodic
schedule frame list. This code is very much the same as
@@ -82,11 +77,10 @@ EhcUnlinkQhFromAsync (
**/
VOID
EhcLinkQhToPeriod (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
);
-
/**
Unlink an interrupt queue head from the periodic
schedule frame list.
@@ -97,12 +91,10 @@ EhcLinkQhToPeriod (
**/
VOID
EhcUnlinkQhFromPeriod (
- IN USB2_HC_DEV *Ehc,
- IN EHC_QH *Qh
+ IN USB2_HC_DEV *Ehc,
+ IN EHC_QH *Qh
);
-
-
/**
Execute the transfer by polling the URB. This is a synchronous operation.
@@ -117,12 +109,11 @@ EhcUnlinkQhFromPeriod (
**/
EFI_STATUS
EhcExecTransfer (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb,
- IN UINTN TimeOut
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb,
+ IN UINTN TimeOut
);
-
/**
Delete a single asynchronous interrupt transfer for
the device and endpoint.
@@ -138,13 +129,12 @@ EhcExecTransfer (
**/
EFI_STATUS
EhciDelAsyncIntTransfer (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpNum,
- OUT UINT8 *DataToggle
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpNum,
+ OUT UINT8 *DataToggle
);
-
/**
Remove all the asynchronous interrutp transfers.
@@ -153,7 +143,7 @@ EhciDelAsyncIntTransfer (
**/
VOID
EhciDelAllAsyncIntTransfers (
- IN USB2_HC_DEV *Ehc
+ IN USB2_HC_DEV *Ehc
);
/**
@@ -177,17 +167,17 @@ EhciDelAllAsyncIntTransfers (
**/
URB *
EhciInsertAsyncIntTransfer (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
);
/**
@@ -200,8 +190,8 @@ EhciInsertAsyncIntTransfer (
VOID
EFIAPI
EhcMonitorAsyncRequests (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
index 37cef6d130..a2b0b99d33 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Ehci.h"
-
/**
Create a single QTD to hold the data.
@@ -28,20 +27,20 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EHC_QTD *
EhcCreateQtd (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN UINT8 PktId,
- IN UINT8 Toggle,
- IN UINTN MaxPacket
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN UINT8 PktId,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket
)
{
- EHC_QTD *Qtd;
- QTD_HW *QtdHw;
- UINTN Index;
- UINTN Len;
- UINTN ThisBufLen;
+ EHC_QTD *Qtd;
+ QTD_HW *QtdHw;
+ UINTN Index;
+ UINTN Len;
+ UINTN ThisBufLen;
ASSERT (Ehc != NULL);
@@ -51,9 +50,9 @@ EhcCreateQtd (
return NULL;
}
- Qtd->Signature = EHC_QTD_SIG;
- Qtd->Data = Data;
- Qtd->DataLen = 0;
+ Qtd->Signature = EHC_QTD_SIG;
+ Qtd->Data = Data;
+ Qtd->DataLen = 0;
InitializeListHead (&Qtd->QtdList);
@@ -79,18 +78,18 @@ EhcCreateQtd (
// compute the offset and clear Reserved fields. This is already
// done in the data point.
//
- QtdHw->Page[Index] = EHC_LOW_32BIT (DataPhy);
- QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (DataPhy);
+ QtdHw->Page[Index] = EHC_LOW_32BIT (DataPhy);
+ QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (DataPhy);
- ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (DataPhy) & QTD_BUF_MASK);
+ ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (DataPhy) & QTD_BUF_MASK);
if (Len + ThisBufLen >= DataLen) {
Len = DataLen;
break;
}
- Len += ThisBufLen;
- Data += ThisBufLen;
+ Len += ThisBufLen;
+ Data += ThisBufLen;
DataPhy += ThisBufLen;
}
@@ -104,15 +103,13 @@ EhcCreateQtd (
Len = Len - Len % MaxPacket;
}
- QtdHw->TotalBytes = (UINT32) Len;
+ QtdHw->TotalBytes = (UINT32)Len;
Qtd->DataLen = Len;
}
return Qtd;
}
-
-
/**
Initialize the queue head for interrupt transfer,
that is, initialize the following three fields:
@@ -126,8 +123,8 @@ EhcCreateQtd (
**/
VOID
EhcInitIntQh (
- IN USB_ENDPOINT *Ep,
- IN QH_HW *QhHw
+ IN USB_ENDPOINT *Ep,
+ IN QH_HW *QhHw
)
{
//
@@ -139,7 +136,7 @@ EhcInitIntQh (
//
if (Ep->DevSpeed == EFI_USB_SPEED_HIGH) {
QhHw->SMask = QH_MICROFRAME_0;
- return ;
+ return;
}
//
@@ -157,8 +154,6 @@ EhcInitIntQh (
QhHw->CMask = QH_MICROFRAME_3 | QH_MICROFRAME_4 | QH_MICROFRAME_5;
}
-
-
/**
Allocate and initialize a EHCI queue head.
@@ -170,12 +165,12 @@ EhcInitIntQh (
**/
EHC_QH *
EhcCreateQh (
- IN USB2_HC_DEV *Ehci,
- IN USB_ENDPOINT *Ep
+ IN USB2_HC_DEV *Ehci,
+ IN USB_ENDPOINT *Ep
)
{
- EHC_QH *Qh;
- QH_HW *QhHw;
+ EHC_QH *Qh;
+ QH_HW *QhHw;
Qh = UsbHcAllocateMem (Ehci->MemPool, sizeof (EHC_QH));
@@ -183,68 +178,68 @@ EhcCreateQh (
return NULL;
}
- Qh->Signature = EHC_QH_SIG;
- Qh->NextQh = NULL;
- Qh->Interval = Ep->PollRate;
+ Qh->Signature = EHC_QH_SIG;
+ Qh->NextQh = NULL;
+ Qh->Interval = Ep->PollRate;
InitializeListHead (&Qh->Qtds);
- QhHw = &Qh->QhHw;
- QhHw->HorizonLink = QH_LINK (NULL, 0, TRUE);
- QhHw->DeviceAddr = Ep->DevAddr;
- QhHw->Inactive = 0;
- QhHw->EpNum = Ep->EpAddr;
- QhHw->EpSpeed = Ep->DevSpeed;
- QhHw->DtCtrl = 0;
- QhHw->ReclaimHead = 0;
- QhHw->MaxPacketLen = (UINT32) Ep->MaxPacket;
- QhHw->CtrlEp = 0;
- QhHw->NakReload = QH_NAK_RELOAD;
- QhHw->HubAddr = Ep->HubAddr;
- QhHw->PortNum = Ep->HubPort;
- QhHw->Multiplier = 1;
- QhHw->DataToggle = Ep->Toggle;
+ QhHw = &Qh->QhHw;
+ QhHw->HorizonLink = QH_LINK (NULL, 0, TRUE);
+ QhHw->DeviceAddr = Ep->DevAddr;
+ QhHw->Inactive = 0;
+ QhHw->EpNum = Ep->EpAddr;
+ QhHw->EpSpeed = Ep->DevSpeed;
+ QhHw->DtCtrl = 0;
+ QhHw->ReclaimHead = 0;
+ QhHw->MaxPacketLen = (UINT32)Ep->MaxPacket;
+ QhHw->CtrlEp = 0;
+ QhHw->NakReload = QH_NAK_RELOAD;
+ QhHw->HubAddr = Ep->HubAddr;
+ QhHw->PortNum = Ep->HubPort;
+ QhHw->Multiplier = 1;
+ QhHw->DataToggle = Ep->Toggle;
if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
QhHw->Status |= QTD_STAT_DO_SS;
}
switch (Ep->Type) {
- case EHC_CTRL_TRANSFER:
- //
- // Special initialization for the control transfer:
- // 1. Control transfer initialize data toggle from each QTD
- // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
- //
- QhHw->DtCtrl = 1;
+ case EHC_CTRL_TRANSFER:
+ //
+ // Special initialization for the control transfer:
+ // 1. Control transfer initialize data toggle from each QTD
+ // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
+ //
+ QhHw->DtCtrl = 1;
- if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
- QhHw->CtrlEp = 1;
- }
- break;
+ if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
+ QhHw->CtrlEp = 1;
+ }
- case EHC_INT_TRANSFER_ASYNC:
- case EHC_INT_TRANSFER_SYNC:
- //
- // Special initialization for the interrupt transfer
- // to set the S-Mask and C-Mask
- //
- QhHw->NakReload = 0;
- EhcInitIntQh (Ep, QhHw);
- break;
+ break;
- case EHC_BULK_TRANSFER:
- if ((Ep->DevSpeed == EFI_USB_SPEED_HIGH) && (Ep->Direction == EfiUsbDataOut)) {
- QhHw->Status |= QTD_STAT_DO_PING;
- }
+ case EHC_INT_TRANSFER_ASYNC:
+ case EHC_INT_TRANSFER_SYNC:
+ //
+ // Special initialization for the interrupt transfer
+ // to set the S-Mask and C-Mask
+ //
+ QhHw->NakReload = 0;
+ EhcInitIntQh (Ep, QhHw);
+ break;
+
+ case EHC_BULK_TRANSFER:
+ if ((Ep->DevSpeed == EFI_USB_SPEED_HIGH) && (Ep->Direction == EfiUsbDataOut)) {
+ QhHw->Status |= QTD_STAT_DO_PING;
+ }
- break;
+ break;
}
return Qh;
}
-
/**
Convert the poll interval from application to that
be used by EHCI interface data structure. Only need
@@ -260,10 +255,10 @@ EhcCreateQh (
**/
UINTN
EhcConvertPollRate (
- IN UINTN Interval
+ IN UINTN Interval
)
{
- UINTN BitCount;
+ UINTN BitCount;
if (Interval == 0) {
return 1;
@@ -282,7 +277,6 @@ EhcConvertPollRate (
return (UINTN)1 << (BitCount - 1);
}
-
/**
Free a list of QTDs.
@@ -292,13 +286,13 @@ EhcConvertPollRate (
**/
VOID
EhcFreeQtds (
- IN USB2_HC_DEV *Ehc,
- IN LIST_ENTRY *Qtds
+ IN USB2_HC_DEV *Ehc,
+ IN LIST_ENTRY *Qtds
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- EHC_QTD *Qtd;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ EHC_QTD *Qtd;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, Qtds) {
Qtd = EFI_LIST_CONTAINER (Entry, EHC_QTD, QtdList);
@@ -308,7 +302,6 @@ EhcFreeQtds (
}
}
-
/**
Free an allocated URB. It is possible for it to be partially inited.
@@ -318,11 +311,11 @@ EhcFreeQtds (
**/
VOID
EhcFreeUrb (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = Ehc->PciIo;
@@ -346,7 +339,6 @@ EhcFreeUrb (
gBS->FreePool (Urb);
}
-
/**
Create a list of QTDs for the URB.
@@ -359,21 +351,21 @@ EhcFreeUrb (
**/
EFI_STATUS
EhcCreateQtds (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
)
{
- USB_ENDPOINT *Ep;
- EHC_QH *Qh;
- EHC_QTD *Qtd;
- EHC_QTD *StatusQtd;
- EHC_QTD *NextQtd;
- LIST_ENTRY *Entry;
- UINT32 AlterNext;
- UINT8 Toggle;
- UINTN Len;
- UINT8 Pid;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ USB_ENDPOINT *Ep;
+ EHC_QH *Qh;
+ EHC_QTD *Qtd;
+ EHC_QTD *StatusQtd;
+ EHC_QTD *NextQtd;
+ LIST_ENTRY *Entry;
+ UINT32 AlterNext;
+ UINT8 Toggle;
+ UINTN Len;
+ UINT8 Pid;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT ((Urb != NULL) && (Urb->Qh != NULL));
@@ -389,7 +381,7 @@ EhcCreateQtds (
StatusQtd = NULL;
AlterNext = QTD_LINK (NULL, TRUE);
- PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
+ PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
if (Ep->Direction == EfiUsbDataIn) {
AlterNext = QTD_LINK (PhyAddr, FALSE);
}
@@ -448,8 +440,8 @@ EhcCreateQtds (
while (Len < Urb->DataLen) {
Qtd = EhcCreateQtd (
Ehc,
- (UINT8 *) Urb->Data + Len,
- (UINT8 *) Urb->DataPhy + Len,
+ (UINT8 *)Urb->Data + Len,
+ (UINT8 *)Urb->DataPhy + Len,
Urb->DataLen - Len,
Pid,
Toggle,
@@ -467,7 +459,7 @@ EhcCreateQtds (
// Switch the Toggle bit if odd number of packets are included in the QTD.
//
if (((Qtd->DataLen + Ep->MaxPacket - 1) / Ep->MaxPacket) % 2) {
- Toggle = (UINT8) (1 - Toggle);
+ Toggle = (UINT8)(1 - Toggle);
}
Len += Qtd->DataLen;
@@ -493,17 +485,17 @@ EhcCreateQtds (
break;
}
- NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, EHC_QTD, QtdList);
- PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
- Qtd->QtdHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
+ NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, EHC_QTD, QtdList);
+ PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
+ Qtd->QtdHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
}
//
// Link the QTDs to the queue head
//
- NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, EHC_QTD, QtdList);
- PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
- Qh->QhHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
+ NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, EHC_QTD, QtdList);
+ PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
+ Qh->QhHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
return EFI_SUCCESS;
ON_ERROR:
@@ -511,7 +503,6 @@ ON_ERROR:
return EFI_OUT_OF_RESOURCES;
}
-
/**
Create a new URB and its associated QTD.
@@ -535,30 +526,30 @@ ON_ERROR:
**/
URB *
EhcCreateUrb (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
)
{
- USB_ENDPOINT *Ep;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINTN Len;
- URB *Urb;
- VOID *Map;
+ USB_ENDPOINT *Ep;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINTN Len;
+ URB *Urb;
+ VOID *Map;
Urb = AllocateZeroPool (sizeof (URB));
@@ -566,38 +557,38 @@ EhcCreateUrb (
return NULL;
}
- Urb->Signature = EHC_URB_SIG;
+ Urb->Signature = EHC_URB_SIG;
InitializeListHead (&Urb->UrbList);
- Ep = &Urb->Ep;
- Ep->DevAddr = DevAddr;
- Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
- Ep->Direction = (((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut);
- Ep->DevSpeed = DevSpeed;
- Ep->MaxPacket = MaxPacket;
+ Ep = &Urb->Ep;
+ Ep->DevAddr = DevAddr;
+ Ep->EpAddr = (UINT8)(EpAddr & 0x0F);
+ Ep->Direction = (((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut);
+ Ep->DevSpeed = DevSpeed;
+ Ep->MaxPacket = MaxPacket;
- Ep->HubAddr = 0;
- Ep->HubPort = 0;
+ Ep->HubAddr = 0;
+ Ep->HubPort = 0;
if (DevSpeed != EFI_USB_SPEED_HIGH) {
ASSERT (Hub != NULL);
- Ep->HubAddr = Hub->TranslatorHubAddress;
- Ep->HubPort = Hub->TranslatorPortNumber;
+ Ep->HubAddr = Hub->TranslatorHubAddress;
+ Ep->HubPort = Hub->TranslatorPortNumber;
}
- Ep->Toggle = Toggle;
- Ep->Type = Type;
- Ep->PollRate = EhcConvertPollRate (Interval);
+ Ep->Toggle = Toggle;
+ Ep->Type = Type;
+ Ep->PollRate = EhcConvertPollRate (Interval);
- Urb->Request = Request;
- Urb->Data = Data;
- Urb->DataLen = DataLen;
- Urb->Callback = Callback;
- Urb->Context = Context;
+ Urb->Request = Request;
+ Urb->Data = Data;
+ Urb->DataLen = DataLen;
+ Urb->Callback = Callback;
+ Urb->Context = Context;
- PciIo = Ehc->PciIo;
- Urb->Qh = EhcCreateQh (Ehc, &Urb->Ep);
+ PciIo = Ehc->PciIo;
+ Urb->Qh = EhcCreateQh (Ehc, &Urb->Ep);
if (Urb->Qh == NULL) {
goto ON_ERROR;
@@ -607,20 +598,20 @@ EhcCreateUrb (
// Map the request and user data
//
if (Request != NULL) {
- Len = sizeof (EFI_USB_DEVICE_REQUEST);
- MapOp = EfiPciIoOperationBusMasterRead;
- Status = PciIo->Map (PciIo, MapOp, Request, &Len, &PhyAddr, &Map);
+ Len = sizeof (EFI_USB_DEVICE_REQUEST);
+ MapOp = EfiPciIoOperationBusMasterRead;
+ Status = PciIo->Map (PciIo, MapOp, Request, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != sizeof (EFI_USB_DEVICE_REQUEST))) {
goto ON_ERROR;
}
- Urb->RequestPhy = (VOID *) ((UINTN) PhyAddr);
+ Urb->RequestPhy = (VOID *)((UINTN)PhyAddr);
Urb->RequestMap = Map;
}
if (Data != NULL) {
- Len = DataLen;
+ Len = DataLen;
if (Ep->Direction == EfiUsbDataIn) {
MapOp = EfiPciIoOperationBusMasterWrite;
@@ -628,14 +619,14 @@ EhcCreateUrb (
MapOp = EfiPciIoOperationBusMasterRead;
}
- Status = PciIo->Map (PciIo, MapOp, Data, &Len, &PhyAddr, &Map);
+ Status = PciIo->Map (PciIo, MapOp, Data, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != DataLen)) {
goto ON_ERROR;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
}
Status = EhcCreateQtds (Ehc, Urb);
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
index 6342bf6b1c..ae8bfc2ba7 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_URB_H_
#define _EFI_EHCI_URB_H_
-
typedef struct _EHC_QTD EHC_QTD;
typedef struct _EHC_QH EHC_QH;
typedef struct _URB URB;
@@ -24,51 +23,51 @@ typedef struct _URB URB;
#define EHC_INT_TRANSFER_SYNC 0x04
#define EHC_INT_TRANSFER_ASYNC 0x08
-#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')
-#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')
-#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
+#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')
+#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')
+#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
//
// Hardware related bit definitions
//
-#define EHC_TYPE_ITD 0x00
-#define EHC_TYPE_QH 0x02
-#define EHC_TYPE_SITD 0x04
-#define EHC_TYPE_FSTN 0x06
-
-#define QH_NAK_RELOAD 3
-#define QH_HSHBW_MULTI 1
-
-#define QTD_MAX_ERR 3
-#define QTD_PID_OUTPUT 0x00
-#define QTD_PID_INPUT 0x01
-#define QTD_PID_SETUP 0x02
-
-#define QTD_STAT_DO_OUT 0
-#define QTD_STAT_DO_SS 0
-#define QTD_STAT_DO_PING 0x01
-#define QTD_STAT_DO_CS 0x02
-#define QTD_STAT_TRANS_ERR 0x08
-#define QTD_STAT_BABBLE_ERR 0x10
-#define QTD_STAT_BUFF_ERR 0x20
-#define QTD_STAT_HALTED 0x40
-#define QTD_STAT_ACTIVE 0x80
-#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)
-
-#define QTD_MAX_BUFFER 4
-#define QTD_BUF_LEN 4096
-#define QTD_BUF_MASK 0x0FFF
-
-#define QH_MICROFRAME_0 0x01
-#define QH_MICROFRAME_1 0x02
-#define QH_MICROFRAME_2 0x04
-#define QH_MICROFRAME_3 0x08
-#define QH_MICROFRAME_4 0x10
-#define QH_MICROFRAME_5 0x20
-#define QH_MICROFRAME_6 0x40
-#define QH_MICROFRAME_7 0x80
-
-#define USB_ERR_SHORT_PACKET 0x200
+#define EHC_TYPE_ITD 0x00
+#define EHC_TYPE_QH 0x02
+#define EHC_TYPE_SITD 0x04
+#define EHC_TYPE_FSTN 0x06
+
+#define QH_NAK_RELOAD 3
+#define QH_HSHBW_MULTI 1
+
+#define QTD_MAX_ERR 3
+#define QTD_PID_OUTPUT 0x00
+#define QTD_PID_INPUT 0x01
+#define QTD_PID_SETUP 0x02
+
+#define QTD_STAT_DO_OUT 0
+#define QTD_STAT_DO_SS 0
+#define QTD_STAT_DO_PING 0x01
+#define QTD_STAT_DO_CS 0x02
+#define QTD_STAT_TRANS_ERR 0x08
+#define QTD_STAT_BABBLE_ERR 0x10
+#define QTD_STAT_BUFF_ERR 0x20
+#define QTD_STAT_HALTED 0x40
+#define QTD_STAT_ACTIVE 0x80
+#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)
+
+#define QTD_MAX_BUFFER 4
+#define QTD_BUF_LEN 4096
+#define QTD_BUF_MASK 0x0FFF
+
+#define QH_MICROFRAME_0 0x01
+#define QH_MICROFRAME_1 0x02
+#define QH_MICROFRAME_2 0x04
+#define QH_MICROFRAME_3 0x08
+#define QH_MICROFRAME_4 0x10
+#define QH_MICROFRAME_5 0x20
+#define QH_MICROFRAME_6 0x40
+#define QH_MICROFRAME_7 0x80
+
+#define USB_ERR_SHORT_PACKET 0x200
//
// Fill in the hardware link point: pass in a EHC_QH/QH_HW
@@ -77,7 +76,7 @@ typedef struct _URB URB;
#define QH_LINK(Addr, Type, Term) \
((UINT32) ((EHC_LOW_32BIT (Addr) & 0xFFFFFFE0) | (Type) | ((Term) ? 1 : 0)))
-#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
+#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
//
// The defination of EHCI hardware used data structure for
@@ -87,77 +86,76 @@ typedef struct _URB URB;
//
#pragma pack(1)
typedef struct {
- UINT32 NextQtd;
- UINT32 AltNext;
-
- UINT32 Status : 8;
- UINT32 Pid : 2;
- UINT32 ErrCnt : 2;
- UINT32 CurPage : 3;
- UINT32 Ioc : 1;
- UINT32 TotalBytes : 15;
- UINT32 DataToggle : 1;
-
- UINT32 Page[5];
- UINT32 PageHigh[5];
+ UINT32 NextQtd;
+ UINT32 AltNext;
+
+ UINT32 Status : 8;
+ UINT32 Pid : 2;
+ UINT32 ErrCnt : 2;
+ UINT32 CurPage : 3;
+ UINT32 Ioc : 1;
+ UINT32 TotalBytes : 15;
+ UINT32 DataToggle : 1;
+
+ UINT32 Page[5];
+ UINT32 PageHigh[5];
} QTD_HW;
typedef struct {
- UINT32 HorizonLink;
+ UINT32 HorizonLink;
//
// Endpoint capabilities/Characteristics DWord 1 and DWord 2
//
- UINT32 DeviceAddr : 7;
- UINT32 Inactive : 1;
- UINT32 EpNum : 4;
- UINT32 EpSpeed : 2;
- UINT32 DtCtrl : 1;
- UINT32 ReclaimHead : 1;
- UINT32 MaxPacketLen : 11;
- UINT32 CtrlEp : 1;
- UINT32 NakReload : 4;
-
- UINT32 SMask : 8;
- UINT32 CMask : 8;
- UINT32 HubAddr : 7;
- UINT32 PortNum : 7;
- UINT32 Multiplier : 2;
+ UINT32 DeviceAddr : 7;
+ UINT32 Inactive : 1;
+ UINT32 EpNum : 4;
+ UINT32 EpSpeed : 2;
+ UINT32 DtCtrl : 1;
+ UINT32 ReclaimHead : 1;
+ UINT32 MaxPacketLen : 11;
+ UINT32 CtrlEp : 1;
+ UINT32 NakReload : 4;
+
+ UINT32 SMask : 8;
+ UINT32 CMask : 8;
+ UINT32 HubAddr : 7;
+ UINT32 PortNum : 7;
+ UINT32 Multiplier : 2;
//
// Transaction execution overlay area
//
- UINT32 CurQtd;
- UINT32 NextQtd;
- UINT32 AltQtd;
-
- UINT32 Status : 8;
- UINT32 Pid : 2;
- UINT32 ErrCnt : 2;
- UINT32 CurPage : 3;
- UINT32 Ioc : 1;
- UINT32 TotalBytes : 15;
- UINT32 DataToggle : 1;
-
- UINT32 Page[5];
- UINT32 PageHigh[5];
+ UINT32 CurQtd;
+ UINT32 NextQtd;
+ UINT32 AltQtd;
+
+ UINT32 Status : 8;
+ UINT32 Pid : 2;
+ UINT32 ErrCnt : 2;
+ UINT32 CurPage : 3;
+ UINT32 Ioc : 1;
+ UINT32 TotalBytes : 15;
+ UINT32 DataToggle : 1;
+
+ UINT32 Page[5];
+ UINT32 PageHigh[5];
} QH_HW;
#pragma pack()
-
//
// Endpoint address and its capabilities
//
typedef struct _USB_ENDPOINT {
- UINT8 DevAddr;
- UINT8 EpAddr; // Endpoint address, no direction encoded in
- EFI_USB_DATA_DIRECTION Direction;
- UINT8 DevSpeed;
- UINTN MaxPacket;
- UINT8 HubAddr;
- UINT8 HubPort;
- UINT8 Toggle; // Data toggle, not used for control transfer
- UINTN Type;
- UINTN PollRate; // Polling interval used by EHCI
+ UINT8 DevAddr;
+ UINT8 EpAddr; // Endpoint address, no direction encoded in
+ EFI_USB_DATA_DIRECTION Direction;
+ UINT8 DevSpeed;
+ UINTN MaxPacket;
+ UINT8 HubAddr;
+ UINT8 HubPort;
+ UINT8 Toggle; // Data toggle, not used for control transfer
+ UINTN Type;
+ UINTN PollRate; // Polling interval used by EHCI
} USB_ENDPOINT;
//
@@ -165,11 +163,11 @@ typedef struct _USB_ENDPOINT {
// QTD generated from a URB. Don't add fields before QtdHw.
//
struct _EHC_QTD {
- QTD_HW QtdHw;
- UINT32 Signature;
- LIST_ENTRY QtdList; // The list of QTDs to one end point
- UINT8 *Data; // Buffer of the original data
- UINTN DataLen; // Original amount of data in this QTD
+ QTD_HW QtdHw;
+ UINT32 Signature;
+ LIST_ENTRY QtdList; // The list of QTDs to one end point
+ UINT8 *Data; // Buffer of the original data
+ UINTN DataLen; // Original amount of data in this QTD
};
//
@@ -188,11 +186,11 @@ struct _EHC_QTD {
// as the reclamation header. New transfer is inserted after this QH.
//
struct _EHC_QH {
- QH_HW QhHw;
- UINT32 Signature;
- EHC_QH *NextQh; // The queue head pointed to by horizontal link
- LIST_ENTRY Qtds; // The list of QTDs to this queue head
- UINTN Interval;
+ QH_HW QhHw;
+ UINT32 Signature;
+ EHC_QH *NextQh; // The queue head pointed to by horizontal link
+ LIST_ENTRY Qtds; // The list of QTDs to this queue head
+ UINTN Interval;
};
//
@@ -200,38 +198,36 @@ struct _EHC_QH {
// usb requests.
//
struct _URB {
- UINT32 Signature;
- LIST_ENTRY UrbList;
+ UINT32 Signature;
+ LIST_ENTRY UrbList;
//
// Transaction information
//
- USB_ENDPOINT Ep;
- EFI_USB_DEVICE_REQUEST *Request; // Control transfer only
- VOID *RequestPhy; // Address of the mapped request
- VOID *RequestMap;
- VOID *Data;
- UINTN DataLen;
- VOID *DataPhy; // Address of the mapped user data
- VOID *DataMap;
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
- VOID *Context;
+ USB_ENDPOINT Ep;
+ EFI_USB_DEVICE_REQUEST *Request; // Control transfer only
+ VOID *RequestPhy; // Address of the mapped request
+ VOID *RequestMap;
+ VOID *Data;
+ UINTN DataLen;
+ VOID *DataPhy; // Address of the mapped user data
+ VOID *DataMap;
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
+ VOID *Context;
//
// Schedule data
//
- EHC_QH *Qh;
+ EHC_QH *Qh;
//
// Transaction result
//
- UINT32 Result;
- UINTN Completed; // completed data length
- UINT8 DataToggle;
+ UINT32 Result;
+ UINTN Completed; // completed data length
+ UINT8 DataToggle;
};
-
-
/**
Create a single QTD to hold the data.
@@ -248,17 +244,15 @@ struct _URB {
**/
EHC_QTD *
EhcCreateQtd (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN UINT8 PktId,
- IN UINT8 Toggle,
- IN UINTN MaxPacket
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN UINT8 PktId,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket
);
-
-
/**
Allocate and initialize a EHCI queue head.
@@ -270,11 +264,10 @@ EhcCreateQtd (
**/
EHC_QH *
EhcCreateQh (
- IN USB2_HC_DEV *Ehci,
- IN USB_ENDPOINT *Ep
+ IN USB2_HC_DEV *Ehci,
+ IN USB_ENDPOINT *Ep
);
-
/**
Free an allocated URB. It is possible for it to be partially inited.
@@ -284,11 +277,10 @@ EhcCreateQh (
**/
VOID
EhcFreeUrb (
- IN USB2_HC_DEV *Ehc,
- IN URB *Urb
+ IN USB2_HC_DEV *Ehc,
+ IN URB *Urb
);
-
/**
Create a new URB and its associated QTD.
@@ -312,19 +304,20 @@ EhcFreeUrb (
**/
URB *
EhcCreateUrb (
- IN USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
);
+
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c
index f39d0b57c0..0a3ceb9f71 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.c
@@ -7,10 +7,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Ehci.h"
-
/**
Allocate a block of memory to be used by the buffer pool.
@@ -22,17 +20,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USBHC_MEM_BLOCK *
UsbHcAllocMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Pages
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Pages
)
{
- USBHC_MEM_BLOCK *Block;
- EFI_PCI_IO_PROTOCOL *PciIo;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- UINTN Bytes;
- EFI_STATUS Status;
+ USBHC_MEM_BLOCK *Block;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ UINTN Bytes;
+ EFI_STATUS Status;
PciIo = Pool->PciIo;
@@ -47,9 +45,9 @@ UsbHcAllocMemBlock (
//
ASSERT (USBHC_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
- Block->Bits = AllocateZeroPool (Block->BitsLen);
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
+ Block->Bits = AllocateZeroPool (Block->BitsLen);
if (Block->Bits == NULL) {
gBS->FreePool (Block);
@@ -73,7 +71,7 @@ UsbHcAllocMemBlock (
goto FREE_BITARRAY;
}
- Bytes = EFI_PAGES_TO_SIZE (Pages);
+ Bytes = EFI_PAGES_TO_SIZE (Pages);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
@@ -96,9 +94,9 @@ UsbHcAllocMemBlock (
goto FREE_BUFFER;
}
- Block->BufHost = BufHost;
- Block->Buf = (UINT8 *) ((UINTN) MappedAddr);
- Block->Mapping = Mapping;
+ Block->BufHost = BufHost;
+ Block->Buf = (UINT8 *)((UINTN)MappedAddr);
+ Block->Mapping = Mapping;
return Block;
@@ -111,7 +109,6 @@ FREE_BITARRAY:
return NULL;
}
-
/**
Free the memory block from the memory pool.
@@ -121,11 +118,11 @@ FREE_BITARRAY:
**/
VOID
UsbHcFreeMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_POOL *Pool,
+ IN USBHC_MEM_BLOCK *Block
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -141,7 +138,6 @@ UsbHcFreeMemBlock (
gBS->FreePool (Block);
}
-
/**
Alloc some memory from the block.
@@ -154,22 +150,22 @@ UsbHcFreeMemBlock (
**/
VOID *
UsbHcAllocMemFromBlock (
- IN USBHC_MEM_BLOCK *Block,
- IN UINTN Units
+ IN USBHC_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -185,13 +181,12 @@ UsbHcAllocMemFromBlock (
}
NEXT_BIT (Byte, Bit);
-
} else {
NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -202,13 +197,13 @@ UsbHcAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -226,16 +221,16 @@ UsbHcAllocMemFromBlock (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINTN AllocSize;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINTN Offset;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINTN AllocSize;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -249,7 +244,7 @@ UsbHcGetPciAddressForHostMem (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
+ if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
@@ -258,12 +253,11 @@ UsbHcGetPciAddressForHostMem (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *)Mem - Block->BufHost;
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
+ Offset = (UINT8 *)Mem - Block->BufHost;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
}
-
/**
Insert the memory block to the pool's list of the blocks.
@@ -273,8 +267,8 @@ UsbHcGetPciAddressForHostMem (
**/
VOID
UsbHcInsertMemBlockToPool (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -282,7 +276,6 @@ UsbHcInsertMemBlockToPool (
Head->Next = Block;
}
-
/**
Is the memory block empty?
@@ -294,10 +287,10 @@ UsbHcInsertMemBlockToPool (
**/
BOOLEAN
UsbHcIsMemBlockEmpty (
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Block
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -308,7 +301,6 @@ UsbHcIsMemBlockEmpty (
return TRUE;
}
-
/**
Unlink the memory block from the pool's list.
@@ -318,11 +310,11 @@ UsbHcIsMemBlockEmpty (
**/
VOID
UsbHcUnlinkMemBlock (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *BlockToUnlink
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *BlockToUnlink
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT ((Head != NULL) && (BlockToUnlink != NULL));
@@ -335,7 +327,6 @@ UsbHcUnlinkMemBlock (
}
}
-
/**
Initialize the memory management pool for the host controller.
@@ -355,7 +346,7 @@ UsbHcInitMemPool (
IN UINT32 Which4G
)
{
- USBHC_MEM_POOL *Pool;
+ USBHC_MEM_POOL *Pool;
Pool = AllocatePool (sizeof (USBHC_MEM_POOL));
@@ -376,7 +367,6 @@ UsbHcInitMemPool (
return Pool;
}
-
/**
Release the memory management pool.
@@ -388,10 +378,10 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -410,7 +400,6 @@ UsbHcFreeMemPool (
return EFI_SUCCESS;
}
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -423,16 +412,16 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- USBHC_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -487,7 +476,6 @@ UsbHcAllocateMem (
return Mem;
}
-
/**
Free the allocated memory back to the memory pool.
@@ -498,22 +486,22 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -524,8 +512,8 @@ UsbHcFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -533,7 +521,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -556,5 +544,5 @@ UsbHcFreeMem (
UsbHcFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h b/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h
index ace20832c1..999e795386 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/UsbHcMem.h
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_MEM_H_
#define _EFI_EHCI_MEM_H_
-#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
+#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
#define USB_HC_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
@@ -20,13 +20,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
struct _USBHC_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- USBHC_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ USBHC_MEM_BLOCK *Next;
};
//
@@ -35,16 +35,16 @@ struct _USBHC_MEM_BLOCK {
// data to be on the same 4G memory.
//
typedef struct _USBHC_MEM_POOL {
- EFI_PCI_IO_PROTOCOL *PciIo;
- BOOLEAN Check4G;
- UINT32 Which4G;
- USBHC_MEM_BLOCK *Head;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ BOOLEAN Check4G;
+ UINT32 Which4G;
+ USBHC_MEM_BLOCK *Head;
} USBHC_MEM_POOL;
//
// Memory allocation unit, must be 2^n, n>4
//
-#define USBHC_MEM_UNIT 64
+#define USBHC_MEM_UNIT 64
#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
#define USBHC_MEM_DEFAULT_PAGES 16
@@ -63,8 +63,6 @@ typedef struct _USBHC_MEM_POOL {
} \
} while (0)
-
-
/**
Initialize the memory management pool for the host controller.
@@ -84,7 +82,6 @@ UsbHcInitMemPool (
IN UINT32 Which4G
);
-
/**
Release the memory management pool.
@@ -96,10 +93,9 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
);
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -112,11 +108,10 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
);
-
/**
Free the allocated memory back to the memory pool.
@@ -127,9 +122,9 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -143,9 +138,9 @@ UsbHcFreeMem (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/DmaMem.c b/MdeModulePkg/Bus/Pci/EhciPei/DmaMem.c
index 63870a129a..320fb30bc1 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/DmaMem.c
@@ -39,8 +39,8 @@ IoMmuMap (
OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
+ EFI_STATUS Status;
+ UINT64 Attribute;
if (IoMmu != NULL) {
Status = IoMmu->Map (
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -82,10 +84,11 @@ IoMmuMap (
return Status;
}
} else {
- *DeviceAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,8 +101,8 @@ IoMmuMap (
**/
VOID
IoMmuUnmap (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN VOID *Mapping
)
{
if (IoMmu != NULL) {
@@ -140,9 +143,9 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
- *Mapping = NULL;
+ *Mapping = NULL;
if (IoMmu != NULL) {
Status = IoMmu->AllocateBuffer (
@@ -157,19 +160,20 @@ IoMmuAllocateBuffer (
}
NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
- Status = IoMmu->Map (
- IoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
*HostAddress = NULL;
return EFI_OUT_OF_RESOURCES;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -178,7 +182,7 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
IoMmu->Unmap (IoMmu, *Mapping);
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
- *Mapping = NULL;
+ *Mapping = NULL;
*HostAddress = NULL;
return Status;
}
@@ -191,10 +195,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *) (UINTN) HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -209,10 +215,10 @@ IoMmuAllocateBuffer (
**/
VOID
IoMmuFreeBuffer (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
if (IoMmu != NULL) {
@@ -230,14 +236,13 @@ IoMmuFreeBuffer (
**/
VOID
IoMmuInit (
- OUT EDKII_IOMMU_PPI **IoMmu
+ OUT EDKII_IOMMU_PPI **IoMmu
)
{
PeiServicesLocatePpi (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
- (VOID **) IoMmu
+ (VOID **)IoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
index cd1f87911b..37dd9012e2 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
@@ -15,19 +15,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// to the UEFI protocol's port state (change).
//
USB_PORT_STATE_MAP mUsbPortStateMap[] = {
- {PORTSC_CONN, USB_PORT_STAT_CONNECTION},
- {PORTSC_ENABLED, USB_PORT_STAT_ENABLE},
- {PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},
- {PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},
- {PORTSC_RESET, USB_PORT_STAT_RESET},
- {PORTSC_POWER, USB_PORT_STAT_POWER},
- {PORTSC_OWNER, USB_PORT_STAT_OWNER}
+ { PORTSC_CONN, USB_PORT_STAT_CONNECTION },
+ { PORTSC_ENABLED, USB_PORT_STAT_ENABLE },
+ { PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND },
+ { PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT },
+ { PORTSC_RESET, USB_PORT_STAT_RESET },
+ { PORTSC_POWER, USB_PORT_STAT_POWER },
+ { PORTSC_OWNER, USB_PORT_STAT_OWNER }
};
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
- {PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},
- {PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},
- {PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}
+ { PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION },
+ { PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE },
+ { PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT }
};
/**
@@ -41,11 +41,11 @@ USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
**/
UINT32
EhcReadOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (Ehc->CapLen != 0);
@@ -64,16 +64,14 @@ EhcReadOpReg (
**/
VOID
EhcWriteOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
-
ASSERT (Ehc->CapLen != 0);
- MmioWrite32(Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);
-
+ MmioWrite32 (Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);
}
/**
@@ -86,12 +84,12 @@ EhcWriteOpReg (
**/
VOID
EhcSetOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data |= Bit;
@@ -108,12 +106,12 @@ EhcSetOpRegBit (
**/
VOID
EhcClearOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data &= ~Bit;
@@ -136,14 +134,14 @@ EhcClearOpRegBit (
**/
EFI_STATUS
EhcWaitOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
)
{
- UINT32 Index;
+ UINT32 Index;
for (Index = 0; Index < Timeout / EHC_SYNC_POLL_INTERVAL + 1; Index++) {
if (EHC_REG_BIT_IS_SET (Ehc, Offset, Bit) == WaitToSet) {
@@ -167,13 +165,13 @@ EhcWaitOpRegBit (
**/
UINT32
EhcReadCapRegister (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
- Data = MmioRead32(Ehc->UsbHostControllerBaseAddress + Offset);
+ Data = MmioRead32 (Ehc->UsbHostControllerBaseAddress + Offset);
return Data;
}
@@ -191,12 +189,12 @@ EhcReadCapRegister (
**/
EFI_STATUS
EhcSetAndWaitDoorBell (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_IAAD);
@@ -224,7 +222,7 @@ EhcSetAndWaitDoorBell (
**/
VOID
EhcAckAllInterrupt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK);
@@ -243,11 +241,11 @@ EhcAckAllInterrupt (
**/
EFI_STATUS
EhcEnablePeriodSchd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);
@@ -267,11 +265,11 @@ EhcEnablePeriodSchd (
**/
EFI_STATUS
EhcEnableAsyncSchd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_ASYNC);
@@ -290,7 +288,7 @@ EhcEnableAsyncSchd (
**/
BOOLEAN
EhcIsHalt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT);
@@ -307,7 +305,7 @@ EhcIsHalt (
**/
BOOLEAN
EhcIsSysError (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR);
@@ -325,11 +323,11 @@ EhcIsSysError (
**/
EFI_STATUS
EhcResetHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Host can only be reset when it is halt. If not so, halt it
@@ -359,11 +357,11 @@ EhcResetHC (
**/
EFI_STATUS
EhcHaltHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcClearOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout);
@@ -382,11 +380,11 @@ EhcHaltHC (
**/
EFI_STATUS
EhcRunHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, FALSE, Timeout);
@@ -401,12 +399,12 @@ EhcRunHC (
**/
VOID
EhcPowerOnAllPorts (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
- UINT8 PortNumber;
- UINT8 Index;
- UINT32 RegVal;
+ UINT8 PortNumber;
+ UINT8 Index;
+ UINT32 RegVal;
PortNumber = (UINT8)(Ehc->HcStructParams & HCSP_NPORTS);
for (Index = 0; Index < PortNumber; Index++) {
@@ -414,7 +412,7 @@ EhcPowerOnAllPorts (
// Do not clear port status bits on initialization. Otherwise devices will
// not enumerate properly at startup.
//
- RegVal = EhcReadOpReg(Ehc, EHC_PORT_STAT_OFFSET + 4 * Index);
+ RegVal = EhcReadOpReg (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index);
RegVal &= ~PORTSC_CHANGE_MASK;
RegVal |= PORTSC_POWER;
EhcWriteOpReg (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index, RegVal);
@@ -438,12 +436,12 @@ EhcPowerOnAllPorts (
**/
EFI_STATUS
EhcInitHC (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS TempPtr;
- UINTN PageNumber;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS TempPtr;
+ UINTN PageNumber;
ASSERT (EhcIsHalt (Ehc));
@@ -454,13 +452,14 @@ EhcInitHC (
if (Ehc->PeriodFrame != NULL) {
EhcFreeSched (Ehc);
}
- PageNumber = sizeof(PEI_URB)/PAGESIZE +1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- PageNumber,
- &TempPtr
- );
- Ehc->Urb = (PEI_URB *) ((UINTN) TempPtr);
+
+ PageNumber = sizeof (PEI_URB)/PAGESIZE +1;
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ PageNumber,
+ &TempPtr
+ );
+ Ehc->Urb = (PEI_URB *)((UINTN)TempPtr);
if (Ehc->Urb == NULL) {
return Status;
}
@@ -473,6 +472,7 @@ EhcInitHC (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// 1. Program the CTRLDSSEGMENT register with the high 32 bit addr
//
@@ -563,15 +563,16 @@ EhcBulkTransfer (
OUT UINT32 *TransferResult
)
{
- PEI_USB2_HC_DEV *Ehc;
- PEI_URB *Urb;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ PEI_URB *Urb;
+ EFI_STATUS Status;
//
// Validate the parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -581,11 +582,12 @@ EhcBulkTransfer (
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))
+ {
return EFI_INVALID_PARAMETER;
}
- Ehc =PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -656,13 +658,13 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
)
{
+ PEI_USB2_HC_DEV *EhcDev;
- PEI_USB2_HC_DEV *EhcDev;
EhcDev = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
if (PortNumber == NULL) {
@@ -671,7 +673,6 @@ EhcGetRootHubPortNumber (
*PortNumber = (UINT8)(EhcDev->HcStructParams & HCSP_NPORTS);
return EFI_SUCCESS;
-
}
/**
@@ -692,20 +693,20 @@ EhcGetRootHubPortNumber (
EFI_STATUS
EFIAPI
EhcClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -714,82 +715,82 @@ EhcClearRootHubPortFeature (
goto ON_EXIT;
}
- Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
+ State = EhcReadOpReg (Ehc, Offset);
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Clear PORT_ENABLE feature means disable port.
- //
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Clear PORT_ENABLE feature means disable port.
+ //
+ State &= ~PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortSuspend:
- //
- // A write of zero to this bit is ignored by the host
- // controller. The host controller will unconditionally
- // set this bit to a zero when:
- // 1. software sets the Forct Port Resume bit to a zero from a one.
- // 2. software sets the Port Reset bit to a one frome a zero.
- //
- State &= ~PORSTSC_RESUME;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ //
+ // A write of zero to this bit is ignored by the host
+ // controller. The host controller will unconditionally
+ // set this bit to a zero when:
+ // 1. software sets the Forct Port Resume bit to a zero from a one.
+ // 2. software sets the Port Reset bit to a one frome a zero.
+ //
+ State &= ~PORSTSC_RESUME;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Clear PORT_RESET means clear the reset signal.
- //
- State &= ~PORTSC_RESET;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortReset:
+ //
+ // Clear PORT_RESET means clear the reset signal.
+ //
+ State &= ~PORTSC_RESET;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOwner:
- //
- // Clear port owner means this port owned by EHC
- //
- State &= ~PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ //
+ // Clear port owner means this port owned by EHC
+ //
+ State &= ~PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortConnectChange:
- //
- // Clear connect status change
- //
- State |= PORTSC_CONN_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortConnectChange:
+ //
+ // Clear connect status change
+ //
+ State |= PORTSC_CONN_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortEnableChange:
- //
- // Clear enable status change
- //
- State |= PORTSC_ENABLE_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnableChange:
+ //
+ // Clear enable status change
+ //
+ State |= PORTSC_ENABLE_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOverCurrentChange:
- //
- // Clear PortOverCurrent change
- //
- State |= PORTSC_OVERCUR_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOverCurrentChange:
+ //
+ // Clear PortOverCurrent change
+ //
+ State |= PORTSC_OVERCUR_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortPower:
- case EfiUsbPortSuspendChange:
- case EfiUsbPortResetChange:
- //
- // Not supported or not related operation
- //
- break;
+ case EfiUsbPortPower:
+ case EfiUsbPortSuspendChange:
+ case EfiUsbPortResetChange:
+ //
+ // Not supported or not related operation
+ //
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
- break;
+ default:
+ Status = EFI_INVALID_PARAMETER;
+ break;
}
ON_EXIT:
@@ -812,20 +813,20 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -834,8 +835,8 @@ EhcSetRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ State = EhcReadOpReg (Ehc, Offset);
//
// Mask off the port status change bits, these bits are
@@ -844,54 +845,54 @@ EhcSetRootHubPortFeature (
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Sofeware can't set this bit, Port can only be enable by
- // EHCI as a part of the reset and enable
- //
- State |= PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Sofeware can't set this bit, Port can only be enable by
+ // EHCI as a part of the reset and enable
+ //
+ State |= PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortSuspend:
- State |= PORTSC_SUSPEND;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ State |= PORTSC_SUSPEND;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Make sure Host Controller not halt before reset it
- //
- if (EhcIsHalt (Ehc)) {
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
+ case EfiUsbPortReset:
+ //
+ // Make sure Host Controller not halt before reset it
+ //
+ if (EhcIsHalt (Ehc)) {
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
- if (EFI_ERROR (Status)) {
- break;
+ if (EFI_ERROR (Status)) {
+ break;
+ }
}
- }
- //
- // Set one to PortReset bit must also set zero to PortEnable bit
- //
- State |= PORTSC_RESET;
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ //
+ // Set one to PortReset bit must also set zero to PortEnable bit
+ //
+ State |= PORTSC_RESET;
+ State &= ~PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortPower:
- //
- // Not supported, ignore the operation
- //
- Status = EFI_SUCCESS;
- break;
+ case EfiUsbPortPower:
+ //
+ // Not supported, ignore the operation
+ //
+ Status = EFI_SUCCESS;
+ break;
- case EfiUsbPortOwner:
- State |= PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ State |= PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -914,26 +915,26 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- UINTN Index;
- UINTN MapSize;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ UINTN Index;
+ UINTN MapSize;
+ EFI_STATUS Status;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
}
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -942,11 +943,11 @@ EhcGetRootHubPortStatus (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
- State = EhcReadOpReg (Ehc, Offset);
+ State = EhcReadOpReg (Ehc, Offset);
//
// Identify device speed. If in K state, it is low speed.
@@ -956,7 +957,6 @@ EhcGetRootHubPortStatus (
//
if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
-
} else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {
PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
}
@@ -968,7 +968,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
@@ -976,7 +976,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -1027,10 +1027,10 @@ EhcControlTransfer (
OUT UINT32 *TransferResult
)
{
- PEI_USB2_HC_DEV *Ehc;
- PEI_URB *Urb;
- UINT8 Endpoint;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ PEI_URB *Urb;
+ UINT8 Endpoint;
+ EFI_STATUS Status;
//
// Validate parameters
@@ -1041,33 +1041,37 @@ EhcControlTransfer (
if ((TransferDirection != EfiUsbDataIn) &&
(TransferDirection != EfiUsbDataOut) &&
- (TransferDirection != EfiUsbNoData)) {
+ (TransferDirection != EfiUsbNoData))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection == EfiUsbNoData) &&
- ((Data != NULL) || (*DataLength != 0))) {
+ ((Data != NULL) || (*DataLength != 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection != EfiUsbNoData) &&
- ((Data == NULL) || (*DataLength == 0))) {
+ ((Data == NULL) || (*DataLength == 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
-
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))
+ {
return EFI_INVALID_PARAMETER;
}
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
Status = EFI_DEVICE_ERROR;
*TransferResult = EFI_USB_ERR_SYSTEM;
@@ -1088,23 +1092,23 @@ EhcControlTransfer (
// endpoint is bidirectional. EhcCreateUrb expects this
// combination of Ep addr and its direction.
//
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Urb = EhcCreateUrb (
- Ehc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- 0,
- MaximumPacketLength,
- Translator,
- EHC_CTRL_TRANSFER,
- Request,
- Data,
- *DataLength,
- NULL,
- NULL,
- 1
- );
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
+ Urb = EhcCreateUrb (
+ Ehc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ 0,
+ MaximumPacketLength,
+ Translator,
+ EHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ *DataLength,
+ NULL,
+ NULL,
+ 1
+ );
if (Urb == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -1152,7 +1156,7 @@ EhcEndOfPei (
IN VOID *Ppi
)
{
- PEI_USB2_HC_DEV *Ehc;
+ PEI_USB2_HC_DEV *Ehc;
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -1177,14 +1181,14 @@ EhcPeimEntry (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
- EFI_STATUS Status;
- UINT8 Index;
- UINTN ControllerType;
- UINTN BaseAddress;
- UINTN MemPages;
- PEI_USB2_HC_DEV *EhcDev;
- EFI_PHYSICAL_ADDRESS TempPtr;
+ PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINTN ControllerType;
+ UINTN BaseAddress;
+ UINTN MemPages;
+ PEI_USB2_HC_DEV *EhcDev;
+ EFI_PHYSICAL_ADDRESS TempPtr;
//
// Shadow this PEIM to run from memory
@@ -1197,7 +1201,7 @@ EhcPeimEntry (
&gPeiUsbControllerPpiGuid,
0,
NULL,
- (VOID **) &ChipSetUsbControllerPpi
+ (VOID **)&ChipSetUsbControllerPpi
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
@@ -1206,7 +1210,7 @@ EhcPeimEntry (
Index = 0;
while (TRUE) {
Status = ChipSetUsbControllerPpi->GetUsbController (
- (EFI_PEI_SERVICES **) PeiServices,
+ (EFI_PEI_SERVICES **)PeiServices,
ChipSetUsbControllerPpi,
Index,
&ControllerType,
@@ -1228,24 +1232,23 @@ EhcPeimEntry (
}
MemPages = sizeof (PEI_USB2_HC_DEV) / PAGESIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);
- EhcDev = (PEI_USB2_HC_DEV *) ((UINTN) TempPtr);
+ ZeroMem ((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);
+ EhcDev = (PEI_USB2_HC_DEV *)((UINTN)TempPtr);
EhcDev->Signature = USB2_HC_DEV_SIGNATURE;
IoMmuInit (&EhcDev->IoMmu);
- EhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
-
+ EhcDev->UsbHostControllerBaseAddress = (UINT32)BaseAddress;
EhcDev->HcStructParams = EhcReadCapRegister (EhcDev, EHC_HCSPARAMS_OFFSET);
EhcDev->HcCapParams = EhcReadCapRegister (EhcDev, EHC_HCCPARAMS_OFFSET);
@@ -1258,16 +1261,16 @@ EhcPeimEntry (
return Status;
}
- EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;
- EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;
- EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;
- EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;
- EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;
- EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
+ EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;
+ EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;
+ EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;
+ EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;
+ EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;
+ EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
EhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
- EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;
+ EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
+ EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;
Status = PeiServicesInstallPpi (&EhcDev->PpiDescriptor);
if (EFI_ERROR (Status)) {
@@ -1275,8 +1278,8 @@ EhcPeimEntry (
continue;
}
- EhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- EhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
+ EhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ EhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
EhcDev->EndOfPeiNotifyList.Notify = EhcEndOfPei;
PeiServicesNotifyPpi (&EhcDev->EndOfPeiNotifyList);
@@ -1296,12 +1299,11 @@ EhcPeimEntry (
**/
EFI_STATUS
InitializeUsbHC (
- IN PEI_USB2_HC_DEV *EhcDev
+ IN PEI_USB2_HC_DEV *EhcDev
)
{
EFI_STATUS Status;
-
EhcResetHC (EhcDev, EHC_RESET_TIMEOUT);
Status = EhcInitHC (EhcDev);
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.h b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.h
index 8e5b6418e6..c83886c240 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.h
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.h
@@ -28,46 +28,44 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _PEI_USB2_HC_DEV PEI_USB2_HC_DEV;
-#define EFI_LIST_ENTRY LIST_ENTRY
+#define EFI_LIST_ENTRY LIST_ENTRY
#include "UsbHcMem.h"
#include "EhciReg.h"
#include "EhciUrb.h"
#include "EhciSched.h"
-#define EFI_USB_SPEED_FULL 0x0000
-#define EFI_USB_SPEED_LOW 0x0001
-#define EFI_USB_SPEED_HIGH 0x0002
+#define EFI_USB_SPEED_FULL 0x0000
+#define EFI_USB_SPEED_LOW 0x0001
+#define EFI_USB_SPEED_HIGH 0x0002
-#define PAGESIZE 4096
+#define PAGESIZE 4096
-#define EHC_1_MICROSECOND 1
-#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
-#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
+#define EHC_1_MICROSECOND 1
+#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
+#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
//
// EHCI register operation timeout, set by experience
//
-#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
-#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
-
+#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
+#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
//
// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
//
-#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
+#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
//
// Sync transfer polling interval, set by experience.
//
-#define EHC_SYNC_POLL_INTERVAL (6 * EHC_1_MILLISECOND)
-
-#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
+#define EHC_SYNC_POLL_INTERVAL (6 * EHC_1_MILLISECOND)
+#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
-#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
-#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
-#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
+#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
+#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
@@ -75,18 +73,18 @@ typedef struct _PEI_USB2_HC_DEV PEI_USB2_HC_DEV;
#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
struct _PEI_USB2_HC_DEV {
- UINTN Signature;
- PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
- EDKII_IOMMU_PPI *IoMmu;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
+ UINTN Signature;
+ PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
+ EDKII_IOMMU_PPI *IoMmu;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
//
// EndOfPei callback is used to stop the EHC DMA operation
// after exit PEI phase.
//
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
- UINT32 UsbHostControllerBaseAddress;
- PEI_URB *Urb;
- USBHC_MEM_POOL *MemPool;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ UINT32 UsbHostControllerBaseAddress;
+ PEI_URB *Urb;
+ USBHC_MEM_POOL *MemPool;
//
// Schedule data shared between asynchronous and periodic
@@ -97,36 +95,36 @@ struct _PEI_USB2_HC_DEV {
// For control transfer, even the short read happens, try the
// status stage.
//
- PEI_EHC_QTD *ShortReadStop;
- EFI_EVENT PollTimer;
+ PEI_EHC_QTD *ShortReadStop;
+ EFI_EVENT PollTimer;
//
// Asynchronous(bulk and control) transfer schedule data:
// ReclaimHead is used as the head of the asynchronous transfer
// list. It acts as the reclamation header.
//
- PEI_EHC_QH *ReclaimHead;
+ PEI_EHC_QH *ReclaimHead;
//
// Periodic (interrupt) transfer schedule data:
//
- VOID *PeriodFrame; // Mapped as common buffer
- VOID *PeriodFrameMap;
+ VOID *PeriodFrame; // Mapped as common buffer
+ VOID *PeriodFrameMap;
- PEI_EHC_QH *PeriodOne;
- EFI_LIST_ENTRY AsyncIntTransfers;
+ PEI_EHC_QH *PeriodOne;
+ EFI_LIST_ENTRY AsyncIntTransfers;
//
// EHCI configuration data
//
- UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
- UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
- UINT32 CapLen; // Capability length
- UINT32 High32bitAddr;
+ UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
+ UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
+ UINT32 CapLen; // Capability length
+ UINT32 High32bitAddr;
};
-#define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)
-#define PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_USB2_HC_DEV, EndOfPeiNotifyList, USB2_HC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_USB2_HC_DEV, EndOfPeiNotifyList, USB2_HC_DEV_SIGNATURE)
/**
@param EhcDev EHCI Device.
@@ -137,7 +135,7 @@ struct _PEI_USB2_HC_DEV {
**/
EFI_STATUS
InitializeUsbHC (
- IN PEI_USB2_HC_DEV *EhcDev
+ IN PEI_USB2_HC_DEV *EhcDev
);
/**
@@ -154,9 +152,9 @@ InitializeUsbHC (
**/
USBHC_MEM_POOL *
UsbHcInitMemPool (
- IN PEI_USB2_HC_DEV *Ehc,
- IN BOOLEAN Check4G,
- IN UINT32 Which4G
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN BOOLEAN Check4G,
+ IN UINT32 Which4G
)
;
@@ -172,8 +170,8 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool
)
;
@@ -190,9 +188,9 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
;
@@ -207,10 +205,10 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
;
@@ -253,8 +251,8 @@ IoMmuMap (
**/
VOID
IoMmuUnmap (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN VOID *Mapping
);
/**
@@ -296,10 +294,10 @@ IoMmuAllocateBuffer (
**/
VOID
IoMmuFreeBuffer (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
@@ -310,7 +308,7 @@ IoMmuFreeBuffer (
**/
VOID
IoMmuInit (
- OUT EDKII_IOMMU_PPI **IoMmu
+ OUT EDKII_IOMMU_PPI **IoMmu
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhciReg.h b/MdeModulePkg/Bus/Pci/EhciPei/EhciReg.h
index 98113519a5..2a438f1bbe 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhciReg.h
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhciReg.h
@@ -10,20 +10,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_REG_H_
#define _EFI_EHCI_REG_H_
-
-
//
// Capability register offset
//
-#define EHC_CAPLENGTH_OFFSET 0 // Capability register length offset
-#define EHC_HCSPARAMS_OFFSET 0x04 // Structural Parameters 04-07h
-#define EHC_HCCPARAMS_OFFSET 0x08 // Capability parameters offset
+#define EHC_CAPLENGTH_OFFSET 0 // Capability register length offset
+#define EHC_HCSPARAMS_OFFSET 0x04 // Structural Parameters 04-07h
+#define EHC_HCCPARAMS_OFFSET 0x08 // Capability parameters offset
//
// Capability register bit definition
//
-#define HCSP_NPORTS 0x0F // Number of root hub port
-#define HCCP_64BIT 0x01 // 64-bit addressing capability
+#define HCSP_NPORTS 0x0F // Number of root hub port
+#define HCCP_64BIT 0x01 // 64-bit addressing capability
//
// Operational register offset
@@ -38,61 +36,61 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define EHC_CONFIG_FLAG_OFFSET 0x40 // Configure flag register offset
#define EHC_PORT_STAT_OFFSET 0x44 // Port status/control offset
-#define EHC_FRAME_LEN 1024
+#define EHC_FRAME_LEN 1024
//
// Register bit definition
//
-#define CONFIGFLAG_ROUTE_EHC 0x01 // Route port to EHC
-
-#define USBCMD_RUN 0x01 // Run/stop
-#define USBCMD_RESET 0x02 // Start the host controller reset
-#define USBCMD_ENABLE_PERIOD 0x10 // Enable periodic schedule
-#define USBCMD_ENABLE_ASYNC 0x20 // Enable asynchronous schedule
-#define USBCMD_IAAD 0x40 // Interrupt on async advance doorbell
-
-#define USBSTS_IAA 0x20 // Interrupt on async advance
-#define USBSTS_PERIOD_ENABLED 0x4000 // Periodic schedule status
-#define USBSTS_ASYNC_ENABLED 0x8000 // Asynchronous schedule status
-#define USBSTS_HALT 0x1000 // Host controller halted
-#define USBSTS_SYS_ERROR 0x10 // Host system error
-#define USBSTS_INTACK_MASK 0x003F // Mask for the interrupt ACK, the WC
+#define CONFIGFLAG_ROUTE_EHC 0x01 // Route port to EHC
+
+#define USBCMD_RUN 0x01 // Run/stop
+#define USBCMD_RESET 0x02 // Start the host controller reset
+#define USBCMD_ENABLE_PERIOD 0x10 // Enable periodic schedule
+#define USBCMD_ENABLE_ASYNC 0x20 // Enable asynchronous schedule
+#define USBCMD_IAAD 0x40 // Interrupt on async advance doorbell
+
+#define USBSTS_IAA 0x20 // Interrupt on async advance
+#define USBSTS_PERIOD_ENABLED 0x4000 // Periodic schedule status
+#define USBSTS_ASYNC_ENABLED 0x8000 // Asynchronous schedule status
+#define USBSTS_HALT 0x1000 // Host controller halted
+#define USBSTS_SYS_ERROR 0x10 // Host system error
+#define USBSTS_INTACK_MASK 0x003F // Mask for the interrupt ACK, the WC
// (write clean) bits in USBSTS register
-#define PORTSC_CONN 0x01 // Current Connect Status
-#define PORTSC_CONN_CHANGE 0x02 // Connect Status Change
-#define PORTSC_ENABLED 0x04 // Port Enable / Disable
-#define PORTSC_ENABLE_CHANGE 0x08 // Port Enable / Disable Change
-#define PORTSC_OVERCUR 0x10 // Over current Active
-#define PORTSC_OVERCUR_CHANGE 0x20 // Over current Change
-#define PORSTSC_RESUME 0x40 // Force Port Resume
-#define PORTSC_SUSPEND 0x80 // Port Suspend State
-#define PORTSC_RESET 0x100 // Port Reset
-#define PORTSC_LINESTATE_K 0x400 // Line Status K-state
-#define PORTSC_LINESTATE_J 0x800 // Line Status J-state
-#define PORTSC_POWER 0x1000 // Port Power
-#define PORTSC_OWNER 0x2000 // Port Owner
-#define PORTSC_CHANGE_MASK 0x2A // Mask of the port change bits,
+#define PORTSC_CONN 0x01 // Current Connect Status
+#define PORTSC_CONN_CHANGE 0x02 // Connect Status Change
+#define PORTSC_ENABLED 0x04 // Port Enable / Disable
+#define PORTSC_ENABLE_CHANGE 0x08 // Port Enable / Disable Change
+#define PORTSC_OVERCUR 0x10 // Over current Active
+#define PORTSC_OVERCUR_CHANGE 0x20 // Over current Change
+#define PORSTSC_RESUME 0x40 // Force Port Resume
+#define PORTSC_SUSPEND 0x80 // Port Suspend State
+#define PORTSC_RESET 0x100 // Port Reset
+#define PORTSC_LINESTATE_K 0x400 // Line Status K-state
+#define PORTSC_LINESTATE_J 0x800 // Line Status J-state
+#define PORTSC_POWER 0x1000 // Port Power
+#define PORTSC_OWNER 0x2000 // Port Owner
+#define PORTSC_CHANGE_MASK 0x2A // Mask of the port change bits,
// they are WC (write clean)
//
// PCI Configuration Registers
//
-#define EHC_BAR_INDEX 0 // how many bytes away from USB_BASE to 0x10
+#define EHC_BAR_INDEX 0 // how many bytes away from USB_BASE to 0x10
-#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
+#define EHC_LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
#define EHC_ADDR(High, QhHw32) \
((VOID *) (UINTN) (LShiftU64 ((High), 32) | ((QhHw32) & 0xFFFFFFF0)))
-#define EHCI_IS_DATAIN(EndpointAddr) EHC_BIT_IS_SET((EndpointAddr), 0x80)
+#define EHCI_IS_DATAIN(EndpointAddr) EHC_BIT_IS_SET((EndpointAddr), 0x80)
//
// Structure to map the hardware port states to the
// UEFI's port states.
//
typedef struct {
- UINT16 HwState;
- UINT16 UefiState;
+ UINT16 HwState;
+ UINT16 UefiState;
} USB_PORT_STATE_MAP;
//
@@ -100,13 +98,12 @@ typedef struct {
//
#pragma pack(1)
typedef struct {
- UINT8 Pi;
- UINT8 SubClassCode;
- UINT8 BaseCode;
+ UINT8 Pi;
+ UINT8 SubClassCode;
+ UINT8 BaseCode;
} USB_CLASSC;
#pragma pack()
-
/**
Read EHCI capability register.
@@ -118,8 +115,8 @@ typedef struct {
**/
UINT32
EhcReadCapRegister (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
;
@@ -134,8 +131,8 @@ EhcReadCapRegister (
**/
UINT32
EhcReadOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
;
@@ -149,9 +146,9 @@ EhcReadOpReg (
**/
VOID
EhcWriteOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
;
@@ -163,7 +160,7 @@ EhcWriteOpReg (
**/
VOID
EhcClearLegacySupport (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -180,8 +177,8 @@ EhcClearLegacySupport (
**/
EFI_STATUS
EhcSetAndWaitDoorBell (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
;
@@ -194,7 +191,7 @@ EhcSetAndWaitDoorBell (
**/
VOID
EhcAckAllInterrupt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -209,7 +206,7 @@ EhcAckAllInterrupt (
**/
BOOLEAN
EhcIsHalt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -224,7 +221,7 @@ EhcIsHalt (
**/
BOOLEAN
EhcIsSysError (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -240,8 +237,8 @@ EhcIsSysError (
**/
EFI_STATUS
EhcResetHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
;
@@ -257,8 +254,8 @@ EhcResetHC (
**/
EFI_STATUS
EhcHaltHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
;
@@ -274,8 +271,8 @@ EhcHaltHC (
**/
EFI_STATUS
EhcRunHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
;
@@ -296,7 +293,7 @@ EhcRunHC (
**/
EFI_STATUS
EhcInitHC (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.c b/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.c
index 311f501980..db2406b0d2 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.c
@@ -22,13 +22,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
EhcCreateHelpQ (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
- USB_ENDPOINT Ep;
- PEI_EHC_QH *Qh;
- QH_HW *QhHw;
- PEI_EHC_QTD *Qtd;
+ USB_ENDPOINT Ep;
+ PEI_EHC_QH *Qh;
+ QH_HW *QhHw;
+ PEI_EHC_QTD *Qtd;
//
// Create an inactive Qtd to terminate the short packet read.
@@ -39,25 +39,25 @@ EhcCreateHelpQ (
return EFI_OUT_OF_RESOURCES;
}
- Qtd->QtdHw.Status = QTD_STAT_HALTED;
- Ehc->ShortReadStop = Qtd;
+ Qtd->QtdHw.Status = QTD_STAT_HALTED;
+ Ehc->ShortReadStop = Qtd;
//
// Create a QH to act as the EHC reclamation header.
// Set the header to loopback to itself.
//
- Ep.DevAddr = 0;
- Ep.EpAddr = 1;
- Ep.Direction = EfiUsbDataIn;
- Ep.DevSpeed = EFI_USB_SPEED_HIGH;
- Ep.MaxPacket = 64;
- Ep.HubAddr = 0;
- Ep.HubPort = 0;
- Ep.Toggle = 0;
- Ep.Type = EHC_BULK_TRANSFER;
- Ep.PollRate = 1;
-
- Qh = EhcCreateQh (Ehc, &Ep);
+ Ep.DevAddr = 0;
+ Ep.EpAddr = 1;
+ Ep.Direction = EfiUsbDataIn;
+ Ep.DevSpeed = EFI_USB_SPEED_HIGH;
+ Ep.MaxPacket = 64;
+ Ep.HubAddr = 0;
+ Ep.HubPort = 0;
+ Ep.Toggle = 0;
+ Ep.Type = EHC_BULK_TRANSFER;
+ Ep.PollRate = 1;
+
+ Qh = EhcCreateQh (Ehc, &Ep);
if (Qh == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -72,10 +72,10 @@ EhcCreateHelpQ (
//
// Create a dummy QH to act as the terminator for periodical schedule
//
- Ep.EpAddr = 2;
- Ep.Type = EHC_INT_TRANSFER_SYNC;
+ Ep.EpAddr = 2;
+ Ep.Type = EHC_INT_TRANSFER_SYNC;
- Qh = EhcCreateQh (Ehc, &Ep);
+ Qh = EhcCreateQh (Ehc, &Ep);
if (Qh == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -98,7 +98,7 @@ EhcCreateHelpQ (
**/
EFI_STATUS
EhcInitSched (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
VOID *Buf;
@@ -132,9 +132,9 @@ EhcInitSched (
return EFI_OUT_OF_RESOURCES;
}
- Ehc->PeriodFrame = Buf;
- Ehc->PeriodFrameMap = Map;
- Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
+ Ehc->PeriodFrame = Buf;
+ Ehc->PeriodFrameMap = Map;
+ Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
//
// Init memory pool management then create the helper
@@ -160,8 +160,8 @@ EhcInitSched (
//
// Initialize the frame list entries then set the registers
//
- Desc = (UINT32 *) Ehc->PeriodFrame;
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
+ Desc = (UINT32 *)Ehc->PeriodFrame;
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
Desc[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
}
@@ -173,7 +173,7 @@ EhcInitSched (
// Only need to set the AsynListAddr register to
// the reclamation header
//
- PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr));
return EFI_SUCCESS;
}
@@ -186,7 +186,7 @@ EhcInitSched (
**/
VOID
EhcFreeSched (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, 0);
@@ -231,24 +231,24 @@ EhcFreeSched (
**/
VOID
EhcLinkQhToAsync (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_EHC_QH *Qh
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_EHC_QH *Qh
)
{
- PEI_EHC_QH *Head;
+ PEI_EHC_QH *Head;
//
// Append the queue head after the reclaim header, then
// fix the hardware visiable parts (EHCI R1.0 page 72).
// ReclaimHead is always linked to the EHCI's AsynListAddr.
//
- Head = Ehc->ReclaimHead;
+ Head = Ehc->ReclaimHead;
- Qh->NextQh = Head->NextQh;
- Head->NextQh = Qh;
+ Qh->NextQh = Head->NextQh;
+ Head->NextQh = Qh;
- Qh->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);;
- Head->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
+ Qh->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
+ Head->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
}
/**
@@ -261,11 +261,11 @@ EhcLinkQhToAsync (
**/
VOID
EhcUnlinkQhFromAsync (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_EHC_QH *Qh
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_EHC_QH *Qh
)
{
- PEI_EHC_QH *Head;
+ PEI_EHC_QH *Head;
ASSERT (Ehc->ReclaimHead->NextQh == Qh);
@@ -274,12 +274,12 @@ EhcUnlinkQhFromAsync (
// visiable part: Only need to loopback the ReclaimHead. The Qh
// is pointing to ReclaimHead (which is staill in the list).
//
- Head = Ehc->ReclaimHead;
+ Head = Ehc->ReclaimHead;
- Head->NextQh = Qh->NextQh;
- Qh->NextQh = NULL;
+ Head->NextQh = Qh->NextQh;
+ Qh->NextQh = NULL;
- Head->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
+ Head->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
//
// Set and wait the door bell to synchronize with the hardware
@@ -302,22 +302,22 @@ EhcUnlinkQhFromAsync (
**/
BOOLEAN
EhcCheckUrbResult (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb
)
{
- EFI_LIST_ENTRY *Entry;
- PEI_EHC_QTD *Qtd;
- QTD_HW *QtdHw;
- UINT8 State;
- BOOLEAN Finished;
+ EFI_LIST_ENTRY *Entry;
+ PEI_EHC_QTD *Qtd;
+ QTD_HW *QtdHw;
+ UINT8 State;
+ BOOLEAN Finished;
ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
- Finished = TRUE;
- Urb->Completed = 0;
+ Finished = TRUE;
+ Urb->Completed = 0;
- Urb->Result = EFI_USB_NOERROR;
+ Urb->Result = EFI_USB_NOERROR;
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
Urb->Result |= EFI_USB_ERR_SYSTEM;
@@ -327,7 +327,7 @@ EhcCheckUrbResult (
BASE_LIST_FOR_EACH (Entry, &Urb->Qh->Qtds) {
Qtd = EFI_LIST_CONTAINER (Entry, PEI_EHC_QTD, QtdList);
QtdHw = &Qtd->QtdHw;
- State = (UINT8) QtdHw->Status;
+ State = (UINT8)QtdHw->Status;
if (EHC_BIT_IS_SET (State, QTD_STAT_HALTED)) {
//
@@ -352,7 +352,6 @@ EhcCheckUrbResult (
Finished = TRUE;
goto ON_EXIT;
-
} else if (EHC_BIT_IS_SET (State, QTD_STAT_ACTIVE)) {
//
// The QTD is still active, no need to check furthur.
@@ -361,7 +360,6 @@ EhcCheckUrbResult (
Finished = FALSE;
goto ON_EXIT;
-
} else {
//
// This QTD is finished OK or met short packet read. Update the
@@ -372,7 +370,7 @@ EhcCheckUrbResult (
}
if ((QtdHw->TotalBytes != 0) && (QtdHw->Pid == QTD_PID_INPUT)) {
- //EHC_DUMP_QH ((Urb->Qh, "Short packet read", FALSE));
+ // EHC_DUMP_QH ((Urb->Qh, "Short packet read", FALSE));
//
// Short packet read condition. If it isn't a setup transfer,
@@ -381,7 +379,6 @@ EhcCheckUrbResult (
// Status Stage of the setup transfer to get the finial result
//
if (QtdHw->AltNext == QTD_LINK (Ehc->ShortReadStop, FALSE)) {
-
Finished = TRUE;
goto ON_EXIT;
}
@@ -399,7 +396,7 @@ ON_EXIT:
// NOTICE: don't move DT update before the loop, otherwise there is
// a race condition that DT is wrong.
//
- Urb->DataToggle = (UINT8) Urb->Qh->QhHw.DataToggle;
+ Urb->DataToggle = (UINT8)Urb->Qh->QhHw.DataToggle;
return Finished;
}
@@ -418,19 +415,19 @@ ON_EXIT:
**/
EFI_STATUS
EhcExecTransfer (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb,
- IN UINTN TimeOut
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb,
+ IN UINTN TimeOut
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN Loop;
- BOOLEAN Finished;
- BOOLEAN InfiniteLoop;
-
- Status = EFI_SUCCESS;
- Loop = TimeOut * EHC_1_MILLISECOND;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN Loop;
+ BOOLEAN Finished;
+ BOOLEAN InfiniteLoop;
+
+ Status = EFI_SUCCESS;
+ Loop = TimeOut * EHC_1_MILLISECOND;
Finished = FALSE;
InfiniteLoop = FALSE;
@@ -460,4 +457,3 @@ EhcExecTransfer (
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.h b/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.h
index 60f8cb8152..6cba2d3e35 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.h
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhciSched.h
@@ -21,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
EhcInitSched (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -33,7 +33,7 @@ EhcInitSched (
**/
VOID
EhcFreeSched (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
;
@@ -50,8 +50,8 @@ EhcFreeSched (
**/
VOID
EhcLinkQhToAsync (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_EHC_QH *Qh
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_EHC_QH *Qh
)
;
@@ -65,8 +65,8 @@ EhcLinkQhToAsync (
**/
VOID
EhcUnlinkQhFromAsync (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_EHC_QH *Qh
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_EHC_QH *Qh
)
;
@@ -84,9 +84,9 @@ EhcUnlinkQhFromAsync (
**/
EFI_STATUS
EhcExecTransfer (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb,
- IN UINTN TimeOut
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb,
+ IN UINTN TimeOut
)
;
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.c b/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.c
index df512ed6fa..1ad7f3a56a 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.c
@@ -27,19 +27,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
PEI_EHC_QTD *
EhcCreateQtd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT8 *Data,
- IN UINTN DataLen,
- IN UINT8 PktId,
- IN UINT8 Toggle,
- IN UINTN MaxPacket
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT8 *Data,
+ IN UINTN DataLen,
+ IN UINT8 PktId,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket
)
{
- PEI_EHC_QTD *Qtd;
- QTD_HW *QtdHw;
- UINTN Index;
- UINTN Len;
- UINTN ThisBufLen;
+ PEI_EHC_QTD *Qtd;
+ QTD_HW *QtdHw;
+ UINTN Index;
+ UINTN Len;
+ UINTN ThisBufLen;
ASSERT (Ehc != NULL);
@@ -49,9 +49,9 @@ EhcCreateQtd (
return NULL;
}
- Qtd->Signature = EHC_QTD_SIG;
- Qtd->Data = Data;
- Qtd->DataLen = 0;
+ Qtd->Signature = EHC_QTD_SIG;
+ Qtd->Data = Data;
+ Qtd->DataLen = 0;
InitializeListHead (&Qtd->QtdList);
@@ -77,17 +77,17 @@ EhcCreateQtd (
// compute the offset and clear Reserved fields. This is already
// done in the data point.
//
- QtdHw->Page[Index] = EHC_LOW_32BIT (Data);
- QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (Data);
+ QtdHw->Page[Index] = EHC_LOW_32BIT (Data);
+ QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (Data);
- ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (Data) & QTD_BUF_MASK);
+ ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (Data) & QTD_BUF_MASK);
if (Len + ThisBufLen >= DataLen) {
Len = DataLen;
break;
}
- Len += ThisBufLen;
+ Len += ThisBufLen;
Data += ThisBufLen;
}
@@ -101,7 +101,7 @@ EhcCreateQtd (
Len = Len - Len % MaxPacket;
}
- QtdHw->TotalBytes = (UINT32) Len;
+ QtdHw->TotalBytes = (UINT32)Len;
Qtd->DataLen = Len;
}
@@ -121,8 +121,8 @@ EhcCreateQtd (
**/
VOID
EhcInitIntQh (
- IN USB_ENDPOINT *Ep,
- IN QH_HW *QhHw
+ IN USB_ENDPOINT *Ep,
+ IN QH_HW *QhHw
)
{
//
@@ -134,7 +134,7 @@ EhcInitIntQh (
//
if (Ep->DevSpeed == EFI_USB_SPEED_HIGH) {
QhHw->SMask = QH_MICROFRAME_0;
- return ;
+ return;
}
//
@@ -163,12 +163,12 @@ EhcInitIntQh (
**/
PEI_EHC_QH *
EhcCreateQh (
- IN PEI_USB2_HC_DEV *Ehci,
- IN USB_ENDPOINT *Ep
+ IN PEI_USB2_HC_DEV *Ehci,
+ IN USB_ENDPOINT *Ep
)
{
- PEI_EHC_QH *Qh;
- QH_HW *QhHw;
+ PEI_EHC_QH *Qh;
+ QH_HW *QhHw;
Qh = UsbHcAllocateMem (Ehci, Ehci->MemPool, sizeof (PEI_EHC_QH));
@@ -176,62 +176,63 @@ EhcCreateQh (
return NULL;
}
- Qh->Signature = EHC_QH_SIG;
- Qh->NextQh = NULL;
- Qh->Interval = Ep->PollRate;
+ Qh->Signature = EHC_QH_SIG;
+ Qh->NextQh = NULL;
+ Qh->Interval = Ep->PollRate;
InitializeListHead (&Qh->Qtds);
- QhHw = &Qh->QhHw;
- QhHw->HorizonLink = QH_LINK (NULL, 0, TRUE);
- QhHw->DeviceAddr = Ep->DevAddr;
- QhHw->Inactive = 0;
- QhHw->EpNum = Ep->EpAddr;
- QhHw->EpSpeed = Ep->DevSpeed;
- QhHw->DtCtrl = 0;
- QhHw->ReclaimHead = 0;
- QhHw->MaxPacketLen = (UINT32) Ep->MaxPacket;
- QhHw->CtrlEp = 0;
- QhHw->NakReload = QH_NAK_RELOAD;
- QhHw->HubAddr = Ep->HubAddr;
- QhHw->PortNum = Ep->HubPort;
- QhHw->Multiplier = 1;
- QhHw->DataToggle = Ep->Toggle;
+ QhHw = &Qh->QhHw;
+ QhHw->HorizonLink = QH_LINK (NULL, 0, TRUE);
+ QhHw->DeviceAddr = Ep->DevAddr;
+ QhHw->Inactive = 0;
+ QhHw->EpNum = Ep->EpAddr;
+ QhHw->EpSpeed = Ep->DevSpeed;
+ QhHw->DtCtrl = 0;
+ QhHw->ReclaimHead = 0;
+ QhHw->MaxPacketLen = (UINT32)Ep->MaxPacket;
+ QhHw->CtrlEp = 0;
+ QhHw->NakReload = QH_NAK_RELOAD;
+ QhHw->HubAddr = Ep->HubAddr;
+ QhHw->PortNum = Ep->HubPort;
+ QhHw->Multiplier = 1;
+ QhHw->DataToggle = Ep->Toggle;
if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
QhHw->Status |= QTD_STAT_DO_SS;
}
switch (Ep->Type) {
- case EHC_CTRL_TRANSFER:
- //
- // Special initialization for the control transfer:
- // 1. Control transfer initialize data toggle from each QTD
- // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
- //
- QhHw->DtCtrl = 1;
+ case EHC_CTRL_TRANSFER:
+ //
+ // Special initialization for the control transfer:
+ // 1. Control transfer initialize data toggle from each QTD
+ // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
+ //
+ QhHw->DtCtrl = 1;
- if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
- QhHw->CtrlEp = 1;
- }
- break;
+ if (Ep->DevSpeed != EFI_USB_SPEED_HIGH) {
+ QhHw->CtrlEp = 1;
+ }
- case EHC_INT_TRANSFER_ASYNC:
- case EHC_INT_TRANSFER_SYNC:
- //
- // Special initialization for the interrupt transfer
- // to set the S-Mask and C-Mask
- //
- QhHw->NakReload = 0;
- EhcInitIntQh (Ep, QhHw);
- break;
+ break;
- case EHC_BULK_TRANSFER:
- if ((Ep->DevSpeed == EFI_USB_SPEED_HIGH) && (Ep->Direction == EfiUsbDataOut)) {
- QhHw->Status |= QTD_STAT_DO_PING;
- }
+ case EHC_INT_TRANSFER_ASYNC:
+ case EHC_INT_TRANSFER_SYNC:
+ //
+ // Special initialization for the interrupt transfer
+ // to set the S-Mask and C-Mask
+ //
+ QhHw->NakReload = 0;
+ EhcInitIntQh (Ep, QhHw);
+ break;
+
+ case EHC_BULK_TRANSFER:
+ if ((Ep->DevSpeed == EFI_USB_SPEED_HIGH) && (Ep->Direction == EfiUsbDataOut)) {
+ QhHw->Status |= QTD_STAT_DO_PING;
+ }
- break;
+ break;
}
return Qh;
@@ -252,10 +253,10 @@ EhcCreateQh (
**/
UINTN
EhcConvertPollRate (
- IN UINTN Interval
+ IN UINTN Interval
)
{
- UINTN BitCount;
+ UINTN BitCount;
if (Interval == 0) {
return 1;
@@ -283,13 +284,13 @@ EhcConvertPollRate (
**/
VOID
EhcFreeQtds (
- IN PEI_USB2_HC_DEV *Ehc,
- IN EFI_LIST_ENTRY *Qtds
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN EFI_LIST_ENTRY *Qtds
)
{
- EFI_LIST_ENTRY *Entry;
- EFI_LIST_ENTRY *Next;
- PEI_EHC_QTD *Qtd;
+ EFI_LIST_ENTRY *Entry;
+ EFI_LIST_ENTRY *Next;
+ PEI_EHC_QTD *Qtd;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, Qtds) {
Qtd = EFI_LIST_CONTAINER (Entry, PEI_EHC_QTD, QtdList);
@@ -308,8 +309,8 @@ EhcFreeQtds (
**/
VOID
EhcFreeUrb (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb
)
{
if (Urb->RequestPhy != NULL) {
@@ -342,20 +343,20 @@ EhcFreeUrb (
**/
EFI_STATUS
EhcCreateQtds (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb
)
{
- USB_ENDPOINT *Ep;
- PEI_EHC_QH *Qh;
- PEI_EHC_QTD *Qtd;
- PEI_EHC_QTD *StatusQtd;
- PEI_EHC_QTD *NextQtd;
- EFI_LIST_ENTRY *Entry;
- UINT32 AlterNext;
- UINT8 Toggle;
- UINTN Len;
- UINT8 Pid;
+ USB_ENDPOINT *Ep;
+ PEI_EHC_QH *Qh;
+ PEI_EHC_QTD *Qtd;
+ PEI_EHC_QTD *StatusQtd;
+ PEI_EHC_QTD *NextQtd;
+ EFI_LIST_ENTRY *Entry;
+ UINT32 AlterNext;
+ UINT8 Toggle;
+ UINTN Len;
+ UINT8 Pid;
ASSERT ((Urb != NULL) && (Urb->Qh != NULL));
@@ -428,7 +429,7 @@ EhcCreateQtds (
while (Len < Urb->DataLen) {
Qtd = EhcCreateQtd (
Ehc,
- (UINT8 *) Urb->DataPhy + Len,
+ (UINT8 *)Urb->DataPhy + Len,
Urb->DataLen - Len,
Pid,
Toggle,
@@ -446,7 +447,7 @@ EhcCreateQtds (
// Switch the Toggle bit if odd number of packets are included in the QTD.
//
if (((Qtd->DataLen + Ep->MaxPacket - 1) / Ep->MaxPacket) % 2) {
- Toggle = (UINT8) (1 - Toggle);
+ Toggle = (UINT8)(1 - Toggle);
}
Len += Qtd->DataLen;
@@ -472,15 +473,15 @@ EhcCreateQtds (
break;
}
- NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, PEI_EHC_QTD, QtdList);
- Qtd->QtdHw.NextQtd = QTD_LINK (NextQtd, FALSE);
+ NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, PEI_EHC_QTD, QtdList);
+ Qtd->QtdHw.NextQtd = QTD_LINK (NextQtd, FALSE);
}
//
// Link the QTDs to the queue head
//
- NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, PEI_EHC_QTD, QtdList);
- Qh->QhHw.NextQtd = QTD_LINK (NextQtd, FALSE);
+ NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, PEI_EHC_QTD, QtdList);
+ Qh->QhHw.NextQtd = QTD_LINK (NextQtd, FALSE);
return EFI_SUCCESS;
ON_ERROR:
@@ -511,63 +512,63 @@ ON_ERROR:
**/
PEI_URB *
EhcCreateUrb (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
)
{
- USB_ENDPOINT *Ep;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EDKII_IOMMU_OPERATION MapOp;
- EFI_STATUS Status;
- UINTN Len;
- PEI_URB *Urb;
- VOID *Map;
+ USB_ENDPOINT *Ep;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ EDKII_IOMMU_OPERATION MapOp;
+ EFI_STATUS Status;
+ UINTN Len;
+ PEI_URB *Urb;
+ VOID *Map;
Map = NULL;
- Urb = Ehc->Urb;
- Urb->Signature = EHC_URB_SIG;
+ Urb = Ehc->Urb;
+ Urb->Signature = EHC_URB_SIG;
InitializeListHead (&Urb->UrbList);
- Ep = &Urb->Ep;
- Ep->DevAddr = DevAddr;
- Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
- Ep->Direction = (((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut);
- Ep->DevSpeed = DevSpeed;
- Ep->MaxPacket = MaxPacket;
+ Ep = &Urb->Ep;
+ Ep->DevAddr = DevAddr;
+ Ep->EpAddr = (UINT8)(EpAddr & 0x0F);
+ Ep->Direction = (((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut);
+ Ep->DevSpeed = DevSpeed;
+ Ep->MaxPacket = MaxPacket;
- Ep->HubAddr = 0;
- Ep->HubPort = 0;
+ Ep->HubAddr = 0;
+ Ep->HubPort = 0;
if (DevSpeed != EFI_USB_SPEED_HIGH) {
ASSERT (Hub != NULL);
- Ep->HubAddr = Hub->TranslatorHubAddress;
- Ep->HubPort = Hub->TranslatorPortNumber;
+ Ep->HubAddr = Hub->TranslatorHubAddress;
+ Ep->HubPort = Hub->TranslatorPortNumber;
}
- Ep->Toggle = Toggle;
- Ep->Type = Type;
- Ep->PollRate = EhcConvertPollRate (Interval);
+ Ep->Toggle = Toggle;
+ Ep->Type = Type;
+ Ep->PollRate = EhcConvertPollRate (Interval);
- Urb->Request = Request;
- Urb->Data = Data;
- Urb->DataLen = DataLen;
- Urb->Callback = Callback;
- Urb->Context = Context;
- Urb->Qh = EhcCreateQh (Ehc, &Urb->Ep);
+ Urb->Request = Request;
+ Urb->Data = Data;
+ Urb->DataLen = DataLen;
+ Urb->Callback = Callback;
+ Urb->Context = Context;
+ Urb->Qh = EhcCreateQh (Ehc, &Urb->Ep);
if (Urb->Qh == NULL) {
goto ON_ERROR;
@@ -575,27 +576,27 @@ EhcCreateUrb (
Urb->RequestPhy = NULL;
Urb->RequestMap = NULL;
- Urb->DataPhy = NULL;
- Urb->DataMap = NULL;
+ Urb->DataPhy = NULL;
+ Urb->DataMap = NULL;
//
// Map the request and user data
//
if (Request != NULL) {
- Len = sizeof (EFI_USB_DEVICE_REQUEST);
- MapOp = EdkiiIoMmuOperationBusMasterRead;
- Status = IoMmuMap (Ehc->IoMmu, MapOp, Request, &Len, &PhyAddr, &Map);
+ Len = sizeof (EFI_USB_DEVICE_REQUEST);
+ MapOp = EdkiiIoMmuOperationBusMasterRead;
+ Status = IoMmuMap (Ehc->IoMmu, MapOp, Request, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != sizeof (EFI_USB_DEVICE_REQUEST))) {
goto ON_ERROR;
}
- Urb->RequestPhy = (VOID *) ((UINTN) PhyAddr);
+ Urb->RequestPhy = (VOID *)((UINTN)PhyAddr);
Urb->RequestMap = Map;
}
if (Data != NULL) {
- Len = DataLen;
+ Len = DataLen;
if (Ep->Direction == EfiUsbDataIn) {
MapOp = EdkiiIoMmuOperationBusMasterWrite;
@@ -603,14 +604,14 @@ EhcCreateUrb (
MapOp = EdkiiIoMmuOperationBusMasterRead;
}
- Status = IoMmuMap (Ehc->IoMmu, MapOp, Data, &Len, &PhyAddr, &Map);
+ Status = IoMmuMap (Ehc->IoMmu, MapOp, Data, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != DataLen)) {
goto ON_ERROR;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
}
Status = EhcCreateQtds (Ehc, Urb);
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.h b/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.h
index 756b663fdb..9b8aa5de62 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.h
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhciUrb.h
@@ -10,60 +10,60 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_URB_H_
#define _EFI_EHCI_URB_H_
-typedef struct _PEI_EHC_QTD PEI_EHC_QTD;
-typedef struct _PEI_EHC_QH PEI_EHC_QH;
-typedef struct _PEI_URB PEI_URB;
+typedef struct _PEI_EHC_QTD PEI_EHC_QTD;
+typedef struct _PEI_EHC_QH PEI_EHC_QH;
+typedef struct _PEI_URB PEI_URB;
#define EHC_CTRL_TRANSFER 0x01
#define EHC_BULK_TRANSFER 0x02
#define EHC_INT_TRANSFER_SYNC 0x04
#define EHC_INT_TRANSFER_ASYNC 0x08
-#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')
-#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')
-#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
+#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')
+#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')
+#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
//
// Hardware related bit definitions
//
-#define EHC_TYPE_ITD 0x00
-#define EHC_TYPE_QH 0x02
-#define EHC_TYPE_SITD 0x04
-#define EHC_TYPE_FSTN 0x06
-
-#define QH_NAK_RELOAD 3
-#define QH_HSHBW_MULTI 1
-
-#define QTD_MAX_ERR 3
-#define QTD_PID_OUTPUT 0x00
-#define QTD_PID_INPUT 0x01
-#define QTD_PID_SETUP 0x02
-
-#define QTD_STAT_DO_OUT 0
-#define QTD_STAT_DO_SS 0
-#define QTD_STAT_DO_PING 0x01
-#define QTD_STAT_DO_CS 0x02
-#define QTD_STAT_TRANS_ERR 0x08
-#define QTD_STAT_BABBLE_ERR 0x10
-#define QTD_STAT_BUFF_ERR 0x20
-#define QTD_STAT_HALTED 0x40
-#define QTD_STAT_ACTIVE 0x80
-#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)
-
-#define QTD_MAX_BUFFER 4
-#define QTD_BUF_LEN 4096
-#define QTD_BUF_MASK 0x0FFF
-
-#define QH_MICROFRAME_0 0x01
-#define QH_MICROFRAME_1 0x02
-#define QH_MICROFRAME_2 0x04
-#define QH_MICROFRAME_3 0x08
-#define QH_MICROFRAME_4 0x10
-#define QH_MICROFRAME_5 0x20
-#define QH_MICROFRAME_6 0x40
-#define QH_MICROFRAME_7 0x80
-
-#define USB_ERR_SHORT_PACKET 0x200
+#define EHC_TYPE_ITD 0x00
+#define EHC_TYPE_QH 0x02
+#define EHC_TYPE_SITD 0x04
+#define EHC_TYPE_FSTN 0x06
+
+#define QH_NAK_RELOAD 3
+#define QH_HSHBW_MULTI 1
+
+#define QTD_MAX_ERR 3
+#define QTD_PID_OUTPUT 0x00
+#define QTD_PID_INPUT 0x01
+#define QTD_PID_SETUP 0x02
+
+#define QTD_STAT_DO_OUT 0
+#define QTD_STAT_DO_SS 0
+#define QTD_STAT_DO_PING 0x01
+#define QTD_STAT_DO_CS 0x02
+#define QTD_STAT_TRANS_ERR 0x08
+#define QTD_STAT_BABBLE_ERR 0x10
+#define QTD_STAT_BUFF_ERR 0x20
+#define QTD_STAT_HALTED 0x40
+#define QTD_STAT_ACTIVE 0x80
+#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)
+
+#define QTD_MAX_BUFFER 4
+#define QTD_BUF_LEN 4096
+#define QTD_BUF_MASK 0x0FFF
+
+#define QH_MICROFRAME_0 0x01
+#define QH_MICROFRAME_1 0x02
+#define QH_MICROFRAME_2 0x04
+#define QH_MICROFRAME_3 0x08
+#define QH_MICROFRAME_4 0x10
+#define QH_MICROFRAME_5 0x20
+#define QH_MICROFRAME_6 0x40
+#define QH_MICROFRAME_7 0x80
+
+#define USB_ERR_SHORT_PACKET 0x200
//
// Fill in the hardware link point: pass in a EHC_QH/QH_HW
@@ -72,7 +72,7 @@ typedef struct _PEI_URB PEI_URB;
#define QH_LINK(Addr, Type, Term) \
((UINT32) ((EHC_LOW_32BIT (Addr) & 0xFFFFFFE0) | (Type) | ((Term) ? 1 : 0)))
-#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
+#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
//
// The defination of EHCI hardware used data structure for
@@ -82,77 +82,76 @@ typedef struct _PEI_URB PEI_URB;
//
#pragma pack(1)
typedef struct {
- UINT32 NextQtd;
- UINT32 AltNext;
-
- UINT32 Status : 8;
- UINT32 Pid : 2;
- UINT32 ErrCnt : 2;
- UINT32 CurPage : 3;
- UINT32 Ioc : 1;
- UINT32 TotalBytes : 15;
- UINT32 DataToggle : 1;
-
- UINT32 Page[5];
- UINT32 PageHigh[5];
+ UINT32 NextQtd;
+ UINT32 AltNext;
+
+ UINT32 Status : 8;
+ UINT32 Pid : 2;
+ UINT32 ErrCnt : 2;
+ UINT32 CurPage : 3;
+ UINT32 Ioc : 1;
+ UINT32 TotalBytes : 15;
+ UINT32 DataToggle : 1;
+
+ UINT32 Page[5];
+ UINT32 PageHigh[5];
} QTD_HW;
typedef struct {
- UINT32 HorizonLink;
+ UINT32 HorizonLink;
//
// Endpoint capabilities/Characteristics DWord 1 and DWord 2
//
- UINT32 DeviceAddr : 7;
- UINT32 Inactive : 1;
- UINT32 EpNum : 4;
- UINT32 EpSpeed : 2;
- UINT32 DtCtrl : 1;
- UINT32 ReclaimHead : 1;
- UINT32 MaxPacketLen : 11;
- UINT32 CtrlEp : 1;
- UINT32 NakReload : 4;
-
- UINT32 SMask : 8;
- UINT32 CMask : 8;
- UINT32 HubAddr : 7;
- UINT32 PortNum : 7;
- UINT32 Multiplier : 2;
+ UINT32 DeviceAddr : 7;
+ UINT32 Inactive : 1;
+ UINT32 EpNum : 4;
+ UINT32 EpSpeed : 2;
+ UINT32 DtCtrl : 1;
+ UINT32 ReclaimHead : 1;
+ UINT32 MaxPacketLen : 11;
+ UINT32 CtrlEp : 1;
+ UINT32 NakReload : 4;
+
+ UINT32 SMask : 8;
+ UINT32 CMask : 8;
+ UINT32 HubAddr : 7;
+ UINT32 PortNum : 7;
+ UINT32 Multiplier : 2;
//
// Transaction execution overlay area
//
- UINT32 CurQtd;
- UINT32 NextQtd;
- UINT32 AltQtd;
-
- UINT32 Status : 8;
- UINT32 Pid : 2;
- UINT32 ErrCnt : 2;
- UINT32 CurPage : 3;
- UINT32 Ioc : 1;
- UINT32 TotalBytes : 15;
- UINT32 DataToggle : 1;
-
- UINT32 Page[5];
- UINT32 PageHigh[5];
+ UINT32 CurQtd;
+ UINT32 NextQtd;
+ UINT32 AltQtd;
+
+ UINT32 Status : 8;
+ UINT32 Pid : 2;
+ UINT32 ErrCnt : 2;
+ UINT32 CurPage : 3;
+ UINT32 Ioc : 1;
+ UINT32 TotalBytes : 15;
+ UINT32 DataToggle : 1;
+
+ UINT32 Page[5];
+ UINT32 PageHigh[5];
} QH_HW;
#pragma pack()
-
//
// Endpoint address and its capabilities
//
typedef struct _USB_ENDPOINT {
- UINT8 DevAddr;
- UINT8 EpAddr; // Endpoint address, no direction encoded in
- EFI_USB_DATA_DIRECTION Direction;
- UINT8 DevSpeed;
- UINTN MaxPacket;
- UINT8 HubAddr;
- UINT8 HubPort;
- UINT8 Toggle; // Data toggle, not used for control transfer
- UINTN Type;
- UINTN PollRate; // Polling interval used by EHCI
+ UINT8 DevAddr;
+ UINT8 EpAddr; // Endpoint address, no direction encoded in
+ EFI_USB_DATA_DIRECTION Direction;
+ UINT8 DevSpeed;
+ UINTN MaxPacket;
+ UINT8 HubAddr;
+ UINT8 HubPort;
+ UINT8 Toggle; // Data toggle, not used for control transfer
+ UINTN Type;
+ UINTN PollRate; // Polling interval used by EHCI
} USB_ENDPOINT;
//
@@ -160,15 +159,13 @@ typedef struct _USB_ENDPOINT {
// QTD generated from a URB. Don't add fields before QtdHw.
//
struct _PEI_EHC_QTD {
- QTD_HW QtdHw;
- UINT32 Signature;
- EFI_LIST_ENTRY QtdList; // The list of QTDs to one end point
- UINT8 *Data; // Buffer of the original data
- UINTN DataLen; // Original amount of data in this QTD
+ QTD_HW QtdHw;
+ UINT32 Signature;
+ EFI_LIST_ENTRY QtdList; // The list of QTDs to one end point
+ UINT8 *Data; // Buffer of the original data
+ UINTN DataLen; // Original amount of data in this QTD
};
-
-
//
// Software QH structure. All three different transaction types
// supported by UEFI USB, that is the control/bulk/interrupt
@@ -185,11 +182,11 @@ struct _PEI_EHC_QTD {
// as the reclamation header. New transfer is inserted after this QH.
//
struct _PEI_EHC_QH {
- QH_HW QhHw;
- UINT32 Signature;
- PEI_EHC_QH *NextQh; // The queue head pointed to by horizontal link
- EFI_LIST_ENTRY Qtds; // The list of QTDs to this queue head
- UINTN Interval;
+ QH_HW QhHw;
+ UINT32 Signature;
+ PEI_EHC_QH *NextQh; // The queue head pointed to by horizontal link
+ EFI_LIST_ENTRY Qtds; // The list of QTDs to this queue head
+ UINTN Interval;
};
//
@@ -197,34 +194,34 @@ struct _PEI_EHC_QH {
// usb requests.
//
struct _PEI_URB {
- UINT32 Signature;
- EFI_LIST_ENTRY UrbList;
+ UINT32 Signature;
+ EFI_LIST_ENTRY UrbList;
//
// Transaction information
//
- USB_ENDPOINT Ep;
- EFI_USB_DEVICE_REQUEST *Request; // Control transfer only
- VOID *RequestPhy; // Address of the mapped request
- VOID *RequestMap;
- VOID *Data;
- UINTN DataLen;
- VOID *DataPhy; // Address of the mapped user data
- VOID *DataMap;
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
- VOID *Context;
+ USB_ENDPOINT Ep;
+ EFI_USB_DEVICE_REQUEST *Request; // Control transfer only
+ VOID *RequestPhy; // Address of the mapped request
+ VOID *RequestMap;
+ VOID *Data;
+ UINTN DataLen;
+ VOID *DataPhy; // Address of the mapped user data
+ VOID *DataMap;
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
+ VOID *Context;
//
// Schedule data
//
- PEI_EHC_QH *Qh;
+ PEI_EHC_QH *Qh;
//
// Transaction result
//
- UINT32 Result;
- UINTN Completed; // completed data length
- UINT8 DataToggle;
+ UINT32 Result;
+ UINTN Completed; // completed data length
+ UINT8 DataToggle;
};
/**
@@ -243,12 +240,12 @@ struct _PEI_URB {
**/
PEI_EHC_QTD *
EhcCreateQtd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT8 *Data,
- IN UINTN DataLen,
- IN UINT8 PktId,
- IN UINT8 Toggle,
- IN UINTN MaxPacket
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT8 *Data,
+ IN UINTN DataLen,
+ IN UINT8 PktId,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket
)
;
@@ -263,8 +260,8 @@ EhcCreateQtd (
**/
PEI_EHC_QH *
EhcCreateQh (
- IN PEI_USB2_HC_DEV *Ehci,
- IN USB_ENDPOINT *Ep
+ IN PEI_USB2_HC_DEV *Ehci,
+ IN USB_ENDPOINT *Ep
)
;
@@ -277,8 +274,8 @@ EhcCreateQh (
**/
VOID
EhcFreeUrb (
- IN PEI_USB2_HC_DEV *Ehc,
- IN PEI_URB *Urb
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN PEI_URB *Urb
)
;
@@ -305,20 +302,21 @@ EhcFreeUrb (
**/
PEI_URB *
EhcCreateUrb (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINT8 Toggle,
- IN UINTN MaxPacket,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context,
- IN UINTN Interval
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINT8 Toggle,
+ IN UINTN MaxPacket,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context,
+ IN UINTN Interval
)
;
+
#endif
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.c b/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.c
index 269b3edb84..4b1fdcec80 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.c
@@ -22,30 +22,31 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USBHC_MEM_BLOCK *
UsbHcAllocMemBlock (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Pages
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Pages
)
{
- USBHC_MEM_BLOCK *Block;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- EFI_STATUS Status;
- UINTN PageNumber;
- EFI_PHYSICAL_ADDRESS TempPtr;
-
- Mapping = NULL;
- PageNumber = sizeof(USBHC_MEM_BLOCK)/PAGESIZE +1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- PageNumber,
- &TempPtr
- );
+ USBHC_MEM_BLOCK *Block;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ EFI_STATUS Status;
+ UINTN PageNumber;
+ EFI_PHYSICAL_ADDRESS TempPtr;
+
+ Mapping = NULL;
+ PageNumber = sizeof (USBHC_MEM_BLOCK)/PAGESIZE +1;
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ PageNumber,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
- return NULL;
+ return NULL;
}
+
ZeroMem ((VOID *)(UINTN)TempPtr, PageNumber*EFI_PAGE_SIZE);
//
@@ -54,34 +55,36 @@ UsbHcAllocMemBlock (
//
ASSERT (USBHC_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (USBHC_MEM_BLOCK*)(UINTN)TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
+ Block = (USBHC_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
PageNumber = (Block->BitsLen)/PAGESIZE +1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- PageNumber,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ PageNumber,
+ &TempPtr
+ );
+
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
- if (EFI_ERROR (Status)) {
- return NULL;
- }
ZeroMem ((VOID *)(UINTN)TempPtr, PageNumber*EFI_PAGE_SIZE);
- Block->Bits = (UINT8 *)(UINTN)TempPtr;
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Ehc->IoMmu,
Pages,
- (VOID **) &BufHost,
+ (VOID **)&BufHost,
&MappedAddr,
&Mapping
);
if (EFI_ERROR (Status)) {
return NULL;
}
+
ZeroMem (BufHost, Pages*EFI_PAGE_SIZE);
//
@@ -89,16 +92,15 @@ UsbHcAllocMemBlock (
// should be restricted into the same 4G
//
if (Pool->Check4G && (Pool->Which4G != USB_HC_HIGH_32BIT (MappedAddr))) {
- return NULL;
+ return NULL;
}
- Block->BufHost = BufHost;
- Block->Buf = (UINT8 *) ((UINTN) MappedAddr);
- Block->Mapping = Mapping;
- Block->Next = NULL;
+ Block->BufHost = BufHost;
+ Block->Buf = (UINT8 *)((UINTN)MappedAddr);
+ Block->Mapping = Mapping;
+ Block->Next = NULL;
return Block;
-
}
/**
@@ -111,9 +113,9 @@ UsbHcAllocMemBlock (
**/
VOID
UsbHcFreeMemBlock (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN USBHC_MEM_BLOCK *Block
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -133,22 +135,22 @@ UsbHcFreeMemBlock (
**/
VOID *
UsbHcAllocMemFromBlock (
- IN USBHC_MEM_BLOCK *Block,
- IN UINTN Units
+ IN USBHC_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -164,13 +166,12 @@ UsbHcAllocMemFromBlock (
}
NEXT_BIT (Byte, Bit);
-
} else {
NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -181,13 +182,13 @@ UsbHcAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -205,16 +206,16 @@ UsbHcAllocMemFromBlock (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINTN AllocSize;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINTN Offset;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINTN AllocSize;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -228,7 +229,7 @@ UsbHcGetPciAddressForHostMem (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
+ if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
@@ -237,8 +238,8 @@ UsbHcGetPciAddressForHostMem (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *)Mem - Block->BufHost;
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
+ Offset = (UINT8 *)Mem - Block->BufHost;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
}
@@ -251,8 +252,8 @@ UsbHcGetPciAddressForHostMem (
**/
VOID
UsbHcInsertMemBlockToPool (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -271,11 +272,10 @@ UsbHcInsertMemBlockToPool (
**/
BOOLEAN
UsbHcIsMemBlockEmpty (
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Block
)
{
- UINTN Index;
-
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -286,7 +286,6 @@ UsbHcIsMemBlockEmpty (
return TRUE;
}
-
/**
Initialize the memory management pool for the host controller.
@@ -301,29 +300,30 @@ UsbHcIsMemBlockEmpty (
**/
USBHC_MEM_POOL *
UsbHcInitMemPool (
- IN PEI_USB2_HC_DEV *Ehc,
- IN BOOLEAN Check4G,
- IN UINT32 Which4G
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN BOOLEAN Check4G,
+ IN UINT32 Which4G
)
{
- USBHC_MEM_POOL *Pool;
- UINTN PageNumber;
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS TempPtr;
-
- PageNumber = sizeof(USBHC_MEM_POOL)/PAGESIZE +1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- PageNumber,
- &TempPtr
- );
+ USBHC_MEM_POOL *Pool;
+ UINTN PageNumber;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS TempPtr;
+
+ PageNumber = sizeof (USBHC_MEM_POOL)/PAGESIZE +1;
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ PageNumber,
+ &TempPtr
+ );
+
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
- if (EFI_ERROR (Status)) {
- return NULL;
- }
ZeroMem ((VOID *)(UINTN)TempPtr, PageNumber*EFI_PAGE_SIZE);
- Pool = (USBHC_MEM_POOL *) ((UINTN) TempPtr);
+ Pool = (USBHC_MEM_POOL *)((UINTN)TempPtr);
Pool->Check4G = Check4G;
Pool->Which4G = Which4G;
@@ -348,11 +348,11 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -381,17 +381,17 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- USBHC_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -425,7 +425,8 @@ UsbHcAllocateMem (
} else {
Pages = USBHC_MEM_DEFAULT_PAGES;
}
- NewBlock = UsbHcAllocMemBlock (Ehc,Pool, Pages);
+
+ NewBlock = UsbHcAllocMemBlock (Ehc, Pool, Pages);
if (NewBlock == NULL) {
return NULL;
@@ -455,23 +456,23 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN PEI_USB2_HC_DEV *Ehc,
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -482,8 +483,8 @@ UsbHcFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -491,7 +492,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -513,5 +514,5 @@ UsbHcFreeMem (
UsbHcFreeMemBlock (Ehc, Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.h b/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.h
index 21b2d7fa9f..7151dbc6e4 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.h
+++ b/MdeModulePkg/Bus/Pci/EhciPei/UsbHcMem.h
@@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Uefi.h>
#include <IndustryStandard/Pci22.h>
-#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
+#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
#define USB_HC_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
@@ -24,13 +24,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
struct _USBHC_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- USBHC_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ USBHC_MEM_BLOCK *Next;
};
//
@@ -39,15 +39,15 @@ struct _USBHC_MEM_BLOCK {
// data to be on the same 4G memory.
//
typedef struct _USBHC_MEM_POOL {
- BOOLEAN Check4G;
- UINT32 Which4G;
- USBHC_MEM_BLOCK *Head;
+ BOOLEAN Check4G;
+ UINT32 Which4G;
+ USBHC_MEM_BLOCK *Head;
} USBHC_MEM_POOL;
//
// Memory allocation unit, must be 2^n, n>4
//
-#define USBHC_MEM_UNIT 64
+#define USBHC_MEM_UNIT 64
#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
#define USBHC_MEM_DEFAULT_PAGES 16
@@ -66,7 +66,6 @@ typedef struct _USBHC_MEM_POOL {
} \
} while (0)
-
/**
Calculate the corresponding pci bus address according to the Mem parameter.
@@ -78,9 +77,9 @@ typedef struct _USBHC_MEM_POOL {
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.c b/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.c
index 436d5971d0..3f5462c257 100644
--- a/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.c
+++ b/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.c
@@ -26,8 +26,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_STATUS
EFIAPI
AtapiPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
PEI_ATA_CONTROLLER_PPI *AtaControllerPpi;
@@ -40,11 +40,11 @@ AtapiPeimEntry (
}
Status = PeiServicesLocatePpi (
- &gPeiAtaControllerPpiGuid,
- 0,
- NULL,
- (VOID **) &AtaControllerPpi
- );
+ &gPeiAtaControllerPpiGuid,
+ 0,
+ NULL,
+ (VOID **)&AtaControllerPpi
+ );
ASSERT_EFI_ERROR (Status);
AtapiBlkIoDev = AllocatePages (EFI_SIZE_TO_PAGES (sizeof (*AtapiBlkIoDev)));
@@ -60,21 +60,21 @@ AtapiPeimEntry (
//
AtapiEnumerateDevices (AtapiBlkIoDev);
- AtapiBlkIoDev->AtapiBlkIo.GetNumberOfBlockDevices = AtapiGetNumberOfBlockDevices;
- AtapiBlkIoDev->AtapiBlkIo.GetBlockDeviceMediaInfo = AtapiGetBlockDeviceMediaInfo;
- AtapiBlkIoDev->AtapiBlkIo.ReadBlocks = AtapiReadBlocks;
+ AtapiBlkIoDev->AtapiBlkIo.GetNumberOfBlockDevices = AtapiGetNumberOfBlockDevices;
+ AtapiBlkIoDev->AtapiBlkIo.GetBlockDeviceMediaInfo = AtapiGetBlockDeviceMediaInfo;
+ AtapiBlkIoDev->AtapiBlkIo.ReadBlocks = AtapiReadBlocks;
AtapiBlkIoDev->AtapiBlkIo2.Revision = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;
AtapiBlkIoDev->AtapiBlkIo2.GetNumberOfBlockDevices = AtapiGetNumberOfBlockDevices2;
AtapiBlkIoDev->AtapiBlkIo2.GetBlockDeviceMediaInfo = AtapiGetBlockDeviceMediaInfo2;
AtapiBlkIoDev->AtapiBlkIo2.ReadBlocks = AtapiReadBlocks2;
- AtapiBlkIoDev->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI;
- AtapiBlkIoDev->PpiDescriptor.Guid = &gEfiPeiVirtualBlockIoPpiGuid;
- AtapiBlkIoDev->PpiDescriptor.Ppi = &AtapiBlkIoDev->AtapiBlkIo;
+ AtapiBlkIoDev->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI;
+ AtapiBlkIoDev->PpiDescriptor.Guid = &gEfiPeiVirtualBlockIoPpiGuid;
+ AtapiBlkIoDev->PpiDescriptor.Ppi = &AtapiBlkIoDev->AtapiBlkIo;
- AtapiBlkIoDev->PpiDescriptor2.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- AtapiBlkIoDev->PpiDescriptor2.Guid = &gEfiPeiVirtualBlockIo2PpiGuid;
- AtapiBlkIoDev->PpiDescriptor2.Ppi = &AtapiBlkIoDev->AtapiBlkIo2;
+ AtapiBlkIoDev->PpiDescriptor2.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ AtapiBlkIoDev->PpiDescriptor2.Guid = &gEfiPeiVirtualBlockIo2PpiGuid;
+ AtapiBlkIoDev->PpiDescriptor2.Ppi = &AtapiBlkIoDev->AtapiBlkIo2;
DEBUG ((DEBUG_INFO, "Atatpi Device Count is %d\n", AtapiBlkIoDev->DeviceCount));
if (AtapiBlkIoDev->DeviceCount != 0) {
@@ -109,16 +109,16 @@ AtapiPeimEntry (
EFI_STATUS
EFIAPI
AtapiGetNumberOfBlockDevices (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
ATAPI_BLK_IO_DEV *AtapiBlkIoDev;
AtapiBlkIoDev = NULL;
- AtapiBlkIoDev = PEI_RECOVERY_ATAPI_FROM_BLKIO_THIS (This);
+ AtapiBlkIoDev = PEI_RECOVERY_ATAPI_FROM_BLKIO_THIS (This);
*NumberBlockDevices = AtapiBlkIoDev->DeviceCount;
@@ -156,10 +156,10 @@ AtapiGetNumberOfBlockDevices (
EFI_STATUS
EFIAPI
AtapiGetBlockDeviceMediaInfo (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
UINTN DeviceCount;
@@ -169,13 +169,13 @@ AtapiGetBlockDeviceMediaInfo (
AtapiBlkIoDev = NULL;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
AtapiBlkIoDev = PEI_RECOVERY_ATAPI_FROM_BLKIO_THIS (This);
- DeviceCount = AtapiBlkIoDev->DeviceCount;
+ DeviceCount = AtapiBlkIoDev->DeviceCount;
//
// DeviceIndex is a value from 1 to NumberBlockDevices.
@@ -214,7 +214,7 @@ AtapiGetBlockDeviceMediaInfo (
//
// Get media info from AtapiBlkIoDev
//
- CopyMem (MediaInfo, &AtapiBlkIoDev->DeviceInfo[Index].MediaInfo, sizeof(EFI_PEI_BLOCK_IO_MEDIA));
+ CopyMem (MediaInfo, &AtapiBlkIoDev->DeviceInfo[Index].MediaInfo, sizeof (EFI_PEI_BLOCK_IO_MEDIA));
return EFI_SUCCESS;
}
@@ -256,15 +256,14 @@ AtapiGetBlockDeviceMediaInfo (
EFI_STATUS
EFIAPI
AtapiReadBlocks (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
-
EFI_PEI_BLOCK_IO_MEDIA MediaInfo;
EFI_STATUS Status;
UINTN NumberOfBlocks;
@@ -288,11 +287,11 @@ AtapiReadBlocks (
}
Status = AtapiGetBlockDeviceMediaInfo (
- PeiServices,
- This,
- DeviceIndex,
- &MediaInfo
- );
+ PeiServices,
+ This,
+ DeviceIndex,
+ &MediaInfo
+ );
if (Status != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
@@ -314,13 +313,13 @@ AtapiReadBlocks (
}
Status = ReadSectors (
- AtapiBlkIoDev,
- AtapiBlkIoDev->DeviceInfo[DeviceIndex - 1].DevicePosition,
- Buffer,
- StartLBA,
- NumberOfBlocks,
- BlockSize
- );
+ AtapiBlkIoDev,
+ AtapiBlkIoDev->DeviceInfo[DeviceIndex - 1].DevicePosition,
+ Buffer,
+ StartLBA,
+ NumberOfBlocks,
+ BlockSize
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
@@ -350,9 +349,9 @@ AtapiReadBlocks (
EFI_STATUS
EFIAPI
AtapiGetNumberOfBlockDevices2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
EFI_STATUS Status;
@@ -400,19 +399,19 @@ AtapiGetNumberOfBlockDevices2 (
EFI_STATUS
EFIAPI
AtapiGetBlockDeviceMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- ATAPI_BLK_IO_DEV *AtapiBlkIoDev;
- EFI_STATUS Status;
- EFI_PEI_BLOCK_IO_MEDIA Media;
+ ATAPI_BLK_IO_DEV *AtapiBlkIoDev;
+ EFI_STATUS Status;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
AtapiBlkIoDev = NULL;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -427,10 +426,11 @@ AtapiGetBlockDeviceMediaInfo2 (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get media info from AtapiBlkIoDev
//
- CopyMem (MediaInfo, &AtapiBlkIoDev->DeviceInfo[DeviceIndex - 1].MediaInfo2, sizeof(EFI_PEI_BLOCK_IO2_MEDIA));
+ CopyMem (MediaInfo, &AtapiBlkIoDev->DeviceInfo[DeviceIndex - 1].MediaInfo2, sizeof (EFI_PEI_BLOCK_IO2_MEDIA));
return EFI_SUCCESS;
}
@@ -472,16 +472,16 @@ AtapiGetBlockDeviceMediaInfo2 (
EFI_STATUS
EFIAPI
AtapiReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- ATAPI_BLK_IO_DEV *AtapiBlkIoDev;
+ EFI_STATUS Status;
+ ATAPI_BLK_IO_DEV *AtapiBlkIoDev;
AtapiBlkIoDev = NULL;
@@ -503,7 +503,6 @@ AtapiReadBlocks2 (
return Status;
}
-
/**
Enumerate Atapi devices.
@@ -517,19 +516,19 @@ AtapiEnumerateDevices (
IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev
)
{
- UINT8 Index1;
- UINT8 Index2;
- UINTN DevicePosition;
- EFI_PEI_BLOCK_IO_MEDIA MediaInfo;
- EFI_PEI_BLOCK_IO2_MEDIA MediaInfo2;
- EFI_STATUS Status;
- UINTN DeviceCount;
- UINT16 CommandBlockBaseAddr;
- UINT16 ControlBlockBaseAddr;
- UINT32 IdeEnabledNumber;
- IDE_REGS_BASE_ADDR IdeRegsBaseAddr[MAX_IDE_CHANNELS];
-
- DeviceCount = 0;
+ UINT8 Index1;
+ UINT8 Index2;
+ UINTN DevicePosition;
+ EFI_PEI_BLOCK_IO_MEDIA MediaInfo;
+ EFI_PEI_BLOCK_IO2_MEDIA MediaInfo2;
+ EFI_STATUS Status;
+ UINTN DeviceCount;
+ UINT16 CommandBlockBaseAddr;
+ UINT16 ControlBlockBaseAddr;
+ UINT32 IdeEnabledNumber;
+ IDE_REGS_BASE_ADDR IdeRegsBaseAddr[MAX_IDE_CHANNELS];
+
+ DeviceCount = 0;
DevicePosition = 0;
//
@@ -540,10 +539,10 @@ AtapiEnumerateDevices (
// Enable Sata and IDE controller.
//
AtapiBlkIoDev->AtaControllerPpi->EnableAtaChannel (
- (EFI_PEI_SERVICES **) GetPeiServicesTablePointer(),
- AtapiBlkIoDev->AtaControllerPpi,
- PEI_ICH_IDE_PRIMARY | PEI_ICH_IDE_SECONDARY
- );
+ (EFI_PEI_SERVICES **)GetPeiServicesTablePointer (),
+ AtapiBlkIoDev->AtaControllerPpi,
+ PEI_ICH_IDE_PRIMARY | PEI_ICH_IDE_SECONDARY
+ );
//
// Allow SATA Devices to spin-up. This is needed if
@@ -556,28 +555,28 @@ AtapiEnumerateDevices (
// Get four channels (primary or secondary Pata, Sata Channel) Command and Control Regs Base address.
//
IdeEnabledNumber = AtapiBlkIoDev->AtaControllerPpi->GetIdeRegsBaseAddr (
- (EFI_PEI_SERVICES **) GetPeiServicesTablePointer(),
- AtapiBlkIoDev->AtaControllerPpi,
- IdeRegsBaseAddr
- );
+ (EFI_PEI_SERVICES **)GetPeiServicesTablePointer (),
+ AtapiBlkIoDev->AtaControllerPpi,
+ IdeRegsBaseAddr
+ );
//
// Using Command and Control Regs Base Address to fill other registers.
//
- for (Index1 = 0; Index1 < IdeEnabledNumber; Index1 ++) {
- CommandBlockBaseAddr = IdeRegsBaseAddr[Index1].CommandBlockBaseAddr;
+ for (Index1 = 0; Index1 < IdeEnabledNumber; Index1++) {
+ CommandBlockBaseAddr = IdeRegsBaseAddr[Index1].CommandBlockBaseAddr;
AtapiBlkIoDev->IdeIoPortReg[Index1].Data = CommandBlockBaseAddr;
- AtapiBlkIoDev->IdeIoPortReg[Index1].Reg1.Feature = (UINT16) (CommandBlockBaseAddr + 0x1);
- AtapiBlkIoDev->IdeIoPortReg[Index1].SectorCount = (UINT16) (CommandBlockBaseAddr + 0x2);
- AtapiBlkIoDev->IdeIoPortReg[Index1].SectorNumber = (UINT16) (CommandBlockBaseAddr + 0x3);
- AtapiBlkIoDev->IdeIoPortReg[Index1].CylinderLsb = (UINT16) (CommandBlockBaseAddr + 0x4);
- AtapiBlkIoDev->IdeIoPortReg[Index1].CylinderMsb = (UINT16) (CommandBlockBaseAddr + 0x5);
- AtapiBlkIoDev->IdeIoPortReg[Index1].Head = (UINT16) (CommandBlockBaseAddr + 0x6);
- AtapiBlkIoDev->IdeIoPortReg[Index1].Reg.Command = (UINT16) (CommandBlockBaseAddr + 0x7);
-
- ControlBlockBaseAddr = IdeRegsBaseAddr[Index1].ControlBlockBaseAddr;
+ AtapiBlkIoDev->IdeIoPortReg[Index1].Reg1.Feature = (UINT16)(CommandBlockBaseAddr + 0x1);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].SectorCount = (UINT16)(CommandBlockBaseAddr + 0x2);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].SectorNumber = (UINT16)(CommandBlockBaseAddr + 0x3);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].CylinderLsb = (UINT16)(CommandBlockBaseAddr + 0x4);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].CylinderMsb = (UINT16)(CommandBlockBaseAddr + 0x5);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].Head = (UINT16)(CommandBlockBaseAddr + 0x6);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].Reg.Command = (UINT16)(CommandBlockBaseAddr + 0x7);
+
+ ControlBlockBaseAddr = IdeRegsBaseAddr[Index1].ControlBlockBaseAddr;
AtapiBlkIoDev->IdeIoPortReg[Index1].Alt.DeviceControl = ControlBlockBaseAddr;
- AtapiBlkIoDev->IdeIoPortReg[Index1].DriveAddress = (UINT16) (ControlBlockBaseAddr + 0x1);
+ AtapiBlkIoDev->IdeIoPortReg[Index1].DriveAddress = (UINT16)(ControlBlockBaseAddr + 0x1);
//
// Scan IDE bus for ATAPI devices IDE or Sata device
@@ -596,7 +595,7 @@ AtapiEnumerateDevices (
//
// Retrieve Media Info
//
- Status = DetectMedia (AtapiBlkIoDev, DevicePosition, &MediaInfo, &MediaInfo2);
+ Status = DetectMedia (AtapiBlkIoDev, DevicePosition, &MediaInfo, &MediaInfo2);
CopyMem (&(AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo), &MediaInfo, sizeof (MediaInfo));
CopyMem (&(AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo2), &MediaInfo2, sizeof (MediaInfo2));
@@ -606,11 +605,12 @@ AtapiEnumerateDevices (
DEBUG ((DEBUG_INFO, "Atatpi BlockSize is 0x%x\n", MediaInfo.BlockSize));
if (EFI_ERROR (Status)) {
- AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo.MediaPresent = FALSE;
- AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo.LastBlock = 0;
+ AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo.MediaPresent = FALSE;
+ AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo.LastBlock = 0;
AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo2.MediaPresent = FALSE;
AtapiBlkIoDev->DeviceInfo[DeviceCount].MediaInfo2.LastBlock = 0;
}
+
DeviceCount += 1;
}
}
@@ -633,10 +633,10 @@ AtapiEnumerateDevices (
**/
BOOLEAN
DiscoverAtapiDevice (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
)
{
EFI_STATUS Status;
@@ -644,11 +644,11 @@ DiscoverAtapiDevice (
if (!DetectIDEController (AtapiBlkIoDev, DevicePosition)) {
return FALSE;
}
+
//
// test if it is an ATAPI device (only supported device)
//
if (ATAPIIdentify (AtapiBlkIoDev, DevicePosition) == EFI_SUCCESS) {
-
Status = Inquiry (AtapiBlkIoDev, DevicePosition, MediaInfo, MediaInfo2);
if (!EFI_ERROR (Status)) {
return TRUE;
@@ -673,9 +673,9 @@ DiscoverAtapiDevice (
**/
EFI_STATUS
CheckPowerMode (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN UINT8 AtaCommand
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN UINT8 AtaCommand
)
{
UINT8 Channel;
@@ -690,8 +690,8 @@ CheckPowerMode (
UINT8 ErrorValue;
UINT8 SectorCountValue;
- Channel = (UINT8) (DevicePosition / 2);
- Device = (UINT8) (DevicePosition % 2);
+ Channel = (UINT8)(DevicePosition / 2);
+ Device = (UINT8)(DevicePosition % 2);
ASSERT (Channel < MAX_IDE_CHANNELS);
@@ -704,7 +704,7 @@ CheckPowerMode (
//
// select device
//
- IoWrite8 (HeadRegister, (UINT8) ((Device << 4) | 0xe0));
+ IoWrite8 (HeadRegister, (UINT8)((Device << 4) | 0xe0));
//
// refresh the SectorCount register
@@ -715,14 +715,14 @@ CheckPowerMode (
//
// select device
//
- IoWrite8 (HeadRegister, (UINT8) ((Device << 4) | 0xe0));
+ IoWrite8 (HeadRegister, (UINT8)((Device << 4) | 0xe0));
Status = DRDYReady (AtapiBlkIoDev, &(AtapiBlkIoDev->IdeIoPortReg[Channel]), 100);
//
// select device
//
- IoWrite8 (HeadRegister, (UINT8) ((Device << 4) | 0xe0));
+ IoWrite8 (HeadRegister, (UINT8)((Device << 4) | 0xe0));
//
// send 'check power' commandd via Command Register
//
@@ -766,7 +766,7 @@ CheckPowerMode (
// Write SectorCount 0x55 but return valid state value. Maybe no device
// exists or some slow kind of ATAPI device exists.
//
- IoWrite8 (HeadRegister, (UINT8) ((Device << 4) | 0xe0));
+ IoWrite8 (HeadRegister, (UINT8)((Device << 4) | 0xe0));
//
// write 0x55 and 0xaa to SectorCounter register,
@@ -781,6 +781,7 @@ CheckPowerMode (
if (SectorCountValue != 0x55) {
return EFI_NOT_FOUND;
}
+
//
// Send a "ATAPI TEST UNIT READY" command ... slow but accurate
//
@@ -803,15 +804,15 @@ CheckPowerMode (
**/
BOOLEAN
DetectIDEController (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
)
{
UINT8 Channel;
EFI_STATUS Status;
UINT8 AtaCommand;
- Channel = (UINT8) (DevicePosition / 2);
+ Channel = (UINT8)(DevicePosition / 2);
ASSERT (Channel < MAX_IDE_CHANNELS);
//
@@ -821,11 +822,12 @@ DetectIDEController (
if (EFI_ERROR (Status)) {
return FALSE;
}
+
//
// Send 'check power' command for IDE device
//
- AtaCommand = 0xE5;
- Status = CheckPowerMode (AtapiBlkIoDev, DevicePosition, AtaCommand);
+ AtaCommand = 0xE5;
+ Status = CheckPowerMode (AtapiBlkIoDev, DevicePosition, AtaCommand);
if ((Status == EFI_ABORTED) || (Status == EFI_SUCCESS)) {
return TRUE;
}
@@ -855,20 +857,20 @@ WaitForBSYClear (
UINT16 StatusRegister;
UINT8 StatusValue;
- StatusValue = 0;
+ StatusValue = 0;
- StatusRegister = IdeIoRegisters->Reg.Status;
+ StatusRegister = IdeIoRegisters->Reg.Status;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
StatusValue = IoRead8 (StatusRegister);
if ((StatusValue & ATA_STSREG_BSY) == 0x00) {
break;
}
+
MicroSecondDelay (250);
Delay--;
-
} while (Delay != 0);
if (Delay == 0) {
@@ -901,11 +903,11 @@ DRDYReady (
UINT8 StatusValue;
UINT8 ErrValue;
- StatusValue = 0;
+ StatusValue = 0;
- StatusRegister = IdeIoRegisters->Reg.Status;
+ StatusRegister = IdeIoRegisters->Reg.Status;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
StatusValue = IoRead8 (StatusRegister);
//
@@ -915,17 +917,16 @@ DRDYReady (
break;
}
- if ((StatusValue & (ATA_STSREG_ERR | ATA_STSREG_BSY)) == ATA_STSREG_ERR) {
- ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
- if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
- return EFI_ABORTED;
+ if ((StatusValue & (ATA_STSREG_ERR | ATA_STSREG_BSY)) == ATA_STSREG_ERR) {
+ ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
+ if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
+ return EFI_ABORTED;
+ }
}
- }
MicroSecondDelay (250);
Delay--;
-
} while (Delay != 0);
if (Delay == 0) {
@@ -958,13 +959,12 @@ DRQClear (
UINT8 StatusValue;
UINT8 ErrValue;
- StatusValue = 0;
+ StatusValue = 0;
- StatusRegister = IdeIoRegisters->Reg.Status;
+ StatusRegister = IdeIoRegisters->Reg.Status;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
-
StatusValue = IoRead8 (StatusRegister);
//
@@ -974,12 +974,12 @@ DRQClear (
break;
}
- if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
- ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
- if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
- return EFI_ABORTED;
+ if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
+ ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
+ if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
+ return EFI_ABORTED;
+ }
}
- }
MicroSecondDelay (250);
@@ -1016,13 +1016,12 @@ DRQClear2 (
UINT8 AltStatusValue;
UINT8 ErrValue;
- AltStatusValue = 0;
+ AltStatusValue = 0;
AltStatusRegister = IdeIoRegisters->Alt.AltStatus;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
-
AltStatusValue = IoRead8 (AltStatusRegister);
//
@@ -1032,12 +1031,12 @@ DRQClear2 (
break;
}
- if ((AltStatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
- ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
- if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
- return EFI_ABORTED;
+ if ((AltStatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
+ ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
+ if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
+ return EFI_ABORTED;
+ }
}
- }
MicroSecondDelay (250);
@@ -1075,12 +1074,12 @@ DRQReady (
UINT8 StatusValue;
UINT8 ErrValue;
- StatusValue = 0;
- ErrValue = 0;
+ StatusValue = 0;
+ ErrValue = 0;
- StatusRegister = IdeIoRegisters->Reg.Status;
+ StatusRegister = IdeIoRegisters->Reg.Status;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
//
// read Status Register will clear interrupt
@@ -1095,12 +1094,12 @@ DRQReady (
}
if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
-
ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
}
+
MicroSecondDelay (250);
Delay--;
@@ -1137,13 +1136,12 @@ DRQReady2 (
UINT8 AltStatusValue;
UINT8 ErrValue;
- AltStatusValue = 0;
+ AltStatusValue = 0;
AltStatusRegister = IdeIoRegisters->Alt.AltStatus;
- Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
+ Delay = ((TimeoutInMilliSeconds * STALL_1_MILLI_SECOND) / 250) + 1;
do {
-
AltStatusValue = IoRead8 (AltStatusRegister);
//
@@ -1154,12 +1152,12 @@ DRQReady2 (
}
if ((AltStatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) {
-
ErrValue = IoRead8 (IdeIoRegisters->Reg1.Error);
if ((ErrValue & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
}
+
MicroSecondDelay (250);
Delay--;
@@ -1184,21 +1182,19 @@ DRQReady2 (
**/
EFI_STATUS
CheckErrorStatus (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINT16 StatusReg
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINT16 StatusReg
)
{
- UINT8 StatusValue;
+ UINT8 StatusValue;
StatusValue = IoRead8 (StatusReg);
if ((StatusValue & (ATA_STSREG_ERR | ATA_STSREG_DWF | ATA_STSREG_CORR)) == 0) {
-
return EFI_SUCCESS;
}
return EFI_DEVICE_ERROR;
-
}
/**
@@ -1213,8 +1209,8 @@ CheckErrorStatus (
**/
EFI_STATUS
ATAPIIdentify (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
)
{
ATAPI_IDENTIFY_DATA AtapiIdentifyData;
@@ -1229,19 +1225,19 @@ ATAPIIdentify (
UINT16 CylinderLsbReg;
UINT16 CylinderMsbReg;
- UINT32 WordCount;
- UINT32 Increment;
- UINT32 Index;
- UINT32 ByteCount;
- UINT16 *Buffer16;
+ UINT32 WordCount;
+ UINT32 Increment;
+ UINT32 Index;
+ UINT32 ByteCount;
+ UINT16 *Buffer16;
- EFI_STATUS Status;
+ EFI_STATUS Status;
- ByteCount = sizeof (AtapiIdentifyData);
- Buffer16 = (UINT16 *) &AtapiIdentifyData;
+ ByteCount = sizeof (AtapiIdentifyData);
+ Buffer16 = (UINT16 *)&AtapiIdentifyData;
- Channel = (UINT8) (DevicePosition / 2);
- Device = (UINT8) (DevicePosition % 2);
+ Channel = (UINT8)(DevicePosition / 2);
+ Device = (UINT8)(DevicePosition % 2);
ASSERT (Channel < MAX_IDE_CHANNELS);
@@ -1261,9 +1257,11 @@ ATAPIIdentify (
AtapiBlkIoDev,
&(AtapiBlkIoDev->IdeIoPortReg[Channel]),
ATATIMEOUT
- ) != EFI_SUCCESS) {
+ ) != EFI_SUCCESS)
+ {
return EFI_DEVICE_ERROR;
}
+
//
// select device via Head/Device register.
// Before write Head/Device register, BSY and DRQ must be 0.
@@ -1271,11 +1269,12 @@ ATAPIIdentify (
if (DRQClear2 (AtapiBlkIoDev, &(AtapiBlkIoDev->IdeIoPortReg[Channel]), ATATIMEOUT) != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
+
//
// e0:1110,0000-- bit7 and bit5 are reserved bits.
// bit6 set means LBA mode
//
- IoWrite8 (HeadReg, (UINT8) ((Device << 4) | 0xe0));
+ IoWrite8 (HeadReg, (UINT8)((Device << 4) | 0xe0));
//
// set all the command parameters
@@ -1285,8 +1284,8 @@ ATAPIIdentify (
AtapiBlkIoDev,
&(AtapiBlkIoDev->IdeIoPortReg[Channel]),
ATATIMEOUT
- ) != EFI_SUCCESS) {
-
+ ) != EFI_SUCCESS)
+ {
return EFI_DEVICE_ERROR;
}
@@ -1330,15 +1329,16 @@ ATAPIIdentify (
}
if (CheckErrorStatus (AtapiBlkIoDev, StatusReg) != EFI_SUCCESS) {
-
return EFI_DEVICE_ERROR;
}
+
//
// Get the byte count for one series of read
//
if ((WordCount + Increment) > ByteCount / 2) {
Increment = ByteCount / 2 - WordCount;
}
+
//
// perform a series of read without check DRQ ready
//
@@ -1347,8 +1347,8 @@ ATAPIIdentify (
}
WordCount += Increment;
-
}
+
//
// while
//
@@ -1356,12 +1356,12 @@ ATAPIIdentify (
AtapiBlkIoDev,
&(AtapiBlkIoDev->IdeIoPortReg[Channel]),
ATATIMEOUT
- ) != EFI_SUCCESS) {
+ ) != EFI_SUCCESS)
+ {
return CheckErrorStatus (AtapiBlkIoDev, StatusReg);
}
return EFI_SUCCESS;
-
}
/**
@@ -1377,8 +1377,8 @@ ATAPIIdentify (
**/
EFI_STATUS
TestUnitReady (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
)
{
ATAPI_PACKET_COMMAND Packet;
@@ -1442,26 +1442,26 @@ AtapiPacketCommandIn (
//
// required transfer data in word unit.
//
- UINT32 RequiredWordCount;
+ UINT32 RequiredWordCount;
//
// actual transfer data in word unit.
//
- UINT32 ActualWordCount;
+ UINT32 ActualWordCount;
- Channel = (UINT8) (DevicePosition / 2);
- Device = (UINT8) (DevicePosition % 2);
+ Channel = (UINT8)(DevicePosition / 2);
+ Device = (UINT8)(DevicePosition % 2);
ASSERT (Channel < MAX_IDE_CHANNELS);
- StatusReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Status;
- HeadReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Head;
- CommandReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Command;
- FeatureReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg1.Feature;
- CylinderLsbReg = AtapiBlkIoDev->IdeIoPortReg[Channel].CylinderLsb;
- CylinderMsbReg = AtapiBlkIoDev->IdeIoPortReg[Channel].CylinderMsb;
- DeviceControlReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Alt.DeviceControl;
- DataReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Data;
+ StatusReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Status;
+ HeadReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Head;
+ CommandReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Command;
+ FeatureReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg1.Feature;
+ CylinderLsbReg = AtapiBlkIoDev->IdeIoPortReg[Channel].CylinderLsb;
+ CylinderMsbReg = AtapiBlkIoDev->IdeIoPortReg[Channel].CylinderMsb;
+ DeviceControlReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Alt.DeviceControl;
+ DataReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Data;
//
// Set all the command parameters by fill related registers.
@@ -1471,14 +1471,16 @@ AtapiPacketCommandIn (
AtapiBlkIoDev,
&(AtapiBlkIoDev->IdeIoPortReg[Channel]),
ATATIMEOUT
- ) != EFI_SUCCESS) {
+ ) != EFI_SUCCESS)
+ {
return EFI_DEVICE_ERROR;
}
+
//
// Select device via Device/Head Register.
// DEFAULT_CMD: 0xa0 (1010,0000)
//
- IoWrite8 (HeadReg, (UINT8) ((Device << 4) | ATA_DEFAULT_CMD));
+ IoWrite8 (HeadReg, (UINT8)((Device << 4) | ATA_DEFAULT_CMD));
//
// No OVL; No DMA
@@ -1489,8 +1491,8 @@ AtapiPacketCommandIn (
// set the transfersize to MAX_ATAPI_BYTE_COUNT to let the device
// determine how many data should be transfered.
//
- IoWrite8 (CylinderLsbReg, (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff));
- IoWrite8 (CylinderMsbReg, (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8));
+ IoWrite8 (CylinderLsbReg, (UINT8)(ATAPI_MAX_BYTE_COUNT & 0x00ff));
+ IoWrite8 (CylinderMsbReg, (UINT8)(ATAPI_MAX_BYTE_COUNT >> 8));
//
// DEFAULT_CTL:0x0a (0000,1010)
@@ -1508,6 +1510,7 @@ AtapiPacketCommandIn (
if (Status != EFI_SUCCESS) {
return Status;
}
+
//
// Send out command packet
//
@@ -1527,9 +1530,10 @@ AtapiPacketCommandIn (
return EFI_DEVICE_ERROR;
}
- if (Buffer == NULL || ByteCount == 0) {
+ if ((Buffer == NULL) || (ByteCount == 0)) {
return EFI_SUCCESS;
}
+
//
// call PioReadWriteData() function to get
// requested transfer data form device.
@@ -1541,7 +1545,7 @@ AtapiPacketCommandIn (
//
ActualWordCount = 0;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
while ((Status == EFI_SUCCESS) && (ActualWordCount < RequiredWordCount)) {
//
// before each data transfer stream, the host should poll DRQ bit ready,
@@ -1551,9 +1555,11 @@ AtapiPacketCommandIn (
AtapiBlkIoDev,
&(AtapiBlkIoDev->IdeIoPortReg[Channel]),
TimeoutInMilliSeconds
- ) != EFI_SUCCESS) {
+ ) != EFI_SUCCESS)
+ {
return CheckErrorStatus (AtapiBlkIoDev, StatusReg);
}
+
//
// read Status Register will clear interrupt
//
@@ -1562,30 +1568,28 @@ AtapiPacketCommandIn (
//
// get current data transfer size from Cylinder Registers.
//
- WordCount = IoRead8 (CylinderMsbReg) << 8;
- WordCount = WordCount | IoRead8 (CylinderLsbReg);
- WordCount = WordCount & 0xffff;
+ WordCount = IoRead8 (CylinderMsbReg) << 8;
+ WordCount = WordCount | IoRead8 (CylinderLsbReg);
+ WordCount = WordCount & 0xffff;
WordCount /= 2;
//
// perform a series data In/Out.
//
for (Index = 0; (Index < WordCount) && (ActualWordCount < RequiredWordCount); Index++, ActualWordCount++) {
-
*PtrBuffer = IoRead16 (DataReg);
PtrBuffer++;
-
}
- if (((ATAPI_REQUEST_SENSE_CMD *) Packet)->opcode == ATA_CMD_REQUEST_SENSE && ActualWordCount >= 4) {
+ if ((((ATAPI_REQUEST_SENSE_CMD *)Packet)->opcode == ATA_CMD_REQUEST_SENSE) && (ActualWordCount >= 4)) {
RequiredWordCount = MIN (
RequiredWordCount,
- (UINT32) (4 + (((ATAPI_REQUEST_SENSE_DATA *) Buffer)->addnl_sense_length / 2))
+ (UINT32)(4 + (((ATAPI_REQUEST_SENSE_DATA *)Buffer)->addnl_sense_length / 2))
);
}
-
}
+
//
// After data transfer is completed, normally, DRQ bit should clear.
//
@@ -1593,6 +1597,7 @@ AtapiPacketCommandIn (
if (Status != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
+
//
// read status register to check whether error happens.
//
@@ -1616,15 +1621,15 @@ AtapiPacketCommandIn (
**/
EFI_STATUS
Inquiry (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
)
{
- ATAPI_PACKET_COMMAND Packet;
- EFI_STATUS Status;
- ATAPI_INQUIRY_DATA Idata;
+ ATAPI_PACKET_COMMAND Packet;
+ EFI_STATUS Status;
+ ATAPI_INQUIRY_DATA Idata;
//
// prepare command packet for the ATAPI Inquiry Packet Command.
@@ -1632,64 +1637,65 @@ Inquiry (
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
ZeroMem (&Idata, sizeof (ATAPI_INQUIRY_DATA));
- Packet.Inquiry.opcode = ATA_CMD_INQUIRY;
- Packet.Inquiry.page_code = 0;
- Packet.Inquiry.allocation_length = (UINT8) sizeof (ATAPI_INQUIRY_DATA);
+ Packet.Inquiry.opcode = ATA_CMD_INQUIRY;
+ Packet.Inquiry.page_code = 0;
+ Packet.Inquiry.allocation_length = (UINT8)sizeof (ATAPI_INQUIRY_DATA);
//
// Send command packet and get requested Inquiry data.
//
Status = AtapiPacketCommandIn (
- AtapiBlkIoDev,
- DevicePosition,
- &Packet,
- (UINT16 *) (&Idata),
- sizeof (ATAPI_INQUIRY_DATA),
- ATAPITIMEOUT
- //50
- );
+ AtapiBlkIoDev,
+ DevicePosition,
+ &Packet,
+ (UINT16 *)(&Idata),
+ sizeof (ATAPI_INQUIRY_DATA),
+ ATAPITIMEOUT
+ // 50
+ );
if (Status != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
+
//
// Identify device type via INQUIRY data.
//
switch (Idata.peripheral_type & 0x1f) {
- case 0x00:
- //
- // Magnetic Disk
- //
- MediaInfo->DeviceType = IdeLS120;
- MediaInfo->MediaPresent = FALSE;
- MediaInfo->LastBlock = 0;
- MediaInfo->BlockSize = 0x200;
- MediaInfo2->InterfaceType = MSG_ATAPI_DP;
- MediaInfo2->RemovableMedia = TRUE;
- MediaInfo2->MediaPresent = FALSE;
- MediaInfo2->ReadOnly = FALSE;
- MediaInfo2->BlockSize = 0x200;
- MediaInfo2->LastBlock = 0;
- break;
-
- case 0x05:
- //
- // CD-ROM
- //
- MediaInfo->DeviceType = IdeCDROM;
- MediaInfo->MediaPresent = FALSE;
- MediaInfo->LastBlock = 0;
- MediaInfo->BlockSize = 0x800;
- MediaInfo2->InterfaceType = MSG_ATAPI_DP;
- MediaInfo2->RemovableMedia = TRUE;
- MediaInfo2->MediaPresent = FALSE;
- MediaInfo2->ReadOnly = TRUE;
- MediaInfo2->BlockSize = 0x200;
- MediaInfo2->LastBlock = 0;
- break;
-
- default:
- return EFI_UNSUPPORTED;
+ case 0x00:
+ //
+ // Magnetic Disk
+ //
+ MediaInfo->DeviceType = IdeLS120;
+ MediaInfo->MediaPresent = FALSE;
+ MediaInfo->LastBlock = 0;
+ MediaInfo->BlockSize = 0x200;
+ MediaInfo2->InterfaceType = MSG_ATAPI_DP;
+ MediaInfo2->RemovableMedia = TRUE;
+ MediaInfo2->MediaPresent = FALSE;
+ MediaInfo2->ReadOnly = FALSE;
+ MediaInfo2->BlockSize = 0x200;
+ MediaInfo2->LastBlock = 0;
+ break;
+
+ case 0x05:
+ //
+ // CD-ROM
+ //
+ MediaInfo->DeviceType = IdeCDROM;
+ MediaInfo->MediaPresent = FALSE;
+ MediaInfo->LastBlock = 0;
+ MediaInfo->BlockSize = 0x800;
+ MediaInfo2->InterfaceType = MSG_ATAPI_DP;
+ MediaInfo2->RemovableMedia = TRUE;
+ MediaInfo2->MediaPresent = FALSE;
+ MediaInfo2->ReadOnly = TRUE;
+ MediaInfo2->BlockSize = 0x200;
+ MediaInfo2->LastBlock = 0;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED;
}
return EFI_SUCCESS;
@@ -1712,13 +1718,12 @@ Inquiry (
**/
EFI_STATUS
DetectMedia (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
)
{
-
UINTN Index;
UINTN RetryNum;
UINTN MaxRetryNum;
@@ -1738,7 +1743,6 @@ DetectMedia (
// the device will produce corresponding Sense data.
//
for (Index = 0; Index < 2; Index++) {
-
Status = TestUnitReady (AtapiBlkIoDev, DevicePosition);
if (Status != EFI_SUCCESS) {
Status = ResetDevice (AtapiBlkIoDev, DevicePosition, FALSE);
@@ -1746,24 +1750,23 @@ DetectMedia (
if (Status != EFI_SUCCESS) {
ResetDevice (AtapiBlkIoDev, DevicePosition, TRUE);
}
-
} else {
break;
}
}
- SenseCounts = MAX_SENSE_KEY_COUNT;
- Status = EFI_SUCCESS;
- NeedReadCapacity = TRUE;
+ SenseCounts = MAX_SENSE_KEY_COUNT;
+ Status = EFI_SUCCESS;
+ NeedReadCapacity = TRUE;
for (Index = 0; Index < 5; Index++) {
SenseCounts = MAX_SENSE_KEY_COUNT;
- Status = RequestSense (
- AtapiBlkIoDev,
- DevicePosition,
- SenseBuffers,
- &SenseCounts
- );
+ Status = RequestSense (
+ AtapiBlkIoDev,
+ DevicePosition,
+ SenseBuffers,
+ &SenseCounts
+ );
DEBUG ((DEBUG_INFO, "Atapi Request Sense Count is %d\n", SenseCounts));
if (IsDeviceStateUnclear (SenseBuffers, SenseCounts) || IsNoMedia (SenseBuffers, SenseCounts)) {
//
@@ -1776,12 +1779,10 @@ DetectMedia (
}
if (Status == EFI_SUCCESS) {
-
if (IsNoMedia (SenseBuffers, SenseCounts)) {
-
- NeedReadCapacity = FALSE;
- MediaInfo->MediaPresent = FALSE;
- MediaInfo->LastBlock = 0;
+ NeedReadCapacity = FALSE;
+ MediaInfo->MediaPresent = FALSE;
+ MediaInfo->LastBlock = 0;
MediaInfo2->MediaPresent = FALSE;
MediaInfo2->LastBlock = 0;
}
@@ -1801,19 +1802,16 @@ DetectMedia (
// initial retry once
//
for (Index = 0; (Index < RetryNum) && (Index < MaxRetryNum); Index++) {
-
Status = ReadCapacity (AtapiBlkIoDev, DevicePosition, MediaInfo, MediaInfo2);
MicroSecondDelay (200000);
SenseCounts = MAX_SENSE_KEY_COUNT;
if (Status != EFI_SUCCESS) {
-
Status = RequestSense (AtapiBlkIoDev, DevicePosition, SenseBuffers, &SenseCounts);
//
// If Request Sense data failed, reset the device and retry.
//
if (Status != EFI_SUCCESS) {
-
Status = ResetDevice (AtapiBlkIoDev, DevicePosition, FALSE);
//
// if ATAPI soft reset fail,
@@ -1829,13 +1827,13 @@ DetectMedia (
//
continue;
}
+
//
// No Media
//
if (IsNoMedia (SenseBuffers, SenseCounts)) {
-
- MediaInfo->MediaPresent = FALSE;
- MediaInfo->LastBlock = 0;
+ MediaInfo->MediaPresent = FALSE;
+ MediaInfo->LastBlock = 0;
MediaInfo2->MediaPresent = FALSE;
MediaInfo2->LastBlock = 0;
break;
@@ -1857,15 +1855,13 @@ DetectMedia (
return EFI_DEVICE_ERROR;
}
}
+
//
// if read capacity fail not for above reasons, retry once more
//
RetryNum++;
-
}
-
}
-
}
return EFI_SUCCESS;
@@ -1898,18 +1894,17 @@ ResetDevice (
UINT8 Channel;
UINT8 Device;
- Channel = (UINT8) (DevicePosition / 2);
- Device = (UINT8) (DevicePosition % 2);
+ Channel = (UINT8)(DevicePosition / 2);
+ Device = (UINT8)(DevicePosition % 2);
ASSERT (Channel < MAX_IDE_CHANNELS);
- DeviceControlReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Alt.DeviceControl;
- CommandReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Command;
- HeadReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Head;
+ DeviceControlReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Alt.DeviceControl;
+ CommandReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Reg.Command;
+ HeadReg = AtapiBlkIoDev->IdeIoPortReg[Channel].Head;
if (Extensive) {
-
- DevControl = 0;
+ DevControl = 0;
DevControl |= ATA_CTLREG_SRST;
//
// set SRST bit to initiate soft reset
@@ -1940,13 +1935,12 @@ ResetDevice (
if (WaitForBSYClear (AtapiBlkIoDev, &(AtapiBlkIoDev->IdeIoPortReg[Channel]), 31000) == EFI_TIMEOUT) {
return EFI_DEVICE_ERROR;
}
-
} else {
//
// for ATAPI device, no need to wait DRDY ready after device selecting.
// bit7 and bit5 are both set to 1 for backward compatibility
//
- DeviceSelect = (UINT8) (((BIT7 | BIT5) | (Device << 4)));
+ DeviceSelect = (UINT8)(((BIT7 | BIT5) | (Device << 4)));
IoWrite8 (HeadReg, DeviceSelect);
Command = ATA_CMD_SOFT_RESET;
@@ -1959,6 +1953,7 @@ ResetDevice (
if (WaitForBSYClear (AtapiBlkIoDev, &(AtapiBlkIoDev->IdeIoPortReg[Channel]), 31000) != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
+
//
// stall 5 seconds to make the device status stable
//
@@ -1966,7 +1961,6 @@ ResetDevice (
}
return EFI_SUCCESS;
-
}
/**
@@ -1983,17 +1977,17 @@ ResetDevice (
**/
EFI_STATUS
RequestSense (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN ATAPI_REQUEST_SENSE_DATA *SenseBuffers,
- IN OUT UINT8 *SenseCounts
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN ATAPI_REQUEST_SENSE_DATA *SenseBuffers,
+ IN OUT UINT8 *SenseCounts
)
{
- EFI_STATUS Status;
- ATAPI_REQUEST_SENSE_DATA *Sense;
- UINT16 *Ptr;
- BOOLEAN SenseReq;
- ATAPI_PACKET_COMMAND Packet;
+ EFI_STATUS Status;
+ ATAPI_REQUEST_SENSE_DATA *Sense;
+ UINT16 *Ptr;
+ BOOLEAN SenseReq;
+ ATAPI_PACKET_COMMAND Packet;
ZeroMem (SenseBuffers, sizeof (ATAPI_REQUEST_SENSE_DATA) * (*SenseCounts));
//
@@ -2001,9 +1995,9 @@ RequestSense (
//
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
Packet.RequestSence.opcode = ATA_CMD_REQUEST_SENSE;
- Packet.RequestSence.allocation_length = (UINT8) sizeof (ATAPI_REQUEST_SENSE_DATA);
+ Packet.RequestSence.allocation_length = (UINT8)sizeof (ATAPI_REQUEST_SENSE_DATA);
- Ptr = (UINT16 *) SenseBuffers;
+ Ptr = (UINT16 *)SenseBuffers;
//
// initialize pointer
//
@@ -2012,20 +2006,19 @@ RequestSense (
// request sense data from device continiously until no sense data exists in the device.
//
for (SenseReq = TRUE; SenseReq;) {
-
- Sense = (ATAPI_REQUEST_SENSE_DATA *) Ptr;
+ Sense = (ATAPI_REQUEST_SENSE_DATA *)Ptr;
//
// send out Request Sense Packet Command and get one Sense data form device
//
Status = AtapiPacketCommandIn (
- AtapiBlkIoDev,
- DevicePosition,
- &Packet,
- Ptr,
- sizeof (ATAPI_REQUEST_SENSE_DATA),
- ATAPITIMEOUT
- );
+ AtapiBlkIoDev,
+ DevicePosition,
+ &Packet,
+ Ptr,
+ sizeof (ATAPI_REQUEST_SENSE_DATA),
+ ATAPITIMEOUT
+ );
//
// failed to get Sense data
//
@@ -2042,6 +2035,7 @@ RequestSense (
if (*SenseCounts > MAX_SENSE_KEY_COUNT) {
return EFI_SUCCESS;
}
+
//
// We limit MAX sense data count to 20 in order to avoid dead loop. Some
// incompatible ATAPI devices don't retrive NO_SENSE when there is no media.
@@ -2049,7 +2043,6 @@ RequestSense (
// supposed to be large enough for any ATAPI device.
//
if ((Sense->sense_key != ATA_SK_NO_SENSE) && ((*SenseCounts) < 20)) {
-
Ptr += sizeof (ATAPI_REQUEST_SENSE_DATA) / 2;
//
// Ptr is word based pointer
@@ -2081,65 +2074,61 @@ RequestSense (
**/
EFI_STATUS
ReadCapacity (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
)
{
- EFI_STATUS Status;
- ATAPI_PACKET_COMMAND Packet;
+ EFI_STATUS Status;
+ ATAPI_PACKET_COMMAND Packet;
//
// used for capacity data returned from ATAPI device
//
- ATAPI_READ_CAPACITY_DATA Data;
- ATAPI_READ_FORMAT_CAPACITY_DATA FormatData;
+ ATAPI_READ_CAPACITY_DATA Data;
+ ATAPI_READ_FORMAT_CAPACITY_DATA FormatData;
ZeroMem (&Data, sizeof (Data));
ZeroMem (&FormatData, sizeof (FormatData));
if (MediaInfo->DeviceType == IdeCDROM) {
-
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
Packet.Inquiry.opcode = ATA_CMD_READ_CAPACITY;
- Status = AtapiPacketCommandIn (
- AtapiBlkIoDev,
- DevicePosition,
- &Packet,
- (UINT16 *) (&Data),
- sizeof (ATAPI_READ_CAPACITY_DATA),
- ATAPITIMEOUT
- );
-
+ Status = AtapiPacketCommandIn (
+ AtapiBlkIoDev,
+ DevicePosition,
+ &Packet,
+ (UINT16 *)(&Data),
+ sizeof (ATAPI_READ_CAPACITY_DATA),
+ ATAPITIMEOUT
+ );
} else {
//
// DeviceType == IdeLS120
//
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
- Packet.ReadFormatCapacity.opcode = ATA_CMD_READ_FORMAT_CAPACITY;
- Packet.ReadFormatCapacity.allocation_length_lo = 12;
- Status = AtapiPacketCommandIn (
- AtapiBlkIoDev,
- DevicePosition,
- &Packet,
- (UINT16 *) (&FormatData),
- sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA),
- ATAPITIMEOUT*10
- );
+ Packet.ReadFormatCapacity.opcode = ATA_CMD_READ_FORMAT_CAPACITY;
+ Packet.ReadFormatCapacity.allocation_length_lo = 12;
+ Status = AtapiPacketCommandIn (
+ AtapiBlkIoDev,
+ DevicePosition,
+ &Packet,
+ (UINT16 *)(&FormatData),
+ sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA),
+ ATAPITIMEOUT*10
+ );
}
if (Status == EFI_SUCCESS) {
-
if (MediaInfo->DeviceType == IdeCDROM) {
-
- MediaInfo->LastBlock = ((UINT32) Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0;
+ MediaInfo->LastBlock = ((UINT32)Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0;
MediaInfo->MediaPresent = TRUE;
//
// Because the user data portion in the sector of the Data CD supported
// is always 800h
//
- MediaInfo->BlockSize = 0x800;
+ MediaInfo->BlockSize = 0x800;
MediaInfo2->LastBlock = MediaInfo->LastBlock;
MediaInfo2->MediaPresent = MediaInfo->MediaPresent;
@@ -2147,32 +2136,29 @@ ReadCapacity (
}
if (MediaInfo->DeviceType == IdeLS120) {
-
if (FormatData.DesCode == 3) {
- MediaInfo->MediaPresent = FALSE;
- MediaInfo->LastBlock = 0;
+ MediaInfo->MediaPresent = FALSE;
+ MediaInfo->LastBlock = 0;
MediaInfo2->MediaPresent = FALSE;
MediaInfo2->LastBlock = 0;
} else {
- MediaInfo->LastBlock = ((UINT32) FormatData.LastLba3 << 24) |
- (FormatData.LastLba2 << 16) |
- (FormatData.LastLba1 << 8) |
- FormatData.LastLba0;
+ MediaInfo->LastBlock = ((UINT32)FormatData.LastLba3 << 24) |
+ (FormatData.LastLba2 << 16) |
+ (FormatData.LastLba1 << 8) |
+ FormatData.LastLba0;
MediaInfo->LastBlock--;
MediaInfo->MediaPresent = TRUE;
- MediaInfo->BlockSize = 0x200;
+ MediaInfo->BlockSize = 0x200;
MediaInfo2->LastBlock = MediaInfo->LastBlock;
MediaInfo2->MediaPresent = MediaInfo->MediaPresent;
MediaInfo2->BlockSize = (UINT32)MediaInfo->BlockSize;
-
}
}
return EFI_SUCCESS;
-
} else {
return EFI_DEVICE_ERROR;
}
@@ -2194,15 +2180,14 @@ ReadCapacity (
**/
EFI_STATUS
ReadSectors (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN VOID *Buffer,
- IN EFI_PEI_LBA StartLba,
- IN UINTN NumberOfBlocks,
- IN UINTN BlockSize
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN VOID *Buffer,
+ IN EFI_PEI_LBA StartLba,
+ IN UINTN NumberOfBlocks,
+ IN UINTN BlockSize
)
{
-
ATAPI_PACKET_COMMAND Packet;
ATAPI_READ10_CMD *Read10Packet;
EFI_STATUS Status;
@@ -2217,27 +2202,27 @@ ReadSectors (
// fill command packet for Read(10) command
//
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
- Read10Packet = &Packet.Read10;
- Lba32 = (UINT32) StartLba;
- PtrBuffer = Buffer;
+ Read10Packet = &Packet.Read10;
+ Lba32 = (UINT32)StartLba;
+ PtrBuffer = Buffer;
//
// limit the data bytes that can be transfered by one Read(10) Command
//
- MaxBlock = (UINT16) (0x10000 / BlockSize);
+ MaxBlock = (UINT16)(0x10000 / BlockSize);
//
// (64k bytes)
//
BlocksRemaining = NumberOfBlocks;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
- SectorCount = (UINT16) BlocksRemaining;
+ SectorCount = (UINT16)BlocksRemaining;
} else {
SectorCount = MaxBlock;
}
+
//
// fill the Packet data sturcture
//
@@ -2247,34 +2232,34 @@ ReadSectors (
// Lba0 ~ Lba3 specify the start logical block address of the data transfer.
// Lba0 is MSB, Lba3 is LSB
//
- Read10Packet->Lba3 = (UINT8) (Lba32 & 0xff);
- Read10Packet->Lba2 = (UINT8) (Lba32 >> 8);
- Read10Packet->Lba1 = (UINT8) (Lba32 >> 16);
- Read10Packet->Lba0 = (UINT8) (Lba32 >> 24);
+ Read10Packet->Lba3 = (UINT8)(Lba32 & 0xff);
+ Read10Packet->Lba2 = (UINT8)(Lba32 >> 8);
+ Read10Packet->Lba1 = (UINT8)(Lba32 >> 16);
+ Read10Packet->Lba0 = (UINT8)(Lba32 >> 24);
//
// TranLen0 ~ TranLen1 specify the transfer length in block unit.
// TranLen0 is MSB, TranLen is LSB
//
- Read10Packet->TranLen1 = (UINT8) (SectorCount & 0xff);
- Read10Packet->TranLen0 = (UINT8) (SectorCount >> 8);
+ Read10Packet->TranLen1 = (UINT8)(SectorCount & 0xff);
+ Read10Packet->TranLen0 = (UINT8)(SectorCount >> 8);
- ByteCount = (UINT32) (SectorCount * BlockSize);
+ ByteCount = (UINT32)(SectorCount * BlockSize);
Status = AtapiPacketCommandIn (
- AtapiBlkIoDev,
- DevicePosition,
- &Packet,
- (UINT16 *) PtrBuffer,
- ByteCount,
- ATAPILONGTIMEOUT
- );
+ AtapiBlkIoDev,
+ DevicePosition,
+ &Packet,
+ (UINT16 *)PtrBuffer,
+ ByteCount,
+ ATAPILONGTIMEOUT
+ );
if (Status != EFI_SUCCESS) {
return Status;
}
- Lba32 += SectorCount;
- PtrBuffer = (UINT8 *) PtrBuffer + SectorCount * BlockSize;
+ Lba32 += SectorCount;
+ PtrBuffer = (UINT8 *)PtrBuffer + SectorCount * BlockSize;
BlocksRemaining -= SectorCount;
}
@@ -2303,10 +2288,9 @@ IsNoMedia (
IsNoMedia = FALSE;
- SensePtr = SenseData;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
if ((SensePtr->sense_key == ATA_SK_NOT_READY) && (SensePtr->addnl_sense_code == ATA_ASC_NO_MEDIA)) {
IsNoMedia = TRUE;
}
@@ -2329,20 +2313,19 @@ IsNoMedia (
**/
BOOLEAN
IsDeviceStateUnclear (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
ATAPI_REQUEST_SENSE_DATA *SensePtr;
UINTN Index;
BOOLEAN Unclear;
- Unclear = FALSE;
+ Unclear = FALSE;
- SensePtr = SenseData;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
if (SensePtr->sense_key == 0x06) {
//
// Sense key is 0x06 means the device is just be reset or media just
@@ -2378,51 +2361,50 @@ IsMediaError (
UINTN Index;
BOOLEAN IsError;
- IsError = FALSE;
+ IsError = FALSE;
- SensePtr = SenseData;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->sense_key) {
+ case ATA_SK_MEDIUM_ERROR:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_MEDIA_ERR1:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR2:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR3:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR4:
+ IsError = TRUE;
+ break;
- case ATA_SK_MEDIUM_ERROR:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_MEDIA_ERR1:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR2:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR3:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR4:
- IsError = TRUE;
- break;
+ default:
+ break;
+ }
- default:
break;
- }
- break;
+ case ATA_SK_NOT_READY:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_MEDIA_UPSIDE_DOWN:
+ IsError = TRUE;
+ break;
+
+ default:
+ break;
+ }
- case ATA_SK_NOT_READY:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_MEDIA_UPSIDE_DOWN:
- IsError = TRUE;
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
@@ -2444,47 +2426,47 @@ IsMediaError (
**/
BOOLEAN
IsDriveReady (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts,
- OUT BOOLEAN *NeedRetry
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts,
+ OUT BOOLEAN *NeedRetry
)
{
ATAPI_REQUEST_SENSE_DATA *SensePtr;
UINTN Index;
BOOLEAN IsReady;
- IsReady = TRUE;
- *NeedRetry = FALSE;
+ IsReady = TRUE;
+ *NeedRetry = FALSE;
- SensePtr = SenseData;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->sense_key) {
-
- case ATA_SK_NOT_READY:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_NOT_READY:
- switch (SensePtr->addnl_sense_code_qualifier) {
- case ATA_ASCQ_IN_PROGRESS:
- IsReady = FALSE;
- *NeedRetry = TRUE;
- break;
-
- default:
- IsReady = FALSE;
- *NeedRetry = FALSE;
- break;
+ case ATA_SK_NOT_READY:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_NOT_READY:
+ switch (SensePtr->addnl_sense_code_qualifier) {
+ case ATA_ASCQ_IN_PROGRESS:
+ IsReady = FALSE;
+ *NeedRetry = TRUE;
+ break;
+
+ default:
+ IsReady = FALSE;
+ *NeedRetry = FALSE;
+ break;
+ }
+
+ break;
+
+ default:
+ break;
}
+
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
diff --git a/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.h b/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.h
index 8851b11185..abc1dc661b 100644
--- a/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.h
+++ b/MdeModulePkg/Bus/Pci/IdeBusPei/AtapiPeim.h
@@ -26,12 +26,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
-
#include <IndustryStandard/Atapi.h>
-#define MAX_SENSE_KEY_COUNT 6
-#define MAX_IDE_CHANNELS 4 // Ide and Sata Primary, Secondary Channel.
-#define MAX_IDE_DEVICES 8 // Ide, Sata Primary, Secondary and Master, Slave device.
+#define MAX_SENSE_KEY_COUNT 6
+#define MAX_IDE_CHANNELS 4 // Ide and Sata Primary, Secondary Channel.
+#define MAX_IDE_DEVICES 8 // Ide, Sata Primary, Secondary and Master, Slave device.
typedef enum {
IdePrimary = 0,
@@ -40,72 +39,69 @@ typedef enum {
} EFI_IDE_CHANNEL;
typedef enum {
- IdeMaster = 0,
- IdeSlave = 1,
- IdeMaxDevice = 2
+ IdeMaster = 0,
+ IdeSlave = 1,
+ IdeMaxDevice = 2
} EFI_IDE_DEVICE;
//
// IDE Registers
//
typedef union {
- UINT16 Command; /* when write */
- UINT16 Status; /* when read */
+ UINT16 Command; /* when write */
+ UINT16 Status; /* when read */
} IDE_CMD_OR_STATUS;
typedef union {
- UINT16 Error; /* when read */
- UINT16 Feature; /* when write */
+ UINT16 Error; /* when read */
+ UINT16 Feature; /* when write */
} IDE_ERROR_OR_FEATURE;
typedef union {
- UINT16 AltStatus; /* when read */
- UINT16 DeviceControl; /* when write */
+ UINT16 AltStatus; /* when read */
+ UINT16 DeviceControl; /* when write */
} IDE_ALTSTATUS_OR_DEVICECONTROL;
//
// IDE registers set
//
typedef struct {
- UINT16 Data;
- IDE_ERROR_OR_FEATURE Reg1;
- UINT16 SectorCount;
- UINT16 SectorNumber;
- UINT16 CylinderLsb;
- UINT16 CylinderMsb;
- UINT16 Head;
- IDE_CMD_OR_STATUS Reg;
-
- IDE_ALTSTATUS_OR_DEVICECONTROL Alt;
- UINT16 DriveAddress;
+ UINT16 Data;
+ IDE_ERROR_OR_FEATURE Reg1;
+ UINT16 SectorCount;
+ UINT16 SectorNumber;
+ UINT16 CylinderLsb;
+ UINT16 CylinderMsb;
+ UINT16 Head;
+ IDE_CMD_OR_STATUS Reg;
+
+ IDE_ALTSTATUS_OR_DEVICECONTROL Alt;
+ UINT16 DriveAddress;
} IDE_BASE_REGISTERS;
typedef struct {
-
- UINTN DevicePosition;
- EFI_PEI_BLOCK_IO_MEDIA MediaInfo;
- EFI_PEI_BLOCK_IO2_MEDIA MediaInfo2;
-
+ UINTN DevicePosition;
+ EFI_PEI_BLOCK_IO_MEDIA MediaInfo;
+ EFI_PEI_BLOCK_IO2_MEDIA MediaInfo2;
} PEI_ATAPI_DEVICE_INFO;
#define ATAPI_BLK_IO_DEV_SIGNATURE SIGNATURE_32 ('a', 'b', 'i', 'o')
typedef struct {
- UINTN Signature;
+ UINTN Signature;
- EFI_PEI_RECOVERY_BLOCK_IO_PPI AtapiBlkIo;
- EFI_PEI_RECOVERY_BLOCK_IO2_PPI AtapiBlkIo2;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor2;
- PEI_ATA_CONTROLLER_PPI *AtaControllerPpi;
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI AtapiBlkIo;
+ EFI_PEI_RECOVERY_BLOCK_IO2_PPI AtapiBlkIo2;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor2;
+ PEI_ATA_CONTROLLER_PPI *AtaControllerPpi;
- UINTN DeviceCount;
- PEI_ATAPI_DEVICE_INFO DeviceInfo[MAX_IDE_DEVICES]; //for max 8 device
- IDE_BASE_REGISTERS IdeIoPortReg[MAX_IDE_CHANNELS]; //for max 4 channel.
+ UINTN DeviceCount;
+ PEI_ATAPI_DEVICE_INFO DeviceInfo[MAX_IDE_DEVICES]; // for max 8 device
+ IDE_BASE_REGISTERS IdeIoPortReg[MAX_IDE_CHANNELS]; // for max 4 channel.
} ATAPI_BLK_IO_DEV;
-#define PEI_RECOVERY_ATAPI_FROM_BLKIO_THIS(a) CR (a, ATAPI_BLK_IO_DEV, AtapiBlkIo, ATAPI_BLK_IO_DEV_SIGNATURE)
-#define PEI_RECOVERY_ATAPI_FROM_BLKIO2_THIS(a) CR (a, ATAPI_BLK_IO_DEV, AtapiBlkIo2, ATAPI_BLK_IO_DEV_SIGNATURE)
-
+#define PEI_RECOVERY_ATAPI_FROM_BLKIO_THIS(a) CR (a, ATAPI_BLK_IO_DEV, AtapiBlkIo, ATAPI_BLK_IO_DEV_SIGNATURE)
+#define PEI_RECOVERY_ATAPI_FROM_BLKIO2_THIS(a) CR (a, ATAPI_BLK_IO_DEV, AtapiBlkIo2, ATAPI_BLK_IO_DEV_SIGNATURE)
#define STALL_1_MILLI_SECOND 1000 // stall 1 ms
#define STALL_1_SECONDS 1000 * STALL_1_MILLI_SECOND
@@ -152,9 +148,9 @@ typedef struct {
EFI_STATUS
EFIAPI
AtapiGetNumberOfBlockDevices (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -188,10 +184,10 @@ AtapiGetNumberOfBlockDevices (
EFI_STATUS
EFIAPI
AtapiGetBlockDeviceMediaInfo (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
);
/**
@@ -231,12 +227,12 @@ AtapiGetBlockDeviceMediaInfo (
EFI_STATUS
EFIAPI
AtapiReadBlocks (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -261,9 +257,9 @@ AtapiReadBlocks (
EFI_STATUS
EFIAPI
AtapiGetNumberOfBlockDevices2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -297,10 +293,10 @@ AtapiGetNumberOfBlockDevices2 (
EFI_STATUS
EFIAPI
AtapiGetBlockDeviceMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -340,12 +336,12 @@ AtapiGetBlockDeviceMediaInfo2 (
EFI_STATUS
EFIAPI
AtapiReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
//
@@ -379,10 +375,10 @@ AtapiEnumerateDevices (
**/
BOOLEAN
DiscoverAtapiDevice (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
);
/**
@@ -397,8 +393,8 @@ DiscoverAtapiDevice (
**/
BOOLEAN
DetectIDEController (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
);
/**
@@ -523,8 +519,8 @@ DRQReady2 (
**/
EFI_STATUS
CheckErrorStatus (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINT16 StatusReg
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINT16 StatusReg
);
/**
@@ -539,8 +535,8 @@ CheckErrorStatus (
**/
EFI_STATUS
ATAPIIdentify (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
);
/**
@@ -556,9 +552,9 @@ ATAPIIdentify (
**/
EFI_STATUS
TestUnitReady (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition
- ) ;
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition
+ );
/**
Send out ATAPI commands conforms to the Packet Command with PIO Data In Protocol.
@@ -600,10 +596,10 @@ AtapiPacketCommandIn (
**/
EFI_STATUS
Inquiry (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
);
/**
@@ -623,10 +619,10 @@ Inquiry (
**/
EFI_STATUS
DetectMedia (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
);
/**
@@ -683,10 +679,10 @@ RequestSense (
**/
EFI_STATUS
ReadCapacity (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
- IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo,
+ IN OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo2
);
/**
@@ -705,12 +701,12 @@ ReadCapacity (
**/
EFI_STATUS
ReadSectors (
- IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
- IN UINTN DevicePosition,
- IN VOID *Buffer,
- IN EFI_PEI_LBA StartLba,
- IN UINTN NumberOfBlocks,
- IN UINTN BlockSize
+ IN ATAPI_BLK_IO_DEV *AtapiBlkIoDev,
+ IN UINTN DevicePosition,
+ IN VOID *Buffer,
+ IN EFI_PEI_LBA StartLba,
+ IN UINTN NumberOfBlocks,
+ IN UINTN BlockSize
);
/**
@@ -725,8 +721,8 @@ ReadSectors (
**/
BOOLEAN
IsNoMedia (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -741,8 +737,8 @@ IsNoMedia (
**/
BOOLEAN
IsDeviceStateUnclear (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -757,8 +753,8 @@ IsDeviceStateUnclear (
**/
BOOLEAN
IsMediaError (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -774,9 +770,9 @@ IsMediaError (
**/
BOOLEAN
IsDriveReady (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts,
- OUT BOOLEAN *NeedRetry
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts,
+ OUT BOOLEAN *NeedRetry
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c b/MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
index be9f873c39..aae16cd856 100644
--- a/MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c
@@ -21,32 +21,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Acpi.h>
typedef struct {
- UINT64 VendorId;
- UINT64 DeviceId;
- UINT64 RevisionId;
- UINT64 SubsystemVendorId;
- UINT64 SubsystemDeviceId;
+ UINT64 VendorId;
+ UINT64 DeviceId;
+ UINT64 RevisionId;
+ UINT64 SubsystemVendorId;
+ UINT64 SubsystemDeviceId;
} EFI_PCI_DEVICE_HEADER_INFO;
typedef struct {
- UINT64 ResType;
- UINT64 GenFlag;
- UINT64 SpecificFlag;
- UINT64 AddrSpaceGranularity;
- UINT64 AddrRangeMin;
- UINT64 AddrRangeMax;
- UINT64 AddrTranslationOffset;
- UINT64 AddrLen;
+ UINT64 ResType;
+ UINT64 GenFlag;
+ UINT64 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
} EFI_PCI_RESOUCE_DESCRIPTOR;
#define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
-#define DEVICE_INF_TAG 0xFFF2
-#define DEVICE_RES_TAG 0xFFF1
-#define LIST_END_TAG 0x0000
+#define DEVICE_INF_TAG 0xFFF2
+#define DEVICE_RES_TAG 0xFFF1
+#define LIST_END_TAG 0x0000
-#define EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
+#define EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
/**
Returns a list of ACPI resource descriptors that detail the special
@@ -82,7 +82,7 @@ PCheckDevice (
//
// Handle onto which the Incompatible PCI Device List is installed
//
-EFI_HANDLE mIncompatiblePciDeviceSupportHandle = NULL;
+EFI_HANDLE mIncompatiblePciDeviceSupportHandle = NULL;
//
// The Incompatible PCI Device Support Protocol instance produced by this driver
@@ -94,7 +94,7 @@ EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL mIncompatiblePciDeviceSupport = {
//
// The incompatible PCI devices list template
//
-GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
//
// DEVICE_INF_TAG,
// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
@@ -106,7 +106,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
// Device Adaptec 9004
//
DEVICE_INF_TAG,
- PCI_DEVICE_ID(0x9004, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
+ PCI_DEVICE_ID (0x9004, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
DEVICE_RES_TAG,
ACPI_ADDRESS_SPACE_TYPE_IO,
0,
@@ -120,7 +120,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
// Device Adaptec 9005
//
DEVICE_INF_TAG,
- PCI_DEVICE_ID(0x9005, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
+ PCI_DEVICE_ID (0x9005, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
DEVICE_RES_TAG,
ACPI_ADDRESS_SPACE_TYPE_IO,
0,
@@ -134,7 +134,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
// Device QLogic 1007
//
DEVICE_INF_TAG,
- PCI_DEVICE_ID(0x1077, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
+ PCI_DEVICE_ID (0x1077, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
DEVICE_RES_TAG,
ACPI_ADDRESS_SPACE_TYPE_IO,
0,
@@ -148,7 +148,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
// Device Agilent 103C
//
DEVICE_INF_TAG,
- PCI_DEVICE_ID(0x103C, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
+ PCI_DEVICE_ID (0x103C, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
DEVICE_RES_TAG,
ACPI_ADDRESS_SPACE_TYPE_IO,
0,
@@ -162,7 +162,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
// Device Agilent 15BC
//
DEVICE_INF_TAG,
- PCI_DEVICE_ID(0x15BC, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
+ PCI_DEVICE_ID (0x15BC, MAX_UINT64, MAX_UINT64, MAX_UINT64, MAX_UINT64),
DEVICE_RES_TAG,
ACPI_ADDRESS_SPACE_TYPE_IO,
0,
@@ -178,7 +178,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
LIST_END_TAG
};
-
/**
Entry point of the incompatible pci device support code. Setup an incompatible device list template
and install EFI Incompatible PCI Device Support protocol.
@@ -193,11 +192,11 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
EFI_STATUS
EFIAPI
IncompatiblePciDeviceSupportEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install EFI Incompatible PCI Device Support Protocol on a new handle
@@ -244,15 +243,15 @@ PCheckDevice (
OUT VOID **Configuration
)
{
- UINT64 Tag;
- UINT64 *ListPtr;
- UINT64 *TempListPtr;
- EFI_PCI_DEVICE_HEADER_INFO *Header;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AcpiPtr;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *OldAcpiPtr;
- EFI_PCI_RESOUCE_DESCRIPTOR *Dsc;
- EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
- UINTN Index;
+ UINT64 Tag;
+ UINT64 *ListPtr;
+ UINT64 *TempListPtr;
+ EFI_PCI_DEVICE_HEADER_INFO *Header;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AcpiPtr;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *OldAcpiPtr;
+ EFI_PCI_RESOUCE_DESCRIPTOR *Dsc;
+ EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
+ UINTN Index;
//
// Validate the parameters
@@ -260,120 +259,121 @@ PCheckDevice (
if (Configuration == NULL) {
return EFI_INVALID_PARAMETER;
}
+
//
// Initialize the return value to NULL
//
- * (VOID **) Configuration = NULL;
+ *(VOID **)Configuration = NULL;
- ListPtr = mIncompatiblePciDeviceList;
+ ListPtr = mIncompatiblePciDeviceList;
while (*ListPtr != LIST_END_TAG) {
-
Tag = *ListPtr;
switch (Tag) {
- case DEVICE_INF_TAG:
- Header = (EFI_PCI_DEVICE_HEADER_INFO *) (ListPtr + 1);
- ListPtr = ListPtr + 1 + sizeof (EFI_PCI_DEVICE_HEADER_INFO) / sizeof (UINT64);
- //
- // See if the Header matches the parameters passed in
- //
- if ((Header->VendorId != MAX_UINT64) && (VendorId != MAX_UINTN)) {
- if (Header->VendorId != VendorId) {
- continue;
+ case DEVICE_INF_TAG:
+ Header = (EFI_PCI_DEVICE_HEADER_INFO *)(ListPtr + 1);
+ ListPtr = ListPtr + 1 + sizeof (EFI_PCI_DEVICE_HEADER_INFO) / sizeof (UINT64);
+ //
+ // See if the Header matches the parameters passed in
+ //
+ if ((Header->VendorId != MAX_UINT64) && (VendorId != MAX_UINTN)) {
+ if (Header->VendorId != VendorId) {
+ continue;
+ }
}
- }
- if ((Header->DeviceId != MAX_UINT64) && (DeviceId != MAX_UINTN)) {
- if (DeviceId != Header->DeviceId) {
- continue;
+ if ((Header->DeviceId != MAX_UINT64) && (DeviceId != MAX_UINTN)) {
+ if (DeviceId != Header->DeviceId) {
+ continue;
+ }
}
- }
- if ((Header->RevisionId != MAX_UINT64) && (RevisionId != MAX_UINTN)) {
- if (RevisionId != Header->RevisionId) {
- continue;
+ if ((Header->RevisionId != MAX_UINT64) && (RevisionId != MAX_UINTN)) {
+ if (RevisionId != Header->RevisionId) {
+ continue;
+ }
}
- }
- if ((Header->SubsystemVendorId != MAX_UINT64) && (SubsystemVendorId != MAX_UINTN)) {
- if (SubsystemVendorId != Header->SubsystemVendorId) {
- continue;
+ if ((Header->SubsystemVendorId != MAX_UINT64) && (SubsystemVendorId != MAX_UINTN)) {
+ if (SubsystemVendorId != Header->SubsystemVendorId) {
+ continue;
+ }
}
- }
- if ((Header->SubsystemDeviceId != MAX_UINT64) && (SubsystemDeviceId != MAX_UINTN)) {
- if (SubsystemDeviceId != Header->SubsystemDeviceId) {
- continue;
+ if ((Header->SubsystemDeviceId != MAX_UINT64) && (SubsystemDeviceId != MAX_UINTN)) {
+ if (SubsystemDeviceId != Header->SubsystemDeviceId) {
+ continue;
+ }
}
- }
- //
- // Matched an item, so construct the ACPI descriptor for the resource.
- //
- //
- // Count the resource items so that to allocate space
- //
- for (Index = 0, TempListPtr = ListPtr; *TempListPtr == DEVICE_RES_TAG; Index++) {
- TempListPtr = TempListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
- }
- //
- // If there is at least one type of resource request,
- // allocate an acpi resource node
- //
- if (Index == 0) {
- return EFI_UNSUPPORTED;
- }
-
- AcpiPtr = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * Index + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
- if (AcpiPtr == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- OldAcpiPtr = AcpiPtr;
- //
- // Fill the EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR structure
- // according to the EFI_PCI_RESOUCE_DESCRIPTOR structure
- //
- for (; *ListPtr == DEVICE_RES_TAG;) {
-
- Dsc = (EFI_PCI_RESOUCE_DESCRIPTOR *) (ListPtr + 1);
-
- AcpiPtr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- AcpiPtr->Len = (UINT16) sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
- AcpiPtr->ResType = (UINT8) Dsc->ResType;
- AcpiPtr->GenFlag = (UINT8) Dsc->GenFlag;
- AcpiPtr->SpecificFlag = (UINT8) Dsc->SpecificFlag;
- AcpiPtr->AddrSpaceGranularity = Dsc->AddrSpaceGranularity;;
- AcpiPtr->AddrRangeMin = Dsc->AddrRangeMin;
- AcpiPtr->AddrRangeMax = Dsc->AddrRangeMax;
- AcpiPtr->AddrTranslationOffset = Dsc->AddrTranslationOffset;
- AcpiPtr->AddrLen = Dsc->AddrLen;
+ //
+ // Matched an item, so construct the ACPI descriptor for the resource.
+ //
+ //
+ // Count the resource items so that to allocate space
+ //
+ for (Index = 0, TempListPtr = ListPtr; *TempListPtr == DEVICE_RES_TAG; Index++) {
+ TempListPtr = TempListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
+ }
+
+ //
+ // If there is at least one type of resource request,
+ // allocate an acpi resource node
+ //
+ if (Index == 0) {
+ return EFI_UNSUPPORTED;
+ }
+
+ AcpiPtr = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * Index + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
+ if (AcpiPtr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ OldAcpiPtr = AcpiPtr;
+ //
+ // Fill the EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR structure
+ // according to the EFI_PCI_RESOUCE_DESCRIPTOR structure
+ //
+ for ( ; *ListPtr == DEVICE_RES_TAG;) {
+ Dsc = (EFI_PCI_RESOUCE_DESCRIPTOR *)(ListPtr + 1);
+
+ AcpiPtr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ AcpiPtr->Len = (UINT16)sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
+ AcpiPtr->ResType = (UINT8)Dsc->ResType;
+ AcpiPtr->GenFlag = (UINT8)Dsc->GenFlag;
+ AcpiPtr->SpecificFlag = (UINT8)Dsc->SpecificFlag;
+ AcpiPtr->AddrSpaceGranularity = Dsc->AddrSpaceGranularity;
+ AcpiPtr->AddrRangeMin = Dsc->AddrRangeMin;
+ AcpiPtr->AddrRangeMax = Dsc->AddrRangeMax;
+ AcpiPtr->AddrTranslationOffset = Dsc->AddrTranslationOffset;
+ AcpiPtr->AddrLen = Dsc->AddrLen;
+
+ ListPtr = ListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
+ AcpiPtr++;
+ }
+
+ //
+ // Put the checksum
+ //
+ PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *)(AcpiPtr);
+ PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
+ PtrEnd->Checksum = 0;
+
+ *(VOID **)Configuration = OldAcpiPtr;
+
+ return EFI_SUCCESS;
+
+ case DEVICE_RES_TAG:
+ //
+ // Adjust the pointer to the next PCI resource descriptor item
+ //
ListPtr = ListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
- AcpiPtr++;
- }
- //
- // Put the checksum
- //
- PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) (AcpiPtr);
- PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
- PtrEnd->Checksum = 0;
-
- *(VOID **) Configuration = OldAcpiPtr;
-
- return EFI_SUCCESS;
-
- case DEVICE_RES_TAG:
- //
- // Adjust the pointer to the next PCI resource descriptor item
- //
- ListPtr = ListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
- break;
-
- default:
- return EFI_UNSUPPORTED;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED;
}
}
return EFI_UNSUPPORTED;
}
-
diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c
index 74b6e281b3..af1b2e5526 100644
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/ComponentName.c
@@ -17,12 +17,12 @@
//
STATIC
-EFI_UNICODE_STRING_TABLE mDriverNameTable[] = {
+EFI_UNICODE_STRING_TABLE mDriverNameTable[] = {
{ "eng;en", L"PCI I/O protocol emulation driver for non-discoverable devices" },
- { NULL, NULL }
+ { NULL, NULL }
};
-EFI_COMPONENT_NAME_PROTOCOL gComponentName;
+EFI_COMPONENT_NAME_PROTOCOL gComponentName;
/**
Retrieves a Unicode string that is the user readable name of the UEFI Driver.
@@ -49,9 +49,9 @@ STATIC
EFI_STATUS
EFIAPI
NonDiscoverablePciGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -93,24 +93,24 @@ STATIC
EFI_STATUS
EFIAPI
NonDiscoverablePciGetDeviceName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE DeviceHandle,
- IN EFI_HANDLE ChildHandle,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE DeviceHandle,
+ IN EFI_HANDLE ChildHandle,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
}
-EFI_COMPONENT_NAME_PROTOCOL gComponentName = {
+EFI_COMPONENT_NAME_PROTOCOL gComponentName = {
&NonDiscoverablePciGetDriverName,
&NonDiscoverablePciGetDeviceName,
"eng" // SupportedLanguages, ISO 639-2 language codes
};
-EFI_COMPONENT_NAME2_PROTOCOL gComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) &NonDiscoverablePciGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) &NonDiscoverablePciGetDeviceName,
+EFI_COMPONENT_NAME2_PROTOCOL gComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)&NonDiscoverablePciGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)&NonDiscoverablePciGetDeviceName,
"en" // SupportedLanguages, RFC 4646 language codes
};
diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.c
index 5c93e2a766..96fc03979c 100644
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.c
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.c
@@ -10,16 +10,16 @@
#include <Protocol/DriverBinding.h>
-#define MAX_NON_DISCOVERABLE_PCI_DEVICE_ID (32 * 256)
+#define MAX_NON_DISCOVERABLE_PCI_DEVICE_ID (32 * 256)
-STATIC UINTN mUniqueIdCounter = 0;
-EFI_CPU_ARCH_PROTOCOL *mCpu;
+STATIC UINTN mUniqueIdCounter = 0;
+EFI_CPU_ARCH_PROTOCOL *mCpu;
//
// We only support the following device types
//
STATIC
-CONST EFI_GUID * CONST
+CONST EFI_GUID *CONST
SupportedNonDiscoverableDevices[] = {
&gEdkiiNonDiscoverableAhciDeviceGuid,
&gEdkiiNonDiscoverableEhciDeviceGuid,
@@ -63,27 +63,31 @@ STATIC
EFI_STATUS
EFIAPI
NonDiscoverablePciDeviceSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE DeviceHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE DeviceHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- NON_DISCOVERABLE_DEVICE *Device;
- EFI_STATUS Status;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- INTN Idx;
-
- Status = gBS->OpenProtocol (DeviceHandle,
- &gEdkiiNonDiscoverableDeviceProtocolGuid, (VOID **)&Device,
- This->DriverBindingHandle, DeviceHandle,
- EFI_OPEN_PROTOCOL_BY_DRIVER);
+ NON_DISCOVERABLE_DEVICE *Device;
+ EFI_STATUS Status;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ INTN Idx;
+
+ Status = gBS->OpenProtocol (
+ DeviceHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ (VOID **)&Device,
+ This->DriverBindingHandle,
+ DeviceHandle,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (EFI_ERROR (Status)) {
return Status;
}
Status = EFI_UNSUPPORTED;
for (Idx = 0; Idx < ARRAY_SIZE (SupportedNonDiscoverableDevices); Idx++) {
- if (CompareGuid (Device->Type, SupportedNonDiscoverableDevices [Idx])) {
+ if (CompareGuid (Device->Type, SupportedNonDiscoverableDevices[Idx])) {
Status = EFI_SUCCESS;
break;
}
@@ -98,17 +102,23 @@ NonDiscoverablePciDeviceSupported (
// that they only describe things that we can handle
//
for (Desc = Device->Resources; Desc->Desc != ACPI_END_TAG_DESCRIPTOR;
- Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3)) {
- if (Desc->Desc != ACPI_ADDRESS_SPACE_DESCRIPTOR ||
- Desc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM) {
+ Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3))
+ {
+ if ((Desc->Desc != ACPI_ADDRESS_SPACE_DESCRIPTOR) ||
+ (Desc->ResType != ACPI_ADDRESS_SPACE_TYPE_MEM))
+ {
Status = EFI_UNSUPPORTED;
break;
}
}
CloseProtocol:
- gBS->CloseProtocol (DeviceHandle, &gEdkiiNonDiscoverableDeviceProtocolGuid,
- This->DriverBindingHandle, DeviceHandle);
+ gBS->CloseProtocol (
+ DeviceHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ This->DriverBindingHandle,
+ DeviceHandle
+ );
return Status;
}
@@ -130,13 +140,13 @@ STATIC
EFI_STATUS
EFIAPI
NonDiscoverablePciDeviceStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE DeviceHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE DeviceHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_STATUS Status;
ASSERT (mUniqueIdCounter < MAX_NON_DISCOVERABLE_PCI_DEVICE_ID);
if (mUniqueIdCounter >= MAX_NON_DISCOVERABLE_PCI_DEVICE_ID) {
@@ -148,10 +158,14 @@ NonDiscoverablePciDeviceStart (
return EFI_OUT_OF_RESOURCES;
}
- Status = gBS->OpenProtocol (DeviceHandle,
+ Status = gBS->OpenProtocol (
+ DeviceHandle,
&gEdkiiNonDiscoverableDeviceProtocolGuid,
- (VOID **)&Dev->Device, This->DriverBindingHandle,
- DeviceHandle, EFI_OPEN_PROTOCOL_BY_DRIVER);
+ (VOID **)&Dev->Device,
+ This->DriverBindingHandle,
+ DeviceHandle,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (EFI_ERROR (Status)) {
goto FreeDev;
}
@@ -163,8 +177,12 @@ NonDiscoverablePciDeviceStart (
// EFI_PCI_IO_PROTOCOL interface.
//
Dev->Signature = NON_DISCOVERABLE_PCI_DEVICE_SIG;
- Status = gBS->InstallProtocolInterface (&DeviceHandle, &gEfiPciIoProtocolGuid,
- EFI_NATIVE_INTERFACE, &Dev->PciIo);
+ Status = gBS->InstallProtocolInterface (
+ &DeviceHandle,
+ &gEfiPciIoProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &Dev->PciIo
+ );
if (EFI_ERROR (Status)) {
goto CloseProtocol;
}
@@ -174,8 +192,12 @@ NonDiscoverablePciDeviceStart (
return EFI_SUCCESS;
CloseProtocol:
- gBS->CloseProtocol (DeviceHandle, &gEdkiiNonDiscoverableDeviceProtocolGuid,
- This->DriverBindingHandle, DeviceHandle);
+ gBS->CloseProtocol (
+ DeviceHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ This->DriverBindingHandle,
+ DeviceHandle
+ );
FreeDev:
FreePool (Dev);
@@ -199,19 +221,24 @@ STATIC
EFI_STATUS
EFIAPI
NonDiscoverablePciDeviceStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE DeviceHandle,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE DeviceHandle,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
-
- Status = gBS->OpenProtocol (DeviceHandle, &gEfiPciIoProtocolGuid,
- (VOID **)&PciIo, This->DriverBindingHandle, DeviceHandle,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+
+ Status = gBS->OpenProtocol (
+ DeviceHandle,
+ &gEfiPciIoProtocolGuid,
+ (VOID **)&PciIo,
+ This->DriverBindingHandle,
+ DeviceHandle,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -221,27 +248,33 @@ NonDiscoverablePciDeviceStop (
//
// Handle Stop() requests for in-use driver instances gracefully.
//
- Status = gBS->UninstallProtocolInterface (DeviceHandle,
- &gEfiPciIoProtocolGuid, &Dev->PciIo);
+ Status = gBS->UninstallProtocolInterface (
+ DeviceHandle,
+ &gEfiPciIoProtocolGuid,
+ &Dev->PciIo
+ );
if (EFI_ERROR (Status)) {
return Status;
}
- gBS->CloseProtocol (DeviceHandle, &gEdkiiNonDiscoverableDeviceProtocolGuid,
- This->DriverBindingHandle, DeviceHandle);
+ gBS->CloseProtocol (
+ DeviceHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ This->DriverBindingHandle,
+ DeviceHandle
+ );
FreePool (Dev);
return EFI_SUCCESS;
}
-
//
// The static object that groups the Supported() (ie. probe), Start() and
// Stop() functions of the driver together. Refer to UEFI Spec 2.3.1 + Errata
// C, 10.1 EFI Driver Binding Protocol.
//
-STATIC EFI_DRIVER_BINDING_PROTOCOL gDriverBinding = {
+STATIC EFI_DRIVER_BINDING_PROTOCOL gDriverBinding = {
&NonDiscoverablePciDeviceSupported,
&NonDiscoverablePciDeviceStart,
&NonDiscoverablePciDeviceStop,
@@ -263,14 +296,14 @@ STATIC EFI_DRIVER_BINDING_PROTOCOL gDriverBinding = {
EFI_STATUS
EFIAPI
NonDiscoverablePciDeviceDxeEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
- ASSERT_EFI_ERROR(Status);
+ ASSERT_EFI_ERROR (Status);
return EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
index 363c4a765b..c1c5c6267c 100644
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
@@ -16,10 +16,10 @@
#include <Protocol/PciRootBridgeIo.h>
typedef struct {
- EFI_PHYSICAL_ADDRESS AllocAddress;
- VOID *HostAddress;
- EFI_PCI_IO_PROTOCOL_OPERATION Operation;
- UINTN NumberOfBytes;
+ EFI_PHYSICAL_ADDRESS AllocAddress;
+ VOID *HostAddress;
+ EFI_PCI_IO_PROTOCOL_OPERATION Operation;
+ UINTN NumberOfBytes;
} NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO;
/**
@@ -33,12 +33,12 @@ typedef struct {
STATIC
EFI_STATUS
GetBarResource (
- IN NON_DISCOVERABLE_PCI_DEVICE *Dev,
- IN UINT8 BarIndex,
- OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR **Descriptor
+ IN NON_DISCOVERABLE_PCI_DEVICE *Dev,
+ IN UINT8 BarIndex,
+ OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR **Descriptor
)
{
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
if (BarIndex < Dev->BarOffset) {
return EFI_NOT_FOUND;
@@ -52,8 +52,8 @@ GetBarResource (
for (Desc = Dev->Device->Resources;
Desc->Desc != ACPI_END_TAG_DESCRIPTOR;
- Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3)) {
-
+ Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3))
+ {
if (BarIndex == 0) {
*Descriptor = Desc;
return EFI_SUCCESS;
@@ -61,6 +61,7 @@ GetBarResource (
BarIndex -= 1;
}
+
return EFI_NOT_FOUND;
}
@@ -83,20 +84,20 @@ STATIC
EFI_STATUS
EFIAPI
PciIoPollMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINT64 Mask,
+ IN UINT64 Value,
+ IN UINT64 Delay,
+ OUT UINT64 *Result
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- UINTN Count;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ UINTN Count;
+ EFI_STATUS Status;
if ((UINT32)Width > EfiPciIoWidthUint64) {
return EFI_INVALID_PARAMETER;
@@ -106,7 +107,7 @@ PciIoPollMem (
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Count = 1;
Status = GetBarResource (Dev, BarIndex, &Desc);
@@ -141,20 +142,20 @@ STATIC
EFI_STATUS
EFIAPI
PciIoPollIo (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINT64 Mask,
- IN UINT64 Value,
- IN UINT64 Delay,
- OUT UINT64 *Result
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINT64 Mask,
+ IN UINT64 Value,
+ IN UINT64 Delay,
+ OUT UINT64 *Result
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- UINTN Count;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ UINTN Count;
+ EFI_STATUS Status;
if ((UINT32)Width > EfiPciIoWidthUint64) {
return EFI_INVALID_PARAMETER;
@@ -164,7 +165,7 @@ PciIoPollIo (
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Count = 1;
Status = GetBarResource (Dev, BarIndex, &Desc);
@@ -200,48 +201,51 @@ STATIC
EFI_STATUS
EFIAPI
PciIoMemRW (
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINTN Count,
- IN UINTN DstStride,
- IN VOID *Dst,
- IN UINTN SrcStride,
- OUT CONST VOID *Src
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN UINTN DstStride,
+ IN VOID *Dst,
+ IN UINTN SrcStride,
+ OUT CONST VOID *Src
)
{
- volatile UINT8 *Dst8;
- volatile UINT16 *Dst16;
- volatile UINT32 *Dst32;
- volatile CONST UINT8 *Src8;
- volatile CONST UINT16 *Src16;
- volatile CONST UINT32 *Src32;
+ volatile UINT8 *Dst8;
+ volatile UINT16 *Dst16;
+ volatile UINT32 *Dst32;
+ volatile CONST UINT8 *Src8;
+ volatile CONST UINT16 *Src16;
+ volatile CONST UINT32 *Src32;
//
// Loop for each iteration and move the data
//
switch (Width & 0x3) {
- case EfiPciWidthUint8:
- Dst8 = (UINT8 *)Dst;
- Src8 = (UINT8 *)Src;
- for (;Count > 0; Count--, Dst8 += DstStride, Src8 += SrcStride) {
- *Dst8 = *Src8;
- }
- break;
- case EfiPciWidthUint16:
- Dst16 = (UINT16 *)Dst;
- Src16 = (UINT16 *)Src;
- for (;Count > 0; Count--, Dst16 += DstStride, Src16 += SrcStride) {
- *Dst16 = *Src16;
- }
- break;
- case EfiPciWidthUint32:
- Dst32 = (UINT32 *)Dst;
- Src32 = (UINT32 *)Src;
- for (;Count > 0; Count--, Dst32 += DstStride, Src32 += SrcStride) {
- *Dst32 = *Src32;
- }
- break;
- default:
- return EFI_INVALID_PARAMETER;
+ case EfiPciWidthUint8:
+ Dst8 = (UINT8 *)Dst;
+ Src8 = (UINT8 *)Src;
+ for ( ; Count > 0; Count--, Dst8 += DstStride, Src8 += SrcStride) {
+ *Dst8 = *Src8;
+ }
+
+ break;
+ case EfiPciWidthUint16:
+ Dst16 = (UINT16 *)Dst;
+ Src16 = (UINT16 *)Src;
+ for ( ; Count > 0; Count--, Dst16 += DstStride, Src16 += SrcStride) {
+ *Dst16 = *Src16;
+ }
+
+ break;
+ case EfiPciWidthUint32:
+ Dst32 = (UINT32 *)Dst;
+ Src32 = (UINT32 *)Src;
+ for ( ; Count > 0; Count--, Dst32 += DstStride, Src32 += SrcStride) {
+ *Dst32 = *Src32;
+ }
+
+ break;
+ default:
+ return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
@@ -271,25 +275,25 @@ STATIC
EFI_STATUS
EFIAPI
PciIoMemRead (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- UINTN AlignMask;
- VOID *Address;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ UINTN AlignMask;
+ VOID *Address;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_STATUS Status;
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
//
// Only allow accesses to the BARs we emulate
@@ -303,34 +307,35 @@ PciIoMemRead (
return EFI_UNSUPPORTED;
}
- Address = (VOID *)(UINTN)(Desc->AddrRangeMin + Offset);
+ Address = (VOID *)(UINTN)(Desc->AddrRangeMin + Offset);
AlignMask = (1 << (Width & 0x03)) - 1;
if ((UINTN)Address & AlignMask) {
return EFI_INVALID_PARAMETER;
}
switch (Width) {
- case EfiPciIoWidthUint8:
- case EfiPciIoWidthUint16:
- case EfiPciIoWidthUint32:
- case EfiPciIoWidthUint64:
- return PciIoMemRW (Width, Count, 1, Buffer, 1, Address);
-
- case EfiPciIoWidthFifoUint8:
- case EfiPciIoWidthFifoUint16:
- case EfiPciIoWidthFifoUint32:
- case EfiPciIoWidthFifoUint64:
- return PciIoMemRW (Width, Count, 1, Buffer, 0, Address);
-
- case EfiPciIoWidthFillUint8:
- case EfiPciIoWidthFillUint16:
- case EfiPciIoWidthFillUint32:
- case EfiPciIoWidthFillUint64:
- return PciIoMemRW (Width, Count, 0, Buffer, 1, Address);
-
- default:
- break;
+ case EfiPciIoWidthUint8:
+ case EfiPciIoWidthUint16:
+ case EfiPciIoWidthUint32:
+ case EfiPciIoWidthUint64:
+ return PciIoMemRW (Width, Count, 1, Buffer, 1, Address);
+
+ case EfiPciIoWidthFifoUint8:
+ case EfiPciIoWidthFifoUint16:
+ case EfiPciIoWidthFifoUint32:
+ case EfiPciIoWidthFifoUint64:
+ return PciIoMemRW (Width, Count, 1, Buffer, 0, Address);
+
+ case EfiPciIoWidthFillUint8:
+ case EfiPciIoWidthFillUint16:
+ case EfiPciIoWidthFillUint32:
+ case EfiPciIoWidthFillUint64:
+ return PciIoMemRW (Width, Count, 0, Buffer, 1, Address);
+
+ default:
+ break;
}
+
return EFI_INVALID_PARAMETER;
}
@@ -358,25 +363,25 @@ STATIC
EFI_STATUS
EFIAPI
PciIoMemWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- UINTN AlignMask;
- VOID *Address;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ UINTN AlignMask;
+ VOID *Address;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_STATUS Status;
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
//
// Only allow accesses to the BARs we emulate
@@ -390,34 +395,35 @@ PciIoMemWrite (
return EFI_UNSUPPORTED;
}
- Address = (VOID *)(UINTN)(Desc->AddrRangeMin + Offset);
+ Address = (VOID *)(UINTN)(Desc->AddrRangeMin + Offset);
AlignMask = (1 << (Width & 0x03)) - 1;
if ((UINTN)Address & AlignMask) {
return EFI_INVALID_PARAMETER;
}
switch (Width) {
- case EfiPciIoWidthUint8:
- case EfiPciIoWidthUint16:
- case EfiPciIoWidthUint32:
- case EfiPciIoWidthUint64:
- return PciIoMemRW (Width, Count, 1, Address, 1, Buffer);
-
- case EfiPciIoWidthFifoUint8:
- case EfiPciIoWidthFifoUint16:
- case EfiPciIoWidthFifoUint32:
- case EfiPciIoWidthFifoUint64:
- return PciIoMemRW (Width, Count, 0, Address, 1, Buffer);
-
- case EfiPciIoWidthFillUint8:
- case EfiPciIoWidthFillUint16:
- case EfiPciIoWidthFillUint32:
- case EfiPciIoWidthFillUint64:
- return PciIoMemRW (Width, Count, 1, Address, 0, Buffer);
-
- default:
- break;
+ case EfiPciIoWidthUint8:
+ case EfiPciIoWidthUint16:
+ case EfiPciIoWidthUint32:
+ case EfiPciIoWidthUint64:
+ return PciIoMemRW (Width, Count, 1, Address, 1, Buffer);
+
+ case EfiPciIoWidthFifoUint8:
+ case EfiPciIoWidthFifoUint16:
+ case EfiPciIoWidthFifoUint32:
+ case EfiPciIoWidthFifoUint64:
+ return PciIoMemRW (Width, Count, 0, Address, 1, Buffer);
+
+ case EfiPciIoWidthFillUint8:
+ case EfiPciIoWidthFillUint16:
+ case EfiPciIoWidthFillUint32:
+ case EfiPciIoWidthFillUint64:
+ return PciIoMemRW (Width, Count, 1, Address, 0, Buffer);
+
+ default:
+ break;
}
+
return EFI_INVALID_PARAMETER;
}
@@ -438,17 +444,17 @@ STATIC
EFI_STATUS
EFIAPI
PciIoIoRead (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_STATUS Status;
if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
@@ -458,7 +464,7 @@ PciIoIoRead (
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Status = GetBarResource (Dev, BarIndex, &Desc);
if (EFI_ERROR (Status)) {
@@ -490,17 +496,17 @@ STATIC
EFI_STATUS
EFIAPI
PciIoIoWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 BarIndex,
- IN UINT64 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_STATUS Status;
if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
@@ -510,7 +516,7 @@ PciIoIoWrite (
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Status = GetBarResource (Dev, BarIndex, &Desc);
if (EFI_ERROR (Status)) {
@@ -547,17 +553,17 @@ PciIoPciRead (
IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- VOID *Address;
- UINTN Length;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ VOID *Address;
+ UINTN Length;
- if (Width < 0 || Width >= EfiPciIoWidthMaximum || Buffer == NULL) {
+ if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Address = (UINT8 *)&Dev->ConfigSpace + Offset;
- Length = Count << ((UINTN)Width & 0x3);
+ Length = Count << ((UINTN)Width & 0x3);
if (Offset >= sizeof (Dev->ConfigSpace)) {
ZeroMem (Buffer, Length);
@@ -574,6 +580,7 @@ PciIoPciRead (
Count -= Length >> ((UINTN)Width & 0x3);
}
+
return PciIoMemRW (Width, Count, 1, Buffer, 1, Address);
}
@@ -597,21 +604,21 @@ STATIC
EFI_STATUS
EFIAPI
PciIoPciWrite (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT32 Offset,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT32 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- VOID *Address;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ VOID *Address;
- if (Width < 0 || Width >= EfiPciIoWidthMaximum || Buffer == NULL) {
+ if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Address = (UINT8 *)&Dev->ConfigSpace + Offset;
if (Offset + (Count << ((UINTN)Width & 0x3)) > sizeof (Dev->ConfigSpace)) {
@@ -643,25 +650,25 @@ STATIC
EFI_STATUS
EFIAPI
PciIoCopyMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 DestBarIndex,
- IN UINT64 DestOffset,
- IN UINT8 SrcBarIndex,
- IN UINT64 SrcOffset,
- IN UINTN Count
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 DestBarIndex,
+ IN UINT64 DestOffset,
+ IN UINT8 SrcBarIndex,
+ IN UINT64 SrcOffset,
+ IN UINTN Count
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *DestDesc;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *SrcDesc;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *DestDesc;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *SrcDesc;
+ EFI_STATUS Status;
if ((UINT32)Width > EfiPciIoWidthUint64) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Status = GetBarResource (Dev, DestBarIndex, &DestDesc);
if (EFI_ERROR (Status)) {
@@ -720,16 +727,18 @@ CoherentPciIoMap (
EFI_STATUS Status;
NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO *MapInfo;
- if (Operation != EfiPciIoOperationBusMasterRead &&
- Operation != EfiPciIoOperationBusMasterWrite &&
- Operation != EfiPciIoOperationBusMasterCommonBuffer) {
+ if ((Operation != EfiPciIoOperationBusMasterRead) &&
+ (Operation != EfiPciIoOperationBusMasterWrite) &&
+ (Operation != EfiPciIoOperationBusMasterCommonBuffer))
+ {
return EFI_INVALID_PARAMETER;
}
- if (HostAddress == NULL ||
- NumberOfBytes == NULL ||
- DeviceAddress == NULL ||
- Mapping == NULL) {
+ if ((HostAddress == NULL) ||
+ (NumberOfBytes == NULL) ||
+ (DeviceAddress == NULL) ||
+ (Mapping == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -737,10 +746,10 @@ CoherentPciIoMap (
// If HostAddress exceeds 4 GB, and this device does not support 64-bit DMA
// addressing, we need to allocate a bounce buffer and copy over the data.
//
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
- if ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0 &&
- (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress + *NumberOfBytes > SIZE_4GB) {
-
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
+ if (((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0) &&
+ ((EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress + *NumberOfBytes > SIZE_4GB))
+ {
//
// Bounce buffering is not possible for consistent mappings
//
@@ -753,14 +762,17 @@ CoherentPciIoMap (
return EFI_OUT_OF_RESOURCES;
}
- MapInfo->AllocAddress = MAX_UINT32;
- MapInfo->HostAddress = HostAddress;
- MapInfo->Operation = Operation;
+ MapInfo->AllocAddress = MAX_UINT32;
+ MapInfo->HostAddress = HostAddress;
+ MapInfo->Operation = Operation;
MapInfo->NumberOfBytes = *NumberOfBytes;
- Status = gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData,
+ Status = gBS->AllocatePages (
+ AllocateMaxAddress,
+ EfiBootServicesData,
EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes),
- &MapInfo->AllocAddress);
+ &MapInfo->AllocAddress
+ );
if (EFI_ERROR (Status)) {
//
// If we fail here, it is likely because the system has no memory below
@@ -770,16 +782,22 @@ CoherentPciIoMap (
FreePool (MapInfo);
return EFI_DEVICE_ERROR;
}
+
if (Operation == EfiPciIoOperationBusMasterRead) {
- gBS->CopyMem ((VOID *)(UINTN)MapInfo->AllocAddress, HostAddress,
- *NumberOfBytes);
+ gBS->CopyMem (
+ (VOID *)(UINTN)MapInfo->AllocAddress,
+ HostAddress,
+ *NumberOfBytes
+ );
}
+
*DeviceAddress = MapInfo->AllocAddress;
- *Mapping = MapInfo;
+ *Mapping = MapInfo;
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return EFI_SUCCESS;
}
@@ -796,8 +814,8 @@ STATIC
EFI_STATUS
EFIAPI
CoherentPciIoUnmap (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN VOID *Mapping
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN VOID *Mapping
)
{
NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO *MapInfo;
@@ -805,13 +823,20 @@ CoherentPciIoUnmap (
MapInfo = Mapping;
if (MapInfo != NULL) {
if (MapInfo->Operation == EfiPciIoOperationBusMasterWrite) {
- gBS->CopyMem (MapInfo->HostAddress, (VOID *)(UINTN)MapInfo->AllocAddress,
- MapInfo->NumberOfBytes);
+ gBS->CopyMem (
+ MapInfo->HostAddress,
+ (VOID *)(UINTN)MapInfo->AllocAddress,
+ MapInfo->NumberOfBytes
+ );
}
- gBS->FreePages (MapInfo->AllocAddress,
- EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes));
+
+ gBS->FreePages (
+ MapInfo->AllocAddress,
+ EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes)
+ );
FreePool (MapInfo);
}
+
return EFI_SUCCESS;
}
@@ -838,21 +863,22 @@ STATIC
EFI_STATUS
EFIAPI
CoherentPciIoAllocateBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_PHYSICAL_ADDRESS AllocAddress;
- EFI_ALLOCATE_TYPE AllocType;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_PHYSICAL_ADDRESS AllocAddress;
+ EFI_ALLOCATE_TYPE AllocType;
+ EFI_STATUS Status;
if ((Attributes & ~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE |
- EFI_PCI_ATTRIBUTE_MEMORY_CACHED)) != 0) {
+ EFI_PCI_ATTRIBUTE_MEMORY_CACHED)) != 0)
+ {
return EFI_UNSUPPORTED;
}
@@ -861,7 +887,8 @@ CoherentPciIoAllocateBuffer (
}
if ((MemoryType != EfiBootServicesData) &&
- (MemoryType != EfiRuntimeServicesData)) {
+ (MemoryType != EfiRuntimeServicesData))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -870,10 +897,10 @@ CoherentPciIoAllocateBuffer (
// been set. If the system has no memory available below 4 GB, there
// is little we can do except propagate the error.
//
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
if ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0) {
AllocAddress = MAX_UINT32;
- AllocType = AllocateMaxAddress;
+ AllocType = AllocateMaxAddress;
} else {
AllocType = AllocateAnyPages;
}
@@ -882,6 +909,7 @@ CoherentPciIoAllocateBuffer (
if (!EFI_ERROR (Status)) {
*HostAddress = (VOID *)(UINTN)AllocAddress;
}
+
return Status;
}
@@ -899,9 +927,9 @@ STATIC
EFI_STATUS
EFIAPI
CoherentPciIoFreeBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
)
{
FreePages (HostAddress, Pages);
@@ -923,18 +951,18 @@ STATIC
EFI_STATUS
EFIAPI
NonCoherentPciIoFreeBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- LIST_ENTRY *Entry;
- EFI_STATUS Status;
- NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc;
- BOOLEAN Found;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ LIST_ENTRY *Entry;
+ EFI_STATUS Status;
+ NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc;
+ BOOLEAN Found;
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Found = FALSE;
Alloc = NULL;
@@ -945,10 +973,10 @@ NonCoherentPciIoFreeBuffer (
//
for (Entry = Dev->UncachedAllocationList.ForwardLink;
Entry != &Dev->UncachedAllocationList;
- Entry = Entry->ForwardLink) {
-
+ Entry = Entry->ForwardLink)
+ {
Alloc = BASE_CR (Entry, NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION, List);
- if (Alloc->HostAddress == HostAddress && Alloc->NumPages == Pages) {
+ if ((Alloc->HostAddress == HostAddress) && (Alloc->NumPages == Pages)) {
//
// We are freeing the exact allocation we were given
// before by AllocateBuffer()
@@ -968,7 +996,8 @@ NonCoherentPciIoFreeBuffer (
Status = gDS->SetMemorySpaceAttributes (
(EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,
EFI_PAGES_TO_SIZE (Pages),
- Alloc->Attributes);
+ Alloc->Attributes
+ );
if (EFI_ERROR (Status)) {
goto FreeAlloc;
}
@@ -1007,36 +1036,43 @@ STATIC
EFI_STATUS
EFIAPI
NonCoherentPciIoAllocateBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
- EFI_STATUS Status;
- UINT64 MemType;
- NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc;
- VOID *AllocAddress;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
+ EFI_STATUS Status;
+ UINT64 MemType;
+ NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc;
+ VOID *AllocAddress;
if (HostAddress == NULL) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
- Status = CoherentPciIoAllocateBuffer (This, Type, MemoryType, Pages,
- &AllocAddress, Attributes);
+ Status = CoherentPciIoAllocateBuffer (
+ This,
+ Type,
+ MemoryType,
+ Pages,
+ &AllocAddress,
+ Attributes
+ );
if (EFI_ERROR (Status)) {
return Status;
}
Status = gDS->GetMemorySpaceDescriptor (
(EFI_PHYSICAL_ADDRESS)(UINTN)AllocAddress,
- &GcdDescriptor);
+ &GcdDescriptor
+ );
if (EFI_ERROR (Status)) {
goto FreeBuffer;
}
@@ -1049,8 +1085,9 @@ NonCoherentPciIoAllocateBuffer (
//
// Set the preferred memory attributes
//
- if ((Attributes & EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE) != 0 ||
- (GcdDescriptor.Capabilities & EFI_MEMORY_UC) == 0) {
+ if (((Attributes & EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE) != 0) ||
+ ((GcdDescriptor.Capabilities & EFI_MEMORY_UC) == 0))
+ {
//
// Use write combining if it was requested, or if it is the only
// type supported by the region.
@@ -1066,8 +1103,8 @@ NonCoherentPciIoAllocateBuffer (
}
Alloc->HostAddress = AllocAddress;
- Alloc->NumPages = Pages;
- Alloc->Attributes = GcdDescriptor.Attributes;
+ Alloc->NumPages = Pages;
+ Alloc->Attributes = GcdDescriptor.Attributes;
//
// Record this allocation in the linked list, so we
@@ -1078,7 +1115,8 @@ NonCoherentPciIoAllocateBuffer (
Status = gDS->SetMemorySpaceAttributes (
(EFI_PHYSICAL_ADDRESS)(UINTN)AllocAddress,
EFI_PAGES_TO_SIZE (Pages),
- MemType);
+ MemType
+ );
if (EFI_ERROR (Status)) {
goto RemoveList;
}
@@ -1087,7 +1125,8 @@ NonCoherentPciIoAllocateBuffer (
mCpu,
(EFI_PHYSICAL_ADDRESS)(UINTN)AllocAddress,
EFI_PAGES_TO_SIZE (Pages),
- EfiCpuFlushTypeInvalidate);
+ EfiCpuFlushTypeInvalidate
+ );
if (EFI_ERROR (Status)) {
goto RemoveList;
}
@@ -1144,16 +1183,18 @@ NonCoherentPciIoMap (
EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
BOOLEAN Bounce;
- if (HostAddress == NULL ||
- NumberOfBytes == NULL ||
- DeviceAddress == NULL ||
- Mapping == NULL) {
+ if ((HostAddress == NULL) ||
+ (NumberOfBytes == NULL) ||
+ (DeviceAddress == NULL) ||
+ (Mapping == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
- if (Operation != EfiPciIoOperationBusMasterRead &&
- Operation != EfiPciIoOperationBusMasterWrite &&
- Operation != EfiPciIoOperationBusMasterCommonBuffer) {
+ if ((Operation != EfiPciIoOperationBusMasterRead) &&
+ (Operation != EfiPciIoOperationBusMasterWrite) &&
+ (Operation != EfiPciIoOperationBusMasterCommonBuffer))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1162,11 +1203,11 @@ NonCoherentPciIoMap (
return EFI_OUT_OF_RESOURCES;
}
- MapInfo->HostAddress = HostAddress;
- MapInfo->Operation = Operation;
+ MapInfo->HostAddress = HostAddress;
+ MapInfo->Operation = Operation;
MapInfo->NumberOfBytes = *NumberOfBytes;
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
//
// If this device does not support 64-bit DMA addressing, we need to allocate
@@ -1177,33 +1218,37 @@ NonCoherentPciIoMap (
if (!Bounce) {
switch (Operation) {
- case EfiPciIoOperationBusMasterRead:
- case EfiPciIoOperationBusMasterWrite:
- //
- // For streaming DMA, it is sufficient if the buffer is aligned to
- // the CPUs DMA buffer alignment.
- //
- AlignMask = mCpu->DmaBufferAlignment - 1;
- if ((((UINTN) HostAddress | *NumberOfBytes) & AlignMask) == 0) {
- break;
- }
+ case EfiPciIoOperationBusMasterRead:
+ case EfiPciIoOperationBusMasterWrite:
+ //
+ // For streaming DMA, it is sufficient if the buffer is aligned to
+ // the CPUs DMA buffer alignment.
+ //
+ AlignMask = mCpu->DmaBufferAlignment - 1;
+ if ((((UINTN)HostAddress | *NumberOfBytes) & AlignMask) == 0) {
+ break;
+ }
+
// fall through
- case EfiPciIoOperationBusMasterCommonBuffer:
- //
- // Check whether the host address refers to an uncached mapping.
- //
- Status = gDS->GetMemorySpaceDescriptor (
- (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,
- &GcdDescriptor);
- if (EFI_ERROR (Status) ||
- (GcdDescriptor.Attributes & (EFI_MEMORY_WB|EFI_MEMORY_WT)) != 0) {
- Bounce = TRUE;
- }
- break;
+ case EfiPciIoOperationBusMasterCommonBuffer:
+ //
+ // Check whether the host address refers to an uncached mapping.
+ //
+ Status = gDS->GetMemorySpaceDescriptor (
+ (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,
+ &GcdDescriptor
+ );
+ if (EFI_ERROR (Status) ||
+ ((GcdDescriptor.Attributes & (EFI_MEMORY_WB|EFI_MEMORY_WT)) != 0))
+ {
+ Bounce = TRUE;
+ }
- default:
- ASSERT (FALSE);
+ break;
+
+ default:
+ ASSERT (FALSE);
}
}
@@ -1213,20 +1258,27 @@ NonCoherentPciIoMap (
goto FreeMapInfo;
}
- Status = NonCoherentPciIoAllocateBuffer (This, AllocateAnyPages,
- EfiBootServicesData, EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes),
- &AllocAddress, EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE);
+ Status = NonCoherentPciIoAllocateBuffer (
+ This,
+ AllocateAnyPages,
+ EfiBootServicesData,
+ EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes),
+ &AllocAddress,
+ EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
+ );
if (EFI_ERROR (Status)) {
goto FreeMapInfo;
}
+
MapInfo->AllocAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocAddress;
if (Operation == EfiPciIoOperationBusMasterRead) {
gBS->CopyMem (AllocAddress, HostAddress, *NumberOfBytes);
}
+
*DeviceAddress = MapInfo->AllocAddress;
} else {
MapInfo->AllocAddress = 0;
- *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
+ *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
//
// We are not using a bounce buffer: the mapping is sufficiently
@@ -1238,8 +1290,12 @@ NonCoherentPciIoMap (
// may be written back unexpectedly, and clobber the data written to
// main memory by the device.
//
- mCpu->FlushDataCache (mCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,
- *NumberOfBytes, EfiCpuFlushTypeWriteBack);
+ mCpu->FlushDataCache (
+ mCpu,
+ (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,
+ *NumberOfBytes,
+ EfiCpuFlushTypeWriteBack
+ );
}
*Mapping = MapInfo;
@@ -1264,8 +1320,8 @@ STATIC
EFI_STATUS
EFIAPI
NonCoherentPciIoUnmap (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN VOID *Mapping
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN VOID *Mapping
)
{
NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO *MapInfo;
@@ -1281,12 +1337,18 @@ NonCoherentPciIoUnmap (
// and free the buffer.
//
if (MapInfo->Operation == EfiPciIoOperationBusMasterWrite) {
- gBS->CopyMem (MapInfo->HostAddress, (VOID *)(UINTN)MapInfo->AllocAddress,
- MapInfo->NumberOfBytes);
+ gBS->CopyMem (
+ MapInfo->HostAddress,
+ (VOID *)(UINTN)MapInfo->AllocAddress,
+ MapInfo->NumberOfBytes
+ );
}
- NonCoherentPciIoFreeBuffer (This,
+
+ NonCoherentPciIoFreeBuffer (
+ This,
EFI_SIZE_TO_PAGES (MapInfo->NumberOfBytes),
- (VOID *)(UINTN)MapInfo->AllocAddress);
+ (VOID *)(UINTN)MapInfo->AllocAddress
+ );
} else {
//
// We are *not* using a bounce buffer: if this is a bus master write,
@@ -1294,11 +1356,15 @@ NonCoherentPciIoUnmap (
// data written by the device.
//
if (MapInfo->Operation == EfiPciIoOperationBusMasterWrite) {
- mCpu->FlushDataCache (mCpu,
+ mCpu->FlushDataCache (
+ mCpu,
(EFI_PHYSICAL_ADDRESS)(UINTN)MapInfo->HostAddress,
- MapInfo->NumberOfBytes, EfiCpuFlushTypeInvalidate);
+ MapInfo->NumberOfBytes,
+ EfiCpuFlushTypeInvalidate
+ );
}
}
+
FreePool (MapInfo);
return EFI_SUCCESS;
}
@@ -1313,7 +1379,7 @@ STATIC
EFI_STATUS
EFIAPI
PciIoFlush (
- IN EFI_PCI_IO_PROTOCOL *This
+ IN EFI_PCI_IO_PROTOCOL *This
)
{
return EFI_SUCCESS;
@@ -1343,16 +1409,17 @@ PciIoGetLocation (
OUT UINTN *FunctionNumber
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
- if (SegmentNumber == NULL ||
- BusNumber == NULL ||
- DeviceNumber == NULL ||
- FunctionNumber == NULL) {
+ if ((SegmentNumber == NULL) ||
+ (BusNumber == NULL) ||
+ (DeviceNumber == NULL) ||
+ (FunctionNumber == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
*SegmentNumber = 0xff;
*BusNumber = Dev->UniqueId >> 5;
@@ -1391,10 +1458,10 @@ PciIoAttributes (
OUT UINT64 *Result OPTIONAL
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- BOOLEAN Enable;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ BOOLEAN Enable;
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
if ((Attributes & (~(DEV_SUPPORTED_ATTRIBUTES))) != 0) {
return EFI_UNSUPPORTED;
@@ -1402,43 +1469,46 @@ PciIoAttributes (
Enable = FALSE;
switch (Operation) {
- case EfiPciIoAttributeOperationGet:
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
- *Result = Dev->Attributes;
- break;
+ case EfiPciIoAttributeOperationGet:
+ if (Result == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
- case EfiPciIoAttributeOperationSupported:
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
- *Result = DEV_SUPPORTED_ATTRIBUTES;
- break;
+ *Result = Dev->Attributes;
+ break;
- case EfiPciIoAttributeOperationEnable:
- Attributes |= Dev->Attributes;
- case EfiPciIoAttributeOperationSet:
- Enable = ((~Dev->Attributes & Attributes) & EFI_PCI_DEVICE_ENABLE) != 0;
- Dev->Attributes = Attributes;
- break;
+ case EfiPciIoAttributeOperationSupported:
+ if (Result == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
- case EfiPciIoAttributeOperationDisable:
- Dev->Attributes &= ~Attributes;
- break;
+ *Result = DEV_SUPPORTED_ATTRIBUTES;
+ break;
- default:
- return EFI_INVALID_PARAMETER;
- };
+ case EfiPciIoAttributeOperationEnable:
+ Attributes |= Dev->Attributes;
+ case EfiPciIoAttributeOperationSet:
+ Enable = ((~Dev->Attributes & Attributes) & EFI_PCI_DEVICE_ENABLE) != 0;
+ Dev->Attributes = Attributes;
+ break;
+
+ case EfiPciIoAttributeOperationDisable:
+ Dev->Attributes &= ~Attributes;
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
//
// If we're setting any of the EFI_PCI_DEVICE_ENABLE bits, perform
// the device specific initialization now.
//
- if (Enable && !Dev->Enabled && Dev->Device->Initialize != NULL) {
+ if (Enable && !Dev->Enabled && (Dev->Device->Initialize != NULL)) {
Dev->Device->Initialize (Dev->Device);
Dev->Enabled = TRUE;
}
+
return EFI_SUCCESS;
}
@@ -1468,23 +1538,23 @@ STATIC
EFI_STATUS
EFIAPI
PciIoGetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT8 BarIndex,
- OUT UINT64 *Supports OPTIONAL,
- OUT VOID **Resources OPTIONAL
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT8 BarIndex,
+ OUT UINT64 *Supports OPTIONAL,
+ OUT VOID **Resources OPTIONAL
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ EFI_STATUS Status;
- if (Supports == NULL && Resources == NULL) {
+ if ((Supports == NULL) && (Resources == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Status = GetBarResource (Dev, BarIndex, &BarDesc);
if (EFI_ERROR (Status)) {
@@ -1499,20 +1569,23 @@ PciIoGetBarAttributes (
}
if (Resources != NULL) {
- Descriptor = AllocatePool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +
- sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
+ Descriptor = AllocatePool (
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +
+ sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)
+ );
if (Descriptor == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (Descriptor, BarDesc, sizeof *Descriptor);
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1);
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)(Descriptor + 1);
End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0;
*Resources = Descriptor;
}
+
return EFI_SUCCESS;
}
@@ -1533,32 +1606,32 @@ STATIC
EFI_STATUS
EFIAPI
PciIoSetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN UINT8 BarIndex,
- IN OUT UINT64 *Offset,
- IN OUT UINT64 *Length
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT64 Attributes,
+ IN UINT8 BarIndex,
+ IN OUT UINT64 *Offset,
+ IN OUT UINT64 *Length
)
{
- NON_DISCOVERABLE_PCI_DEVICE *Dev;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- EFI_PCI_IO_PROTOCOL_WIDTH Width;
- UINTN Count;
- EFI_STATUS Status;
+ NON_DISCOVERABLE_PCI_DEVICE *Dev;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ EFI_PCI_IO_PROTOCOL_WIDTH Width;
+ UINTN Count;
+ EFI_STATUS Status;
if ((Attributes & (~DEV_SUPPORTED_ATTRIBUTES)) != 0) {
return EFI_UNSUPPORTED;
}
- if (Offset == NULL || Length == NULL) {
+ if ((Offset == NULL) || (Length == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);
+ Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This);
Width = EfiPciIoWidthUint8;
- Count = (UINT32) *Length;
+ Count = (UINT32)*Length;
- Status = GetBarResource(Dev, BarIndex, &Desc);
+ Status = GetBarResource (Dev, BarIndex, &Desc);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1571,13 +1644,13 @@ PciIoSetBarAttributes (
return EFI_UNSUPPORTED;
}
-STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate =
+STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate =
{
PciIoPollMem,
PciIoPollIo,
- { PciIoMemRead, PciIoMemWrite },
- { PciIoIoRead, PciIoIoWrite },
- { PciIoPciRead, PciIoPciWrite },
+ { PciIoMemRead, PciIoMemWrite },
+ { PciIoIoRead, PciIoIoWrite },
+ { PciIoPciRead, PciIoPciWrite },
PciIoCopyMem,
CoherentPciIoMap,
CoherentPciIoUnmap,
@@ -1600,11 +1673,11 @@ STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate =
**/
VOID
InitializePciIoProtocol (
- NON_DISCOVERABLE_PCI_DEVICE *Dev
+ NON_DISCOVERABLE_PCI_DEVICE *Dev
)
{
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
- INTN Idx;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
+ INTN Idx;
InitializeListHead (&Dev->UncachedAllocationList);
@@ -1612,62 +1685,83 @@ InitializePciIoProtocol (
Dev->ConfigSpace.Hdr.DeviceId = PCI_ID_DEVICE_DONTCARE;
// Copy protocol structure
- CopyMem(&Dev->PciIo, &PciIoTemplate, sizeof PciIoTemplate);
+ CopyMem (&Dev->PciIo, &PciIoTemplate, sizeof PciIoTemplate);
if (Dev->Device->DmaType == NonDiscoverableDeviceDmaTypeNonCoherent) {
- Dev->PciIo.AllocateBuffer = NonCoherentPciIoAllocateBuffer;
- Dev->PciIo.FreeBuffer = NonCoherentPciIoFreeBuffer;
- Dev->PciIo.Map = NonCoherentPciIoMap;
- Dev->PciIo.Unmap = NonCoherentPciIoUnmap;
+ Dev->PciIo.AllocateBuffer = NonCoherentPciIoAllocateBuffer;
+ Dev->PciIo.FreeBuffer = NonCoherentPciIoFreeBuffer;
+ Dev->PciIo.Map = NonCoherentPciIoMap;
+ Dev->PciIo.Unmap = NonCoherentPciIoUnmap;
}
if (CompareGuid (Dev->Device->Type, &gEdkiiNonDiscoverableAhciDeviceGuid)) {
Dev->ConfigSpace.Hdr.ClassCode[0] = PCI_IF_MASS_STORAGE_AHCI;
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_MASS_STORAGE_SATADPA;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_MASS_STORAGE;
- Dev->BarOffset = 5;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableEhciDeviceGuid)) {
+ Dev->BarOffset = 5;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableEhciDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = PCI_IF_EHCI;
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_SERIAL_USB;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SERIAL;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableNvmeDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableNvmeDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = 0x2; // PCI_IF_NVMHCI
Dev->ConfigSpace.Hdr.ClassCode[1] = 0x8; // PCI_CLASS_MASS_STORAGE_NVM
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_MASS_STORAGE;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableOhciDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableOhciDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = PCI_IF_OHCI;
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_SERIAL_USB;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SERIAL;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableSdhciDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableSdhciDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = 0x0; // don't care
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_SUBCLASS_SD_HOST_CONTROLLER;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SYSTEM_PERIPHERAL;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableXhciDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableXhciDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = PCI_IF_XHCI;
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_SERIAL_USB;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SERIAL;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableUhciDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableUhciDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = PCI_IF_UHCI;
Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_SERIAL_USB;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SERIAL;
- Dev->BarOffset = 0;
- } else if (CompareGuid (Dev->Device->Type,
- &gEdkiiNonDiscoverableUfsDeviceGuid)) {
+ Dev->BarOffset = 0;
+ } else if (CompareGuid (
+ Dev->Device->Type,
+ &gEdkiiNonDiscoverableUfsDeviceGuid
+ ))
+ {
Dev->ConfigSpace.Hdr.ClassCode[0] = 0x0; // don't care
Dev->ConfigSpace.Hdr.ClassCode[1] = 0x9; // UFS controller subclass;
Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_MASS_STORAGE;
- Dev->BarOffset = 0;
+ Dev->BarOffset = 0;
} else {
ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
}
@@ -1678,16 +1772,19 @@ InitializePciIoProtocol (
Idx = Dev->BarOffset;
for (Desc = Dev->Device->Resources, Dev->BarCount = 0;
Desc->Desc != ACPI_END_TAG_DESCRIPTOR;
- Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3)) {
-
+ Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3))
+ {
ASSERT (Desc->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR);
ASSERT (Desc->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM);
- if (Idx >= PCI_MAX_BAR ||
- (Idx == PCI_MAX_BAR - 1 && Desc->AddrSpaceGranularity == 64)) {
- DEBUG ((DEBUG_ERROR,
+ if ((Idx >= PCI_MAX_BAR) ||
+ ((Idx == PCI_MAX_BAR - 1) && (Desc->AddrSpaceGranularity == 64)))
+ {
+ DEBUG ((
+ DEBUG_ERROR,
"%a: resource count exceeds number of emulated BARs\n",
- __FUNCTION__));
+ __FUNCTION__
+ ));
ASSERT (FALSE);
break;
}
@@ -1696,9 +1793,11 @@ InitializePciIoProtocol (
Dev->BarCount++;
if (Desc->AddrSpaceGranularity == 64) {
- Dev->ConfigSpace.Device.Bar[Idx] |= 0x4;
+ Dev->ConfigSpace.Device.Bar[Idx] |= 0x4;
Dev->ConfigSpace.Device.Bar[++Idx] = (UINT32)RShiftU64 (
- Desc->AddrRangeMin, 32);
+ Desc->AddrRangeMin,
+ 32
+ );
}
}
}
diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
index 3e6df3bebd..41e591e80c 100644
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
@@ -24,7 +24,7 @@
#include <Protocol/Cpu.h>
#include <Protocol/PciIo.h>
-#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')
+#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')
#define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \
CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \
@@ -33,74 +33,74 @@
#define DEV_SUPPORTED_ATTRIBUTES \
(EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
-#define PCI_ID_VENDOR_UNKNOWN 0xffff
-#define PCI_ID_DEVICE_DONTCARE 0x0000
+#define PCI_ID_VENDOR_UNKNOWN 0xffff
+#define PCI_ID_DEVICE_DONTCARE 0x0000
-extern EFI_CPU_ARCH_PROTOCOL *mCpu;
+extern EFI_CPU_ARCH_PROTOCOL *mCpu;
typedef struct {
//
// The linked-list next pointer
//
- LIST_ENTRY List;
+ LIST_ENTRY List;
//
// The address of the uncached allocation
//
- VOID *HostAddress;
+ VOID *HostAddress;
//
// The number of pages in the allocation
//
- UINTN NumPages;
+ UINTN NumPages;
//
// The attributes of the allocation
//
- UINT64 Attributes;
+ UINT64 Attributes;
} NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;
typedef struct {
- UINT32 Signature;
+ UINT32 Signature;
//
// The bound non-discoverable device protocol instance
//
- NON_DISCOVERABLE_DEVICE *Device;
+ NON_DISCOVERABLE_DEVICE *Device;
//
// The exposed PCI I/O protocol instance.
//
- EFI_PCI_IO_PROTOCOL PciIo;
+ EFI_PCI_IO_PROTOCOL PciIo;
//
// The emulated PCI config space of the device. Only the minimally required
// items are assigned.
//
- PCI_TYPE00 ConfigSpace;
+ PCI_TYPE00 ConfigSpace;
//
// The first virtual BAR to assign based on the resources described
// by the non-discoverable device.
//
- UINT32 BarOffset;
+ UINT32 BarOffset;
//
// The number of virtual BARs we expose based on the number of
// resources
//
- UINT32 BarCount;
+ UINT32 BarCount;
//
// The PCI I/O attributes for this device
//
- UINT64 Attributes;
+ UINT64 Attributes;
//
// Whether this device has been enabled
//
- BOOLEAN Enabled;
+ BOOLEAN Enabled;
//
// Linked list to keep track of uncached allocations performed
// on behalf of this device
//
- LIST_ENTRY UncachedAllocationList;
+ LIST_ENTRY UncachedAllocationList;
//
// Unique ID for this device instance: needed so that we can report unique
// segment/bus/device number for each device instance. Note that this number
// may change when disconnecting/reconnecting the driver.
//
- UINTN UniqueId;
+ UINTN UniqueId;
} NON_DISCOVERABLE_PCI_DEVICE;
/**
@@ -111,10 +111,10 @@ typedef struct {
**/
VOID
InitializePciIoProtocol (
- NON_DISCOVERABLE_PCI_DEVICE *Device
+ NON_DISCOVERABLE_PCI_DEVICE *Device
);
-extern EFI_COMPONENT_NAME_PROTOCOL gComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2;
+extern EFI_COMPONENT_NAME_PROTOCOL gComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2;
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/ComponentName.c
index 7ef345eec4..a58646b433 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/ComponentName.c
@@ -12,7 +12,7 @@
//
// EFI Component Name Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gNvmExpressComponentName = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gNvmExpressComponentName = {
NvmExpressComponentNameGetDriverName,
NvmExpressComponentNameGetControllerName,
"eng"
@@ -21,20 +21,20 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gNvmExpressComponentNa
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gNvmExpressComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) NvmExpressComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) NvmExpressComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gNvmExpressComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)NvmExpressComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)NvmExpressComponentNameGetControllerName,
"en"
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mNvmExpressDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mNvmExpressDriverNameTable[] = {
{ "eng;en", L"NVM Express Driver" },
- { NULL, NULL }
+ { NULL, NULL }
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mNvmExpressControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mNvmExpressControllerNameTable[] = {
{ "eng;en", L"NVM Express Controller" },
- { NULL, NULL }
+ { NULL, NULL }
};
/**
@@ -79,9 +79,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mNvmExpressControllerName
EFI_STATUS
EFIAPI
NvmExpressComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -164,17 +164,17 @@ NvmExpressComponentNameGetDriverName (
EFI_STATUS
EFIAPI
NvmExpressComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// Make sure this driver is currently managing ControllHandle
@@ -198,13 +198,14 @@ NvmExpressComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the child context
//
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
gNvmExpressDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -212,7 +213,8 @@ NvmExpressComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
- Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (BlockIo);
+
+ Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (BlockIo);
ControllerNameTable = Device->ControllerNameTable;
}
@@ -223,5 +225,4 @@ NvmExpressComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gNvmExpressComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
index f60c2fcd79..9d40f67e8e 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
@@ -12,7 +12,7 @@
//
// NVM Express Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gNvmExpressDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gNvmExpressDriverBinding = {
NvmExpressDriverBindingSupported,
NvmExpressDriverBindingStart,
NvmExpressDriverBindingStop,
@@ -24,7 +24,7 @@ EFI_DRIVER_BINDING_PROTOCOL gNvmExpressDriverBinding = {
//
// NVM Express EFI Driver Supported EFI Version Protocol Instance
//
-EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gNvmExpressDriverSupportedEfiVersion = {
+EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gNvmExpressDriverSupportedEfiVersion = {
sizeof (EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL), // Size of Protocol structure.
0 // Version number to be filled at start up.
};
@@ -32,7 +32,7 @@ EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gNvmExpressDriverSupportedEfiVersion =
//
// Template for NVM Express Pass Thru Mode data structure.
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_NVM_EXPRESS_PASS_THRU_MODE gEfiNvmExpressPassThruMode = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_NVM_EXPRESS_PASS_THRU_MODE gEfiNvmExpressPassThruMode = {
EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |
EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_NONBLOCKIO |
@@ -56,24 +56,24 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_NVM_EXPRESS_PASS_THRU_MODE gEfiNvmExpressPassT
**/
EFI_STATUS
EnumerateNvmeDevNamespace (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- UINT32 NamespaceId
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ UINT32 NamespaceId
)
{
- NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
- EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_HANDLE DeviceHandle;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- UINT32 Lbads;
- UINT32 Flbas;
- UINT32 LbaFmtIdx;
- UINT8 Sn[21];
- UINT8 Mn[41];
- VOID *DummyInterface;
+ NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_HANDLE DeviceHandle;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ UINT32 Lbads;
+ UINT32 Flbas;
+ UINT32 LbaFmtIdx;
+ UINT8 Sn[21];
+ UINT8 Mn[41];
+ VOID *DummyInterface;
NewDevicePathNode = NULL;
DevicePath = NULL;
@@ -82,8 +82,8 @@ EnumerateNvmeDevNamespace (
//
// Allocate a buffer for Identify Namespace data
//
- NamespaceData = AllocateZeroPool(sizeof (NVME_ADMIN_NAMESPACE_DATA));
- if(NamespaceData == NULL) {
+ NamespaceData = AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
+ if (NamespaceData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -96,9 +96,10 @@ EnumerateNvmeDevNamespace (
NamespaceId,
(VOID *)NamespaceData
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Exit;
}
+
//
// Validate Namespace
//
@@ -108,7 +109,7 @@ EnumerateNvmeDevNamespace (
//
// allocate device private data for each discovered namespace
//
- Device = AllocateZeroPool(sizeof(NVME_DEVICE_PRIVATE_DATA));
+ Device = AllocateZeroPool (sizeof (NVME_DEVICE_PRIVATE_DATA));
if (Device == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
@@ -117,9 +118,9 @@ EnumerateNvmeDevNamespace (
//
// Initialize SSD namespace instance data
//
- Device->Signature = NVME_DEVICE_PRIVATE_DATA_SIGNATURE;
- Device->NamespaceId = NamespaceId;
- Device->NamespaceUuid = NamespaceData->Eui64;
+ Device->Signature = NVME_DEVICE_PRIVATE_DATA_SIGNATURE;
+ Device->NamespaceId = NamespaceId;
+ Device->NamespaceUuid = NamespaceData->Eui64;
Device->ControllerHandle = Private->ControllerHandle;
Device->DriverBindingHandle = Private->DriverBindingHandle;
@@ -128,17 +129,17 @@ EnumerateNvmeDevNamespace (
//
// Build BlockIo media structure
//
- Device->Media.MediaId = 0;
- Device->Media.RemovableMedia = FALSE;
- Device->Media.MediaPresent = TRUE;
+ Device->Media.MediaId = 0;
+ Device->Media.RemovableMedia = FALSE;
+ Device->Media.MediaPresent = TRUE;
Device->Media.LogicalPartition = FALSE;
- Device->Media.ReadOnly = FALSE;
- Device->Media.WriteCaching = FALSE;
- Device->Media.IoAlign = Private->PassThruMode.IoAlign;
+ Device->Media.ReadOnly = FALSE;
+ Device->Media.WriteCaching = FALSE;
+ Device->Media.IoAlign = Private->PassThruMode.IoAlign;
- Flbas = NamespaceData->Flbas;
- LbaFmtIdx = Flbas & 0xF;
- Lbads = NamespaceData->LbaFormat[LbaFmtIdx].Lbads;
+ Flbas = NamespaceData->Flbas;
+ LbaFmtIdx = Flbas & 0xF;
+ Lbads = NamespaceData->LbaFormat[LbaFmtIdx].Lbads;
Device->Media.BlockSize = (UINT32)1 << Lbads;
Device->Media.LastBlock = NamespaceData->Nsze - 1;
@@ -148,21 +149,21 @@ EnumerateNvmeDevNamespace (
//
// Create BlockIo Protocol instance
//
- Device->BlockIo.Revision = EFI_BLOCK_IO_PROTOCOL_REVISION2;
- Device->BlockIo.Media = &Device->Media;
- Device->BlockIo.Reset = NvmeBlockIoReset;
- Device->BlockIo.ReadBlocks = NvmeBlockIoReadBlocks;
- Device->BlockIo.WriteBlocks = NvmeBlockIoWriteBlocks;
- Device->BlockIo.FlushBlocks = NvmeBlockIoFlushBlocks;
+ Device->BlockIo.Revision = EFI_BLOCK_IO_PROTOCOL_REVISION2;
+ Device->BlockIo.Media = &Device->Media;
+ Device->BlockIo.Reset = NvmeBlockIoReset;
+ Device->BlockIo.ReadBlocks = NvmeBlockIoReadBlocks;
+ Device->BlockIo.WriteBlocks = NvmeBlockIoWriteBlocks;
+ Device->BlockIo.FlushBlocks = NvmeBlockIoFlushBlocks;
//
// Create BlockIo2 Protocol instance
//
- Device->BlockIo2.Media = &Device->Media;
- Device->BlockIo2.Reset = NvmeBlockIoResetEx;
- Device->BlockIo2.ReadBlocksEx = NvmeBlockIoReadBlocksEx;
- Device->BlockIo2.WriteBlocksEx = NvmeBlockIoWriteBlocksEx;
- Device->BlockIo2.FlushBlocksEx = NvmeBlockIoFlushBlocksEx;
+ Device->BlockIo2.Media = &Device->Media;
+ Device->BlockIo2.Reset = NvmeBlockIoResetEx;
+ Device->BlockIo2.ReadBlocksEx = NvmeBlockIoReadBlocksEx;
+ Device->BlockIo2.WriteBlocksEx = NvmeBlockIoWriteBlocksEx;
+ Device->BlockIo2.FlushBlocksEx = NvmeBlockIoFlushBlocksEx;
InitializeListHead (&Device->AsyncQueue);
//
@@ -186,7 +187,7 @@ EnumerateNvmeDevNamespace (
&NewDevicePathNode
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -199,10 +200,10 @@ EnumerateNvmeDevNamespace (
goto Exit;
}
- DeviceHandle = NULL;
+ DeviceHandle = NULL;
RemainingDevicePath = DevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
- if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd(RemainingDevicePath)) {
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
+ if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd (RemainingDevicePath)) {
Status = EFI_ALREADY_STARTED;
FreePool (DevicePath);
goto Exit;
@@ -228,7 +229,7 @@ EnumerateNvmeDevNamespace (
NULL
);
- if(EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -242,7 +243,7 @@ EnumerateNvmeDevNamespace (
EFI_NATIVE_INTERFACE,
&Device->StorageSecurity
);
- if(EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
Device->DeviceHandle,
&gEfiDevicePathProtocolGuid,
@@ -262,7 +263,7 @@ EnumerateNvmeDevNamespace (
gBS->OpenProtocol (
Private->ControllerHandle,
&gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &DummyInterface,
+ (VOID **)&DummyInterface,
Private->DriverBindingHandle,
Device->DeviceHandle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -304,7 +305,7 @@ EnumerateNvmeDevNamespace (
}
Exit:
- if(NamespaceData != NULL) {
+ if (NamespaceData != NULL) {
FreePool (NamespaceData);
}
@@ -312,12 +313,14 @@ Exit:
FreePool (NewDevicePathNode);
}
- if(EFI_ERROR(Status) && (Device != NULL) && (Device->DevicePath != NULL)) {
+ if (EFI_ERROR (Status) && (Device != NULL) && (Device->DevicePath != NULL)) {
FreePool (Device->DevicePath);
}
- if(EFI_ERROR(Status) && (Device != NULL)) {
+
+ if (EFI_ERROR (Status) && (Device != NULL)) {
FreePool (Device);
}
+
return Status;
}
@@ -333,15 +336,15 @@ Exit:
**/
EFI_STATUS
DiscoverAllNamespaces (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINT32 NamespaceId;
- EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *Passthru;
+ EFI_STATUS Status;
+ UINT32 NamespaceId;
+ EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *Passthru;
- NamespaceId = 0xFFFFFFFF;
- Passthru = &Private->Passthru;
+ NamespaceId = 0xFFFFFFFF;
+ Passthru = &Private->Passthru;
while (TRUE) {
Status = Passthru->GetNextNamespace (
@@ -358,7 +361,7 @@ DiscoverAllNamespaces (
NamespaceId
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
continue;
}
}
@@ -382,25 +385,25 @@ DiscoverAllNamespaces (
**/
EFI_STATUS
UnregisterNvmeNamespace (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *StorageSecurity;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
- VOID *DummyInterface;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *StorageSecurity;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
+ VOID *DummyInterface;
BlockIo = NULL;
Status = gBS->OpenProtocol (
Handle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -409,7 +412,7 @@ UnregisterNvmeNamespace (
return Status;
}
- Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (BlockIo);
+ Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (BlockIo);
//
// Wait for the device's asynchronous I/O queue to become empty.
@@ -457,7 +460,7 @@ UnregisterNvmeNamespace (
gBS->OpenProtocol (
Controller,
&gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &DummyInterface,
+ (VOID **)&DummyInterface,
This->DriverBindingHandle,
Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -471,7 +474,7 @@ UnregisterNvmeNamespace (
Status = gBS->OpenProtocol (
Handle,
&gEfiStorageSecurityCommandProtocolGuid,
- (VOID **) &StorageSecurity,
+ (VOID **)&StorageSecurity,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -485,18 +488,18 @@ UnregisterNvmeNamespace (
);
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
- Controller,
- &gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &DummyInterface,
- This->DriverBindingHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiNvmExpressPassThruProtocolGuid,
+ (VOID **)&DummyInterface,
+ This->DriverBindingHandle,
+ Handle,
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
return Status;
}
}
- if(Device->DevicePath != NULL) {
+ if (Device->DevicePath != NULL) {
FreePool (Device->DevicePath);
}
@@ -520,25 +523,25 @@ UnregisterNvmeNamespace (
VOID
EFIAPI
ProcessAsyncTaskList (
- IN EFI_EVENT Event,
- IN VOID* Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- NVME_CQ *Cq;
- UINT16 QueueId;
- UINT32 Data;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- NVME_PASS_THRU_ASYNC_REQ *AsyncRequest;
- NVME_BLKIO2_SUBTASK *Subtask;
- NVME_BLKIO2_REQUEST *BlkIo2Request;
- EFI_BLOCK_IO2_TOKEN *Token;
- BOOLEAN HasNewItem;
- EFI_STATUS Status;
-
- Private = (NVME_CONTROLLER_PRIVATE_DATA*)Context;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ NVME_CQ *Cq;
+ UINT16 QueueId;
+ UINT32 Data;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ NVME_PASS_THRU_ASYNC_REQ *AsyncRequest;
+ NVME_BLKIO2_SUBTASK *Subtask;
+ NVME_BLKIO2_REQUEST *BlkIo2Request;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ BOOLEAN HasNewItem;
+ EFI_STATUS Status;
+
+ Private = (NVME_CONTROLLER_PRIVATE_DATA *)Context;
QueueId = 2;
Cq = Private->CqBuffer[QueueId] + Private->CqHdbl[QueueId].Cqh;
HasNewItem = FALSE;
@@ -549,7 +552,8 @@ ProcessAsyncTaskList (
//
for (Link = GetFirstNode (&Private->UnsubmittedSubtasks);
!IsNull (&Private->UnsubmittedSubtasks, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Private->UnsubmittedSubtasks, Link);
Subtask = NVME_BLKIO2_SUBTASK_FROM_LINK (Link);
BlkIo2Request = Subtask->BlockIo2Request;
@@ -563,7 +567,8 @@ ProcessAsyncTaskList (
if (Token->TransactionStatus != EFI_SUCCESS) {
if (IsListEmpty (&BlkIo2Request->SubtasksQueue) &&
BlkIo2Request->LastSubtaskSubmitted &&
- (BlkIo2Request->UnsubmittedSubtaskNum == 0)) {
+ (BlkIo2Request->UnsubmittedSubtaskNum == 0))
+ {
//
// Remove the BlockIo2 request from the device asynchronous queue.
//
@@ -594,7 +599,8 @@ ProcessAsyncTaskList (
Token->TransactionStatus = EFI_DEVICE_ERROR;
if (IsListEmpty (&BlkIo2Request->SubtasksQueue) &&
- Subtask->IsLast) {
+ Subtask->IsLast)
+ {
//
// Remove the BlockIo2 request from the device asynchronous queue.
//
@@ -625,8 +631,9 @@ ProcessAsyncTaskList (
//
for (Link = GetFirstNode (&Private->AsyncPassThruQueue);
!IsNull (&Private->AsyncPassThruQueue, Link);
- Link = NextLink) {
- NextLink = GetNextNode (&Private->AsyncPassThruQueue, Link);
+ Link = NextLink)
+ {
+ NextLink = GetNextNode (&Private->AsyncPassThruQueue, Link);
AsyncRequest = NVME_PASS_THRU_ASYNC_REQ_FROM_THIS (Link);
if (AsyncRequest->CommandId == Cq->Cid) {
//
@@ -636,7 +643,7 @@ ProcessAsyncTaskList (
CopyMem (
AsyncRequest->Packet->NvmeCompletion,
Cq,
- sizeof(EFI_NVM_EXPRESS_COMPLETION)
+ sizeof (EFI_NVM_EXPRESS_COMPLETION)
);
//
@@ -645,12 +652,15 @@ ProcessAsyncTaskList (
if (AsyncRequest->MapData != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapData);
}
+
if (AsyncRequest->MapMeta != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapMeta);
}
+
if (AsyncRequest->MapPrpList != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapPrpList);
}
+
if (AsyncRequest->PrpListHost != NULL) {
PciIo->FreeBuffer (
PciIo,
@@ -674,19 +684,19 @@ ProcessAsyncTaskList (
Private->CqHdbl[QueueId].Cqh++;
if (Private->CqHdbl[QueueId].Cqh > MIN (NVME_ASYNC_CCQ_SIZE, Private->Cap.Mqes)) {
Private->CqHdbl[QueueId].Cqh = 0;
- Private->Pt[QueueId] ^= 1;
+ Private->Pt[QueueId] ^= 1;
}
Cq = Private->CqBuffer[QueueId] + Private->CqHdbl[QueueId].Cqh;
}
if (HasNewItem) {
- Data = ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueId]);
+ Data = ReadUnaligned32 ((UINT32 *)&Private->CqHdbl[QueueId]);
PciIo->Mem.Write (
PciIo,
EfiPciIoWidthUint32,
NVME_BAR,
- NVME_CQHDBL_OFFSET(QueueId, Private->Cap.Dstrd),
+ NVME_CQHDBL_OFFSET (QueueId, Private->Cap.Dstrd),
1,
&Data
);
@@ -766,8 +776,9 @@ NvmExpressDriverBindingSupported (
if ((DevicePathNode.DevPath->Type != MESSAGING_DEVICE_PATH) ||
(DevicePathNode.DevPath->SubType != MSG_NVME_NAMESPACE_DP) ||
- (DevicePathNodeLength(DevicePathNode.DevPath) != sizeof(NVME_NAMESPACE_DEVICE_PATH))) {
- return EFI_UNSUPPORTED;
+ (DevicePathNodeLength (DevicePathNode.DevPath) != sizeof (NVME_NAMESPACE_DEVICE_PATH)))
+ {
+ return EFI_UNSUPPORTED;
}
}
}
@@ -778,7 +789,7 @@ NvmExpressDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -807,7 +818,7 @@ NvmExpressDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -853,7 +864,6 @@ Done:
return Status;
}
-
/**
Starts a device controller or a bus controller.
@@ -915,7 +925,7 @@ NvmExpressDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -927,7 +937,7 @@ NvmExpressDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -965,14 +975,14 @@ NvmExpressDriverBindingStart (
AllocateAnyPages,
EfiBootServicesData,
6,
- (VOID**)&Private->Buffer,
+ (VOID **)&Private->Buffer,
0
);
if (EFI_ERROR (Status)) {
goto Exit;
}
- Bytes = EFI_PAGES_TO_SIZE (6);
+ Bytes = EFI_PAGES_TO_SIZE (6);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
@@ -988,7 +998,7 @@ NvmExpressDriverBindingStart (
Private->BufferPciAddr = (UINT8 *)(UINTN)MappedAddr;
- Private->Signature = NVME_CONTROLLER_PRIVATE_DATA_SIGNATURE;
+ Private->Signature = NVME_CONTROLLER_PRIVATE_DATA_SIGNATURE;
Private->ControllerHandle = Controller;
Private->ImageHandle = This->DriverBindingHandle;
Private->DriverBindingHandle = This->DriverBindingHandle;
@@ -1004,7 +1014,7 @@ NvmExpressDriverBindingStart (
InitializeListHead (&Private->UnsubmittedSubtasks);
Status = NvmeControllerInit (Private);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -1046,7 +1056,7 @@ NvmExpressDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &Passthru,
+ (VOID **)&Passthru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1065,7 +1075,6 @@ NvmExpressDriverBindingStart (
Status = DiscoverAllNamespaces (
Private
);
-
} else if (!IsDevicePathEnd (RemainingDevicePath)) {
//
// Enumerate the specified NVME namespace
@@ -1127,7 +1136,6 @@ Exit:
return Status;
}
-
/**
Stops a device controller or a bus controller.
@@ -1157,10 +1165,10 @@ Exit:
EFI_STATUS
EFIAPI
NvmExpressDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -1175,7 +1183,7 @@ NvmExpressDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &PassThru,
+ (VOID **)&PassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1201,11 +1209,11 @@ NvmExpressDriverBindingStop (
}
gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiNvmExpressPassThruProtocolGuid,
- PassThru,
- NULL
- );
+ Controller,
+ &gEfiNvmExpressPassThruProtocolGuid,
+ PassThru,
+ NULL
+ );
if (Private->TimerEvent != NULL) {
gBS->CloseEvent (Private->TimerEvent);
@@ -1224,17 +1232,17 @@ NvmExpressDriverBindingStop (
}
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
NvmeUnregisterShutdownNotification ();
@@ -1272,15 +1280,15 @@ NvmExpressDriverBindingStop (
EFI_STATUS
EFIAPI
NvmExpressUnload (
- IN EFI_HANDLE ImageHandle
+ IN EFI_HANDLE ImageHandle
)
{
- EFI_STATUS Status;
- EFI_HANDLE *DeviceHandleBuffer;
- UINTN DeviceHandleCount;
- UINTN Index;
- EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
- EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
+ EFI_STATUS Status;
+ EFI_HANDLE *DeviceHandleBuffer;
+ UINTN DeviceHandleCount;
+ UINTN Index;
+ EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2;
//
// Get the list of the device handles managed by this driver.
@@ -1289,13 +1297,13 @@ NvmExpressUnload (
// those protocols installed at image handle.
//
DeviceHandleBuffer = NULL;
- Status = gBS->LocateHandleBuffer (
- ByProtocol,
- &gEfiNvmExpressPassThruProtocolGuid,
- NULL,
- &DeviceHandleCount,
- &DeviceHandleBuffer
- );
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiNvmExpressPassThruProtocolGuid,
+ NULL,
+ &DeviceHandleCount,
+ &DeviceHandleBuffer
+ );
if (!EFI_ERROR (Status)) {
//
@@ -1342,7 +1350,7 @@ NvmExpressUnload (
Status = gBS->HandleProtocol (
ImageHandle,
&gEfiComponentNameProtocolGuid,
- (VOID **) &ComponentName
+ (VOID **)&ComponentName
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
@@ -1355,7 +1363,7 @@ NvmExpressUnload (
Status = gBS->HandleProtocol (
ImageHandle,
&gEfiComponentName2ProtocolGuid,
- (VOID **) &ComponentName2
+ (VOID **)&ComponentName2
);
if (!EFI_ERROR (Status)) {
gBS->UninstallProtocolInterface (
@@ -1374,6 +1382,7 @@ EXIT:
if (DeviceHandleBuffer != NULL) {
gBS->FreePool (DeviceHandleBuffer);
}
+
return Status;
}
@@ -1394,7 +1403,7 @@ NvmExpressDriverEntry (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@@ -1411,12 +1420,12 @@ NvmExpressDriverEntry (
// EFI drivers that are on PCI and other plug in cards.
//
gNvmExpressDriverSupportedEfiVersion.FirmwareVersion = 0x00020028;
- Status = gBS->InstallMultipleProtocolInterfaces (
- &ImageHandle,
- &gEfiDriverSupportedEfiVersionProtocolGuid,
- &gNvmExpressDriverSupportedEfiVersion,
- NULL
- );
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gEfiDriverSupportedEfiVersionProtocolGuid,
+ &gNvmExpressDriverSupportedEfiVersion,
+ NULL
+ );
ASSERT_EFI_ERROR (Status);
return Status;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.h b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.h
index 45a1447500..4c26b2e1b4 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.h
@@ -41,8 +41,8 @@
#include <Library/UefiDriverEntryPoint.h>
#include <Library/ReportStatusCodeLib.h>
-typedef struct _NVME_CONTROLLER_PRIVATE_DATA NVME_CONTROLLER_PRIVATE_DATA;
-typedef struct _NVME_DEVICE_PRIVATE_DATA NVME_DEVICE_PRIVATE_DATA;
+typedef struct _NVME_CONTROLLER_PRIVATE_DATA NVME_CONTROLLER_PRIVATE_DATA;
+typedef struct _NVME_DEVICE_PRIVATE_DATA NVME_DEVICE_PRIVATE_DATA;
#include "NvmExpressBlockIo.h"
#include "NvmExpressDiskInfo.h"
@@ -53,67 +53,67 @@ extern EFI_COMPONENT_NAME_PROTOCOL gNvmExpressComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gNvmExpressComponentName2;
extern EFI_DRIVER_SUPPORTED_EFI_VERSION_PROTOCOL gNvmExpressDriverSupportedEfiVersion;
-#define PCI_CLASS_MASS_STORAGE_NVM 0x08 // mass storage sub-class non-volatile memory.
-#define PCI_IF_NVMHCI 0x02 // mass storage programming interface NVMHCI.
+#define PCI_CLASS_MASS_STORAGE_NVM 0x08 // mass storage sub-class non-volatile memory.
+#define PCI_IF_NVMHCI 0x02 // mass storage programming interface NVMHCI.
-#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
-#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
+#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
+#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
-#define NVME_CSQ_SIZE 1 // Number of I/O submission queue entries, which is 0-based
-#define NVME_CCQ_SIZE 1 // Number of I/O completion queue entries, which is 0-based
+#define NVME_CSQ_SIZE 1 // Number of I/O submission queue entries, which is 0-based
+#define NVME_CCQ_SIZE 1 // Number of I/O completion queue entries, which is 0-based
//
// Number of asynchronous I/O submission queue entries, which is 0-based.
// The asynchronous I/O submission queue size is 4kB in total.
//
-#define NVME_ASYNC_CSQ_SIZE 63
+#define NVME_ASYNC_CSQ_SIZE 63
//
// Number of asynchronous I/O completion queue entries, which is 0-based.
// The asynchronous I/O completion queue size is 4kB in total.
//
-#define NVME_ASYNC_CCQ_SIZE 255
+#define NVME_ASYNC_CCQ_SIZE 255
-#define NVME_MAX_QUEUES 3 // Number of queues supported by the driver
+#define NVME_MAX_QUEUES 3 // Number of queues supported by the driver
-#define NVME_CONTROLLER_ID 0
+#define NVME_CONTROLLER_ID 0
//
// Time out value for Nvme transaction execution
//
-#define NVME_GENERIC_TIMEOUT EFI_TIMER_PERIOD_SECONDS (5)
+#define NVME_GENERIC_TIMEOUT EFI_TIMER_PERIOD_SECONDS (5)
//
// Nvme async transfer timer interval, set by experience.
//
-#define NVME_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS (1)
+#define NVME_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS (1)
//
// Unique signature for private data structure.
//
-#define NVME_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','M','E')
+#define NVME_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','M','E')
//
// Nvme private data structure.
//
struct _NVME_CONTROLLER_PRIVATE_DATA {
- UINT32 Signature;
+ UINT32 Signature;
- EFI_HANDLE ControllerHandle;
- EFI_HANDLE ImageHandle;
- EFI_HANDLE DriverBindingHandle;
+ EFI_HANDLE ControllerHandle;
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE DriverBindingHandle;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 PciAttributes;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 PciAttributes;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
- EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL Passthru;
+ EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
+ EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL Passthru;
//
// pointer to identify controller data
//
- NVME_ADMIN_CONTROLLER_DATA *ControllerData;
+ NVME_ADMIN_CONTROLLER_DATA *ControllerData;
//
// 6 x 4kB aligned buffers will be carved out of this buffer.
@@ -124,45 +124,45 @@ struct _NVME_CONTROLLER_PRIVATE_DATA {
// 5th 4kB boundary is the start of I/O submission queue #2.
// 6th 4kB boundary is the start of I/O completion queue #2.
//
- UINT8 *Buffer;
- UINT8 *BufferPciAddr;
+ UINT8 *Buffer;
+ UINT8 *BufferPciAddr;
//
// Pointers to 4kB aligned submission & completion queues.
//
- NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
- NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
- NVME_SQ *SqBufferPciAddr[NVME_MAX_QUEUES];
- NVME_CQ *CqBufferPciAddr[NVME_MAX_QUEUES];
+ NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
+ NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
+ NVME_SQ *SqBufferPciAddr[NVME_MAX_QUEUES];
+ NVME_CQ *CqBufferPciAddr[NVME_MAX_QUEUES];
//
// Submission and completion queue indices.
//
- NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
- NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
- UINT16 AsyncSqHead;
+ NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
+ NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
+ UINT16 AsyncSqHead;
//
// Flag to indicate internal IO queue creation.
//
- BOOLEAN CreateIoQueue;
+ BOOLEAN CreateIoQueue;
- UINT8 Pt[NVME_MAX_QUEUES];
- UINT16 Cid[NVME_MAX_QUEUES];
+ UINT8 Pt[NVME_MAX_QUEUES];
+ UINT16 Cid[NVME_MAX_QUEUES];
//
// Nvme controller capabilities
//
- NVME_CAP Cap;
+ NVME_CAP Cap;
- VOID *Mapping;
+ VOID *Mapping;
//
// For Non-blocking operations.
//
- EFI_EVENT TimerEvent;
- LIST_ENTRY AsyncPassThruQueue;
- LIST_ENTRY UnsubmittedSubtasks;
+ EFI_EVENT TimerEvent;
+ LIST_ENTRY AsyncPassThruQueue;
+ LIST_ENTRY UnsubmittedSubtasks;
};
#define NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU(a) \
@@ -175,7 +175,7 @@ struct _NVME_CONTROLLER_PRIVATE_DATA {
//
// Unique signature for private data structure.
//
-#define NVME_DEVICE_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('X','S','S','D')
+#define NVME_DEVICE_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('X','S','S','D')
//
// Nvme device private data structure
@@ -208,7 +208,6 @@ struct _NVME_DEVICE_PRIVATE_DATA {
NVME_ADMIN_NAMESPACE_DATA NamespaceData;
NVME_CONTROLLER_PRIVATE_DATA *Controller;
-
};
//
@@ -235,7 +234,7 @@ struct _NVME_DEVICE_PRIVATE_DATA {
NVME_DEVICE_PRIVATE_DATA_SIGNATURE \
)
-#define NVME_DEVICE_PRIVATE_DATA_FROM_STORAGE_SECURITY(a)\
+#define NVME_DEVICE_PRIVATE_DATA_FROM_STORAGE_SECURITY(a) \
CR (a, \
NVME_DEVICE_PRIVATE_DATA, \
StorageSecurity, \
@@ -245,38 +244,38 @@ struct _NVME_DEVICE_PRIVATE_DATA {
//
// Nvme block I/O 2 request.
//
-#define NVME_BLKIO2_REQUEST_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'R')
+#define NVME_BLKIO2_REQUEST_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'R')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ LIST_ENTRY Link;
- EFI_BLOCK_IO2_TOKEN *Token;
- UINTN UnsubmittedSubtaskNum;
- BOOLEAN LastSubtaskSubmitted;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ UINTN UnsubmittedSubtaskNum;
+ BOOLEAN LastSubtaskSubmitted;
//
// The queue for Nvme read/write sub-tasks of a BlockIo2 request.
//
- LIST_ENTRY SubtasksQueue;
+ LIST_ENTRY SubtasksQueue;
} NVME_BLKIO2_REQUEST;
#define NVME_BLKIO2_REQUEST_FROM_LINK(a) \
CR (a, NVME_BLKIO2_REQUEST, Link, NVME_BLKIO2_REQUEST_SIGNATURE)
-#define NVME_BLKIO2_SUBTASK_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'S')
+#define NVME_BLKIO2_SUBTASK_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'S')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ LIST_ENTRY Link;
- BOOLEAN IsLast;
- UINT32 NamespaceId;
- EFI_EVENT Event;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
+ BOOLEAN IsLast;
+ UINT32 NamespaceId;
+ EFI_EVENT Event;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
//
// The BlockIo2 request this subtask belongs to
//
- NVME_BLKIO2_REQUEST *BlockIo2Request;
+ NVME_BLKIO2_REQUEST *BlockIo2Request;
} NVME_BLKIO2_SUBTASK;
#define NVME_BLKIO2_SUBTASK_FROM_LINK(a) \
@@ -285,20 +284,20 @@ typedef struct {
//
// Nvme asynchronous passthru request.
//
-#define NVME_PASS_THRU_ASYNC_REQ_SIG SIGNATURE_32 ('N', 'P', 'A', 'R')
+#define NVME_PASS_THRU_ASYNC_REQ_SIG SIGNATURE_32 ('N', 'P', 'A', 'R')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
-
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet;
- UINT16 CommandId;
- VOID *MapPrpList;
- UINTN PrpListNo;
- VOID *PrpListHost;
- VOID *MapData;
- VOID *MapMeta;
- EFI_EVENT CallerEvent;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet;
+ UINT16 CommandId;
+ VOID *MapPrpList;
+ UINTN PrpListNo;
+ VOID *PrpListHost;
+ VOID *MapData;
+ VOID *MapMeta;
+ EFI_EVENT CallerEvent;
} NVME_PASS_THRU_ASYNC_REQ;
#define NVME_PASS_THRU_ASYNC_REQ_FROM_THIS(a) \
@@ -426,11 +425,11 @@ NvmExpressComponentNameGetDriverName (
EFI_STATUS
EFIAPI
NvmExpressComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -555,10 +554,10 @@ NvmExpressDriverBindingStart (
EFI_STATUS
EFIAPI
NvmExpressDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -594,10 +593,10 @@ NvmExpressDriverBindingStop (
EFI_STATUS
EFIAPI
NvmExpressPassThru (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
);
/**
@@ -636,8 +635,8 @@ NvmExpressPassThru (
EFI_STATUS
EFIAPI
NvmExpressGetNextNamespace (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN OUT UINT32 *NamespaceId
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT32 *NamespaceId
);
/**
@@ -667,9 +666,9 @@ NvmExpressGetNextNamespace (
EFI_STATUS
EFIAPI
NvmExpressGetNamespace (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT32 *NamespaceId
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT32 *NamespaceId
);
/**
@@ -706,9 +705,9 @@ NvmExpressGetNamespace (
EFI_STATUS
EFIAPI
NvmExpressBuildDevicePath (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -719,7 +718,7 @@ NvmExpressBuildDevicePath (
**/
VOID
NvmeDumpStatus (
- IN NVME_CQ *Cq
+ IN NVME_CQ *Cq
);
/**
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
index c63a6537ac..b33c903412 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
@@ -23,27 +23,27 @@
**/
EFI_STATUS
ReadSectors (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN UINT64 Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN UINT64 Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 Bytes;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- UINT32 BlockSize;
-
- Private = Device->Controller;
- BlockSize = Device->Media.BlockSize;
- Bytes = Blocks * BlockSize;
-
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 Bytes;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+
+ Private = Device->Controller;
+ BlockSize = Device->Media.BlockSize;
+ Bytes = Blocks * BlockSize;
+
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -57,7 +57,7 @@ ReadSectors (
CommandPacket.QueueType = NVME_IO_QUEUE;
CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
CommandPacket.NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
CommandPacket.NvmeCmd->Flags = CDW10_VALID | CDW11_VALID | CDW12_VALID;
@@ -86,41 +86,41 @@ ReadSectors (
**/
EFI_STATUS
WriteSectors (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN UINT64 Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN UINT64 Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- UINT32 Bytes;
- UINT32 BlockSize;
-
- Private = Device->Controller;
- BlockSize = Device->Media.BlockSize;
- Bytes = Blocks * BlockSize;
-
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ UINT32 Bytes;
+ UINT32 BlockSize;
+
+ Private = Device->Controller;
+ BlockSize = Device->Media.BlockSize;
+ Bytes = Blocks * BlockSize;
+
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
CommandPacket.NvmeCmd->Cdw0.Opcode = NVME_IO_WRITE_OPC;
- CommandPacket.NvmeCmd->Nsid = Device->NamespaceId;
- CommandPacket.TransferBuffer = (VOID *)(UINTN)Buffer;
+ CommandPacket.NvmeCmd->Nsid = Device->NamespaceId;
+ CommandPacket.TransferBuffer = (VOID *)(UINTN)Buffer;
CommandPacket.TransferLength = Bytes;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
CommandPacket.QueueType = NVME_IO_QUEUE;
CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
//
// Set Force Unit Access bit (bit 30) to use write-through behaviour
//
@@ -155,19 +155,19 @@ WriteSectors (
**/
EFI_STATUS
NvmeRead (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- OUT VOID *Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ OUT VOID *Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
//
// Wait for the device's asynchronous I/O queue to become empty.
@@ -207,14 +207,22 @@ NvmeRead (
Blocks = 0;
}
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
break;
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -233,19 +241,19 @@ NvmeRead (
**/
EFI_STATUS
NvmeWrite (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN VOID *Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN VOID *Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
//
// Wait for the device's asynchronous I/O queue to become empty.
@@ -285,14 +293,22 @@ NvmeWrite (
Blocks = 0;
}
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
break;
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -308,28 +324,28 @@ NvmeWrite (
**/
EFI_STATUS
NvmeFlush (
- IN NVME_DEVICE_PRIVATE_DATA *Device
+ IN NVME_DEVICE_PRIVATE_DATA *Device
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
Private = Device->Controller;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
CommandPacket.NvmeCmd->Cdw0.Opcode = NVME_IO_FLUSH_OPC;
- CommandPacket.NvmeCmd->Nsid = Device->NamespaceId;
- CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
- CommandPacket.QueueType = NVME_IO_QUEUE;
+ CommandPacket.NvmeCmd->Nsid = Device->NamespaceId;
+ CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
+ CommandPacket.QueueType = NVME_IO_QUEUE;
Status = Private->Passthru.PassThru (
&Private->Passthru,
@@ -352,19 +368,19 @@ NvmeFlush (
VOID
EFIAPI
AsyncIoCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- NVME_BLKIO2_SUBTASK *Subtask;
- NVME_BLKIO2_REQUEST *Request;
- NVME_CQ *Completion;
- EFI_BLOCK_IO2_TOKEN *Token;
+ NVME_BLKIO2_SUBTASK *Subtask;
+ NVME_BLKIO2_REQUEST *Request;
+ NVME_CQ *Completion;
+ EFI_BLOCK_IO2_TOKEN *Token;
gBS->CloseEvent (Event);
- Subtask = (NVME_BLKIO2_SUBTASK *) Context;
- Completion = (NVME_CQ *) Subtask->CommandPacket->NvmeCompletion;
+ Subtask = (NVME_BLKIO2_SUBTASK *)Context;
+ Completion = (NVME_CQ *)Subtask->CommandPacket->NvmeCompletion;
Request = Subtask->BlockIo2Request;
Token = Request->Token;
@@ -379,9 +395,9 @@ AsyncIoCallback (
//
// Dump completion entry status for debugging.
//
- DEBUG_CODE_BEGIN();
- NvmeDumpStatus (Completion);
- DEBUG_CODE_END();
+ DEBUG_CODE_BEGIN ();
+ NvmeDumpStatus (Completion);
+ DEBUG_CODE_END ();
}
}
@@ -422,23 +438,23 @@ AsyncIoCallback (
**/
EFI_STATUS
AsyncReadSectors (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN NVME_BLKIO2_REQUEST *Request,
- IN UINT64 Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks,
- IN BOOLEAN IsLast
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN NVME_BLKIO2_REQUEST *Request,
+ IN UINT64 Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks,
+ IN BOOLEAN IsLast
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 Bytes;
- NVME_BLKIO2_SUBTASK *Subtask;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
- EFI_NVM_EXPRESS_COMMAND *Command;
- EFI_NVM_EXPRESS_COMPLETION *Completion;
- EFI_STATUS Status;
- UINT32 BlockSize;
- EFI_TPL OldTpl;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 Bytes;
+ NVME_BLKIO2_SUBTASK *Subtask;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND *Command;
+ EFI_NVM_EXPRESS_COMPLETION *Completion;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ EFI_TPL OldTpl;
Private = Device->Controller;
BlockSize = Device->Media.BlockSize;
@@ -488,7 +504,7 @@ AsyncReadSectors (
Subtask,
&Subtask->Event
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -504,7 +520,7 @@ AsyncReadSectors (
CommandPacket->QueueType = NVME_IO_QUEUE;
CommandPacket->NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket->NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket->NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
CommandPacket->NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
CommandPacket->NvmeCmd->Flags = CDW10_VALID | CDW11_VALID | CDW12_VALID;
@@ -561,23 +577,23 @@ ErrorExit:
**/
EFI_STATUS
AsyncWriteSectors (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN NVME_BLKIO2_REQUEST *Request,
- IN UINT64 Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks,
- IN BOOLEAN IsLast
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN NVME_BLKIO2_REQUEST *Request,
+ IN UINT64 Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks,
+ IN BOOLEAN IsLast
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 Bytes;
- NVME_BLKIO2_SUBTASK *Subtask;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
- EFI_NVM_EXPRESS_COMMAND *Command;
- EFI_NVM_EXPRESS_COMPLETION *Completion;
- EFI_STATUS Status;
- UINT32 BlockSize;
- EFI_TPL OldTpl;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 Bytes;
+ NVME_BLKIO2_SUBTASK *Subtask;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND *Command;
+ EFI_NVM_EXPRESS_COMPLETION *Completion;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ EFI_TPL OldTpl;
Private = Device->Controller;
BlockSize = Device->Media.BlockSize;
@@ -627,7 +643,7 @@ AsyncWriteSectors (
Subtask,
&Subtask->Event
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -643,7 +659,7 @@ AsyncWriteSectors (
CommandPacket->QueueType = NVME_IO_QUEUE;
CommandPacket->NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket->NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket->NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
//
// Set Force Unit Access bit (bit 30) to use write-through behaviour
//
@@ -701,21 +717,21 @@ ErrorExit:
**/
EFI_STATUS
NvmeAsyncRead (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- OUT VOID *Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ OUT VOID *Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- NVME_BLKIO2_REQUEST *BlkIo2Req;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ NVME_BLKIO2_REQUEST *BlkIo2Req;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
Status = EFI_SUCCESS;
Private = Device->Controller;
@@ -745,7 +761,8 @@ NvmeAsyncRead (
if (Blocks > MaxTransferBlocks) {
Status = AsyncReadSectors (
Device,
- BlkIo2Req, (UINT64)(UINTN)Buffer,
+ BlkIo2Req,
+ (UINT64)(UINTN)Buffer,
Lba,
MaxTransferBlocks,
FALSE
@@ -767,7 +784,7 @@ NvmeAsyncRead (
Blocks = 0;
}
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
IsEmpty = IsListEmpty (&BlkIo2Req->SubtasksQueue) &&
(BlkIo2Req->UnsubmittedSubtaskNum == 0);
@@ -785,8 +802,8 @@ NvmeAsyncRead (
// should be returned to make sure that the caller does not free
// resources still using by these requests.
//
- Status = EFI_SUCCESS;
- Token->TransactionStatus = EFI_DEVICE_ERROR;
+ Status = EFI_SUCCESS;
+ Token->TransactionStatus = EFI_DEVICE_ERROR;
BlkIo2Req->LastSubtaskSubmitted = TRUE;
}
@@ -796,9 +813,17 @@ NvmeAsyncRead (
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -820,21 +845,21 @@ NvmeAsyncRead (
**/
EFI_STATUS
NvmeAsyncWrite (
- IN NVME_DEVICE_PRIVATE_DATA *Device,
- IN VOID *Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN NVME_DEVICE_PRIVATE_DATA *Device,
+ IN VOID *Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- NVME_BLKIO2_REQUEST *BlkIo2Req;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ NVME_BLKIO2_REQUEST *BlkIo2Req;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
Status = EFI_SUCCESS;
Private = Device->Controller;
@@ -862,14 +887,14 @@ NvmeAsyncWrite (
while (Blocks > 0) {
if (Blocks > MaxTransferBlocks) {
- Status = AsyncWriteSectors (
- Device,
- BlkIo2Req,
- (UINT64)(UINTN)Buffer,
- Lba,
- MaxTransferBlocks,
- FALSE
- );
+ Status = AsyncWriteSectors (
+ Device,
+ BlkIo2Req,
+ (UINT64)(UINTN)Buffer,
+ Lba,
+ MaxTransferBlocks,
+ FALSE
+ );
Blocks -= MaxTransferBlocks;
Buffer = (VOID *)(UINTN)((UINT64)(UINTN)Buffer + MaxTransferBlocks * BlockSize);
@@ -887,7 +912,7 @@ NvmeAsyncWrite (
Blocks = 0;
}
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
IsEmpty = IsListEmpty (&BlkIo2Req->SubtasksQueue) &&
(BlkIo2Req->UnsubmittedSubtaskNum == 0);
@@ -905,8 +930,8 @@ NvmeAsyncWrite (
// should be returned to make sure that the caller does not free
// resources still using by these requests.
//
- Status = EFI_SUCCESS;
- Token->TransactionStatus = EFI_DEVICE_ERROR;
+ Status = EFI_SUCCESS;
+ Token->TransactionStatus = EFI_DEVICE_ERROR;
BlkIo2Req->LastSubtaskSubmitted = TRUE;
}
@@ -916,9 +941,17 @@ NvmeAsyncWrite (
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -937,14 +970,14 @@ NvmeAsyncWrite (
EFI_STATUS
EFIAPI
NvmeBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_TPL OldTpl;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
+ EFI_TPL OldTpl;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
@@ -953,13 +986,13 @@ NvmeBlockIoReset (
//
// For Nvm Express subsystem, reset block device means reset controller.
//
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (This);
+ Device = NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO (This);
Private = Device->Controller;
- Status = NvmeControllerInit (Private);
+ Status = NvmeControllerInit (Private);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -992,20 +1025,20 @@ NvmeBlockIoReset (
EFI_STATUS
EFIAPI
NvmeBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UINTN IoAlign;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UINTN IoAlign;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1033,13 +1066,13 @@ NvmeBlockIoReadBlocks (
return EFI_BAD_BUFFER_SIZE;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if ((Lba + NumberOfBlocks - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1076,20 +1109,20 @@ NvmeBlockIoReadBlocks (
EFI_STATUS
EFIAPI
NvmeBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UINTN IoAlign;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UINTN IoAlign;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1117,13 +1150,13 @@ NvmeBlockIoWriteBlocks (
return EFI_BAD_BUFFER_SIZE;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if ((Lba + NumberOfBlocks - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1151,12 +1184,12 @@ NvmeBlockIoWriteBlocks (
EFI_STATUS
EFIAPI
NvmeBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1196,11 +1229,11 @@ NvmeBlockIoResetEx (
IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- NVME_DEVICE_PRIVATE_DATA *Device;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1227,7 +1260,7 @@ NvmeBlockIoResetEx (
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- Status = NvmeControllerInit (Private);
+ Status = NvmeControllerInit (Private);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -1278,21 +1311,21 @@ NvmeBlockIoResetEx (
EFI_STATUS
EFIAPI
NvmeBlockIoReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UINTN IoAlign;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UINTN IoAlign;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1316,6 +1349,7 @@ NvmeBlockIoReadBlocksEx (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -1324,13 +1358,13 @@ NvmeBlockIoReadBlocksEx (
return EFI_BAD_BUFFER_SIZE;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if ((Lba + NumberOfBlocks - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1340,7 +1374,7 @@ NvmeBlockIoReadBlocksEx (
if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
- Status = NvmeAsyncRead (Device, Buffer, Lba, NumberOfBlocks, Token);
+ Status = NvmeAsyncRead (Device, Buffer, Lba, NumberOfBlocks, Token);
} else {
Status = NvmeRead (Device, Buffer, Lba, NumberOfBlocks);
}
@@ -1391,20 +1425,20 @@ EFI_STATUS
EFIAPI
NvmeBlockIoWriteBlocksEx (
IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UINTN IoAlign;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UINTN IoAlign;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1428,6 +1462,7 @@ NvmeBlockIoWriteBlocksEx (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -1436,13 +1471,13 @@ NvmeBlockIoWriteBlocksEx (
return EFI_BAD_BUFFER_SIZE;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if ((Lba + NumberOfBlocks - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1452,7 +1487,7 @@ NvmeBlockIoWriteBlocksEx (
if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
- Status = NvmeAsyncWrite (Device, Buffer, Lba, NumberOfBlocks, Token);
+ Status = NvmeAsyncWrite (Device, Buffer, Lba, NumberOfBlocks, Token);
} else {
Status = NvmeWrite (Device, Buffer, Lba, NumberOfBlocks);
}
@@ -1488,13 +1523,13 @@ NvmeBlockIoWriteBlocksEx (
EFI_STATUS
EFIAPI
NvmeBlockIoFlushBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
)
{
- NVME_DEVICE_PRIVATE_DATA *Device;
- BOOLEAN IsEmpty;
- EFI_TPL OldTpl;
+ NVME_DEVICE_PRIVATE_DATA *Device;
+ BOOLEAN IsEmpty;
+ EFI_TPL OldTpl;
//
// Check parameters.
@@ -1560,21 +1595,21 @@ NvmeBlockIoFlushBlocksEx (
**/
EFI_STATUS
TrustTransferNvmeDevice (
- IN OUT NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN OUT NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- UINT16 SpecificData;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ UINT16 SpecificData;
ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
@@ -1615,10 +1650,10 @@ TrustTransferNvmeDevice (
);
if (!IsTrustSend) {
- if (EFI_ERROR (Status)) {
+ if (EFI_ERROR (Status)) {
*TransferLengthOut = 0;
} else {
- *TransferLengthOut = (UINTN) TransferLength;
+ *TransferLengthOut = (UINTN)TransferLength;
}
}
@@ -1700,20 +1735,20 @@ TrustTransferNvmeDevice (
EFI_STATUS
EFIAPI
NvmeStorageSecurityReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
)
{
- EFI_STATUS Status;
- NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ NVME_DEVICE_PRIVATE_DATA *Device;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
if ((PayloadBuffer == NULL) || (PayloadTransferSize == NULL) || (PayloadBufferSize == 0)) {
return EFI_INVALID_PARAMETER;
@@ -1807,19 +1842,19 @@ NvmeStorageSecurityReceiveData (
EFI_STATUS
EFIAPI
NvmeStorageSecuritySendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
)
{
- EFI_STATUS Status;
- NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ NVME_DEVICE_PRIVATE_DATA *Device;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
if ((PayloadBuffer == NULL) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
@@ -1848,7 +1883,3 @@ NvmeStorageSecuritySendData (
return Status;
}
-
-
-
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.h b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.h
index ba00dde440..8cad15efd3 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.h
@@ -23,8 +23,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_STATUS
EFIAPI
NvmeBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -49,11 +49,11 @@ NvmeBlockIoReset (
EFI_STATUS
EFIAPI
NvmeBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -79,11 +79,11 @@ NvmeBlockIoReadBlocks (
EFI_STATUS
EFIAPI
NvmeBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -99,7 +99,7 @@ NvmeBlockIoWriteBlocks (
EFI_STATUS
EFIAPI
NvmeBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
);
/**
@@ -162,12 +162,12 @@ NvmeBlockIoResetEx (
EFI_STATUS
EFIAPI
NvmeBlockIoReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -212,11 +212,11 @@ EFI_STATUS
EFIAPI
NvmeBlockIoWriteBlocksEx (
IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -246,8 +246,8 @@ NvmeBlockIoWriteBlocksEx (
EFI_STATUS
EFIAPI
NvmeBlockIoFlushBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -325,14 +325,14 @@ NvmeBlockIoFlushBlocksEx (
EFI_STATUS
EFIAPI
NvmeStorageSecurityReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
);
/**
@@ -399,13 +399,13 @@ NvmeStorageSecurityReceiveData (
EFI_STATUS
EFIAPI
NvmeStorageSecuritySendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.c
index 10b79d4ad7..9a5ca67300 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.c
@@ -8,7 +8,7 @@
#include "NvmExpress.h"
-EFI_DISK_INFO_PROTOCOL gNvmExpressDiskInfoProtocolTemplate = {
+EFI_DISK_INFO_PROTOCOL gNvmExpressDiskInfoProtocolTemplate = {
EFI_DISK_INFO_NVME_INTERFACE_GUID,
NvmExpressDiskInfoInquiry,
NvmExpressDiskInfoIdentify,
@@ -27,13 +27,12 @@ EFI_DISK_INFO_PROTOCOL gNvmExpressDiskInfoProtocolTemplate = {
**/
VOID
InitializeDiskInfo (
- IN NVME_DEVICE_PRIVATE_DATA *Device
+ IN NVME_DEVICE_PRIVATE_DATA *Device
)
{
CopyMem (&Device->DiskInfo, &gNvmExpressDiskInfoProtocolTemplate, sizeof (EFI_DISK_INFO_PROTOCOL));
}
-
/**
Provides inquiry information for the controller type.
@@ -53,15 +52,14 @@ InitializeDiskInfo (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
)
{
return EFI_NOT_FOUND;
}
-
/**
Provides identify information for the controller type.
@@ -83,13 +81,13 @@ NvmExpressDiskInfoInquiry (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
)
{
- EFI_STATUS Status;
- NVME_DEVICE_PRIVATE_DATA *Device;
+ EFI_STATUS Status;
+ NVME_DEVICE_PRIVATE_DATA *Device;
Device = NVME_DEVICE_PRIVATE_DATA_FROM_DISK_INFO (This);
@@ -98,6 +96,7 @@ NvmExpressDiskInfoIdentify (
Status = EFI_SUCCESS;
CopyMem (IdentifyData, &Device->NamespaceData, sizeof (Device->NamespaceData));
}
+
*IdentifyDataSize = sizeof (Device->NamespaceData);
return Status;
}
@@ -122,16 +121,15 @@ NvmExpressDiskInfoIdentify (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
)
{
return EFI_NOT_FOUND;
}
-
/**
This function is used to get controller information.
@@ -146,11 +144,10 @@ NvmExpressDiskInfoSenseData (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
)
{
return EFI_UNSUPPORTED;
}
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.h b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.h
index b19e6f0a3b..22135ca262 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDiskInfo.h
@@ -20,10 +20,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
InitializeDiskInfo (
- IN NVME_DEVICE_PRIVATE_DATA *Device
+ IN NVME_DEVICE_PRIVATE_DATA *Device
);
-
/**
Provides inquiry information for the controller type.
@@ -43,9 +42,9 @@ InitializeDiskInfo (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
);
/**
@@ -69,9 +68,9 @@ NvmExpressDiskInfoInquiry (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
);
/**
@@ -94,13 +93,12 @@ NvmExpressDiskInfoIdentify (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
);
-
/**
This function is used to get controller information.
@@ -115,9 +113,9 @@ NvmExpressDiskInfoSenseData (
EFI_STATUS
EFIAPI
NvmExpressDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
index 08f9d50ff5..ac77afe113 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
@@ -9,13 +9,13 @@
#include "NvmExpress.h"
-#define NVME_SHUTDOWN_PROCESS_TIMEOUT 45
+#define NVME_SHUTDOWN_PROCESS_TIMEOUT 45
//
// The number of NVME controllers managed by this driver, used by
// NvmeRegisterShutdownNotification() and NvmeUnregisterShutdownNotification().
//
-UINTN mNvmeControllerNumber = 0;
+UINTN mNvmeControllerNumber = 0;
/**
Read Nvm Express controller capability register.
@@ -29,13 +29,13 @@ UINTN mNvmeControllerNumber = 0;
**/
EFI_STATUS
ReadNvmeControllerCapabilities (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_CAP *Cap
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_CAP *Cap
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT64 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT64 Data;
PciIo = Private->PciIo;
Status = PciIo->Mem.Read (
@@ -47,11 +47,11 @@ ReadNvmeControllerCapabilities (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
- WriteUnaligned64 ((UINT64*)Cap, Data);
+ WriteUnaligned64 ((UINT64 *)Cap, Data);
return EFI_SUCCESS;
}
@@ -67,13 +67,13 @@ ReadNvmeControllerCapabilities (
**/
EFI_STATUS
ReadNvmeControllerConfiguration (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_CC *Cc
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_CC *Cc
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT32 Data;
PciIo = Private->PciIo;
Status = PciIo->Mem.Read (
@@ -85,11 +85,11 @@ ReadNvmeControllerConfiguration (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
- WriteUnaligned32 ((UINT32*)Cc, Data);
+ WriteUnaligned32 ((UINT32 *)Cc, Data);
return EFI_SUCCESS;
}
@@ -105,16 +105,16 @@ ReadNvmeControllerConfiguration (
**/
EFI_STATUS
WriteNvmeControllerConfiguration (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_CC *Cc
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_CC *Cc
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT32 Data;
PciIo = Private->PciIo;
- Data = ReadUnaligned32 ((UINT32*)Cc);
+ Data = ReadUnaligned32 ((UINT32 *)Cc);
Status = PciIo->Mem.Write (
PciIo,
EfiPciIoWidthUint32,
@@ -124,7 +124,7 @@ WriteNvmeControllerConfiguration (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -151,13 +151,13 @@ WriteNvmeControllerConfiguration (
**/
EFI_STATUS
ReadNvmeControllerStatus (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_CSTS *Csts
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_CSTS *Csts
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT32 Data;
PciIo = Private->PciIo;
Status = PciIo->Mem.Read (
@@ -169,16 +169,14 @@ ReadNvmeControllerStatus (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
- WriteUnaligned32 ((UINT32*)Csts, Data);
+ WriteUnaligned32 ((UINT32 *)Csts, Data);
return EFI_SUCCESS;
}
-
-
/**
Write Nvm Express admin queue attributes register.
@@ -191,16 +189,16 @@ ReadNvmeControllerStatus (
**/
EFI_STATUS
WriteNvmeAdminQueueAttributes (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_AQA *Aqa
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_AQA *Aqa
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT32 Data;
PciIo = Private->PciIo;
- Data = ReadUnaligned32 ((UINT32*)Aqa);
+ Data = ReadUnaligned32 ((UINT32 *)Aqa);
Status = PciIo->Mem.Write (
PciIo,
EfiPciIoWidthUint32,
@@ -210,7 +208,7 @@ WriteNvmeAdminQueueAttributes (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -220,7 +218,6 @@ WriteNvmeAdminQueueAttributes (
return EFI_SUCCESS;
}
-
/**
Write Nvm Express admin submission queue base address register.
@@ -233,16 +230,16 @@ WriteNvmeAdminQueueAttributes (
**/
EFI_STATUS
WriteNvmeAdminSubmissionQueueBaseAddress (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_ASQ *Asq
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_ASQ *Asq
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT64 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT64 Data;
- PciIo = Private->PciIo;
- Data = ReadUnaligned64 ((UINT64*)Asq);
+ PciIo = Private->PciIo;
+ Data = ReadUnaligned64 ((UINT64 *)Asq);
Status = PciIo->Mem.Write (
PciIo,
@@ -253,7 +250,7 @@ WriteNvmeAdminSubmissionQueueBaseAddress (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -262,8 +259,6 @@ WriteNvmeAdminSubmissionQueueBaseAddress (
return EFI_SUCCESS;
}
-
-
/**
Write Nvm Express admin completion queue base address register.
@@ -276,16 +271,16 @@ WriteNvmeAdminSubmissionQueueBaseAddress (
**/
EFI_STATUS
WriteNvmeAdminCompletionQueueBaseAddress (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN NVME_ACQ *Acq
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN NVME_ACQ *Acq
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT64 Data;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT64 Data;
- PciIo = Private->PciIo;
- Data = ReadUnaligned64 ((UINT64*)Acq);
+ PciIo = Private->PciIo;
+ Data = ReadUnaligned64 ((UINT64 *)Acq);
Status = PciIo->Mem.Write (
PciIo,
@@ -296,7 +291,7 @@ WriteNvmeAdminCompletionQueueBaseAddress (
&Data
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -316,20 +311,20 @@ WriteNvmeAdminCompletionQueueBaseAddress (
**/
EFI_STATUS
NvmeDisableController (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- NVME_CSTS Csts;
- EFI_STATUS Status;
- UINT32 Index;
- UINT8 Timeout;
+ NVME_CC Cc;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
+ UINT32 Index;
+ UINT8 Timeout;
//
// Read Controller Configuration Register.
//
Status = ReadNvmeControllerConfiguration (Private, &Cc);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -340,7 +335,7 @@ NvmeDisableController (
//
Status = WriteNvmeControllerConfiguration (Private, &Cc);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -354,15 +349,15 @@ NvmeDisableController (
Timeout = Private->Cap.To;
}
- for(Index = (Timeout * 500); Index != 0; --Index) {
- gBS->Stall(1000);
+ for (Index = (Timeout * 500); Index != 0; --Index) {
+ gBS->Stall (1000);
//
// Check if the controller is initialized
//
Status = ReadNvmeControllerStatus (Private, &Csts);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -395,14 +390,14 @@ NvmeDisableController (
**/
EFI_STATUS
NvmeEnableController (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- NVME_CSTS Csts;
- EFI_STATUS Status;
- UINT32 Index;
- UINT8 Timeout;
+ NVME_CC Cc;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
+ UINT32 Index;
+ UINT8 Timeout;
//
// Enable the controller.
@@ -414,7 +409,7 @@ NvmeEnableController (
Cc.Iocqes = 4;
Status = WriteNvmeControllerConfiguration (Private, &Cc);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -428,15 +423,15 @@ NvmeEnableController (
Timeout = Private->Cap.To;
}
- for(Index = (Timeout * 500); Index != 0; --Index) {
- gBS->Stall(1000);
+ for (Index = (Timeout * 500); Index != 0; --Index) {
+ gBS->Stall (1000);
//
// Check if the controller is initialized
//
Status = ReadNvmeControllerStatus (Private, &Csts);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -469,25 +464,25 @@ NvmeEnableController (
**/
EFI_STATUS
NvmeIdentifyController (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN VOID *Buffer
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
//
// According to Nvm Express 1.1 spec Figure 38, When not used, the field shall be cleared to 0h.
// For the Identify command, the Namespace Identifier is only used for the Namespace data structure.
//
- Command.Nsid = 0;
+ Command.Nsid = 0;
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -498,8 +493,8 @@ NvmeIdentifyController (
//
// Set bit 0 (Cns bit) to 1 to identify a controller
//
- Command.Cdw10 = 1;
- Command.Flags = CDW10_VALID;
+ Command.Cdw10 = 1;
+ Command.Flags = CDW10_VALID;
Status = Private->Passthru.PassThru (
&Private->Passthru,
@@ -524,25 +519,25 @@ NvmeIdentifyController (
**/
EFI_STATUS
NvmeIdentifyNamespace (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
- Command.Nsid = NamespaceId;
+ Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
+ Command.Nsid = NamespaceId;
CommandPacket.TransferBuffer = Buffer;
CommandPacket.TransferLength = sizeof (NVME_ADMIN_NAMESPACE_DATA);
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -574,30 +569,30 @@ NvmeIdentifyNamespace (
**/
EFI_STATUS
NvmeCreateIoCompletionQueue (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOCQ CrIoCq;
- UINT32 Index;
- UINT16 QueueSize;
-
- Status = EFI_SUCCESS;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOCQ CrIoCq;
+ UINT32 Index;
+ UINT16 QueueSize;
+
+ Status = EFI_SUCCESS;
Private->CreateIoQueue = TRUE;
for (Index = 1; Index < NVME_MAX_QUEUES; Index++) {
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoCq, sizeof(NVME_ADMIN_CRIOCQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoCq, sizeof (NVME_ADMIN_CRIOCQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
CommandPacket.TransferBuffer = Private->CqBufferPciAddr[Index];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -646,30 +641,30 @@ NvmeCreateIoCompletionQueue (
**/
EFI_STATUS
NvmeCreateIoSubmissionQueue (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOSQ CrIoSq;
- UINT32 Index;
- UINT16 QueueSize;
-
- Status = EFI_SUCCESS;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOSQ CrIoSq;
+ UINT32 Index;
+ UINT16 QueueSize;
+
+ Status = EFI_SUCCESS;
Private->CreateIoQueue = TRUE;
for (Index = 1; Index < NVME_MAX_QUEUES; Index++) {
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoSq, sizeof(NVME_ADMIN_CRIOSQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoSq, sizeof (NVME_ADMIN_CRIOSQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
CommandPacket.TransferBuffer = Private->SqBufferPciAddr[Index];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -720,17 +715,18 @@ NvmeCreateIoSubmissionQueue (
**/
EFI_STATUS
NvmeControllerInit (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Supports;
- NVME_AQA Aqa;
- NVME_ASQ Asq;
- NVME_ACQ Acq;
- UINT8 Sn[21];
- UINT8 Mn[41];
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Supports;
+ NVME_AQA Aqa;
+ NVME_ASQ Asq;
+ NVME_ACQ Acq;
+ UINT8 Sn[21];
+ UINT8 Mn[41];
+
//
// Save original PCI attributes and enable this controller.
//
@@ -799,12 +795,12 @@ NvmeControllerInit (
//
ASSERT ((Private->Cap.Mpsmin + 12) <= EFI_PAGE_SHIFT);
- Private->Cid[0] = 0;
- Private->Cid[1] = 0;
- Private->Cid[2] = 0;
- Private->Pt[0] = 0;
- Private->Pt[1] = 0;
- Private->Pt[2] = 0;
+ Private->Cid[0] = 0;
+ Private->Cid[1] = 0;
+ Private->Cid[2] = 0;
+ Private->Pt[0] = 0;
+ Private->Pt[1] = 0;
+ Private->Pt[2] = 0;
Private->SqTdbl[0].Sqt = 0;
Private->SqTdbl[1].Sqt = 0;
Private->SqTdbl[2].Sqt = 0;
@@ -815,7 +811,7 @@ NvmeControllerInit (
Status = NvmeDisableController (Private);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -869,7 +865,7 @@ NvmeControllerInit (
//
Status = WriteNvmeAdminQueueAttributes (Private, &Aqa);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -878,7 +874,7 @@ NvmeControllerInit (
//
Status = WriteNvmeAdminSubmissionQueueBaseAddress (Private, &Asq);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -887,12 +883,12 @@ NvmeControllerInit (
//
Status = WriteNvmeAdminCompletionQueueBaseAddress (Private, &Acq);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
Status = NvmeEnableController (Private);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -900,7 +896,7 @@ NvmeControllerInit (
// Allocate buffer for Identify Controller data
//
if (Private->ControllerData == NULL) {
- Private->ControllerData = (NVME_ADMIN_CONTROLLER_DATA *)AllocateZeroPool (sizeof(NVME_ADMIN_CONTROLLER_DATA));
+ Private->ControllerData = (NVME_ADMIN_CONTROLLER_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_CONTROLLER_DATA));
if (Private->ControllerData == NULL) {
return EFI_OUT_OF_RESOURCES;
@@ -912,8 +908,8 @@ NvmeControllerInit (
//
Status = NvmeIdentifyController (Private, Private->ControllerData);
- if (EFI_ERROR(Status)) {
- FreePool(Private->ControllerData);
+ if (EFI_ERROR (Status)) {
+ FreePool (Private->ControllerData);
Private->ControllerData = NULL;
return EFI_NOT_FOUND;
}
@@ -928,13 +924,13 @@ NvmeControllerInit (
DEBUG ((DEBUG_INFO, " == NVME IDENTIFY CONTROLLER DATA ==\n"));
DEBUG ((DEBUG_INFO, " PCI VID : 0x%x\n", Private->ControllerData->Vid));
DEBUG ((DEBUG_INFO, " PCI SSVID : 0x%x\n", Private->ControllerData->Ssvid));
- DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
- DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
- DEBUG ((DEBUG_INFO, " FR : 0x%x\n", *((UINT64*)Private->ControllerData->Fr)));
- DEBUG ((DEBUG_INFO, " TNVMCAP (high 8-byte) : 0x%lx\n", *((UINT64*)(Private->ControllerData->Tnvmcap + 8))));
- DEBUG ((DEBUG_INFO, " TNVMCAP (low 8-byte) : 0x%lx\n", *((UINT64*)Private->ControllerData->Tnvmcap)));
+ DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
+ DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
+ DEBUG ((DEBUG_INFO, " FR : 0x%x\n", *((UINT64 *)Private->ControllerData->Fr)));
+ DEBUG ((DEBUG_INFO, " TNVMCAP (high 8-byte) : 0x%lx\n", *((UINT64 *)(Private->ControllerData->Tnvmcap + 8))));
+ DEBUG ((DEBUG_INFO, " TNVMCAP (low 8-byte) : 0x%lx\n", *((UINT64 *)Private->ControllerData->Tnvmcap)));
DEBUG ((DEBUG_INFO, " RAB : 0x%x\n", Private->ControllerData->Rab));
- DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32*)Private->ControllerData->Ieee_oui));
+ DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32 *)Private->ControllerData->Ieee_oui));
DEBUG ((DEBUG_INFO, " AERL : 0x%x\n", Private->ControllerData->Aerl));
DEBUG ((DEBUG_INFO, " SQES : 0x%x\n", Private->ControllerData->Sqes));
DEBUG ((DEBUG_INFO, " CQES : 0x%x\n", Private->ControllerData->Cqes));
@@ -945,8 +941,8 @@ NvmeControllerInit (
// One for blocking I/O, one for non-blocking I/O.
//
Status = NvmeCreateIoCompletionQueue (Private);
- if (EFI_ERROR(Status)) {
- return Status;
+ if (EFI_ERROR (Status)) {
+ return Status;
}
//
@@ -976,24 +972,24 @@ NvmeControllerInit (
VOID
EFIAPI
NvmeShutdownAllControllers (
- IN EFI_RESET_TYPE ResetType,
- IN EFI_STATUS ResetStatus,
- IN UINTN DataSize,
- IN VOID *ResetData OPTIONAL
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN VOID *ResetData OPTIONAL
)
{
- EFI_STATUS Status;
- EFI_HANDLE *Handles;
- UINTN HandleCount;
- UINTN HandleIndex;
- EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfos;
- UINTN OpenInfoCount;
- UINTN OpenInfoIndex;
- EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *NvmePassThru;
- NVME_CC Cc;
- NVME_CSTS Csts;
- UINTN Index;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ EFI_HANDLE *Handles;
+ UINTN HandleCount;
+ UINTN HandleIndex;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfos;
+ UINTN OpenInfoCount;
+ UINTN OpenInfoIndex;
+ EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *NvmePassThru;
+ NVME_CC Cc;
+ NVME_CSTS Csts;
+ UINTN Index;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
Status = gBS->LocateHandleBuffer (
ByProtocol,
@@ -1023,11 +1019,12 @@ NvmeShutdownAllControllers (
// gImageHandle equals to DriverBinding handle for this driver.
//
if (((OpenInfos[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) != 0) &&
- (OpenInfos[OpenInfoIndex].AgentHandle == gImageHandle)) {
+ (OpenInfos[OpenInfoIndex].AgentHandle == gImageHandle))
+ {
Status = gBS->OpenProtocol (
OpenInfos[OpenInfoIndex].ControllerHandle,
&gEfiNvmExpressPassThruProtocolGuid,
- (VOID **) &NvmePassThru,
+ (VOID **)&NvmePassThru,
NULL,
NULL,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1035,22 +1032,24 @@ NvmeShutdownAllControllers (
if (EFI_ERROR (Status)) {
continue;
}
+
Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (NvmePassThru);
//
// Read Controller Configuration Register.
//
Status = ReadNvmeControllerConfiguration (Private, &Cc);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
continue;
}
+
//
// The host should set the Shutdown Notification (CC.SHN) field to 01b
// to indicate a normal shutdown operation.
//
Cc.Shn = NVME_CC_SHN_NORMAL_SHUTDOWN;
Status = WriteNvmeControllerConfiguration (Private, &Cc);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
continue;
}
@@ -1061,10 +1060,11 @@ NvmeShutdownAllControllers (
//
for (Index = 0; Index < NVME_SHUTDOWN_PROCESS_TIMEOUT * 100; Index++) {
Status = ReadNvmeControllerStatus (Private, &Csts);
- if (!EFI_ERROR(Status) && (Csts.Shst == NVME_CSTS_SHST_SHUTDOWN_COMPLETED)) {
- DEBUG((DEBUG_INFO, "NvmeShutdownController: shutdown processing is completed after %dms.\n", Index * 10));
+ if (!EFI_ERROR (Status) && (Csts.Shst == NVME_CSTS_SHST_SHUTDOWN_COMPLETED)) {
+ DEBUG ((DEBUG_INFO, "NvmeShutdownController: shutdown processing is completed after %dms.\n", Index * 10));
break;
}
+
//
// Stall for 10ms
//
@@ -1072,7 +1072,7 @@ NvmeShutdownAllControllers (
}
if (Index == NVME_SHUTDOWN_PROCESS_TIMEOUT * 100) {
- DEBUG((DEBUG_ERROR, "NvmeShutdownController: shutdown processing is timed out\n"));
+ DEBUG ((DEBUG_ERROR, "NvmeShutdownController: shutdown processing is timed out\n"));
}
}
}
@@ -1089,12 +1089,12 @@ NvmeRegisterShutdownNotification (
VOID
)
{
- EFI_STATUS Status;
- EFI_RESET_NOTIFICATION_PROTOCOL *ResetNotify;
+ EFI_STATUS Status;
+ EFI_RESET_NOTIFICATION_PROTOCOL *ResetNotify;
mNvmeControllerNumber++;
if (mNvmeControllerNumber == 1) {
- Status = gBS->LocateProtocol (&gEfiResetNotificationProtocolGuid, NULL, (VOID **) &ResetNotify);
+ Status = gBS->LocateProtocol (&gEfiResetNotificationProtocolGuid, NULL, (VOID **)&ResetNotify);
if (!EFI_ERROR (Status)) {
Status = ResetNotify->RegisterResetNotify (ResetNotify, NvmeShutdownAllControllers);
ASSERT_EFI_ERROR (Status);
@@ -1114,12 +1114,12 @@ NvmeUnregisterShutdownNotification (
VOID
)
{
- EFI_STATUS Status;
- EFI_RESET_NOTIFICATION_PROTOCOL *ResetNotify;
+ EFI_STATUS Status;
+ EFI_RESET_NOTIFICATION_PROTOCOL *ResetNotify;
mNvmeControllerNumber--;
if (mNvmeControllerNumber == 0) {
- Status = gBS->LocateProtocol (&gEfiResetNotificationProtocolGuid, NULL, (VOID **) &ResetNotify);
+ Status = gBS->LocateProtocol (&gEfiResetNotificationProtocolGuid, NULL, (VOID **)&ResetNotify);
if (!EFI_ERROR (Status)) {
Status = ResetNotify->UnregisterResetNotify (ResetNotify, NvmeShutdownAllControllers);
ASSERT_EFI_ERROR (Status);
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
index 60b3770580..a08c4e974e 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
@@ -11,12 +11,12 @@
#ifndef _NVME_HCI_H_
#define _NVME_HCI_H_
-#define NVME_BAR 0
+#define NVME_BAR 0
//
// Offset from the beginning of private data queue buffer
//
-#define NVME_ASQ_BUF_OFFSET EFI_PAGE_SIZE
+#define NVME_ASQ_BUF_OFFSET EFI_PAGE_SIZE
/**
Initialize the Nvm Express controller.
@@ -29,7 +29,7 @@
**/
EFI_STATUS
NvmeControllerInit (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
);
/**
@@ -44,8 +44,8 @@ NvmeControllerInit (
**/
EFI_STATUS
NvmeIdentifyController (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN VOID *Buffer
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN VOID *Buffer
);
/**
@@ -61,10 +61,9 @@ NvmeIdentifyController (
**/
EFI_STATUS
NvmeIdentifyNamespace (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
);
#endif
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
index a46a098258..f37baa626a 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
@@ -18,7 +18,7 @@
**/
VOID
NvmeDumpStatus (
- IN NVME_CQ *Cq
+ IN NVME_CQ *Cq
)
{
DEBUG ((DEBUG_VERBOSE, "Dump NVMe Completion Entry Status from [0x%x]:\n", Cq));
@@ -97,6 +97,7 @@ NvmeDumpStatus (
DEBUG ((DEBUG_VERBOSE, "Reservation Conflict\n"));
break;
}
+
break;
case 0x1:
@@ -159,6 +160,7 @@ NvmeDumpStatus (
DEBUG ((DEBUG_VERBOSE, "Attempted Write to Read Only Range\n"));
break;
}
+
break;
case 0x2:
@@ -185,6 +187,7 @@ NvmeDumpStatus (
DEBUG ((DEBUG_VERBOSE, "Access Denied\n"));
break;
}
+
break;
default:
@@ -206,24 +209,24 @@ NvmeDumpStatus (
@retval The pointer to the first PRP List of the PRP lists.
**/
-VOID*
+VOID *
NvmeCreatePrpList (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
- IN UINTN Pages,
- OUT VOID **PrpListHost,
- IN OUT UINTN *PrpListNo,
- OUT VOID **Mapping
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
+ IN UINTN Pages,
+ OUT VOID **PrpListHost,
+ IN OUT UINTN *PrpListNo,
+ OUT VOID **Mapping
)
{
- UINTN PrpEntryNo;
- UINT64 PrpListBase;
- UINTN PrpListIndex;
- UINTN PrpEntryIndex;
- UINT64 Remainder;
- EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
- UINTN Bytes;
- EFI_STATUS Status;
+ UINTN PrpEntryNo;
+ UINT64 PrpListBase;
+ UINTN PrpListIndex;
+ UINTN PrpEntryIndex;
+ UINT64 Remainder;
+ EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
+ UINTN Bytes;
+ EFI_STATUS Status;
//
// The number of Prp Entry in a memory page.
@@ -257,7 +260,7 @@ NvmeCreatePrpList (
return NULL;
}
- Bytes = EFI_PAGES_TO_SIZE (*PrpListNo);
+ Bytes = EFI_PAGES_TO_SIZE (*PrpListNo);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
@@ -271,45 +274,46 @@ NvmeCreatePrpList (
DEBUG ((DEBUG_ERROR, "NvmeCreatePrpList: create PrpList failure!\n"));
goto EXIT;
}
+
//
// Fill all PRP lists except of last one.
//
ZeroMem (*PrpListHost, Bytes);
for (PrpListIndex = 0; PrpListIndex < *PrpListNo - 1; ++PrpListIndex) {
- PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
+ PrpListBase = *(UINT64 *)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < PrpEntryNo; ++PrpEntryIndex) {
if (PrpEntryIndex != PrpEntryNo - 1) {
//
// Fill all PRP entries except of last one.
//
- *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
- PhysicalAddr += EFI_PAGE_SIZE;
+ *((UINT64 *)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
+ PhysicalAddr += EFI_PAGE_SIZE;
} else {
//
// Fill last PRP entries with next PRP List pointer.
//
- *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE;
+ *((UINT64 *)(UINTN)PrpListBase + PrpEntryIndex) = PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE;
}
}
}
+
//
// Fill last PRP list.
//
- PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
+ PrpListBase = *(UINT64 *)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < Remainder; ++PrpEntryIndex) {
- *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
- PhysicalAddr += EFI_PAGE_SIZE;
+ *((UINT64 *)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
+ PhysicalAddr += EFI_PAGE_SIZE;
}
- return (VOID*)(UINTN)PrpListPhyAddr;
+ return (VOID *)(UINTN)PrpListPhyAddr;
EXIT:
PciIo->FreeBuffer (PciIo, *PrpListNo, *PrpListHost);
return NULL;
}
-
/**
Aborts the asynchronous PassThru requests.
@@ -322,18 +326,18 @@ EXIT:
**/
EFI_STATUS
AbortAsyncPassThruTasks (
- IN NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- NVME_BLKIO2_SUBTASK *Subtask;
- NVME_BLKIO2_REQUEST *BlkIo2Request;
- NVME_PASS_THRU_ASYNC_REQ *AsyncRequest;
- EFI_BLOCK_IO2_TOKEN *Token;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ NVME_BLKIO2_SUBTASK *Subtask;
+ NVME_BLKIO2_REQUEST *BlkIo2Request;
+ NVME_PASS_THRU_ASYNC_REQ *AsyncRequest;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
PciIo = Private->PciIo;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
@@ -343,7 +347,8 @@ AbortAsyncPassThruTasks (
//
for (Link = GetFirstNode (&Private->UnsubmittedSubtasks);
!IsNull (&Private->UnsubmittedSubtasks, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Private->UnsubmittedSubtasks, Link);
Subtask = NVME_BLKIO2_SUBTASK_FROM_LINK (Link);
BlkIo2Request = Subtask->BlockIo2Request;
@@ -353,6 +358,7 @@ AbortAsyncPassThruTasks (
if (Subtask->IsLast) {
BlkIo2Request->LastSubtaskSubmitted = TRUE;
}
+
Token->TransactionStatus = EFI_ABORTED;
RemoveEntryList (Link);
@@ -365,19 +371,23 @@ AbortAsyncPassThruTasks (
//
for (Link = GetFirstNode (&Private->AsyncPassThruQueue);
!IsNull (&Private->AsyncPassThruQueue, Link);
- Link = NextLink) {
- NextLink = GetNextNode (&Private->AsyncPassThruQueue, Link);
+ Link = NextLink)
+ {
+ NextLink = GetNextNode (&Private->AsyncPassThruQueue, Link);
AsyncRequest = NVME_PASS_THRU_ASYNC_REQ_FROM_THIS (Link);
if (AsyncRequest->MapData != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapData);
}
+
if (AsyncRequest->MapMeta != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapMeta);
}
+
if (AsyncRequest->MapPrpList != NULL) {
PciIo->Unmap (PciIo, AsyncRequest->MapPrpList);
}
+
if (AsyncRequest->PrpListHost != NULL) {
PciIo->FreeBuffer (
PciIo,
@@ -392,7 +402,8 @@ AbortAsyncPassThruTasks (
}
if (IsListEmpty (&Private->AsyncPassThruQueue) &&
- IsListEmpty (&Private->UnsubmittedSubtasks)) {
+ IsListEmpty (&Private->UnsubmittedSubtasks))
+ {
Status = EFI_SUCCESS;
} else {
Status = EFI_DEVICE_ERROR;
@@ -403,7 +414,6 @@ AbortAsyncPassThruTasks (
return Status;
}
-
/**
Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
both blocking I/O and non-blocking I/O. The blocking I/O functionality is required, and the non-blocking
@@ -439,10 +449,10 @@ AbortAsyncPassThruTasks (
EFI_STATUS
EFIAPI
NvmExpressPassThru (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
NVME_CONTROLLER_PRIVATE_DATA *Private;
@@ -483,7 +493,7 @@ NvmExpressPassThru (
return EFI_INVALID_PARAMETER;
}
- if (Packet->QueueType != NVME_ADMIN_QUEUE && Packet->QueueType != NVME_IO_QUEUE) {
+ if ((Packet->QueueType != NVME_ADMIN_QUEUE) && (Packet->QueueType != NVME_IO_QUEUE)) {
return EFI_INVALID_PARAMETER;
}
@@ -492,31 +502,33 @@ NvmExpressPassThru (
// EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL set is an illegal
// configuration.
//
- Attributes = This->Mode->Attributes;
+ Attributes = This->Mode->Attributes;
if ((Attributes & (EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
- EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL)) == 0) {
+ EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL)) == 0)
+ {
return EFI_INVALID_PARAMETER;
}
//
// Buffer alignment check for TransferBuffer & MetadataBuffer.
//
- IoAlign = This->Mode->IoAlign;
- if (IoAlign > 0 && (((UINTN) Packet->TransferBuffer & (IoAlign - 1)) != 0)) {
+ IoAlign = This->Mode->IoAlign;
+ if ((IoAlign > 0) && (((UINTN)Packet->TransferBuffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
- if (IoAlign > 0 && (((UINTN) Packet->MetadataBuffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Packet->MetadataBuffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
- Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
+ Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
//
// Check NamespaceId is valid or not.
//
if ((NamespaceId > Private->ControllerData->Nn) &&
- (NamespaceId != (UINT32) -1)) {
+ (NamespaceId != (UINT32)-1))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -555,13 +567,15 @@ NvmExpressPassThru (
// Submission queue full check.
//
if ((Private->SqTdbl[QueueId].Sqt + 1) % QueueSize ==
- Private->AsyncSqHead) {
+ Private->AsyncSqHead)
+ {
return EFI_NOT_READY;
}
}
}
- Sq = Private->SqBuffer[QueueId] + Private->SqTdbl[QueueId].Sqt;
- Cq = Private->CqBuffer[QueueId] + Private->CqHdbl[QueueId].Cqh;
+
+ Sq = Private->SqBuffer[QueueId] + Private->SqTdbl[QueueId].Sqt;
+ Cq = Private->CqBuffer[QueueId] + Private->CqHdbl[QueueId].Cqh;
if (Packet->NvmeCmd->Nsid != NamespaceId) {
return EFI_INVALID_PARAMETER;
@@ -584,7 +598,8 @@ NvmExpressPassThru (
Sq->Prp[0] = (UINT64)(UINTN)Packet->TransferBuffer;
if ((Packet->QueueType == NVME_ADMIN_QUEUE) &&
- ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD))) {
+ ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))
+ {
//
// Currently, we only use the IO Completion/Submission queues created internally
// by this driver during controller initialization. Any other IO queues created
@@ -601,7 +616,8 @@ NvmExpressPassThru (
// If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses.
//
if (((Packet->TransferLength != 0) && (Packet->TransferBuffer == NULL)) ||
- ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL))) {
+ ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL)))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -613,14 +629,14 @@ NvmExpressPassThru (
if ((Packet->TransferLength != 0) && (Packet->TransferBuffer != NULL)) {
MapLength = Packet->TransferLength;
- Status = PciIo->Map (
- PciIo,
- Flag,
- Packet->TransferBuffer,
- &MapLength,
- &PhyAddr,
- &MapData
- );
+ Status = PciIo->Map (
+ PciIo,
+ Flag,
+ Packet->TransferBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapData
+ );
if (EFI_ERROR (Status) || (Packet->TransferLength != MapLength)) {
return EFI_OUT_OF_RESOURCES;
}
@@ -629,16 +645,16 @@ NvmExpressPassThru (
Sq->Prp[1] = 0;
}
- if((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
+ if ((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
MapLength = Packet->MetadataLength;
- Status = PciIo->Map (
- PciIo,
- Flag,
- Packet->MetadataBuffer,
- &MapLength,
- &PhyAddr,
- &MapMeta
- );
+ Status = PciIo->Map (
+ PciIo,
+ Flag,
+ Packet->MetadataBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapMeta
+ );
if (EFI_ERROR (Status) || (Packet->MetadataLength != MapLength)) {
PciIo->Unmap (
PciIo,
@@ -647,9 +663,11 @@ NvmExpressPassThru (
return EFI_OUT_OF_RESOURCES;
}
+
Sq->Mptr = PhyAddr;
}
}
+
//
// If the buffer size spans more than two memory pages (page size as defined in CC.Mps),
// then build a PRP list in the second PRP submission queue entry.
@@ -662,7 +680,7 @@ NvmExpressPassThru (
// Create PrpList for remaining data buffer.
//
PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
- Prp = NvmeCreatePrpList (PciIo, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList);
+ Prp = NvmeCreatePrpList (PciIo, PhyAddr, EFI_SIZE_TO_PAGES (Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList);
if (Prp == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto EXIT;
@@ -673,28 +691,35 @@ NvmExpressPassThru (
Sq->Prp[1] = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
}
- if(Packet->NvmeCmd->Flags & CDW2_VALID) {
+ if (Packet->NvmeCmd->Flags & CDW2_VALID) {
Sq->Rsvd2 = (UINT64)Packet->NvmeCmd->Cdw2;
}
- if(Packet->NvmeCmd->Flags & CDW3_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW3_VALID) {
Sq->Rsvd2 |= LShiftU64 ((UINT64)Packet->NvmeCmd->Cdw3, 32);
}
- if(Packet->NvmeCmd->Flags & CDW10_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW10_VALID) {
Sq->Payload.Raw.Cdw10 = Packet->NvmeCmd->Cdw10;
}
- if(Packet->NvmeCmd->Flags & CDW11_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW11_VALID) {
Sq->Payload.Raw.Cdw11 = Packet->NvmeCmd->Cdw11;
}
- if(Packet->NvmeCmd->Flags & CDW12_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW12_VALID) {
Sq->Payload.Raw.Cdw12 = Packet->NvmeCmd->Cdw12;
}
- if(Packet->NvmeCmd->Flags & CDW13_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW13_VALID) {
Sq->Payload.Raw.Cdw13 = Packet->NvmeCmd->Cdw13;
}
- if(Packet->NvmeCmd->Flags & CDW14_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW14_VALID) {
Sq->Payload.Raw.Cdw14 = Packet->NvmeCmd->Cdw14;
}
- if(Packet->NvmeCmd->Flags & CDW15_VALID) {
+
+ if (Packet->NvmeCmd->Flags & CDW15_VALID) {
Sq->Payload.Raw.Cdw15 = Packet->NvmeCmd->Cdw15;
}
@@ -707,15 +732,16 @@ NvmExpressPassThru (
} else {
Private->SqTdbl[QueueId].Sqt ^= 1;
}
- Data = ReadUnaligned32 ((UINT32*)&Private->SqTdbl[QueueId]);
+
+ Data = ReadUnaligned32 ((UINT32 *)&Private->SqTdbl[QueueId]);
Status = PciIo->Mem.Write (
- PciIo,
- EfiPciIoWidthUint32,
- NVME_BAR,
- NVME_SQTDBL_OFFSET(QueueId, Private->Cap.Dstrd),
- 1,
- &Data
- );
+ PciIo,
+ EfiPciIoWidthUint32,
+ NVME_BAR,
+ NVME_SQTDBL_OFFSET (QueueId, Private->Cap.Dstrd),
+ 1,
+ &Data
+ );
if (EFI_ERROR (Status)) {
goto EXIT;
@@ -732,15 +758,15 @@ NvmExpressPassThru (
goto EXIT;
}
- AsyncRequest->Signature = NVME_PASS_THRU_ASYNC_REQ_SIG;
- AsyncRequest->Packet = Packet;
- AsyncRequest->CommandId = Sq->Cid;
- AsyncRequest->CallerEvent = Event;
- AsyncRequest->MapData = MapData;
- AsyncRequest->MapMeta = MapMeta;
- AsyncRequest->MapPrpList = MapPrpList;
- AsyncRequest->PrpListNo = PrpListNo;
- AsyncRequest->PrpListHost = PrpListHost;
+ AsyncRequest->Signature = NVME_PASS_THRU_ASYNC_REQ_SIG;
+ AsyncRequest->Packet = Packet;
+ AsyncRequest->CommandId = Sq->Cid;
+ AsyncRequest->CallerEvent = Event;
+ AsyncRequest->MapData = MapData;
+ AsyncRequest->MapMeta = MapMeta;
+ AsyncRequest->MapPrpList = MapPrpList;
+ AsyncRequest->PrpListNo = PrpListNo;
+ AsyncRequest->PrpListHost = PrpListHost;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Private->AsyncPassThruQueue, &AsyncRequest->Link);
@@ -760,9 +786,9 @@ NvmExpressPassThru (
goto EXIT;
}
- Status = gBS->SetTimer(TimerEvent, TimerRelative, Packet->CommandTimeout);
+ Status = gBS->SetTimer (TimerEvent, TimerRelative, Packet->CommandTimeout);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto EXIT;
}
@@ -788,14 +814,15 @@ NvmExpressPassThru (
//
// Dump every completion entry status for debugging.
//
- DEBUG_CODE_BEGIN();
- NvmeDumpStatus(Cq);
- DEBUG_CODE_END();
+ DEBUG_CODE_BEGIN ();
+ NvmeDumpStatus (Cq);
+ DEBUG_CODE_END ();
}
+
//
// Copy the Respose Queue entry for this command to the callers response buffer
//
- CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ CopyMem (Packet->NvmeCompletion, Cq, sizeof (EFI_NVM_EXPRESS_COMPLETION));
} else {
//
// Timeout occurs for an NVMe command. Reset the controller to abort the
@@ -840,16 +867,16 @@ NvmExpressPassThru (
Private->Pt[QueueId] ^= 1;
}
- Data = ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueId]);
+ Data = ReadUnaligned32 ((UINT32 *)&Private->CqHdbl[QueueId]);
PreviousStatus = Status;
- Status = PciIo->Mem.Write (
- PciIo,
- EfiPciIoWidthUint32,
- NVME_BAR,
- NVME_CQHDBL_OFFSET(QueueId, Private->Cap.Dstrd),
- 1,
- &Data
- );
+ Status = PciIo->Mem.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ NVME_BAR,
+ NVME_CQHDBL_OFFSET (QueueId, Private->Cap.Dstrd),
+ 1,
+ &Data
+ );
// The return status of PciIo->Mem.Write should not override
// previous status if previous status contains error.
Status = EFI_ERROR (PreviousStatus) ? PreviousStatus : Status;
@@ -892,6 +919,7 @@ EXIT:
if (TimerEvent != NULL) {
gBS->CloseEvent (TimerEvent);
}
+
return Status;
}
@@ -931,14 +959,14 @@ EXIT:
EFI_STATUS
EFIAPI
NvmExpressGetNextNamespace (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN OUT UINT32 *NamespaceId
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT32 *NamespaceId
)
{
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
- UINT32 NextNamespaceId;
- EFI_STATUS Status;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
+ UINT32 NextNamespaceId;
+ EFI_STATUS Status;
if ((This == NULL) || (NamespaceId == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -966,7 +994,7 @@ NvmExpressGetNextNamespace (
}
Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Done;
}
@@ -990,7 +1018,7 @@ NvmExpressGetNextNamespace (
}
Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Done;
}
@@ -999,7 +1027,7 @@ NvmExpressGetNextNamespace (
Done:
if (NamespaceData != NULL) {
- FreePool(NamespaceData);
+ FreePool (NamespaceData);
}
return Status;
@@ -1032,13 +1060,13 @@ Done:
EFI_STATUS
EFIAPI
NvmExpressGetNamespace (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT32 *NamespaceId
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT32 *NamespaceId
)
{
- NVME_NAMESPACE_DEVICE_PATH *Node;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
+ NVME_NAMESPACE_DEVICE_PATH *Node;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
if ((This == NULL) || (DevicePath == NULL) || (NamespaceId == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -1052,7 +1080,7 @@ NvmExpressGetNamespace (
Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
if (DevicePath->SubType == MSG_NVME_NAMESPACE_DP) {
- if (DevicePathNodeLength(DevicePath) != sizeof(NVME_NAMESPACE_DEVICE_PATH)) {
+ if (DevicePathNodeLength (DevicePath) != sizeof (NVME_NAMESPACE_DEVICE_PATH)) {
return EFI_NOT_FOUND;
}
@@ -1060,7 +1088,8 @@ NvmExpressGetNamespace (
// Check NamespaceId in the device path node is valid or not.
//
if ((Node->NamespaceId == 0) ||
- (Node->NamespaceId > Private->ControllerData->Nn)) {
+ (Node->NamespaceId > Private->ControllerData->Nn))
+ {
return EFI_NOT_FOUND;
}
@@ -1106,15 +1135,15 @@ NvmExpressGetNamespace (
EFI_STATUS
EFIAPI
NvmExpressBuildDevicePath (
- IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- NVME_NAMESPACE_DEVICE_PATH *Node;
- NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
- NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
+ NVME_NAMESPACE_DEVICE_PATH *Node;
+ NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
//
// Validate parameters
@@ -1130,7 +1159,8 @@ NvmExpressBuildDevicePath (
// Check NamespaceId is valid or not.
//
if ((NamespaceId == 0) ||
- (NamespaceId > Private->ControllerData->Nn)) {
+ (NamespaceId > Private->ControllerData->Nn))
+ {
return EFI_NOT_FOUND;
}
@@ -1142,14 +1172,14 @@ NvmExpressBuildDevicePath (
Node->Header.Type = MESSAGING_DEVICE_PATH;
Node->Header.SubType = MSG_NVME_NAMESPACE_DP;
SetDevicePathNodeLength (&Node->Header, sizeof (NVME_NAMESPACE_DEVICE_PATH));
- Node->NamespaceId = NamespaceId;
+ Node->NamespaceId = NamespaceId;
//
// Allocate a buffer for Identify Namespace data.
//
NamespaceData = NULL;
- NamespaceData = AllocateZeroPool(sizeof (NVME_ADMIN_NAMESPACE_DATA));
- if(NamespaceData == NULL) {
+ NamespaceData = AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
+ if (NamespaceData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
@@ -1163,7 +1193,7 @@ NvmExpressBuildDevicePath (
(VOID *)NamespaceData
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -1172,7 +1202,7 @@ NvmExpressBuildDevicePath (
*DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)Node;
Exit:
- if(NamespaceData != NULL) {
+ if (NamespaceData != NULL) {
FreePool (NamespaceData);
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c
index 6f9ff4b7dd..9b454a7dd8 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c
@@ -17,8 +17,8 @@ NVME_NAMESPACE_DEVICE_PATH mNvmeDevicePathNodeTemplate = {
MESSAGING_DEVICE_PATH,
MSG_NVME_NAMESPACE_DP,
{
- (UINT8) (sizeof (NVME_NAMESPACE_DEVICE_PATH)),
- (UINT8) ((sizeof (NVME_NAMESPACE_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (NVME_NAMESPACE_DEVICE_PATH)),
+ (UINT8)((sizeof (NVME_NAMESPACE_DEVICE_PATH)) >> 8)
}
},
0x0, // NamespaceId
@@ -32,8 +32,8 @@ EFI_DEVICE_PATH_PROTOCOL mNvmeEndDevicePathNodeTemplate = {
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
- (UINT8) (sizeof (EFI_DEVICE_PATH_PROTOCOL)),
- (UINT8) ((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
+ (UINT8)(sizeof (EFI_DEVICE_PATH_PROTOCOL)),
+ (UINT8)((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
}
};
@@ -78,7 +78,7 @@ NextDevicePathNode (
)
{
ASSERT (Node != NULL);
- return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength(Node));
+ return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength (Node));
}
/**
@@ -96,14 +96,14 @@ NextDevicePathNode (
**/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
)
{
- EFI_DEVICE_PATH_PROTOCOL *Walker;
+ EFI_DEVICE_PATH_PROTOCOL *Walker;
- if (DevicePath == NULL || InstanceSize == NULL || EntireDevicePathEnd == NULL) {
+ if ((DevicePath == NULL) || (InstanceSize == NULL) || (EntireDevicePathEnd == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -129,7 +129,7 @@ GetDevicePathInstanceSize (
//
// Compute the size of the device path instance
//
- *InstanceSize = ((UINTN) Walker - (UINTN) (DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ *InstanceSize = ((UINTN)Walker - (UINTN)(DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
return EFI_SUCCESS;
}
@@ -147,12 +147,12 @@ GetDevicePathInstanceSize (
**/
EFI_STATUS
NvmeIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
)
{
- EFI_DEVICE_PATH_PROTOCOL *Start;
- UINTN Size;
+ EFI_DEVICE_PATH_PROTOCOL *Start;
+ UINTN Size;
if (DevicePath == NULL) {
return EFI_INVALID_PARAMETER;
@@ -167,22 +167,24 @@ NvmeIsHcDevicePathValid (
Start = DevicePath;
while (!(DevicePath->Type == END_DEVICE_PATH_TYPE &&
- DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE)) {
+ DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE))
+ {
DevicePath = NextDevicePathNode (DevicePath);
//
// Prevent overflow and invalid zero in the 'Length' field of a device path
// node.
//
- if ((UINTN) DevicePath <= (UINTN) Start) {
+ if ((UINTN)DevicePath <= (UINTN)Start) {
return EFI_INVALID_PARAMETER;
}
//
// Prevent touching memory beyond given DevicePathLength.
//
- if ((UINTN) DevicePath - (UINTN) Start >
- DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)) {
+ if ((UINTN)DevicePath - (UINTN)Start >
+ DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL))
+ {
return EFI_INVALID_PARAMETER;
}
}
@@ -190,7 +192,7 @@ NvmeIsHcDevicePathValid (
//
// Check if the device path and its size match exactly with each other.
//
- Size = ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ Size = ((UINTN)DevicePath - (UINTN)Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
if (Size != DevicePathLength) {
return EFI_INVALID_PARAMETER;
}
@@ -217,17 +219,17 @@ NvmeIsHcDevicePathValid (
**/
EFI_STATUS
NvmeBuildDevicePath (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN UINT64 NamespaceUuid,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN UINT64 NamespaceUuid,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
- NVME_NAMESPACE_DEVICE_PATH *NvmeDeviceNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
+ NVME_NAMESPACE_DEVICE_PATH *NvmeDeviceNode;
- if (DevicePathLength == NULL || DevicePath == NULL) {
+ if ((DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -251,8 +253,8 @@ NvmeBuildDevicePath (
//
// Construct the Nvm Express device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
CopyMem (
DevicePathWalker,
&mNvmeDevicePathNodeTemplate,
@@ -265,8 +267,8 @@ NvmeBuildDevicePath (
//
// Construct the end device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- sizeof (NVME_NAMESPACE_DEVICE_PATH));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ sizeof (NVME_NAMESPACE_DEVICE_PATH));
CopyMem (
DevicePathWalker,
&mNvmeEndDevicePathNodeTemplate,
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c
index 7b049b9e4a..36bebc5bc1 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c
@@ -20,15 +20,15 @@ GetIoMmu (
VOID
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = NULL;
Status = PeiServicesLocatePpi (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
- (VOID **) &IoMmu
+ (VOID **)&IoMmu
);
if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
return IoMmu;
@@ -58,48 +58,50 @@ GetIoMmu (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ UINT64 Attribute;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
if (IoMmu != NULL) {
Status = IoMmu->Map (
- IoMmu,
- Operation,
- HostAddress,
- NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ IoMmu,
+ Operation,
+ HostAddress,
+ NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -110,9 +112,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -127,11 +130,11 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -141,6 +144,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -175,7 +179,7 @@ IoMmuAllocateBuffer (
EFI_PHYSICAL_ADDRESS HostPhyAddress;
EDKII_IOMMU_PPI *IoMmu;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
IoMmu = GetIoMmu ();
@@ -192,18 +196,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = IoMmu->Map (
- IoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -221,10 +226,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -242,13 +249,13 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -259,5 +266,6 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c
index a8cb7f3a67..f73053fc3f 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c
@@ -53,19 +53,19 @@ EFI_PEI_NOTIFY_DESCRIPTOR mNvmeEndOfPeiNotifyListTemplate = {
**/
EFI_STATUS
EnumerateNvmeDevNamespace (
- IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId
+ IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId
)
{
- EFI_STATUS Status;
- NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
- UINT32 DeviceIndex;
- UINT32 Lbads;
- UINT32 Flbas;
- UINT32 LbaFmtIdx;
-
- NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *) AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
+ EFI_STATUS Status;
+ NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 DeviceIndex;
+ UINT32 Lbads;
+ UINT32 Flbas;
+ UINT32 LbaFmtIdx;
+
+ NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
if (NamespaceData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -92,8 +92,8 @@ EnumerateNvmeDevNamespace (
goto Exit;
}
- DeviceIndex = Private->ActiveNamespaceNum;
- NamespaceInfo = &Private->NamespaceInfo[DeviceIndex];
+ DeviceIndex = Private->ActiveNamespaceNum;
+ NamespaceInfo = &Private->NamespaceInfo[DeviceIndex];
NamespaceInfo->NamespaceId = NamespaceId;
NamespaceInfo->NamespaceUuid = NamespaceData->Eui64;
NamespaceInfo->Controller = Private;
@@ -110,8 +110,8 @@ EnumerateNvmeDevNamespace (
NamespaceInfo->Media.RemovableMedia = FALSE;
NamespaceInfo->Media.MediaPresent = TRUE;
NamespaceInfo->Media.ReadOnly = FALSE;
- NamespaceInfo->Media.BlockSize = (UINT32) 1 << Lbads;
- NamespaceInfo->Media.LastBlock = (EFI_PEI_LBA) NamespaceData->Nsze - 1;
+ NamespaceInfo->Media.BlockSize = (UINT32)1 << Lbads;
+ NamespaceInfo->Media.LastBlock = (EFI_PEI_LBA)NamespaceData->Nsze - 1;
DEBUG ((
DEBUG_INFO,
"%a: Namespace ID %d - BlockSize = 0x%x, LastBlock = 0x%lx\n",
@@ -140,10 +140,10 @@ Exit:
**/
EFI_STATUS
NvmeDiscoverNamespaces (
- IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- UINT32 NamespaceId;
+ UINT32 NamespaceId;
Private->ActiveNamespaceNum = 0;
Private->NamespaceInfo = AllocateZeroPool (Private->ControllerData->Nn * sizeof (PEI_NVME_NAMESPACE_INFO));
@@ -161,6 +161,7 @@ NvmeDiscoverNamespaces (
//
EnumerateNvmeDevNamespace (Private, NamespaceId);
}
+
if (Private->ActiveNamespaceNum == 0) {
return EFI_NOT_FOUND;
}
@@ -187,7 +188,7 @@ NvmePeimEndOfPei (
IN VOID *Ppi
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
NvmeFreeDmaResource (Private);
@@ -207,19 +208,19 @@ NvmePeimEndOfPei (
EFI_STATUS
EFIAPI
NvmExpressPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- EFI_BOOT_MODE BootMode;
- EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *NvmeHcPpi;
- UINT8 Controller;
- UINTN MmioBase;
- UINTN DevicePathLength;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PHYSICAL_ADDRESS DeviceAddress;
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *NvmeHcPpi;
+ UINT8 Controller;
+ UINTN MmioBase;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PHYSICAL_ADDRESS DeviceAddress;
DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));
@@ -239,7 +240,7 @@ NvmExpressPeimEntry (
&gEdkiiPeiNvmExpressHostControllerPpiGuid,
0,
NULL,
- (VOID **) &NvmeHcPpi
+ (VOID **)&NvmeHcPpi
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fail to locate NvmeHostControllerPpi.\n", __FUNCTION__));
@@ -269,8 +270,10 @@ NvmExpressPeimEntry (
);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate get the device path for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate get the device path for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return Status;
}
@@ -281,8 +284,10 @@ NvmExpressPeimEntry (
Status = NvmeIsHcDevicePathValid (DevicePath, DevicePathLength);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: The device path is invalid for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: The device path is invalid for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
continue;
@@ -295,10 +300,13 @@ NvmExpressPeimEntry (
// during S3 resume.
//
if ((BootMode == BOOT_ON_S3_RESUME) &&
- (NvmeS3SkipThisController (DevicePath, DevicePathLength))) {
+ (NvmeS3SkipThisController (DevicePath, DevicePathLength)))
+ {
DEBUG ((
- DEBUG_ERROR, "%a: Controller %d is skipped during S3.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Controller %d is skipped during S3.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
continue;
@@ -310,8 +318,10 @@ NvmExpressPeimEntry (
Private = AllocateZeroPool (sizeof (PEI_NVME_CONTROLLER_PRIVATE_DATA));
if (Private == NULL) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate private data for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate private data for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return EFI_OUT_OF_RESOURCES;
}
@@ -327,12 +337,15 @@ NvmExpressPeimEntry (
);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate DMA buffers for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate DMA buffers for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return Status;
}
- ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) Private->Buffer));
+
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Private->Buffer));
DEBUG ((DEBUG_INFO, "%a: DMA buffer base at 0x%x\n", __FUNCTION__, Private->Buffer));
//
@@ -351,7 +364,9 @@ NvmExpressPeimEntry (
DEBUG ((
DEBUG_ERROR,
"%a: Controller initialization fail for Controller %d with Status - %r.\n",
- __FUNCTION__, Controller, Status
+ __FUNCTION__,
+ Controller,
+ Status
));
NvmeFreeDmaResource (Private);
Controller++;
@@ -369,7 +384,9 @@ NvmExpressPeimEntry (
DEBUG ((
DEBUG_ERROR,
"%a: Namespaces discovery fail for Controller %d with Status - %r.\n",
- __FUNCTION__, Controller, Status
+ __FUNCTION__,
+ Controller,
+ Status
));
NvmeFreeDmaResource (Private);
Controller++;
@@ -379,35 +396,35 @@ NvmExpressPeimEntry (
//
// Nvm Express Pass Thru PPI
//
- Private->PassThruMode.Attributes = EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
- EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |
- EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVM;
- Private->PassThruMode.IoAlign = sizeof (UINTN);
- Private->PassThruMode.NvmeVersion = EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION;
- Private->NvmePassThruPpi.Mode = &Private->PassThruMode;
- Private->NvmePassThruPpi.GetDevicePath = NvmePassThruGetDevicePath;
- Private->NvmePassThruPpi.GetNextNameSpace = NvmePassThruGetNextNameSpace;
- Private->NvmePassThruPpi.PassThru = NvmePassThru;
+ Private->PassThruMode.Attributes = EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
+ EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |
+ EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVM;
+ Private->PassThruMode.IoAlign = sizeof (UINTN);
+ Private->PassThruMode.NvmeVersion = EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION;
+ Private->NvmePassThruPpi.Mode = &Private->PassThruMode;
+ Private->NvmePassThruPpi.GetDevicePath = NvmePassThruGetDevicePath;
+ Private->NvmePassThruPpi.GetNextNameSpace = NvmePassThruGetNextNameSpace;
+ Private->NvmePassThruPpi.PassThru = NvmePassThru;
CopyMem (
&Private->NvmePassThruPpiList,
&mNvmePassThruPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->NvmePassThruPpiList.Ppi = &Private->NvmePassThruPpi;
+ Private->NvmePassThruPpiList.Ppi = &Private->NvmePassThruPpi;
PeiServicesInstallPpi (&Private->NvmePassThruPpiList);
//
// Block Io PPI
//
- Private->BlkIoPpi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo;
- Private->BlkIoPpi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo;
- Private->BlkIoPpi.ReadBlocks = NvmeBlockIoPeimReadBlocks;
+ Private->BlkIoPpi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo;
+ Private->BlkIoPpi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo;
+ Private->BlkIoPpi.ReadBlocks = NvmeBlockIoPeimReadBlocks;
CopyMem (
&Private->BlkIoPpiList,
&mNvmeBlkIoPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
+ Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
Private->BlkIo2Ppi.Revision = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;
Private->BlkIo2Ppi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo2;
@@ -418,7 +435,7 @@ NvmExpressPeimEntry (
&mNvmeBlkIo2PpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
+ Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
PeiServicesInstallPpi (&Private->BlkIoPpiList);
//
@@ -428,7 +445,8 @@ NvmExpressPeimEntry (
DEBUG ((
DEBUG_INFO,
"%a: Security Security Command PPI will be produced for Controller %d.\n",
- __FUNCTION__, Controller
+ __FUNCTION__,
+ Controller
));
Private->StorageSecurityPpi.Revision = EDKII_STORAGE_SECURITY_PPI_REVISION;
Private->StorageSecurityPpi.GetNumberofDevices = NvmeStorageSecurityGetDeviceNo;
@@ -440,7 +458,7 @@ NvmExpressPeimEntry (
&mNvmeStorageSecurityPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
+ Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
PeiServicesInstallPpi (&Private->StorageSecurityPpiList);
}
@@ -449,11 +467,13 @@ NvmExpressPeimEntry (
&mNvmeEndOfPeiNotifyListTemplate,
sizeof (EFI_PEI_NOTIFY_DESCRIPTOR)
);
- PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
+ PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
DEBUG ((
- DEBUG_INFO, "%a: Controller %d has been successfully initialized.\n",
- __FUNCTION__, Controller
+ DEBUG_INFO,
+ "%a: Controller %d has been successfully initialized.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
index 8cd905191b..78a6b70165 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
@@ -44,68 +44,68 @@ typedef struct _PEI_NVME_CONTROLLER_PRIVATE_DATA PEI_NVME_CONTROLLER_PRIVATE_DA
//
// NVME PEI driver implementation related definitions
//
-#define NVME_MAX_QUEUES 2 // Number of I/O queues supported by the driver, 1 for AQ, 1 for CQ
-#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
-#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
-#define NVME_CSQ_SIZE 63 // Number of I/O submission queue entries, which is 0-based
-#define NVME_CCQ_SIZE 63 // Number of I/O completion queue entries, which is 0-based
-#define NVME_PRP_SIZE (8) // Pages of PRP list
+#define NVME_MAX_QUEUES 2 // Number of I/O queues supported by the driver, 1 for AQ, 1 for CQ
+#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
+#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
+#define NVME_CSQ_SIZE 63 // Number of I/O submission queue entries, which is 0-based
+#define NVME_CCQ_SIZE 63 // Number of I/O completion queue entries, which is 0-based
+#define NVME_PRP_SIZE (8) // Pages of PRP list
#define NVME_MEM_MAX_PAGES \
( \
- 1 /* ASQ */ + \
- 1 /* ACQ */ + \
- 1 /* SQs */ + \
- 1 /* CQs */ + \
+ 1 /* ASQ */ + \
+ 1 /* ACQ */ + \
+ 1 /* SQs */ + \
+ 1 /* CQs */ + \
NVME_PRP_SIZE) /* PRPs */
-#define NVME_ADMIN_QUEUE 0x00
-#define NVME_IO_QUEUE 0x01
-#define NVME_GENERIC_TIMEOUT 5000000 // Generic PassThru command timeout value, in us unit
-#define NVME_POLL_INTERVAL 100 // Poll interval for PassThru command, in us unit
+#define NVME_ADMIN_QUEUE 0x00
+#define NVME_IO_QUEUE 0x01
+#define NVME_GENERIC_TIMEOUT 5000000 // Generic PassThru command timeout value, in us unit
+#define NVME_POLL_INTERVAL 100 // Poll interval for PassThru command, in us unit
//
// Nvme namespace data structure.
//
struct _PEI_NVME_NAMESPACE_INFO {
- UINT32 NamespaceId;
- UINT64 NamespaceUuid;
- EFI_PEI_BLOCK_IO2_MEDIA Media;
+ UINT32 NamespaceId;
+ UINT64 NamespaceUuid;
+ EFI_PEI_BLOCK_IO2_MEDIA Media;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Controller;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Controller;
};
-#define NVME_CONTROLLER_NSID 0
+#define NVME_CONTROLLER_NSID 0
//
// Unique signature for private data structure.
//
-#define NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','P','C')
+#define NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','P','C')
//
// Nvme controller private data structure.
//
struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
- UINT32 Signature;
- UINTN MmioBase;
- EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
- UINTN DevicePathLength;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
-
- EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
- EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
- EDKII_PEI_STORAGE_SECURITY_CMD_PPI StorageSecurityPpi;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI NvmePassThruPpi;
- EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
- EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
- EFI_PEI_PPI_DESCRIPTOR StorageSecurityPpiList;
- EFI_PEI_PPI_DESCRIPTOR NvmePassThruPpiList;
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ UINT32 Signature;
+ UINTN MmioBase;
+ EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
+ EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
+ EDKII_PEI_STORAGE_SECURITY_CMD_PPI StorageSecurityPpi;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI NvmePassThruPpi;
+ EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
+ EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
+ EFI_PEI_PPI_DESCRIPTOR StorageSecurityPpiList;
+ EFI_PEI_PPI_DESCRIPTOR NvmePassThruPpiList;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
//
// Pointer to identify controller data
//
- NVME_ADMIN_CONTROLLER_DATA *ControllerData;
+ NVME_ADMIN_CONTROLLER_DATA *ControllerData;
//
// (4 + NVME_PRP_SIZE) x 4kB aligned buffers will be carved out of this buffer
@@ -115,34 +115,34 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
// 4th 4kB boundary is the start of I/O completion queue
// 5th 4kB boundary is the start of PRP list buffers
//
- VOID *Buffer;
- VOID *BufferMapping;
+ VOID *Buffer;
+ VOID *BufferMapping;
//
// Pointers to 4kB aligned submission & completion queues
//
- NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
- NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
+ NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
+ NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
//
// Submission and completion queue indices
//
- NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
- NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
+ NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
+ NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
- UINT8 Pt[NVME_MAX_QUEUES];
- UINT16 Cid[NVME_MAX_QUEUES];
+ UINT8 Pt[NVME_MAX_QUEUES];
+ UINT16 Cid[NVME_MAX_QUEUES];
//
// Nvme controller capabilities
//
- NVME_CAP Cap;
+ NVME_CAP Cap;
//
// Namespaces information on the controller
//
- UINT32 ActiveNamespaceNum;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 ActiveNamespaceNum;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
};
#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a) \
@@ -156,7 +156,6 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) \
CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, EndOfPeiNotifyList, NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
-
//
// Internal functions
//
@@ -201,9 +200,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
@@ -227,11 +226,11 @@ IoMmuFreeBuffer (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -245,7 +244,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -282,9 +281,9 @@ NvmePeimEndOfPei (
**/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
);
/**
@@ -300,8 +299,8 @@ GetDevicePathInstanceSize (
**/
EFI_STATUS
NvmeIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
);
/**
@@ -323,11 +322,11 @@ NvmeIsHcDevicePathValid (
**/
EFI_STATUS
NvmeBuildDevicePath (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN UINT64 NamespaceUuid,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN UINT64 NamespaceUuid,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -342,8 +341,8 @@ NvmeBuildDevicePath (
**/
BOOLEAN
NvmeS3SkipThisController (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c
index a9bf4f8190..576481dcee 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c
@@ -24,29 +24,29 @@
**/
EFI_STATUS
ReadSectors (
- IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
- OUT UINTN Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks
+ IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
+ OUT UINTN Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 Bytes;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
-
- Private = NamespaceInfo->Controller;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 Bytes;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
+
+ Private = NamespaceInfo->Controller;
NvmePassThru = &Private->NvmePassThruPpi;
- BlockSize = NamespaceInfo->Media.BlockSize;
- Bytes = Blocks * BlockSize;
+ BlockSize = NamespaceInfo->Media.BlockSize;
+ Bytes = Blocks * BlockSize;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -60,7 +60,7 @@ ReadSectors (
CommandPacket.QueueType = NVME_IO_QUEUE;
CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
CommandPacket.NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
CommandPacket.NvmeCmd->Flags = CDW10_VALID | CDW11_VALID | CDW12_VALID;
@@ -88,18 +88,18 @@ ReadSectors (
**/
EFI_STATUS
NvmeRead (
- IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
- OUT UINTN Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks
+ IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
+ OUT UINTN Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks
)
{
- EFI_STATUS Status;
- UINT32 Retries;
- UINT32 BlockSize;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
+ EFI_STATUS Status;
+ UINT32 Retries;
+ UINT32 BlockSize;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
Status = EFI_SUCCESS;
Retries = 0;
@@ -120,14 +120,15 @@ NvmeRead (
Lba,
Blocks > MaxTransferBlocks ? MaxTransferBlocks : (UINT32)Blocks
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
Retries++;
MaxTransferBlocks = MaxTransferBlocks >> 1;
- if (Retries > NVME_READ_MAX_RETRY || MaxTransferBlocks < 1) {
+ if ((Retries > NVME_READ_MAX_RETRY) || (MaxTransferBlocks < 1)) {
DEBUG ((DEBUG_ERROR, "%a: ReadSectors fail, Status - %r\n", __FUNCTION__, Status));
break;
}
+
DEBUG ((
DEBUG_BLKIO,
"%a: ReadSectors fail, retry with smaller transfer block number - 0x%x\n",
@@ -142,13 +143,21 @@ NvmeRead (
Buffer += (MaxTransferBlocks * BlockSize);
Lba += MaxTransferBlocks;
} else {
- Blocks = 0;
+ Blocks = 0;
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -176,13 +185,13 @@ NvmeBlockIoPeimGetDeviceNo (
OUT UINTN *NumberBlockDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
*NumberBlockDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -238,9 +247,9 @@ NvmeBlockIoPeimGetMediaInfo (
OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -250,7 +259,7 @@ NvmeBlockIoPeimGetMediaInfo (
return EFI_INVALID_PARAMETER;
}
- MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE) EDKII_PEI_BLOCK_DEVICE_TYPE_NVME;
+ MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE)EDKII_PEI_BLOCK_DEVICE_TYPE_NVME;
MediaInfo->MediaPresent = TRUE;
MediaInfo->LastBlock = (UINTN)Private->NamespaceInfo[DeviceIndex-1].Media.LastBlock;
MediaInfo->BlockSize = Private->NamespaceInfo[DeviceIndex-1].Media.BlockSize;
@@ -303,17 +312,17 @@ NvmeBlockIoPeimReadBlocks (
OUT VOID *Buffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
- UINT32 BlockSize;
- UINTN NumberOfBlocks;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 BlockSize;
+ UINTN NumberOfBlocks;
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
//
// Check parameters
//
- if (This == NULL || Buffer == NULL) {
+ if ((This == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -329,7 +338,7 @@ NvmeBlockIoPeimReadBlocks (
// Check BufferSize and StartLBA
//
NamespaceInfo = &(Private->NamespaceInfo[DeviceIndex - 1]);
- BlockSize = NamespaceInfo->Media.BlockSize;
+ BlockSize = NamespaceInfo->Media.BlockSize;
if (BufferSize % BlockSize != 0) {
return EFI_BAD_BUFFER_SIZE;
}
@@ -337,6 +346,7 @@ NvmeBlockIoPeimReadBlocks (
if (StartLBA > NamespaceInfo->Media.LastBlock) {
return EFI_INVALID_PARAMETER;
}
+
NumberOfBlocks = BufferSize / BlockSize;
if (NumberOfBlocks - 1 > NamespaceInfo->Media.LastBlock - StartLBA) {
return EFI_INVALID_PARAMETER;
@@ -369,13 +379,13 @@ NvmeBlockIoPeimGetDeviceNo2 (
OUT UINTN *NumberBlockDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
*NumberBlockDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -431,22 +441,22 @@ NvmeBlockIoPeimGetMediaInfo2 (
OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
+ EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
- Status = NvmeBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ Status = NvmeBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -505,7 +515,7 @@ NvmeBlockIoPeimReadBlocks2 (
OUT VOID *Buffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h
index 2c7065cb79..9c0a1eadf8 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h
@@ -14,9 +14,9 @@
//
// Nvme device for EFI_PEI_BLOCK_DEVICE_TYPE
//
-#define EDKII_PEI_BLOCK_DEVICE_TYPE_NVME 7
+#define EDKII_PEI_BLOCK_DEVICE_TYPE_NVME 7
-#define NVME_READ_MAX_RETRY 3
+#define NVME_READ_MAX_RETRY 3
/**
Gets the count of block I/O devices that one specific block driver detects.
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c
index 1d7e3d26e0..ac956bdce4 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c
@@ -22,14 +22,14 @@
**/
EFI_STATUS
NvmeMmioRead (
- IN OUT VOID *MemBuffer,
- IN UINTN MmioAddr,
- IN UINTN Size
+ IN OUT VOID *MemBuffer,
+ IN UINTN MmioAddr,
+ IN UINTN Size
)
{
- UINTN Offset;
- UINT8 Data;
- UINT8 *Ptr;
+ UINTN Offset;
+ UINT8 Data;
+ UINT8 *Ptr;
// priority has adjusted
switch (Size) {
@@ -52,9 +52,10 @@ NvmeMmioRead (
default:
Ptr = (UINT8 *)MemBuffer;
for (Offset = 0; Offset < Size; Offset += 1) {
- Data = MmioRead8 (MmioAddr + Offset);
+ Data = MmioRead8 (MmioAddr + Offset);
Ptr[Offset] = Data;
}
+
break;
}
@@ -73,14 +74,14 @@ NvmeMmioRead (
**/
EFI_STATUS
NvmeMmioWrite (
- IN OUT UINTN MmioAddr,
- IN VOID *MemBuffer,
- IN UINTN Size
+ IN OUT UINTN MmioAddr,
+ IN VOID *MemBuffer,
+ IN UINTN Size
)
{
- UINTN Offset;
- UINT8 Data;
- UINT8 *Ptr;
+ UINTN Offset;
+ UINT8 Data;
+ UINT8 *Ptr;
// priority has adjusted
switch (Size) {
@@ -106,6 +107,7 @@ NvmeMmioWrite (
Data = Ptr[Offset];
MmioWrite8 (MmioAddr + Offset, Data);
}
+
break;
}
@@ -122,18 +124,18 @@ NvmeMmioWrite (
**/
UINT32
NvmeBaseMemPageOffset (
- IN UINTN BaseMemIndex
+ IN UINTN BaseMemIndex
)
{
- UINT32 Pages;
- UINTN Index;
- UINT32 PageSizeList[5];
+ UINT32 Pages;
+ UINTN Index;
+ UINT32 PageSizeList[5];
- PageSizeList[0] = 1; /* ASQ */
- PageSizeList[1] = 1; /* ACQ */
- PageSizeList[2] = 1; /* SQs */
- PageSizeList[3] = 1; /* CQs */
- PageSizeList[4] = NVME_PRP_SIZE; /* PRPs */
+ PageSizeList[0] = 1; /* ASQ */
+ PageSizeList[1] = 1; /* ACQ */
+ PageSizeList[2] = 1; /* SQs */
+ PageSizeList[3] = 1; /* CQs */
+ PageSizeList[4] = NVME_PRP_SIZE; /* PRPs */
if (BaseMemIndex > MAX_BASEMEM_COUNT) {
DEBUG ((DEBUG_ERROR, "%a: The input BaseMem index is invalid.\n", __FUNCTION__));
@@ -161,14 +163,14 @@ NvmeBaseMemPageOffset (
**/
EFI_STATUS
NvmeWaitController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN BOOLEAN WaitReady
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN BOOLEAN WaitReady
)
{
- NVME_CSTS Csts;
- EFI_STATUS Status;
- UINT32 Index;
- UINT8 Timeout;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
+ UINT32 Index;
+ UINT8 Timeout;
//
// Cap.To specifies max delay time in 500ms increments for Csts.Rdy to set after
@@ -181,19 +183,19 @@ NvmeWaitController (
}
Status = EFI_SUCCESS;
- for(Index = (Timeout * 500); Index != 0; --Index) {
+ for (Index = (Timeout * 500); Index != 0; --Index) {
MicroSecondDelay (1000);
//
// Check if the controller is initialized
//
Status = NVME_GET_CSTS (Private, &Csts);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: NVME_GET_CSTS fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
- if ((BOOLEAN) Csts.Rdy == WaitReady) {
+ if ((BOOLEAN)Csts.Rdy == WaitReady) {
break;
}
}
@@ -216,12 +218,12 @@ NvmeWaitController (
**/
EFI_STATUS
NvmeDisableController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- NVME_CSTS Csts;
- EFI_STATUS Status;
+ NVME_CC Cc;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
Status = NVME_GET_CSTS (Private, &Csts);
@@ -271,11 +273,11 @@ ErrorExit:
**/
EFI_STATUS
NvmeEnableController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- EFI_STATUS Status;
+ NVME_CC Cc;
+ EFI_STATUS Status;
//
// Enable the controller
@@ -316,25 +318,25 @@ ErrorExit:
**/
EFI_STATUS
NvmeIdentifyController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
//
// According to Nvm Express 1.1 spec Figure 38, When not used, the field shall be cleared to 0h.
// For the Identify command, the Namespace Identifier is only used for the Namespace Data structure.
//
- Command.Nsid = 0;
+ Command.Nsid = 0;
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -369,19 +371,19 @@ NvmeIdentifyController (
**/
EFI_STATUS
NvmeIdentifyNamespace (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
Command.Nsid = NamespaceId;
@@ -414,11 +416,11 @@ NvmeIdentifyNamespace (
**/
VOID
NvmeDumpControllerData (
- IN NVME_ADMIN_CONTROLLER_DATA *ControllerData
+ IN NVME_ADMIN_CONTROLLER_DATA *ControllerData
)
{
- UINT8 Sn[21];
- UINT8 Mn[41];
+ UINT8 Sn[21];
+ UINT8 Mn[41];
CopyMem (Sn, ControllerData->Sn, sizeof (ControllerData->Sn));
Sn[20] = 0;
@@ -428,11 +430,11 @@ NvmeDumpControllerData (
DEBUG ((DEBUG_INFO, " == NVME IDENTIFY CONTROLLER DATA ==\n"));
DEBUG ((DEBUG_INFO, " PCI VID : 0x%x\n", ControllerData->Vid));
DEBUG ((DEBUG_INFO, " PCI SSVID : 0x%x\n", ControllerData->Ssvid));
- DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
- DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
- DEBUG ((DEBUG_INFO, " FR : 0x%lx\n", *((UINT64*)ControllerData->Fr)));
+ DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
+ DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
+ DEBUG ((DEBUG_INFO, " FR : 0x%lx\n", *((UINT64 *)ControllerData->Fr)));
DEBUG ((DEBUG_INFO, " RAB : 0x%x\n", ControllerData->Rab));
- DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32*)ControllerData->Ieee_oui));
+ DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32 *)ControllerData->Ieee_oui));
DEBUG ((DEBUG_INFO, " AERL : 0x%x\n", ControllerData->Aerl));
DEBUG ((DEBUG_INFO, " SQES : 0x%x\n", ControllerData->Sqes));
DEBUG ((DEBUG_INFO, " CQES : 0x%x\n", ControllerData->Cqes));
@@ -451,24 +453,24 @@ NvmeDumpControllerData (
**/
EFI_STATUS
NvmeCreateIoCompletionQueue (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOCQ CrIoCq;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOCQ CrIoCq;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoCq, sizeof(NVME_ADMIN_CRIOCQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoCq, sizeof (NVME_ADMIN_CRIOCQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
CommandPacket.TransferBuffer = Private->CqBuffer[NVME_IO_QUEUE];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -499,24 +501,24 @@ NvmeCreateIoCompletionQueue (
**/
EFI_STATUS
NvmeCreateIoSubmissionQueue (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOSQ CrIoSq;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOSQ CrIoSq;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoSq, sizeof(NVME_ADMIN_CRIOSQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoSq, sizeof (NVME_ADMIN_CRIOSQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
CommandPacket.TransferBuffer = Private->SqBuffer[NVME_IO_QUEUE];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -549,15 +551,15 @@ NvmeCreateIoSubmissionQueue (
**/
EFI_STATUS
NvmeControllerInit (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN Index;
- NVME_AQA Aqa;
- NVME_ASQ Asq;
- NVME_ACQ Acq;
- NVME_VER Ver;
+ EFI_STATUS Status;
+ UINTN Index;
+ NVME_AQA Aqa;
+ NVME_ASQ Asq;
+ NVME_ACQ Acq;
+ NVME_VER Ver;
//
// Dump the NVME controller implementation version
@@ -589,6 +591,7 @@ NvmeControllerInit (
ZeroMem ((VOID *)(UINTN)(&Private->SqTdbl[Index]), sizeof (NVME_SQTDBL));
ZeroMem ((VOID *)(UINTN)(&Private->CqHdbl[Index]), sizeof (NVME_CQHDBL));
}
+
ZeroMem (Private->Buffer, EFI_PAGE_SIZE * NVME_MEM_MAX_PAGES);
//
@@ -657,11 +660,13 @@ NvmeControllerInit (
return EFI_OUT_OF_RESOURCES;
}
}
+
Status = NvmeIdentifyController (Private, Private->ControllerData);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: NvmeIdentifyController fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
+
NvmeDumpControllerData (Private->ControllerData);
//
@@ -684,6 +689,7 @@ NvmeControllerInit (
DEBUG ((DEBUG_ERROR, "%a: Create IO completion queue fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
+
Status = NvmeCreateIoSubmissionQueue (Private);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Create IO submission queue fail, Status - %r\n", __FUNCTION__, Status));
@@ -700,17 +706,17 @@ NvmeControllerInit (
**/
VOID
NvmeFreeDmaResource (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
ASSERT (Private != NULL);
if (Private->BufferMapping != NULL) {
IoMmuFreeBuffer (
- NVME_MEM_MAX_PAGES,
- Private->Buffer,
- Private->BufferMapping
- );
+ NVME_MEM_MAX_PAGES,
+ Private->Buffer,
+ Private->BufferMapping
+ );
}
return;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h
index 89fee735fe..a6bec510f0 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h
@@ -43,14 +43,13 @@ enum {
//
// All of base memories are 4K(0x1000) alignment
//
-#define ALIGN(v, a) (UINTN)((((v) - 1) | ((a) - 1)) + 1)
-#define NVME_MEM_BASE(Private) ((UINTN)(Private->Buffer))
-#define NVME_ASQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ASQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_ACQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ACQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_SQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_SQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_CQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_CQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_PRP_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_PRP)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-
+#define ALIGN(v, a) (UINTN)((((v) - 1) | ((a) - 1)) + 1)
+#define NVME_MEM_BASE(Private) ((UINTN)(Private->Buffer))
+#define NVME_ASQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ASQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_ACQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ACQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_SQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_SQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_CQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_CQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_PRP_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_PRP)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
/**
Transfer MMIO Data to memory.
@@ -64,9 +63,9 @@ enum {
**/
EFI_STATUS
NvmeMmioRead (
- IN OUT VOID *MemBuffer,
- IN UINTN MmioAddr,
- IN UINTN Size
+ IN OUT VOID *MemBuffer,
+ IN UINTN MmioAddr,
+ IN UINTN Size
);
/**
@@ -81,9 +80,9 @@ NvmeMmioRead (
**/
EFI_STATUS
NvmeMmioWrite (
- IN OUT UINTN MmioAddr,
- IN VOID *MemBuffer,
- IN UINTN Size
+ IN OUT UINTN MmioAddr,
+ IN VOID *MemBuffer,
+ IN UINTN Size
);
/**
@@ -96,7 +95,7 @@ NvmeMmioWrite (
**/
UINT32
NvmeBaseMemPageOffset (
- IN UINTN BaseMemIndex
+ IN UINTN BaseMemIndex
);
/**
@@ -110,7 +109,7 @@ NvmeBaseMemPageOffset (
**/
EFI_STATUS
NvmeControllerInit (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
);
/**
@@ -126,9 +125,9 @@ NvmeControllerInit (
**/
EFI_STATUS
NvmeIdentifyNamespace (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
);
/**
@@ -139,7 +138,7 @@ NvmeIdentifyNamespace (
**/
VOID
NvmeFreeDmaResource (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c
index 370a54e5a2..dc280ec4e3 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c
@@ -22,22 +22,22 @@
**/
UINT64
NvmeCreatePrpList (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
- IN UINTN Pages
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
+ IN UINTN Pages
)
{
- UINTN PrpEntryNo;
- UINTN PrpListNo;
- UINT64 PrpListBase;
- VOID *PrpListHost;
- UINTN PrpListIndex;
- UINTN PrpEntryIndex;
- UINT64 Remainder;
- EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
- UINTN Bytes;
- UINT8 *PrpEntry;
- EFI_PHYSICAL_ADDRESS NewPhyAddr;
+ UINTN PrpEntryNo;
+ UINTN PrpListNo;
+ UINT64 PrpListBase;
+ VOID *PrpListHost;
+ UINTN PrpListIndex;
+ UINTN PrpEntryIndex;
+ UINT64 Remainder;
+ EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
+ UINTN Bytes;
+ UINT8 *PrpEntry;
+ EFI_PHYSICAL_ADDRESS NewPhyAddr;
//
// The number of Prp Entry in a memory page.
@@ -47,7 +47,7 @@ NvmeCreatePrpList (
//
// Calculate total PrpList number.
//
- PrpListNo = (UINTN) DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo, &Remainder);
+ PrpListNo = (UINTN)DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo, &Remainder);
if (Remainder != 0) {
PrpListNo += 1;
}
@@ -62,9 +62,10 @@ NvmeCreatePrpList (
));
return 0;
}
- PrpListHost = (VOID *)(UINTN) NVME_PRP_BASE (Private);
- Bytes = EFI_PAGES_TO_SIZE (PrpListNo);
+ PrpListHost = (VOID *)(UINTN)NVME_PRP_BASE (Private);
+
+ Bytes = EFI_PAGES_TO_SIZE (PrpListNo);
PrpListPhyAddr = (UINT64)(UINTN)(PrpListHost);
//
@@ -75,19 +76,19 @@ NvmeCreatePrpList (
PrpListBase = (UINTN)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < PrpEntryNo; ++PrpEntryIndex) {
- PrpEntry = (UINT8 *)(UINTN) (PrpListBase + PrpEntryIndex * sizeof(UINT64));
+ PrpEntry = (UINT8 *)(UINTN)(PrpListBase + PrpEntryIndex * sizeof (UINT64));
if (PrpEntryIndex != PrpEntryNo - 1) {
//
// Fill all PRP entries except of last one.
//
- CopyMem (PrpEntry, (VOID *)(UINTN) (&PhysicalAddr), sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&PhysicalAddr), sizeof (UINT64));
PhysicalAddr += EFI_PAGE_SIZE;
} else {
//
// Fill last PRP entries with next PRP List pointer.
//
NewPhyAddr = (PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE);
- CopyMem (PrpEntry, (VOID *)(UINTN) (&NewPhyAddr), sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&NewPhyAddr), sizeof (UINT64));
}
}
}
@@ -97,8 +98,8 @@ NvmeCreatePrpList (
//
PrpListBase = (UINTN)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < ((Remainder != 0) ? Remainder : PrpEntryNo); ++PrpEntryIndex) {
- PrpEntry = (UINT8 *)(UINTN) (PrpListBase + PrpEntryIndex * sizeof(UINT64));
- CopyMem (PrpEntry, (VOID *)(UINTN) (&PhysicalAddr), sizeof (UINT64));
+ PrpEntry = (UINT8 *)(UINTN)(PrpListBase + PrpEntryIndex * sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&PhysicalAddr), sizeof (UINT64));
PhysicalAddr += EFI_PAGE_SIZE;
}
@@ -114,10 +115,10 @@ NvmeCreatePrpList (
**/
EFI_STATUS
NvmeCheckCqStatus (
- IN NVME_CQ *Cq
+ IN NVME_CQ *Cq
)
{
- if (Cq->Sct == 0x0 && Cq->Sc == 0x0) {
+ if ((Cq->Sct == 0x0) && (Cq->Sc == 0x0)) {
return EFI_SUCCESS;
}
@@ -202,6 +203,7 @@ NvmeCheckCqStatus (
DEBUG ((DEBUG_INFO, "Reservation Conflict\n"));
break;
}
+
break;
case 0x1:
@@ -264,6 +266,7 @@ NvmeCheckCqStatus (
DEBUG ((DEBUG_INFO, "Attempted Write to Read Only Range\n"));
break;
}
+
break;
case 0x2:
@@ -290,6 +293,7 @@ NvmeCheckCqStatus (
DEBUG ((DEBUG_INFO, "Access Denied\n"));
break;
}
+
break;
default:
@@ -333,26 +337,26 @@ NvmeCheckCqStatus (
**/
EFI_STATUS
NvmePassThruExecute (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
- NVME_SQ *Sq;
- NVME_CQ *Cq;
- UINT8 QueueId;
- UINTN SqSize;
- UINTN CqSize;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *MapData;
- VOID *MapMeta;
- UINT32 Bytes;
- UINT32 Offset;
- UINT32 Data32;
- UINT64 Timer;
+ EFI_STATUS Status;
+ NVME_SQ *Sq;
+ NVME_CQ *Cq;
+ UINT8 QueueId;
+ UINTN SqSize;
+ UINTN CqSize;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *MapData;
+ VOID *MapMeta;
+ UINT32 Bytes;
+ UINT32 Offset;
+ UINT32 Data32;
+ UINT64 Timer;
//
// Check the data fields in Packet parameter
@@ -378,7 +382,7 @@ NvmePassThruExecute (
return EFI_INVALID_PARAMETER;
}
- if (Packet->QueueType != NVME_ADMIN_QUEUE && Packet->QueueType != NVME_IO_QUEUE) {
+ if ((Packet->QueueType != NVME_ADMIN_QUEUE) && (Packet->QueueType != NVME_IO_QUEUE)) {
DEBUG ((
DEBUG_ERROR,
"%a, Invalid parameter: QueueId(%lx)\n",
@@ -413,7 +417,7 @@ NvmePassThruExecute (
ZeroMem (Sq, sizeof (NVME_SQ));
Sq->Opc = (UINT8)Packet->NvmeCmd->Cdw0.Opcode;
Sq->Fuse = (UINT8)Packet->NvmeCmd->Cdw0.FusedOperation;
- Sq->Cid = Private->Cid[QueueId]++;;
+ Sq->Cid = Private->Cid[QueueId]++;
Sq->Nsid = Packet->NvmeCmd->Nsid;
//
@@ -436,7 +440,8 @@ NvmePassThruExecute (
//
if ((Sq->Opc & (BIT0 | BIT1)) != 0) {
if (((Packet->TransferLength != 0) && (Packet->TransferBuffer == NULL)) ||
- ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL))) {
+ ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL)))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -445,9 +450,11 @@ NvmePassThruExecute (
// allocated internally by the driver.
//
if ((Packet->QueueType == NVME_ADMIN_QUEUE) &&
- ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD))) {
+ ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))
+ {
if ((Packet->TransferBuffer != Private->SqBuffer[NVME_IO_QUEUE]) &&
- (Packet->TransferBuffer != Private->CqBuffer[NVME_IO_QUEUE])) {
+ (Packet->TransferBuffer != Private->CqBuffer[NVME_IO_QUEUE]))
+ {
DEBUG ((
DEBUG_ERROR,
"%a: Does not support external IO queues creation request.\n",
@@ -464,13 +471,13 @@ NvmePassThruExecute (
if ((Packet->TransferLength != 0) && (Packet->TransferBuffer != NULL)) {
MapLength = Packet->TransferLength;
- Status = IoMmuMap (
- MapOp,
- Packet->TransferBuffer,
- &MapLength,
- &PhyAddr,
- &MapData
- );
+ Status = IoMmuMap (
+ MapOp,
+ Packet->TransferBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapData
+ );
if (EFI_ERROR (Status) || (MapLength != Packet->TransferLength)) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Fail to map data buffer.\n", __FUNCTION__));
@@ -480,20 +487,21 @@ NvmePassThruExecute (
Sq->Prp[0] = PhyAddr;
}
- if((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
+ if ((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
MapLength = Packet->MetadataLength;
- Status = IoMmuMap (
- MapOp,
- Packet->MetadataBuffer,
- &MapLength,
- &PhyAddr,
- &MapMeta
- );
+ Status = IoMmuMap (
+ MapOp,
+ Packet->MetadataBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapMeta
+ );
if (EFI_ERROR (Status) || (MapLength != Packet->MetadataLength)) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Fail to map meta data buffer.\n", __FUNCTION__));
goto Exit;
}
+
Sq->Mptr = PhyAddr;
}
}
@@ -510,18 +518,17 @@ NvmePassThruExecute (
//
// Create PrpList for remaining Data Buffer.
//
- PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
+ PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
Sq->Prp[1] = NvmeCreatePrpList (
Private,
PhyAddr,
- EFI_SIZE_TO_PAGES(Offset + Bytes) - 1
+ EFI_SIZE_TO_PAGES (Offset + Bytes) - 1
);
if (Sq->Prp[1] == 0) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Create PRP list fail, Status - %r\n", __FUNCTION__, Status));
goto Exit;
}
-
} else if ((Offset + Bytes) > EFI_PAGE_SIZE) {
Sq->Prp[1] = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
}
@@ -529,18 +536,23 @@ NvmePassThruExecute (
if (Packet->NvmeCmd->Flags & CDW10_VALID) {
Sq->Payload.Raw.Cdw10 = Packet->NvmeCmd->Cdw10;
}
+
if (Packet->NvmeCmd->Flags & CDW11_VALID) {
Sq->Payload.Raw.Cdw11 = Packet->NvmeCmd->Cdw11;
}
+
if (Packet->NvmeCmd->Flags & CDW12_VALID) {
Sq->Payload.Raw.Cdw12 = Packet->NvmeCmd->Cdw12;
}
+
if (Packet->NvmeCmd->Flags & CDW13_VALID) {
Sq->Payload.Raw.Cdw13 = Packet->NvmeCmd->Cdw13;
}
+
if (Packet->NvmeCmd->Flags & CDW14_VALID) {
Sq->Payload.Raw.Cdw14 = Packet->NvmeCmd->Cdw14;
}
+
if (Packet->NvmeCmd->Flags & CDW15_VALID) {
Sq->Payload.Raw.Cdw15 = Packet->NvmeCmd->Cdw15;
}
@@ -552,6 +564,7 @@ NvmePassThruExecute (
if (Private->SqTdbl[QueueId].Sqt == SqSize) {
Private->SqTdbl[QueueId].Sqt = 0;
}
+
Data32 = ReadUnaligned32 ((UINT32 *)&Private->SqTdbl[QueueId]);
Status = NVME_SET_SQTDBL (Private, QueueId, &Data32);
if (EFI_ERROR (Status)) {
@@ -588,6 +601,7 @@ NvmePassThruExecute (
//
Status = EFI_TIMEOUT;
}
+
goto Exit;
}
@@ -597,7 +611,7 @@ NvmePassThruExecute (
Private->CqHdbl[QueueId].Cqh++;
if (Private->CqHdbl[QueueId].Cqh == CqSize) {
Private->CqHdbl[QueueId].Cqh = 0;
- Private->Pt[QueueId] ^= 1;
+ Private->Pt[QueueId] ^= 1;
}
//
@@ -643,14 +657,14 @@ Exit:
EFI_STATUS
EFIAPI
NvmePassThruGetDevicePath (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -705,15 +719,15 @@ NvmePassThruGetDevicePath (
EFI_STATUS
EFIAPI
NvmePassThruGetNextNameSpace (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN OUT UINT32 *NamespaceId
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN OUT UINT32 *NamespaceId
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 DeviceIndex;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 DeviceIndex;
+ EFI_STATUS Status;
- if (This == NULL || NamespaceId == NULL) {
+ if ((This == NULL) || (NamespaceId == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -736,7 +750,7 @@ NvmePassThruGetNextNameSpace (
// Start with the first namespace ID
//
*NamespaceId = Private->NamespaceInfo[0].NamespaceId;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
} else {
if (*NamespaceId > Private->ControllerData->Nn) {
return EFI_INVALID_PARAMETER;
@@ -750,15 +764,15 @@ NvmePassThruGetNextNameSpace (
if (*NamespaceId == Private->NamespaceInfo[DeviceIndex].NamespaceId) {
if ((DeviceIndex + 1) < Private->ActiveNamespaceNum) {
*NamespaceId = Private->NamespaceInfo[DeviceIndex + 1].NamespaceId;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
}
+
break;
}
}
}
return Status;
-
}
/**
@@ -795,15 +809,15 @@ NvmePassThruGetNextNameSpace (
EFI_STATUS
EFIAPI
NvmePassThru (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
- if (This == NULL || Packet == NULL) {
+ if ((This == NULL) || (Packet == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -812,7 +826,8 @@ NvmePassThru (
// Check NamespaceId is valid or not.
//
if ((NamespaceId > Private->ControllerData->Nn) &&
- (NamespaceId != (UINT32) -1)) {
+ (NamespaceId != (UINT32)-1))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -823,6 +838,4 @@ NvmePassThru (
);
return Status;
-
}
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h
index 00e8f0abda..080e785126 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h
@@ -11,8 +11,6 @@
#ifndef _NVM_EXPRESS_PEI_PASSTHRU_H_
#define _NVM_EXPRESS_PEI_PASSTHRU_H_
-
-
/**
Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only
supports blocking execution of the command.
@@ -46,9 +44,9 @@
**/
EFI_STATUS
NvmePassThruExecute (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
);
/**
@@ -71,9 +69,9 @@ NvmePassThruExecute (
EFI_STATUS
EFIAPI
NvmePassThruGetDevicePath (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -115,8 +113,8 @@ NvmePassThruGetDevicePath (
EFI_STATUS
EFIAPI
NvmePassThruGetNextNameSpace (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN OUT UINT32 *NamespaceId
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN OUT UINT32 *NamespaceId
);
/**
@@ -153,9 +151,9 @@ NvmePassThruGetNextNameSpace (
EFI_STATUS
EFIAPI
NvmePassThru (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c
index f409285d54..d704c62eaa 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c
@@ -26,18 +26,18 @@
**/
BOOLEAN
NvmeS3SkipThisController (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength
)
{
- EFI_STATUS Status;
- UINT8 DummyData;
- UINTN S3InitDevicesLength;
- EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
- UINTN DevicePathInstLength;
- BOOLEAN EntireEnd;
- BOOLEAN Skip;
+ EFI_STATUS Status;
+ UINT8 DummyData;
+ UINTN S3InitDevicesLength;
+ EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ UINTN DevicePathInstLength;
+ BOOLEAN EntireEnd;
+ BOOLEAN Skip;
//
// From the LockBox, get the list of device paths for devices need to be
@@ -47,7 +47,7 @@ NvmeS3SkipThisController (
S3InitDevicesLength = sizeof (DummyData);
EntireEnd = FALSE;
Skip = TRUE;
- Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
+ Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
if (Status != EFI_BUFFER_TOO_SMALL) {
return Skip;
} else {
@@ -83,7 +83,7 @@ NvmeS3SkipThisController (
}
DevicePathInst = S3InitDevices;
- S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN) S3InitDevices + DevicePathInstLength);
+ S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN)S3InitDevices + DevicePathInstLength);
if (HcDevicePathLength >= DevicePathInstLength) {
continue;
@@ -97,7 +97,8 @@ NvmeS3SkipThisController (
DevicePathInst,
HcDevicePath,
HcDevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)
- ) == 0) {
+ ) == 0)
+ {
Skip = FALSE;
break;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c
index 094d61bb8a..d45487efed 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c
@@ -47,27 +47,27 @@
**/
EFI_STATUS
TrustTransferNvmeDevice (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- UINT16 SpecificData;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ UINT16 SpecificData;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
NvmePassThru = &Private->NvmePassThruPpi;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -103,10 +103,10 @@ TrustTransferNvmeDevice (
);
if (!IsTrustSend) {
- if (EFI_ERROR (Status)) {
+ if (EFI_ERROR (Status)) {
*TransferLengthOut = 0;
} else {
- *TransferLengthOut = (UINTN) TransferLength;
+ *TransferLengthOut = (UINTN)TransferLength;
}
}
@@ -126,17 +126,17 @@ TrustTransferNvmeDevice (
EFI_STATUS
EFIAPI
NvmeStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberofDevices == NULL) {
+ if ((This == NULL) || (NumberofDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
*NumberofDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -176,9 +176,9 @@ NvmeStorageSecurityGetDevicePath (
OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -295,8 +295,8 @@ NvmeStorageSecurityReceiveData (
OUT UINTN *PayloadTransferSize
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
if ((PayloadBuffer == NULL) || (PayloadTransferSize == NULL) || (PayloadBufferSize == 0)) {
return EFI_INVALID_PARAMETER;
@@ -394,8 +394,8 @@ NvmeStorageSecuritySendData (
IN VOID *PayloadBuffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
if ((PayloadBuffer == NULL) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h
index 18f3e1ce26..16351882ef 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h
@@ -24,8 +24,8 @@
EFI_STATUS
EFIAPI
NvmeStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
);
/**
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
index ff2a2314fa..a7118cc16c 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.c
@@ -20,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) PciBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) PciBusComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)PciBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)PciBusComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPciBusDriverNameTable[] = {
- { "eng;en", (CHAR16 *) L"PCI Bus Driver" },
- { NULL , NULL }
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPciBusDriverNameTable[] = {
+ { "eng;en", (CHAR16 *)L"PCI Bus Driver" },
+ { NULL, NULL }
};
/**
@@ -159,11 +158,11 @@ PciBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
PciBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h b/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
index b211391b35..0e46a13b42 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/ComponentName.h
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _EFI_PCI_BUS_COMPONENT_NAME_H_
#define _EFI_PCI_BUS_COMPONENT_NAME_H_
@@ -16,6 +15,7 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -63,7 +63,6 @@ PciBusComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -135,12 +134,11 @@ PciBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
PciBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
-
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
index 64284ac825..337b2090d9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
@@ -18,7 +18,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// PCI Bus Driver Global Variables
//
-EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding = {
PciBusDriverBindingSupported,
PciBusDriverBindingStart,
PciBusDriverBindingStop,
@@ -29,17 +29,17 @@ EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding = {
EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gIncompatiblePciDeviceSupport = NULL;
-UINTN gPciHostBridgeNumber = 0;
-BOOLEAN gFullEnumeration = TRUE;
-UINT64 gAllOne = 0xFFFFFFFFFFFFFFFFULL;
-UINT64 gAllZero = 0;
+UINTN gPciHostBridgeNumber = 0;
+BOOLEAN gFullEnumeration = TRUE;
+UINT64 gAllOne = 0xFFFFFFFFFFFFFFFFULL;
+UINT64 gAllZero = 0;
-EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
-EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
-EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;
-EDKII_DEVICE_SECURITY_PROTOCOL *mDeviceSecurityProtocol;
+EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
+EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
+EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;
+EDKII_DEVICE_SECURITY_PROTOCOL *mDeviceSecurityProtocol;
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugRequest = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugRequest = {
PciHotPlugRequestNotify
};
@@ -61,8 +61,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugReques
EFI_STATUS
EFIAPI
PciBusEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@@ -119,15 +119,15 @@ PciBusEntryPoint (
EFI_STATUS
EFIAPI
PciBusDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- EFI_DEV_PATH_PTR Node;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_DEV_PATH_PTR Node;
//
// Check RemainingDevicePath validation
@@ -143,9 +143,10 @@ PciBusDriverBindingSupported (
// check its validation
//
Node.DevPath = RemainingDevicePath;
- if (Node.DevPath->Type != HARDWARE_DEVICE_PATH ||
- Node.DevPath->SubType != HW_PCI_DP ||
- DevicePathNodeLength(Node.DevPath) != sizeof(PCI_DEVICE_PATH)) {
+ if ((Node.DevPath->Type != HARDWARE_DEVICE_PATH) ||
+ (Node.DevPath->SubType != HW_PCI_DP) ||
+ (DevicePathNodeLength (Node.DevPath) != sizeof (PCI_DEVICE_PATH)))
+ {
return EFI_UNSUPPORTED;
}
}
@@ -157,7 +158,7 @@ PciBusDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -174,11 +175,11 @@ PciBusDriverBindingSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiPciRootBridgeIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Open the EFI Device Path protocol needed to perform the supported test
@@ -186,7 +187,7 @@ PciBusDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -203,11 +204,11 @@ PciBusDriverBindingSupported (
// Close protocol, don't use device path protocol in the Support() function
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_SUCCESS;
}
@@ -234,9 +235,9 @@ PciBusDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
//
// Initialize PciRootBridgeIo to suppress incorrect compiler warning.
@@ -259,7 +260,7 @@ PciBusDriverBindingStart (
gBS->LocateProtocol (
&gEfiIncompatiblePciDeviceSupportProtocolGuid,
NULL,
- (VOID **) &gIncompatiblePciDeviceSupport
+ (VOID **)&gIncompatiblePciDeviceSupport
);
//
@@ -268,10 +269,10 @@ PciBusDriverBindingStart (
//
gPciPlatformProtocol = NULL;
gBS->LocateProtocol (
- &gEfiPciPlatformProtocolGuid,
- NULL,
- (VOID **) &gPciPlatformProtocol
- );
+ &gEfiPciPlatformProtocolGuid,
+ NULL,
+ (VOID **)&gPciPlatformProtocol
+ );
//
// If PCI Platform protocol doesn't exist, try to Pci Override Protocol.
@@ -279,32 +280,32 @@ PciBusDriverBindingStart (
if (gPciPlatformProtocol == NULL) {
gPciOverrideProtocol = NULL;
gBS->LocateProtocol (
- &gEfiPciOverrideProtocolGuid,
- NULL,
- (VOID **) &gPciOverrideProtocol
- );
+ &gEfiPciOverrideProtocolGuid,
+ NULL,
+ (VOID **)&gPciOverrideProtocol
+ );
}
if (mIoMmuProtocol == NULL) {
gBS->LocateProtocol (
- &gEdkiiIoMmuProtocolGuid,
- NULL,
- (VOID **) &mIoMmuProtocol
- );
+ &gEdkiiIoMmuProtocolGuid,
+ NULL,
+ (VOID **)&mIoMmuProtocol
+ );
}
if (mDeviceSecurityProtocol == NULL) {
gBS->LocateProtocol (
- &gEdkiiDeviceSecurityProtocolGuid,
- NULL,
- (VOID **) &mDeviceSecurityProtocol
- );
+ &gEdkiiDeviceSecurityProtocolGuid,
+ NULL,
+ (VOID **)&mDeviceSecurityProtocol
+ );
}
if (PcdGetBool (PcdPciDisableBusEnumeration)) {
gFullEnumeration = FALSE;
} else {
- gFullEnumeration = (BOOLEAN) ((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));
+ gFullEnumeration = (BOOLEAN)((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));
}
//
@@ -313,7 +314,7 @@ PciBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -342,7 +343,7 @@ PciBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
gPciBusDriverBinding.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -399,10 +400,10 @@ PciBusDriverBindingStart (
EFI_STATUS
EFIAPI
PciBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -414,17 +415,17 @@ PciBusDriverBindingStop (
// Close the bus driver
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiPciRootBridgeIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
DestroyRootBridgeByHandle (
Controller
@@ -440,7 +441,6 @@ PciBusDriverBindingStop (
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
//
// De register all the pci device
//
@@ -457,4 +457,3 @@ PciBusDriverBindingStop (
return EFI_SUCCESS;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index a619a68526..4b58c3ea9b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _EFI_PCI_BUS_H_
#define _EFI_PCI_BUS_H_
@@ -44,15 +43,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/PeImage.h>
#include <IndustryStandard/Acpi.h>
-typedef struct _PCI_IO_DEVICE PCI_IO_DEVICE;
-typedef struct _PCI_BAR PCI_BAR;
+typedef struct _PCI_IO_DEVICE PCI_IO_DEVICE;
+typedef struct _PCI_BAR PCI_BAR;
#define EFI_PCI_RID(Bus, Device, Function) (((UINT32)Bus << 8) + ((UINT32)Device << 3) + (UINT32)Function)
#define EFI_PCI_BUS_OF_RID(RID) ((UINT32)RID >> 8)
-#define EFI_PCI_IOV_POLICY_ARI 0x0001
-#define EFI_PCI_IOV_POLICY_SRIOV 0x0002
-#define EFI_PCI_IOV_POLICY_MRIOV 0x0004
+#define EFI_PCI_IOV_POLICY_ARI 0x0001
+#define EFI_PCI_IOV_POLICY_SRIOV 0x0002
+#define EFI_PCI_IOV_POLICY_MRIOV 0x0004
typedef enum {
PciBarTypeUnknown = 0,
@@ -81,11 +80,11 @@ typedef enum {
#include "PciHotPlugSupport.h"
#include "PciLib.h"
-#define VGABASE1 0x3B0
-#define VGALIMIT1 0x3BB
+#define VGABASE1 0x3B0
+#define VGALIMIT1 0x3BB
-#define VGABASE2 0x3C0
-#define VGALIMIT2 0x3DF
+#define VGABASE2 0x3C0
+#define VGALIMIT2 0x3DF
#define ISABASE 0x100
#define ISALIMIT 0x3FF
@@ -94,63 +93,63 @@ typedef enum {
// PCI BAR parameters
//
struct _PCI_BAR {
- UINT64 BaseAddress;
- UINT64 Length;
- UINT64 Alignment;
- PCI_BAR_TYPE BarType;
- BOOLEAN BarTypeFixed;
- UINT16 Offset;
+ UINT64 BaseAddress;
+ UINT64 Length;
+ UINT64 Alignment;
+ PCI_BAR_TYPE BarType;
+ BOOLEAN BarTypeFixed;
+ UINT16 Offset;
};
//
// defined in PCI Card Specification, 8.0
//
-#define PCI_CARD_MEMORY_BASE_0 0x1C
-#define PCI_CARD_MEMORY_LIMIT_0 0x20
-#define PCI_CARD_MEMORY_BASE_1 0x24
-#define PCI_CARD_MEMORY_LIMIT_1 0x28
-#define PCI_CARD_IO_BASE_0_LOWER 0x2C
-#define PCI_CARD_IO_BASE_0_UPPER 0x2E
-#define PCI_CARD_IO_LIMIT_0_LOWER 0x30
-#define PCI_CARD_IO_LIMIT_0_UPPER 0x32
-#define PCI_CARD_IO_BASE_1_LOWER 0x34
-#define PCI_CARD_IO_BASE_1_UPPER 0x36
-#define PCI_CARD_IO_LIMIT_1_LOWER 0x38
-#define PCI_CARD_IO_LIMIT_1_UPPER 0x3A
-#define PCI_CARD_BRIDGE_CONTROL 0x3E
-
-#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8
-#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9
-
-#define RB_IO_RANGE 1
-#define RB_MEM32_RANGE 2
-#define RB_PMEM32_RANGE 3
-#define RB_MEM64_RANGE 4
-#define RB_PMEM64_RANGE 5
-
-#define PPB_BAR_0 0
-#define PPB_BAR_1 1
-#define PPB_IO_RANGE 2
-#define PPB_MEM32_RANGE 3
-#define PPB_PMEM32_RANGE 4
-#define PPB_PMEM64_RANGE 5
-#define PPB_MEM64_RANGE 0xFF
-
-#define P2C_BAR_0 0
-#define P2C_MEM_1 1
-#define P2C_MEM_2 2
-#define P2C_IO_1 3
-#define P2C_IO_2 4
-
-#define EFI_BRIDGE_IO32_DECODE_SUPPORTED 0x0001
-#define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED 0x0002
-#define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED 0x0004
-#define EFI_BRIDGE_IO16_DECODE_SUPPORTED 0x0008
-#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
-#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
-#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
-
-#define PCI_MAX_HOST_BRIDGE_NUM 0x0010
+#define PCI_CARD_MEMORY_BASE_0 0x1C
+#define PCI_CARD_MEMORY_LIMIT_0 0x20
+#define PCI_CARD_MEMORY_BASE_1 0x24
+#define PCI_CARD_MEMORY_LIMIT_1 0x28
+#define PCI_CARD_IO_BASE_0_LOWER 0x2C
+#define PCI_CARD_IO_BASE_0_UPPER 0x2E
+#define PCI_CARD_IO_LIMIT_0_LOWER 0x30
+#define PCI_CARD_IO_LIMIT_0_UPPER 0x32
+#define PCI_CARD_IO_BASE_1_LOWER 0x34
+#define PCI_CARD_IO_BASE_1_UPPER 0x36
+#define PCI_CARD_IO_LIMIT_1_LOWER 0x38
+#define PCI_CARD_IO_LIMIT_1_UPPER 0x3A
+#define PCI_CARD_BRIDGE_CONTROL 0x3E
+
+#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8
+#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9
+
+#define RB_IO_RANGE 1
+#define RB_MEM32_RANGE 2
+#define RB_PMEM32_RANGE 3
+#define RB_MEM64_RANGE 4
+#define RB_PMEM64_RANGE 5
+
+#define PPB_BAR_0 0
+#define PPB_BAR_1 1
+#define PPB_IO_RANGE 2
+#define PPB_MEM32_RANGE 3
+#define PPB_PMEM32_RANGE 4
+#define PPB_PMEM64_RANGE 5
+#define PPB_MEM64_RANGE 0xFF
+
+#define P2C_BAR_0 0
+#define P2C_MEM_1 1
+#define P2C_MEM_2 2
+#define P2C_IO_1 3
+#define P2C_IO_2 4
+
+#define EFI_BRIDGE_IO32_DECODE_SUPPORTED 0x0001
+#define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED 0x0002
+#define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED 0x0004
+#define EFI_BRIDGE_IO16_DECODE_SUPPORTED 0x0008
+#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
+#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
+#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
+
+#define PCI_MAX_HOST_BRIDGE_NUM 0x0010
//
// Define option for attribute
@@ -158,130 +157,130 @@ struct _PCI_BAR {
#define EFI_SET_SUPPORTS 0
#define EFI_SET_ATTRIBUTES 1
-#define PCI_IO_DEVICE_SIGNATURE SIGNATURE_32 ('p', 'c', 'i', 'o')
+#define PCI_IO_DEVICE_SIGNATURE SIGNATURE_32 ('p', 'c', 'i', 'o')
struct _PCI_IO_DEVICE {
- UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_PCI_IO_PROTOCOL PciIo;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ EFI_HANDLE Handle;
+ EFI_PCI_IO_PROTOCOL PciIo;
+ LIST_ENTRY Link;
- EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- EFI_LOAD_FILE2_PROTOCOL LoadFile2;
+ EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_LOAD_FILE2_PROTOCOL LoadFile2;
//
// PCI configuration space header type
//
- PCI_TYPE00 Pci;
+ PCI_TYPE00 Pci;
//
// Bus number, Device number, Function number
//
- UINT8 BusNumber;
- UINT8 DeviceNumber;
- UINT8 FunctionNumber;
+ UINT8 BusNumber;
+ UINT8 DeviceNumber;
+ UINT8 FunctionNumber;
//
// BAR for this PCI Device
//
- PCI_BAR PciBar[PCI_MAX_BAR];
+ PCI_BAR PciBar[PCI_MAX_BAR];
//
// The bridge device this pci device is subject to
//
- PCI_IO_DEVICE *Parent;
+ PCI_IO_DEVICE *Parent;
//
// A linked list for children Pci Device if it is bridge device
//
- LIST_ENTRY ChildList;
+ LIST_ENTRY ChildList;
//
// TRUE if the PCI bus driver creates the handle for this PCI device
//
- BOOLEAN Registered;
+ BOOLEAN Registered;
//
// TRUE if the PCI bus driver successfully allocates the resource required by
// this PCI device
//
- BOOLEAN Allocated;
+ BOOLEAN Allocated;
//
// The attribute this PCI device currently set
//
- UINT64 Attributes;
+ UINT64 Attributes;
//
// The attributes this PCI device actually supports
//
- UINT64 Supports;
+ UINT64 Supports;
//
// The resource decode the bridge supports
//
- UINT32 Decodes;
+ UINT32 Decodes;
//
// TRUE if the ROM image is from the PCI Option ROM BAR
//
- BOOLEAN EmbeddedRom;
+ BOOLEAN EmbeddedRom;
//
// The OptionRom Size
//
- UINT32 RomSize;
+ UINT32 RomSize;
//
// TRUE if all OpROM (in device or in platform specific position) have been processed
//
- BOOLEAN AllOpRomProcessed;
+ BOOLEAN AllOpRomProcessed;
//
// TRUE if there is any EFI driver in the OptionRom
//
- BOOLEAN BusOverride;
+ BOOLEAN BusOverride;
//
// A list tracking reserved resource on a bridge device
//
- LIST_ENTRY ReservedResourceList;
+ LIST_ENTRY ReservedResourceList;
//
// A list tracking image handle of platform specific overriding driver
//
- LIST_ENTRY OptionRomDriverList;
+ LIST_ENTRY OptionRomDriverList;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ResourcePaddingDescriptors;
- EFI_HPC_PADDING_ATTRIBUTES PaddingAttributes;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ResourcePaddingDescriptors;
+ EFI_HPC_PADDING_ATTRIBUTES PaddingAttributes;
//
// Bus number ranges for a PCI Root Bridge device
//
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;
- BOOLEAN IsPciExp;
+ BOOLEAN IsPciExp;
//
// For SR-IOV
//
- UINT8 PciExpressCapabilityOffset;
- UINT32 AriCapabilityOffset;
- UINT32 SrIovCapabilityOffset;
- UINT32 MrIovCapabilityOffset;
- PCI_BAR VfPciBar[PCI_MAX_BAR];
- UINT32 SystemPageSize;
- UINT16 InitialVFs;
- UINT16 ReservedBusNum;
+ UINT8 PciExpressCapabilityOffset;
+ UINT32 AriCapabilityOffset;
+ UINT32 SrIovCapabilityOffset;
+ UINT32 MrIovCapabilityOffset;
+ PCI_BAR VfPciBar[PCI_MAX_BAR];
+ UINT32 SystemPageSize;
+ UINT16 InitialVFs;
+ UINT16 ReservedBusNum;
//
// Per PCI to PCI Bridge spec, I/O window is 4K aligned,
// but some chipsets support non-standard I/O window alignments less than 4K.
// This field is used to support this case.
//
- UINT16 BridgeIoAlignment;
- UINT32 ResizableBarOffset;
- UINT32 ResizableBarNumber;
+ UINT16 BridgeIoAlignment;
+ UINT32 ResizableBarOffset;
+ UINT32 ResizableBarNumber;
};
#define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
@@ -296,24 +295,22 @@ struct _PCI_IO_DEVICE {
#define PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS(a) \
CR (a, PCI_IO_DEVICE, LoadFile2, PCI_IO_DEVICE_SIGNATURE)
-
-
//
// Global Variables
//
-extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gIncompatiblePciDeviceSupport;
-extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;
-extern BOOLEAN gFullEnumeration;
-extern UINTN gPciHostBridgeNumber;
-extern EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
-extern UINT64 gAllOne;
-extern UINT64 gAllZero;
-extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
-extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
-extern BOOLEAN mReserveIsaAliases;
-extern BOOLEAN mReserveVgaAliases;
+extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gIncompatiblePciDeviceSupport;
+extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;
+extern BOOLEAN gFullEnumeration;
+extern UINTN gPciHostBridgeNumber;
+extern EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
+extern UINT64 gAllOne;
+extern UINT64 gAllZero;
+extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
+extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
+extern BOOLEAN mReserveIsaAliases;
+extern BOOLEAN mReserveVgaAliases;
/**
Macro that checks whether device is a GFX device.
@@ -324,7 +321,7 @@ extern BOOLEAN mReserveVgaAliases;
@retval FALSE Device is not a GFX device.
**/
-#define IS_PCI_GFX(_p) IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
+#define IS_PCI_GFX(_p) IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
/**
Test to see if this driver supports ControllerHandle. Any ControllerHandle
@@ -343,9 +340,9 @@ extern BOOLEAN mReserveVgaAliases;
EFI_STATUS
EFIAPI
PciBusDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -365,9 +362,9 @@ PciBusDriverBindingSupported (
EFI_STATUS
EFIAPI
PciBusDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -387,10 +384,10 @@ PciBusDriverBindingStart (
EFI_STATUS
EFIAPI
PciBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
index 6283d60220..ba4b099bc5 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
@@ -22,19 +22,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PciOperateRegister (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 Command,
- IN UINT8 Offset,
- IN UINT8 Operation,
- OUT UINT16 *PtrCommand
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 Command,
+ IN UINT8 Offset,
+ IN UINT8 Operation,
+ OUT UINT16 *PtrCommand
)
{
- UINT16 OldCommand;
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 OldCommand;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
- OldCommand = 0;
- PciIo = &PciIoDevice->PciIo;
+ OldCommand = 0;
+ PciIo = &PciIoDevice->PciIo;
if (Operation != EFI_SET_REGISTER) {
Status = PciIo->Pci.Read (
@@ -52,9 +52,9 @@ PciOperateRegister (
}
if (Operation == EFI_ENABLE_REGISTER) {
- OldCommand = (UINT16) (OldCommand | Command);
+ OldCommand = (UINT16)(OldCommand | Command);
} else if (Operation == EFI_DISABLE_REGISTER) {
- OldCommand = (UINT16) (OldCommand & ~(Command));
+ OldCommand = (UINT16)(OldCommand & ~(Command));
} else {
OldCommand = Command;
}
@@ -124,10 +124,8 @@ LocateCapabilityRegBlock (
if (*Offset != 0) {
CapabilityPtr = *Offset;
} else {
-
CapabilityPtr = 0;
if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
-
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
@@ -136,7 +134,6 @@ LocateCapabilityRegBlock (
&CapabilityPtr
);
} else {
-
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
@@ -156,12 +153,12 @@ LocateCapabilityRegBlock (
&CapabilityEntry
);
- CapabilityID = (UINT8) CapabilityEntry;
+ CapabilityID = (UINT8)CapabilityEntry;
if (CapabilityID == CapId) {
*Offset = CapabilityPtr;
if (NextRegBlock != NULL) {
- *NextRegBlock = (UINT8) (CapabilityEntry >> 8);
+ *NextRegBlock = (UINT8)(CapabilityEntry >> 8);
}
return EFI_SUCCESS;
@@ -171,11 +168,11 @@ LocateCapabilityRegBlock (
// Certain PCI device may incorrectly have capability pointing to itself,
// break to avoid dead loop.
//
- if (CapabilityPtr == (UINT8) (CapabilityEntry >> 8)) {
+ if (CapabilityPtr == (UINT8)(CapabilityEntry >> 8)) {
break;
}
- CapabilityPtr = (UINT8) (CapabilityEntry >> 8);
+ CapabilityPtr = (UINT8)(CapabilityEntry >> 8);
}
return EFI_NOT_FOUND;
@@ -196,16 +193,16 @@ LocateCapabilityRegBlock (
**/
EFI_STATUS
LocatePciExpressCapabilityRegBlock (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 CapId,
- IN OUT UINT32 *Offset,
- OUT UINT32 *NextRegBlock OPTIONAL
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 CapId,
+ IN OUT UINT32 *Offset,
+ OUT UINT32 *NextRegBlock OPTIONAL
)
{
- EFI_STATUS Status;
- UINT32 CapabilityPtr;
- UINT32 CapabilityEntry;
- UINT16 CapabilityID;
+ EFI_STATUS Status;
+ UINT32 CapabilityPtr;
+ UINT32 CapabilityEntry;
+ UINT16 CapabilityID;
//
// To check the capability of this device supports
@@ -225,13 +222,13 @@ LocatePciExpressCapabilityRegBlock (
// Mask it to DWORD alignment per PCI spec
//
CapabilityPtr &= 0xFFC;
- Status = PciIoDevice->PciIo.Pci.Read (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint32,
- CapabilityPtr,
- 1,
- &CapabilityEntry
- );
+ Status = PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint32,
+ CapabilityPtr,
+ 1,
+ &CapabilityEntry
+ );
if (EFI_ERROR (Status)) {
break;
}
@@ -249,7 +246,7 @@ LocatePciExpressCapabilityRegBlock (
break;
}
- CapabilityID = (UINT16) CapabilityEntry;
+ CapabilityID = (UINT16)CapabilityEntry;
if (CapabilityID == CapId) {
*Offset = CapabilityPtr;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
index cf9903270d..1822afea97 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _EFI_PCI_COMMAND_H_
#define _EFI_PCI_COMMAND_H_
@@ -16,7 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCI_COMMAND_BITS_OWNED ( \
+#define EFI_PCI_COMMAND_BITS_OWNED ( \
EFI_PCI_COMMAND_IO_SPACE | \
EFI_PCI_COMMAND_MEMORY_SPACE | \
EFI_PCI_COMMAND_BUS_MASTER | \
@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
+#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
@@ -44,13 +43,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
+#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
)
-
#define EFI_GET_REGISTER 1
#define EFI_SET_REGISTER 2
#define EFI_ENABLE_REGISTER 3
@@ -70,11 +68,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PciOperateRegister (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 Command,
- IN UINT8 Offset,
- IN UINT8 Operation,
- OUT UINT16 *PtrCommand
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 Command,
+ IN UINT8 Offset,
+ IN UINT8 Operation,
+ OUT UINT16 *PtrCommand
);
/**
@@ -127,10 +125,10 @@ LocateCapabilityRegBlock (
**/
EFI_STATUS
LocatePciExpressCapabilityRegBlock (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 CapId,
- IN OUT UINT32 *Offset,
- OUT UINT32 *NextRegBlock OPTIONAL
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 CapId,
+ IN OUT UINT32 *Offset,
+ OUT UINT32 *NextRegBlock OPTIONAL
);
/**
@@ -142,7 +140,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_READ_COMMAND_REGISTER(a,b) \
+#define PCI_READ_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
/**
@@ -154,7 +152,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_SET_COMMAND_REGISTER(a,b) \
+#define PCI_SET_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
/**
@@ -166,7 +164,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_ENABLE_COMMAND_REGISTER(a,b) \
+#define PCI_ENABLE_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
@@ -178,7 +176,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_DISABLE_COMMAND_REGISTER(a,b) \
+#define PCI_DISABLE_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
/**
@@ -190,7 +188,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_READ_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_READ_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
/**
@@ -202,7 +200,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_SET_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_SET_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
/**
@@ -214,7 +212,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
@@ -226,7 +224,7 @@ LocatePciExpressCapabilityRegBlock (
@return status of PciIo operation
**/
-#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index 292dd25da8..581e9075ad 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -35,7 +35,7 @@ InitializePciDevicePool (
**/
VOID
InsertRootBridge (
- IN PCI_IO_DEVICE *RootBridge
+ IN PCI_IO_DEVICE *RootBridge
)
{
InsertTailList (&mPciDevicePool, &(RootBridge->Link));
@@ -51,8 +51,8 @@ InsertRootBridge (
**/
VOID
InsertPciDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_IO_DEVICE *PciDeviceNode
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_IO_DEVICE *PciDeviceNode
)
{
InsertTailList (&Bridge->ChildList, &(PciDeviceNode->Link));
@@ -67,7 +67,7 @@ InsertPciDevice (
**/
VOID
DestroyRootBridge (
- IN PCI_IO_DEVICE *RootBridge
+ IN PCI_IO_DEVICE *RootBridge
)
{
DestroyPciDeviceTree (RootBridge);
@@ -85,7 +85,7 @@ DestroyRootBridge (
**/
VOID
FreePciDevice (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
ASSERT (PciIoDevice != NULL);
@@ -116,14 +116,13 @@ FreePciDevice (
**/
VOID
DestroyPciDeviceTree (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
while (!IsListEmpty (&Bridge->ChildList)) {
-
CurrentLink = Bridge->ChildList.ForwardLink;
//
@@ -156,12 +155,11 @@ DestroyPciDeviceTree (
**/
EFI_STATUS
DestroyRootBridgeByHandle (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
)
{
-
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
CurrentLink = mPciDevicePool.ForwardLink;
@@ -169,7 +167,6 @@ DestroyRootBridgeByHandle (
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (Temp->Handle == Controller) {
-
RemoveEntryList (CurrentLink);
DestroyPciDeviceTree (Temp);
@@ -202,17 +199,17 @@ DestroyRootBridgeByHandle (
**/
EFI_STATUS
RegisterPciDevice (
- IN EFI_HANDLE Controller,
- IN PCI_IO_DEVICE *PciIoDevice,
- OUT EFI_HANDLE *Handle OPTIONAL
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *PciIoDevice,
+ OUT EFI_HANDLE *Handle OPTIONAL
)
{
- EFI_STATUS Status;
- VOID *PlatformOpRomBuffer;
- UINTN PlatformOpRomSize;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT8 Data8;
- BOOLEAN HasEfiImage;
+ EFI_STATUS Status;
+ VOID *PlatformOpRomBuffer;
+ UINTN PlatformOpRomSize;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 Data8;
+ BOOLEAN HasEfiImage;
//
// Install the pciio protocol, device path protocol
@@ -240,7 +237,6 @@ RegisterPciDevice (
// Process OpRom
//
if (!PciIoDevice->AllOpRomProcessed) {
-
//
// Get the OpRom provided by platform
//
@@ -253,7 +249,7 @@ RegisterPciDevice (
);
if (!EFI_ERROR (Status)) {
PciIoDevice->EmbeddedRom = FALSE;
- PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
+ PciIoDevice->RomSize = (UINT32)PlatformOpRomSize;
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
//
@@ -279,7 +275,7 @@ RegisterPciDevice (
);
if (!EFI_ERROR (Status)) {
PciIoDevice->EmbeddedRom = FALSE;
- PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
+ PciIoDevice->RomSize = (UINT32)PlatformOpRomSize;
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
//
@@ -324,9 +320,7 @@ RegisterPciDevice (
}
}
-
if (!PciIoDevice->AllOpRomProcessed) {
-
PciIoDevice->AllOpRomProcessed = TRUE;
//
@@ -374,7 +368,7 @@ RegisterPciDevice (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &(PciIoDevice->PciRootBridgeIo),
+ (VOID **)&(PciIoDevice->PciRootBridgeIo),
gPciBusDriverBinding.DriverBindingHandle,
PciIoDevice->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -405,15 +399,14 @@ RegisterPciDevice (
**/
VOID
RemoveAllPciDeviceOnBridge (
- EFI_HANDLE RootBridgeHandle,
- PCI_IO_DEVICE *Bridge
+ EFI_HANDLE RootBridgeHandle,
+ PCI_IO_DEVICE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
while (!IsListEmpty (&Bridge->ChildList)) {
-
CurrentLink = Bridge->ChildList.ForwardLink;
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
@@ -453,22 +446,22 @@ RemoveAllPciDeviceOnBridge (
**/
EFI_STATUS
DeRegisterPciDevice (
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
- PCI_IO_DEVICE *Node;
- LIST_ENTRY *CurrentLink;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *Node;
+ LIST_ENTRY *CurrentLink;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
Status = gBS->OpenProtocol (
Handle,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
gPciBusDriverBinding.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -488,12 +481,11 @@ DeRegisterPciDevice (
//
if (!IsListEmpty (&PciIoDevice->ChildList)) {
-
CurrentLink = PciIoDevice->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {
- Node = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
- Status = DeRegisterPciDevice (Controller, Node->Handle);
+ Node = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+ Status = DeRegisterPciDevice (Controller, Node->Handle);
if (EFI_ERROR (Status)) {
return Status;
@@ -559,22 +551,22 @@ DeRegisterPciDevice (
NULL
);
}
+
//
// Restore Status
//
Status = EFI_SUCCESS;
}
-
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
- Controller,
- &gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
- gPciBusDriverBinding.DriverBindingHandle,
- Handle,
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ (VOID **)&PciRootBridgeIo,
+ gPciBusDriverBinding.DriverBindingHandle,
+ Handle,
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
return Status;
}
@@ -586,7 +578,6 @@ DeRegisterPciDevice (
PciIoDevice->Registered = FALSE;
PciIoDevice->Handle = NULL;
} else {
-
//
// Handle may be closed before
//
@@ -613,11 +604,11 @@ DeRegisterPciDevice (
**/
EFI_STATUS
StartPciDevicesOnBridge (
- IN EFI_HANDLE Controller,
- IN PCI_IO_DEVICE *RootBridge,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
- IN OUT UINT8 *NumberOfChildren,
- IN OUT EFI_HANDLE *ChildHandleBuffer
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *RootBridge,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
+ IN OUT UINT8 *NumberOfChildren,
+ IN OUT EFI_HANDLE *ChildHandleBuffer
)
{
@@ -632,14 +623,13 @@ StartPciDevicesOnBridge (
CurrentLink = RootBridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {
-
PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (RemainingDevicePath != NULL) {
-
Node.DevPath = RemainingDevicePath;
- if (Node.Pci->Device != PciIoDevice->DeviceNumber ||
- Node.Pci->Function != PciIoDevice->FunctionNumber) {
+ if ((Node.Pci->Device != PciIoDevice->DeviceNumber) ||
+ (Node.Pci->Function != PciIoDevice->FunctionNumber))
+ {
CurrentLink = CurrentLink->ForwardLink;
continue;
}
@@ -661,10 +651,9 @@ StartPciDevicesOnBridge (
PciIoDevice,
NULL
);
-
}
- if (NumberOfChildren != NULL && ChildHandleBuffer != NULL && PciIoDevice->Registered) {
+ if ((NumberOfChildren != NULL) && (ChildHandleBuffer != NULL) && PciIoDevice->Registered) {
ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;
(*NumberOfChildren)++;
}
@@ -705,15 +694,12 @@ StartPciDevicesOnBridge (
return Status;
} else {
-
//
// Currently, the PCI bus driver only support PCI-PCI bridge
//
return EFI_UNSUPPORTED;
}
-
} else {
-
//
// If remaining device path is NULL,
// try to enable all the pci devices under this bridge
@@ -724,10 +710,9 @@ StartPciDevicesOnBridge (
PciIoDevice,
NULL
);
-
}
- if (NumberOfChildren != NULL && ChildHandleBuffer != NULL && PciIoDevice->Registered) {
+ if ((NumberOfChildren != NULL) && (ChildHandleBuffer != NULL) && PciIoDevice->Registered) {
ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;
(*NumberOfChildren)++;
}
@@ -754,7 +739,6 @@ StartPciDevicesOnBridge (
Supports,
NULL
);
-
}
CurrentLink = CurrentLink->ForwardLink;
@@ -780,12 +764,12 @@ StartPciDevicesOnBridge (
**/
EFI_STATUS
StartPciDevices (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
)
{
- PCI_IO_DEVICE *RootBridge;
- EFI_HANDLE ThisHostBridge;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *RootBridge;
+ EFI_HANDLE ThisHostBridge;
+ LIST_ENTRY *CurrentLink;
RootBridge = GetRootBridgeByHandle (Controller);
ASSERT (RootBridge != NULL);
@@ -794,19 +778,18 @@ StartPciDevices (
CurrentLink = mPciDevicePool.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
-
RootBridge = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
//
// Locate the right root bridge to start
//
if (RootBridge->PciRootBridgeIo->ParentHandle == ThisHostBridge) {
StartPciDevicesOnBridge (
- RootBridge->Handle,
- RootBridge,
- NULL,
- NULL,
- NULL
- );
+ RootBridge->Handle,
+ RootBridge,
+ NULL,
+ NULL,
+ NULL
+ );
}
CurrentLink = CurrentLink->ForwardLink;
@@ -826,27 +809,27 @@ StartPciDevices (
**/
PCI_IO_DEVICE *
CreateRootBridge (
- IN EFI_HANDLE RootBridgeHandle
+ IN EFI_HANDLE RootBridgeHandle
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *Dev;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *Dev;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
Dev = AllocateZeroPool (sizeof (PCI_IO_DEVICE));
if (Dev == NULL) {
return NULL;
}
- Dev->Signature = PCI_IO_DEVICE_SIGNATURE;
- Dev->Handle = RootBridgeHandle;
+ Dev->Signature = PCI_IO_DEVICE_SIGNATURE;
+ Dev->Handle = RootBridgeHandle;
InitializeListHead (&Dev->ChildList);
Status = gBS->OpenProtocol (
RootBridgeHandle,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
gPciBusDriverBinding.DriverBindingHandle,
RootBridgeHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -868,7 +851,7 @@ CreateRootBridge (
Status = gBS->OpenProtocol (
RootBridgeHandle,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
gPciBusDriverBinding.DriverBindingHandle,
RootBridgeHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -909,16 +892,15 @@ CreateRootBridge (
**/
PCI_IO_DEVICE *
GetRootBridgeByHandle (
- EFI_HANDLE RootBridgeHandle
+ EFI_HANDLE RootBridgeHandle
)
{
- PCI_IO_DEVICE *RootBridgeDev;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *RootBridgeDev;
+ LIST_ENTRY *CurrentLink;
CurrentLink = mPciDevicePool.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
-
RootBridgeDev = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (RootBridgeDev->Handle == RootBridgeHandle) {
return RootBridgeDev;
@@ -942,18 +924,16 @@ GetRootBridgeByHandle (
**/
BOOLEAN
PciDeviceExisted (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
-
- PCI_IO_DEVICE *Temp;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
-
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (Temp == PciIoDevice) {
@@ -982,20 +962,18 @@ PciDeviceExisted (
**/
PCI_IO_DEVICE *
LocateVgaDeviceOnHostBridge (
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE HostBridgeHandle
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *PciIoDevice;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *PciIoDevice;
CurrentLink = mPciDevicePool.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
-
PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
- if (PciIoDevice->PciRootBridgeIo->ParentHandle== HostBridgeHandle) {
-
+ if (PciIoDevice->PciRootBridgeIo->ParentHandle == HostBridgeHandle) {
PciIoDevice = LocateVgaDevice (PciIoDevice);
if (PciIoDevice != NULL) {
@@ -1019,28 +997,27 @@ LocateVgaDeviceOnHostBridge (
**/
PCI_IO_DEVICE *
LocateVgaDevice (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *PciIoDevice;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *PciIoDevice;
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
-
PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
- if (IS_PCI_VGA(&PciIoDevice->Pci) &&
- (PciIoDevice->Attributes &
- (EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY |
- EFI_PCI_IO_ATTRIBUTE_VGA_IO |
- EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {
+ if (IS_PCI_VGA (&PciIoDevice->Pci) &&
+ ((PciIoDevice->Attributes &
+ (EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY |
+ EFI_PCI_IO_ATTRIBUTE_VGA_IO |
+ EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0))
+ {
return PciIoDevice;
}
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
-
PciIoDevice = LocateVgaDevice (PciIoDevice);
if (PciIoDevice != NULL) {
@@ -1053,4 +1030,3 @@ LocateVgaDevice (
return NULL;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
index 3dae540da7..ca367e7b92 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
@@ -26,7 +26,7 @@ InitializePciDevicePool (
**/
VOID
InsertRootBridge (
- IN PCI_IO_DEVICE *RootBridge
+ IN PCI_IO_DEVICE *RootBridge
);
/**
@@ -39,8 +39,8 @@ InsertRootBridge (
**/
VOID
InsertPciDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_IO_DEVICE *PciDeviceNode
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_IO_DEVICE *PciDeviceNode
);
/**
@@ -51,7 +51,7 @@ InsertPciDevice (
**/
VOID
DestroyRootBridge (
- IN PCI_IO_DEVICE *RootBridge
+ IN PCI_IO_DEVICE *RootBridge
);
/**
@@ -63,7 +63,7 @@ DestroyRootBridge (
**/
VOID
DestroyPciDeviceTree (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
);
/**
@@ -81,7 +81,7 @@ DestroyPciDeviceTree (
**/
EFI_STATUS
DestroyRootBridgeByHandle (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
);
/**
@@ -101,9 +101,9 @@ DestroyRootBridgeByHandle (
**/
EFI_STATUS
RegisterPciDevice (
- IN EFI_HANDLE Controller,
- IN PCI_IO_DEVICE *PciIoDevice,
- OUT EFI_HANDLE *Handle OPTIONAL
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *PciIoDevice,
+ OUT EFI_HANDLE *Handle OPTIONAL
);
/**
@@ -116,8 +116,8 @@ RegisterPciDevice (
**/
VOID
RemoveAllPciDeviceOnBridge (
- EFI_HANDLE RootBridgeHandle,
- PCI_IO_DEVICE *Bridge
+ EFI_HANDLE RootBridgeHandle,
+ PCI_IO_DEVICE *Bridge
);
/**
@@ -135,8 +135,8 @@ RemoveAllPciDeviceOnBridge (
**/
EFI_STATUS
DeRegisterPciDevice (
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE Handle
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE Handle
);
/**
@@ -156,11 +156,11 @@ DeRegisterPciDevice (
**/
EFI_STATUS
StartPciDevicesOnBridge (
- IN EFI_HANDLE Controller,
- IN PCI_IO_DEVICE *RootBridge,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
- IN OUT UINT8 *NumberOfChildren,
- IN OUT EFI_HANDLE *ChildHandleBuffer
+ IN EFI_HANDLE Controller,
+ IN PCI_IO_DEVICE *RootBridge,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
+ IN OUT UINT8 *NumberOfChildren,
+ IN OUT EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -175,7 +175,7 @@ StartPciDevicesOnBridge (
**/
EFI_STATUS
StartPciDevices (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
);
/**
@@ -189,7 +189,7 @@ StartPciDevices (
**/
PCI_IO_DEVICE *
CreateRootBridge (
- IN EFI_HANDLE RootBridgeHandle
+ IN EFI_HANDLE RootBridgeHandle
);
/**
@@ -203,10 +203,9 @@ CreateRootBridge (
**/
PCI_IO_DEVICE *
GetRootBridgeByHandle (
- EFI_HANDLE RootBridgeHandle
+ EFI_HANDLE RootBridgeHandle
);
-
/**
Judge whether Pci device existed.
@@ -219,8 +218,8 @@ GetRootBridgeByHandle (
**/
BOOLEAN
PciDeviceExisted (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -233,7 +232,7 @@ PciDeviceExisted (
**/
PCI_IO_DEVICE *
LocateVgaDeviceOnHostBridge (
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE HostBridgeHandle
);
/**
@@ -246,10 +245,9 @@ LocateVgaDeviceOnHostBridge (
**/
PCI_IO_DEVICE *
LocateVgaDevice (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
);
-
/**
Destroy a pci device node.
@@ -260,7 +258,7 @@ LocateVgaDevice (
**/
VOID
FreePciDevice (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
index 3531e6b6ef..c829408bcb 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
@@ -16,7 +16,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
InitializePciDriverOverrideInstance (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->PciDriverOverride.GetDriver = GetDriver;
@@ -31,16 +31,16 @@ InitializePciDriverOverrideInstance (
**/
EFI_HANDLE
LocateImageHandle (
- IN EFI_DEVICE_PATH_PROTOCOL *ImagePath
+ IN EFI_DEVICE_PATH_PROTOCOL *ImagePath
)
{
- EFI_STATUS Status;
- EFI_HANDLE *Handles;
- UINTN Index;
- UINTN HandleNum;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINTN ImagePathSize;
- EFI_HANDLE ImageHandle;
+ EFI_STATUS Status;
+ EFI_HANDLE *Handles;
+ UINTN Index;
+ UINTN HandleNum;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN ImagePathSize;
+ EFI_HANDLE ImageHandle;
Status = gBS->LocateHandleBuffer (
ByProtocol,
@@ -57,13 +57,15 @@ LocateImageHandle (
ImagePathSize = GetDevicePathSize (ImagePath);
for (Index = 0; Index < HandleNum; Index++) {
- Status = gBS->HandleProtocol (Handles[Index], &gEfiLoadedImageDevicePathProtocolGuid, (VOID **) &DevicePath);
+ Status = gBS->HandleProtocol (Handles[Index], &gEfiLoadedImageDevicePathProtocolGuid, (VOID **)&DevicePath);
if (EFI_ERROR (Status)) {
continue;
}
+
if ((ImagePathSize == GetDevicePathSize (DevicePath)) &&
(CompareMem (ImagePath, DevicePath, ImagePathSize) == 0)
- ) {
+ )
+ {
ImageHandle = Handles[Index];
break;
}
@@ -92,8 +94,8 @@ LocateImageHandle (
EFI_STATUS
EFIAPI
GetDriver (
- IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
- IN OUT EFI_HANDLE *DriverImageHandle
+ IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN OUT EFI_HANDLE *DriverImageHandle
)
{
PCI_IO_DEVICE *PciIoDevice;
@@ -103,12 +105,12 @@ GetDriver (
Override = NULL;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS (This);
- ReturnNext = (BOOLEAN) (*DriverImageHandle == NULL);
+ ReturnNext = (BOOLEAN)(*DriverImageHandle == NULL);
for ( Link = GetFirstNode (&PciIoDevice->OptionRomDriverList)
- ; !IsNull (&PciIoDevice->OptionRomDriverList, Link)
- ; Link = GetNextNode (&PciIoDevice->OptionRomDriverList, Link)
- ) {
-
+ ; !IsNull (&PciIoDevice->OptionRomDriverList, Link)
+ ; Link = GetNextNode (&PciIoDevice->OptionRomDriverList, Link)
+ )
+ {
Override = DRIVER_OVERRIDE_FROM_LINK (Link);
if (ReturnNext) {
@@ -159,12 +161,12 @@ GetDriver (
**/
EFI_STATUS
AddDriver (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN EFI_HANDLE DriverImageHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *DriverImagePath
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN EFI_HANDLE DriverImageHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *DriverImagePath
)
{
- PCI_DRIVER_OVERRIDE_LIST *Node;
+ PCI_DRIVER_OVERRIDE_LIST *Node;
//
// Caller should pass in either Image Handle or Image Path, but not both.
@@ -182,7 +184,6 @@ AddDriver (
InsertTailList (&PciIoDevice->OptionRomDriverList, &Node->Link);
- PciIoDevice->BusOverride = TRUE;
+ PciIoDevice->BusOverride = TRUE;
return EFI_SUCCESS;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
index 03447a59c0..78d13d6482 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
@@ -6,23 +6,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _EFI_PCI_DRIVER_OVERRRIDE_H_
#define _EFI_PCI_DRIVER_OVERRRIDE_H_
-#define DRIVER_OVERRIDE_SIGNATURE SIGNATURE_32 ('d', 'r', 'o', 'v')
+#define DRIVER_OVERRIDE_SIGNATURE SIGNATURE_32 ('d', 'r', 'o', 'v')
//
// PCI driver override driver image list
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
- EFI_HANDLE DriverImageHandle;
- EFI_DEVICE_PATH_PROTOCOL *DriverImagePath;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+ EFI_HANDLE DriverImageHandle;
+ EFI_DEVICE_PATH_PROTOCOL *DriverImagePath;
} PCI_DRIVER_OVERRIDE_LIST;
-
#define DRIVER_OVERRIDE_FROM_LINK(a) \
CR (a, PCI_DRIVER_OVERRIDE_LIST, Link, DRIVER_OVERRIDE_SIGNATURE)
@@ -34,7 +32,7 @@ typedef struct {
**/
VOID
InitializePciDriverOverrideInstance (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -51,12 +49,11 @@ InitializePciDriverOverrideInstance (
**/
EFI_STATUS
AddDriver (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN EFI_HANDLE DriverImageHandle,
- IN EFI_DEVICE_PATH_PROTOCOL *DriverImagePath
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN EFI_HANDLE DriverImageHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *DriverImagePath
);
-
/**
Uses a bus specific algorithm to retrieve a driver image handle for a controller.
@@ -76,8 +73,8 @@ AddDriver (
EFI_STATUS
EFIAPI
GetDriver (
- IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
- IN OUT EFI_HANDLE *DriverImageHandle
+ IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN OUT EFI_HANDLE *DriverImageHandle
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
index 99f8642f13..3f8c6e6da7 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
@@ -22,8 +22,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PciEnumerator (
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE HostBridgeHandle
)
{
EFI_STATUS Status;
@@ -35,7 +35,7 @@ PciEnumerator (
Status = gBS->OpenProtocol (
HostBridgeHandle,
&gEfiPciHostBridgeResourceAllocationProtocolGuid,
- (VOID **) &PciResAlloc,
+ (VOID **)&PciResAlloc,
gPciBusDriverBinding.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -117,22 +117,22 @@ PciRootBridgeEnumerator (
IN PCI_IO_DEVICE *RootBridgeDev
)
{
- EFI_STATUS Status;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration1;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration2;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration3;
- UINT8 SubBusNumber;
- UINT8 StartBusNumber;
- UINT8 PaddedBusRange;
- EFI_HANDLE RootBridgeHandle;
- UINT8 Desc;
- UINT64 AddrLen;
- UINT64 AddrRangeMin;
-
- SubBusNumber = 0;
- StartBusNumber = 0;
- PaddedBusRange = 0;
+ EFI_STATUS Status;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration1;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration2;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration3;
+ UINT8 SubBusNumber;
+ UINT8 StartBusNumber;
+ UINT8 PaddedBusRange;
+ EFI_HANDLE RootBridgeHandle;
+ UINT8 Desc;
+ UINT64 AddrLen;
+ UINT64 AddrRangeMin;
+
+ SubBusNumber = 0;
+ StartBusNumber = 0;
+ PaddedBusRange = 0;
//
// Get the root bridge handle
@@ -151,16 +151,17 @@ PciRootBridgeEnumerator (
Status = PciResAlloc->StartBusEnumeration (
PciResAlloc,
RootBridgeHandle,
- (VOID **) &Configuration
+ (VOID **)&Configuration
);
if (EFI_ERROR (Status)) {
return Status;
}
- if (Configuration == NULL || Configuration->Desc == ACPI_END_TAG_DESCRIPTOR) {
+ if ((Configuration == NULL) || (Configuration->Desc == ACPI_END_TAG_DESCRIPTOR)) {
return EFI_INVALID_PARAMETER;
}
+
RootBridgeDev->BusNumberRanges = Configuration;
//
@@ -173,16 +174,17 @@ PciRootBridgeEnumerator (
Configuration2 = Configuration3;
}
}
+
//
// All other fields other than AddrRangeMin and AddrLen are ignored in a descriptor,
// so only need to swap these two fields.
//
if (Configuration2 != Configuration1) {
- AddrRangeMin = Configuration1->AddrRangeMin;
+ AddrRangeMin = Configuration1->AddrRangeMin;
Configuration1->AddrRangeMin = Configuration2->AddrRangeMin;
Configuration2->AddrRangeMin = AddrRangeMin;
- AddrLen = Configuration1->AddrLen;
+ AddrLen = Configuration1->AddrLen;
Configuration1->AddrLen = Configuration2->AddrLen;
Configuration2->AddrLen = AddrLen;
}
@@ -191,7 +193,7 @@ PciRootBridgeEnumerator (
//
// Get the bus number to start with
//
- StartBusNumber = (UINT8) (Configuration->AddrRangeMin);
+ StartBusNumber = (UINT8)(Configuration->AddrRangeMin);
//
// Initialize the subordinate bus number
@@ -204,23 +206,22 @@ PciRootBridgeEnumerator (
ResetAllPpbBusNumber (
RootBridgeDev,
StartBusNumber
- );
+ );
//
// Assign bus number
//
Status = PciScanBus (
- RootBridgeDev,
- StartBusNumber,
- &SubBusNumber,
- &PaddedBusRange
- );
+ RootBridgeDev,
+ StartBusNumber,
+ &SubBusNumber,
+ &PaddedBusRange
+ );
if (EFI_ERROR (Status)) {
return Status;
}
-
//
// Assign max bus number scanned
//
@@ -237,14 +238,15 @@ PciRootBridgeEnumerator (
while (Configuration->AddrRangeMin + Configuration->AddrLen - 1 < SubBusNumber) {
Configuration++;
}
- AddrLen = Configuration->AddrLen;
+
+ AddrLen = Configuration->AddrLen;
Configuration->AddrLen = SubBusNumber - Configuration->AddrRangeMin + 1;
//
// Save the Desc field of the next descriptor. Mark the next descriptor as an END descriptor.
//
Configuration++;
- Desc = Configuration->Desc;
+ Desc = Configuration->Desc;
Configuration->Desc = ACPI_END_TAG_DESCRIPTOR;
//
@@ -259,7 +261,7 @@ PciRootBridgeEnumerator (
//
// Restore changed fields
//
- Configuration->Desc = Desc;
+ Configuration->Desc = Desc;
(Configuration - 1)->AddrLen = AddrLen;
return Status;
@@ -276,13 +278,13 @@ PciRootBridgeEnumerator (
**/
VOID
ProcessOptionRom (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT64 RomBase,
- IN UINT64 MaxLength
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT64 RomBase,
+ IN UINT64 MaxLength
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
//
// Go through bridges to reach all devices
@@ -291,15 +293,13 @@ ProcessOptionRom (
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (!IsListEmpty (&Temp->ChildList)) {
-
//
// Go further to process the option rom under this bridge
//
ProcessOptionRom (Temp, RomBase, MaxLength);
}
- if (Temp->RomSize != 0 && Temp->RomSize <= MaxLength) {
-
+ if ((Temp->RomSize != 0) && (Temp->RomSize <= MaxLength)) {
//
// Load and process the option rom
//
@@ -323,25 +323,25 @@ ProcessOptionRom (
**/
EFI_STATUS
PciAssignBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- OUT UINT8 *SubBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ OUT UINT8 *SubBusNumber
)
{
- EFI_STATUS Status;
- PCI_TYPE00 Pci;
- UINT8 Device;
- UINT8 Func;
- UINT64 Address;
- UINTN SecondBus;
- UINT16 Register;
- UINT8 Register8;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_STATUS Status;
+ PCI_TYPE00 Pci;
+ UINT8 Device;
+ UINT8 Func;
+ UINT64 Address;
+ UINTN SecondBus;
+ UINT16 Register;
+ UINT8 Register8;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = Bridge->PciRootBridgeIo;
- SecondBus = 0;
- Register = 0;
+ SecondBus = 0;
+ Register = 0;
*SubBusNumber = StartBusNumber;
@@ -350,19 +350,18 @@ PciAssignBusNumber (
//
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
-
//
// Check to see whether a pci device is present
//
Status = PciDevicePresent (
- PciRootBridgeIo,
- &Pci,
- StartBusNumber,
- Device,
- Func
- );
-
- if (EFI_ERROR (Status) && Func == 0) {
+ PciRootBridgeIo,
+ &Pci,
+ StartBusNumber,
+ Device,
+ Func
+ );
+
+ if (EFI_ERROR (Status) && (Func == 0)) {
//
// go to next device if there is no Function 0
//
@@ -370,8 +369,8 @@ PciAssignBusNumber (
}
if (!EFI_ERROR (Status) &&
- (IS_PCI_BRIDGE (&Pci) || IS_CARDBUS_BRIDGE (&Pci))) {
-
+ (IS_PCI_BRIDGE (&Pci) || IS_CARDBUS_BRIDGE (&Pci)))
+ {
//
// Reserved one bus for cardbus bridge
//
@@ -379,11 +378,12 @@ PciAssignBusNumber (
if (EFI_ERROR (Status)) {
return Status;
}
+
SecondBus = *SubBusNumber;
- Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
+ Register = (UINT16)((SecondBus << 8) | (UINT16)StartBusNumber);
- Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
+ Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
Status = PciRootBridgeIo->Pci.Write (
PciRootBridgeIo,
@@ -397,32 +397,31 @@ PciAssignBusNumber (
// Initialize SubBusNumber to SecondBus
//
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
- Status = PciRootBridgeIo->Pci.Write (
- PciRootBridgeIo,
- EfiPciWidthUint8,
- Address,
- 1,
- SubBusNumber
- );
+ Status = PciRootBridgeIo->Pci.Write (
+ PciRootBridgeIo,
+ EfiPciWidthUint8,
+ Address,
+ 1,
+ SubBusNumber
+ );
//
// If it is PPB, resursively search down this bridge
//
if (IS_PCI_BRIDGE (&Pci)) {
-
Register8 = 0xFF;
- Status = PciRootBridgeIo->Pci.Write (
- PciRootBridgeIo,
- EfiPciWidthUint8,
- Address,
- 1,
- &Register8
- );
+ Status = PciRootBridgeIo->Pci.Write (
+ PciRootBridgeIo,
+ EfiPciWidthUint8,
+ Address,
+ 1,
+ &Register8
+ );
Status = PciAssignBusNumber (
- Bridge,
- (UINT8) (SecondBus),
- SubBusNumber
- );
+ Bridge,
+ (UINT8)(SecondBus),
+ SubBusNumber
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -441,11 +440,9 @@ PciAssignBusNumber (
1,
SubBusNumber
);
-
}
- if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
-
+ if ((Func == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
//
// Skip sub functions, this is not a multi function device
//
@@ -470,16 +467,16 @@ PciAssignBusNumber (
**/
EFI_STATUS
DetermineRootBridgeAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
- IN PCI_IO_DEVICE *RootBridgeDev
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
+ IN PCI_IO_DEVICE *RootBridgeDev
)
{
UINT64 Attributes;
EFI_STATUS Status;
EFI_HANDLE RootBridgeHandle;
- Attributes = 0;
- RootBridgeHandle = RootBridgeDev->Handle;
+ Attributes = 0;
+ RootBridgeHandle = RootBridgeDev->Handle;
//
// Get root bridge attribute by calling into pci host bridge resource allocation protocol
@@ -524,13 +521,13 @@ DetermineRootBridgeAttributes (
**/
UINT32
GetMaxOptionRomSize (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
- UINT32 MaxOptionRomSize;
- UINT32 TempOptionRomSize;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
+ UINT32 MaxOptionRomSize;
+ UINT32 TempOptionRomSize;
MaxOptionRomSize = 0;
@@ -541,7 +538,6 @@ GetMaxOptionRomSize (
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (!IsListEmpty (&Temp->ChildList)) {
-
//
// Get max option rom size under this bridge
//
@@ -554,9 +550,7 @@ GetMaxOptionRomSize (
if (Temp->RomSize > TempOptionRomSize) {
TempOptionRomSize = Temp->RomSize;
}
-
} else {
-
//
// For devices get the rom size directly
//
@@ -588,17 +582,16 @@ GetMaxOptionRomSize (
**/
EFI_STATUS
PciHostBridgeDeviceAttribute (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
)
{
- EFI_HANDLE RootBridgeHandle;
- PCI_IO_DEVICE *RootBridgeDev;
- EFI_STATUS Status;
+ EFI_HANDLE RootBridgeHandle;
+ PCI_IO_DEVICE *RootBridgeDev;
+ EFI_STATUS Status;
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
-
//
// Get RootBridg Device by handle
//
@@ -615,7 +608,6 @@ PciHostBridgeDeviceAttribute (
if (EFI_ERROR (Status)) {
return Status;
}
-
}
return EFI_SUCCESS;
@@ -642,58 +634,57 @@ GetResourceAllocationStatus (
OUT UINT64 *PMem64ResStatus
)
{
- UINT8 *Temp;
- UINT64 ResStatus;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ACPIAddressDesc;
+ UINT8 *Temp;
+ UINT64 ResStatus;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ACPIAddressDesc;
- Temp = (UINT8 *) AcpiConfig;
+ Temp = (UINT8 *)AcpiConfig;
while (*Temp == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
-
- ACPIAddressDesc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp;
- ResStatus = ACPIAddressDesc->AddrTranslationOffset;
+ ACPIAddressDesc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp;
+ ResStatus = ACPIAddressDesc->AddrTranslationOffset;
switch (ACPIAddressDesc->ResType) {
- case 0:
- if (ACPIAddressDesc->AddrSpaceGranularity == 32) {
- if (ACPIAddressDesc->SpecificFlag == 0x06) {
- //
- // Pmem32
- //
- *PMem32ResStatus = ResStatus;
- } else {
- //
- // Mem32
- //
- *Mem32ResStatus = ResStatus;
+ case 0:
+ if (ACPIAddressDesc->AddrSpaceGranularity == 32) {
+ if (ACPIAddressDesc->SpecificFlag == 0x06) {
+ //
+ // Pmem32
+ //
+ *PMem32ResStatus = ResStatus;
+ } else {
+ //
+ // Mem32
+ //
+ *Mem32ResStatus = ResStatus;
+ }
}
- }
- if (ACPIAddressDesc->AddrSpaceGranularity == 64) {
- if (ACPIAddressDesc->SpecificFlag == 0x06) {
- //
- // PMem64
- //
- *PMem64ResStatus = ResStatus;
- } else {
- //
- // Mem64
- //
- *Mem64ResStatus = ResStatus;
+ if (ACPIAddressDesc->AddrSpaceGranularity == 64) {
+ if (ACPIAddressDesc->SpecificFlag == 0x06) {
+ //
+ // PMem64
+ //
+ *PMem64ResStatus = ResStatus;
+ } else {
+ //
+ // Mem64
+ //
+ *Mem64ResStatus = ResStatus;
+ }
}
- }
- break;
+ break;
- case 1:
- //
- // Io
- //
- *IoResStatus = ResStatus;
- break;
+ case 1:
+ //
+ // Io
+ //
+ *IoResStatus = ResStatus;
+ break;
- default:
- break;
+ default:
+ break;
}
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
@@ -711,18 +702,19 @@ GetResourceAllocationStatus (
**/
EFI_STATUS
RejectPciDevice (
- IN PCI_IO_DEVICE *PciDevice
+ IN PCI_IO_DEVICE *PciDevice
)
{
- PCI_IO_DEVICE *Bridge;
- PCI_IO_DEVICE *Temp;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Bridge;
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
//
// Remove the padding resource from a bridge
//
- if ( IS_PCI_BRIDGE(&PciDevice->Pci) &&
- PciDevice->ResourcePaddingDescriptors != NULL ) {
+ if ( IS_PCI_BRIDGE (&PciDevice->Pci) &&
+ (PciDevice->ResourcePaddingDescriptors != NULL))
+ {
FreePool (PciDevice->ResourcePaddingDescriptors);
PciDevice->ResourcePaddingDescriptors = NULL;
return EFI_SUCCESS;
@@ -782,10 +774,10 @@ RejectPciDevice (
**/
BOOLEAN
IsRejectiveDevice (
- IN PCI_RESOURCE_NODE *PciResNode
+ IN PCI_RESOURCE_NODE *PciResNode
)
{
- PCI_IO_DEVICE *Temp;
+ PCI_IO_DEVICE *Temp;
Temp = PciResNode->PciDev;
@@ -831,16 +823,16 @@ IsRejectiveDevice (
**/
PCI_RESOURCE_NODE *
GetLargerConsumerDevice (
- IN PCI_RESOURCE_NODE *PciResNode1,
- IN PCI_RESOURCE_NODE *PciResNode2
+ IN PCI_RESOURCE_NODE *PciResNode1,
+ IN PCI_RESOURCE_NODE *PciResNode2
)
{
if (PciResNode2 == NULL) {
return PciResNode1;
}
- if ((IS_PCI_BRIDGE(&(PciResNode2->PciDev->Pci)) || (PciResNode2->PciDev->Parent == NULL)) \
- && (PciResNode2->ResourceUsage != PciResUsagePadding) )
+ if ( (IS_PCI_BRIDGE (&(PciResNode2->PciDev->Pci)) || (PciResNode2->PciDev->Parent == NULL)) \
+ && (PciResNode2->ResourceUsage != PciResUsagePadding))
{
return PciResNode1;
}
@@ -856,7 +848,6 @@ GetLargerConsumerDevice (
return PciResNode2;
}
-
/**
Get the max resource consumer in the host resource pool.
@@ -867,19 +858,18 @@ GetLargerConsumerDevice (
**/
PCI_RESOURCE_NODE *
GetMaxResourceConsumerDevice (
- IN PCI_RESOURCE_NODE *ResPool
+ IN PCI_RESOURCE_NODE *ResPool
)
{
- PCI_RESOURCE_NODE *Temp;
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *PciResNode;
- PCI_RESOURCE_NODE *PPBResNode;
+ PCI_RESOURCE_NODE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *PciResNode;
+ PCI_RESOURCE_NODE *PPBResNode;
- PciResNode = NULL;
+ PciResNode = NULL;
CurrentLink = ResPool->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &ResPool->ChildList) {
-
Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
if (!IsRejectiveDevice (Temp)) {
@@ -887,11 +877,11 @@ GetMaxResourceConsumerDevice (
continue;
}
- if ((IS_PCI_BRIDGE (&(Temp->PciDev->Pci)) || (Temp->PciDev->Parent == NULL)) \
- && (Temp->ResourceUsage != PciResUsagePadding))
+ if ( (IS_PCI_BRIDGE (&(Temp->PciDev->Pci)) || (Temp->PciDev->Parent == NULL)) \
+ && (Temp->ResourceUsage != PciResUsagePadding))
{
- PPBResNode = GetMaxResourceConsumerDevice (Temp);
- PciResNode = GetLargerConsumerDevice (PciResNode, PPBResNode);
+ PPBResNode = GetMaxResourceConsumerDevice (Temp);
+ PciResNode = GetLargerConsumerDevice (PciResNode, PPBResNode);
} else {
PciResNode = GetLargerConsumerDevice (PciResNode, Temp);
}
@@ -922,49 +912,48 @@ GetMaxResourceConsumerDevice (
**/
EFI_STATUS
PciHostBridgeAdjustAllocation (
- IN PCI_RESOURCE_NODE *IoPool,
- IN PCI_RESOURCE_NODE *Mem32Pool,
- IN PCI_RESOURCE_NODE *PMem32Pool,
- IN PCI_RESOURCE_NODE *Mem64Pool,
- IN PCI_RESOURCE_NODE *PMem64Pool,
- IN UINT64 IoResStatus,
- IN UINT64 Mem32ResStatus,
- IN UINT64 PMem32ResStatus,
- IN UINT64 Mem64ResStatus,
- IN UINT64 PMem64ResStatus
+ IN PCI_RESOURCE_NODE *IoPool,
+ IN PCI_RESOURCE_NODE *Mem32Pool,
+ IN PCI_RESOURCE_NODE *PMem32Pool,
+ IN PCI_RESOURCE_NODE *Mem64Pool,
+ IN PCI_RESOURCE_NODE *PMem64Pool,
+ IN UINT64 IoResStatus,
+ IN UINT64 Mem32ResStatus,
+ IN UINT64 PMem32ResStatus,
+ IN UINT64 Mem64ResStatus,
+ IN UINT64 PMem64ResStatus
)
{
- BOOLEAN AllocationAjusted;
- PCI_RESOURCE_NODE *PciResNode;
- PCI_RESOURCE_NODE *ResPool[5];
- PCI_IO_DEVICE *RemovedPciDev[5];
- UINT64 ResStatus[5];
- UINTN RemovedPciDevNum;
- UINTN DevIndex;
- UINTN ResType;
- EFI_STATUS Status;
- EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData;
+ BOOLEAN AllocationAjusted;
+ PCI_RESOURCE_NODE *PciResNode;
+ PCI_RESOURCE_NODE *ResPool[5];
+ PCI_IO_DEVICE *RemovedPciDev[5];
+ UINT64 ResStatus[5];
+ UINTN RemovedPciDevNum;
+ UINTN DevIndex;
+ UINTN ResType;
+ EFI_STATUS Status;
+ EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData;
PciResNode = NULL;
ZeroMem (RemovedPciDev, 5 * sizeof (PCI_IO_DEVICE *));
- RemovedPciDevNum = 0;
+ RemovedPciDevNum = 0;
- ResPool[0] = IoPool;
- ResPool[1] = Mem32Pool;
- ResPool[2] = PMem32Pool;
- ResPool[3] = Mem64Pool;
- ResPool[4] = PMem64Pool;
+ ResPool[0] = IoPool;
+ ResPool[1] = Mem32Pool;
+ ResPool[2] = PMem32Pool;
+ ResPool[3] = Mem64Pool;
+ ResPool[4] = PMem64Pool;
- ResStatus[0] = IoResStatus;
- ResStatus[1] = Mem32ResStatus;
- ResStatus[2] = PMem32ResStatus;
- ResStatus[3] = Mem64ResStatus;
- ResStatus[4] = PMem64ResStatus;
+ ResStatus[0] = IoResStatus;
+ ResStatus[1] = Mem32ResStatus;
+ ResStatus[2] = PMem32ResStatus;
+ ResStatus[3] = Mem64ResStatus;
+ ResStatus[4] = PMem64ResStatus;
AllocationAjusted = FALSE;
for (ResType = 0; ResType < 5; ResType++) {
-
if (ResStatus[ResType] == EFI_RESOURCE_SATISFIED) {
continue;
}
@@ -1005,7 +994,9 @@ PciHostBridgeAdjustAllocation (
DEBUG ((
DEBUG_ERROR,
"PciBus: [%02x|%02x|%02x] was rejected due to resource confliction.\n",
- PciResNode->PciDev->BusNumber, PciResNode->PciDev->DeviceNumber, PciResNode->PciDev->FunctionNumber
+ PciResNode->PciDev->BusNumber,
+ PciResNode->PciDev->DeviceNumber,
+ PciResNode->PciDev->FunctionNumber
));
//
@@ -1015,16 +1006,16 @@ PciHostBridgeAdjustAllocation (
// Have no way to get ReqRes, AllocRes & Bar here
//
ZeroMem (&AllocFailExtendedData, sizeof (AllocFailExtendedData));
- AllocFailExtendedData.DevicePathSize = (UINT16) sizeof (EFI_DEVICE_PATH_PROTOCOL);
- AllocFailExtendedData.DevicePath = (UINT8 *) PciResNode->PciDev->DevicePath;
+ AllocFailExtendedData.DevicePathSize = (UINT16)sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ AllocFailExtendedData.DevicePath = (UINT8 *)PciResNode->PciDev->DevicePath;
AllocFailExtendedData.Bar = PciResNode->Bar;
REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
- EFI_PROGRESS_CODE,
- EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT,
- (VOID *) &AllocFailExtendedData,
- sizeof (AllocFailExtendedData)
- );
+ EFI_PROGRESS_CODE,
+ EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT,
+ (VOID *)&AllocFailExtendedData,
+ sizeof (AllocFailExtendedData)
+ );
//
// Add it to the array and indicate at least a device has been rejected
@@ -1033,6 +1024,7 @@ PciHostBridgeAdjustAllocation (
AllocationAjusted = TRUE;
}
}
+
//
// End for
//
@@ -1071,16 +1063,16 @@ ConstructAcpiResourceRequestor (
OUT VOID **Config
)
{
- UINT8 NumConfig;
- UINT8 Aperture;
- UINT8 *Configuration;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
- EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
+ UINT8 NumConfig;
+ UINT8 Aperture;
+ UINT8 *Configuration;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
+ EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
NumConfig = 0;
Aperture = 0;
- *Config = NULL;
+ *Config = NULL;
//
// if there is io request, add to the io aperture
@@ -1123,7 +1115,6 @@ ConstructAcpiResourceRequestor (
}
if (NumConfig != 0) {
-
//
// If there is at least one type of resource request,
// allocate a acpi resource node
@@ -1133,18 +1124,18 @@ ConstructAcpiResourceRequestor (
return EFI_OUT_OF_RESOURCES;
}
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+ Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration;
//
// Deal with io aperture
//
if ((Aperture & 0x01) != 0) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Ptr->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
//
// Io
//
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
//
// non ISA range
//
@@ -1154,16 +1145,17 @@ ConstructAcpiResourceRequestor (
Ptr++;
}
+
//
// Deal with mem32 aperture
//
if ((Aperture & 0x02) != 0) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Ptr->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
//
// Mem
//
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
//
// Nonprefechable
//
@@ -1172,8 +1164,8 @@ ConstructAcpiResourceRequestor (
// 32 bit
//
Ptr->AddrSpaceGranularity = 32;
- Ptr->AddrLen = Mem32Node->Length;
- Ptr->AddrRangeMax = Mem32Node->Alignment;
+ Ptr->AddrLen = Mem32Node->Length;
+ Ptr->AddrRangeMax = Mem32Node->Alignment;
Ptr++;
}
@@ -1182,12 +1174,12 @@ ConstructAcpiResourceRequestor (
// Deal with Pmem32 aperture
//
if ((Aperture & 0x04) != 0) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Ptr->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
//
// Mem
//
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
//
// prefechable
//
@@ -1196,21 +1188,22 @@ ConstructAcpiResourceRequestor (
// 32 bit
//
Ptr->AddrSpaceGranularity = 32;
- Ptr->AddrLen = PMem32Node->Length;
- Ptr->AddrRangeMax = PMem32Node->Alignment;
+ Ptr->AddrLen = PMem32Node->Length;
+ Ptr->AddrRangeMax = PMem32Node->Alignment;
Ptr++;
}
+
//
// Deal with mem64 aperture
//
if ((Aperture & 0x08) != 0) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Ptr->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
//
// Mem
//
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
//
// nonprefechable
//
@@ -1219,21 +1212,22 @@ ConstructAcpiResourceRequestor (
// 64 bit
//
Ptr->AddrSpaceGranularity = 64;
- Ptr->AddrLen = Mem64Node->Length;
- Ptr->AddrRangeMax = Mem64Node->Alignment;
+ Ptr->AddrLen = Mem64Node->Length;
+ Ptr->AddrRangeMax = Mem64Node->Alignment;
Ptr++;
}
+
//
// Deal with Pmem64 aperture
//
if ((Aperture & 0x10) != 0) {
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Ptr->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
//
// Mem
//
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
//
// prefechable
//
@@ -1242,8 +1236,8 @@ ConstructAcpiResourceRequestor (
// 64 bit
//
Ptr->AddrSpaceGranularity = 64;
- Ptr->AddrLen = PMem64Node->Length;
- Ptr->AddrRangeMax = PMem64Node->Alignment;
+ Ptr->AddrLen = PMem64Node->Length;
+ Ptr->AddrRangeMax = PMem64Node->Alignment;
Ptr++;
}
@@ -1251,13 +1245,11 @@ ConstructAcpiResourceRequestor (
//
// put the checksum
//
- PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) Ptr;
-
- PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
- PtrEnd->Checksum = 0;
+ PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr;
+ PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
+ PtrEnd->Checksum = 0;
} else {
-
//
// If there is no resource request
//
@@ -1266,9 +1258,9 @@ ConstructAcpiResourceRequestor (
return EFI_OUT_OF_RESOURCES;
}
- PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Configuration);
- PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
- PtrEnd->Checksum = 0;
+ PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *)(Configuration);
+ PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
+ PtrEnd->Checksum = 0;
}
*Config = Configuration;
@@ -1297,9 +1289,9 @@ GetResourceBase (
OUT UINT64 *PMem64Base
)
{
- UINT8 *Temp;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
- UINT64 ResStatus;
+ UINT8 *Temp;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
+ UINT64 ResStatus;
ASSERT (Config != NULL);
@@ -1309,58 +1301,57 @@ GetResourceBase (
*Mem64Base = 0xFFFFFFFFFFFFFFFFULL;
*PMem64Base = 0xFFFFFFFFFFFFFFFFULL;
- Temp = (UINT8 *) Config;
+ Temp = (UINT8 *)Config;
while (*Temp == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
-
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp;
+ Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp;
ResStatus = Ptr->AddrTranslationOffset;
if (ResStatus == EFI_RESOURCE_SATISFIED) {
-
switch (Ptr->ResType) {
-
- //
- // Memory type aperture
- //
- case 0:
-
//
- // Check to see the granularity
+ // Memory type aperture
//
- if (Ptr->AddrSpaceGranularity == 32) {
- if ((Ptr->SpecificFlag & 0x06) != 0) {
- *PMem32Base = Ptr->AddrRangeMin;
- } else {
- *Mem32Base = Ptr->AddrRangeMin;
+ case 0:
+
+ //
+ // Check to see the granularity
+ //
+ if (Ptr->AddrSpaceGranularity == 32) {
+ if ((Ptr->SpecificFlag & 0x06) != 0) {
+ *PMem32Base = Ptr->AddrRangeMin;
+ } else {
+ *Mem32Base = Ptr->AddrRangeMin;
+ }
}
- }
- if (Ptr->AddrSpaceGranularity == 64) {
- if ((Ptr->SpecificFlag & 0x06) != 0) {
- *PMem64Base = Ptr->AddrRangeMin;
- } else {
- *Mem64Base = Ptr->AddrRangeMin;
+ if (Ptr->AddrSpaceGranularity == 64) {
+ if ((Ptr->SpecificFlag & 0x06) != 0) {
+ *PMem64Base = Ptr->AddrRangeMin;
+ } else {
+ *Mem64Base = Ptr->AddrRangeMin;
+ }
}
- }
- break;
- case 1:
+ break;
- //
- // Io type aperture
- //
- *IoBase = Ptr->AddrRangeMin;
- break;
+ case 1:
- default:
- break;
+ //
+ // Io type aperture
+ //
+ *IoBase = Ptr->AddrRangeMin;
+ break;
+ default:
+ break;
}
+
//
// End switch
//
}
+
//
// End for
//
@@ -1380,28 +1371,28 @@ GetResourceBase (
**/
EFI_STATUS
PciBridgeEnumerator (
- IN PCI_IO_DEVICE *BridgeDev
+ IN PCI_IO_DEVICE *BridgeDev
)
{
- UINT8 SubBusNumber;
- UINT8 StartBusNumber;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
+ UINT8 SubBusNumber;
+ UINT8 StartBusNumber;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
- SubBusNumber = 0;
- StartBusNumber = 0;
- PciIo = &(BridgeDev->PciIo);
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x19, 1, &StartBusNumber);
+ SubBusNumber = 0;
+ StartBusNumber = 0;
+ PciIo = &(BridgeDev->PciIo);
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x19, 1, &StartBusNumber);
if (EFI_ERROR (Status)) {
return Status;
}
Status = PciAssignBusNumber (
- BridgeDev,
- StartBusNumber,
- &SubBusNumber
- );
+ BridgeDev,
+ StartBusNumber,
+ &SubBusNumber
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -1426,7 +1417,6 @@ PciBridgeEnumerator (
}
return EFI_SUCCESS;
-
}
/**
@@ -1443,17 +1433,17 @@ PciBridgeResourceAllocator (
IN PCI_IO_DEVICE *Bridge
)
{
- PCI_RESOURCE_NODE *IoBridge;
- PCI_RESOURCE_NODE *Mem32Bridge;
- PCI_RESOURCE_NODE *PMem32Bridge;
- PCI_RESOURCE_NODE *Mem64Bridge;
- PCI_RESOURCE_NODE *PMem64Bridge;
- UINT64 IoBase;
- UINT64 Mem32Base;
- UINT64 PMem32Base;
- UINT64 Mem64Base;
- UINT64 PMem64Base;
- EFI_STATUS Status;
+ PCI_RESOURCE_NODE *IoBridge;
+ PCI_RESOURCE_NODE *Mem32Bridge;
+ PCI_RESOURCE_NODE *PMem32Bridge;
+ PCI_RESOURCE_NODE *Mem64Bridge;
+ PCI_RESOURCE_NODE *PMem64Bridge;
+ UINT64 IoBase;
+ UINT64 Mem32Base;
+ UINT64 PMem32Base;
+ UINT64 Mem64Base;
+ UINT64 PMem64Base;
+ EFI_STATUS Status;
IoBridge = CreateResourceNode (
Bridge,
@@ -1596,12 +1586,12 @@ PciBridgeResourceAllocator (
**/
EFI_STATUS
GetResourceBaseFromBridge (
- IN PCI_IO_DEVICE *Bridge,
- OUT UINT64 *IoBase,
- OUT UINT64 *Mem32Base,
- OUT UINT64 *PMem32Base,
- OUT UINT64 *Mem64Base,
- OUT UINT64 *PMem64Base
+ IN PCI_IO_DEVICE *Bridge,
+ OUT UINT64 *IoBase,
+ OUT UINT64 *Mem32Base,
+ OUT UINT64 *PMem32Base,
+ OUT UINT64 *Mem64Base,
+ OUT UINT64 *PMem64Base
)
{
if (!Bridge->Allocated) {
@@ -1615,7 +1605,6 @@ GetResourceBaseFromBridge (
*PMem64Base = gAllOne;
if (IS_PCI_BRIDGE (&Bridge->Pci)) {
-
if (Bridge->PciBar[PPB_IO_RANGE].Length > 0) {
*IoBase = Bridge->PciBar[PPB_IO_RANGE].BaseAddress;
}
@@ -1633,7 +1622,6 @@ GetResourceBaseFromBridge (
} else {
*PMem64Base = gAllOne;
}
-
}
if (IS_CARDBUS_BRIDGE (&Bridge->Pci)) {
@@ -1735,17 +1723,17 @@ GetResourceBaseFromBridge (
**/
EFI_STATUS
NotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
- EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
)
{
- EFI_HANDLE HostBridgeHandle;
- EFI_HANDLE RootBridgeHandle;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- EFI_STATUS Status;
+ EFI_HANDLE HostBridgeHandle;
+ EFI_HANDLE RootBridgeHandle;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_STATUS Status;
- HostBridgeHandle = NULL;
- RootBridgeHandle = NULL;
+ HostBridgeHandle = NULL;
+ RootBridgeHandle = NULL;
if (gPciPlatformProtocol != NULL) {
//
// Get Host Bridge Handle.
@@ -1758,7 +1746,7 @@ NotifyPhase (
Status = gBS->HandleProtocol (
RootBridgeHandle,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo
+ (VOID **)&PciRootBridgeIo
);
if (EFI_ERROR (Status)) {
@@ -1776,7 +1764,7 @@ NotifyPhase (
Phase,
ChipsetEntry
);
- } else if (gPciOverrideProtocol != NULL){
+ } else if (gPciOverrideProtocol != NULL) {
//
// Get Host Bridge Handle.
//
@@ -1788,7 +1776,7 @@ NotifyPhase (
Status = gBS->HandleProtocol (
RootBridgeHandle,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo
+ (VOID **)&PciRootBridgeIo
);
if (EFI_ERROR (Status)) {
@@ -1823,7 +1811,6 @@ NotifyPhase (
Phase,
ChipsetExit
);
-
} else if (gPciOverrideProtocol != NULL) {
//
// Call PlatformPci::PhaseNotify() if the protocol is present.
@@ -1865,11 +1852,11 @@ NotifyPhase (
**/
EFI_STATUS
PreprocessController (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
)
{
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS RootBridgePciAddress;
@@ -1889,7 +1876,7 @@ PreprocessController (
Status = gBS->OpenProtocol (
HostBridgeHandle,
&gEfiPciHostBridgeResourceAllocationProtocolGuid,
- (VOID **) &PciResAlloc,
+ (VOID **)&PciResAlloc,
NULL,
NULL,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1906,7 +1893,7 @@ PreprocessController (
Bridge = Bridge->Parent;
}
- RootBridgeHandle = Bridge->Handle;
+ RootBridgeHandle = Bridge->Handle;
RootBridgePciAddress.Register = 0;
RootBridgePciAddress.Function = Func;
@@ -2002,25 +1989,25 @@ PreprocessController (
EFI_STATUS
EFIAPI
PciHotPlugRequestNotify (
- IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,
- IN EFI_PCI_HOTPLUG_OPERATION Operation,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL * RemainingDevicePath OPTIONAL,
- IN OUT UINT8 *NumberOfChildren,
- IN OUT EFI_HANDLE * ChildHandleBuffer
+ IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL *This,
+ IN EFI_PCI_HOTPLUG_OPERATION Operation,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL,
+ IN OUT UINT8 *NumberOfChildren,
+ IN OUT EFI_HANDLE *ChildHandleBuffer
)
{
- PCI_IO_DEVICE *Bridge;
- PCI_IO_DEVICE *Temp;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN Index;
- EFI_HANDLE RootBridgeHandle;
- EFI_STATUS Status;
+ PCI_IO_DEVICE *Bridge;
+ PCI_IO_DEVICE *Temp;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN Index;
+ EFI_HANDLE RootBridgeHandle;
+ EFI_STATUS Status;
//
// Check input parameter validity
//
- if ((Controller == NULL) || (NumberOfChildren == NULL)){
+ if ((Controller == NULL) || (NumberOfChildren == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -2028,7 +2015,7 @@ PciHotPlugRequestNotify (
return EFI_INVALID_PARAMETER;
}
- if (Operation == EfiPciHotPlugRequestAdd){
+ if (Operation == EfiPciHotPlugRequestAdd) {
if (ChildHandleBuffer == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -2041,7 +2028,7 @@ PciHotPlugRequestNotify (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
gPciBusDriverBinding.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -2078,7 +2065,6 @@ PciHotPlugRequestNotify (
}
if (IsListEmpty (&Bridge->ChildList)) {
-
Status = PciBridgeEnumerator (Bridge);
if (EFI_ERROR (Status)) {
@@ -2087,25 +2073,23 @@ PciHotPlugRequestNotify (
}
Status = StartPciDevicesOnBridge (
- RootBridgeHandle,
- Bridge,
- RemainingDevicePath,
- NumberOfChildren,
- ChildHandleBuffer
- );
+ RootBridgeHandle,
+ Bridge,
+ RemainingDevicePath,
+ NumberOfChildren,
+ ChildHandleBuffer
+ );
return Status;
}
if (Operation == EfiPciHotplugRequestRemove) {
-
if (*NumberOfChildren == 0) {
//
// Remove all devices on the bridge
//
RemoveAllPciDeviceOnBridge (RootBridgeHandle, Bridge);
return EFI_SUCCESS;
-
}
for (Index = 0; Index < *NumberOfChildren; Index++) {
@@ -2117,8 +2101,8 @@ PciHotPlugRequestNotify (
if (EFI_ERROR (Status)) {
return Status;
}
-
}
+
//
// End for
//
@@ -2139,13 +2123,13 @@ PciHotPlugRequestNotify (
**/
BOOLEAN
SearchHostBridgeHandle (
- IN EFI_HANDLE RootBridgeHandle
+ IN EFI_HANDLE RootBridgeHandle
)
{
- EFI_HANDLE HostBridgeHandle;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- UINTN Index;
- EFI_STATUS Status;
+ EFI_HANDLE HostBridgeHandle;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINTN Index;
+ EFI_STATUS Status;
//
// Get the rootbridge Io protocol to find the host bridge handle
@@ -2153,7 +2137,7 @@ SearchHostBridgeHandle (
Status = gBS->OpenProtocol (
RootBridgeHandle,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
gPciBusDriverBinding.DriverBindingHandle,
RootBridgeHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -2185,10 +2169,10 @@ SearchHostBridgeHandle (
**/
EFI_STATUS
AddHostBridgeEnumerator (
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE HostBridgeHandle
)
{
- UINTN Index;
+ UINTN Index;
if (HostBridgeHandle == NULL) {
return EFI_ABORTED;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
index 133454126c..2c81def04c 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
@@ -24,8 +24,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PciEnumerator (
- IN EFI_HANDLE Controller,
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE Controller,
+ IN EFI_HANDLE HostBridgeHandle
);
/**
@@ -55,9 +55,9 @@ PciRootBridgeEnumerator (
**/
VOID
ProcessOptionRom (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT64 RomBase,
- IN UINT64 MaxLength
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT64 RomBase,
+ IN UINT64 MaxLength
);
/**
@@ -73,9 +73,9 @@ ProcessOptionRom (
**/
EFI_STATUS
PciAssignBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- OUT UINT8 *SubBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ OUT UINT8 *SubBusNumber
);
/**
@@ -91,8 +91,8 @@ PciAssignBusNumber (
**/
EFI_STATUS
DetermineRootBridgeAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
- IN PCI_IO_DEVICE *RootBridgeDev
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
+ IN PCI_IO_DEVICE *RootBridgeDev
);
/**
@@ -105,7 +105,7 @@ DetermineRootBridgeAttributes (
**/
UINT32
GetMaxOptionRomSize (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
);
/**
@@ -120,7 +120,7 @@ GetMaxOptionRomSize (
**/
EFI_STATUS
PciHostBridgeDeviceAttribute (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
@@ -155,7 +155,7 @@ GetResourceAllocationStatus (
**/
EFI_STATUS
RejectPciDevice (
- IN PCI_IO_DEVICE *PciDevice
+ IN PCI_IO_DEVICE *PciDevice
);
/**
@@ -169,7 +169,7 @@ RejectPciDevice (
**/
BOOLEAN
IsRejectiveDevice (
- IN PCI_RESOURCE_NODE *PciResNode
+ IN PCI_RESOURCE_NODE *PciResNode
);
/**
@@ -183,8 +183,8 @@ IsRejectiveDevice (
**/
PCI_RESOURCE_NODE *
GetLargerConsumerDevice (
- IN PCI_RESOURCE_NODE *PciResNode1,
- IN PCI_RESOURCE_NODE *PciResNode2
+ IN PCI_RESOURCE_NODE *PciResNode1,
+ IN PCI_RESOURCE_NODE *PciResNode2
);
/**
@@ -197,7 +197,7 @@ GetLargerConsumerDevice (
**/
PCI_RESOURCE_NODE *
GetMaxResourceConsumerDevice (
- IN PCI_RESOURCE_NODE *ResPool
+ IN PCI_RESOURCE_NODE *ResPool
);
/**
@@ -220,16 +220,16 @@ GetMaxResourceConsumerDevice (
**/
EFI_STATUS
PciHostBridgeAdjustAllocation (
- IN PCI_RESOURCE_NODE *IoPool,
- IN PCI_RESOURCE_NODE *Mem32Pool,
- IN PCI_RESOURCE_NODE *PMem32Pool,
- IN PCI_RESOURCE_NODE *Mem64Pool,
- IN PCI_RESOURCE_NODE *PMem64Pool,
- IN UINT64 IoResStatus,
- IN UINT64 Mem32ResStatus,
- IN UINT64 PMem32ResStatus,
- IN UINT64 Mem64ResStatus,
- IN UINT64 PMem64ResStatus
+ IN PCI_RESOURCE_NODE *IoPool,
+ IN PCI_RESOURCE_NODE *Mem32Pool,
+ IN PCI_RESOURCE_NODE *PMem32Pool,
+ IN PCI_RESOURCE_NODE *Mem64Pool,
+ IN PCI_RESOURCE_NODE *PMem64Pool,
+ IN UINT64 IoResStatus,
+ IN UINT64 Mem32ResStatus,
+ IN UINT64 PMem32ResStatus,
+ IN UINT64 Mem64ResStatus,
+ IN UINT64 PMem64ResStatus
);
/**
@@ -292,7 +292,7 @@ GetResourceBase (
**/
EFI_STATUS
PciBridgeEnumerator (
- IN PCI_IO_DEVICE *BridgeDev
+ IN PCI_IO_DEVICE *BridgeDev
);
/**
@@ -325,12 +325,12 @@ PciBridgeResourceAllocator (
**/
EFI_STATUS
GetResourceBaseFromBridge (
- IN PCI_IO_DEVICE *Bridge,
- OUT UINT64 *IoBase,
- OUT UINT64 *Mem32Base,
- OUT UINT64 *PMem32Base,
- OUT UINT64 *Mem64Base,
- OUT UINT64 *PMem64Base
+ IN PCI_IO_DEVICE *Bridge,
+ OUT UINT64 *IoBase,
+ OUT UINT64 *Mem32Base,
+ OUT UINT64 *PMem32Base,
+ OUT UINT64 *Mem64Base,
+ OUT UINT64 *PMem64Base
);
/**
@@ -343,7 +343,7 @@ GetResourceBaseFromBridge (
**/
EFI_STATUS
PciHostBridgeP2CProcess (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
@@ -412,8 +412,8 @@ PciHostBridgeP2CProcess (
**/
EFI_STATUS
NotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
- EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
);
/**
@@ -442,11 +442,11 @@ NotifyPhase (
**/
EFI_STATUS
PreprocessController (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
);
/**
@@ -475,12 +475,12 @@ PreprocessController (
EFI_STATUS
EFIAPI
PciHotPlugRequestNotify (
- IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,
- IN EFI_PCI_HOTPLUG_OPERATION Operation,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL * RemainingDevicePath OPTIONAL,
- IN OUT UINT8 *NumberOfChildren,
- IN OUT EFI_HANDLE * ChildHandleBuffer
+ IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL *This,
+ IN EFI_PCI_HOTPLUG_OPERATION Operation,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL,
+ IN OUT UINT8 *NumberOfChildren,
+ IN OUT EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -494,7 +494,7 @@ PciHotPlugRequestNotify (
**/
BOOLEAN
SearchHostBridgeHandle (
- IN EFI_HANDLE RootBridgeHandle
+ IN EFI_HANDLE RootBridgeHandle
);
/**
@@ -509,7 +509,7 @@ SearchHostBridgeHandle (
**/
EFI_STATUS
AddHostBridgeEnumerator (
- IN EFI_HANDLE HostBridgeHandle
+ IN EFI_HANDLE HostBridgeHandle
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index 5111bd513a..ed7f2d4ac6 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -9,13 +9,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PciBus.h"
-extern CHAR16 *mBarTypeStr[];
-extern EDKII_DEVICE_SECURITY_PROTOCOL *mDeviceSecurityProtocol;
+extern CHAR16 *mBarTypeStr[];
+extern EDKII_DEVICE_SECURITY_PROTOCOL *mDeviceSecurityProtocol;
-#define OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL
-#define EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
-#define SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL
-#define DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL
+#define OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL
+#define EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
+#define SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL
+#define DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL
/**
This routine is used to check whether the pci device is present.
@@ -32,11 +32,11 @@ extern EDKII_DEVICE_SECURITY_PROTOCOL *mDeviceSecurityP
**/
EFI_STATUS
PciDevicePresent (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
- OUT PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
+ OUT PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
)
{
UINT64 Address;
@@ -58,7 +58,7 @@ PciDevicePresent (
Pci
);
- if (!EFI_ERROR (Status) && (Pci->Hdr).VendorId != 0xffff) {
+ if (!EFI_ERROR (Status) && ((Pci->Hdr).VendorId != 0xffff)) {
//
// Read the entire config header for the device
//
@@ -91,37 +91,35 @@ PciDevicePresent (
**/
EFI_STATUS
PciPciDeviceInfoCollector (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber
)
{
- EFI_STATUS Status;
- PCI_TYPE00 Pci;
- UINT8 Device;
- UINT8 Func;
- UINT8 SecBus;
- PCI_IO_DEVICE *PciIoDevice;
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ PCI_TYPE00 Pci;
+ UINT8 Device;
+ UINT8 Func;
+ UINT8 SecBus;
+ PCI_IO_DEVICE *PciIoDevice;
+ EFI_PCI_IO_PROTOCOL *PciIo;
- Status = EFI_SUCCESS;
- SecBus = 0;
+ Status = EFI_SUCCESS;
+ SecBus = 0;
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
-
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
-
//
// Check to see whether PCI device is present
//
Status = PciDevicePresent (
Bridge->PciRootBridgeIo,
&Pci,
- (UINT8) StartBusNumber,
- (UINT8) Device,
- (UINT8) Func
+ (UINT8)StartBusNumber,
+ (UINT8)Device,
+ (UINT8)Func
);
- if (EFI_ERROR (Status) && Func == 0) {
+ if (EFI_ERROR (Status) && (Func == 0)) {
//
// go to next device if there is no Function 0
//
@@ -129,11 +127,10 @@ PciPciDeviceInfoCollector (
}
if (!EFI_ERROR (Status)) {
-
//
// Call back to host bridge function
//
- PreprocessController (Bridge, (UINT8) StartBusNumber, Device, Func, EfiPciBeforeResourceCollection);
+ PreprocessController (Bridge, (UINT8)StartBusNumber, Device, Func, EfiPciBeforeResourceCollection);
//
// Collect all the information about the PCI device discovered
@@ -141,7 +138,7 @@ PciPciDeviceInfoCollector (
Status = PciSearchDevice (
Bridge,
&Pci,
- (UINT8) StartBusNumber,
+ (UINT8)StartBusNumber,
Device,
Func,
&PciIoDevice
@@ -152,13 +149,12 @@ PciPciDeviceInfoCollector (
//
//
if (!EFI_ERROR (Status) && (IS_PCI_BRIDGE (&Pci) || IS_CARDBUS_BRIDGE (&Pci))) {
-
//
// If it is PPB, we need to get the secondary bus to continue the enumeration
//
- PciIo = &(PciIoDevice->PciIo);
+ PciIo = &(PciIoDevice->PciIo);
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET, 1, &SecBus);
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET, 1, &SecBus);
if (EFI_ERROR (Status)) {
return Status;
@@ -182,20 +178,17 @@ PciPciDeviceInfoCollector (
//
Status = PciPciDeviceInfoCollector (
PciIoDevice,
- (UINT8) (SecBus)
+ (UINT8)(SecBus)
);
-
}
- if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
-
+ if ((Func == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
//
// Skip sub functions, this is not a multi function device
//
Func = PCI_MAX_FUNC;
}
}
-
}
}
@@ -218,15 +211,15 @@ PciPciDeviceInfoCollector (
**/
EFI_STATUS
PciSearchDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func,
- OUT PCI_IO_DEVICE **PciDevice
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func,
+ OUT PCI_IO_DEVICE **PciDevice
)
{
- PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = NULL;
@@ -235,12 +228,13 @@ PciSearchDevice (
"PciBus: Discovered %s @ [%02x|%02x|%02x]\n",
IS_PCI_BRIDGE (Pci) ? L"PPB" :
IS_CARDBUS_BRIDGE (Pci) ? L"P2C" :
- L"PCI",
- Bus, Device, Func
+ L"PCI",
+ Bus,
+ Device,
+ Func
));
if (!IS_PCI_BRIDGE (Pci)) {
-
if (IS_CARDBUS_BRIDGE (Pci)) {
PciIoDevice = GatherP2CInfo (
Bridge,
@@ -253,7 +247,6 @@ PciSearchDevice (
InitializeP2C (PciIoDevice);
}
} else {
-
//
// Create private data for Pci Device
//
@@ -264,11 +257,8 @@ PciSearchDevice (
Device,
Func
);
-
}
-
} else {
-
//
// Create private data for PPB
//
@@ -305,15 +295,11 @@ PciSearchDevice (
// Detect this function has option rom
//
if (gFullEnumeration) {
-
if (!IS_CARDBUS_BRIDGE (Pci)) {
-
GetOpRomInfo (PciIoDevice);
-
}
ResetPowerManagementFeature (PciIoDevice);
-
}
//
@@ -341,28 +327,26 @@ PciSearchDevice (
**/
VOID
DumpPpbPaddingResource (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN PCI_BAR_TYPE ResourceType
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN PCI_BAR_TYPE ResourceType
)
{
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- PCI_BAR_TYPE Type;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ PCI_BAR_TYPE Type;
if (PciIoDevice->ResourcePaddingDescriptors == NULL) {
return;
}
- if (ResourceType == PciBarTypeIo16 || ResourceType == PciBarTypeIo32) {
+ if ((ResourceType == PciBarTypeIo16) || (ResourceType == PciBarTypeIo32)) {
ResourceType = PciBarTypeIo;
}
for (Descriptor = PciIoDevice->ResourcePaddingDescriptors; Descriptor->Desc != ACPI_END_TAG_DESCRIPTOR; Descriptor++) {
-
Type = PciBarTypeUnknown;
- if (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR && Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) {
+ if ((Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) && (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_IO)) {
Type = PciBarTypeIo;
- } else if (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR && Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
-
+ } else if ((Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) && (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM)) {
if (Descriptor->AddrSpaceGranularity == 32) {
//
// prefetchable
@@ -400,11 +384,12 @@ DumpPpbPaddingResource (
DEBUG ((
DEBUG_INFO,
" Padding: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx\n",
- mBarTypeStr[Type], Descriptor->AddrRangeMax, Descriptor->AddrLen
+ mBarTypeStr[Type],
+ Descriptor->AddrRangeMax,
+ Descriptor->AddrLen
));
}
}
-
}
/**
@@ -414,10 +399,10 @@ DumpPpbPaddingResource (
**/
VOID
DumpPciBars (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < PCI_MAX_BAR; Index++) {
if (PciIoDevice->PciBar[Index].BarType == PciBarTypeUnknown) {
@@ -427,8 +412,11 @@ DumpPciBars (
DEBUG ((
DEBUG_INFO,
" BAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 0x%02x\n",
- Index, mBarTypeStr[MIN (PciIoDevice->PciBar[Index].BarType, PciBarTypeMaxType)],
- PciIoDevice->PciBar[Index].Alignment, PciIoDevice->PciBar[Index].Length, PciIoDevice->PciBar[Index].Offset
+ Index,
+ mBarTypeStr[MIN (PciIoDevice->PciBar[Index].BarType, PciBarTypeMaxType)],
+ PciIoDevice->PciBar[Index].Alignment,
+ PciIoDevice->PciBar[Index].Length,
+ PciIoDevice->PciBar[Index].Offset
));
}
@@ -440,10 +428,14 @@ DumpPciBars (
DEBUG ((
DEBUG_INFO,
" VFBAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 0x%02x\n",
- Index, mBarTypeStr[MIN (PciIoDevice->VfPciBar[Index].BarType, PciBarTypeMaxType)],
- PciIoDevice->VfPciBar[Index].Alignment, PciIoDevice->VfPciBar[Index].Length, PciIoDevice->VfPciBar[Index].Offset
+ Index,
+ mBarTypeStr[MIN (PciIoDevice->VfPciBar[Index].BarType, PciBarTypeMaxType)],
+ PciIoDevice->VfPciBar[Index].Alignment,
+ PciIoDevice->VfPciBar[Index].Length,
+ PciIoDevice->VfPciBar[Index].Offset
));
}
+
DEBUG ((DEBUG_INFO, "\n"));
}
@@ -461,16 +453,16 @@ DumpPciBars (
**/
PCI_IO_DEVICE *
GatherDeviceInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
)
{
- UINTN Offset;
- UINTN BarIndex;
- PCI_IO_DEVICE *PciIoDevice;
+ UINTN Offset;
+ UINTN BarIndex;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = CreatePciIoDevice (
Bridge,
@@ -488,9 +480,7 @@ GatherDeviceInfo (
// If it is a full enumeration, disconnect the device in advance
//
if (gFullEnumeration) {
-
PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);
-
}
//
@@ -503,17 +493,19 @@ GatherDeviceInfo (
//
// Parse the SR-IOV VF bars
//
- if (PcdGetBool (PcdSrIovSupport) && PciIoDevice->SrIovCapabilityOffset != 0) {
+ if (PcdGetBool (PcdSrIovSupport) && (PciIoDevice->SrIovCapabilityOffset != 0)) {
for (Offset = PciIoDevice->SrIovCapabilityOffset + EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0, BarIndex = 0;
Offset <= PciIoDevice->SrIovCapabilityOffset + EFI_PCIE_CAPABILITY_ID_SRIOV_BAR5;
- BarIndex++) {
-
+ BarIndex++)
+ {
ASSERT (BarIndex < PCI_MAX_BAR);
Offset = PciIovParseVfBar (PciIoDevice, Offset, BarIndex);
}
}
- DEBUG_CODE (DumpPciBars (PciIoDevice););
+ DEBUG_CODE (
+ DumpPciBars (PciIoDevice);
+ );
return PciIoDevice;
}
@@ -531,21 +523,21 @@ GatherDeviceInfo (
**/
PCI_IO_DEVICE *
GatherPpbInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
)
{
- PCI_IO_DEVICE *PciIoDevice;
- EFI_STATUS Status;
- UINT8 Value;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT8 Temp;
- UINT32 PMemBaseLimit;
- UINT16 PrefetchableMemoryBase;
- UINT16 PrefetchableMemoryLimit;
+ PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ UINT8 Value;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 Temp;
+ UINT32 PMemBaseLimit;
+ UINT16 PrefetchableMemoryBase;
+ UINT16 PrefetchableMemoryLimit;
PciIoDevice = CreatePciIoDevice (
Bridge,
@@ -566,7 +558,6 @@ GatherPpbInfo (
// Initialize the bridge control register
//
PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_BITS_OWNED);
-
}
//
@@ -628,11 +619,11 @@ GatherPpbInfo (
}
Status = BarExisted (
- PciIoDevice,
- 0x24,
- NULL,
- &PMemBaseLimit
- );
+ PciIoDevice,
+ 0x24,
+ NULL,
+ &PMemBaseLimit
+ );
//
// Test if it supports 64 memory or not
@@ -642,17 +633,18 @@ GatherPpbInfo (
// 0 - the bridge supports only 32 bit addresses.
// 1 - the bridge supports 64-bit addresses.
//
- PrefetchableMemoryBase = (UINT16)(PMemBaseLimit & 0xffff);
+ PrefetchableMemoryBase = (UINT16)(PMemBaseLimit & 0xffff);
PrefetchableMemoryLimit = (UINT16)(PMemBaseLimit >> 16);
if (!EFI_ERROR (Status) &&
- (PrefetchableMemoryBase & 0x000f) == 0x0001 &&
- (PrefetchableMemoryLimit & 0x000f) == 0x0001) {
+ ((PrefetchableMemoryBase & 0x000f) == 0x0001) &&
+ ((PrefetchableMemoryLimit & 0x000f) == 0x0001))
+ {
Status = BarExisted (
- PciIoDevice,
- 0x28,
- NULL,
- NULL
- );
+ PciIoDevice,
+ 0x28,
+ NULL,
+ NULL
+ );
if (!EFI_ERROR (Status)) {
PciIoDevice->Decodes |= EFI_BRIDGE_PMEM32_DECODE_SUPPORTED;
@@ -672,12 +664,11 @@ GatherPpbInfo (
DEBUG_CODE (
DumpPpbPaddingResource (PciIoDevice, PciBarTypeUnknown);
DumpPciBars (PciIoDevice);
- );
+ );
return PciIoDevice;
}
-
/**
Create PCI device instance for PCI Card bridge device.
@@ -692,14 +683,14 @@ GatherPpbInfo (
**/
PCI_IO_DEVICE *
GatherP2CInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
)
{
- PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = CreatePciIoDevice (
Bridge,
@@ -735,7 +726,9 @@ GatherP2CInfo (
EFI_BRIDGE_PMEM32_DECODE_SUPPORTED |
EFI_BRIDGE_IO32_DECODE_SUPPORTED;
- DEBUG_CODE (DumpPciBars (PciIoDevice););
+ DEBUG_CODE (
+ DumpPciBars (PciIoDevice);
+ );
return PciIoDevice;
}
@@ -751,18 +744,17 @@ GatherP2CInfo (
**/
EFI_DEVICE_PATH_PROTOCOL *
CreatePciDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
- IN PCI_IO_DEVICE *PciIoDevice
+ IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
-
- PCI_DEVICE_PATH PciNode;
+ PCI_DEVICE_PATH PciNode;
//
// Create PCI device path
//
- PciNode.Header.Type = HARDWARE_DEVICE_PATH;
- PciNode.Header.SubType = HW_PCI_DP;
+ PciNode.Header.Type = HARDWARE_DEVICE_PATH;
+ PciNode.Header.SubType = HW_PCI_DP;
SetDevicePathNodeLength (&PciNode.Header, sizeof (PciNode));
PciNode.Device = PciIoDevice->DeviceNumber;
@@ -786,16 +778,16 @@ CreatePciDevicePath (
**/
EFI_STATUS
VfBarExisted (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINTN Offset,
- OUT UINT32 *BarLengthValue,
- OUT UINT32 *OriginalBarValue
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINTN Offset,
+ OUT UINT32 *BarLengthValue,
+ OUT UINT32 *OriginalBarValue
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT32 OriginalValue;
- UINT32 Value;
- EFI_TPL OldTpl;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 OriginalValue;
+ UINT32 Value;
+ EFI_TPL OldTpl;
//
// Ensure it is called properly
@@ -860,36 +852,36 @@ VfBarExisted (
**/
EFI_STATUS
BarExisted (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINTN Offset,
- OUT UINT32 *BarLengthValue,
- OUT UINT32 *OriginalBarValue
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINTN Offset,
+ OUT UINT32 *BarLengthValue,
+ OUT UINT32 *OriginalBarValue
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT32 OriginalValue;
- UINT32 Value;
- EFI_TPL OldTpl;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 OriginalValue;
+ UINT32 Value;
+ EFI_TPL OldTpl;
PciIo = &PciIoDevice->PciIo;
//
// Preserve the original value
//
- PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &OriginalValue);
+ PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, (UINT8)Offset, 1, &OriginalValue);
//
// Raise TPL to high level to disable timer interrupt while the BAR is probed
//
OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &gAllOne);
- PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &Value);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8)Offset, 1, &gAllOne);
+ PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, (UINT8)Offset, 1, &Value);
//
// Write back the original value
//
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &OriginalValue);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8)Offset, 1, &OriginalValue);
//
// Restore TPL to its original level
@@ -925,15 +917,15 @@ BarExisted (
**/
VOID
PciTestSupportedAttribute (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN OUT UINT16 *Command,
- IN OUT UINT16 *BridgeControl,
- OUT UINT16 *OldCommand,
- OUT UINT16 *OldBridgeControl
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN OUT UINT16 *Command,
+ IN OUT UINT16 *BridgeControl,
+ OUT UINT16 *OldCommand,
+ OUT UINT16 *OldBridgeControl
)
{
- EFI_TPL OldTpl;
- UINT16 CommandValue;
+ EFI_TPL OldTpl;
+ UINT16 CommandValue;
//
// Preserve the original value
@@ -943,7 +935,7 @@ PciTestSupportedAttribute (
//
// Raise TPL to high level to disable timer interrupt while the BAR is probed
//
- OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
CommandValue = *Command | *OldCommand;
PCI_SET_COMMAND_REGISTER (PciIoDevice, CommandValue);
@@ -961,7 +953,6 @@ PciTestSupportedAttribute (
gBS->RestoreTPL (OldTpl);
if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
-
//
// Preserve the original value
//
@@ -984,7 +975,6 @@ PciTestSupportedAttribute (
// Restore TPL to its original level
//
gBS->RestoreTPL (OldTpl);
-
} else {
*OldBridgeControl = 0;
*BridgeControl = 0;
@@ -1002,10 +992,10 @@ PciTestSupportedAttribute (
**/
VOID
PciSetDeviceAttribute (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 Command,
- IN UINT16 BridgeControl,
- IN UINTN Option
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 Command,
+ IN UINT16 BridgeControl,
+ IN UINTN Option
)
{
UINT64 Attributes;
@@ -1044,18 +1034,17 @@ PciSetDeviceAttribute (
}
if (Option == EFI_SET_SUPPORTS) {
-
- Attributes |= (UINT64) (EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE |
- EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED |
- EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE |
- EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE |
- EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |
- EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
+ Attributes |= (UINT64)(EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE |
+ EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED |
+ EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE |
+ EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE |
+ EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |
+ EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
if (IS_PCI_LPC (&PciIoDevice->Pci)) {
- Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO;
- Attributes |= (mReserveIsaAliases ? (UINT64) EFI_PCI_IO_ATTRIBUTE_ISA_IO : \
- (UINT64) EFI_PCI_IO_ATTRIBUTE_ISA_IO_16);
+ Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO;
+ Attributes |= (mReserveIsaAliases ? (UINT64)EFI_PCI_IO_ATTRIBUTE_ISA_IO : \
+ (UINT64)EFI_PCI_IO_ATTRIBUTE_ISA_IO_16);
}
if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
@@ -1073,7 +1062,6 @@ PciSetDeviceAttribute (
EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO);
}
} else {
-
if (IS_PCI_IDE (&PciIoDevice->Pci)) {
Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO;
Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO;
@@ -1081,16 +1069,15 @@ PciSetDeviceAttribute (
if (IS_PCI_VGA (&PciIoDevice->Pci)) {
Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY;
- Attributes |= (mReserveVgaAliases ? (UINT64) EFI_PCI_IO_ATTRIBUTE_VGA_IO : \
- (UINT64) EFI_PCI_IO_ATTRIBUTE_VGA_IO_16);
+ Attributes |= (mReserveVgaAliases ? (UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_IO : \
+ (UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_IO_16);
}
}
- PciIoDevice->Supports = Attributes;
- PciIoDevice->Supports &= ( (PciIoDevice->Parent->Supports) | \
- EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | \
- EFI_PCI_IO_ATTRIBUTE_BUS_MASTER );
-
+ PciIoDevice->Supports = Attributes;
+ PciIoDevice->Supports &= ((PciIoDevice->Parent->Supports) | \
+ EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | \
+ EFI_PCI_IO_ATTRIBUTE_BUS_MASTER);
} else {
//
// When this attribute is clear, the RomImage and RomSize fields in the PCI IO were
@@ -1101,6 +1088,7 @@ PciSetDeviceAttribute (
if (!PciIoDevice->EmbeddedRom) {
Attributes |= EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM;
}
+
PciIoDevice->Attributes = Attributes;
}
}
@@ -1117,19 +1105,19 @@ PciSetDeviceAttribute (
**/
EFI_STATUS
GetFastBackToBackSupport (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 StatusIndex
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 StatusIndex
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT32 StatusRegister;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT32 StatusRegister;
//
// Read the status register
//
- PciIo = &PciIoDevice->PciIo;
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, StatusIndex, 1, &StatusRegister);
+ PciIo = &PciIoDevice->PciIo;
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, StatusIndex, 1, &StatusRegister);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
@@ -1153,18 +1141,17 @@ GetFastBackToBackSupport (
**/
VOID
ProcessOptionRomLight (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- PCI_IO_DEVICE *Temp;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
//
// For RootBridge, PPB , P2C, go recursively to traverse all its children
//
CurrentLink = PciIoDevice->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {
-
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (!IsListEmpty (&Temp->ChildList)) {
@@ -1185,17 +1172,17 @@ ProcessOptionRomLight (
**/
EFI_STATUS
DetermineDeviceAttribute (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- UINT16 Command;
- UINT16 BridgeControl;
- UINT16 OldCommand;
- UINT16 OldBridgeControl;
- BOOLEAN FastB2BSupport;
- PCI_IO_DEVICE *Temp;
- LIST_ENTRY *CurrentLink;
- EFI_STATUS Status;
+ UINT16 Command;
+ UINT16 BridgeControl;
+ UINT16 OldCommand;
+ UINT16 OldBridgeControl;
+ BOOLEAN FastB2BSupport;
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ EFI_STATUS Status;
//
// For Root Bridge, just copy it by RootBridgeIo protocol
@@ -1203,22 +1190,21 @@ DetermineDeviceAttribute (
//
if (PciIoDevice->Parent == NULL) {
Status = PciIoDevice->PciRootBridgeIo->GetAttributes (
- PciIoDevice->PciRootBridgeIo,
- &PciIoDevice->Supports,
- &PciIoDevice->Attributes
- );
+ PciIoDevice->PciRootBridgeIo,
+ &PciIoDevice->Supports,
+ &PciIoDevice->Attributes
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Assume the PCI Root Bridge supports DAC
//
PciIoDevice->Supports |= (UINT64)(EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE |
- EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |
- EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
-
+ EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |
+ EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
} else {
-
//
// Set the attributes to be checked for common PCI devices and PPB or P2C
// Since some devices only support part of them, it is better to set the
@@ -1268,12 +1254,12 @@ DetermineDeviceAttribute (
//
CurrentLink = PciIoDevice->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {
-
- Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
- Status = DetermineDeviceAttribute (Temp);
+ Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+ Status = DetermineDeviceAttribute (Temp);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Detect Fast Back to Back support for the device under the bridge
//
@@ -1284,13 +1270,12 @@ DetermineDeviceAttribute (
CurrentLink = CurrentLink->ForwardLink;
}
+
//
// Set or clear Fast Back to Back bit for the whole bridge
//
if (!IsListEmpty (&PciIoDevice->ChildList)) {
-
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
-
Status = GetFastBackToBackSupport (PciIoDevice, PCI_BRIDGE_STATUS_REGISTER_OFFSET);
if (EFI_ERROR (Status) || (!FastB2BSupport)) {
@@ -1313,6 +1298,7 @@ DetermineDeviceAttribute (
CurrentLink = CurrentLink->ForwardLink;
}
}
+
//
// End for IsListEmpty
//
@@ -1331,14 +1317,14 @@ DetermineDeviceAttribute (
**/
EFI_STATUS
UpdatePciInfo (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_STATUS Status;
- UINTN BarIndex;
- BOOLEAN SetFlag;
- VOID *Configuration;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
+ EFI_STATUS Status;
+ UINTN BarIndex;
+ BOOLEAN SetFlag;
+ VOID *Configuration;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
Configuration = NULL;
Status = EFI_SUCCESS;
@@ -1351,37 +1337,36 @@ UpdatePciInfo (
Status = gBS->LocateProtocol (
&gEfiIncompatiblePciDeviceSupportProtocolGuid,
NULL,
- (VOID **) &gIncompatiblePciDeviceSupport
+ (VOID **)&gIncompatiblePciDeviceSupport
);
}
- if (Status == EFI_SUCCESS) {
- //
- // Check whether the device belongs to incompatible devices from protocol or not
- // If it is , then get its special requirement in the ACPI table
- //
- Status = gIncompatiblePciDeviceSupport->CheckDevice (
- gIncompatiblePciDeviceSupport,
- PciIoDevice->Pci.Hdr.VendorId,
- PciIoDevice->Pci.Hdr.DeviceId,
- PciIoDevice->Pci.Hdr.RevisionID,
- PciIoDevice->Pci.Device.SubsystemVendorID,
- PciIoDevice->Pci.Device.SubsystemID,
- &Configuration
- );
+ if (Status == EFI_SUCCESS) {
+ //
+ // Check whether the device belongs to incompatible devices from protocol or not
+ // If it is , then get its special requirement in the ACPI table
+ //
+ Status = gIncompatiblePciDeviceSupport->CheckDevice (
+ gIncompatiblePciDeviceSupport,
+ PciIoDevice->Pci.Hdr.VendorId,
+ PciIoDevice->Pci.Hdr.DeviceId,
+ PciIoDevice->Pci.Hdr.RevisionID,
+ PciIoDevice->Pci.Device.SubsystemVendorID,
+ PciIoDevice->Pci.Device.SubsystemID,
+ &Configuration
+ );
}
- if (EFI_ERROR (Status) || Configuration == NULL ) {
+ if (EFI_ERROR (Status) || (Configuration == NULL)) {
return EFI_UNSUPPORTED;
}
//
// Update PCI device information from the ACPI table
//
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+ Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration;
while (Ptr->Desc != ACPI_END_TAG_DESCRIPTOR) {
-
if (Ptr->Desc != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
//
// The format is not support
@@ -1393,7 +1378,8 @@ UpdatePciInfo (
if ((Ptr->AddrTranslationOffset != MAX_UINT64) &&
(Ptr->AddrTranslationOffset != MAX_UINT8) &&
(Ptr->AddrTranslationOffset != BarIndex)
- ) {
+ )
+ {
//
// Skip updating when AddrTranslationOffset is not MAX_UINT64 or MAX_UINT8 (wide match).
// Skip updating when current BarIndex doesn't equal to AddrTranslationOffset.
@@ -1404,61 +1390,62 @@ UpdatePciInfo (
SetFlag = FALSE;
switch (Ptr->ResType) {
- case ACPI_ADDRESS_SPACE_TYPE_MEM:
-
- //
- // Make sure the bar is memory type
- //
- if (CheckBarType (PciIoDevice, (UINT8) BarIndex, PciBarTypeMem)) {
- SetFlag = TRUE;
+ case ACPI_ADDRESS_SPACE_TYPE_MEM:
//
- // Ignored if granularity is 0.
- // Ignored if PCI BAR is I/O or 32-bit memory.
- // If PCI BAR is 64-bit memory and granularity is 32, then
- // the PCI BAR resource is allocated below 4GB.
- // If PCI BAR is 64-bit memory and granularity is 64, then
- // the PCI BAR resource is allocated above 4GB.
+ // Make sure the bar is memory type
//
- if (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypeMem64) {
- switch (Ptr->AddrSpaceGranularity) {
- case 32:
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem32;
- case 64:
- PciIoDevice->PciBar[BarIndex].BarTypeFixed = TRUE;
- break;
- default:
- break;
+ if (CheckBarType (PciIoDevice, (UINT8)BarIndex, PciBarTypeMem)) {
+ SetFlag = TRUE;
+
+ //
+ // Ignored if granularity is 0.
+ // Ignored if PCI BAR is I/O or 32-bit memory.
+ // If PCI BAR is 64-bit memory and granularity is 32, then
+ // the PCI BAR resource is allocated below 4GB.
+ // If PCI BAR is 64-bit memory and granularity is 64, then
+ // the PCI BAR resource is allocated above 4GB.
+ //
+ if (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypeMem64) {
+ switch (Ptr->AddrSpaceGranularity) {
+ case 32:
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem32;
+ case 64:
+ PciIoDevice->PciBar[BarIndex].BarTypeFixed = TRUE;
+ break;
+ default:
+ break;
+ }
}
- }
- if (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypePMem64) {
- switch (Ptr->AddrSpaceGranularity) {
- case 32:
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem32;
- case 64:
- PciIoDevice->PciBar[BarIndex].BarTypeFixed = TRUE;
- break;
- default:
- break;
+ if (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypePMem64) {
+ switch (Ptr->AddrSpaceGranularity) {
+ case 32:
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem32;
+ case 64:
+ PciIoDevice->PciBar[BarIndex].BarTypeFixed = TRUE;
+ break;
+ default:
+ break;
+ }
}
}
- }
- break;
- case ACPI_ADDRESS_SPACE_TYPE_IO:
+ break;
- //
- // Make sure the bar is IO type
- //
- if (CheckBarType (PciIoDevice, (UINT8) BarIndex, PciBarTypeIo)) {
- SetFlag = TRUE;
- }
- break;
+ case ACPI_ADDRESS_SPACE_TYPE_IO:
+
+ //
+ // Make sure the bar is IO type
+ //
+ if (CheckBarType (PciIoDevice, (UINT8)BarIndex, PciBarTypeIo)) {
+ SetFlag = TRUE;
+ }
+
+ break;
}
if (SetFlag) {
-
//
// Update the new alignment for the device
//
@@ -1492,8 +1479,8 @@ UpdatePciInfo (
**/
VOID
SetNewAlign (
- IN OUT UINT64 *Alignment,
- IN UINT64 NewAlignment
+ IN OUT UINT64 *Alignment,
+ IN UINT64 NewAlignment
)
{
UINT64 OldAlignment;
@@ -1504,27 +1491,29 @@ SetNewAlign (
// so skip it
//
if ((NewAlignment == 0) || (NewAlignment == OLD_ALIGN)) {
- return ;
+ return;
}
+
//
// Check the validity of the parameter
//
- if (NewAlignment != EVEN_ALIGN &&
- NewAlignment != SQUAD_ALIGN &&
- NewAlignment != DQUAD_ALIGN ) {
+ if ((NewAlignment != EVEN_ALIGN) &&
+ (NewAlignment != SQUAD_ALIGN) &&
+ (NewAlignment != DQUAD_ALIGN))
+ {
*Alignment = NewAlignment;
- return ;
+ return;
}
- OldAlignment = (*Alignment) + 1;
- ShiftBit = 0;
+ OldAlignment = (*Alignment) + 1;
+ ShiftBit = 0;
//
// Get the first non-zero hex value of the length
//
while ((OldAlignment & 0x0F) == 0x00) {
OldAlignment = RShiftU64 (OldAlignment, 4);
- ShiftBit += 4;
+ ShiftBit += 4;
}
//
@@ -1547,10 +1536,10 @@ SetNewAlign (
//
// Update the old value
//
- NewAlignment = LShiftU64 (OldAlignment, ShiftBit) - 1;
- *Alignment = NewAlignment;
+ NewAlignment = LShiftU64 (OldAlignment, ShiftBit) - 1;
+ *Alignment = NewAlignment;
- return ;
+ return;
}
/**
@@ -1587,11 +1576,11 @@ PciIovParseVfBar (
Value = 0;
Status = VfBarExisted (
- PciIoDevice,
- Offset,
- &Value,
- &OriginalValue
- );
+ PciIoDevice,
+ Offset,
+ &Value,
+ &OriginalValue
+ );
if (EFI_ERROR (Status)) {
PciIoDevice->VfPciBar[BarIndex].BaseAddress = 0;
@@ -1601,133 +1590,130 @@ PciIovParseVfBar (
//
// Scan all the BARs anyway
//
- PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16) Offset;
+ PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16)Offset;
return Offset + 4;
}
- PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16) Offset;
+ PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16)Offset;
if ((Value & 0x01) != 0) {
//
// Device I/Os. Impossible
//
ASSERT (FALSE);
return Offset + 4;
-
} else {
-
- Mask = 0xfffffff0;
+ Mask = 0xfffffff0;
PciIoDevice->VfPciBar[BarIndex].BaseAddress = OriginalValue & Mask;
switch (Value & 0x07) {
+ //
+ // memory space; anywhere in 32 bit address space
+ //
+ case 0x00:
+ if ((Value & 0x08) != 0) {
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypePMem32;
+ } else {
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeMem32;
+ }
- //
- //memory space; anywhere in 32 bit address space
- //
- case 0x00:
- if ((Value & 0x08) != 0) {
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypePMem32;
- } else {
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeMem32;
- }
+ PciIoDevice->VfPciBar[BarIndex].Length = (~(Value & Mask)) + 1;
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
+
+ //
+ // Adjust Length
+ //
+ PciIoDevice->VfPciBar[BarIndex].Length = MultU64x32 (PciIoDevice->VfPciBar[BarIndex].Length, PciIoDevice->InitialVFs);
+ //
+ // Adjust Alignment
+ //
+ if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
+ }
- PciIoDevice->VfPciBar[BarIndex].Length = (~(Value & Mask)) + 1;
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
+ break;
//
- // Adjust Length
- //
- PciIoDevice->VfPciBar[BarIndex].Length = MultU64x32 (PciIoDevice->VfPciBar[BarIndex].Length, PciIoDevice->InitialVFs);
+ // memory space; anywhere in 64 bit address space
//
- // Adjust Alignment
- //
- if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
- }
+ case 0x04:
+ if ((Value & 0x08) != 0) {
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypePMem64;
+ } else {
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeMem64;
+ }
- break;
+ //
+ // According to PCI 2.2,if the bar indicates a memory 64 decoding, next bar
+ // is regarded as an extension for the first bar. As a result
+ // the sizing will be conducted on combined 64 bit value
+ // Here just store the masked first 32bit value for future size
+ // calculation
+ //
+ PciIoDevice->VfPciBar[BarIndex].Length = Value & Mask;
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
- //
- // memory space; anywhere in 64 bit address space
- //
- case 0x04:
- if ((Value & 0x08) != 0) {
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypePMem64;
- } else {
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeMem64;
- }
+ if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
+ }
- //
- // According to PCI 2.2,if the bar indicates a memory 64 decoding, next bar
- // is regarded as an extension for the first bar. As a result
- // the sizing will be conducted on combined 64 bit value
- // Here just store the masked first 32bit value for future size
- // calculation
- //
- PciIoDevice->VfPciBar[BarIndex].Length = Value & Mask;
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
+ //
+ // Increment the offset to point to next DWORD
+ //
+ Offset += 4;
- if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
- }
+ Status = VfBarExisted (
+ PciIoDevice,
+ Offset,
+ &Value,
+ &OriginalValue
+ );
- //
- // Increment the offset to point to next DWORD
- //
- Offset += 4;
+ if (EFI_ERROR (Status)) {
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeUnknown;
+ return Offset + 4;
+ }
- Status = VfBarExisted (
- PciIoDevice,
- Offset,
- &Value,
- &OriginalValue
- );
+ //
+ // Fix the length to support some special 64 bit BAR
+ //
+ Value |= ((UINT32)-1 << HighBitSet32 (Value));
- if (EFI_ERROR (Status)) {
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeUnknown;
- return Offset + 4;
- }
+ //
+ // Calculate the size of 64bit bar
+ //
+ PciIoDevice->VfPciBar[BarIndex].BaseAddress |= LShiftU64 ((UINT64)OriginalValue, 32);
- //
- // Fix the length to support some special 64 bit BAR
- //
- Value |= ((UINT32) -1 << HighBitSet32 (Value));
+ PciIoDevice->VfPciBar[BarIndex].Length = PciIoDevice->VfPciBar[BarIndex].Length | LShiftU64 ((UINT64)Value, 32);
+ PciIoDevice->VfPciBar[BarIndex].Length = (~(PciIoDevice->VfPciBar[BarIndex].Length)) + 1;
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
- //
- // Calculate the size of 64bit bar
- //
- PciIoDevice->VfPciBar[BarIndex].BaseAddress |= LShiftU64 ((UINT64) OriginalValue, 32);
+ //
+ // Adjust Length
+ //
+ PciIoDevice->VfPciBar[BarIndex].Length = MultU64x32 (PciIoDevice->VfPciBar[BarIndex].Length, PciIoDevice->InitialVFs);
+ //
+ // Adjust Alignment
+ //
+ if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
+ }
- PciIoDevice->VfPciBar[BarIndex].Length = PciIoDevice->VfPciBar[BarIndex].Length | LShiftU64 ((UINT64) Value, 32);
- PciIoDevice->VfPciBar[BarIndex].Length = (~(PciIoDevice->VfPciBar[BarIndex].Length)) + 1;
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
+ break;
//
- // Adjust Length
- //
- PciIoDevice->VfPciBar[BarIndex].Length = MultU64x32 (PciIoDevice->VfPciBar[BarIndex].Length, PciIoDevice->InitialVFs);
- //
- // Adjust Alignment
+ // reserved
//
- if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
- }
-
- break;
+ default:
+ PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeUnknown;
+ PciIoDevice->VfPciBar[BarIndex].Length = (~(Value & Mask)) + 1;
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
- //
- // reserved
- //
- default:
- PciIoDevice->VfPciBar[BarIndex].BarType = PciBarTypeUnknown;
- PciIoDevice->VfPciBar[BarIndex].Length = (~(Value & Mask)) + 1;
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->VfPciBar[BarIndex].Length - 1;
-
- if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
- PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
- }
+ if (PciIoDevice->VfPciBar[BarIndex].Alignment < PciIoDevice->SystemPageSize - 1) {
+ PciIoDevice->VfPciBar[BarIndex].Alignment = PciIoDevice->SystemPageSize - 1;
+ }
- break;
+ break;
}
}
@@ -1786,12 +1772,12 @@ PciParseBar (
//
// Some devices don't fully comply to PCI spec 2.2. So be to scan all the BARs anyway
//
- PciIoDevice->PciBar[BarIndex].Offset = (UINT8) Offset;
+ PciIoDevice->PciBar[BarIndex].Offset = (UINT8)Offset;
return Offset + 4;
}
PciIoDevice->PciBar[BarIndex].BarTypeFixed = FALSE;
- PciIoDevice->PciBar[BarIndex].Offset = (UINT8) Offset;
+ PciIoDevice->PciBar[BarIndex].Offset = (UINT8)Offset;
if ((Value & 0x01) != 0) {
//
// Device I/Os
@@ -1805,7 +1791,6 @@ PciParseBar (
PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeIo32;
PciIoDevice->PciBar[BarIndex].Length = ((~(Value & Mask)) + 1);
PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
-
} else {
//
// It is a IO16 bar
@@ -1813,135 +1798,134 @@ PciParseBar (
PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeIo16;
PciIoDevice->PciBar[BarIndex].Length = 0x0000FFFF & ((~(Value & Mask)) + 1);
PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
-
}
+
//
// Workaround. Some platforms implement IO bar with 0 length
// Need to treat it as no-bar
//
if (PciIoDevice->PciBar[BarIndex].Length == 0) {
- PciIoDevice->PciBar[BarIndex].BarType = (PCI_BAR_TYPE) 0;
+ PciIoDevice->PciBar[BarIndex].BarType = (PCI_BAR_TYPE)0;
}
- PciIoDevice->PciBar[BarIndex].BaseAddress = OriginalValue & Mask;
-
+ PciIoDevice->PciBar[BarIndex].BaseAddress = OriginalValue & Mask;
} else {
-
- Mask = 0xfffffff0;
+ Mask = 0xfffffff0;
PciIoDevice->PciBar[BarIndex].BaseAddress = OriginalValue & Mask;
switch (Value & 0x07) {
+ //
+ // memory space; anywhere in 32 bit address space
+ //
+ case 0x00:
+ if ((Value & 0x08) != 0) {
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem32;
+ } else {
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem32;
+ }
- //
- //memory space; anywhere in 32 bit address space
- //
- case 0x00:
- if ((Value & 0x08) != 0) {
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem32;
- } else {
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem32;
- }
+ PciIoDevice->PciBar[BarIndex].Length = (~(Value & Mask)) + 1;
+ if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
+ //
+ // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
+ //
+ PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
+ } else {
+ PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
+ }
+
+ break;
+
+ //
+ // memory space; anywhere in 64 bit address space
+ //
+ case 0x04:
+ if ((Value & 0x08) != 0) {
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem64;
+ } else {
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem64;
+ }
- PciIoDevice->PciBar[BarIndex].Length = (~(Value & Mask)) + 1;
- if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
//
- // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
+ // According to PCI 2.2,if the bar indicates a memory 64 decoding, next bar
+ // is regarded as an extension for the first bar. As a result
+ // the sizing will be conducted on combined 64 bit value
+ // Here just store the masked first 32bit value for future size
+ // calculation
//
- PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
- } else {
+ PciIoDevice->PciBar[BarIndex].Length = Value & Mask;
PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
- }
- break;
- //
- // memory space; anywhere in 64 bit address space
- //
- case 0x04:
- if ((Value & 0x08) != 0) {
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypePMem64;
- } else {
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeMem64;
- }
+ //
+ // Increment the offset to point to next DWORD
+ //
+ Offset += 4;
- //
- // According to PCI 2.2,if the bar indicates a memory 64 decoding, next bar
- // is regarded as an extension for the first bar. As a result
- // the sizing will be conducted on combined 64 bit value
- // Here just store the masked first 32bit value for future size
- // calculation
- //
- PciIoDevice->PciBar[BarIndex].Length = Value & Mask;
- PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
+ Status = BarExisted (
+ PciIoDevice,
+ Offset,
+ &Value,
+ &OriginalValue
+ );
- //
- // Increment the offset to point to next DWORD
- //
- Offset += 4;
+ if (EFI_ERROR (Status)) {
+ //
+ // the high 32 bit does not claim any BAR, we need to re-check the low 32 bit BAR again
+ //
+ if (PciIoDevice->PciBar[BarIndex].Length == 0) {
+ //
+ // some device implement MMIO bar with 0 length, need to treat it as no-bar
+ //
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeUnknown;
+ return Offset + 4;
+ }
+ }
- Status = BarExisted (
- PciIoDevice,
- Offset,
- &Value,
- &OriginalValue
- );
+ //
+ // Fix the length to support some special 64 bit BAR
+ //
+ if (Value == 0) {
+ DEBUG ((DEBUG_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR returns 0, change to 0xFFFFFFFF.\n"));
+ Value = (UINT32)-1;
+ } else {
+ Value |= ((UINT32)(-1) << HighBitSet32 (Value));
+ }
- if (EFI_ERROR (Status)) {
//
- // the high 32 bit does not claim any BAR, we need to re-check the low 32 bit BAR again
+ // Calculate the size of 64bit bar
//
- if (PciIoDevice->PciBar[BarIndex].Length == 0) {
+ PciIoDevice->PciBar[BarIndex].BaseAddress |= LShiftU64 ((UINT64)OriginalValue, 32);
+
+ PciIoDevice->PciBar[BarIndex].Length = PciIoDevice->PciBar[BarIndex].Length | LShiftU64 ((UINT64)Value, 32);
+ PciIoDevice->PciBar[BarIndex].Length = (~(PciIoDevice->PciBar[BarIndex].Length)) + 1;
+ if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
//
- // some device implement MMIO bar with 0 length, need to treat it as no-bar
+ // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
//
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeUnknown;
- return Offset + 4;
+ PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
+ } else {
+ PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
}
- }
- //
- // Fix the length to support some special 64 bit BAR
- //
- if (Value == 0) {
- DEBUG ((DEBUG_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR returns 0, change to 0xFFFFFFFF.\n"));
- Value = (UINT32) -1;
- } else {
- Value |= ((UINT32)(-1) << HighBitSet32 (Value));
- }
+ break;
//
- // Calculate the size of 64bit bar
+ // reserved
//
- PciIoDevice->PciBar[BarIndex].BaseAddress |= LShiftU64 ((UINT64) OriginalValue, 32);
-
- PciIoDevice->PciBar[BarIndex].Length = PciIoDevice->PciBar[BarIndex].Length | LShiftU64 ((UINT64) Value, 32);
- PciIoDevice->PciBar[BarIndex].Length = (~(PciIoDevice->PciBar[BarIndex].Length)) + 1;
- if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
- //
- // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
- //
- PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
- } else {
- PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
- }
-
- break;
+ default:
+ PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeUnknown;
+ PciIoDevice->PciBar[BarIndex].Length = (~(Value & Mask)) + 1;
+ if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
+ //
+ // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
+ //
+ PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
+ } else {
+ PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
+ }
- //
- // reserved
- //
- default:
- PciIoDevice->PciBar[BarIndex].BarType = PciBarTypeUnknown;
- PciIoDevice->PciBar[BarIndex].Length = (~(Value & Mask)) + 1;
- if (PciIoDevice->PciBar[BarIndex].Length < (SIZE_4KB)) {
- //
- // Force minimum 4KByte alignment for Virtualization technology for Directed I/O
- //
- PciIoDevice->PciBar[BarIndex].Alignment = (SIZE_4KB - 1);
- } else {
- PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
- }
- break;
+ break;
}
}
@@ -1970,11 +1954,11 @@ PciParseBar (
**/
VOID
InitializePciDevice (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT8 Offset;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 Offset;
PciIo = &(PciIoDevice->PciIo);
@@ -1996,10 +1980,10 @@ InitializePciDevice (
**/
VOID
InitializePpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = &(PciIoDevice->PciIo);
@@ -2040,10 +2024,10 @@ InitializePpb (
**/
VOID
InitializeP2C (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = &(PciIoDevice->PciIo);
@@ -2081,7 +2065,7 @@ InitializeP2C (
**/
EFI_STATUS
AuthenticatePciDevice (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
EDKII_DEVICE_IDENTIFIER DeviceIdentifier;
@@ -2094,15 +2078,15 @@ AuthenticatePciDevice (
DeviceIdentifier.Version = EDKII_DEVICE_IDENTIFIER_REVISION;
CopyGuid (&DeviceIdentifier.DeviceType, &gEdkiiDeviceIdentifierTypePciGuid);
DeviceIdentifier.DeviceHandle = NULL;
- Status = gBS->InstallMultipleProtocolInterfaces (
- &DeviceIdentifier.DeviceHandle,
- &gEfiDevicePathProtocolGuid,
- PciIoDevice->DevicePath,
- &gEdkiiDeviceIdentifierTypePciGuid,
- &PciIoDevice->PciIo,
- NULL
- );
- if (EFI_ERROR(Status)) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DeviceIdentifier.DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ PciIoDevice->DevicePath,
+ &gEdkiiDeviceIdentifierTypePciGuid,
+ &PciIoDevice->PciIo,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -2115,13 +2099,13 @@ AuthenticatePciDevice (
// No need to check return Status.
//
gBS->UninstallMultipleProtocolInterfaces (
- DeviceIdentifier.DeviceHandle,
- &gEfiDevicePathProtocolGuid,
- PciIoDevice->DevicePath,
- &gEdkiiDeviceIdentifierTypePciGuid,
- &PciIoDevice->PciIo,
- NULL
- );
+ DeviceIdentifier.DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ PciIoDevice->DevicePath,
+ &gEdkiiDeviceIdentifierTypePciGuid,
+ &PciIoDevice->PciIo,
+ NULL
+ );
return Status;
}
@@ -2146,11 +2130,11 @@ AuthenticatePciDevice (
**/
PCI_IO_DEVICE *
CreatePciIoDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
)
{
PCI_IO_DEVICE *PciIoDevice;
@@ -2162,14 +2146,14 @@ CreatePciIoDevice (
return NULL;
}
- PciIoDevice->Signature = PCI_IO_DEVICE_SIGNATURE;
- PciIoDevice->Handle = NULL;
- PciIoDevice->PciRootBridgeIo = Bridge->PciRootBridgeIo;
- PciIoDevice->DevicePath = NULL;
- PciIoDevice->BusNumber = Bus;
- PciIoDevice->DeviceNumber = Device;
- PciIoDevice->FunctionNumber = Func;
- PciIoDevice->Decodes = 0;
+ PciIoDevice->Signature = PCI_IO_DEVICE_SIGNATURE;
+ PciIoDevice->Handle = NULL;
+ PciIoDevice->PciRootBridgeIo = Bridge->PciRootBridgeIo;
+ PciIoDevice->DevicePath = NULL;
+ PciIoDevice->BusNumber = Bus;
+ PciIoDevice->DeviceNumber = Device;
+ PciIoDevice->FunctionNumber = Func;
+ PciIoDevice->Decodes = 0;
if (gFullEnumeration) {
PciIoDevice->Allocated = FALSE;
@@ -2177,13 +2161,13 @@ CreatePciIoDevice (
PciIoDevice->Allocated = TRUE;
}
- PciIoDevice->Registered = FALSE;
- PciIoDevice->Attributes = 0;
- PciIoDevice->Supports = 0;
- PciIoDevice->BusOverride = FALSE;
- PciIoDevice->AllOpRomProcessed = FALSE;
+ PciIoDevice->Registered = FALSE;
+ PciIoDevice->Attributes = 0;
+ PciIoDevice->Supports = 0;
+ PciIoDevice->BusOverride = FALSE;
+ PciIoDevice->AllOpRomProcessed = FALSE;
- PciIoDevice->IsPciExp = FALSE;
+ PciIoDevice->IsPciExp = FALSE;
CopyMem (&(PciIoDevice->Pci), Pci, sizeof (PCI_TYPE01));
@@ -2207,12 +2191,12 @@ CreatePciIoDevice (
// Detect if PCI Express Device
//
PciIoDevice->PciExpressCapabilityOffset = 0;
- Status = LocateCapabilityRegBlock (
- PciIoDevice,
- EFI_PCI_CAPABILITY_ID_PCIEXP,
- &PciIoDevice->PciExpressCapabilityOffset,
- NULL
- );
+ Status = LocateCapabilityRegBlock (
+ PciIoDevice,
+ EFI_PCI_CAPABILITY_ID_PCIEXP,
+ &PciIoDevice->PciExpressCapabilityOffset,
+ NULL
+ );
if (!EFI_ERROR (Status)) {
PciIoDevice->IsPciExp = TRUE;
}
@@ -2224,10 +2208,11 @@ CreatePciIoDevice (
//
// If authentication fails, skip this device.
//
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
if (PciIoDevice->DevicePath != NULL) {
FreePool (PciIoDevice->DevicePath);
}
+
FreePool (PciIoDevice);
return NULL;
}
@@ -2255,32 +2240,32 @@ CreatePciIoDevice (
//
ParentPciIo = &Bridge->PciIo;
ParentPciIo->Pci.Read (
- ParentPciIo,
- EfiPciIoWidthUint32,
- Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET,
- 1,
- &Data32
- );
+ ParentPciIo,
+ EfiPciIoWidthUint32,
+ Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET,
+ 1,
+ &Data32
+ );
if ((Data32 & EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) != 0) {
//
// ARI forward support in bridge, so enable it.
//
ParentPciIo->Pci.Read (
- ParentPciIo,
- EfiPciIoWidthUint32,
- Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET,
- 1,
- &Data32
- );
+ ParentPciIo,
+ EfiPciIoWidthUint32,
+ Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET,
+ 1,
+ &Data32
+ );
if ((Data32 & EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING) == 0) {
Data32 |= EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING;
ParentPciIo->Pci.Write (
- ParentPciIo,
- EfiPciIoWidthUint32,
- Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET,
- 1,
- &Data32
- );
+ ParentPciIo,
+ EfiPciIoWidthUint32,
+ Bridge->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET,
+ 1,
+ &Data32
+ );
DEBUG ((
DEBUG_INFO,
" ARI: forwarding enabled for PPB[%02x:%02x:%02x]\n",
@@ -2307,17 +2292,17 @@ CreatePciIoDevice (
NULL
);
if (!EFI_ERROR (Status)) {
- UINT32 SupportedPageSize;
- UINT16 VFStride;
- UINT16 FirstVFOffset;
- UINT16 Data16;
- UINT32 PFRid;
- UINT32 LastVF;
+ UINT32 SupportedPageSize;
+ UINT16 VFStride;
+ UINT16 FirstVFOffset;
+ UINT16 Data16;
+ UINT32 PFRid;
+ UINT32 LastVF;
//
// If the SR-IOV device is an ARI device, then Set ARI Capable Hierarchy for the device.
//
- if (PcdGetBool (PcdAriSupport) && PciIoDevice->AriCapabilityOffset != 0) {
+ if (PcdGetBool (PcdAriSupport) && (PciIoDevice->AriCapabilityOffset != 0)) {
PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint16,
@@ -2392,7 +2377,7 @@ CreatePciIoDevice (
//
// Calculate LastVF
//
- PFRid = EFI_PCI_RID(Bus, Device, Func);
+ PFRid = EFI_PCI_RID (Bus, Device, Func);
LastVF = PFRid + FirstVFOffset + (PciIoDevice->InitialVFs - 1) * VFStride;
//
@@ -2403,12 +2388,16 @@ CreatePciIoDevice (
DEBUG ((
DEBUG_INFO,
" SR-IOV: SupportedPageSize = 0x%x; SystemPageSize = 0x%x; FirstVFOffset = 0x%x;\n",
- SupportedPageSize, PciIoDevice->SystemPageSize >> 12, FirstVFOffset
+ SupportedPageSize,
+ PciIoDevice->SystemPageSize >> 12,
+ FirstVFOffset
));
DEBUG ((
DEBUG_INFO,
" InitialVFs = 0x%x; ReservedBusNum = 0x%x; CapOffset = 0x%x\n",
- PciIoDevice->InitialVFs, PciIoDevice->ReservedBusNum, PciIoDevice->SrIovCapabilityOffset
+ PciIoDevice->InitialVFs,
+ PciIoDevice->ReservedBusNum,
+ PciIoDevice->SrIovCapabilityOffset
));
}
}
@@ -2434,17 +2423,17 @@ CreatePciIoDevice (
NULL
);
if (!EFI_ERROR (Status)) {
- PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CONTROL ResizableBarControl;
- UINT32 Offset;
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CONTROL ResizableBarControl;
+ UINT32 Offset;
Offset = PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER)
- + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CAPABILITY),
+ + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CAPABILITY),
PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- Offset,
- sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CONTROL),
- &ResizableBarControl
- );
+ PciIo,
+ EfiPciIoWidthUint8,
+ Offset,
+ sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_CONTROL),
+ &ResizableBarControl
+ );
PciIoDevice->ResizableBarNumber = ResizableBarControl.Bits.ResizableBarNumber;
PciProgramResizableBar (PciIoDevice, PciResizableBarMax);
}
@@ -2482,16 +2471,15 @@ CreatePciIoDevice (
**/
EFI_STATUS
PciEnumeratorLight (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
)
{
-
- EFI_STATUS Status;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- PCI_IO_DEVICE *RootBridgeDev;
- UINT16 MinBus;
- UINT16 MaxBus;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
+ EFI_STATUS Status;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ PCI_IO_DEVICE *RootBridgeDev;
+ UINT16 MinBus;
+ UINT16 MaxBus;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
MinBus = 0;
MaxBus = PCI_MAX_BUS;
@@ -2510,23 +2498,22 @@ PciEnumeratorLight (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
gPciBusDriverBinding.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
);
- if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) {
+ if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
return Status;
}
- Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) &Descriptors);
+ Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **)&Descriptors);
if (EFI_ERROR (Status)) {
return Status;
}
while (PciGetBusRange (&Descriptors, &MinBus, &MaxBus, NULL) == EFI_SUCCESS) {
-
//
// Create a device node for root bridge device with a NULL host bridge controller handle
//
@@ -2544,11 +2531,10 @@ PciEnumeratorLight (
Status = PciPciDeviceInfoCollector (
RootBridgeDev,
- (UINT8) MinBus
+ (UINT8)MinBus
);
if (!EFI_ERROR (Status)) {
-
//
// Remove those PCI devices which are rejected when full enumeration
//
@@ -2569,7 +2555,6 @@ PciEnumeratorLight (
//
InsertRootBridge (RootBridgeDev);
} else {
-
//
// If unsuccessfully, destroy the entire node
//
@@ -2605,15 +2590,15 @@ PciGetBusRange (
while ((*Descriptors)->Desc != ACPI_END_TAG_DESCRIPTOR) {
if ((*Descriptors)->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) {
if (MinBus != NULL) {
- *MinBus = (UINT16) (*Descriptors)->AddrRangeMin;
+ *MinBus = (UINT16)(*Descriptors)->AddrRangeMin;
}
if (MaxBus != NULL) {
- *MaxBus = (UINT16) (*Descriptors)->AddrRangeMax;
+ *MaxBus = (UINT16)(*Descriptors)->AddrRangeMax;
}
if (BusRange != NULL) {
- *BusRange = (UINT16) (*Descriptors)->AddrLen;
+ *BusRange = (UINT16)(*Descriptors)->AddrLen;
}
return EFI_SUCCESS;
@@ -2636,12 +2621,12 @@ PciGetBusRange (
**/
EFI_STATUS
StartManagingRootBridge (
- IN PCI_IO_DEVICE *RootBridgeDev
+ IN PCI_IO_DEVICE *RootBridgeDev
)
{
- EFI_HANDLE RootBridgeHandle;
- EFI_STATUS Status;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_HANDLE RootBridgeHandle;
+ EFI_STATUS Status;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
//
// Get the root bridge handle
@@ -2655,13 +2640,13 @@ StartManagingRootBridge (
Status = gBS->OpenProtocol (
RootBridgeHandle,
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo,
+ (VOID **)&PciRootBridgeIo,
gPciBusDriverBinding.DriverBindingHandle,
RootBridgeHandle,
EFI_OPEN_PROTOCOL_BY_DRIVER
);
- if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) {
+ if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
return Status;
}
@@ -2671,7 +2656,6 @@ StartManagingRootBridge (
RootBridgeDev->PciRootBridgeIo = PciRootBridgeIo;
return EFI_SUCCESS;
-
}
/**
@@ -2685,7 +2669,7 @@ StartManagingRootBridge (
**/
BOOLEAN
IsPciDeviceRejected (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_STATUS Status;
@@ -2706,9 +2690,8 @@ IsPciDeviceRejected (
// Only test base registers for P2C
//
for (BarOffset = 0x1C; BarOffset <= 0x38; BarOffset += 2 * sizeof (UINT32)) {
-
- Mask = (BarOffset < 0x2C) ? 0xFFFFF000 : 0xFFFFFFFC;
- Status = BarExisted (PciIoDevice, BarOffset, &TestValue, &OldValue);
+ Mask = (BarOffset < 0x2C) ? 0xFFFFF000 : 0xFFFFFFFC;
+ Status = BarExisted (PciIoDevice, BarOffset, &TestValue, &OldValue);
if (EFI_ERROR (Status)) {
continue;
}
@@ -2735,7 +2718,6 @@ IsPciDeviceRejected (
}
if ((TestValue & 0x01) != 0) {
-
//
// IO Bar
//
@@ -2744,9 +2726,7 @@ IsPciDeviceRejected (
if ((TestValue != 0) && (TestValue == (OldValue & Mask))) {
return TRUE;
}
-
} else {
-
//
// Mem Bar
//
@@ -2754,13 +2734,11 @@ IsPciDeviceRejected (
TestValue = TestValue & Mask;
if ((TestValue & 0x07) == 0x04) {
-
//
// Mem64 or PMem64
//
BarOffset += sizeof (UINT32);
if ((TestValue != 0) && (TestValue == (OldValue & Mask))) {
-
//
// Test its high 32-Bit BAR
//
@@ -2769,9 +2747,7 @@ IsPciDeviceRejected (
return TRUE;
}
}
-
} else {
-
//
// Mem32 or PMem32
//
@@ -2794,24 +2770,23 @@ IsPciDeviceRejected (
**/
VOID
ResetAllPpbBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber
)
{
- EFI_STATUS Status;
- PCI_TYPE00 Pci;
- UINT8 Device;
- UINT32 Register;
- UINT8 Func;
- UINT64 Address;
- UINT8 SecondaryBus;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_STATUS Status;
+ PCI_TYPE00 Pci;
+ UINT8 Device;
+ UINT32 Register;
+ UINT8 Func;
+ UINT64 Address;
+ UINT8 SecondaryBus;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = Bridge->PciRootBridgeIo;
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
-
//
// Check to see whether a pci device is present
//
@@ -2823,7 +2798,7 @@ ResetAllPpbBusNumber (
Func
);
- if (EFI_ERROR (Status) && Func == 0) {
+ if (EFI_ERROR (Status) && (Func == 0)) {
//
// go to next device if there is no Function 0
//
@@ -2831,16 +2806,15 @@ ResetAllPpbBusNumber (
}
if (!EFI_ERROR (Status) && (IS_PCI_BRIDGE (&Pci))) {
-
- Register = 0;
- Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
- Status = PciRootBridgeIo->Pci.Read (
- PciRootBridgeIo,
- EfiPciWidthUint32,
- Address,
- 1,
- &Register
- );
+ Register = 0;
+ Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
+ Status = PciRootBridgeIo->Pci.Read (
+ PciRootBridgeIo,
+ EfiPciWidthUint32,
+ Address,
+ 1,
+ &Register
+ );
SecondaryBus = (UINT8)(Register >> 8);
if (SecondaryBus != 0) {
@@ -2851,16 +2825,16 @@ ResetAllPpbBusNumber (
// Reset register 18h, 19h, 1Ah on PCI Bridge
//
Register &= 0xFF000000;
- Status = PciRootBridgeIo->Pci.Write (
- PciRootBridgeIo,
- EfiPciWidthUint32,
- Address,
- 1,
- &Register
- );
+ Status = PciRootBridgeIo->Pci.Write (
+ PciRootBridgeIo,
+ EfiPciWidthUint32,
+ Address,
+ 1,
+ &Register
+ );
}
- if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
+ if ((Func == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
//
// Skip sub functions, this is not a multi function device
//
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
index 4581b270c9..0ded4bea4f 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
@@ -24,11 +24,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PciDevicePresent (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
- OUT PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
+ OUT PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
);
/**
@@ -46,8 +46,8 @@ PciDevicePresent (
**/
EFI_STATUS
PciPciDeviceInfoCollector (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber
);
/**
@@ -66,12 +66,12 @@ PciPciDeviceInfoCollector (
**/
EFI_STATUS
PciSearchDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func,
- OUT PCI_IO_DEVICE **PciDevice
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func,
+ OUT PCI_IO_DEVICE **PciDevice
);
/**
@@ -88,11 +88,11 @@ PciSearchDevice (
**/
PCI_IO_DEVICE *
GatherDeviceInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
);
/**
@@ -109,11 +109,11 @@ GatherDeviceInfo (
**/
PCI_IO_DEVICE *
GatherPpbInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
);
/**
@@ -130,11 +130,11 @@ GatherPpbInfo (
**/
PCI_IO_DEVICE *
GatherP2CInfo (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
);
/**
@@ -148,8 +148,8 @@ GatherP2CInfo (
**/
EFI_DEVICE_PATH_PROTOCOL *
CreatePciDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
- IN PCI_IO_DEVICE *PciIoDevice
+ IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -166,10 +166,10 @@ CreatePciDevicePath (
**/
EFI_STATUS
VfBarExisted (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINTN Offset,
- OUT UINT32 *BarLengthValue,
- OUT UINT32 *OriginalBarValue
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINTN Offset,
+ OUT UINT32 *BarLengthValue,
+ OUT UINT32 *OriginalBarValue
);
/**
@@ -186,10 +186,10 @@ VfBarExisted (
**/
EFI_STATUS
BarExisted (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINTN Offset,
- OUT UINT32 *BarLengthValue,
- OUT UINT32 *OriginalBarValue
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINTN Offset,
+ OUT UINT32 *BarLengthValue,
+ OUT UINT32 *OriginalBarValue
);
/**
@@ -206,11 +206,11 @@ BarExisted (
**/
VOID
PciTestSupportedAttribute (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN OUT UINT16 *Command,
- IN OUT UINT16 *BridgeControl,
- OUT UINT16 *OldCommand,
- OUT UINT16 *OldBridgeControl
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN OUT UINT16 *Command,
+ IN OUT UINT16 *BridgeControl,
+ OUT UINT16 *OldCommand,
+ OUT UINT16 *OldBridgeControl
);
/**
@@ -224,10 +224,10 @@ PciTestSupportedAttribute (
**/
VOID
PciSetDeviceAttribute (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 Command,
- IN UINT16 BridgeControl,
- IN UINTN Option
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 Command,
+ IN UINT16 BridgeControl,
+ IN UINTN Option
);
/**
@@ -242,8 +242,8 @@ PciSetDeviceAttribute (
**/
EFI_STATUS
GetFastBackToBackSupport (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 StatusIndex
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 StatusIndex
);
/**
@@ -254,7 +254,7 @@ GetFastBackToBackSupport (
**/
EFI_STATUS
DetermineDeviceAttribute (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -269,7 +269,7 @@ DetermineDeviceAttribute (
**/
EFI_STATUS
UpdatePciInfo (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -281,8 +281,8 @@ UpdatePciInfo (
**/
VOID
SetNewAlign (
- IN OUT UINT64 *Alignment,
- IN UINT64 NewAlignment
+ IN OUT UINT64 *Alignment,
+ IN UINT64 NewAlignment
);
/**
@@ -329,7 +329,7 @@ PciIovParseVfBar (
**/
VOID
InitializePciDevice (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -340,7 +340,7 @@ InitializePciDevice (
**/
VOID
InitializePpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -351,7 +351,7 @@ InitializePpb (
**/
VOID
InitializeP2C (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -369,11 +369,11 @@ InitializeP2C (
**/
PCI_IO_DEVICE *
CreatePciIoDevice (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_TYPE00 *Pci,
- IN UINT8 Bus,
- IN UINT8 Device,
- IN UINT8 Func
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_TYPE00 *Pci,
+ IN UINT8 Bus,
+ IN UINT8 Device,
+ IN UINT8 Func
);
/**
@@ -390,7 +390,7 @@ CreatePciIoDevice (
**/
EFI_STATUS
PciEnumeratorLight (
- IN EFI_HANDLE Controller
+ IN EFI_HANDLE Controller
);
/**
@@ -424,7 +424,7 @@ PciGetBusRange (
**/
EFI_STATUS
StartManagingRootBridge (
- IN PCI_IO_DEVICE *RootBridgeDev
+ IN PCI_IO_DEVICE *RootBridgeDev
);
/**
@@ -438,7 +438,7 @@ StartManagingRootBridge (
**/
BOOLEAN
IsPciDeviceRejected (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -450,8 +450,8 @@ IsPciDeviceRejected (
**/
VOID
ResetAllPpbBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber
);
/**
@@ -463,8 +463,8 @@ ResetAllPpbBusNumber (
**/
VOID
DumpPpbPaddingResource (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN PCI_BAR_TYPE ResourceType
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN PCI_BAR_TYPE ResourceType
);
/**
@@ -474,7 +474,7 @@ DumpPpbPaddingResource (
**/
VOID
DumpPciBars (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
index 0dc8ec23b0..810867a200 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
@@ -13,7 +13,6 @@ EFI_HPC_LOCATION *gPciRootHpcPool = NULL;
UINTN gPciRootHpcCount = 0;
ROOT_HPC_DATA *gPciRootHpcData = NULL;
-
/**
Event notification function to set Hot Plug controller status.
@@ -24,14 +23,14 @@ ROOT_HPC_DATA *gPciRootHpcData = NULL;
VOID
EFIAPI
PciHPCInitialized (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- ROOT_HPC_DATA *HpcData;
+ ROOT_HPC_DATA *HpcData;
- HpcData = (ROOT_HPC_DATA *) Context;
- HpcData->Initialized = TRUE;
+ HpcData = (ROOT_HPC_DATA *)Context;
+ HpcData->Initialized = TRUE;
}
/**
@@ -46,12 +45,12 @@ PciHPCInitialized (
**/
BOOLEAN
EfiCompareDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
)
{
- UINTN Size1;
- UINTN Size2;
+ UINTN Size1;
+ UINTN Size2;
Size1 = GetDevicePathSize (DevicePath1);
Size2 = GetDevicePathSize (DevicePath2);
@@ -100,7 +99,7 @@ InitializeHotPlugSupport (
Status = gBS->LocateProtocol (
&gEfiPciHotPlugInitProtocolGuid,
NULL,
- (VOID **) &gPciHotPlugInit
+ (VOID **)&gPciHotPlugInit
);
if (EFI_ERROR (Status)) {
@@ -114,10 +113,9 @@ InitializeHotPlugSupport (
);
if (!EFI_ERROR (Status)) {
-
- gPciRootHpcPool = HpcList;
- gPciRootHpcCount = HpcCount;
- gPciRootHpcData = AllocateZeroPool (sizeof (ROOT_HPC_DATA) * gPciRootHpcCount);
+ gPciRootHpcPool = HpcList;
+ gPciRootHpcCount = HpcCount;
+ gPciRootHpcData = AllocateZeroPool (sizeof (ROOT_HPC_DATA) * gPciRootHpcCount);
if (gPciRootHpcData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -139,16 +137,14 @@ InitializeHotPlugSupport (
**/
BOOLEAN
IsRootPciHotPlugBus (
- IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
- OUT UINTN *HpIndex OPTIONAL
+ IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
+ OUT UINTN *HpIndex OPTIONAL
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < gPciRootHpcCount; Index++) {
-
if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpbDevicePath, HpbDevicePath)) {
-
if (HpIndex != NULL) {
*HpIndex = Index;
}
@@ -173,16 +169,14 @@ IsRootPciHotPlugBus (
**/
BOOLEAN
IsRootPciHotPlugController (
- IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
- OUT UINTN *HpIndex
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ OUT UINTN *HpIndex
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < gPciRootHpcCount; Index++) {
-
if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpcDevicePath, HpcDevicePath)) {
-
if (HpIndex != NULL) {
*HpIndex = Index;
}
@@ -237,17 +231,16 @@ CreateEventForHpc (
**/
EFI_STATUS
AllRootHPCInitialized (
- IN UINTN TimeoutInMicroSeconds
+ IN UINTN TimeoutInMicroSeconds
)
{
UINT32 Delay;
UINTN Index;
- Delay = (UINT32) ((TimeoutInMicroSeconds / 30) + 1);
+ Delay = (UINT32)((TimeoutInMicroSeconds / 30) + 1);
do {
for (Index = 0; Index < gPciRootHpcCount; Index++) {
-
if (gPciRootHpcData[Index].Found && !gPciRootHpcData[Index].Initialized) {
break;
}
@@ -263,7 +256,6 @@ AllRootHPCInitialized (
gBS->Stall (30);
Delay--;
-
} while (Delay > 0);
return EFI_TIMEOUT;
@@ -280,10 +272,9 @@ AllRootHPCInitialized (
**/
BOOLEAN
IsSHPC (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
-
EFI_STATUS Status;
UINT8 Offset;
@@ -293,11 +284,11 @@ IsSHPC (
Offset = 0;
Status = LocateCapabilityRegBlock (
- PciIoDevice,
- EFI_PCI_CAPABILITY_ID_SHPC,
- &Offset,
- NULL
- );
+ PciIoDevice,
+ EFI_PCI_CAPABILITY_ID_SHPC,
+ &Offset,
+ NULL
+ );
//
// If the PCI-PCI bridge has the hot plug controller build-in,
@@ -328,13 +319,13 @@ IsSHPC (
**/
BOOLEAN
SupportsPcieHotplug (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- UINT32 Offset;
- EFI_STATUS Status;
- PCI_REG_PCIE_CAPABILITY Capability;
- PCI_REG_PCIE_SLOT_CAPABILITY SlotCapability;
+ UINT32 Offset;
+ EFI_STATUS Status;
+ PCI_REG_PCIE_CAPABILITY Capability;
+ PCI_REG_PCIE_SLOT_CAPABILITY SlotCapability;
if (PciIoDevice == NULL) {
return FALSE;
@@ -346,6 +337,7 @@ SupportsPcieHotplug (
if (!PciIoDevice->IsPciExp) {
return FALSE;
}
+
Offset = PciIoDevice->PciExpressCapabilityOffset +
OFFSET_OF (PCI_CAPABILITY_PCIEXP, Capability);
Status = PciIoDevice->PciIo.Pci.Read (
@@ -363,12 +355,13 @@ SupportsPcieHotplug (
// Check the contents of the register
//
switch (Capability.Bits.DevicePortType) {
- case PCIE_DEVICE_PORT_TYPE_ROOT_PORT:
- case PCIE_DEVICE_PORT_TYPE_DOWNSTREAM_PORT:
- break;
- default:
- return FALSE;
+ case PCIE_DEVICE_PORT_TYPE_ROOT_PORT:
+ case PCIE_DEVICE_PORT_TYPE_DOWNSTREAM_PORT:
+ break;
+ default:
+ return FALSE;
}
+
if (!Capability.Bits.SlotImplemented) {
return FALSE;
}
@@ -395,6 +388,7 @@ SupportsPcieHotplug (
if (SlotCapability.Bits.HotPlugCapable) {
return TRUE;
}
+
return FALSE;
}
@@ -406,34 +400,34 @@ SupportsPcieHotplug (
**/
VOID
GetResourcePaddingForHpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_STATUS Status;
- EFI_HPC_STATE State;
- UINT64 PciAddress;
- EFI_HPC_PADDING_ATTRIBUTES Attributes;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
+ EFI_STATUS Status;
+ EFI_HPC_STATE State;
+ UINT64 PciAddress;
+ EFI_HPC_PADDING_ATTRIBUTES Attributes;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
if (IsPciHotPlugBus (PciIoDevice)) {
//
// If PCI-PCI bridge device is PCI Hot Plug bus.
//
PciAddress = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
- Status = gPciHotPlugInit->GetResourcePadding (
- gPciHotPlugInit,
- PciIoDevice->DevicePath,
- PciAddress,
- &State,
- (VOID **) &Descriptors,
- &Attributes
- );
+ Status = gPciHotPlugInit->GetResourcePadding (
+ gPciHotPlugInit,
+ PciIoDevice->DevicePath,
+ PciAddress,
+ &State,
+ (VOID **)&Descriptors,
+ &Attributes
+ );
if (EFI_ERROR (Status)) {
return;
}
- if ((State & EFI_HPC_STATE_ENABLED) != 0 && (State & EFI_HPC_STATE_INITIALIZED) != 0) {
+ if (((State & EFI_HPC_STATE_ENABLED) != 0) && ((State & EFI_HPC_STATE_INITIALIZED) != 0)) {
PciIoDevice->ResourcePaddingDescriptors = Descriptors;
PciIoDevice->PaddingAttributes = Attributes;
}
@@ -453,7 +447,7 @@ GetResourcePaddingForHpb (
**/
BOOLEAN
IsPciHotPlugBus (
- PCI_IO_DEVICE *PciIoDevice
+ PCI_IO_DEVICE *PciIoDevice
)
{
if (IsSHPC (PciIoDevice)) {
@@ -475,10 +469,9 @@ IsPciHotPlugBus (
//
// Otherwise, see if it is a Root HPC
//
- if(IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {
+ if (IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {
return TRUE;
}
return FALSE;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
index e97d75362d..6ee43db250 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
@@ -12,24 +12,24 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// stall 1 second, its unit is 100ns
//
-#define STALL_1_SECOND 1000000
+#define STALL_1_SECOND 1000000
//
// PCI Hot Plug controller private data
//
typedef struct {
- EFI_EVENT Event;
- BOOLEAN Found;
- BOOLEAN Initialized;
- VOID *Padding;
+ EFI_EVENT Event;
+ BOOLEAN Found;
+ BOOLEAN Initialized;
+ VOID *Padding;
} ROOT_HPC_DATA;
//
// Reference of some global variables
//
-extern EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
-extern EFI_HPC_LOCATION *gPciRootHpcPool;
-extern ROOT_HPC_DATA *gPciRootHpcData;
+extern EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
+extern EFI_HPC_LOCATION *gPciRootHpcPool;
+extern ROOT_HPC_DATA *gPciRootHpcData;
/**
Event notification function to set Hot Plug controller status.
@@ -41,8 +41,8 @@ extern ROOT_HPC_DATA *gPciRootHpcData;
VOID
EFIAPI
PciHPCInitialized (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -57,8 +57,8 @@ PciHPCInitialized (
**/
BOOLEAN
EfiCompareDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
);
/**
@@ -90,7 +90,7 @@ InitializeHotPlugSupport (
**/
BOOLEAN
IsPciHotPlugBus (
- PCI_IO_DEVICE *PciIoDevice
+ PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -106,8 +106,8 @@ IsPciHotPlugBus (
**/
BOOLEAN
IsRootPciHotPlugBus (
- IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
- OUT UINTN *HpIndex OPTIONAL
+ IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
+ OUT UINTN *HpIndex OPTIONAL
);
/**
@@ -123,8 +123,8 @@ IsRootPciHotPlugBus (
**/
BOOLEAN
IsRootPciHotPlugController (
- IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
- OUT UINTN *HpIndex
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ OUT UINTN *HpIndex
);
/**
@@ -153,7 +153,7 @@ CreateEventForHpc (
**/
EFI_STATUS
AllRootHPCInitialized (
- IN UINTN TimeoutInMicroSeconds
+ IN UINTN TimeoutInMicroSeconds
);
/**
@@ -167,7 +167,7 @@ AllRootHPCInitialized (
**/
BOOLEAN
IsSHPC (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -188,7 +188,7 @@ IsSHPC (
**/
BOOLEAN
SupportsPcieHotplug (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -199,7 +199,7 @@ SupportsPcieHotplug (
**/
VOID
GetResourcePaddingForHpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
index 996d6fbe92..843815d0cb 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PciBus.h"
-extern EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;
+extern EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;
//
// Pci Io Protocol Interface
@@ -50,7 +50,7 @@ EFI_PCI_IO_PROTOCOL mPciIoInterface = {
**/
VOID
InitializePciIoInstance (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
CopyMem (&PciIoDevice->PciIo, &mPciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));
@@ -73,12 +73,12 @@ InitializePciIoInstance (
**/
EFI_STATUS
PciIoVerifyBarAccess (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 BarIndex,
- IN PCI_BAR_TYPE Type,
- IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN IN UINTN Count,
- IN UINT64 *Offset
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 BarIndex,
+ IN PCI_BAR_TYPE Type,
+ IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN IN UINTN Count,
+ IN UINT64 *Offset
)
{
if ((UINT32)Width >= EfiPciIoWidthMaximum) {
@@ -104,11 +104,11 @@ PciIoVerifyBarAccess (
// If Width is EfiPciIoWidthFifoUintX then convert to EfiPciIoWidthUintX
// If Width is EfiPciIoWidthFillUintX then convert to EfiPciIoWidthUintX
//
- if (Width >= EfiPciIoWidthFifoUint8 && Width <= EfiPciIoWidthFifoUint64) {
+ if ((Width >= EfiPciIoWidthFifoUint8) && (Width <= EfiPciIoWidthFifoUint64)) {
Count = 1;
}
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & 0x03);
if ((*Offset + Count * (UINTN)(1 << Width)) - 1 >= PciIoDevice->PciBar[BarIndex].Length) {
return EFI_INVALID_PARAMETER;
@@ -149,17 +149,16 @@ PciIoVerifyConfigAccess (
//
// If Width is EfiPciIoWidthFillUintX then convert to EfiPciIoWidthUintX
//
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & 0x03);
if (PciIoDevice->IsPciExp) {
if ((*Offset + Count * (UINTN)(1 << Width)) - 1 >= PCI_EXP_MAX_CONFIG_OFFSET) {
return EFI_UNSUPPORTED;
}
- ExtendOffset = LShiftU64 (*Offset, 32);
- *Offset = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
- *Offset = (*Offset) | ExtendOffset;
-
+ ExtendOffset = LShiftU64 (*Offset, 32);
+ *Offset = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
+ *Offset = (*Offset) | ExtendOffset;
} else {
if ((*Offset + Count * (UINTN)(1 << Width)) - 1 >= PCI_MAX_CONFIG_OFFSET) {
return EFI_UNSUPPORTED;
@@ -206,8 +205,8 @@ PciIoPollMem (
OUT UINT64 *Result
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -229,29 +228,34 @@ PciIoPollMem (
//
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
- Status = PciIoMemRead (This, Width, BarIndex, Offset, 1, Result);
+ Status = PciIoMemRead (This, Width, BarIndex, Offset, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
}
- if ((*Result & Mask) == Value || Delay == 0) {
+
+ if (((*Result & Mask) == Value) || (Delay == 0)) {
return EFI_SUCCESS;
}
+
do {
//
// Stall 10 us = 100 * 100ns
//
gBS->Stall (10);
- Status = PciIoMemRead (This, Width, BarIndex, Offset, 1, Result);
+ Status = PciIoMemRead (This, Width, BarIndex, Offset, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
}
+
if ((*Result & Mask) == Value) {
return EFI_SUCCESS;
}
+
if (Delay <= 100) {
return EFI_TIMEOUT;
}
+
Delay -= 100;
} while (TRUE);
}
@@ -259,7 +263,7 @@ PciIoPollMem (
Status = PciIoDevice->PciRootBridgeIo->PollMem (
PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
Offset,
Mask,
Value,
@@ -313,8 +317,8 @@ PciIoPollIo (
OUT UINT64 *Result
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -332,29 +336,34 @@ PciIoPollIo (
//
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
- Status = PciIoIoRead (This, Width, BarIndex, Offset, 1, Result);
+ Status = PciIoIoRead (This, Width, BarIndex, Offset, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
}
- if ((*Result & Mask) == Value || Delay == 0) {
+
+ if (((*Result & Mask) == Value) || (Delay == 0)) {
return EFI_SUCCESS;
}
+
do {
//
// Stall 10 us = 100 * 100ns
//
gBS->Stall (10);
- Status = PciIoIoRead (This, Width, BarIndex, Offset, 1, Result);
+ Status = PciIoIoRead (This, Width, BarIndex, Offset, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
}
+
if ((*Result & Mask) == Value) {
return EFI_SUCCESS;
}
+
if (Delay <= 100) {
return EFI_TIMEOUT;
}
+
Delay -= 100;
} while (TRUE);
}
@@ -362,7 +371,7 @@ PciIoPollIo (
Status = PciIoDevice->PciRootBridgeIo->PollIo (
PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
Offset,
Mask,
Value,
@@ -412,8 +421,8 @@ PciIoMemRead (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -436,18 +445,17 @@ PciIoMemRead (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
-
Status = PciIoDevice->PciRootBridgeIo->Mem.Read (
- PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Offset,
- Count,
- Buffer
- );
+ PciIoDevice->PciRootBridgeIo,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
+ Offset,
+ Count,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -491,8 +499,8 @@ PciIoMemWrite (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -515,17 +523,17 @@ PciIoMemWrite (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->Mem.Write (
- PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Offset,
- Count,
- Buffer
- );
+ PciIoDevice->PciRootBridgeIo,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
+ Offset,
+ Count,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -569,8 +577,8 @@ PciIoIoRead (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -593,13 +601,13 @@ PciIoIoRead (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->Io.Read (
PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
Offset,
Count,
Buffer
@@ -647,8 +655,8 @@ PciIoIoWrite (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -671,13 +679,13 @@ PciIoIoWrite (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->Io.Write (
PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
Offset,
Count,
Buffer
@@ -722,14 +730,14 @@ PciIoConfigRead (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
- UINT64 Address;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
+ UINT64 Address;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- Address = Offset;
- Status = PciIoVerifyConfigAccess (PciIoDevice, Width, Count, &Address);
+ Address = Offset;
+ Status = PciIoVerifyConfigAccess (PciIoDevice, Width, Count, &Address);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -740,13 +748,13 @@ PciIoConfigRead (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->Pci.Read (
PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
Address,
Count,
Buffer
@@ -791,14 +799,14 @@ PciIoConfigWrite (
IN OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
- UINT64 Address;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
+ UINT64 Address;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- Address = Offset;
- Status = PciIoVerifyConfigAccess (PciIoDevice, Width, Count, &Address);
+ Address = Offset;
+ Status = PciIoVerifyConfigAccess (PciIoDevice, Width, Count, &Address);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -809,17 +817,17 @@ PciIoConfigWrite (
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->Pci.Write (
- PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Address,
- Count,
- Buffer
- );
+ PciIoDevice->PciRootBridgeIo,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
+ Address,
+ Count,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -863,17 +871,17 @@ PciIoConfigWrite (
EFI_STATUS
EFIAPI
PciIoCopyMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 DestBarIndex,
- IN UINT64 DestOffset,
- IN UINT8 SrcBarIndex,
- IN UINT64 SrcOffset,
- IN UINTN Count
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 DestBarIndex,
+ IN UINT64 DestOffset,
+ IN UINT8 SrcBarIndex,
+ IN UINT64 SrcOffset,
+ IN UINTN Count
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -881,14 +889,15 @@ PciIoCopyMem (
return EFI_INVALID_PARAMETER;
}
- if (Width == EfiPciIoWidthFifoUint8 ||
- Width == EfiPciIoWidthFifoUint16 ||
- Width == EfiPciIoWidthFifoUint32 ||
- Width == EfiPciIoWidthFifoUint64 ||
- Width == EfiPciIoWidthFillUint8 ||
- Width == EfiPciIoWidthFillUint16 ||
- Width == EfiPciIoWidthFillUint32 ||
- Width == EfiPciIoWidthFillUint64) {
+ if ((Width == EfiPciIoWidthFifoUint8) ||
+ (Width == EfiPciIoWidthFifoUint16) ||
+ (Width == EfiPciIoWidthFifoUint32) ||
+ (Width == EfiPciIoWidthFifoUint64) ||
+ (Width == EfiPciIoWidthFillUint8) ||
+ (Width == EfiPciIoWidthFillUint16) ||
+ (Width == EfiPciIoWidthFillUint32) ||
+ (Width == EfiPciIoWidthFillUint64))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -906,19 +915,19 @@ PciIoCopyMem (
// If request is not aligned, then convert request to EfiPciIoWithXXXUint8
//
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {
- if ((SrcOffset & ((1 << (Width & 0x03)) - 1)) != 0 || (DestOffset & ((1 << (Width & 0x03)) - 1)) != 0) {
+ if (((SrcOffset & ((1 << (Width & 0x03)) - 1)) != 0) || ((DestOffset & ((1 << (Width & 0x03)) - 1)) != 0)) {
Count *= (UINTN)(1 << (Width & 0x03));
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH)(Width & (~0x03));
}
}
Status = PciIoDevice->PciRootBridgeIo->CopyMem (
- PciIoDevice->PciRootBridgeIo,
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- DestOffset,
- SrcOffset,
- Count
- );
+ PciIoDevice->PciRootBridgeIo,
+ (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
+ DestOffset,
+ SrcOffset,
+ Count
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -972,7 +981,7 @@ PciIoMap (
return EFI_INVALID_PARAMETER;
}
- if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) {
+ if ((HostAddress == NULL) || (NumberOfBytes == NULL) || (DeviceAddress == NULL) || (Mapping == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -982,13 +991,13 @@ PciIoMap (
}
Status = PciIoDevice->PciRootBridgeIo->Map (
- PciIoDevice->PciRootBridgeIo,
- RootBridgeIoOperation,
- HostAddress,
- NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ PciIoDevice->PciRootBridgeIo,
+ RootBridgeIoOperation,
+ HostAddress,
+ NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -1001,19 +1010,20 @@ PciIoMap (
if (mIoMmuProtocol != NULL) {
if (!EFI_ERROR (Status)) {
switch (Operation) {
- case EfiPciIoOperationBusMasterRead:
- IoMmuAttribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EfiPciIoOperationBusMasterWrite:
- IoMmuAttribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EfiPciIoOperationBusMasterCommonBuffer:
- IoMmuAttribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EfiPciIoOperationBusMasterRead:
+ IoMmuAttribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EfiPciIoOperationBusMasterWrite:
+ IoMmuAttribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EfiPciIoOperationBusMasterCommonBuffer:
+ IoMmuAttribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
mIoMmuProtocol->SetAttribute (
mIoMmuProtocol,
PciIoDevice->Handle,
@@ -1043,8 +1053,8 @@ PciIoUnmap (
IN VOID *Mapping
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -1058,9 +1068,9 @@ PciIoUnmap (
}
Status = PciIoDevice->PciRootBridgeIo->Unmap (
- PciIoDevice->PciRootBridgeIo,
- Mapping
- );
+ PciIoDevice->PciRootBridgeIo,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -1096,19 +1106,20 @@ PciIoUnmap (
EFI_STATUS
EFIAPI
PciIoAllocateBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
if ((Attributes &
- (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED))) != 0){
+ (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED))) != 0)
+ {
return EFI_UNSUPPORTED;
}
@@ -1119,13 +1130,13 @@ PciIoAllocateBuffer (
}
Status = PciIoDevice->PciRootBridgeIo->AllocateBuffer (
- PciIoDevice->PciRootBridgeIo,
- Type,
- MemoryType,
- Pages,
- HostAddress,
- Attributes
- );
+ PciIoDevice->PciRootBridgeIo,
+ Type,
+ MemoryType,
+ Pages,
+ HostAddress,
+ Attributes
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -1153,21 +1164,21 @@ PciIoAllocateBuffer (
EFI_STATUS
EFIAPI
PciIoFreeBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
Status = PciIoDevice->PciRootBridgeIo->FreeBuffer (
- PciIoDevice->PciRootBridgeIo,
- Pages,
- HostAddress
- );
+ PciIoDevice->PciRootBridgeIo,
+ Pages,
+ HostAddress
+ );
if (EFI_ERROR (Status)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -1197,8 +1208,8 @@ PciIoFlush (
IN EFI_PCI_IO_PROTOCOL *This
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
@@ -1239,11 +1250,11 @@ PciIoGetLocation (
OUT UINTN *Function
)
{
- PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *PciIoDevice;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Segment == NULL || Bus == NULL || Device == NULL || Function == NULL) {
+ if ((Segment == NULL) || (Bus == NULL) || (Device == NULL) || (Function == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1269,34 +1280,35 @@ PciIoGetLocation (
**/
BOOLEAN
CheckBarType (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 BarIndex,
- IN PCI_BAR_TYPE BarType
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 BarIndex,
+ IN PCI_BAR_TYPE BarType
)
{
switch (BarType) {
+ case PciBarTypeMem:
+
+ if ((PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeMem32) &&
+ (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypePMem32) &&
+ (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypePMem64) &&
+ (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeMem64))
+ {
+ return FALSE;
+ }
- case PciBarTypeMem:
-
- if (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeMem32 &&
- PciIoDevice->PciBar[BarIndex].BarType != PciBarTypePMem32 &&
- PciIoDevice->PciBar[BarIndex].BarType != PciBarTypePMem64 &&
- PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeMem64 ) {
- return FALSE;
- }
-
- return TRUE;
+ return TRUE;
- case PciBarTypeIo:
- if (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeIo32 &&
- PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeIo16){
- return FALSE;
- }
+ case PciBarTypeIo:
+ if ((PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeIo32) &&
+ (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeIo16))
+ {
+ return FALSE;
+ }
- return TRUE;
+ return TRUE;
- default:
- break;
+ default:
+ break;
}
return FALSE;
@@ -1329,10 +1341,10 @@ ModifyRootBridgeAttributes (
// Get the current attributes of this PCI device's PCI Root Bridge
//
Status = PciIoDevice->PciRootBridgeIo->GetAttributes (
- PciIoDevice->PciRootBridgeIo,
- &PciRootBridgeSupports,
- &PciRootBridgeAttributes
- );
+ PciIoDevice->PciRootBridgeIo,
+ &PciRootBridgeSupports,
+ &PciRootBridgeAttributes
+ );
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
@@ -1357,13 +1369,12 @@ ModifyRootBridgeAttributes (
// Call the PCI Root Bridge to attempt to modify the attributes
//
if ((NewPciRootBridgeAttributes ^ PciRootBridgeAttributes) != 0) {
-
Status = PciIoDevice->PciRootBridgeIo->SetAttributes (
- PciIoDevice->PciRootBridgeIo,
- NewPciRootBridgeAttributes,
- NULL,
- NULL
- );
+ PciIoDevice->PciRootBridgeIo,
+ NewPciRootBridgeAttributes,
+ NULL,
+ NULL
+ );
if (EFI_ERROR (Status)) {
//
// The PCI Root Bridge could not modify the attributes, so return the error.
@@ -1396,8 +1407,8 @@ SupportPaletteSnoopAttributes (
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
)
{
- PCI_IO_DEVICE *Temp;
- UINT16 VGACommand;
+ PCI_IO_DEVICE *Temp;
+ UINT16 VGACommand;
//
// Snoop attribute can be only modified by GFX
@@ -1428,11 +1439,11 @@ SupportPaletteSnoopAttributes (
//
return EFI_SUCCESS;
}
+
//
// Check if they are on the same bus
//
if (Temp->Parent == PciIoDevice->Parent) {
-
PCI_READ_COMMAND_REGISTER (Temp, &VGACommand);
//
@@ -1474,7 +1485,6 @@ SupportPaletteSnoopAttributes (
} else {
return EFI_UNSUPPORTED;
}
-
} else {
//
// GFX should be set to snoop
@@ -1485,7 +1495,6 @@ SupportPaletteSnoopAttributes (
} else {
return EFI_UNSUPPORTED;
}
-
}
return EFI_SUCCESS;
@@ -1513,72 +1522,73 @@ SupportPaletteSnoopAttributes (
EFI_STATUS
EFIAPI
PciIoAttributes (
- IN EFI_PCI_IO_PROTOCOL * This,
+ IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
IN UINT64 Attributes,
OUT UINT64 *Result OPTIONAL
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
- PCI_IO_DEVICE *UpStreamBridge;
- PCI_IO_DEVICE *Temp;
+ PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *UpStreamBridge;
+ PCI_IO_DEVICE *Temp;
- UINT64 Supports;
- UINT64 UpStreamAttributes;
- UINT16 BridgeControl;
- UINT16 Command;
+ UINT64 Supports;
+ UINT64 UpStreamAttributes;
+ UINT16 BridgeControl;
+ UINT16 Command;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
switch (Operation) {
- case EfiPciIoAttributeOperationGet:
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
+ case EfiPciIoAttributeOperationGet:
+ if (Result == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
- *Result = PciIoDevice->Attributes;
- return EFI_SUCCESS;
+ *Result = PciIoDevice->Attributes;
+ return EFI_SUCCESS;
- case EfiPciIoAttributeOperationSupported:
- if (Result == NULL) {
- return EFI_INVALID_PARAMETER;
- }
+ case EfiPciIoAttributeOperationSupported:
+ if (Result == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
- *Result = PciIoDevice->Supports;
- return EFI_SUCCESS;
+ *Result = PciIoDevice->Supports;
+ return EFI_SUCCESS;
- case EfiPciIoAttributeOperationSet:
- Status = PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationEnable,
- Attributes,
- NULL
- );
- if (EFI_ERROR (Status)) {
- return EFI_UNSUPPORTED;
- }
+ case EfiPciIoAttributeOperationSet:
+ Status = PciIoDevice->PciIo.Attributes (
+ &(PciIoDevice->PciIo),
+ EfiPciIoAttributeOperationEnable,
+ Attributes,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
- Status = PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationDisable,
- (~Attributes) & (PciIoDevice->Supports),
- NULL
- );
- if (EFI_ERROR (Status)) {
- return EFI_UNSUPPORTED;
- }
+ Status = PciIoDevice->PciIo.Attributes (
+ &(PciIoDevice->PciIo),
+ EfiPciIoAttributeOperationDisable,
+ (~Attributes) & (PciIoDevice->Supports),
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
- return EFI_SUCCESS;
+ return EFI_SUCCESS;
- case EfiPciIoAttributeOperationEnable:
- case EfiPciIoAttributeOperationDisable:
- break;
+ case EfiPciIoAttributeOperationEnable:
+ case EfiPciIoAttributeOperationDisable:
+ break;
- default:
- return EFI_INVALID_PARAMETER;
+ default:
+ return EFI_INVALID_PARAMETER;
}
+
//
// Just a trick for ENABLE attribute
// EFI_PCI_DEVICE_ENABLE is not defined in UEFI spec, which is the internal usage.
@@ -1631,7 +1641,6 @@ PciIoAttributes (
// For PPB & P2C, set relevant attribute bits
//
if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
-
if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {
BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA;
}
@@ -1647,16 +1656,16 @@ PciIoAttributes (
if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {
BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA_16;
}
-
} else {
//
// Do with the attributes on VGA
// Only for VGA's legacy resource, we just can enable once.
//
if ((Attributes &
- (EFI_PCI_IO_ATTRIBUTE_VGA_IO |
- EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 |
- EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)) != 0) {
+ (EFI_PCI_IO_ATTRIBUTE_VGA_IO |
+ EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 |
+ EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)) != 0)
+ {
//
// Check if a VGA has been enabled before enabling a new one
//
@@ -1665,7 +1674,7 @@ PciIoAttributes (
// Check if there have been an active VGA device on the same Host Bridge
//
Temp = LocateVgaDeviceOnHostBridge (PciIoDevice->PciRootBridgeIo->ParentHandle);
- if (Temp != NULL && Temp != PciIoDevice) {
+ if ((Temp != NULL) && (Temp != PciIoDevice)) {
//
// An active VGA has been detected, so can not enable another
//
@@ -1678,7 +1687,6 @@ PciIoAttributes (
// Do with the attributes on GFX
//
if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) != 0) {
-
if (Operation == EfiPciIoAttributeOperationEnable) {
//
// Check if snoop can be enabled in current configuration
@@ -1686,7 +1694,6 @@ PciIoAttributes (
Status = SupportPaletteSnoopAttributes (PciIoDevice, Operation);
if (EFI_ERROR (Status)) {
-
//
// Enable operation is forbidden, so mask the bit in attributes
// so as to keep consistent with the actual Status
@@ -1696,7 +1703,6 @@ PciIoAttributes (
//
//
return EFI_UNSUPPORTED;
-
}
}
@@ -1718,6 +1724,7 @@ PciIoAttributes (
if ((Attributes & EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) != 0) {
Command |= EFI_PCI_COMMAND_BUS_MASTER;
}
+
//
// The upstream bridge should be also set to relevant attribute
// expect for IO, Mem and BusMaster
@@ -1727,7 +1734,7 @@ PciIoAttributes (
EFI_PCI_IO_ATTRIBUTE_MEMORY |
EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
)
- );
+ );
UpStreamBridge = PciIoDevice->Parent;
if (Operation == EfiPciIoAttributeOperationEnable) {
@@ -1745,13 +1752,12 @@ PciIoAttributes (
// Enable attributes of the upstream bridge
//
Status = UpStreamBridge->PciIo.Attributes (
- &(UpStreamBridge->PciIo),
- EfiPciIoAttributeOperationEnable,
- UpStreamAttributes,
- NULL
- );
+ &(UpStreamBridge->PciIo),
+ EfiPciIoAttributeOperationEnable,
+ UpStreamAttributes,
+ NULL
+ );
} else {
-
//
// Disable relevant attributes to command register and bridge control register
//
@@ -1761,8 +1767,7 @@ PciIoAttributes (
}
PciIoDevice->Attributes &= (~Attributes);
- Status = EFI_SUCCESS;
-
+ Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
@@ -1790,20 +1795,20 @@ PciIoAttributes (
**/
UINT64
GetMmioAddressTranslationOffset (
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo,
- UINT64 AddrRangeMin,
- UINT64 AddrLen
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo,
+ UINT64 AddrRangeMin,
+ UINT64 AddrLen
)
{
- EFI_STATUS Status;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
+ EFI_STATUS Status;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
Status = RootBridgeIo->Configuration (
RootBridgeIo,
- (VOID **) &Configuration
+ (VOID **)&Configuration
);
if (EFI_ERROR (Status)) {
- return (UINT64) -1;
+ return (UINT64)-1;
}
// According to UEFI 2.7, EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL::Configuration()
@@ -1814,9 +1819,11 @@ GetMmioAddressTranslationOffset (
if ((Configuration->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&
(Configuration->AddrRangeMin + Configuration->AddrTranslationOffset <= AddrRangeMin) &&
(Configuration->AddrRangeMin + Configuration->AddrLen + Configuration->AddrTranslationOffset >= AddrRangeMin + AddrLen)
- ) {
+ )
+ {
return Configuration->AddrTranslationOffset;
}
+
Configuration++;
}
@@ -1824,7 +1831,7 @@ GetMmioAddressTranslationOffset (
// The resource occupied by BAR should be in the range reported by RootBridge.
//
ASSERT (FALSE);
- return (UINT64) -1;
+ return (UINT64)-1;
}
/**
@@ -1852,19 +1859,19 @@ GetMmioAddressTranslationOffset (
EFI_STATUS
EFIAPI
PciIoGetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL * This,
- IN UINT8 BarIndex,
- OUT UINT64 *Supports OPTIONAL,
- OUT VOID **Resources OPTIONAL
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT8 BarIndex,
+ OUT UINT64 *Supports OPTIONAL,
+ OUT VOID **Resources OPTIONAL
)
{
- PCI_IO_DEVICE *PciIoDevice;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ PCI_IO_DEVICE *PciIoDevice;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Supports == NULL && Resources == NULL) {
+ if ((Supports == NULL) && (Resources == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1886,69 +1893,69 @@ PciIoGetBarAttributes (
return EFI_OUT_OF_RESOURCES;
}
- *Resources = Descriptor;
+ *Resources = Descriptor;
Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Descriptor->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
+ Descriptor->Len = (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);
Descriptor->AddrRangeMin = PciIoDevice->PciBar[BarIndex].BaseAddress;
Descriptor->AddrLen = PciIoDevice->PciBar[BarIndex].Length;
Descriptor->AddrRangeMax = PciIoDevice->PciBar[BarIndex].Alignment;
switch (PciIoDevice->PciBar[BarIndex].BarType) {
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- //
- // Io
- //
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- break;
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ //
+ // Io
+ //
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ break;
- case PciBarTypePMem32:
- //
- // prefetchable
- //
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case PciBarTypePMem32:
+ //
+ // prefetchable
+ //
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
//
// Fall through
//
- case PciBarTypeMem32:
- //
- // Mem
- //
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // 32 bit
- //
- Descriptor->AddrSpaceGranularity = 32;
- break;
+ case PciBarTypeMem32:
+ //
+ // Mem
+ //
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // 32 bit
+ //
+ Descriptor->AddrSpaceGranularity = 32;
+ break;
- case PciBarTypePMem64:
- //
- // prefetchable
- //
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case PciBarTypePMem64:
+ //
+ // prefetchable
+ //
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
//
// Fall through
//
- case PciBarTypeMem64:
- //
- // Mem
- //
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- //
- // 64 bit
- //
- Descriptor->AddrSpaceGranularity = 64;
- break;
+ case PciBarTypeMem64:
+ //
+ // Mem
+ //
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ //
+ // 64 bit
+ //
+ Descriptor->AddrSpaceGranularity = 64;
+ break;
- default:
- break;
+ default:
+ break;
}
//
// put the checksum
//
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1);
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)(Descriptor + 1);
End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0;
@@ -1961,7 +1968,7 @@ PciIoGetBarAttributes (
Descriptor->AddrRangeMin,
Descriptor->AddrLen
);
- if (Descriptor->AddrTranslationOffset == (UINT64) -1) {
+ if (Descriptor->AddrTranslationOffset == (UINT64)-1) {
FreePool (Descriptor);
return EFI_UNSUPPORTED;
}
@@ -2002,30 +2009,31 @@ PciIoGetBarAttributes (
EFI_STATUS
EFIAPI
PciIoSetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN UINT8 BarIndex,
- IN OUT UINT64 *Offset,
- IN OUT UINT64 *Length
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT64 Attributes,
+ IN UINT8 BarIndex,
+ IN OUT UINT64 *Offset,
+ IN OUT UINT64 *Length
)
{
- EFI_STATUS Status;
- PCI_IO_DEVICE *PciIoDevice;
- UINT64 NonRelativeOffset;
- UINT64 Supports;
+ EFI_STATUS Status;
+ PCI_IO_DEVICE *PciIoDevice;
+ UINT64 NonRelativeOffset;
+ UINT64 Supports;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
//
// Make sure Offset and Length are not NULL
//
- if (Offset == NULL || Length == NULL) {
+ if ((Offset == NULL) || (Length == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypeUnknown) {
return EFI_UNSUPPORTED;
}
+
//
// This driver does not support setting the WRITE_COMBINE or the CACHED attributes.
// If Attributes is not 0, then return EFI_UNSUPPORTED.
@@ -2035,19 +2043,20 @@ PciIoSetBarAttributes (
if (Attributes != (Attributes & Supports)) {
return EFI_UNSUPPORTED;
}
+
//
// Attributes must be supported. Make sure the BAR range described by BarIndex, Offset, and
// Length are valid for this PCI device.
//
NonRelativeOffset = *Offset;
- Status = PciIoVerifyBarAccess (
- PciIoDevice,
- BarIndex,
- PciBarTypeMem,
- EfiPciIoWidthUint8,
- (UINT32) *Length,
- &NonRelativeOffset
- );
+ Status = PciIoVerifyBarAccess (
+ PciIoDevice,
+ BarIndex,
+ PciBarTypeMem,
+ EfiPciIoWidthUint8,
+ (UINT32)*Length,
+ &NonRelativeOffset
+ );
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
@@ -2055,7 +2064,6 @@ PciIoSetBarAttributes (
return EFI_SUCCESS;
}
-
/**
Test whether two Pci devices has same parent bridge.
@@ -2068,12 +2076,12 @@ PciIoSetBarAttributes (
**/
BOOLEAN
PciDevicesOnTheSamePath (
- IN PCI_IO_DEVICE *PciDevice1,
- IN PCI_IO_DEVICE *PciDevice2
+ IN PCI_IO_DEVICE *PciDevice1,
+ IN PCI_IO_DEVICE *PciDevice2
)
{
- BOOLEAN Existed1;
- BOOLEAN Existed2;
+ BOOLEAN Existed1;
+ BOOLEAN Existed2;
if (PciDevice1->Parent == PciDevice2->Parent) {
return TRUE;
@@ -2082,5 +2090,5 @@ PciDevicesOnTheSamePath (
Existed1 = PciDeviceExisted (PciDevice1->Parent, PciDevice2);
Existed2 = PciDeviceExisted (PciDevice2->Parent, PciDevice1);
- return (BOOLEAN) (Existed1 || Existed2);
+ return (BOOLEAN)(Existed1 || Existed2);
}
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
index 5de6222f93..a73bd06bcf 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
@@ -17,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
InitializePciIoInstance (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -37,12 +37,12 @@ InitializePciIoInstance (
**/
EFI_STATUS
PciIoVerifyBarAccess (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 BarIndex,
- IN PCI_BAR_TYPE Type,
- IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN IN UINTN Count,
- IN UINT64 *Offset
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 BarIndex,
+ IN PCI_BAR_TYPE Type,
+ IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN IN UINTN Count,
+ IN UINT64 *Offset
);
/**
@@ -347,13 +347,13 @@ PciIoConfigWrite (
EFI_STATUS
EFIAPI
PciIoCopyMem (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
- IN UINT8 DestBarIndex,
- IN UINT64 DestOffset,
- IN UINT8 SrcBarIndex,
- IN UINT64 SrcOffset,
- IN UINTN Count
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 DestBarIndex,
+ IN UINT64 DestOffset,
+ IN UINT8 SrcBarIndex,
+ IN UINT64 SrcOffset,
+ IN UINTN Count
);
/**
@@ -426,12 +426,12 @@ PciIoUnmap (
EFI_STATUS
EFIAPI
PciIoAllocateBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
);
/**
@@ -449,9 +449,9 @@ PciIoAllocateBuffer (
EFI_STATUS
EFIAPI
PciIoFreeBuffer (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
);
/**
@@ -508,9 +508,9 @@ PciIoGetLocation (
**/
BOOLEAN
CheckBarType (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT8 BarIndex,
- IN PCI_BAR_TYPE BarType
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT8 BarIndex,
+ IN PCI_BAR_TYPE BarType
);
/**
@@ -569,7 +569,7 @@ SupportPaletteSnoopAttributes (
EFI_STATUS
EFIAPI
PciIoAttributes (
- IN EFI_PCI_IO_PROTOCOL * This,
+ IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
IN UINT64 Attributes,
OUT UINT64 *Result OPTIONAL
@@ -600,10 +600,10 @@ PciIoAttributes (
EFI_STATUS
EFIAPI
PciIoGetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL * This,
- IN UINT8 BarIndex,
- OUT UINT64 *Supports OPTIONAL,
- OUT VOID **Resources OPTIONAL
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT8 BarIndex,
+ OUT UINT64 *Supports OPTIONAL,
+ OUT VOID **Resources OPTIONAL
);
/**
@@ -633,14 +633,13 @@ PciIoGetBarAttributes (
EFI_STATUS
EFIAPI
PciIoSetBarAttributes (
- IN EFI_PCI_IO_PROTOCOL *This,
- IN UINT64 Attributes,
- IN UINT8 BarIndex,
- IN OUT UINT64 *Offset,
- IN OUT UINT64 *Length
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT64 Attributes,
+ IN UINT8 BarIndex,
+ IN OUT UINT64 *Offset,
+ IN OUT UINT64 *Length
);
-
/**
Test whether two Pci devices has same parent bridge.
@@ -653,8 +652,8 @@ PciIoSetBarAttributes (
**/
BOOLEAN
PciDevicesOnTheSamePath (
- IN PCI_IO_DEVICE *PciDevice1,
- IN PCI_IO_DEVICE *PciDevice2
+ IN PCI_IO_DEVICE *PciDevice1,
+ IN PCI_IO_DEVICE *PciDevice2
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index 0ad1dfa526..63d149b3b8 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PciBus.h"
GLOBAL_REMOVE_IF_UNREFERENCED
-CHAR16 *mBarTypeStr[] = {
+CHAR16 *mBarTypeStr[] = {
L"Unknow",
L" Io16",
L" Io32",
@@ -22,7 +22,7 @@ CHAR16 *mBarTypeStr[] = {
L" Io",
L" Mem",
L"Unknow"
- };
+};
/**
Retrieve the max bus number that is assigned to the Root Bridge hierarchy.
@@ -35,7 +35,7 @@ CHAR16 *mBarTypeStr[] = {
**/
UINT16
PciGetMaxBusNumber (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
)
{
PCI_IO_DEVICE *RootBridge;
@@ -49,6 +49,7 @@ PciGetMaxBusNumber (
while (RootBridge->Parent != NULL) {
RootBridge = RootBridge->Parent;
}
+
MaxNumberInRange = 0;
//
// Iterate the bus number ranges to get max PCI bus number
@@ -58,7 +59,8 @@ PciGetMaxBusNumber (
MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;
BusNumberRanges++;
}
- return (UINT16) MaxNumberInRange;
+
+ return (UINT16)MaxNumberInRange;
}
/**
@@ -69,7 +71,7 @@ PciGetMaxBusNumber (
**/
VOID
GetBackPcCardBar (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
UINT32 Address;
@@ -91,9 +93,9 @@ GetBackPcCardBar (
&Address
);
- (PciIoDevice->PciBar)[P2C_MEM_1].BaseAddress = (UINT64) (Address);
- (PciIoDevice->PciBar)[P2C_MEM_1].Length = 0x2000000;
- (PciIoDevice->PciBar)[P2C_MEM_1].BarType = PciBarTypeMem32;
+ (PciIoDevice->PciBar)[P2C_MEM_1].BaseAddress = (UINT64)(Address);
+ (PciIoDevice->PciBar)[P2C_MEM_1].Length = 0x2000000;
+ (PciIoDevice->PciBar)[P2C_MEM_1].BarType = PciBarTypeMem32;
Address = 0;
PciIoDevice->PciIo.Pci.Read (
@@ -103,9 +105,9 @@ GetBackPcCardBar (
1,
&Address
);
- (PciIoDevice->PciBar)[P2C_MEM_2].BaseAddress = (UINT64) (Address);
- (PciIoDevice->PciBar)[P2C_MEM_2].Length = 0x2000000;
- (PciIoDevice->PciBar)[P2C_MEM_2].BarType = PciBarTypePMem32;
+ (PciIoDevice->PciBar)[P2C_MEM_2].BaseAddress = (UINT64)(Address);
+ (PciIoDevice->PciBar)[P2C_MEM_2].Length = 0x2000000;
+ (PciIoDevice->PciBar)[P2C_MEM_2].BarType = PciBarTypePMem32;
Address = 0;
PciIoDevice->PciIo.Pci.Read (
@@ -115,7 +117,7 @@ GetBackPcCardBar (
1,
&Address
);
- (PciIoDevice->PciBar)[P2C_IO_1].BaseAddress = (UINT64) (Address);
+ (PciIoDevice->PciBar)[P2C_IO_1].BaseAddress = (UINT64)(Address);
(PciIoDevice->PciBar)[P2C_IO_1].Length = 0x100;
(PciIoDevice->PciBar)[P2C_IO_1].BarType = PciBarTypeIo16;
@@ -127,13 +129,12 @@ GetBackPcCardBar (
1,
&Address
);
- (PciIoDevice->PciBar)[P2C_IO_2].BaseAddress = (UINT64) (Address);
+ (PciIoDevice->PciBar)[P2C_IO_2].BaseAddress = (UINT64)(Address);
(PciIoDevice->PciBar)[P2C_IO_2].Length = 0x100;
(PciIoDevice->PciBar)[P2C_IO_2].BarType = PciBarTypeIo16;
-
}
- if (gPciHotPlugInit != NULL && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
+ if ((gPciHotPlugInit != NULL) && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
GetResourcePaddingForHpb (PciIoDevice);
}
}
@@ -148,13 +149,13 @@ GetBackPcCardBar (
**/
VOID
RemoveRejectedPciDevices (
- IN EFI_HANDLE RootBridgeHandle,
- IN PCI_IO_DEVICE *Bridge
+ IN EFI_HANDLE RootBridgeHandle,
+ IN PCI_IO_DEVICE *Bridge
)
{
- PCI_IO_DEVICE *Temp;
- LIST_ENTRY *CurrentLink;
- LIST_ENTRY *LastLink;
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+ LIST_ENTRY *LastLink;
if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
return;
@@ -163,7 +164,6 @@ RemoveRejectedPciDevices (
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
-
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (IS_PCI_BRIDGE (&Temp->Pci)) {
@@ -176,7 +176,6 @@ RemoveRejectedPciDevices (
// Skip rejection for all PPBs, while detect rejection for others
//
if (IsPciDeviceRejected (Temp)) {
-
//
// For P2C, remove all devices on it
//
@@ -206,41 +205,49 @@ RemoveRejectedPciDevices (
**/
VOID
DumpBridgeResource (
- IN PCI_RESOURCE_NODE *BridgeResource
+ IN PCI_RESOURCE_NODE *BridgeResource
)
{
- LIST_ENTRY *Link;
- PCI_RESOURCE_NODE *Resource;
- PCI_BAR *Bar;
+ LIST_ENTRY *Link;
+ PCI_RESOURCE_NODE *Resource;
+ PCI_BAR *Bar;
if ((BridgeResource != NULL) && (BridgeResource->Length != 0)) {
DEBUG ((
- DEBUG_INFO, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
+ DEBUG_INFO,
+ "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
mBarTypeStr[MIN (BridgeResource->ResType, PciBarTypeMaxType)],
BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress,
- BridgeResource->Length, BridgeResource->Alignment
+ BridgeResource->Length,
+ BridgeResource->Alignment
));
for ( Link = GetFirstNode (&BridgeResource->ChildList)
- ; !IsNull (&BridgeResource->ChildList, Link)
- ; Link = GetNextNode (&BridgeResource->ChildList, Link)
- ) {
+ ; !IsNull (&BridgeResource->ChildList, Link)
+ ; Link = GetNextNode (&BridgeResource->ChildList, Link)
+ )
+ {
Resource = RESOURCE_NODE_FROM_LINK (Link);
if (Resource->ResourceUsage == PciResUsageTypical) {
Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar;
DEBUG ((
- DEBUG_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s [%02x|%02x|%02x:",
- Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment,
+ DEBUG_INFO,
+ " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s [%02x|%02x|%02x:",
+ Bar[Resource->Bar].BaseAddress,
+ Resource->Length,
+ Resource->Alignment,
IS_PCI_BRIDGE (&Resource->PciDev->Pci) ? L"PPB" :
IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) ? L"P2C" :
- L"PCI",
- Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,
+ L"PCI",
+ Resource->PciDev->BusNumber,
+ Resource->PciDev->DeviceNumber,
Resource->PciDev->FunctionNumber
));
if ((!IS_PCI_BRIDGE (&Resource->PciDev->Pci) && !IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci)) ||
(IS_PCI_BRIDGE (&Resource->PciDev->Pci) && (Resource->Bar < PPB_IO_RANGE)) ||
(IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) && (Resource->Bar < P2C_MEM_1))
- ) {
+ )
+ {
//
// The resource requirement comes from the device itself.
//
@@ -254,9 +261,11 @@ DumpBridgeResource (
} else {
DEBUG ((DEBUG_INFO, " Base = Padding;\tLength = 0x%lx;\tAlignment = 0x%lx", Resource->Length, Resource->Alignment));
}
+
if (BridgeResource->ResType != Resource->ResType) {
DEBUG ((DEBUG_INFO, "; Type = %s", mBarTypeStr[MIN (Resource->ResType, PciBarTypeMaxType)]));
}
+
DEBUG ((DEBUG_INFO, "\n"));
}
}
@@ -273,25 +282,27 @@ DumpBridgeResource (
**/
UINTN
FindResourceNode (
- IN PCI_IO_DEVICE *Device,
- IN PCI_RESOURCE_NODE *BridgeResource,
- OUT PCI_RESOURCE_NODE **DeviceResources OPTIONAL
+ IN PCI_IO_DEVICE *Device,
+ IN PCI_RESOURCE_NODE *BridgeResource,
+ OUT PCI_RESOURCE_NODE **DeviceResources OPTIONAL
)
{
- LIST_ENTRY *Link;
- PCI_RESOURCE_NODE *Resource;
- UINTN Count;
+ LIST_ENTRY *Link;
+ PCI_RESOURCE_NODE *Resource;
+ UINTN Count;
Count = 0;
for ( Link = BridgeResource->ChildList.ForwardLink
- ; Link != &BridgeResource->ChildList
- ; Link = Link->ForwardLink
- ) {
+ ; Link != &BridgeResource->ChildList
+ ; Link = Link->ForwardLink
+ )
+ {
Resource = RESOURCE_NODE_FROM_LINK (Link);
if (Resource->PciDev == Device) {
if (DeviceResources != NULL) {
DeviceResources[Count] = Resource;
}
+
Count++;
}
}
@@ -308,18 +319,18 @@ FindResourceNode (
**/
VOID
DumpResourceMap (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_RESOURCE_NODE **Resources,
- IN UINTN ResourceCount
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_RESOURCE_NODE **Resources,
+ IN UINTN ResourceCount
)
{
- EFI_STATUS Status;
- LIST_ENTRY *Link;
- PCI_IO_DEVICE *Device;
- UINTN Index;
- CHAR16 *Str;
- PCI_RESOURCE_NODE **ChildResources;
- UINTN ChildResourceCount;
+ EFI_STATUS Status;
+ LIST_ENTRY *Link;
+ PCI_IO_DEVICE *Device;
+ UINTN Index;
+ CHAR16 *Str;
+ PCI_RESOURCE_NODE **ChildResources;
+ UINTN ChildResourceCount;
DEBUG ((DEBUG_INFO, "PciBus: Resource Map for "));
@@ -333,8 +344,11 @@ DumpResourceMap (
);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_INFO, "Bridge [%02x|%02x|%02x]\n",
- Bridge->BusNumber, Bridge->DeviceNumber, Bridge->FunctionNumber
+ DEBUG_INFO,
+ "Bridge [%02x|%02x|%02x]\n",
+ Bridge->BusNumber,
+ Bridge->DeviceNumber,
+ Bridge->FunctionNumber
));
} else {
Str = ConvertDevicePathToText (
@@ -351,19 +365,21 @@ DumpResourceMap (
for (Index = 0; Index < ResourceCount; Index++) {
DumpBridgeResource (Resources[Index]);
}
+
DEBUG ((DEBUG_INFO, "\n"));
for ( Link = Bridge->ChildList.ForwardLink
- ; Link != &Bridge->ChildList
- ; Link = Link->ForwardLink
- ) {
+ ; Link != &Bridge->ChildList
+ ; Link = Link->ForwardLink
+ )
+ {
Device = PCI_IO_DEVICE_FROM_LINK (Link);
if (IS_PCI_BRIDGE (&Device->Pci)) {
-
ChildResourceCount = 0;
for (Index = 0; Index < ResourceCount; Index++) {
ChildResourceCount += FindResourceNode (Device, Resources[Index], NULL);
}
+
ChildResources = AllocatePool (sizeof (PCI_RESOURCE_NODE *) * ChildResourceCount);
ASSERT (ChildResources != NULL);
ChildResourceCount = 0;
@@ -387,14 +403,14 @@ DumpResourceMap (
**/
BOOLEAN
AdjustPciDeviceBarSize (
- IN PCI_IO_DEVICE *RootBridgeDev
+ IN PCI_IO_DEVICE *RootBridgeDev
)
{
- PCI_IO_DEVICE *PciIoDevice;
- LIST_ENTRY *CurrentLink;
- BOOLEAN Adjusted;
- UINTN Offset;
- UINTN BarIndex;
+ PCI_IO_DEVICE *PciIoDevice;
+ LIST_ENTRY *CurrentLink;
+ BOOLEAN Adjusted;
+ UINTN Offset;
+ UINTN BarIndex;
Adjusted = FALSE;
CurrentLink = RootBridgeDev->ChildList.ForwardLink;
@@ -411,7 +427,9 @@ AdjustPciDeviceBarSize (
DEBUG ((
DEBUG_ERROR,
"PciBus: [%02x|%02x|%02x] Adjust Pci Device Bar Size\n",
- PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber
+ PciIoDevice->BusNumber,
+ PciIoDevice->DeviceNumber,
+ PciIoDevice->FunctionNumber
));
PciProgramResizableBar (PciIoDevice, PciResizableBarMin);
//
@@ -420,8 +438,11 @@ AdjustPciDeviceBarSize (
for (Offset = 0x10, BarIndex = 0; Offset <= 0x24 && BarIndex < PCI_MAX_BAR; BarIndex++) {
Offset = PciParseBar (PciIoDevice, Offset, BarIndex);
}
+
Adjusted = TRUE;
- DEBUG_CODE (DumpPciBars (PciIoDevice););
+ DEBUG_CODE (
+ DumpPciBars (PciIoDevice);
+ );
}
}
@@ -446,7 +467,7 @@ AdjustPciDeviceBarSize (
**/
EFI_STATUS
PciHostBridgeResourceAllocator (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
)
{
PCI_IO_DEVICE *RootBridgeDev;
@@ -494,8 +515,8 @@ PciHostBridgeResourceAllocator (
InitializeResourcePool (&Mem64Pool, PciBarTypeMem64);
InitializeResourcePool (&PMem64Pool, PciBarTypePMem64);
- RootBridgeDev = NULL;
- RootBridgeHandle = 0;
+ RootBridgeDev = NULL;
+ RootBridgeHandle = 0;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
//
@@ -519,7 +540,7 @@ PciHostBridgeResourceAllocator (
IoBridge = CreateResourceNode (
RootBridgeDev,
0,
- FeaturePcdGet (PcdPciBridgeIoAlignmentProbe) ? 0x1FF: 0xFFF,
+ FeaturePcdGet (PcdPciBridgeIoAlignmentProbe) ? 0x1FF : 0xFFF,
RB_IO_RANGE,
PciBarTypeIo16,
PciResUsageTypical
@@ -645,6 +666,7 @@ PciHostBridgeResourceAllocator (
return Status;
}
}
+
//
// End while, at least one Root Bridge should be found.
//
@@ -665,6 +687,7 @@ PciHostBridgeResourceAllocator (
//
return EFI_OUT_OF_RESOURCES;
}
+
//
// Allocation succeed.
// Get host bridge handle for status report, and then skip the main while
@@ -672,7 +695,6 @@ PciHostBridgeResourceAllocator (
HandleExtendedData.Handle = RootBridgeDev->PciRootBridgeIo->ParentHandle;
break;
-
} else {
//
// If Hot Plug is supported
@@ -688,14 +710,14 @@ PciHostBridgeResourceAllocator (
// If the resource allocation is unsuccessful, free resources on bridge
//
- RootBridgeDev = NULL;
- RootBridgeHandle = 0;
+ RootBridgeDev = NULL;
+ RootBridgeHandle = 0;
- IoResStatus = EFI_RESOURCE_SATISFIED;
- Mem32ResStatus = EFI_RESOURCE_SATISFIED;
- PMem32ResStatus = EFI_RESOURCE_SATISFIED;
- Mem64ResStatus = EFI_RESOURCE_SATISFIED;
- PMem64ResStatus = EFI_RESOURCE_SATISFIED;
+ IoResStatus = EFI_RESOURCE_SATISFIED;
+ Mem32ResStatus = EFI_RESOURCE_SATISFIED;
+ PMem32ResStatus = EFI_RESOURCE_SATISFIED;
+ Mem64ResStatus = EFI_RESOURCE_SATISFIED;
+ PMem64ResStatus = EFI_RESOURCE_SATISFIED;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
//
@@ -741,6 +763,7 @@ PciHostBridgeResourceAllocator (
FreePool (AcpiConfig);
}
}
+
//
// End while
//
@@ -755,36 +778,38 @@ PciHostBridgeResourceAllocator (
ZeroMem (&AllocFailExtendedData, sizeof (AllocFailExtendedData));
REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
- EFI_PROGRESS_CODE,
- EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT,
- (VOID *) &AllocFailExtendedData,
- sizeof (AllocFailExtendedData)
- );
+ EFI_PROGRESS_CODE,
+ EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT,
+ (VOID *)&AllocFailExtendedData,
+ sizeof (AllocFailExtendedData)
+ );
- //
- // When resource conflict happens, adjust the BAR size first.
- // Only when adjusting BAR size doesn't help or BAR size cannot be adjusted,
- // reject the device who requests largest resource that causes conflict.
- //
+ //
+ // When resource conflict happens, adjust the BAR size first.
+ // Only when adjusting BAR size doesn't help or BAR size cannot be adjusted,
+ // reject the device who requests largest resource that causes conflict.
+ //
ResizableBarAdjusted = FALSE;
if (ResizableBarNeedAdjust) {
- ResizableBarAdjusted = AdjustPciDeviceBarSize (RootBridgeDev);
+ ResizableBarAdjusted = AdjustPciDeviceBarSize (RootBridgeDev);
ResizableBarNeedAdjust = FALSE;
}
+
if (!ResizableBarAdjusted) {
Status = PciHostBridgeAdjustAllocation (
- &IoPool,
- &Mem32Pool,
- &PMem32Pool,
- &Mem64Pool,
- &PMem64Pool,
- IoResStatus,
- Mem32ResStatus,
- PMem32ResStatus,
- Mem64ResStatus,
- PMem64ResStatus
- );
+ &IoPool,
+ &Mem32Pool,
+ &PMem32Pool,
+ &Mem64Pool,
+ &PMem64Pool,
+ IoResStatus,
+ Mem32ResStatus,
+ PMem32ResStatus,
+ Mem64ResStatus,
+ PMem64ResStatus
+ );
}
+
//
// Destroy all the resource tree
//
@@ -801,6 +826,7 @@ PciHostBridgeResourceAllocator (
}
}
}
+
//
// End main while
//
@@ -809,11 +835,11 @@ PciHostBridgeResourceAllocator (
// Raise the EFI_IOB_PCI_RES_ALLOC status code
//
REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
- EFI_PROGRESS_CODE,
- EFI_IO_BUS_PCI | EFI_IOB_PCI_RES_ALLOC,
- (VOID *) &HandleExtendedData,
- sizeof (HandleExtendedData)
- );
+ EFI_PROGRESS_CODE,
+ EFI_IO_BUS_PCI | EFI_IOB_PCI_RES_ALLOC,
+ (VOID *)&HandleExtendedData,
+ sizeof (HandleExtendedData)
+ );
//
// Notify pci bus driver starts to program the resource
@@ -824,9 +850,9 @@ PciHostBridgeResourceAllocator (
return Status;
}
- RootBridgeDev = NULL;
+ RootBridgeDev = NULL;
- RootBridgeHandle = 0;
+ RootBridgeHandle = 0;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
//
@@ -842,11 +868,11 @@ PciHostBridgeResourceAllocator (
// Get acpi resource node for all the resource types
//
AcpiConfig = NULL;
- Status = PciResAlloc->GetProposedResources (
- PciResAlloc,
- RootBridgeDev->Handle,
- &AcpiConfig
- );
+ Status = PciResAlloc->GetProposedResources (
+ PciResAlloc,
+ RootBridgeDev->Handle,
+ &AcpiConfig
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -930,15 +956,17 @@ PciHostBridgeResourceAllocator (
// The original value is programmed by ProgramResource() above.
//
DEBUG ((
- DEBUG_INFO, "Process Option ROM: BAR Base/Length = %lx/%lx\n",
- RootBridgeDev->PciBar[0].BaseAddress, RootBridgeDev->PciBar[0].Length
+ DEBUG_INFO,
+ "Process Option ROM: BAR Base/Length = %lx/%lx\n",
+ RootBridgeDev->PciBar[0].BaseAddress,
+ RootBridgeDev->PciBar[0].Length
));
ProcessOptionRom (RootBridgeDev, RootBridgeDev->PciBar[0].BaseAddress, RootBridgeDev->PciBar[0].Length);
- IoBridge ->PciDev->PciBar[IoBridge ->Bar].BaseAddress = IoBase;
- Mem32Bridge ->PciDev->PciBar[Mem32Bridge ->Bar].BaseAddress = Mem32Base;
+ IoBridge->PciDev->PciBar[IoBridge->Bar].BaseAddress = IoBase;
+ Mem32Bridge->PciDev->PciBar[Mem32Bridge->Bar].BaseAddress = Mem32Base;
PMem32Bridge->PciDev->PciBar[PMem32Bridge->Bar].BaseAddress = PMem32Base;
- Mem64Bridge ->PciDev->PciBar[Mem64Bridge ->Bar].BaseAddress = Mem64Base;
+ Mem64Bridge->PciDev->PciBar[Mem64Bridge->Bar].BaseAddress = Mem64Base;
PMem64Bridge->PciDev->PciBar[PMem64Bridge->Bar].BaseAddress = PMem64Base;
//
@@ -952,7 +980,7 @@ PciHostBridgeResourceAllocator (
Resources[3] = Mem64Bridge;
Resources[4] = PMem64Bridge;
DumpResourceMap (RootBridgeDev, Resources, ARRAY_SIZE (Resources));
- );
+ );
FreePool (AcpiConfig);
}
@@ -989,10 +1017,10 @@ PciHostBridgeResourceAllocator (
**/
EFI_STATUS
PciAllocateBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- IN UINT8 NumberOfBuses,
- OUT UINT8 *NextBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ IN UINT8 NumberOfBuses,
+ OUT UINT8 *NextBusNumber
)
{
PCI_IO_DEVICE *RootBridge;
@@ -1014,21 +1042,25 @@ PciAllocateBusNumber (
BusNumberRanges = RootBridge->BusNumberRanges;
while (BusNumberRanges->Desc != ACPI_END_TAG_DESCRIPTOR) {
MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;
- if (StartBusNumber >= BusNumberRanges->AddrRangeMin && StartBusNumber <= MaxNumberInRange) {
+ if ((StartBusNumber >= BusNumberRanges->AddrRangeMin) && (StartBusNumber <= MaxNumberInRange)) {
NextNumber = (UINT8)(StartBusNumber + NumberOfBuses);
while (NextNumber > MaxNumberInRange) {
++BusNumberRanges;
if (BusNumberRanges->Desc == ACPI_END_TAG_DESCRIPTOR) {
return EFI_OUT_OF_RESOURCES;
}
- NextNumber = (UINT8)(NextNumber + (BusNumberRanges->AddrRangeMin - (MaxNumberInRange + 1)));
+
+ NextNumber = (UINT8)(NextNumber + (BusNumberRanges->AddrRangeMin - (MaxNumberInRange + 1)));
MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;
}
+
*NextBusNumber = NextNumber;
return EFI_SUCCESS;
}
+
BusNumberRanges++;
}
+
return EFI_OUT_OF_RESOURCES;
}
@@ -1048,38 +1080,38 @@ PciAllocateBusNumber (
**/
EFI_STATUS
PciScanBus (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- OUT UINT8 *SubBusNumber,
- OUT UINT8 *PaddedBusRange
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ OUT UINT8 *SubBusNumber,
+ OUT UINT8 *PaddedBusRange
)
{
- EFI_STATUS Status;
- PCI_TYPE00 Pci;
- UINT8 Device;
- UINT8 Func;
- UINT64 Address;
- UINT8 SecondBus;
- UINT8 PaddedSubBus;
- UINT16 Register;
- UINTN HpIndex;
- PCI_IO_DEVICE *PciDevice;
- EFI_EVENT Event;
- EFI_HPC_STATE State;
- UINT64 PciAddress;
- EFI_HPC_PADDING_ATTRIBUTES Attributes;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *NextDescriptors;
- UINT16 BusRange;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- BOOLEAN BusPadding;
- UINT32 TempReservedBusNum;
+ EFI_STATUS Status;
+ PCI_TYPE00 Pci;
+ UINT8 Device;
+ UINT8 Func;
+ UINT64 Address;
+ UINT8 SecondBus;
+ UINT8 PaddedSubBus;
+ UINT16 Register;
+ UINTN HpIndex;
+ PCI_IO_DEVICE *PciDevice;
+ EFI_EVENT Event;
+ EFI_HPC_STATE State;
+ UINT64 PciAddress;
+ EFI_HPC_PADDING_ATTRIBUTES Attributes;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *NextDescriptors;
+ UINT16 BusRange;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ BOOLEAN BusPadding;
+ UINT32 TempReservedBusNum;
PciRootBridgeIo = Bridge->PciRootBridgeIo;
SecondBus = 0;
Register = 0;
State = 0;
- Attributes = (EFI_HPC_PADDING_ATTRIBUTES) 0;
+ Attributes = (EFI_HPC_PADDING_ATTRIBUTES)0;
BusRange = 0;
BusPadding = FALSE;
PciDevice = NULL;
@@ -1088,19 +1120,18 @@ PciScanBus (
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
TempReservedBusNum = 0;
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
-
//
// Check to see whether a pci device is present
//
Status = PciDevicePresent (
- PciRootBridgeIo,
- &Pci,
- StartBusNumber,
- Device,
- Func
- );
+ PciRootBridgeIo,
+ &Pci,
+ StartBusNumber,
+ Device,
+ Func
+ );
- if (EFI_ERROR (Status) && Func == 0) {
+ if (EFI_ERROR (Status) && (Func == 0)) {
//
// go to next device if there is no Function 0
//
@@ -1115,13 +1146,13 @@ PciScanBus (
// Get the PCI device information
//
Status = PciSearchDevice (
- Bridge,
- &Pci,
- StartBusNumber,
- Device,
- Func,
- &PciDevice
- );
+ Bridge,
+ &Pci,
+ StartBusNumber,
+ Device,
+ Func,
+ &PciDevice
+ );
if (EFI_ERROR (Status)) {
continue;
@@ -1136,12 +1167,12 @@ PciScanBus (
// EfiPciBeforeChildBusEnumeration for PCI Device Node
//
PreprocessController (
- PciDevice,
- PciDevice->BusNumber,
- PciDevice->DeviceNumber,
- PciDevice->FunctionNumber,
- EfiPciBeforeChildBusEnumeration
- );
+ PciDevice,
+ PciDevice->BusNumber,
+ PciDevice->DeviceNumber,
+ PciDevice->FunctionNumber,
+ EfiPciBeforeChildBusEnumeration
+ );
}
if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
@@ -1156,7 +1187,6 @@ PciScanBus (
gPciRootHpcData[HpIndex].Found = TRUE;
if (!gPciRootHpcData[HpIndex].Initialized) {
-
Status = CreateEventForHpc (HpIndex, &Event);
ASSERT (!EFI_ERROR (Status));
@@ -1175,7 +1205,7 @@ PciScanBus (
PciDevice->DeviceNumber,
PciDevice->FunctionNumber,
EfiPciBeforeChildBusEnumeration
- );
+ );
}
}
}
@@ -1192,9 +1222,7 @@ PciScanBus (
//
BusPadding = FALSE;
if (gPciHotPlugInit != NULL) {
-
if (IsPciHotPlugBus (PciDevice)) {
-
//
// If it is initialized, get the padded bus range
//
@@ -1203,7 +1231,7 @@ PciScanBus (
PciDevice->DevicePath,
PciAddress,
&State,
- (VOID **) &Descriptors,
+ (VOID **)&Descriptors,
&Attributes
);
@@ -1211,14 +1239,14 @@ PciScanBus (
return Status;
}
- BusRange = 0;
+ BusRange = 0;
NextDescriptors = Descriptors;
- Status = PciGetBusRange (
- &NextDescriptors,
- NULL,
- NULL,
- &BusRange
- );
+ Status = PciGetBusRange (
+ &NextDescriptors,
+ NULL,
+ NULL,
+ &BusRange
+ );
FreePool (Descriptors);
@@ -1238,10 +1266,11 @@ PciScanBus (
if (EFI_ERROR (Status)) {
return Status;
}
+
SecondBus = *SubBusNumber;
- Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
- Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET);
+ Register = (UINT16)((SecondBus << 8) | (UINT16)StartBusNumber);
+ Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET);
Status = PciRootBridgeIo->Pci.Write (
PciRootBridgeIo,
@@ -1251,25 +1280,23 @@ PciScanBus (
&Register
);
-
//
// If it is PPB, resursively search down this bridge
//
if (IS_PCI_BRIDGE (&Pci)) {
-
//
// Temporarily initialize SubBusNumber to maximum bus number to ensure the
// PCI configuration transaction to go through any PPB
//
- Register = PciGetMaxBusNumber (Bridge);
- Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET);
- Status = PciRootBridgeIo->Pci.Write (
- PciRootBridgeIo,
- EfiPciWidthUint8,
- Address,
- 1,
- &Register
- );
+ Register = PciGetMaxBusNumber (Bridge);
+ Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET);
+ Status = PciRootBridgeIo->Pci.Write (
+ PciRootBridgeIo,
+ EfiPciWidthUint8,
+ Address,
+ 1,
+ &Register
+ );
//
// Nofify EfiPciBeforeChildBusEnumeration for PCI Brige
@@ -1283,11 +1310,11 @@ PciScanBus (
);
Status = PciScanBus (
- PciDevice,
- SecondBus,
- SubBusNumber,
- PaddedBusRange
- );
+ PciDevice,
+ SecondBus,
+ SubBusNumber,
+ PaddedBusRange
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1298,17 +1325,19 @@ PciScanBus (
// Ensure the device is enabled and initialized
//
if ((Attributes == EfiPaddingPciRootBridge) &&
- (State & EFI_HPC_STATE_ENABLED) != 0 &&
- (State & EFI_HPC_STATE_INITIALIZED) != 0) {
- *PaddedBusRange = (UINT8) ((UINT8) (BusRange) + *PaddedBusRange);
+ ((State & EFI_HPC_STATE_ENABLED) != 0) &&
+ ((State & EFI_HPC_STATE_INITIALIZED) != 0))
+ {
+ *PaddedBusRange = (UINT8)((UINT8)(BusRange) + *PaddedBusRange);
} else {
//
// Reserve the larger one between the actual occupied bus number and padded bus number
//
- Status = PciAllocateBusNumber (PciDevice, SecondBus, (UINT8) (BusRange), &PaddedSubBus);
+ Status = PciAllocateBusNumber (PciDevice, SecondBus, (UINT8)(BusRange), &PaddedSubBus);
if (EFI_ERROR (Status)) {
return Status;
}
+
*SubBusNumber = MAX (PaddedSubBus, *SubBusNumber);
}
}
@@ -1325,18 +1354,18 @@ PciScanBus (
1,
SubBusNumber
);
- } else {
+ } else {
//
// It is device. Check PCI IOV for Bus reservation
// Go through each function, just reserve the MAX ReservedBusNum for one device
//
- if (PcdGetBool (PcdSrIovSupport) && PciDevice->SrIovCapabilityOffset != 0) {
+ if (PcdGetBool (PcdSrIovSupport) && (PciDevice->SrIovCapabilityOffset != 0)) {
if (TempReservedBusNum < PciDevice->ReservedBusNum) {
-
- Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8) (PciDevice->ReservedBusNum - TempReservedBusNum), SubBusNumber);
+ Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8)(PciDevice->ReservedBusNum - TempReservedBusNum), SubBusNumber);
if (EFI_ERROR (Status)) {
return Status;
}
+
TempReservedBusNum = PciDevice->ReservedBusNum;
if (Func == 0) {
@@ -1348,8 +1377,7 @@ PciScanBus (
}
}
- if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
-
+ if ((Func == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
//
// Skip sub functions, this is not a multi function device
//
@@ -1373,25 +1401,22 @@ PciScanBus (
**/
EFI_STATUS
PciRootBridgeP2CProcess (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
- EFI_HPC_STATE State;
- UINT64 PciAddress;
- EFI_STATUS Status;
+ LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
+ EFI_HPC_STATE State;
+ UINT64 PciAddress;
+ EFI_STATUS Status;
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
-
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
if (IS_CARDBUS_BRIDGE (&Temp->Pci)) {
-
- if (gPciHotPlugInit != NULL && Temp->Allocated && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
-
+ if ((gPciHotPlugInit != NULL) && Temp->Allocated && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
//
// Raise the EFI_IOB_PCI_HPC_INIT status code
//
@@ -1402,13 +1427,13 @@ PciRootBridgeP2CProcess (
);
PciAddress = EFI_PCI_ADDRESS (Temp->BusNumber, Temp->DeviceNumber, Temp->FunctionNumber, 0);
- Status = gPciHotPlugInit->InitializeRootHpc (
- gPciHotPlugInit,
- Temp->DevicePath,
- PciAddress,
- NULL,
- &State
- );
+ Status = gPciHotPlugInit->InitializeRootHpc (
+ gPciHotPlugInit,
+ Temp->DevicePath,
+ PciAddress,
+ NULL,
+ &State
+ );
if (!EFI_ERROR (Status)) {
Status = PciBridgeEnumerator (Temp);
@@ -1420,7 +1445,6 @@ PciRootBridgeP2CProcess (
CurrentLink = CurrentLink->ForwardLink;
continue;
-
}
}
@@ -1446,12 +1470,12 @@ PciRootBridgeP2CProcess (
**/
EFI_STATUS
PciHostBridgeP2CProcess (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
)
{
- EFI_HANDLE RootBridgeHandle;
- PCI_IO_DEVICE *RootBridgeDev;
- EFI_STATUS Status;
+ EFI_HANDLE RootBridgeHandle;
+ PCI_IO_DEVICE *RootBridgeDev;
+ EFI_STATUS Status;
if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
return EFI_SUCCESS;
@@ -1460,7 +1484,6 @@ PciHostBridgeP2CProcess (
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
-
//
// Get RootBridg Device by handle
//
@@ -1474,7 +1497,6 @@ PciHostBridgeP2CProcess (
if (EFI_ERROR (Status)) {
return Status;
}
-
}
return EFI_SUCCESS;
@@ -1496,16 +1518,16 @@ PciHostBridgeEnumerator (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
)
{
- EFI_HANDLE RootBridgeHandle;
- PCI_IO_DEVICE *RootBridgeDev;
- EFI_STATUS Status;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- UINT16 MinBus;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
- UINT8 StartBusNumber;
- LIST_ENTRY RootBridgeList;
- LIST_ENTRY *Link;
+ EFI_HANDLE RootBridgeHandle;
+ PCI_IO_DEVICE *RootBridgeDev;
+ EFI_STATUS Status;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINT16 MinBus;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
+ UINT8 StartBusNumber;
+ LIST_ENTRY RootBridgeList;
+ LIST_ENTRY *Link;
if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
InitializeHotPlugSupport ();
@@ -1522,10 +1544,9 @@ PciHostBridgeEnumerator (
return Status;
}
- DEBUG((DEBUG_INFO, "PCI Bus First Scanning\n"));
+ DEBUG ((DEBUG_INFO, "PCI Bus First Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
-
//
// if a root bridge instance is found, create root bridge device for it
//
@@ -1540,15 +1561,16 @@ PciHostBridgeEnumerator (
// Enumerate all the buses under this root bridge
//
Status = PciRootBridgeEnumerator (
- PciResAlloc,
- RootBridgeDev
- );
+ PciResAlloc,
+ RootBridgeDev
+ );
- if (gPciHotPlugInit != NULL && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
+ if ((gPciHotPlugInit != NULL) && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
InsertTailList (&RootBridgeList, &(RootBridgeDev->Link));
} else {
DestroyRootBridge (RootBridgeDev);
}
+
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1559,14 +1581,15 @@ PciHostBridgeEnumerator (
//
NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
- if (gPciHotPlugInit != NULL && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
+ if ((gPciHotPlugInit != NULL) && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
//
// Reset all assigned PCI bus number in all PPB
//
RootBridgeHandle = NULL;
- Link = GetFirstNode (&RootBridgeList);
+ Link = GetFirstNode (&RootBridgeList);
while ((PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) &&
- (!IsNull (&RootBridgeList, Link))) {
+ (!IsNull (&RootBridgeList, Link)))
+ {
RootBridgeDev = PCI_IO_DEVICE_FROM_LINK (Link);
//
// Get the Bus information
@@ -1574,7 +1597,7 @@ PciHostBridgeEnumerator (
Status = PciResAlloc->StartBusEnumeration (
PciResAlloc,
RootBridgeHandle,
- (VOID **) &Configuration
+ (VOID **)&Configuration
);
if (EFI_ERROR (Status)) {
return Status;
@@ -1583,12 +1606,12 @@ PciHostBridgeEnumerator (
//
// Get the bus number to start with
//
- StartBusNumber = (UINT8) (Configuration->AddrRangeMin);
+ StartBusNumber = (UINT8)(Configuration->AddrRangeMin);
ResetAllPpbBusNumber (
RootBridgeDev,
StartBusNumber
- );
+ );
FreePool (Configuration);
Link = RemoveEntryList (Link);
@@ -1614,10 +1637,9 @@ PciHostBridgeEnumerator (
return Status;
}
- DEBUG((DEBUG_INFO, "PCI Bus Second Scanning\n"));
+ DEBUG ((DEBUG_INFO, "PCI Bus Second Scanning\n"));
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
-
//
// if a root bridge instance is found, create root bridge device for it
//
@@ -1631,9 +1653,9 @@ PciHostBridgeEnumerator (
// Enumerate all the buses under this root bridge
//
Status = PciRootBridgeEnumerator (
- PciResAlloc,
- RootBridgeDev
- );
+ PciResAlloc,
+ RootBridgeDev
+ );
DestroyRootBridge (RootBridgeDev);
if (EFI_ERROR (Status)) {
@@ -1658,7 +1680,6 @@ PciHostBridgeEnumerator (
RootBridgeHandle = NULL;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
-
//
// if a root bridge instance is found, create root bridge device for it
//
@@ -1675,7 +1696,7 @@ PciHostBridgeEnumerator (
}
PciRootBridgeIo = RootBridgeDev->PciRootBridgeIo;
- Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) &Descriptors);
+ Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **)&Descriptors);
if (EFI_ERROR (Status)) {
return Status;
@@ -1702,9 +1723,9 @@ PciHostBridgeEnumerator (
// root bridge will then be created
//
Status = PciPciDeviceInfoCollector (
- RootBridgeDev,
- (UINT8) MinBus
- );
+ RootBridgeDev,
+ (UINT8)MinBus
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -1738,33 +1759,36 @@ PciProgramResizableBar (
IN PCI_RESIZABLE_BAR_OPERATION ResizableBarOp
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Capabilities;
- UINT32 Index;
- UINT32 Offset;
- INTN Bit;
- UINTN ResizableBarNumber;
- EFI_STATUS Status;
- PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Entries[PCI_MAX_BAR];
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Capabilities;
+ UINT32 Index;
+ UINT32 Offset;
+ INTN Bit;
+ UINTN ResizableBarNumber;
+ EFI_STATUS Status;
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Entries[PCI_MAX_BAR];
ASSERT (PciIoDevice->ResizableBarOffset != 0);
- DEBUG ((DEBUG_INFO, " Programs Resizable BAR register, offset: 0x%08x, number: %d\n",
- PciIoDevice->ResizableBarOffset, PciIoDevice->ResizableBarNumber));
+ DEBUG ((
+ DEBUG_INFO,
+ " Programs Resizable BAR register, offset: 0x%08x, number: %d\n",
+ PciIoDevice->ResizableBarOffset,
+ PciIoDevice->ResizableBarNumber
+ ));
ResizableBarNumber = MIN (PciIoDevice->ResizableBarNumber, PCI_MAX_BAR);
- PciIo = &PciIoDevice->PciIo;
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER),
- sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY) * ResizableBarNumber,
- (VOID *)(&Entries)
- );
+ PciIo = &PciIoDevice->PciIo;
+ Status = PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint8,
+ PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER),
+ sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY) * ResizableBarNumber,
+ (VOID *)(&Entries)
+ );
ASSERT_EFI_ERROR (Status);
for (Index = 0; Index < ResizableBarNumber; Index++) {
-
//
// When the bit of Capabilities Set, indicates that the Function supports
// operating with the BAR sized to (2^Bit) MB.
@@ -1773,36 +1797,37 @@ PciProgramResizableBar (
// Bit 1 is set: supports operating with the BAR sized to 2 MB
// Bit n is set: supports operating with the BAR sized to (2^n) MB
//
- Capabilities = LShiftU64(Entries[Index].ResizableBarControl.Bits.BarSizeCapability, 28)
- | Entries[Index].ResizableBarCapability.Bits.BarSizeCapability;
+ Capabilities = LShiftU64 (Entries[Index].ResizableBarControl.Bits.BarSizeCapability, 28)
+ | Entries[Index].ResizableBarCapability.Bits.BarSizeCapability;
if (ResizableBarOp == PciResizableBarMax) {
- Bit = HighBitSet64(Capabilities);
+ Bit = HighBitSet64 (Capabilities);
} else {
ASSERT (ResizableBarOp == PciResizableBarMin);
- Bit = LowBitSet64(Capabilities);
+ Bit = LowBitSet64 (Capabilities);
}
ASSERT (Bit >= 0);
Offset = PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER)
- + Index * sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY)
- + OFFSET_OF (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY, ResizableBarControl);
+ + Index * sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY)
+ + OFFSET_OF (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY, ResizableBarControl);
- Entries[Index].ResizableBarControl.Bits.BarSize = (UINT32) Bit;
+ Entries[Index].ResizableBarControl.Bits.BarSize = (UINT32)Bit;
DEBUG ((
DEBUG_INFO,
" Resizable Bar: Offset = 0x%x, Bar Size Capability = 0x%016lx, New Bar Size = 0x%lx\n",
OFFSET_OF (PCI_TYPE00, Device.Bar[Entries[Index].ResizableBarControl.Bits.BarIndex]),
- Capabilities, LShiftU64 (SIZE_1MB, Bit)
+ Capabilities,
+ LShiftU64 (SIZE_1MB, Bit)
));
PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- Offset,
- 1,
- &Entries[Index].ResizableBarControl.Uint32
- );
+ PciIo,
+ EfiPciIoWidthUint32,
+ Offset,
+ 1,
+ &Entries[Index].ResizableBarControl.Uint32
+ );
}
return EFI_SUCCESS;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
index aeec6d6b6d..5d2551148b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
@@ -9,19 +9,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_PCI_LIB_H_
#define _EFI_PCI_LIB_H_
-
typedef struct {
- EFI_HANDLE Handle;
+ EFI_HANDLE Handle;
} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
typedef struct {
- UINT32 Bar;
- UINT16 DevicePathSize;
- UINT16 ReqResSize;
- UINT16 AllocResSize;
- UINT8 *DevicePath;
- UINT8 *ReqRes;
- UINT8 *AllocRes;
+ UINT32 Bar;
+ UINT16 DevicePathSize;
+ UINT16 ReqResSize;
+ UINT16 AllocResSize;
+ UINT8 *DevicePath;
+ UINT8 *ReqRes;
+ UINT8 *AllocRes;
} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
typedef enum {
@@ -37,7 +36,7 @@ typedef enum {
**/
VOID
GetBackPcCardBar (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -50,8 +49,8 @@ GetBackPcCardBar (
**/
VOID
RemoveRejectedPciDevices (
- IN EFI_HANDLE RootBridgeHandle,
- IN PCI_IO_DEVICE *Bridge
+ IN EFI_HANDLE RootBridgeHandle,
+ IN PCI_IO_DEVICE *Bridge
);
/**
@@ -69,7 +68,7 @@ RemoveRejectedPciDevices (
**/
EFI_STATUS
PciHostBridgeResourceAllocator (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
@@ -87,10 +86,10 @@ PciHostBridgeResourceAllocator (
**/
EFI_STATUS
PciAllocateBusNumber (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- IN UINT8 NumberOfBuses,
- OUT UINT8 *NextBusNumber
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ IN UINT8 NumberOfBuses,
+ OUT UINT8 *NextBusNumber
);
/**
@@ -109,10 +108,10 @@ PciAllocateBusNumber (
**/
EFI_STATUS
PciScanBus (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT8 StartBusNumber,
- OUT UINT8 *SubBusNumber,
- OUT UINT8 *PaddedBusRange
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT8 StartBusNumber,
+ OUT UINT8 *SubBusNumber,
+ OUT UINT8 *PaddedBusRange
);
/**
@@ -126,7 +125,7 @@ PciScanBus (
**/
EFI_STATUS
PciRootBridgeP2CProcess (
- IN PCI_IO_DEVICE *Bridge
+ IN PCI_IO_DEVICE *Bridge
);
/**
@@ -141,7 +140,7 @@ PciRootBridgeP2CProcess (
**/
EFI_STATUS
PciHostBridgeP2CProcess (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
@@ -176,4 +175,5 @@ PciProgramResizableBar (
IN PCI_IO_DEVICE *PciIoDevice,
IN PCI_RESIZABLE_BAR_OPERATION ResizableBarOp
);
+
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
index a981f93f43..89f5f64101 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
@@ -30,26 +30,26 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
LocalLoadFile2 (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer OPTIONAL
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer OPTIONAL
)
{
- EFI_STATUS Status;
- MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *EfiOpRomImageNode;
- EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
- PCI_DATA_STRUCTURE *Pcir;
- UINT32 ImageSize;
- UINT8 *ImageBuffer;
- UINT32 ImageLength;
- UINT32 DestinationSize;
- UINT32 ScratchSize;
- VOID *Scratch;
- EFI_DECOMPRESS_PROTOCOL *Decompress;
- UINT32 InitializationSize;
-
- EfiOpRomImageNode = (MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *) FilePath;
+ EFI_STATUS Status;
+ MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *EfiOpRomImageNode;
+ EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
+ PCI_DATA_STRUCTURE *Pcir;
+ UINT32 ImageSize;
+ UINT8 *ImageBuffer;
+ UINT32 ImageLength;
+ UINT32 DestinationSize;
+ UINT32 ScratchSize;
+ VOID *Scratch;
+ EFI_DECOMPRESS_PROTOCOL *Decompress;
+ UINT32 InitializationSize;
+
+ EfiOpRomImageNode = (MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *)FilePath;
if ((EfiOpRomImageNode == NULL) ||
(DevicePathType (FilePath) != MEDIA_DEVICE_PATH) ||
(DevicePathSubType (FilePath) != MEDIA_RELATIVE_OFFSET_RANGE_DP) ||
@@ -58,19 +58,19 @@ LocalLoadFile2 (
(EfiOpRomImageNode->StartingOffset > EfiOpRomImageNode->EndingOffset) ||
(EfiOpRomImageNode->EndingOffset >= PciIoDevice->RomSize) ||
(BufferSize == NULL)
- ) {
+ )
+ {
return EFI_INVALID_PARAMETER;
}
- EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) (
- (UINT8 *) PciIoDevice->PciIo.RomImage + EfiOpRomImageNode->StartingOffset
- );
+ EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *)(
+ (UINT8 *)PciIoDevice->PciIo.RomImage + EfiOpRomImageNode->StartingOffset
+ );
if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
return EFI_NOT_FOUND;
}
-
- Pcir = (PCI_DATA_STRUCTURE *) ((UINT8 *) EfiRomHeader + EfiRomHeader->PcirOffset);
+ Pcir = (PCI_DATA_STRUCTURE *)((UINT8 *)EfiRomHeader + EfiRomHeader->PcirOffset);
ASSERT (Pcir->Signature == PCI_DATA_STRUCTURE_SIGNATURE);
if ((Pcir->CodeType == PCI_CODE_TYPE_EFI_IMAGE) &&
@@ -78,22 +78,22 @@ LocalLoadFile2 (
((EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER) ||
(EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER)) &&
(EfiRomHeader->CompressionType <= EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED)
- ) {
-
- ImageSize = Pcir->ImageLength * 512;
- InitializationSize = (UINT32) EfiRomHeader->InitializationSize * 512;
- if (InitializationSize > ImageSize || EfiRomHeader->EfiImageHeaderOffset >= InitializationSize) {
+ )
+ {
+ ImageSize = Pcir->ImageLength * 512;
+ InitializationSize = (UINT32)EfiRomHeader->InitializationSize * 512;
+ if ((InitializationSize > ImageSize) || (EfiRomHeader->EfiImageHeaderOffset >= InitializationSize)) {
return EFI_NOT_FOUND;
}
- ImageBuffer = (UINT8 *) EfiRomHeader + EfiRomHeader->EfiImageHeaderOffset;
- ImageLength = InitializationSize - EfiRomHeader->EfiImageHeaderOffset;
+ ImageBuffer = (UINT8 *)EfiRomHeader + EfiRomHeader->EfiImageHeaderOffset;
+ ImageLength = InitializationSize - EfiRomHeader->EfiImageHeaderOffset;
if (EfiRomHeader->CompressionType != EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
//
// Uncompressed: Copy the EFI Image directly to user's buffer
//
- if (Buffer == NULL || *BufferSize < ImageLength) {
+ if ((Buffer == NULL) || (*BufferSize < ImageLength)) {
*BufferSize = ImageLength;
return EFI_BUFFER_TOO_SMALL;
}
@@ -101,15 +101,15 @@ LocalLoadFile2 (
*BufferSize = ImageLength;
CopyMem (Buffer, ImageBuffer, ImageLength);
return EFI_SUCCESS;
-
} else {
//
// Compressed: Uncompress before copying
//
- Status = gBS->LocateProtocol (&gEfiDecompressProtocolGuid, NULL, (VOID **) &Decompress);
+ Status = gBS->LocateProtocol (&gEfiDecompressProtocolGuid, NULL, (VOID **)&Decompress);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
+
Status = Decompress->GetInfo (
Decompress,
ImageBuffer,
@@ -121,13 +121,13 @@ LocalLoadFile2 (
return EFI_DEVICE_ERROR;
}
- if (Buffer == NULL || *BufferSize < DestinationSize) {
+ if ((Buffer == NULL) || (*BufferSize < DestinationSize)) {
*BufferSize = DestinationSize;
return EFI_BUFFER_TOO_SMALL;
}
*BufferSize = DestinationSize;
- Scratch = AllocatePool (ScratchSize);
+ Scratch = AllocatePool (ScratchSize);
if (Scratch == NULL) {
return EFI_DEVICE_ERROR;
}
@@ -146,6 +146,7 @@ LocalLoadFile2 (
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
+
return EFI_SUCCESS;
}
}
@@ -161,7 +162,7 @@ LocalLoadFile2 (
**/
VOID
InitializePciLoadFile2 (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->LoadFile2.LoadFile = LoadFile2;
@@ -193,18 +194,19 @@ InitializePciLoadFile2 (
EFI_STATUS
EFIAPI
LoadFile2 (
- IN EFI_LOAD_FILE2_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
- IN BOOLEAN BootPolicy,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer OPTIONAL
+ IN EFI_LOAD_FILE2_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN BOOLEAN BootPolicy,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer OPTIONAL
)
{
- PCI_IO_DEVICE *PciIoDevice;
+ PCI_IO_DEVICE *PciIoDevice;
if (BootPolicy) {
return EFI_UNSUPPORTED;
}
+
PciIoDevice = PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS (This);
return LocalLoadFile2 (
@@ -227,21 +229,21 @@ LoadFile2 (
**/
EFI_STATUS
GetOpRomInfo (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
- UINT8 RomBarIndex;
- UINT32 AllOnes;
- UINT64 Address;
- EFI_STATUS Status;
- UINT8 Bus;
- UINT8 Device;
- UINT8 Function;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
-
- Bus = PciIoDevice->BusNumber;
- Device = PciIoDevice->DeviceNumber;
- Function = PciIoDevice->FunctionNumber;
+ UINT8 RomBarIndex;
+ UINT32 AllOnes;
+ UINT64 Address;
+ EFI_STATUS Status;
+ UINT8 Bus;
+ UINT8 Device;
+ UINT8 Function;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+
+ Bus = PciIoDevice->BusNumber;
+ Device = PciIoDevice->DeviceNumber;
+ Function = PciIoDevice->FunctionNumber;
PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
@@ -260,6 +262,7 @@ GetOpRomInfo (
//
RomBarIndex = PCI_BRIDGE_ROMBAR;
}
+
//
// The bit0 is 0 to prevent the enabling of the Rom address decoder
//
@@ -280,7 +283,7 @@ GetOpRomInfo (
//
// Read back
//
- Status = PciRootBridgeIo->Pci.Read(
+ Status = PciRootBridgeIo->Pci.Read (
PciRootBridgeIo,
EfiPciWidthUint32,
Address,
@@ -315,8 +318,8 @@ GetOpRomInfo (
**/
BOOLEAN
ContainEfiImage (
- IN VOID *RomImage,
- IN UINT64 RomSize
+ IN VOID *RomImage,
+ IN UINT64 RomSize
)
{
PCI_EXPANSION_ROM_HEADER *RomHeader;
@@ -331,20 +334,21 @@ ContainEfiImage (
do {
if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
- RomHeader = (PCI_EXPANSION_ROM_HEADER *) ((UINT8 *) RomHeader + 512);
+ RomHeader = (PCI_EXPANSION_ROM_HEADER *)((UINT8 *)RomHeader + 512);
continue;
}
//
// The PCI Data Structure must be DWORD aligned.
//
- if (RomHeader->PcirOffset == 0 ||
- (RomHeader->PcirOffset & 3) != 0 ||
- (UINT8 *) RomHeader + RomHeader->PcirOffset + sizeof (PCI_DATA_STRUCTURE) > (UINT8 *) RomImage + RomSize) {
+ if ((RomHeader->PcirOffset == 0) ||
+ ((RomHeader->PcirOffset & 3) != 0) ||
+ ((UINT8 *)RomHeader + RomHeader->PcirOffset + sizeof (PCI_DATA_STRUCTURE) > (UINT8 *)RomImage + RomSize))
+ {
break;
}
- RomPcir = (PCI_DATA_STRUCTURE *) ((UINT8 *) RomHeader + RomHeader->PcirOffset);
+ RomPcir = (PCI_DATA_STRUCTURE *)((UINT8 *)RomHeader + RomHeader->PcirOffset);
if (RomPcir->Signature != PCI_DATA_STRUCTURE_SIGNATURE) {
break;
}
@@ -354,8 +358,8 @@ ContainEfiImage (
}
Indicator = RomPcir->Indicator;
- RomHeader = (PCI_EXPANSION_ROM_HEADER *) ((UINT8 *) RomHeader + RomPcir->ImageLength * 512);
- } while (((UINT8 *) RomHeader < (UINT8 *) RomImage + RomSize) && ((Indicator & 0x80) == 0x00));
+ RomHeader = (PCI_EXPANSION_ROM_HEADER *)((UINT8 *)RomHeader + RomPcir->ImageLength * 512);
+ } while (((UINT8 *)RomHeader < (UINT8 *)RomImage + RomSize) && ((Indicator & 0x80) == 0x00));
return FALSE;
}
@@ -372,8 +376,8 @@ ContainEfiImage (
**/
EFI_STATUS
LoadOpRomImage (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT64 RomBase
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT64 RomBase
)
{
UINT8 RomBarIndex;
@@ -392,12 +396,12 @@ LoadOpRomImage (
UINT8 *RomInMemory;
UINT8 CodeType;
- RomSize = PciDevice->RomSize;
+ RomSize = PciDevice->RomSize;
- Indicator = 0;
- RomImageSize = 0;
- RomInMemory = NULL;
- CodeType = 0xFF;
+ Indicator = 0;
+ RomImageSize = 0;
+ RomInMemory = NULL;
+ CodeType = 0xFF;
//
// Get the RomBarIndex
@@ -417,6 +421,7 @@ LoadOpRomImage (
//
RomBarIndex = PCI_BRIDGE_ROMBAR;
}
+
//
// Allocate memory for Rom header and PCIR
//
@@ -431,16 +436,16 @@ LoadOpRomImage (
return EFI_OUT_OF_RESOURCES;
}
- RomBar = (UINT32) RomBase;
+ RomBar = (UINT32)RomBase;
//
// Enable RomBar
//
RomDecode (PciDevice, RomBarIndex, RomBar, TRUE);
- RomBarOffset = RomBar;
- RetStatus = EFI_NOT_FOUND;
- FirstCheck = TRUE;
+ RomBarOffset = RomBar;
+ RetStatus = EFI_NOT_FOUND;
+ FirstCheck = TRUE;
LegacyImageLength = 0;
do {
@@ -449,7 +454,7 @@ LoadOpRomImage (
EfiPciWidthUint8,
RomBarOffset,
sizeof (PCI_EXPANSION_ROM_HEADER),
- (UINT8 *) RomHeader
+ (UINT8 *)RomHeader
);
if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
@@ -462,23 +467,25 @@ LoadOpRomImage (
}
}
- FirstCheck = FALSE;
- OffsetPcir = RomHeader->PcirOffset;
+ FirstCheck = FALSE;
+ OffsetPcir = RomHeader->PcirOffset;
//
// If the pointer to the PCI Data Structure is invalid, no further images can be located.
// The PCI Data Structure must be DWORD aligned.
//
- if (OffsetPcir == 0 ||
- (OffsetPcir & 3) != 0 ||
- RomImageSize + OffsetPcir + sizeof (PCI_DATA_STRUCTURE) > RomSize) {
+ if ((OffsetPcir == 0) ||
+ ((OffsetPcir & 3) != 0) ||
+ (RomImageSize + OffsetPcir + sizeof (PCI_DATA_STRUCTURE) > RomSize))
+ {
break;
}
+
PciDevice->PciRootBridgeIo->Mem.Read (
PciDevice->PciRootBridgeIo,
EfiPciWidthUint8,
RomBarOffset + OffsetPcir,
sizeof (PCI_DATA_STRUCTURE),
- (UINT8 *) RomPcir
+ (UINT8 *)RomPcir
);
//
// If a valid signature is not present in the PCI Data Structure, no further images can be located.
@@ -486,16 +493,19 @@ LoadOpRomImage (
if (RomPcir->Signature != PCI_DATA_STRUCTURE_SIGNATURE) {
break;
}
+
if (RomImageSize + RomPcir->ImageLength * 512 > RomSize) {
break;
}
+
if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
- CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
+ CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
LegacyImageLength = ((UINT32)((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512) * 512;
}
- Indicator = RomPcir->Indicator;
- RomImageSize = RomImageSize + RomPcir->ImageLength * 512;
- RomBarOffset = RomBarOffset + RomPcir->ImageLength * 512;
+
+ Indicator = RomPcir->Indicator;
+ RomImageSize = RomImageSize + RomPcir->ImageLength * 512;
+ RomBarOffset = RomBarOffset + RomPcir->ImageLength * 512;
} while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < RomSize));
//
@@ -508,7 +518,7 @@ LoadOpRomImage (
if (RomImageSize > 0) {
RetStatus = EFI_SUCCESS;
- Image = AllocatePool ((UINT32) RomImageSize);
+ Image = AllocatePool ((UINT32)RomImageSize);
if (Image == NULL) {
RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
FreePool (RomHeader);
@@ -523,7 +533,7 @@ LoadOpRomImage (
PciDevice->PciRootBridgeIo,
EfiPciWidthUint32,
RomBar,
- (UINT32) RomImageSize/sizeof(UINT32),
+ (UINT32)RomImageSize/sizeof (UINT32),
Image
);
RomInMemory = Image;
@@ -570,18 +580,17 @@ LoadOpRomImage (
**/
VOID
RomDecode (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT8 RomBarIndex,
- IN UINT32 RomBar,
- IN BOOLEAN Enable
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT8 RomBarIndex,
+ IN UINT32 RomBar,
+ IN BOOLEAN Enable
)
{
- UINT32 Value32;
- EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 Value32;
+ EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = &PciDevice->PciIo;
if (Enable) {
-
//
// set the Rom base address: now is hardcode
// enable its decoder
@@ -589,7 +598,7 @@ RomDecode (
Value32 = RomBar | 0x1;
PciIo->Pci.Write (
PciIo,
- (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
+ (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint32,
RomBarIndex,
1,
&Value32
@@ -603,14 +612,12 @@ RomDecode (
//
// Setting the memory space bit in the function's command register
//
- PCI_ENABLE_COMMAND_REGISTER(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
-
+ PCI_ENABLE_COMMAND_REGISTER (PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
} else {
-
//
// disable command register decode to memory
//
- PCI_DISABLE_COMMAND_REGISTER(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
+ PCI_DISABLE_COMMAND_REGISTER (PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
//
// Destroy the programmed bar in all the upstream bridge.
@@ -623,12 +630,11 @@ RomDecode (
Value32 = 0xFFFFFFFE;
PciIo->Pci.Write (
PciIo,
- (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
+ (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint32,
RomBarIndex,
1,
&Value32
);
-
}
}
@@ -643,7 +649,7 @@ RomDecode (
**/
EFI_STATUS
ProcessOpRomImage (
- IN PCI_IO_DEVICE *PciDevice
+ IN PCI_IO_DEVICE *PciDevice
)
{
UINT8 Indicator;
@@ -665,26 +671,27 @@ ProcessOpRomImage (
//
// Get the Address of the Option Rom image
//
- RomBar = PciDevice->PciIo.RomImage;
- RomBarOffset = (UINT8 *) RomBar;
- RetStatus = EFI_NOT_FOUND;
+ RomBar = PciDevice->PciIo.RomImage;
+ RomBarOffset = (UINT8 *)RomBar;
+ RetStatus = EFI_NOT_FOUND;
if (RomBar == NULL) {
return RetStatus;
}
- ASSERT (((EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset)->Signature == PCI_EXPANSION_ROM_HEADER_SIGNATURE);
+
+ ASSERT (((EFI_PCI_EXPANSION_ROM_HEADER *)RomBarOffset)->Signature == PCI_EXPANSION_ROM_HEADER_SIGNATURE);
do {
- EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset;
+ EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *)RomBarOffset;
if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
RomBarOffset += 512;
continue;
}
- Pcir = (PCI_DATA_STRUCTURE *) (RomBarOffset + EfiRomHeader->PcirOffset);
+ Pcir = (PCI_DATA_STRUCTURE *)(RomBarOffset + EfiRomHeader->PcirOffset);
ASSERT (Pcir->Signature == PCI_DATA_STRUCTURE_SIGNATURE);
- ImageSize = (UINT32) (Pcir->ImageLength * 512);
- Indicator = Pcir->Indicator;
+ ImageSize = (UINT32)(Pcir->ImageLength * 512);
+ Indicator = Pcir->Indicator;
//
// Skip the image if it is not an EFI PCI Option ROM image
@@ -703,11 +710,11 @@ ProcessOpRomImage (
//
// Create Pci Option Rom Image device path header
//
- EfiOpRomImageNode.Header.Type = MEDIA_DEVICE_PATH;
- EfiOpRomImageNode.Header.SubType = MEDIA_RELATIVE_OFFSET_RANGE_DP;
+ EfiOpRomImageNode.Header.Type = MEDIA_DEVICE_PATH;
+ EfiOpRomImageNode.Header.SubType = MEDIA_RELATIVE_OFFSET_RANGE_DP;
SetDevicePathNodeLength (&EfiOpRomImageNode.Header, sizeof (EfiOpRomImageNode));
- EfiOpRomImageNode.StartingOffset = (UINTN) RomBarOffset - (UINTN) RomBar;
- EfiOpRomImageNode.EndingOffset = (UINTN) RomBarOffset + ImageSize - 1 - (UINTN) RomBar;
+ EfiOpRomImageNode.StartingOffset = (UINTN)RomBarOffset - (UINTN)RomBar;
+ EfiOpRomImageNode.EndingOffset = (UINTN)RomBarOffset + ImageSize - 1 - (UINTN)RomBar;
PciOptionRomImageDevicePath = AppendDevicePathNode (PciDevice->DevicePath, &EfiOpRomImageNode.Header);
ASSERT (PciOptionRomImageDevicePath != NULL);
@@ -752,13 +759,12 @@ ProcessOpRomImage (
RetStatus = EFI_SUCCESS;
}
}
+
FreePool (PciOptionRomImageDevicePath);
NextImage:
RomBarOffset += ImageSize;
-
- } while (((Indicator & 0x80) == 0x00) && (((UINTN) RomBarOffset - (UINTN) RomBar) < PciDevice->RomSize));
+ } while (((Indicator & 0x80) == 0x00) && (((UINTN)RomBarOffset - (UINTN)RomBar) < PciDevice->RomSize));
return RetStatus;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
index 5c4e9fa3b6..16998a422e 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_PCI_OPTION_ROM_SUPPORT_H_
#define _EFI_PCI_OPTION_ROM_SUPPORT_H_
-
/**
Initialize a PCI LoadFile2 instance.
@@ -18,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
InitializePciLoadFile2 (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -47,11 +46,11 @@ InitializePciLoadFile2 (
EFI_STATUS
EFIAPI
LoadFile2 (
- IN EFI_LOAD_FILE2_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
- IN BOOLEAN BootPolicy,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer OPTIONAL
+ IN EFI_LOAD_FILE2_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN BOOLEAN BootPolicy,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer OPTIONAL
);
/**
@@ -66,8 +65,8 @@ LoadFile2 (
**/
BOOLEAN
ContainEfiImage (
- IN VOID *RomImage,
- IN UINT64 RomSize
+ IN VOID *RomImage,
+ IN UINT64 RomSize
);
/**
@@ -82,7 +81,7 @@ ContainEfiImage (
**/
EFI_STATUS
GetOpRomInfo (
- IN OUT PCI_IO_DEVICE *PciIoDevice
+ IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
@@ -97,8 +96,8 @@ GetOpRomInfo (
**/
EFI_STATUS
LoadOpRomImage (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT64 RomBase
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT64 RomBase
);
/**
@@ -113,10 +112,10 @@ LoadOpRomImage (
**/
VOID
RomDecode (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT8 RomBarIndex,
- IN UINT32 RomBar,
- IN BOOLEAN Enable
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT8 RomBarIndex,
+ IN UINT32 RomBar,
+ IN BOOLEAN Enable
);
/**
@@ -130,7 +129,7 @@ RomDecode (
**/
EFI_STATUS
ProcessOpRomImage (
- IN PCI_IO_DEVICE *PciDevice
+ IN PCI_IO_DEVICE *PciDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
index c7f3ea5099..ce23964e50 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
@@ -21,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
ResetPowerManagementFeature (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_STATUS Status;
@@ -31,11 +31,11 @@ ResetPowerManagementFeature (
PowerManagementRegBlock = 0;
Status = LocateCapabilityRegBlock (
- PciIoDevice,
- EFI_PCI_CAPABILITY_ID_PMI,
- &PowerManagementRegBlock,
- NULL
- );
+ PciIoDevice,
+ EFI_PCI_CAPABILITY_ID_PMI,
+ &PowerManagementRegBlock,
+ NULL
+ );
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
@@ -77,6 +77,6 @@ ResetPowerManagementFeature (
&PowerManagementCSR
);
}
+
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
index b5018dcf11..d11a8fdc68 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
@@ -22,7 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
ResetPowerManagementFeature (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index 4969ee0f64..8ffd05f327 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -11,9 +11,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// The default policy for the PCI bus driver is NOT to reserve I/O ranges for both ISA aliases and VGA aliases.
//
-BOOLEAN mReserveIsaAliases = FALSE;
-BOOLEAN mReserveVgaAliases = FALSE;
-BOOLEAN mPolicyDetermined = FALSE;
+BOOLEAN mReserveIsaAliases = FALSE;
+BOOLEAN mReserveVgaAliases = FALSE;
+BOOLEAN mPolicyDetermined = FALSE;
/**
The function is used to skip VGA range.
@@ -24,8 +24,8 @@ BOOLEAN mPolicyDetermined = FALSE;
**/
VOID
SkipVGAAperture (
- OUT UINT64 *Start,
- IN UINT64 Length
+ OUT UINT64 *Start,
+ IN UINT64 Length
)
{
UINT64 Original;
@@ -37,7 +37,7 @@ SkipVGAAperture (
//
// For legacy VGA, bit 10 to bit 15 is not decoded
//
- Mask = 0x3FF;
+ Mask = 0x3FF;
Original = *Start;
StartOffset = Original & Mask;
@@ -56,11 +56,10 @@ SkipVGAAperture (
**/
VOID
SkipIsaAliasAperture (
- OUT UINT64 *Start,
- IN UINT64 Length
+ OUT UINT64 *Start,
+ IN UINT64 Length
)
{
-
UINT64 Original;
UINT64 Mask;
UINT64 StartOffset;
@@ -71,7 +70,7 @@ SkipIsaAliasAperture (
//
// For legacy ISA, bit 10 to bit 15 is not decoded
//
- Mask = 0x3FF;
+ Mask = 0x3FF;
Original = *Start;
StartOffset = Original & Mask;
@@ -92,14 +91,14 @@ SkipIsaAliasAperture (
**/
VOID
InsertResourceNode (
- IN OUT PCI_RESOURCE_NODE *Bridge,
- IN PCI_RESOURCE_NODE *ResNode
+ IN OUT PCI_RESOURCE_NODE *Bridge,
+ IN PCI_RESOURCE_NODE *ResNode
)
{
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *Temp;
- UINT64 ResNodeAlignRest;
- UINT64 TempAlignRest;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Temp;
+ UINT64 ResNodeAlignRest;
+ UINT64 TempAlignRest;
ASSERT (Bridge != NULL);
ASSERT (ResNode != NULL);
@@ -113,8 +112,8 @@ InsertResourceNode (
if (ResNode->Alignment > Temp->Alignment) {
break;
} else if (ResNode->Alignment == Temp->Alignment) {
- ResNodeAlignRest = ResNode->Length & ResNode->Alignment;
- TempAlignRest = Temp->Length & Temp->Alignment;
+ ResNodeAlignRest = ResNode->Length & ResNode->Alignment;
+ TempAlignRest = Temp->Length & Temp->Alignment;
if ((ResNodeAlignRest == 0) || (ResNodeAlignRest >= TempAlignRest)) {
break;
}
@@ -146,14 +145,13 @@ InsertResourceNode (
**/
VOID
MergeResourceTree (
- IN PCI_RESOURCE_NODE *Dst,
- IN PCI_RESOURCE_NODE *Res,
- IN BOOLEAN TypeMerge
+ IN PCI_RESOURCE_NODE *Dst,
+ IN PCI_RESOURCE_NODE *Res,
+ IN BOOLEAN TypeMerge
)
{
-
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *Temp;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Temp;
ASSERT (Dst != NULL);
ASSERT (Res != NULL);
@@ -161,7 +159,7 @@ MergeResourceTree (
while (!IsListEmpty (&Res->ChildList)) {
CurrentLink = Res->ChildList.ForwardLink;
- Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
+ Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
if (TypeMerge) {
Temp->ResType = Dst->ResType;
@@ -181,22 +179,22 @@ MergeResourceTree (
**/
VOID
CalculateApertureIo16 (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
)
{
- EFI_STATUS Status;
- UINT64 Aperture;
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *Node;
- UINT64 Offset;
- EFI_PCI_PLATFORM_POLICY PciPolicy;
- UINT64 PaddingAperture;
+ EFI_STATUS Status;
+ UINT64 Aperture;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Node;
+ UINT64 Offset;
+ EFI_PCI_PLATFORM_POLICY PciPolicy;
+ UINT64 PaddingAperture;
if (!mPolicyDetermined) {
//
// Check PciPlatform policy
//
- Status = EFI_NOT_FOUND;
+ Status = EFI_NOT_FOUND;
PciPolicy = 0;
if (gPciPlatformProtocol != NULL) {
Status = gPciPlatformProtocol->GetPlatformPolicy (
@@ -205,7 +203,7 @@ CalculateApertureIo16 (
);
}
- if (EFI_ERROR (Status) && gPciOverrideProtocol != NULL) {
+ if (EFI_ERROR (Status) && (gPciOverrideProtocol != NULL)) {
Status = gPciOverrideProtocol->GetPlatformPolicy (
gPciOverrideProtocol,
&PciPolicy
@@ -216,10 +214,12 @@ CalculateApertureIo16 (
if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) {
mReserveIsaAliases = TRUE;
}
+
if ((PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) != 0) {
mReserveVgaAliases = TRUE;
}
}
+
mPolicyDetermined = TRUE;
}
@@ -227,32 +227,31 @@ CalculateApertureIo16 (
PaddingAperture = 0;
if (Bridge == NULL) {
- return ;
+ return;
}
//
// Assume the bridge is aligned
//
for ( CurrentLink = GetFirstNode (&Bridge->ChildList)
- ; !IsNull (&Bridge->ChildList, CurrentLink)
- ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink)
- ) {
-
+ ; !IsNull (&Bridge->ChildList, CurrentLink)
+ ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink)
+ )
+ {
Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
if (Node->ResourceUsage == PciResUsagePadding) {
ASSERT (PaddingAperture == 0);
PaddingAperture = Node->Length;
continue;
}
+
//
// Consider the aperture alignment
//
Offset = Aperture & (Node->Alignment);
if (Offset != 0) {
-
Aperture = Aperture + (Node->Alignment + 1) - Offset;
-
}
//
@@ -334,21 +333,20 @@ CalculateApertureIo16 (
**/
VOID
CalculateResourceAperture (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
)
{
- UINT64 Aperture[2];
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *Node;
+ UINT64 Aperture[2];
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Node;
if (Bridge == NULL) {
- return ;
+ return;
}
if (Bridge->ResType == PciBarTypeIo16) {
-
CalculateApertureIo16 (Bridge);
- return ;
+ return;
}
Aperture[PciResUsageTypical] = 0;
@@ -357,17 +355,20 @@ CalculateResourceAperture (
// Assume the bridge is aligned
//
for ( CurrentLink = GetFirstNode (&Bridge->ChildList)
- ; !IsNull (&Bridge->ChildList, CurrentLink)
- ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink)
- ) {
+ ; !IsNull (&Bridge->ChildList, CurrentLink)
+ ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink)
+ )
+ {
Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
//
// It's possible for a bridge to contain multiple padding resource
// nodes due to DegradeResource().
//
- ASSERT ((Node->ResourceUsage == PciResUsageTypical) ||
- (Node->ResourceUsage == PciResUsagePadding));
+ ASSERT (
+ (Node->ResourceUsage == PciResUsageTypical) ||
+ (Node->ResourceUsage == PciResUsagePadding)
+ );
ASSERT (Node->ResourceUsage < ARRAY_SIZE (Aperture));
//
// Recode current aperture as a offset
@@ -419,126 +420,123 @@ CalculateResourceAperture (
**/
VOID
GetResourceFromDevice (
- IN PCI_IO_DEVICE *PciDev,
- IN OUT PCI_RESOURCE_NODE *IoNode,
- IN OUT PCI_RESOURCE_NODE *Mem32Node,
- IN OUT PCI_RESOURCE_NODE *PMem32Node,
- IN OUT PCI_RESOURCE_NODE *Mem64Node,
- IN OUT PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN OUT PCI_RESOURCE_NODE *IoNode,
+ IN OUT PCI_RESOURCE_NODE *Mem32Node,
+ IN OUT PCI_RESOURCE_NODE *PMem32Node,
+ IN OUT PCI_RESOURCE_NODE *Mem64Node,
+ IN OUT PCI_RESOURCE_NODE *PMem64Node
)
{
-
- UINT8 Index;
- PCI_RESOURCE_NODE *Node;
- BOOLEAN ResourceRequested;
+ UINT8 Index;
+ PCI_RESOURCE_NODE *Node;
+ BOOLEAN ResourceRequested;
Node = NULL;
ResourceRequested = FALSE;
for (Index = 0; Index < PCI_MAX_BAR; Index++) {
-
switch ((PciDev->PciBar)[Index].BarType) {
+ case PciBarTypeMem32:
+ case PciBarTypeOpRom:
- case PciBarTypeMem32:
- case PciBarTypeOpRom:
-
- Node = CreateResourceNode (
- PciDev,
- (PciDev->PciBar)[Index].Length,
- (PciDev->PciBar)[Index].Alignment,
- Index,
- (PciDev->PciBar)[Index].BarType,
- PciResUsageTypical
- );
+ Node = CreateResourceNode (
+ PciDev,
+ (PciDev->PciBar)[Index].Length,
+ (PciDev->PciBar)[Index].Alignment,
+ Index,
+ (PciDev->PciBar)[Index].BarType,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- Mem32Node,
- Node
- );
+ InsertResourceNode (
+ Mem32Node,
+ Node
+ );
- ResourceRequested = TRUE;
- break;
+ ResourceRequested = TRUE;
+ break;
- case PciBarTypeMem64:
+ case PciBarTypeMem64:
- Node = CreateResourceNode (
- PciDev,
- (PciDev->PciBar)[Index].Length,
- (PciDev->PciBar)[Index].Alignment,
- Index,
- PciBarTypeMem64,
- PciResUsageTypical
- );
+ Node = CreateResourceNode (
+ PciDev,
+ (PciDev->PciBar)[Index].Length,
+ (PciDev->PciBar)[Index].Alignment,
+ Index,
+ PciBarTypeMem64,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- Mem64Node,
- Node
- );
+ InsertResourceNode (
+ Mem64Node,
+ Node
+ );
- ResourceRequested = TRUE;
- break;
+ ResourceRequested = TRUE;
+ break;
- case PciBarTypePMem64:
+ case PciBarTypePMem64:
- Node = CreateResourceNode (
- PciDev,
- (PciDev->PciBar)[Index].Length,
- (PciDev->PciBar)[Index].Alignment,
- Index,
- PciBarTypePMem64,
- PciResUsageTypical
- );
+ Node = CreateResourceNode (
+ PciDev,
+ (PciDev->PciBar)[Index].Length,
+ (PciDev->PciBar)[Index].Alignment,
+ Index,
+ PciBarTypePMem64,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- PMem64Node,
- Node
- );
+ InsertResourceNode (
+ PMem64Node,
+ Node
+ );
- ResourceRequested = TRUE;
- break;
+ ResourceRequested = TRUE;
+ break;
- case PciBarTypePMem32:
+ case PciBarTypePMem32:
- Node = CreateResourceNode (
- PciDev,
- (PciDev->PciBar)[Index].Length,
- (PciDev->PciBar)[Index].Alignment,
- Index,
- PciBarTypePMem32,
- PciResUsageTypical
- );
+ Node = CreateResourceNode (
+ PciDev,
+ (PciDev->PciBar)[Index].Length,
+ (PciDev->PciBar)[Index].Alignment,
+ Index,
+ PciBarTypePMem32,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- PMem32Node,
- Node
- );
- ResourceRequested = TRUE;
- break;
+ InsertResourceNode (
+ PMem32Node,
+ Node
+ );
+ ResourceRequested = TRUE;
+ break;
- case PciBarTypeIo16:
- case PciBarTypeIo32:
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
- Node = CreateResourceNode (
- PciDev,
- (PciDev->PciBar)[Index].Length,
- (PciDev->PciBar)[Index].Alignment,
- Index,
- PciBarTypeIo16,
- PciResUsageTypical
- );
+ Node = CreateResourceNode (
+ PciDev,
+ (PciDev->PciBar)[Index].Length,
+ (PciDev->PciBar)[Index].Alignment,
+ Index,
+ PciBarTypeIo16,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- IoNode,
- Node
- );
- ResourceRequested = TRUE;
- break;
+ InsertResourceNode (
+ IoNode,
+ Node
+ );
+ ResourceRequested = TRUE;
+ break;
- case PciBarTypeUnknown:
- break;
+ case PciBarTypeUnknown:
+ break;
- default:
- break;
+ default:
+ break;
}
}
@@ -546,91 +544,90 @@ GetResourceFromDevice (
// Add VF resource
//
for (Index = 0; Index < PCI_MAX_BAR; Index++) {
-
switch ((PciDev->VfPciBar)[Index].BarType) {
+ case PciBarTypeMem32:
- case PciBarTypeMem32:
-
- Node = CreateVfResourceNode (
- PciDev,
- (PciDev->VfPciBar)[Index].Length,
- (PciDev->VfPciBar)[Index].Alignment,
- Index,
- PciBarTypeMem32,
- PciResUsageTypical
- );
+ Node = CreateVfResourceNode (
+ PciDev,
+ (PciDev->VfPciBar)[Index].Length,
+ (PciDev->VfPciBar)[Index].Alignment,
+ Index,
+ PciBarTypeMem32,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- Mem32Node,
- Node
- );
+ InsertResourceNode (
+ Mem32Node,
+ Node
+ );
- break;
+ break;
- case PciBarTypeMem64:
+ case PciBarTypeMem64:
- Node = CreateVfResourceNode (
- PciDev,
- (PciDev->VfPciBar)[Index].Length,
- (PciDev->VfPciBar)[Index].Alignment,
- Index,
- PciBarTypeMem64,
- PciResUsageTypical
- );
+ Node = CreateVfResourceNode (
+ PciDev,
+ (PciDev->VfPciBar)[Index].Length,
+ (PciDev->VfPciBar)[Index].Alignment,
+ Index,
+ PciBarTypeMem64,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- Mem64Node,
- Node
- );
+ InsertResourceNode (
+ Mem64Node,
+ Node
+ );
- break;
+ break;
- case PciBarTypePMem64:
+ case PciBarTypePMem64:
- Node = CreateVfResourceNode (
- PciDev,
- (PciDev->VfPciBar)[Index].Length,
- (PciDev->VfPciBar)[Index].Alignment,
- Index,
- PciBarTypePMem64,
- PciResUsageTypical
- );
+ Node = CreateVfResourceNode (
+ PciDev,
+ (PciDev->VfPciBar)[Index].Length,
+ (PciDev->VfPciBar)[Index].Alignment,
+ Index,
+ PciBarTypePMem64,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- PMem64Node,
- Node
- );
+ InsertResourceNode (
+ PMem64Node,
+ Node
+ );
- break;
+ break;
- case PciBarTypePMem32:
+ case PciBarTypePMem32:
- Node = CreateVfResourceNode (
- PciDev,
- (PciDev->VfPciBar)[Index].Length,
- (PciDev->VfPciBar)[Index].Alignment,
- Index,
- PciBarTypePMem32,
- PciResUsageTypical
- );
+ Node = CreateVfResourceNode (
+ PciDev,
+ (PciDev->VfPciBar)[Index].Length,
+ (PciDev->VfPciBar)[Index].Alignment,
+ Index,
+ PciBarTypePMem32,
+ PciResUsageTypical
+ );
- InsertResourceNode (
- PMem32Node,
- Node
- );
- break;
+ InsertResourceNode (
+ PMem32Node,
+ Node
+ );
+ break;
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- break;
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ break;
- case PciBarTypeUnknown:
- break;
+ case PciBarTypeUnknown:
+ break;
- default:
- break;
+ default:
+ break;
}
}
+
// If there is no resource requested from this device,
// then we indicate this device has been allocated naturally.
//
@@ -655,19 +652,19 @@ GetResourceFromDevice (
**/
PCI_RESOURCE_NODE *
CreateResourceNode (
- IN PCI_IO_DEVICE *PciDev,
- IN UINT64 Length,
- IN UINT64 Alignment,
- IN UINT8 Bar,
- IN PCI_BAR_TYPE ResType,
- IN PCI_RESOURCE_USAGE ResUsage
+ IN PCI_IO_DEVICE *PciDev,
+ IN UINT64 Length,
+ IN UINT64 Alignment,
+ IN UINT8 Bar,
+ IN PCI_BAR_TYPE ResType,
+ IN PCI_RESOURCE_USAGE ResUsage
)
{
- PCI_RESOURCE_NODE *Node;
+ PCI_RESOURCE_NODE *Node;
- Node = NULL;
+ Node = NULL;
- Node = AllocateZeroPool (sizeof (PCI_RESOURCE_NODE));
+ Node = AllocateZeroPool (sizeof (PCI_RESOURCE_NODE));
ASSERT (Node != NULL);
if (Node == NULL) {
return NULL;
@@ -702,15 +699,15 @@ CreateResourceNode (
**/
PCI_RESOURCE_NODE *
CreateVfResourceNode (
- IN PCI_IO_DEVICE *PciDev,
- IN UINT64 Length,
- IN UINT64 Alignment,
- IN UINT8 Bar,
- IN PCI_BAR_TYPE ResType,
- IN PCI_RESOURCE_USAGE ResUsage
+ IN PCI_IO_DEVICE *PciDev,
+ IN UINT64 Length,
+ IN UINT64 Alignment,
+ IN UINT8 Bar,
+ IN PCI_BAR_TYPE ResType,
+ IN PCI_RESOURCE_USAGE ResUsage
)
{
- PCI_RESOURCE_NODE *Node;
+ PCI_RESOURCE_NODE *Node;
Node = CreateResourceNode (PciDev, Length, Alignment, Bar, ResType, ResUsage);
if (Node == NULL) {
@@ -736,26 +733,25 @@ CreateVfResourceNode (
**/
VOID
CreateResourceMap (
- IN PCI_IO_DEVICE *Bridge,
- IN OUT PCI_RESOURCE_NODE *IoNode,
- IN OUT PCI_RESOURCE_NODE *Mem32Node,
- IN OUT PCI_RESOURCE_NODE *PMem32Node,
- IN OUT PCI_RESOURCE_NODE *Mem64Node,
- IN OUT PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *Bridge,
+ IN OUT PCI_RESOURCE_NODE *IoNode,
+ IN OUT PCI_RESOURCE_NODE *Mem32Node,
+ IN OUT PCI_RESOURCE_NODE *PMem32Node,
+ IN OUT PCI_RESOURCE_NODE *Mem64Node,
+ IN OUT PCI_RESOURCE_NODE *PMem64Node
)
{
- PCI_IO_DEVICE *Temp;
- PCI_RESOURCE_NODE *IoBridge;
- PCI_RESOURCE_NODE *Mem32Bridge;
- PCI_RESOURCE_NODE *PMem32Bridge;
- PCI_RESOURCE_NODE *Mem64Bridge;
- PCI_RESOURCE_NODE *PMem64Bridge;
- LIST_ENTRY *CurrentLink;
+ PCI_IO_DEVICE *Temp;
+ PCI_RESOURCE_NODE *IoBridge;
+ PCI_RESOURCE_NODE *Mem32Bridge;
+ PCI_RESOURCE_NODE *PMem32Bridge;
+ PCI_RESOURCE_NODE *Mem64Bridge;
+ PCI_RESOURCE_NODE *PMem64Bridge;
+ LIST_ENTRY *CurrentLink;
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
-
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
//
@@ -774,7 +770,6 @@ CreateResourceMap (
);
if (IS_PCI_BRIDGE (&Temp->Pci)) {
-
//
// If the device has children, create a bridge resource node for this PPB
// Note: For PPB, memory aperture is aligned with 1MB and IO aperture
@@ -910,7 +905,6 @@ CreateResourceMap (
FreePool (PMem64Bridge);
PMem64Bridge = NULL;
}
-
}
//
@@ -976,12 +970,12 @@ CreateResourceMap (
**/
VOID
ResourcePaddingPolicy (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
)
{
//
@@ -1015,18 +1009,18 @@ ResourcePaddingPolicy (
**/
VOID
DegradeResource (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
)
{
- PCI_IO_DEVICE *PciIoDevice;
- LIST_ENTRY *ChildDeviceLink;
- LIST_ENTRY *ChildNodeLink;
- LIST_ENTRY *NextChildNodeLink;
- PCI_RESOURCE_NODE *ResourceNode;
+ PCI_IO_DEVICE *PciIoDevice;
+ LIST_ENTRY *ChildDeviceLink;
+ LIST_ENTRY *ChildNodeLink;
+ LIST_ENTRY *NextChildNodeLink;
+ PCI_RESOURCE_NODE *ResourceNode;
if (FeaturePcdGet (PcdPciDegradeResourceForOptionRom)) {
//
@@ -1040,15 +1034,17 @@ DegradeResource (
if (!IsListEmpty (&Mem64Node->ChildList)) {
ChildNodeLink = Mem64Node->ChildList.ForwardLink;
while (ChildNodeLink != &Mem64Node->ChildList) {
- ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
+ ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
NextChildNodeLink = ChildNodeLink->ForwardLink;
if ((ResourceNode->PciDev == PciIoDevice) &&
(ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
- ) {
+ )
+ {
RemoveEntryList (ChildNodeLink);
InsertResourceNode (Mem32Node, ResourceNode);
}
+
ChildNodeLink = NextChildNodeLink;
}
}
@@ -1056,20 +1052,22 @@ DegradeResource (
if (!IsListEmpty (&PMem64Node->ChildList)) {
ChildNodeLink = PMem64Node->ChildList.ForwardLink;
while (ChildNodeLink != &PMem64Node->ChildList) {
- ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
+ ResourceNode = RESOURCE_NODE_FROM_LINK (ChildNodeLink);
NextChildNodeLink = ChildNodeLink->ForwardLink;
if ((ResourceNode->PciDev == PciIoDevice) &&
(ResourceNode->Virtual || !PciIoDevice->PciBar[ResourceNode->Bar].BarTypeFixed)
- ) {
+ )
+ {
RemoveEntryList (ChildNodeLink);
InsertResourceNode (PMem32Node, ResourceNode);
}
+
ChildNodeLink = NextChildNodeLink;
}
}
-
}
+
ChildDeviceLink = ChildDeviceLink->ForwardLink;
}
}
@@ -1095,11 +1093,11 @@ DegradeResource (
// if the bridge does not support MEM64, degrade MEM64 to MEM32
//
if (!BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_MEM64_DECODE_SUPPORTED)) {
- MergeResourceTree (
- Mem32Node,
- Mem64Node,
- TRUE
- );
+ MergeResourceTree (
+ Mem32Node,
+ Mem64Node,
+ TRUE
+ );
}
//
@@ -1117,7 +1115,7 @@ DegradeResource (
// if both PMEM64 and PMEM32 requests from child devices, which can not be satisfied
// by a P2P bridge simultaneously, keep PMEM64 and degrade PMEM32 to MEM32.
//
- if (!IsListEmpty (&PMem64Node->ChildList) && Bridge->Parent != NULL) {
+ if (!IsListEmpty (&PMem64Node->ChildList) && (Bridge->Parent != NULL)) {
MergeResourceTree (
Mem32Node,
PMem32Node,
@@ -1174,8 +1172,8 @@ DegradeResource (
**/
BOOLEAN
BridgeSupportResourceDecode (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT32 Decode
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT32 Decode
)
{
if (((Bridge->Decodes) & Decode) != 0) {
@@ -1199,13 +1197,13 @@ BridgeSupportResourceDecode (
**/
EFI_STATUS
ProgramResource (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Bridge
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Bridge
)
{
- LIST_ENTRY *CurrentLink;
- PCI_RESOURCE_NODE *Node;
- EFI_STATUS Status;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Node;
+ EFI_STATUS Status;
if (Base == gAllOne) {
return EFI_OUT_OF_RESOURCES;
@@ -1214,11 +1212,9 @@ ProgramResource (
CurrentLink = Bridge->ChildList.ForwardLink;
while (CurrentLink != &Bridge->ChildList) {
-
Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
if (!IS_PCI_BRIDGE (&(Node->PciDev->Pci))) {
-
if (IS_CARDBUS_BRIDGE (&(Node->PciDev->Pci))) {
//
// Program the PCI Card Bus device
@@ -1257,13 +1253,13 @@ ProgramResource (
**/
VOID
ProgramBar (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Address;
- UINT32 Address32;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Address;
+ UINT32 Address32;
ASSERT (Node->Bar < PCI_MAX_BAR);
@@ -1289,59 +1285,58 @@ ProgramBar (
Node->PciDev->Allocated = TRUE;
switch ((Node->PciDev->PciBar[Node->Bar]).BarType) {
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ case PciBarTypeMem32:
+ case PciBarTypePMem32:
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- case PciBarTypeMem32:
- case PciBarTypePMem32:
-
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->PciBar[Node->Bar]).Offset,
- 1,
- &Address
- );
- //
- // Continue to the case PciBarTypeOpRom to set the BaseAddress.
- // PciBarTypeOpRom is a virtual BAR only in root bridge, to capture
- // the MEM32 resource requirement for Option ROM shadow.
- //
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->PciBar[Node->Bar]).Offset,
+ 1,
+ &Address
+ );
+ //
+ // Continue to the case PciBarTypeOpRom to set the BaseAddress.
+ // PciBarTypeOpRom is a virtual BAR only in root bridge, to capture
+ // the MEM32 resource requirement for Option ROM shadow.
+ //
- case PciBarTypeOpRom:
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ case PciBarTypeOpRom:
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- break;
+ break;
- case PciBarTypeMem64:
- case PciBarTypePMem64:
+ case PciBarTypeMem64:
+ case PciBarTypePMem64:
- Address32 = (UINT32) (Address & 0x00000000FFFFFFFF);
+ Address32 = (UINT32)(Address & 0x00000000FFFFFFFF);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->PciBar[Node->Bar]).Offset,
- 1,
- &Address32
- );
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->PciBar[Node->Bar]).Offset,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) RShiftU64 (Address, 32);
+ Address32 = (UINT32)RShiftU64 (Address, 32);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (UINT8) ((Node->PciDev->PciBar[Node->Bar]).Offset + 4),
- 1,
- &Address32
- );
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (UINT8)((Node->PciDev->PciBar[Node->Bar]).Offset + 4),
+ 1,
+ &Address32
+ );
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- break;
+ break;
- default:
- break;
+ default:
+ break;
}
}
@@ -1354,13 +1349,13 @@ ProgramBar (
**/
EFI_STATUS
ProgramVfBar (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Address;
- UINT32 Address32;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Address;
+ UINT32 Address32;
ASSERT (Node->Bar < PCI_MAX_BAR);
ASSERT (Node->Virtual);
@@ -1379,53 +1374,52 @@ ProgramVfBar (
Node->PciDev->Allocated = TRUE;
switch ((Node->PciDev->VfPciBar[Node->Bar]).BarType) {
+ case PciBarTypeMem32:
+ case PciBarTypePMem32:
- case PciBarTypeMem32:
- case PciBarTypePMem32:
-
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->VfPciBar[Node->Bar]).Offset,
- 1,
- &Address
- );
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->VfPciBar[Node->Bar]).Offset,
+ 1,
+ &Address
+ );
- Node->PciDev->VfPciBar[Node->Bar].BaseAddress = Address;
- break;
+ Node->PciDev->VfPciBar[Node->Bar].BaseAddress = Address;
+ break;
- case PciBarTypeMem64:
- case PciBarTypePMem64:
+ case PciBarTypeMem64:
+ case PciBarTypePMem64:
- Address32 = (UINT32) (Address & 0x00000000FFFFFFFF);
+ Address32 = (UINT32)(Address & 0x00000000FFFFFFFF);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->VfPciBar[Node->Bar]).Offset,
- 1,
- &Address32
- );
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->VfPciBar[Node->Bar]).Offset,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) RShiftU64 (Address, 32);
+ Address32 = (UINT32)RShiftU64 (Address, 32);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- ((Node->PciDev->VfPciBar[Node->Bar]).Offset + 4),
- 1,
- &Address32
- );
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ ((Node->PciDev->VfPciBar[Node->Bar]).Offset + 4),
+ 1,
+ &Address32
+ );
- Node->PciDev->VfPciBar[Node->Bar].BaseAddress = Address;
- break;
+ Node->PciDev->VfPciBar[Node->Bar].BaseAddress = Address;
+ break;
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- break;
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ break;
- default:
- break;
+ default:
+ break;
}
return EFI_SUCCESS;
@@ -1440,24 +1434,24 @@ ProgramVfBar (
**/
VOID
ProgramPpbApperture (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Address;
- UINT32 Address32;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Address;
+ UINT32 Address32;
Address = 0;
//
// If no device resource of this PPB, return anyway
// Aperture is set default in the initialization code
//
- if (Node->Length == 0 || Node->ResourceUsage == PciResUsagePadding) {
+ if ((Node->Length == 0) || (Node->ResourceUsage == PciResUsagePadding)) {
//
// For padding resource node, just ignore when programming
//
- return ;
+ return;
}
PciIo = &(Node->PciDev->PciIo);
@@ -1469,174 +1463,173 @@ ProgramPpbApperture (
Node->PciDev->Allocated = TRUE;
switch (Node->Bar) {
+ case PPB_BAR_0:
+ case PPB_BAR_1:
+ switch ((Node->PciDev->PciBar[Node->Bar]).BarType) {
+ case PciBarTypeIo16:
+ case PciBarTypeIo32:
+ case PciBarTypeMem32:
+ case PciBarTypePMem32:
+
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->PciBar[Node->Bar]).Offset,
+ 1,
+ &Address
+ );
- case PPB_BAR_0:
- case PPB_BAR_1:
- switch ((Node->PciDev->PciBar[Node->Bar]).BarType) {
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
- case PciBarTypeIo16:
- case PciBarTypeIo32:
- case PciBarTypeMem32:
- case PciBarTypePMem32:
+ case PciBarTypeMem64:
+ case PciBarTypePMem64:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->PciBar[Node->Bar]).Offset,
- 1,
- &Address
- );
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
+ Address32 = (UINT32)(Address & 0x00000000FFFFFFFF);
- case PciBarTypeMem64:
- case PciBarTypePMem64:
-
- Address32 = (UINT32) (Address & 0x00000000FFFFFFFF);
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->PciBar[Node->Bar]).Offset,
+ 1,
+ &Address32
+ );
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->PciBar[Node->Bar]).Offset,
- 1,
- &Address32
- );
+ Address32 = (UINT32)RShiftU64 (Address, 32);
- Address32 = (UINT32) RShiftU64 (Address, 32);
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ (UINT8)((Node->PciDev->PciBar[Node->Bar]).Offset + 4),
+ 1,
+ &Address32
+ );
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (UINT8) ((Node->PciDev->PciBar[Node->Bar]).Offset + 4),
- 1,
- &Address32
- );
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
+ default:
+ break;
+ }
- default:
- break;
- }
- break;
+ break;
- case PPB_IO_RANGE:
+ case PPB_IO_RANGE:
- Address32 = ((UINT32) (Address)) >> 8;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint8,
- 0x1C,
- 1,
- &Address32
- );
+ Address32 = ((UINT32)(Address)) >> 8;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint8,
+ 0x1C,
+ 1,
+ &Address32
+ );
- Address32 >>= 8;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x30,
- 1,
- &Address32
- );
+ Address32 >>= 8;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x30,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) (Address + Node->Length - 1);
- Address32 = ((UINT32) (Address32)) >> 8;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint8,
- 0x1D,
- 1,
- &Address32
- );
+ Address32 = (UINT32)(Address + Node->Length - 1);
+ Address32 = ((UINT32)(Address32)) >> 8;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint8,
+ 0x1D,
+ 1,
+ &Address32
+ );
- Address32 >>= 8;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x32,
- 1,
- &Address32
- );
+ Address32 >>= 8;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x32,
+ 1,
+ &Address32
+ );
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
- case PPB_MEM32_RANGE:
+ case PPB_MEM32_RANGE:
- Address32 = ((UINT32) (Address)) >> 16;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x20,
- 1,
- &Address32
- );
+ Address32 = ((UINT32)(Address)) >> 16;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x20,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) (Address + Node->Length - 1);
- Address32 = ((UINT32) (Address32)) >> 16;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x22,
- 1,
- &Address32
- );
+ Address32 = (UINT32)(Address + Node->Length - 1);
+ Address32 = ((UINT32)(Address32)) >> 16;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x22,
+ 1,
+ &Address32
+ );
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
- case PPB_PMEM32_RANGE:
- case PPB_PMEM64_RANGE:
+ case PPB_PMEM32_RANGE:
+ case PPB_PMEM64_RANGE:
- Address32 = ((UINT32) (Address)) >> 16;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x24,
- 1,
- &Address32
- );
+ Address32 = ((UINT32)(Address)) >> 16;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x24,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) (Address + Node->Length - 1);
- Address32 = ((UINT32) (Address32)) >> 16;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint16,
- 0x26,
- 1,
- &Address32
- );
+ Address32 = (UINT32)(Address + Node->Length - 1);
+ Address32 = ((UINT32)(Address32)) >> 16;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ 0x26,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) RShiftU64 (Address, 32);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- 0x28,
- 1,
- &Address32
- );
+ Address32 = (UINT32)RShiftU64 (Address, 32);
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ 0x28,
+ 1,
+ &Address32
+ );
- Address32 = (UINT32) RShiftU64 ((Address + Node->Length - 1), 32);
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- 0x2C,
- 1,
- &Address32
- );
+ Address32 = (UINT32)RShiftU64 ((Address + Node->Length - 1), 32);
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ 0x2C,
+ 1,
+ &Address32
+ );
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
- default:
- break;
+ default:
+ break;
}
}
@@ -1650,15 +1643,16 @@ ProgramPpbApperture (
**/
VOID
ProgramUpstreamBridgeForRom (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT32 OptionRomBase,
- IN BOOLEAN Enable
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT32 OptionRomBase,
+ IN BOOLEAN Enable
)
{
- PCI_IO_DEVICE *Parent;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT16 Base;
- UINT16 Limit;
+ PCI_IO_DEVICE *Parent;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 Base;
+ UINT16 Limit;
+
//
// For root bridge, just return.
//
@@ -1677,9 +1671,9 @@ ProgramUpstreamBridgeForRom (
//
// Only cover MMIO for Option ROM.
//
- Base = (UINT16) (OptionRomBase >> 16);
- Limit = (UINT16) ((OptionRomBase + PciDevice->RomSize - 1) >> 16);
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
+ Base = (UINT16)(OptionRomBase >> 16);
+ Limit = (UINT16)((OptionRomBase + PciDevice->RomSize - 1) >> 16);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit), 1, &Limit);
PCI_ENABLE_COMMAND_REGISTER (Parent, EFI_PCI_COMMAND_MEMORY_SPACE);
@@ -1691,14 +1685,15 @@ ProgramUpstreamBridgeForRom (
//
// When devices under the bridge contains Option ROM and doesn't require 32bit MMIO.
//
- Base = (UINT16) gAllOne;
- Limit = (UINT16) gAllZero;
+ Base = (UINT16)gAllOne;
+ Limit = (UINT16)gAllZero;
} else {
- Base = (UINT16) ((UINT32) Parent->PciBar[PPB_MEM32_RANGE].BaseAddress >> 16);
- Limit = (UINT16) ((UINT32) (Parent->PciBar[PPB_MEM32_RANGE].BaseAddress
- + Parent->PciBar[PPB_MEM32_RANGE].Length - 1) >> 16);
+ Base = (UINT16)((UINT32)Parent->PciBar[PPB_MEM32_RANGE].BaseAddress >> 16);
+ Limit = (UINT16)((UINT32)(Parent->PciBar[PPB_MEM32_RANGE].BaseAddress
+ + Parent->PciBar[PPB_MEM32_RANGE].Length - 1) >> 16);
}
- PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
+
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit), 1, &Limit);
PCI_DISABLE_COMMAND_REGISTER (Parent, EFI_PCI_COMMAND_MEMORY_SPACE);
@@ -1719,11 +1714,11 @@ ProgramUpstreamBridgeForRom (
**/
BOOLEAN
ResourceRequestExisted (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
)
{
if (Bridge != NULL) {
- if (!IsListEmpty (&Bridge->ChildList) || Bridge->Length != 0) {
+ if (!IsListEmpty (&Bridge->ChildList) || (Bridge->Length != 0)) {
return TRUE;
}
}
@@ -1741,8 +1736,8 @@ ResourceRequestExisted (
**/
VOID
InitializeResourcePool (
- IN OUT PCI_RESOURCE_NODE *ResourcePool,
- IN PCI_BAR_TYPE ResourceType
+ IN OUT PCI_RESOURCE_NODE *ResourcePool,
+ IN PCI_BAR_TYPE ResourceType
)
{
ZeroMem (ResourcePool, sizeof (PCI_RESOURCE_NODE));
@@ -1759,17 +1754,16 @@ InitializeResourcePool (
**/
VOID
DestroyResourceTree (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
)
{
- PCI_RESOURCE_NODE *Temp;
- LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Temp;
+ LIST_ENTRY *CurrentLink;
while (!IsListEmpty (&Bridge->ChildList)) {
-
CurrentLink = Bridge->ChildList.ForwardLink;
- Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
+ Temp = RESOURCE_NODE_FROM_LINK (CurrentLink);
ASSERT (Temp);
RemoveEntryList (CurrentLink);
@@ -1795,15 +1789,15 @@ DestroyResourceTree (
**/
VOID
ResourcePaddingForCardBusBridge (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
)
{
- PCI_RESOURCE_NODE *Node;
+ PCI_RESOURCE_NODE *Node;
Node = NULL;
@@ -1889,14 +1883,14 @@ ResourcePaddingForCardBusBridge (
**/
VOID
ProgramP2C (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Address;
- UINT64 TempAddress;
- UINT16 BridgeControl;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Address;
+ UINT64 TempAddress;
+ UINT16 BridgeControl;
Address = 0;
PciIo = &(Node->PciDev->PciIo);
@@ -1912,205 +1906,200 @@ ProgramP2C (
Node->PciDev->Allocated = TRUE;
switch (Node->Bar) {
-
- case P2C_BAR_0:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- (Node->PciDev->PciBar[Node->Bar]).Offset,
- 1,
- &Address
- );
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- break;
-
- case P2C_MEM_1:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_MEMORY_BASE_0,
- 1,
- &Address
- );
-
- TempAddress = Address + Node->Length - 1;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_MEMORY_LIMIT_0,
- 1,
- &TempAddress
- );
-
- if (Node->ResType == PciBarTypeMem32) {
- //
- // Set non-prefetchable bit
- //
- PciIo->Pci.Read (
+ case P2C_BAR_0:
+ PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ (Node->PciDev->PciBar[Node->Bar]).Offset,
1,
- &BridgeControl
+ &Address
);
- BridgeControl &= (UINT16) ~PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ break;
+
+ case P2C_MEM_1:
PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_MEMORY_BASE_0,
1,
- &BridgeControl
+ &Address
);
- } else {
- //
- // Set prefetchable bit
- //
- PciIo->Pci.Read (
+ TempAddress = Address + Node->Length - 1;
+ PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_MEMORY_LIMIT_0,
1,
- &BridgeControl
+ &TempAddress
);
- BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
+ if (Node->ResType == PciBarTypeMem32) {
+ //
+ // Set non-prefetchable bit
+ //
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+
+ BridgeControl &= (UINT16) ~PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+ } else {
+ //
+ // Set prefetchable bit
+ //
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+
+ BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+ }
+
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
+
+ break;
+
+ case P2C_MEM_2:
PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_MEMORY_BASE_1,
1,
- &BridgeControl
+ &Address
);
- }
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
- break;
+ TempAddress = Address + Node->Length - 1;
- case P2C_MEM_2:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_MEMORY_BASE_1,
- 1,
- &Address
- );
-
- TempAddress = Address + Node->Length - 1;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint32,
+ PCI_CARD_MEMORY_LIMIT_1,
+ 1,
+ &TempAddress
+ );
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_MEMORY_LIMIT_1,
- 1,
- &TempAddress
- );
+ if (Node->ResType == PciBarTypeMem32) {
+ //
+ // Set non-prefetchable bit
+ //
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+
+ BridgeControl &= (UINT16) ~(PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE);
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+ } else {
+ //
+ // Set prefetchable bit
+ //
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+
+ BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE;
+ PciIo->Pci.Write (
+ PciIo,
+ EfiPciIoWidthUint16,
+ PCI_CARD_BRIDGE_CONTROL,
+ 1,
+ &BridgeControl
+ );
+ }
- if (Node->ResType == PciBarTypeMem32) {
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
+ break;
- //
- // Set non-prefetchable bit
- //
- PciIo->Pci.Read (
+ case P2C_IO_1:
+ PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_IO_BASE_0_LOWER,
1,
- &BridgeControl
+ &Address
);
- BridgeControl &= (UINT16) ~(PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE);
+ TempAddress = Address + Node->Length - 1;
PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_IO_LIMIT_0_LOWER,
1,
- &BridgeControl
+ &TempAddress
);
- } else {
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
- //
- // Set prefetchable bit
- //
- PciIo->Pci.Read (
+ break;
+
+ case P2C_IO_2:
+ PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_IO_BASE_1_LOWER,
1,
- &BridgeControl
+ &Address
);
- BridgeControl |= PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE;
+ TempAddress = Address + Node->Length - 1;
PciIo->Pci.Write (
PciIo,
- EfiPciIoWidthUint16,
- PCI_CARD_BRIDGE_CONTROL,
+ EfiPciIoWidthUint32,
+ PCI_CARD_IO_LIMIT_1_LOWER,
1,
- &BridgeControl
+ &TempAddress
);
- }
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
- break;
-
- case P2C_IO_1:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_IO_BASE_0_LOWER,
- 1,
- &Address
- );
-
- TempAddress = Address + Node->Length - 1;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_IO_LIMIT_0_LOWER,
- 1,
- &TempAddress
- );
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
-
- break;
-
- case P2C_IO_2:
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_IO_BASE_1_LOWER,
- 1,
- &Address
- );
- TempAddress = Address + Node->Length - 1;
- PciIo->Pci.Write (
- PciIo,
- EfiPciIoWidthUint32,
- PCI_CARD_IO_LIMIT_1_LOWER,
- 1,
- &TempAddress
- );
-
- Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
- Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
- Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
- break;
+ Node->PciDev->PciBar[Node->Bar].BaseAddress = Address;
+ Node->PciDev->PciBar[Node->Bar].Length = Node->Length;
+ Node->PciDev->PciBar[Node->Bar].BarType = Node->ResType;
+ break;
- default:
- break;
+ default:
+ break;
}
}
@@ -2127,34 +2116,32 @@ ProgramP2C (
**/
VOID
ApplyResourcePadding (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
)
{
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
- PCI_RESOURCE_NODE *Node;
- UINT8 DummyBarIndex;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
+ PCI_RESOURCE_NODE *Node;
+ UINT8 DummyBarIndex;
DummyBarIndex = 0;
Ptr = PciDev->ResourcePaddingDescriptors;
- while (((EFI_ACPI_END_TAG_DESCRIPTOR *) Ptr)->Desc != ACPI_END_TAG_DESCRIPTOR) {
-
- if (Ptr->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR && Ptr->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) {
+ while (((EFI_ACPI_END_TAG_DESCRIPTOR *)Ptr)->Desc != ACPI_END_TAG_DESCRIPTOR) {
+ if ((Ptr->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) && (Ptr->ResType == ACPI_ADDRESS_SPACE_TYPE_IO)) {
if (Ptr->AddrLen != 0) {
-
Node = CreateResourceNode (
- PciDev,
- Ptr->AddrLen,
- Ptr->AddrRangeMax,
- DummyBarIndex,
- PciBarTypeIo16,
- PciResUsagePadding
- );
+ PciDev,
+ Ptr->AddrLen,
+ Ptr->AddrRangeMax,
+ DummyBarIndex,
+ PciBarTypeIo16,
+ PciResUsagePadding
+ );
InsertResourceNode (
IoNode,
Node
@@ -2165,23 +2152,21 @@ ApplyResourcePadding (
continue;
}
- if (Ptr->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR && Ptr->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
-
+ if ((Ptr->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) && (Ptr->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM)) {
if (Ptr->AddrSpaceGranularity == 32) {
-
//
// prefetchable
//
if (Ptr->SpecificFlag == 0x6) {
if (Ptr->AddrLen != 0) {
Node = CreateResourceNode (
- PciDev,
- Ptr->AddrLen,
- Ptr->AddrRangeMax,
- DummyBarIndex,
- PciBarTypePMem32,
- PciResUsagePadding
- );
+ PciDev,
+ Ptr->AddrLen,
+ Ptr->AddrRangeMax,
+ DummyBarIndex,
+ PciBarTypePMem32,
+ PciResUsagePadding
+ );
InsertResourceNode (
PMem32Node,
Node
@@ -2198,13 +2183,13 @@ ApplyResourcePadding (
if (Ptr->SpecificFlag == 0) {
if (Ptr->AddrLen != 0) {
Node = CreateResourceNode (
- PciDev,
- Ptr->AddrLen,
- Ptr->AddrRangeMax,
- DummyBarIndex,
- PciBarTypeMem32,
- PciResUsagePadding
- );
+ PciDev,
+ Ptr->AddrLen,
+ Ptr->AddrRangeMax,
+ DummyBarIndex,
+ PciBarTypeMem32,
+ PciResUsagePadding
+ );
InsertResourceNode (
Mem32Node,
Node
@@ -2217,20 +2202,19 @@ ApplyResourcePadding (
}
if (Ptr->AddrSpaceGranularity == 64) {
-
//
// prefetchable
//
if (Ptr->SpecificFlag == 0x6) {
if (Ptr->AddrLen != 0) {
Node = CreateResourceNode (
- PciDev,
- Ptr->AddrLen,
- Ptr->AddrRangeMax,
- DummyBarIndex,
- PciBarTypePMem64,
- PciResUsagePadding
- );
+ PciDev,
+ Ptr->AddrLen,
+ Ptr->AddrRangeMax,
+ DummyBarIndex,
+ PciBarTypePMem64,
+ PciResUsagePadding
+ );
InsertResourceNode (
PMem64Node,
Node
@@ -2247,13 +2231,13 @@ ApplyResourcePadding (
if (Ptr->SpecificFlag == 0) {
if (Ptr->AddrLen != 0) {
Node = CreateResourceNode (
- PciDev,
- Ptr->AddrLen,
- Ptr->AddrRangeMax,
- DummyBarIndex,
- PciBarTypeMem64,
- PciResUsagePadding
- );
+ PciDev,
+ Ptr->AddrLen,
+ Ptr->AddrRangeMax,
+ DummyBarIndex,
+ PciBarTypeMem64,
+ PciResUsagePadding
+ );
InsertResourceNode (
Mem64Node,
Node
@@ -2280,13 +2264,12 @@ ApplyResourcePadding (
**/
VOID
GetResourcePaddingPpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- if (gPciHotPlugInit != NULL && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
+ if ((gPciHotPlugInit != NULL) && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
if (PciIoDevice->ResourcePaddingDescriptors == NULL) {
GetResourcePaddingForHpb (PciIoDevice);
}
}
}
-
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
index 9f2de291ba..1527d4eafa 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
@@ -17,18 +17,18 @@ typedef enum {
#define PCI_RESOURCE_SIGNATURE SIGNATURE_32 ('p', 'c', 'r', 'c')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
- LIST_ENTRY ChildList;
- PCI_IO_DEVICE *PciDev;
- UINT64 Alignment;
- UINT64 Offset;
- UINT8 Bar;
- PCI_BAR_TYPE ResType;
- UINT64 Length;
- BOOLEAN Reserved;
- PCI_RESOURCE_USAGE ResourceUsage;
- BOOLEAN Virtual;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+ LIST_ENTRY ChildList;
+ PCI_IO_DEVICE *PciDev;
+ UINT64 Alignment;
+ UINT64 Offset;
+ UINT8 Bar;
+ PCI_BAR_TYPE ResType;
+ UINT64 Length;
+ BOOLEAN Reserved;
+ PCI_RESOURCE_USAGE ResourceUsage;
+ BOOLEAN Virtual;
} PCI_RESOURCE_NODE;
#define RESOURCE_NODE_FROM_LINK(a) \
@@ -43,8 +43,8 @@ typedef struct {
**/
VOID
SkipVGAAperture (
- OUT UINT64 *Start,
- IN UINT64 Length
+ OUT UINT64 *Start,
+ IN UINT64 Length
);
/**
@@ -56,8 +56,8 @@ SkipVGAAperture (
**/
VOID
SkipIsaAliasAperture (
- OUT UINT64 *Start,
- IN UINT64 Length
+ OUT UINT64 *Start,
+ IN UINT64 Length
);
/**
@@ -70,8 +70,8 @@ SkipIsaAliasAperture (
**/
VOID
InsertResourceNode (
- IN OUT PCI_RESOURCE_NODE *Bridge,
- IN PCI_RESOURCE_NODE *ResNode
+ IN OUT PCI_RESOURCE_NODE *Bridge,
+ IN PCI_RESOURCE_NODE *ResNode
);
/**
@@ -94,9 +94,9 @@ InsertResourceNode (
**/
VOID
MergeResourceTree (
- IN PCI_RESOURCE_NODE *Dst,
- IN PCI_RESOURCE_NODE *Res,
- IN BOOLEAN TypeMerge
+ IN PCI_RESOURCE_NODE *Dst,
+ IN PCI_RESOURCE_NODE *Res,
+ IN BOOLEAN TypeMerge
);
/**
@@ -108,7 +108,7 @@ MergeResourceTree (
**/
VOID
CalculateApertureIo16 (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
);
/**
@@ -120,7 +120,7 @@ CalculateApertureIo16 (
**/
VOID
CalculateResourceAperture (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
);
/**
@@ -136,12 +136,12 @@ CalculateResourceAperture (
**/
VOID
GetResourceFromDevice (
- IN PCI_IO_DEVICE *PciDev,
- IN OUT PCI_RESOURCE_NODE *IoNode,
- IN OUT PCI_RESOURCE_NODE *Mem32Node,
- IN OUT PCI_RESOURCE_NODE *PMem32Node,
- IN OUT PCI_RESOURCE_NODE *Mem64Node,
- IN OUT PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN OUT PCI_RESOURCE_NODE *IoNode,
+ IN OUT PCI_RESOURCE_NODE *Mem32Node,
+ IN OUT PCI_RESOURCE_NODE *PMem32Node,
+ IN OUT PCI_RESOURCE_NODE *Mem64Node,
+ IN OUT PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -160,12 +160,12 @@ GetResourceFromDevice (
**/
PCI_RESOURCE_NODE *
CreateResourceNode (
- IN PCI_IO_DEVICE *PciDev,
- IN UINT64 Length,
- IN UINT64 Alignment,
- IN UINT8 Bar,
- IN PCI_BAR_TYPE ResType,
- IN PCI_RESOURCE_USAGE ResUsage
+ IN PCI_IO_DEVICE *PciDev,
+ IN UINT64 Length,
+ IN UINT64 Alignment,
+ IN UINT8 Bar,
+ IN PCI_BAR_TYPE ResType,
+ IN PCI_RESOURCE_USAGE ResUsage
);
/**
@@ -184,12 +184,12 @@ CreateResourceNode (
**/
PCI_RESOURCE_NODE *
CreateVfResourceNode (
- IN PCI_IO_DEVICE *PciDev,
- IN UINT64 Length,
- IN UINT64 Alignment,
- IN UINT8 Bar,
- IN PCI_BAR_TYPE ResType,
- IN PCI_RESOURCE_USAGE ResUsage
+ IN PCI_IO_DEVICE *PciDev,
+ IN UINT64 Length,
+ IN UINT64 Alignment,
+ IN UINT8 Bar,
+ IN PCI_BAR_TYPE ResType,
+ IN PCI_RESOURCE_USAGE ResUsage
);
/**
@@ -206,12 +206,12 @@ CreateVfResourceNode (
**/
VOID
CreateResourceMap (
- IN PCI_IO_DEVICE *Bridge,
- IN OUT PCI_RESOURCE_NODE *IoNode,
- IN OUT PCI_RESOURCE_NODE *Mem32Node,
- IN OUT PCI_RESOURCE_NODE *PMem32Node,
- IN OUT PCI_RESOURCE_NODE *Mem64Node,
- IN OUT PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *Bridge,
+ IN OUT PCI_RESOURCE_NODE *IoNode,
+ IN OUT PCI_RESOURCE_NODE *Mem32Node,
+ IN OUT PCI_RESOURCE_NODE *PMem32Node,
+ IN OUT PCI_RESOURCE_NODE *Mem64Node,
+ IN OUT PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -227,12 +227,12 @@ CreateResourceMap (
**/
VOID
ResourcePaddingPolicy (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -251,11 +251,11 @@ ResourcePaddingPolicy (
**/
VOID
DegradeResource (
- IN PCI_IO_DEVICE *Bridge,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *Bridge,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -270,8 +270,8 @@ DegradeResource (
**/
BOOLEAN
BridgeSupportResourceDecode (
- IN PCI_IO_DEVICE *Bridge,
- IN UINT32 Decode
+ IN PCI_IO_DEVICE *Bridge,
+ IN UINT32 Decode
);
/**
@@ -288,8 +288,8 @@ BridgeSupportResourceDecode (
**/
EFI_STATUS
ProgramResource (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Bridge
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Bridge
);
/**
@@ -301,8 +301,8 @@ ProgramResource (
**/
VOID
ProgramBar (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
);
/**
@@ -314,8 +314,8 @@ ProgramBar (
**/
EFI_STATUS
ProgramVfBar (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
);
/**
@@ -327,8 +327,8 @@ ProgramVfBar (
**/
VOID
ProgramPpbApperture (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
);
/**
@@ -341,9 +341,9 @@ ProgramPpbApperture (
**/
VOID
ProgramUpstreamBridgeForRom (
- IN PCI_IO_DEVICE *PciDevice,
- IN UINT32 OptionRomBase,
- IN BOOLEAN Enable
+ IN PCI_IO_DEVICE *PciDevice,
+ IN UINT32 OptionRomBase,
+ IN BOOLEAN Enable
);
/**
@@ -357,7 +357,7 @@ ProgramUpstreamBridgeForRom (
**/
BOOLEAN
ResourceRequestExisted (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
);
/**
@@ -370,8 +370,8 @@ ResourceRequestExisted (
**/
VOID
InitializeResourcePool (
- IN OUT PCI_RESOURCE_NODE *ResourcePool,
- IN PCI_BAR_TYPE ResourceType
+ IN OUT PCI_RESOURCE_NODE *ResourcePool,
+ IN PCI_BAR_TYPE ResourceType
);
/**
@@ -382,7 +382,7 @@ InitializeResourcePool (
**/
VOID
DestroyResourceTree (
- IN PCI_RESOURCE_NODE *Bridge
+ IN PCI_RESOURCE_NODE *Bridge
);
/**
@@ -398,12 +398,12 @@ DestroyResourceTree (
**/
VOID
ResourcePaddingForCardBusBridge (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -415,8 +415,8 @@ ResourcePaddingForCardBusBridge (
**/
VOID
ProgramP2C (
- IN UINT64 Base,
- IN PCI_RESOURCE_NODE *Node
+ IN UINT64 Base,
+ IN PCI_RESOURCE_NODE *Node
);
/**
@@ -432,12 +432,12 @@ ProgramP2C (
**/
VOID
ApplyResourcePadding (
- IN PCI_IO_DEVICE *PciDev,
- IN PCI_RESOURCE_NODE *IoNode,
- IN PCI_RESOURCE_NODE *Mem32Node,
- IN PCI_RESOURCE_NODE *PMem32Node,
- IN PCI_RESOURCE_NODE *Mem64Node,
- IN PCI_RESOURCE_NODE *PMem64Node
+ IN PCI_IO_DEVICE *PciDev,
+ IN PCI_RESOURCE_NODE *IoNode,
+ IN PCI_RESOURCE_NODE *Mem32Node,
+ IN PCI_RESOURCE_NODE *PMem32Node,
+ IN PCI_RESOURCE_NODE *Mem64Node,
+ IN PCI_RESOURCE_NODE *PMem64Node
);
/**
@@ -450,7 +450,7 @@ ApplyResourcePadding (
**/
VOID
GetResourcePaddingPpb (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
index 5575a364a1..5535bd3013 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
@@ -12,18 +12,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// PCI ROM image information
//
typedef struct {
- EFI_HANDLE ImageHandle;
- UINTN Seg;
- UINT8 Bus;
- UINT8 Dev;
- UINT8 Func;
- VOID *RomImage;
- UINT64 RomSize;
+ EFI_HANDLE ImageHandle;
+ UINTN Seg;
+ UINT8 Bus;
+ UINT8 Dev;
+ UINT8 Func;
+ VOID *RomImage;
+ UINT64 RomSize;
} PCI_ROM_IMAGE;
-UINTN mNumberOfPciRomImages = 0;
-UINTN mMaxNumberOfPciRomImages = 0;
-PCI_ROM_IMAGE *mRomImageTable = NULL;
+UINTN mNumberOfPciRomImages = 0;
+UINTN mMaxNumberOfPciRomImages = 0;
+PCI_ROM_IMAGE *mRomImageTable = NULL;
/**
Add the Rom Image to internal database for later PCI light enumeration.
@@ -47,20 +47,21 @@ PciRomAddImageMapping (
IN UINT64 RomSize
)
{
- UINTN Index;
- PCI_ROM_IMAGE *NewTable;
+ UINTN Index;
+ PCI_ROM_IMAGE *NewTable;
for (Index = 0; Index < mNumberOfPciRomImages; Index++) {
- if (mRomImageTable[Index].Seg == Seg &&
- mRomImageTable[Index].Bus == Bus &&
- mRomImageTable[Index].Dev == Dev &&
- mRomImageTable[Index].Func == Func) {
+ if ((mRomImageTable[Index].Seg == Seg) &&
+ (mRomImageTable[Index].Bus == Bus) &&
+ (mRomImageTable[Index].Dev == Dev) &&
+ (mRomImageTable[Index].Func == Func))
+ {
//
// Expect once RomImage and RomSize are recorded, they will be passed in
// later when updating ImageHandle
//
ASSERT ((mRomImageTable[Index].RomImage == NULL) || (RomImage == mRomImageTable[Index].RomImage));
- ASSERT ((mRomImageTable[Index].RomSize == 0 ) || (RomSize == mRomImageTable[Index].RomSize ));
+ ASSERT ((mRomImageTable[Index].RomSize == 0) || (RomSize == mRomImageTable[Index].RomSize));
break;
}
}
@@ -76,12 +77,13 @@ PciRomAddImageMapping (
mRomImageTable
);
if (NewTable == NULL) {
- return ;
+ return;
}
mRomImageTable = NewTable;
mMaxNumberOfPciRomImages += 0x20;
}
+
//
// Record the new PCI device
//
@@ -108,23 +110,24 @@ PciRomAddImageMapping (
**/
BOOLEAN
PciRomGetImageMapping (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
)
{
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- UINTN Index;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINTN Index;
PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
for (Index = 0; Index < mNumberOfPciRomImages; Index++) {
- if (mRomImageTable[Index].Seg == PciRootBridgeIo->SegmentNumber &&
- mRomImageTable[Index].Bus == PciIoDevice->BusNumber &&
- mRomImageTable[Index].Dev == PciIoDevice->DeviceNumber &&
- mRomImageTable[Index].Func == PciIoDevice->FunctionNumber ) {
-
+ if ((mRomImageTable[Index].Seg == PciRootBridgeIo->SegmentNumber) &&
+ (mRomImageTable[Index].Bus == PciIoDevice->BusNumber) &&
+ (mRomImageTable[Index].Dev == PciIoDevice->DeviceNumber) &&
+ (mRomImageTable[Index].Func == PciIoDevice->FunctionNumber))
+ {
if (mRomImageTable[Index].ImageHandle != NULL) {
AddDriver (PciIoDevice, mRomImageTable[Index].ImageHandle, NULL);
}
+
PciIoDevice->PciIo.RomImage = mRomImageTable[Index].RomImage;
PciIoDevice->PciIo.RomSize = mRomImageTable[Index].RomSize;
return TRUE;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
index 4c2a4e1988..f90b13a2a9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
@@ -42,7 +42,7 @@ PciRomAddImageMapping (
**/
BOOLEAN
PciRomGetImageMapping (
- IN PCI_IO_DEVICE *PciIoDevice
+ IN PCI_IO_DEVICE *PciIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
index 5c8f0f46a1..b20bcd310a 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
@@ -11,18 +11,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PciRootBridge.h"
#include "PciHostResource.h"
-EFI_CPU_IO2_PROTOCOL *mCpuIo;
+EFI_CPU_IO2_PROTOCOL *mCpuIo;
-GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mAcpiAddressSpaceTypeStr[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mAcpiAddressSpaceTypeStr[] = {
L"Mem", L"I/O", L"Bus"
};
-GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciResourceTypeStr[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciResourceTypeStr[] = {
L"I/O", L"Mem", L"PMem", L"Mem64", L"PMem64", L"Bus"
};
-EDKII_IOMMU_PROTOCOL *mIoMmu;
-EFI_EVENT mIoMmuEvent;
-VOID *mIoMmuRegistration;
+EDKII_IOMMU_PROTOCOL *mIoMmu;
+EFI_EVENT mIoMmuEvent;
+VOID *mIoMmuRegistration;
/**
This routine gets translation offset from a root bridge instance by resource type.
@@ -34,8 +34,8 @@ VOID *mIoMmuRegistration;
**/
UINT64
GetTranslationByResourceType (
- IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
- IN PCI_RESOURCE_TYPE ResourceType
+ IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
+ IN PCI_RESOURCE_TYPE ResourceType
)
{
switch (ResourceType) {
@@ -92,22 +92,24 @@ GetTranslationByResourceType (
**/
EFI_STATUS
IntersectIoDescriptor (
- IN UINT64 Base,
- IN UINT64 Length,
- IN CONST EFI_GCD_IO_SPACE_DESCRIPTOR *Descriptor
+ IN UINT64 Base,
+ IN UINT64 Length,
+ IN CONST EFI_GCD_IO_SPACE_DESCRIPTOR *Descriptor
)
{
- UINT64 IntersectionBase;
- UINT64 IntersectionEnd;
- EFI_STATUS Status;
+ UINT64 IntersectionBase;
+ UINT64 IntersectionEnd;
+ EFI_STATUS Status;
if (Descriptor->GcdIoType == EfiGcdIoTypeIo) {
return EFI_SUCCESS;
}
IntersectionBase = MAX (Base, Descriptor->BaseAddress);
- IntersectionEnd = MIN (Base + Length,
- Descriptor->BaseAddress + Descriptor->Length);
+ IntersectionEnd = MIN (
+ Base + Length,
+ Descriptor->BaseAddress + Descriptor->Length
+ );
if (IntersectionBase >= IntersectionEnd) {
//
// The descriptor and the aperture don't overlap.
@@ -116,19 +118,36 @@ IntersectIoDescriptor (
}
if (Descriptor->GcdIoType == EfiGcdIoTypeNonExistent) {
- Status = gDS->AddIoSpace (EfiGcdIoTypeIo, IntersectionBase,
- IntersectionEnd - IntersectionBase);
+ Status = gDS->AddIoSpace (
+ EfiGcdIoTypeIo,
+ IntersectionBase,
+ IntersectionEnd - IntersectionBase
+ );
- DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
- "%a: %a: add [%Lx, %Lx): %r\n", gEfiCallerBaseName, __FUNCTION__,
- IntersectionBase, IntersectionEnd, Status));
+ DEBUG ((
+ EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
+ "%a: %a: add [%Lx, %Lx): %r\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ IntersectionBase,
+ IntersectionEnd,
+ Status
+ ));
return Status;
}
- DEBUG ((DEBUG_ERROR, "%a: %a: desc [%Lx, %Lx) type %u conflicts with "
- "aperture [%Lx, %Lx)\n", gEfiCallerBaseName, __FUNCTION__,
- Descriptor->BaseAddress, Descriptor->BaseAddress + Descriptor->Length,
- (UINT32)Descriptor->GcdIoType, Base, Base + Length));
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: %a: desc [%Lx, %Lx) type %u conflicts with "
+ "aperture [%Lx, %Lx)\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ Descriptor->BaseAddress,
+ Descriptor->BaseAddress + Descriptor->Length,
+ (UINT32)Descriptor->GcdIoType,
+ Base,
+ Base + Length
+ ));
return EFI_INVALID_PARAMETER;
}
@@ -144,19 +163,24 @@ IntersectIoDescriptor (
**/
EFI_STATUS
AddIoSpace (
- IN UINT64 Base,
- IN UINT64 Length
+ IN UINT64 Base,
+ IN UINT64 Length
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN NumberOfDescriptors;
- EFI_GCD_IO_SPACE_DESCRIPTOR *IoSpaceMap;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN NumberOfDescriptors;
+ EFI_GCD_IO_SPACE_DESCRIPTOR *IoSpaceMap;
Status = gDS->GetIoSpaceMap (&NumberOfDescriptors, &IoSpaceMap);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a: %a: GetIoSpaceMap(): %r\n",
- gEfiCallerBaseName, __FUNCTION__, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: %a: GetIoSpaceMap(): %r\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ Status
+ ));
return Status;
}
@@ -167,24 +191,26 @@ AddIoSpace (
}
}
- DEBUG_CODE_BEGIN ();
- //
- // Make sure there are adjacent descriptors covering [Base, Base + Length).
- // It is possible that they have not been merged; merging can be prevented
- // by allocation.
- //
- UINT64 CheckBase;
- EFI_STATUS CheckStatus;
- EFI_GCD_IO_SPACE_DESCRIPTOR Descriptor;
-
- for (CheckBase = Base;
- CheckBase < Base + Length;
- CheckBase = Descriptor.BaseAddress + Descriptor.Length) {
- CheckStatus = gDS->GetIoSpaceDescriptor (CheckBase, &Descriptor);
- ASSERT_EFI_ERROR (CheckStatus);
- ASSERT (Descriptor.GcdIoType == EfiGcdIoTypeIo);
- }
- DEBUG_CODE_END ();
+ DEBUG_CODE_BEGIN ();
+ //
+ // Make sure there are adjacent descriptors covering [Base, Base + Length).
+ // It is possible that they have not been merged; merging can be prevented
+ // by allocation.
+ //
+ UINT64 CheckBase;
+ EFI_STATUS CheckStatus;
+ EFI_GCD_IO_SPACE_DESCRIPTOR Descriptor;
+
+ for (CheckBase = Base;
+ CheckBase < Base + Length;
+ CheckBase = Descriptor.BaseAddress + Descriptor.Length)
+ {
+ CheckStatus = gDS->GetIoSpaceDescriptor (CheckBase, &Descriptor);
+ ASSERT_EFI_ERROR (CheckStatus);
+ ASSERT (Descriptor.GcdIoType == EfiGcdIoTypeIo);
+ }
+
+ DEBUG_CODE_END ();
FreeIoSpaceMap:
FreePool (IoSpaceMap);
@@ -233,24 +259,27 @@ FreeIoSpaceMap:
**/
EFI_STATUS
IntersectMemoryDescriptor (
- IN UINT64 Base,
- IN UINT64 Length,
- IN UINT64 Capabilities,
- IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor
+ IN UINT64 Base,
+ IN UINT64 Length,
+ IN UINT64 Capabilities,
+ IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor
)
{
- UINT64 IntersectionBase;
- UINT64 IntersectionEnd;
- EFI_STATUS Status;
+ UINT64 IntersectionBase;
+ UINT64 IntersectionEnd;
+ EFI_STATUS Status;
- if (Descriptor->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo &&
- (Descriptor->Capabilities & Capabilities) == Capabilities) {
+ if ((Descriptor->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) &&
+ ((Descriptor->Capabilities & Capabilities) == Capabilities))
+ {
return EFI_SUCCESS;
}
IntersectionBase = MAX (Base, Descriptor->BaseAddress);
- IntersectionEnd = MIN (Base + Length,
- Descriptor->BaseAddress + Descriptor->Length);
+ IntersectionEnd = MIN (
+ Base + Length,
+ Descriptor->BaseAddress + Descriptor->Length
+ );
if (IntersectionBase >= IntersectionEnd) {
//
// The descriptor and the aperture don't overlap.
@@ -259,21 +288,39 @@ IntersectMemoryDescriptor (
}
if (Descriptor->GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
- Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo,
- IntersectionBase, IntersectionEnd - IntersectionBase,
- Capabilities);
+ Status = gDS->AddMemorySpace (
+ EfiGcdMemoryTypeMemoryMappedIo,
+ IntersectionBase,
+ IntersectionEnd - IntersectionBase,
+ Capabilities
+ );
- DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
- "%a: %a: add [%Lx, %Lx): %r\n", gEfiCallerBaseName, __FUNCTION__,
- IntersectionBase, IntersectionEnd, Status));
+ DEBUG ((
+ EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
+ "%a: %a: add [%Lx, %Lx): %r\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ IntersectionBase,
+ IntersectionEnd,
+ Status
+ ));
return Status;
}
- DEBUG ((DEBUG_ERROR, "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
- "with aperture [%Lx, %Lx) cap %Lx\n", gEfiCallerBaseName, __FUNCTION__,
- Descriptor->BaseAddress, Descriptor->BaseAddress + Descriptor->Length,
- (UINT32)Descriptor->GcdMemoryType, Descriptor->Capabilities,
- Base, Base + Length, Capabilities));
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
+ "with aperture [%Lx, %Lx) cap %Lx\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ Descriptor->BaseAddress,
+ Descriptor->BaseAddress + Descriptor->Length,
+ (UINT32)Descriptor->GcdMemoryType,
+ Descriptor->Capabilities,
+ Base,
+ Base + Length,
+ Capabilities
+ ));
return EFI_INVALID_PARAMETER;
}
@@ -290,49 +337,60 @@ IntersectMemoryDescriptor (
**/
EFI_STATUS
AddMemoryMappedIoSpace (
- IN UINT64 Base,
- IN UINT64 Length,
- IN UINT64 Capabilities
+ IN UINT64 Base,
+ IN UINT64 Length,
+ IN UINT64 Capabilities
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN NumberOfDescriptors;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN NumberOfDescriptors;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a: %a: GetMemorySpaceMap(): %r\n",
- gEfiCallerBaseName, __FUNCTION__, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: %a: GetMemorySpaceMap(): %r\n",
+ gEfiCallerBaseName,
+ __FUNCTION__,
+ Status
+ ));
return Status;
}
for (Index = 0; Index < NumberOfDescriptors; Index++) {
- Status = IntersectMemoryDescriptor (Base, Length, Capabilities,
- &MemorySpaceMap[Index]);
+ Status = IntersectMemoryDescriptor (
+ Base,
+ Length,
+ Capabilities,
+ &MemorySpaceMap[Index]
+ );
if (EFI_ERROR (Status)) {
goto FreeMemorySpaceMap;
}
}
DEBUG_CODE_BEGIN ();
- //
- // Make sure there are adjacent descriptors covering [Base, Base + Length).
- // It is possible that they have not been merged; merging can be prevented
- // by allocation and different capabilities.
- //
- UINT64 CheckBase;
- EFI_STATUS CheckStatus;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
-
- for (CheckBase = Base;
- CheckBase < Base + Length;
- CheckBase = Descriptor.BaseAddress + Descriptor.Length) {
- CheckStatus = gDS->GetMemorySpaceDescriptor (CheckBase, &Descriptor);
- ASSERT_EFI_ERROR (CheckStatus);
- ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);
- ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);
- }
+ //
+ // Make sure there are adjacent descriptors covering [Base, Base + Length).
+ // It is possible that they have not been merged; merging can be prevented
+ // by allocation and different capabilities.
+ //
+ UINT64 CheckBase;
+ EFI_STATUS CheckStatus;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
+
+ for (CheckBase = Base;
+ CheckBase < Base + Length;
+ CheckBase = Descriptor.BaseAddress + Descriptor.Length)
+ {
+ CheckStatus = gDS->GetMemorySpaceDescriptor (CheckBase, &Descriptor);
+ ASSERT_EFI_ERROR (CheckStatus);
+ ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);
+ ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);
+ }
+
DEBUG_CODE_END ();
FreeMemorySpaceMap:
@@ -351,14 +409,14 @@ FreeMemorySpaceMap:
VOID
EFIAPI
IoMmuProtocolCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmu);
- if (!EFI_ERROR(Status)) {
+ if (!EFI_ERROR (Status)) {
gBS->CloseEvent (mIoMmuEvent);
}
}
@@ -377,28 +435,28 @@ IoMmuProtocolCallback (
EFI_STATUS
EFIAPI
InitializePciHostBridge (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- PCI_ROOT_BRIDGE *RootBridges;
- UINTN RootBridgeCount;
- UINTN Index;
- PCI_ROOT_BRIDGE_APERTURE *MemApertures[4];
- UINTN MemApertureIndex;
- BOOLEAN ResourceAssigned;
- LIST_ENTRY *Link;
- UINT64 HostAddress;
+ EFI_STATUS Status;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ PCI_ROOT_BRIDGE *RootBridges;
+ UINTN RootBridgeCount;
+ UINTN Index;
+ PCI_ROOT_BRIDGE_APERTURE *MemApertures[4];
+ UINTN MemApertureIndex;
+ BOOLEAN ResourceAssigned;
+ LIST_ENTRY *Link;
+ UINT64 HostAddress;
RootBridges = PciHostBridgeGetRootBridges (&RootBridgeCount);
if ((RootBridges == NULL) || (RootBridgeCount == 0)) {
return EFI_UNSUPPORTED;
}
- Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo);
+ Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **)&mCpuIo);
ASSERT_EFI_ERROR (Status);
//
@@ -407,10 +465,10 @@ InitializePciHostBridge (
HostBridge = AllocateZeroPool (sizeof (PCI_HOST_BRIDGE_INSTANCE));
ASSERT (HostBridge != NULL);
- HostBridge->Signature = PCI_HOST_BRIDGE_SIGNATURE;
- HostBridge->CanRestarted = TRUE;
+ HostBridge->Signature = PCI_HOST_BRIDGE_SIGNATURE;
+ HostBridge->CanRestarted = TRUE;
InitializeListHead (&HostBridge->RootBridges);
- ResourceAssigned = FALSE;
+ ResourceAssigned = FALSE;
//
// Create Root Bridge Device Handle in this Host Bridge
@@ -439,8 +497,10 @@ InitializePciHostBridge (
// Base and Limit in PCI_ROOT_BRIDGE_APERTURE are device address.
// For GCD resource manipulation, we need to use host address.
//
- HostAddress = TO_HOST_ADDRESS (RootBridges[Index].Io.Base,
- RootBridges[Index].Io.Translation);
+ HostAddress = TO_HOST_ADDRESS (
+ RootBridges[Index].Io.Base,
+ RootBridges[Index].Io.Translation
+ );
Status = AddIoSpace (
HostAddress,
@@ -478,8 +538,10 @@ InitializePciHostBridge (
// Base and Limit in PCI_ROOT_BRIDGE_APERTURE are device address.
// For GCD resource manipulation, we need to use host address.
//
- HostAddress = TO_HOST_ADDRESS (MemApertures[MemApertureIndex]->Base,
- MemApertures[MemApertureIndex]->Translation);
+ HostAddress = TO_HOST_ADDRESS (
+ MemApertures[MemApertureIndex]->Base,
+ MemApertures[MemApertureIndex]->Translation
+ );
Status = AddMemoryMappedIoSpace (
HostAddress,
MemApertures[MemApertureIndex]->Limit - MemApertures[MemApertureIndex]->Base + 1,
@@ -494,6 +556,7 @@ InitializePciHostBridge (
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "PciHostBridge driver failed to set EFI_MEMORY_UC to MMIO aperture - %r.\n", Status));
}
+
if (ResourceAssigned) {
Status = gDS->AllocateMemorySpace (
EfiGcdAllocateAddress,
@@ -508,6 +571,7 @@ InitializePciHostBridge (
}
}
}
+
//
// Insert Root Bridge Handle Instance
//
@@ -519,18 +583,19 @@ InitializePciHostBridge (
// PciHostBridgeResourceAllocation protocol.
//
if (!ResourceAssigned) {
- HostBridge->ResAlloc.NotifyPhase = NotifyPhase;
- HostBridge->ResAlloc.GetNextRootBridge = GetNextRootBridge;
- HostBridge->ResAlloc.GetAllocAttributes = GetAttributes;
- HostBridge->ResAlloc.StartBusEnumeration = StartBusEnumeration;
- HostBridge->ResAlloc.SetBusNumbers = SetBusNumbers;
- HostBridge->ResAlloc.SubmitResources = SubmitResources;
+ HostBridge->ResAlloc.NotifyPhase = NotifyPhase;
+ HostBridge->ResAlloc.GetNextRootBridge = GetNextRootBridge;
+ HostBridge->ResAlloc.GetAllocAttributes = GetAttributes;
+ HostBridge->ResAlloc.StartBusEnumeration = StartBusEnumeration;
+ HostBridge->ResAlloc.SetBusNumbers = SetBusNumbers;
+ HostBridge->ResAlloc.SubmitResources = SubmitResources;
HostBridge->ResAlloc.GetProposedResources = GetProposedResources;
HostBridge->ResAlloc.PreprocessController = PreprocessController;
Status = gBS->InstallMultipleProtocolInterfaces (
&HostBridge->Handle,
- &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
+ &gEfiPciHostBridgeResourceAllocationProtocolGuid,
+ &HostBridge->ResAlloc,
NULL
);
ASSERT_EFI_ERROR (Status);
@@ -539,18 +604,22 @@ InitializePciHostBridge (
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
RootBridge->RootBridgeIo.ParentHandle = HostBridge->Handle;
Status = gBS->InstallMultipleProtocolInterfaces (
&RootBridge->Handle,
- &gEfiDevicePathProtocolGuid, RootBridge->DevicePath,
- &gEfiPciRootBridgeIoProtocolGuid, &RootBridge->RootBridgeIo,
+ &gEfiDevicePathProtocolGuid,
+ RootBridge->DevicePath,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ &RootBridge->RootBridgeIo,
NULL
);
ASSERT_EFI_ERROR (Status);
}
+
PciHostBridgeFreeRootBridges (RootBridges, RootBridgeCount);
if (!EFI_ERROR (Status)) {
@@ -573,23 +642,24 @@ InitializePciHostBridge (
**/
VOID
ResourceConflict (
- IN PCI_HOST_BRIDGE_INSTANCE *HostBridge
+ IN PCI_HOST_BRIDGE_INSTANCE *HostBridge
)
{
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- LIST_ENTRY *Link;
- UINTN RootBridgeCount;
- PCI_RESOURCE_TYPE Index;
- PCI_RES_NODE *ResAllocNode;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ LIST_ENTRY *Link;
+ UINTN RootBridgeCount;
+ PCI_RESOURCE_TYPE Index;
+ PCI_RES_NODE *ResAllocNode;
RootBridgeCount = 0;
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridgeCount++;
}
@@ -602,61 +672,63 @@ ResourceConflict (
for (Link = GetFirstNode (&HostBridge->RootBridges), Descriptor = Resources
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
for (Index = TypeIo; Index < TypeMax; Index++) {
ResAllocNode = &RootBridge->ResAllocNode[Index];
- Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Descriptor->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
+ Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Descriptor->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
Descriptor->AddrRangeMin = ResAllocNode->Base;
Descriptor->AddrRangeMax = ResAllocNode->Alignment;
Descriptor->AddrLen = ResAllocNode->Length;
Descriptor->SpecificFlag = 0;
switch (ResAllocNode->Type) {
+ case TypeIo:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ break;
+
+ case TypePMem32:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem32:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 32;
+ break;
+
+ case TypePMem64:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem64:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 64;
+ break;
+
+ case TypeBus:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
+ break;
- case TypeIo:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- break;
-
- case TypePMem32:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem32:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 32;
- break;
-
- case TypePMem64:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem64:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 64;
- break;
-
- case TypeBus:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
- break;
-
- default:
- break;
+ default:
+ break;
}
Descriptor++;
}
+
//
// Terminate the root bridge resources.
//
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) Descriptor;
- End->Desc = ACPI_END_TAG_DESCRIPTOR;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor;
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0x0;
- Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) (End + 1);
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(End + 1);
}
+
//
// Terminate the host bridge resources.
//
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) Descriptor;
- End->Desc = ACPI_END_TAG_DESCRIPTOR;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor;
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0x0;
DEBUG ((DEBUG_ERROR, "Call PciHostBridgeResourceConflict().\n"));
@@ -679,14 +751,14 @@ ResourceConflict (
**/
UINT64
AllocateResource (
- BOOLEAN Mmio,
- UINT64 Length,
- UINTN BitsOfAlignment,
- UINT64 BaseAddress,
- UINT64 Limit
+ BOOLEAN Mmio,
+ UINT64 Length,
+ UINTN BitsOfAlignment,
+ UINT64 BaseAddress,
+ UINT64 Limit
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (BaseAddress < Limit) {
//
@@ -725,9 +797,11 @@ AllocateResource (
if (!EFI_ERROR (Status)) {
return BaseAddress;
}
+
BaseAddress += LShiftU64 (1, BitsOfAlignment);
}
}
+
return MAX_UINT64;
}
@@ -746,331 +820,374 @@ AllocateResource (
EFI_STATUS
EFIAPI
NotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
)
{
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- LIST_ENTRY *Link;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINTN BitsOfAlignment;
- UINT64 Alignment;
- EFI_STATUS Status;
- EFI_STATUS ReturnStatus;
- PCI_RESOURCE_TYPE Index;
- PCI_RESOURCE_TYPE Index1;
- PCI_RESOURCE_TYPE Index2;
- BOOLEAN ResNodeHandled[TypeMax];
- UINT64 MaxAlignment;
- UINT64 Translation;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ LIST_ENTRY *Link;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINTN BitsOfAlignment;
+ UINT64 Alignment;
+ EFI_STATUS Status;
+ EFI_STATUS ReturnStatus;
+ PCI_RESOURCE_TYPE Index;
+ PCI_RESOURCE_TYPE Index1;
+ PCI_RESOURCE_TYPE Index2;
+ BOOLEAN ResNodeHandled[TypeMax];
+ UINT64 MaxAlignment;
+ UINT64 Translation;
HostBridge = PCI_HOST_BRIDGE_FROM_THIS (This);
switch (Phase) {
- case EfiPciHostBridgeBeginEnumeration:
- if (!HostBridge->CanRestarted) {
- return EFI_NOT_READY;
- }
- //
- // Reset Root Bridge
- //
- for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
- for (Index = TypeIo; Index < TypeMax; Index++) {
- RootBridge->ResAllocNode[Index].Type = Index;
- RootBridge->ResAllocNode[Index].Base = 0;
- RootBridge->ResAllocNode[Index].Length = 0;
- RootBridge->ResAllocNode[Index].Status = ResNone;
-
- RootBridge->ResourceSubmitted = FALSE;
+ case EfiPciHostBridgeBeginEnumeration:
+ if (!HostBridge->CanRestarted) {
+ return EFI_NOT_READY;
}
- }
- HostBridge->CanRestarted = TRUE;
- break;
+ //
+ // Reset Root Bridge
+ //
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ for (Index = TypeIo; Index < TypeMax; Index++) {
+ RootBridge->ResAllocNode[Index].Type = Index;
+ RootBridge->ResAllocNode[Index].Base = 0;
+ RootBridge->ResAllocNode[Index].Length = 0;
+ RootBridge->ResAllocNode[Index].Status = ResNone;
+
+ RootBridge->ResourceSubmitted = FALSE;
+ }
+ }
- case EfiPciHostBridgeBeginBusAllocation:
- //
- // No specific action is required here, can perform any chipset specific programing
- //
- HostBridge->CanRestarted = FALSE;
- break;
+ HostBridge->CanRestarted = TRUE;
+ break;
- case EfiPciHostBridgeEndBusAllocation:
- //
- // No specific action is required here, can perform any chipset specific programing
- //
- break;
+ case EfiPciHostBridgeBeginBusAllocation:
+ //
+ // No specific action is required here, can perform any chipset specific programing
+ //
+ HostBridge->CanRestarted = FALSE;
+ break;
- case EfiPciHostBridgeBeginResourceAllocation:
- //
- // No specific action is required here, can perform any chipset specific programing
- //
- break;
+ case EfiPciHostBridgeEndBusAllocation:
+ //
+ // No specific action is required here, can perform any chipset specific programing
+ //
+ break;
- case EfiPciHostBridgeAllocateResources:
- ReturnStatus = EFI_SUCCESS;
+ case EfiPciHostBridgeBeginResourceAllocation:
+ //
+ // No specific action is required here, can perform any chipset specific programing
+ //
+ break;
- //
- // Make sure the resource for all root bridges has been submitted.
- //
- for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
- if (!RootBridge->ResourceSubmitted) {
- return EFI_NOT_READY;
- }
- }
+ case EfiPciHostBridgeAllocateResources:
+ ReturnStatus = EFI_SUCCESS;
- DEBUG ((DEBUG_INFO, "PciHostBridge: NotifyPhase (AllocateResources)\n"));
- for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- for (Index = TypeIo; Index < TypeBus; Index++) {
- ResNodeHandled[Index] = FALSE;
+ //
+ // Make sure the resource for all root bridges has been submitted.
+ //
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ if (!RootBridge->ResourceSubmitted) {
+ return EFI_NOT_READY;
+ }
}
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
- DEBUG ((DEBUG_INFO, " RootBridge: %s\n", RootBridge->DevicePathStr));
-
- for (Index1 = TypeIo; Index1 < TypeBus; Index1++) {
- if (RootBridge->ResAllocNode[Index1].Status == ResNone) {
- ResNodeHandled[Index1] = TRUE;
- } else {
- //
- // Allocate the resource node with max alignment at first
- //
- MaxAlignment = 0;
- Index = TypeMax;
- for (Index2 = TypeIo; Index2 < TypeBus; Index2++) {
- if (ResNodeHandled[Index2]) {
- continue;
- }
- if (MaxAlignment <= RootBridge->ResAllocNode[Index2].Alignment) {
- MaxAlignment = RootBridge->ResAllocNode[Index2].Alignment;
- Index = Index2;
- }
- }
+ DEBUG ((DEBUG_INFO, "PciHostBridge: NotifyPhase (AllocateResources)\n"));
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ for (Index = TypeIo; Index < TypeBus; Index++) {
+ ResNodeHandled[Index] = FALSE;
+ }
- ASSERT (Index < TypeMax);
- ResNodeHandled[Index] = TRUE;
- Alignment = RootBridge->ResAllocNode[Index].Alignment;
- BitsOfAlignment = LowBitSet64 (Alignment + 1);
- BaseAddress = MAX_UINT64;
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ DEBUG ((DEBUG_INFO, " RootBridge: %s\n", RootBridge->DevicePathStr));
- //
- // RESTRICTION: To simplify the situation, we require the alignment of
- // Translation must be larger than any BAR alignment in the same root
- // bridge, so that resource allocation alignment can be applied to
- // both device address and host address.
- //
- Translation = GetTranslationByResourceType (RootBridge, Index);
- if ((Translation & Alignment) != 0) {
- DEBUG ((DEBUG_ERROR, "[%a:%d] Translation %lx is not aligned to %lx!\n",
- __FUNCTION__, DEBUG_LINE_NUMBER, Translation, Alignment
- ));
- ASSERT ((Translation & Alignment) == 0);
+ for (Index1 = TypeIo; Index1 < TypeBus; Index1++) {
+ if (RootBridge->ResAllocNode[Index1].Status == ResNone) {
+ ResNodeHandled[Index1] = TRUE;
+ } else {
//
- // This may be caused by too large alignment or too small
- // Translation; pick the 1st possibility and return out of resource,
- // which can also go thru the same process for out of resource
- // outside the loop.
+ // Allocate the resource node with max alignment at first
//
- ReturnStatus = EFI_OUT_OF_RESOURCES;
- continue;
- }
+ MaxAlignment = 0;
+ Index = TypeMax;
+ for (Index2 = TypeIo; Index2 < TypeBus; Index2++) {
+ if (ResNodeHandled[Index2]) {
+ continue;
+ }
+
+ if (MaxAlignment <= RootBridge->ResAllocNode[Index2].Alignment) {
+ MaxAlignment = RootBridge->ResAllocNode[Index2].Alignment;
+ Index = Index2;
+ }
+ }
- switch (Index) {
- case TypeIo:
- //
- // Base and Limit in PCI_ROOT_BRIDGE_APERTURE are device address.
- // For AllocateResource is manipulating GCD resource, we need to use
- // host address here.
- //
- BaseAddress = AllocateResource (
- FALSE,
- RootBridge->ResAllocNode[Index].Length,
- MIN (15, BitsOfAlignment),
- TO_HOST_ADDRESS (ALIGN_VALUE (RootBridge->Io.Base, Alignment + 1),
- RootBridge->Io.Translation),
- TO_HOST_ADDRESS (RootBridge->Io.Limit,
- RootBridge->Io.Translation)
- );
- break;
+ ASSERT (Index < TypeMax);
+ ResNodeHandled[Index] = TRUE;
+ Alignment = RootBridge->ResAllocNode[Index].Alignment;
+ BitsOfAlignment = LowBitSet64 (Alignment + 1);
+ BaseAddress = MAX_UINT64;
- case TypeMem64:
- BaseAddress = AllocateResource (
- TRUE,
- RootBridge->ResAllocNode[Index].Length,
- MIN (63, BitsOfAlignment),
- TO_HOST_ADDRESS (ALIGN_VALUE (RootBridge->MemAbove4G.Base, Alignment + 1),
- RootBridge->MemAbove4G.Translation),
- TO_HOST_ADDRESS (RootBridge->MemAbove4G.Limit,
- RootBridge->MemAbove4G.Translation)
- );
- if (BaseAddress != MAX_UINT64) {
- break;
- }
//
- // If memory above 4GB is not available, try memory below 4GB
+ // RESTRICTION: To simplify the situation, we require the alignment of
+ // Translation must be larger than any BAR alignment in the same root
+ // bridge, so that resource allocation alignment can be applied to
+ // both device address and host address.
//
+ Translation = GetTranslationByResourceType (RootBridge, Index);
+ if ((Translation & Alignment) != 0) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a:%d] Translation %lx is not aligned to %lx!\n",
+ __FUNCTION__,
+ DEBUG_LINE_NUMBER,
+ Translation,
+ Alignment
+ ));
+ ASSERT ((Translation & Alignment) == 0);
+ //
+ // This may be caused by too large alignment or too small
+ // Translation; pick the 1st possibility and return out of resource,
+ // which can also go thru the same process for out of resource
+ // outside the loop.
+ //
+ ReturnStatus = EFI_OUT_OF_RESOURCES;
+ continue;
+ }
- case TypeMem32:
- BaseAddress = AllocateResource (
- TRUE,
- RootBridge->ResAllocNode[Index].Length,
- MIN (31, BitsOfAlignment),
- TO_HOST_ADDRESS (ALIGN_VALUE (RootBridge->Mem.Base, Alignment + 1),
- RootBridge->Mem.Translation),
- TO_HOST_ADDRESS (RootBridge->Mem.Limit,
- RootBridge->Mem.Translation)
- );
- break;
+ switch (Index) {
+ case TypeIo:
+ //
+ // Base and Limit in PCI_ROOT_BRIDGE_APERTURE are device address.
+ // For AllocateResource is manipulating GCD resource, we need to use
+ // host address here.
+ //
+ BaseAddress = AllocateResource (
+ FALSE,
+ RootBridge->ResAllocNode[Index].Length,
+ MIN (15, BitsOfAlignment),
+ TO_HOST_ADDRESS (
+ ALIGN_VALUE (RootBridge->Io.Base, Alignment + 1),
+ RootBridge->Io.Translation
+ ),
+ TO_HOST_ADDRESS (
+ RootBridge->Io.Limit,
+ RootBridge->Io.Translation
+ )
+ );
+ break;
+
+ case TypeMem64:
+ BaseAddress = AllocateResource (
+ TRUE,
+ RootBridge->ResAllocNode[Index].Length,
+ MIN (63, BitsOfAlignment),
+ TO_HOST_ADDRESS (
+ ALIGN_VALUE (RootBridge->MemAbove4G.Base, Alignment + 1),
+ RootBridge->MemAbove4G.Translation
+ ),
+ TO_HOST_ADDRESS (
+ RootBridge->MemAbove4G.Limit,
+ RootBridge->MemAbove4G.Translation
+ )
+ );
+ if (BaseAddress != MAX_UINT64) {
+ break;
+ }
+
+ //
+ // If memory above 4GB is not available, try memory below 4GB
+ //
+
+ case TypeMem32:
+ BaseAddress = AllocateResource (
+ TRUE,
+ RootBridge->ResAllocNode[Index].Length,
+ MIN (31, BitsOfAlignment),
+ TO_HOST_ADDRESS (
+ ALIGN_VALUE (RootBridge->Mem.Base, Alignment + 1),
+ RootBridge->Mem.Translation
+ ),
+ TO_HOST_ADDRESS (
+ RootBridge->Mem.Limit,
+ RootBridge->Mem.Translation
+ )
+ );
+ break;
+
+ case TypePMem64:
+ BaseAddress = AllocateResource (
+ TRUE,
+ RootBridge->ResAllocNode[Index].Length,
+ MIN (63, BitsOfAlignment),
+ TO_HOST_ADDRESS (
+ ALIGN_VALUE (RootBridge->PMemAbove4G.Base, Alignment + 1),
+ RootBridge->PMemAbove4G.Translation
+ ),
+ TO_HOST_ADDRESS (
+ RootBridge->PMemAbove4G.Limit,
+ RootBridge->PMemAbove4G.Translation
+ )
+ );
+ if (BaseAddress != MAX_UINT64) {
+ break;
+ }
+
+ //
+ // If memory above 4GB is not available, try memory below 4GB
+ //
+ case TypePMem32:
+ BaseAddress = AllocateResource (
+ TRUE,
+ RootBridge->ResAllocNode[Index].Length,
+ MIN (31, BitsOfAlignment),
+ TO_HOST_ADDRESS (
+ ALIGN_VALUE (RootBridge->PMem.Base, Alignment + 1),
+ RootBridge->PMem.Translation
+ ),
+ TO_HOST_ADDRESS (
+ RootBridge->PMem.Limit,
+ RootBridge->PMem.Translation
+ )
+ );
+ break;
+
+ default:
+ ASSERT (FALSE);
+ break;
+ }
- case TypePMem64:
- BaseAddress = AllocateResource (
- TRUE,
- RootBridge->ResAllocNode[Index].Length,
- MIN (63, BitsOfAlignment),
- TO_HOST_ADDRESS (ALIGN_VALUE (RootBridge->PMemAbove4G.Base, Alignment + 1),
- RootBridge->PMemAbove4G.Translation),
- TO_HOST_ADDRESS (RootBridge->PMemAbove4G.Limit,
- RootBridge->PMemAbove4G.Translation)
- );
+ DEBUG ((
+ DEBUG_INFO,
+ " %s: Base/Length/Alignment = %lx/%lx/%lx - ",
+ mPciResourceTypeStr[Index],
+ BaseAddress,
+ RootBridge->ResAllocNode[Index].Length,
+ Alignment
+ ));
if (BaseAddress != MAX_UINT64) {
- break;
+ RootBridge->ResAllocNode[Index].Base = BaseAddress;
+ RootBridge->ResAllocNode[Index].Status = ResAllocated;
+ DEBUG ((DEBUG_INFO, "Success\n"));
+ } else {
+ ReturnStatus = EFI_OUT_OF_RESOURCES;
+ DEBUG ((DEBUG_ERROR, "Out Of Resource!\n"));
}
- //
- // If memory above 4GB is not available, try memory below 4GB
- //
- case TypePMem32:
- BaseAddress = AllocateResource (
- TRUE,
- RootBridge->ResAllocNode[Index].Length,
- MIN (31, BitsOfAlignment),
- TO_HOST_ADDRESS (ALIGN_VALUE (RootBridge->PMem.Base, Alignment + 1),
- RootBridge->PMem.Translation),
- TO_HOST_ADDRESS (RootBridge->PMem.Limit,
- RootBridge->PMem.Translation)
- );
- break;
-
- default:
- ASSERT (FALSE);
- break;
- }
-
- DEBUG ((DEBUG_INFO, " %s: Base/Length/Alignment = %lx/%lx/%lx - ",
- mPciResourceTypeStr[Index], BaseAddress, RootBridge->ResAllocNode[Index].Length, Alignment));
- if (BaseAddress != MAX_UINT64) {
- RootBridge->ResAllocNode[Index].Base = BaseAddress;
- RootBridge->ResAllocNode[Index].Status = ResAllocated;
- DEBUG ((DEBUG_INFO, "Success\n"));
- } else {
- ReturnStatus = EFI_OUT_OF_RESOURCES;
- DEBUG ((DEBUG_ERROR, "Out Of Resource!\n"));
}
}
}
- }
- if (ReturnStatus == EFI_OUT_OF_RESOURCES) {
- ResourceConflict (HostBridge);
- }
+ if (ReturnStatus == EFI_OUT_OF_RESOURCES) {
+ ResourceConflict (HostBridge);
+ }
- //
- // Set resource to zero for nodes where allocation fails
- //
- for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
- for (Index = TypeIo; Index < TypeBus; Index++) {
- if (RootBridge->ResAllocNode[Index].Status != ResAllocated) {
- RootBridge->ResAllocNode[Index].Length = 0;
+ //
+ // Set resource to zero for nodes where allocation fails
+ //
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ for (Index = TypeIo; Index < TypeBus; Index++) {
+ if (RootBridge->ResAllocNode[Index].Status != ResAllocated) {
+ RootBridge->ResAllocNode[Index].Length = 0;
+ }
}
}
- }
- return ReturnStatus;
- case EfiPciHostBridgeSetResources:
- //
- // HostBridgeInstance->CanRestarted = FALSE;
- //
- break;
+ return ReturnStatus;
- case EfiPciHostBridgeFreeResources:
- //
- // HostBridgeInstance->CanRestarted = FALSE;
- //
- ReturnStatus = EFI_SUCCESS;
- for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
- RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
- for (Index = TypeIo; Index < TypeBus; Index++) {
- if (RootBridge->ResAllocNode[Index].Status == ResAllocated) {
- switch (Index) {
- case TypeIo:
- Status = gDS->FreeIoSpace (RootBridge->ResAllocNode[Index].Base, RootBridge->ResAllocNode[Index].Length);
- if (EFI_ERROR (Status)) {
- ReturnStatus = Status;
- }
- break;
+ case EfiPciHostBridgeSetResources:
+ //
+ // HostBridgeInstance->CanRestarted = FALSE;
+ //
+ break;
- case TypeMem32:
- case TypePMem32:
- case TypeMem64:
- case TypePMem64:
- Status = gDS->FreeMemorySpace (RootBridge->ResAllocNode[Index].Base, RootBridge->ResAllocNode[Index].Length);
- if (EFI_ERROR (Status)) {
- ReturnStatus = Status;
+ case EfiPciHostBridgeFreeResources:
+ //
+ // HostBridgeInstance->CanRestarted = FALSE;
+ //
+ ReturnStatus = EFI_SUCCESS;
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+ for (Index = TypeIo; Index < TypeBus; Index++) {
+ if (RootBridge->ResAllocNode[Index].Status == ResAllocated) {
+ switch (Index) {
+ case TypeIo:
+ Status = gDS->FreeIoSpace (RootBridge->ResAllocNode[Index].Base, RootBridge->ResAllocNode[Index].Length);
+ if (EFI_ERROR (Status)) {
+ ReturnStatus = Status;
+ }
+
+ break;
+
+ case TypeMem32:
+ case TypePMem32:
+ case TypeMem64:
+ case TypePMem64:
+ Status = gDS->FreeMemorySpace (RootBridge->ResAllocNode[Index].Base, RootBridge->ResAllocNode[Index].Length);
+ if (EFI_ERROR (Status)) {
+ ReturnStatus = Status;
+ }
+
+ break;
+
+ default:
+ ASSERT (FALSE);
+ break;
}
- break;
- default:
- ASSERT (FALSE);
- break;
+ RootBridge->ResAllocNode[Index].Type = Index;
+ RootBridge->ResAllocNode[Index].Base = 0;
+ RootBridge->ResAllocNode[Index].Length = 0;
+ RootBridge->ResAllocNode[Index].Status = ResNone;
}
-
- RootBridge->ResAllocNode[Index].Type = Index;
- RootBridge->ResAllocNode[Index].Base = 0;
- RootBridge->ResAllocNode[Index].Length = 0;
- RootBridge->ResAllocNode[Index].Status = ResNone;
}
- }
- RootBridge->ResourceSubmitted = FALSE;
- }
+ RootBridge->ResourceSubmitted = FALSE;
+ }
- HostBridge->CanRestarted = TRUE;
- return ReturnStatus;
+ HostBridge->CanRestarted = TRUE;
+ return ReturnStatus;
- case EfiPciHostBridgeEndResourceAllocation:
- //
- // The resource allocation phase is completed. No specific action is required
- // here. This notification can be used to perform any chipset specific programming.
- //
- break;
+ case EfiPciHostBridgeEndResourceAllocation:
+ //
+ // The resource allocation phase is completed. No specific action is required
+ // here. This notification can be used to perform any chipset specific programming.
+ //
+ break;
- case EfiPciHostBridgeEndEnumeration:
- //
- // The Host Bridge Enumeration is completed. No specific action is required here.
- // This notification can be used to perform any chipset specific programming.
- //
- break;
+ case EfiPciHostBridgeEndEnumeration:
+ //
+ // The Host Bridge Enumeration is completed. No specific action is required here.
+ // This notification can be used to perform any chipset specific programming.
+ //
+ break;
- default:
- return EFI_INVALID_PARAMETER;
+ default:
+ return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
@@ -1095,8 +1212,8 @@ NotifyPhase (
EFI_STATUS
EFIAPI
GetNextRootBridge (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN OUT EFI_HANDLE *RootBridgeHandle
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN OUT EFI_HANDLE *RootBridgeHandle
)
{
BOOLEAN ReturnNext;
@@ -1109,19 +1226,20 @@ GetNextRootBridge (
}
HostBridge = PCI_HOST_BRIDGE_FROM_THIS (This);
- ReturnNext = (BOOLEAN) (*RootBridgeHandle == NULL);
+ ReturnNext = (BOOLEAN)(*RootBridgeHandle == NULL);
for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (ReturnNext) {
*RootBridgeHandle = RootBridge->Handle;
return EFI_SUCCESS;
}
- ReturnNext = (BOOLEAN) (*RootBridgeHandle == RootBridge->Handle);
+ ReturnNext = (BOOLEAN)(*RootBridgeHandle == RootBridge->Handle);
}
if (ReturnNext) {
@@ -1151,9 +1269,9 @@ GetNextRootBridge (
EFI_STATUS
EFIAPI
GetAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT UINT64 *Attributes
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT UINT64 *Attributes
)
{
LIST_ENTRY *Link;
@@ -1166,9 +1284,10 @@ GetAttributes (
HostBridge = PCI_HOST_BRIDGE_FROM_THIS (This);
for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
*Attributes = RootBridge->AllocationAttributes;
@@ -1196,16 +1315,16 @@ GetAttributes (
EFI_STATUS
EFIAPI
StartBusEnumeration (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
)
{
- LIST_ENTRY *Link;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ LIST_ENTRY *Link;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
if (Configuration == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1215,7 +1334,8 @@ StartBusEnumeration (
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
*Configuration = AllocatePool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
@@ -1223,7 +1343,7 @@ StartBusEnumeration (
return EFI_OUT_OF_RESOURCES;
}
- Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) *Configuration;
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)*Configuration;
Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
Descriptor->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
@@ -1235,8 +1355,8 @@ StartBusEnumeration (
Descriptor->AddrTranslationOffset = 0;
Descriptor->AddrLen = RootBridge->Bus.Limit - RootBridge->Bus.Base + 1;
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1);
- End->Desc = ACPI_END_TAG_DESCRIPTOR;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)(Descriptor + 1);
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0x0;
return EFI_SUCCESS;
@@ -1262,23 +1382,23 @@ StartBusEnumeration (
EFI_STATUS
EFIAPI
SetBusNumbers (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
)
{
- LIST_ENTRY *Link;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ LIST_ENTRY *Link;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
if (Configuration == NULL) {
return EFI_INVALID_PARAMETER;
}
- Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1);
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)(Descriptor + 1);
//
// Check the Configuration is valid
@@ -1286,7 +1406,8 @@ SetBusNumbers (
if ((Descriptor->Desc != ACPI_ADDRESS_SPACE_DESCRIPTOR) ||
(Descriptor->ResType != ACPI_ADDRESS_SPACE_TYPE_BUS) ||
(End->Desc != ACPI_END_TAG_DESCRIPTOR)
- ) {
+ )
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1294,25 +1415,27 @@ SetBusNumbers (
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
-
if (Descriptor->AddrLen == 0) {
return EFI_INVALID_PARAMETER;
}
if ((Descriptor->AddrRangeMin < RootBridge->Bus.Base) ||
(Descriptor->AddrRangeMin + Descriptor->AddrLen - 1 > RootBridge->Bus.Limit)
- ) {
+ )
+ {
return EFI_INVALID_PARAMETER;
}
+
//
// Update the Bus Range
//
- RootBridge->ResAllocNode[TypeBus].Base = Descriptor->AddrRangeMin;
- RootBridge->ResAllocNode[TypeBus].Length = Descriptor->AddrLen;
- RootBridge->ResAllocNode[TypeBus].Status = ResAllocated;
+ RootBridge->ResAllocNode[TypeBus].Base = Descriptor->AddrRangeMin;
+ RootBridge->ResAllocNode[TypeBus].Length = Descriptor->AddrLen;
+ RootBridge->ResAllocNode[TypeBus].Status = ResAllocated;
return EFI_SUCCESS;
}
}
@@ -1335,16 +1458,16 @@ SetBusNumbers (
EFI_STATUS
EFIAPI
SubmitResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
)
{
- LIST_ENTRY *Link;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- PCI_RESOURCE_TYPE Type;
+ LIST_ENTRY *Link;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ PCI_RESOURCE_TYPE Type;
//
// Check the input parameter: Configuration
@@ -1357,7 +1480,8 @@ SubmitResources (
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
DEBUG ((DEBUG_INFO, "PciHostBridge: SubmitResources for %s\n", RootBridge->DevicePathStr));
@@ -1366,52 +1490,62 @@ SubmitResources (
// If the Configuration includes one or more invalid resource descriptors, all the resource
// descriptors are ignored and the function returns EFI_INVALID_PARAMETER.
//
- for (Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
+ for (Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
if (Descriptor->ResType > ACPI_ADDRESS_SPACE_TYPE_BUS) {
return EFI_INVALID_PARAMETER;
}
- DEBUG ((DEBUG_INFO, " %s: Granularity/SpecificFlag = %ld / %02x%s\n",
- mAcpiAddressSpaceTypeStr[Descriptor->ResType], Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
- (Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0 ? L" (Prefetchable)" : L""
- ));
+ DEBUG ((
+ DEBUG_INFO,
+ " %s: Granularity/SpecificFlag = %ld / %02x%s\n",
+ mAcpiAddressSpaceTypeStr[Descriptor->ResType],
+ Descriptor->AddrSpaceGranularity,
+ Descriptor->SpecificFlag,
+ (Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0 ? L" (Prefetchable)" : L""
+ ));
DEBUG ((DEBUG_INFO, " Length/Alignment = 0x%lx / 0x%lx\n", Descriptor->AddrLen, Descriptor->AddrRangeMax));
switch (Descriptor->ResType) {
- case ACPI_ADDRESS_SPACE_TYPE_MEM:
- if (Descriptor->AddrSpaceGranularity != 32 && Descriptor->AddrSpaceGranularity != 64) {
- return EFI_INVALID_PARAMETER;
- }
- if (Descriptor->AddrSpaceGranularity == 32 && Descriptor->AddrLen >= SIZE_4GB) {
- return EFI_INVALID_PARAMETER;
- }
- //
- // If the PCI root bridge does not support separate windows for nonprefetchable and
- // prefetchable memory, then the PCI bus driver needs to include requests for
- // prefetchable memory in the nonprefetchable memory pool.
- //
- if (((RootBridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0) &&
- ((Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0)
- ) {
- return EFI_INVALID_PARAMETER;
- }
- case ACPI_ADDRESS_SPACE_TYPE_IO:
- //
- // Check aligment, it should be of the form 2^n-1
- //
- if (GetPowerOfTwo64 (Descriptor->AddrRangeMax + 1) != (Descriptor->AddrRangeMax + 1)) {
- return EFI_INVALID_PARAMETER;
- }
- break;
- default:
- ASSERT (FALSE);
- break;
+ case ACPI_ADDRESS_SPACE_TYPE_MEM:
+ if ((Descriptor->AddrSpaceGranularity != 32) && (Descriptor->AddrSpaceGranularity != 64)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((Descriptor->AddrSpaceGranularity == 32) && (Descriptor->AddrLen >= SIZE_4GB)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If the PCI root bridge does not support separate windows for nonprefetchable and
+ // prefetchable memory, then the PCI bus driver needs to include requests for
+ // prefetchable memory in the nonprefetchable memory pool.
+ //
+ if (((RootBridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0) &&
+ ((Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0)
+ )
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ case ACPI_ADDRESS_SPACE_TYPE_IO:
+ //
+ // Check aligment, it should be of the form 2^n-1
+ //
+ if (GetPowerOfTwo64 (Descriptor->AddrRangeMax + 1) != (Descriptor->AddrRangeMax + 1)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ break;
+ default:
+ ASSERT (FALSE);
+ break;
}
}
+
if (Descriptor->Desc != ACPI_END_TAG_DESCRIPTOR) {
return EFI_INVALID_PARAMETER;
}
- for (Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
+ for (Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
if (Descriptor->AddrSpaceGranularity == 32) {
if ((Descriptor->SpecificFlag & EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != 0) {
@@ -1431,10 +1565,12 @@ SubmitResources (
ASSERT (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_IO);
Type = TypeIo;
}
+
RootBridge->ResAllocNode[Type].Length = Descriptor->AddrLen;
RootBridge->ResAllocNode[Type].Alignment = Descriptor->AddrRangeMax;
RootBridge->ResAllocNode[Type].Status = ResSubmitted;
}
+
RootBridge->ResourceSubmitted = TRUE;
return EFI_SUCCESS;
}
@@ -1461,26 +1597,27 @@ SubmitResources (
EFI_STATUS
EFIAPI
GetProposedResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
)
{
- LIST_ENTRY *Link;
- PCI_HOST_BRIDGE_INSTANCE *HostBridge;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- UINTN Index;
- UINTN Number;
- VOID *Buffer;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
- UINT64 ResStatus;
+ LIST_ENTRY *Link;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ UINTN Index;
+ UINTN Number;
+ VOID *Buffer;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ UINT64 ResStatus;
HostBridge = PCI_HOST_BRIDGE_FROM_THIS (This);
for (Link = GetFirstNode (&HostBridge->RootBridges)
- ; !IsNull (&HostBridge->RootBridges, Link)
- ; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
for (Index = 0, Number = 0; Index < TypeBus; Index++) {
@@ -1494,52 +1631,54 @@ GetProposedResources (
return EFI_OUT_OF_RESOURCES;
}
- Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Buffer;
+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Buffer;
for (Index = 0; Index < TypeBus; Index++) {
ResStatus = RootBridge->ResAllocNode[Index].Status;
if (ResStatus != ResNone) {
- Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
- Descriptor->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;;
- Descriptor->GenFlag = 0;
+ Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ Descriptor->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
+ Descriptor->GenFlag = 0;
//
// AddrRangeMin in Resource Descriptor here should be device address
// instead of host address, or else PCI bus driver cannot set correct
// address into PCI BAR registers.
// Base in ResAllocNode is a host address, so conversion is needed.
//
- Descriptor->AddrRangeMin = TO_DEVICE_ADDRESS (RootBridge->ResAllocNode[Index].Base,
- GetTranslationByResourceType (RootBridge, Index));
+ Descriptor->AddrRangeMin = TO_DEVICE_ADDRESS (
+ RootBridge->ResAllocNode[Index].Base,
+ GetTranslationByResourceType (RootBridge, Index)
+ );
Descriptor->AddrRangeMax = 0;
Descriptor->AddrTranslationOffset = (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : PCI_RESOURCE_LESS;
Descriptor->AddrLen = RootBridge->ResAllocNode[Index].Length;
switch (Index) {
+ case TypeIo:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ break;
- case TypeIo:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- break;
-
- case TypePMem32:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem32:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 32;
- break;
+ case TypePMem32:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem32:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 32;
+ break;
- case TypePMem64:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem64:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 64;
- break;
+ case TypePMem64:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem64:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 64;
+ break;
}
Descriptor++;
}
}
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) Descriptor;
- End->Desc = ACPI_END_TAG_DESCRIPTOR;
- End->Checksum = 0;
+
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor;
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;
+ End->Checksum = 0;
*Configuration = Buffer;
@@ -1567,17 +1706,17 @@ GetProposedResources (
EFI_STATUS
EFIAPI
PreprocessController (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
)
{
LIST_ENTRY *Link;
PCI_HOST_BRIDGE_INSTANCE *HostBridge;
PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- if ((UINT32) Phase > EfiPciBeforeResourceCollection) {
+ if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
return EFI_INVALID_PARAMETER;
}
@@ -1585,7 +1724,8 @@ PreprocessController (
for (Link = GetFirstNode (&HostBridge->RootBridges)
; !IsNull (&HostBridge->RootBridges, Link)
; Link = GetNextNode (&HostBridge->RootBridges, Link)
- ) {
+ )
+ {
RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
if (RootBridgeHandle == RootBridge->Handle) {
return EFI_SUCCESS;
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
index 755ab75b19..e7a30fd909 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PCI_HOST_BRIDGE_H_
#define _PCI_HOST_BRIDGE_H_
-
#include <PiDxe.h>
#include <IndustryStandard/Acpi.h>
#include <Library/UefiDriverEntryPoint.h>
@@ -21,27 +20,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PciRootBridge.h"
-#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('p', 'h', 'b', 'g')
+#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('p', 'h', 'b', 'g')
typedef struct {
- UINTN Signature;
- EFI_HANDLE Handle;
- LIST_ENTRY RootBridges;
- BOOLEAN CanRestarted;
- EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
+ UINTN Signature;
+ EFI_HANDLE Handle;
+ LIST_ENTRY RootBridges;
+ BOOLEAN CanRestarted;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
} PCI_HOST_BRIDGE_INSTANCE;
-#define PCI_HOST_BRIDGE_FROM_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
+#define PCI_HOST_BRIDGE_FROM_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
//
// Macros to translate device address to host address and vice versa. According
// to UEFI 2.7, device address = host address + translation offset.
//
-#define TO_HOST_ADDRESS(DeviceAddress,TranslationOffset) ((DeviceAddress) - (TranslationOffset))
-#define TO_DEVICE_ADDRESS(HostAddress,TranslationOffset) ((HostAddress) + (TranslationOffset))
+#define TO_HOST_ADDRESS(DeviceAddress, TranslationOffset) ((DeviceAddress) - (TranslationOffset))
+#define TO_DEVICE_ADDRESS(HostAddress, TranslationOffset) ((HostAddress) + (TranslationOffset))
//
// Driver Entry Point
//
+
/**
Entry point of this driver.
@@ -56,13 +56,14 @@ typedef struct {
EFI_STATUS
EFIAPI
InitializePciHostBridge (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
);
//
// HostBridge Resource Allocation interface
//
+
/**
Enter a certain phase of the PCI enumeration process.
@@ -78,8 +79,8 @@ InitializePciHostBridge (
EFI_STATUS
EFIAPI
NotifyPhase (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
);
/**
@@ -101,8 +102,8 @@ NotifyPhase (
EFI_STATUS
EFIAPI
GetNextRootBridge (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN OUT EFI_HANDLE *RootBridgeHandle
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN OUT EFI_HANDLE *RootBridgeHandle
);
/**
@@ -124,9 +125,9 @@ GetNextRootBridge (
EFI_STATUS
EFIAPI
GetAttributes (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT UINT64 *Attributes
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT UINT64 *Attributes
);
/**
@@ -146,9 +147,9 @@ GetAttributes (
EFI_STATUS
EFIAPI
StartBusEnumeration (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
);
/**
@@ -167,9 +168,9 @@ StartBusEnumeration (
EFI_STATUS
EFIAPI
SetBusNumbers (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
);
/**
@@ -188,9 +189,9 @@ SetBusNumbers (
EFI_STATUS
EFIAPI
SubmitResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN VOID *Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
);
/**
@@ -211,9 +212,9 @@ SubmitResources (
EFI_STATUS
EFIAPI
GetProposedResources (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- OUT VOID **Configuration
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
);
/**
@@ -233,10 +234,10 @@ GetProposedResources (
EFI_STATUS
EFIAPI
PreprocessController (
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
- IN EFI_HANDLE RootBridgeHandle,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
);
/**
@@ -246,7 +247,7 @@ PreprocessController (
**/
VOID
ResourceConflict (
- IN PCI_HOST_BRIDGE_INSTANCE *HostBridge
+ IN PCI_HOST_BRIDGE_INSTANCE *HostBridge
);
/**
@@ -259,11 +260,11 @@ ResourceConflict (
**/
UINT64
GetTranslationByResourceType (
- IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
- IN PCI_RESOURCE_TYPE ResourceType
+ IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
+ IN PCI_RESOURCE_TYPE ResourceType
);
-extern EFI_CPU_IO2_PROTOCOL *mCpuIo;
-extern EDKII_IOMMU_PROTOCOL *mIoMmu;
+extern EFI_CPU_IO2_PROTOCOL *mCpuIo;
+extern EDKII_IOMMU_PROTOCOL *mIoMmu;
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
index 0f5a17d55a..772f4b513f 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
@@ -6,15 +6,16 @@ Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef _PCI_HOST_RESOURCE_H_
#define _PCI_HOST_RESOURCE_H_
#include <PiDxe.h>
-#define PCI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
+#define PCI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
typedef enum {
- TypeIo = 0,
+ TypeIo = 0,
TypeMem32,
TypePMem32,
TypeMem64,
@@ -31,14 +32,14 @@ typedef enum {
} RES_STATUS;
typedef struct {
- PCI_RESOURCE_TYPE Type;
+ PCI_RESOURCE_TYPE Type;
//
// Base is a host address
//
- UINT64 Base;
- UINT64 Length;
- UINT64 Alignment;
- RES_STATUS Status;
+ UINT64 Base;
+ UINT64 Length;
+ UINT64 Alignment;
+ RES_STATUS Status;
} PCI_RES_NODE;
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h
index caa3faf00a..10a6200719 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h
@@ -31,7 +31,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/TimerLib.h>
#include "PciHostResource.h"
-
typedef enum {
IoOperation,
MemOperation,
@@ -40,46 +39,46 @@ typedef enum {
#define MAP_INFO_SIGNATURE SIGNATURE_32 ('_', 'm', 'a', 'p')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;
- UINTN NumberOfBytes;
- UINTN NumberOfPages;
- EFI_PHYSICAL_ADDRESS HostAddress;
- EFI_PHYSICAL_ADDRESS MappedHostAddress;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;
+ UINTN NumberOfBytes;
+ UINTN NumberOfPages;
+ EFI_PHYSICAL_ADDRESS HostAddress;
+ EFI_PHYSICAL_ADDRESS MappedHostAddress;
} MAP_INFO;
-#define MAP_INFO_FROM_LINK(a) CR (a, MAP_INFO, Link, MAP_INFO_SIGNATURE)
+#define MAP_INFO_FROM_LINK(a) CR (a, MAP_INFO, Link, MAP_INFO_SIGNATURE)
-#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('_', 'p', 'r', 'b')
+#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('_', 'p', 'r', 'b')
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
- EFI_HANDLE Handle;
- UINT64 AllocationAttributes;
- UINT64 Attributes;
- UINT64 Supports;
- PCI_RES_NODE ResAllocNode[TypeMax];
- PCI_ROOT_BRIDGE_APERTURE Bus;
- PCI_ROOT_BRIDGE_APERTURE Io;
- PCI_ROOT_BRIDGE_APERTURE Mem;
- PCI_ROOT_BRIDGE_APERTURE PMem;
- PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
- PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
- BOOLEAN DmaAbove4G;
- BOOLEAN NoExtendedConfigSpace;
- VOID *ConfigBuffer;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- CHAR16 *DevicePathStr;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL RootBridgeIo;
-
- BOOLEAN ResourceSubmitted;
- LIST_ENTRY Maps;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+ EFI_HANDLE Handle;
+ UINT64 AllocationAttributes;
+ UINT64 Attributes;
+ UINT64 Supports;
+ PCI_RES_NODE ResAllocNode[TypeMax];
+ PCI_ROOT_BRIDGE_APERTURE Bus;
+ PCI_ROOT_BRIDGE_APERTURE Io;
+ PCI_ROOT_BRIDGE_APERTURE Mem;
+ PCI_ROOT_BRIDGE_APERTURE PMem;
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
+ BOOLEAN DmaAbove4G;
+ BOOLEAN NoExtendedConfigSpace;
+ VOID *ConfigBuffer;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ CHAR16 *DevicePathStr;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL RootBridgeIo;
+
+ BOOLEAN ResourceSubmitted;
+ LIST_ENTRY Maps;
} PCI_ROOT_BRIDGE_INSTANCE;
-#define ROOT_BRIDGE_FROM_THIS(a) CR (a, PCI_ROOT_BRIDGE_INSTANCE, RootBridgeIo, PCI_ROOT_BRIDGE_SIGNATURE)
+#define ROOT_BRIDGE_FROM_THIS(a) CR (a, PCI_ROOT_BRIDGE_INSTANCE, RootBridgeIo, PCI_ROOT_BRIDGE_SIGNATURE)
-#define ROOT_BRIDGE_FROM_LINK(a) CR (a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
+#define ROOT_BRIDGE_FROM_LINK(a) CR (a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
/**
Construct the Pci Root Bridge instance.
@@ -91,12 +90,13 @@ typedef struct {
**/
PCI_ROOT_BRIDGE_INSTANCE *
CreateRootBridge (
- IN PCI_ROOT_BRIDGE *Bridge
+ IN PCI_ROOT_BRIDGE *Bridge
);
//
// Protocol Member Function Prototypes
//
+
/**
Poll an address in memory mapped space until an exit condition is met
@@ -286,11 +286,11 @@ RootBridgeIoIoWrite (
EFI_STATUS
EFIAPI
RootBridgeIoCopyMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 DestAddress,
- IN UINT64 SrcAddress,
- IN UINTN Count
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 DestAddress,
+ IN UINT64 SrcAddress,
+ IN UINTN Count
)
;
@@ -567,5 +567,5 @@ RootBridgeIoConfiguration (
)
;
-extern EFI_CPU_IO2_PROTOCOL *mCpuIo;
+extern EFI_CPU_IO2_PROTOCOL *mCpuIo;
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
index 2f1bed853d..157a0ada80 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -13,12 +13,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define NO_MAPPING (VOID *) (UINTN) -1
-#define RESOURCE_VALID(Resource) ((Resource)->Base <= (Resource)->Limit)
+#define RESOURCE_VALID(Resource) ((Resource)->Base <= (Resource)->Limit)
//
// Lookup table for increment values based on transfer widths
//
-UINT8 mInStride[] = {
+UINT8 mInStride[] = {
1, // EfiPciWidthUint8
2, // EfiPciWidthUint16
4, // EfiPciWidthUint32
@@ -36,7 +36,7 @@ UINT8 mInStride[] = {
//
// Lookup table for increment values based on transfer widths
//
-UINT8 mOutStride[] = {
+UINT8 mOutStride[] = {
1, // EfiPciWidthUint8
2, // EfiPciWidthUint16
4, // EfiPciWidthUint32
@@ -61,13 +61,13 @@ UINT8 mOutStride[] = {
**/
PCI_ROOT_BRIDGE_INSTANCE *
CreateRootBridge (
- IN PCI_ROOT_BRIDGE *Bridge
+ IN PCI_ROOT_BRIDGE *Bridge
)
{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- PCI_RESOURCE_TYPE Index;
- CHAR16 *DevicePathStr;
- PCI_ROOT_BRIDGE_APERTURE *Aperture;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ PCI_RESOURCE_TYPE Index;
+ CHAR16 *DevicePathStr;
+ PCI_ROOT_BRIDGE_APERTURE *Aperture;
DevicePathStr = NULL;
@@ -76,13 +76,19 @@ CreateRootBridge (
DEBUG ((DEBUG_INFO, " Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes));
DEBUG ((DEBUG_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No"));
DEBUG ((DEBUG_INFO, "NoExtConfSpace: %s\n", Bridge->NoExtendedConfigSpace ? L"Yes" : L"No"));
- DEBUG ((DEBUG_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes,
- (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"",
- (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) != 0 ? L"Mem64Decode" : L""
- ));
DEBUG ((
- DEBUG_INFO, " Bus: %lx - %lx Translation=%lx\n",
- Bridge->Bus.Base, Bridge->Bus.Limit, Bridge->Bus.Translation
+ DEBUG_INFO,
+ " AllocAttr: %lx (%s%s)\n",
+ Bridge->AllocationAttributes,
+ (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"",
+ (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) != 0 ? L"Mem64Decode" : L""
+ ));
+ DEBUG ((
+ DEBUG_INFO,
+ " Bus: %lx - %lx Translation=%lx\n",
+ Bridge->Bus.Base,
+ Bridge->Bus.Limit,
+ Bridge->Bus.Translation
));
//
// Translation for bus is not supported.
@@ -93,24 +99,39 @@ CreateRootBridge (
}
DEBUG ((
- DEBUG_INFO, " Io: %lx - %lx Translation=%lx\n",
- Bridge->Io.Base, Bridge->Io.Limit, Bridge->Io.Translation
+ DEBUG_INFO,
+ " Io: %lx - %lx Translation=%lx\n",
+ Bridge->Io.Base,
+ Bridge->Io.Limit,
+ Bridge->Io.Translation
));
DEBUG ((
- DEBUG_INFO, " Mem: %lx - %lx Translation=%lx\n",
- Bridge->Mem.Base, Bridge->Mem.Limit, Bridge->Mem.Translation
+ DEBUG_INFO,
+ " Mem: %lx - %lx Translation=%lx\n",
+ Bridge->Mem.Base,
+ Bridge->Mem.Limit,
+ Bridge->Mem.Translation
));
DEBUG ((
- DEBUG_INFO, " MemAbove4G: %lx - %lx Translation=%lx\n",
- Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit, Bridge->MemAbove4G.Translation
+ DEBUG_INFO,
+ " MemAbove4G: %lx - %lx Translation=%lx\n",
+ Bridge->MemAbove4G.Base,
+ Bridge->MemAbove4G.Limit,
+ Bridge->MemAbove4G.Translation
));
DEBUG ((
- DEBUG_INFO, " PMem: %lx - %lx Translation=%lx\n",
- Bridge->PMem.Base, Bridge->PMem.Limit, Bridge->PMem.Translation
+ DEBUG_INFO,
+ " PMem: %lx - %lx Translation=%lx\n",
+ Bridge->PMem.Base,
+ Bridge->PMem.Limit,
+ Bridge->PMem.Translation
));
DEBUG ((
- DEBUG_INFO, " PMemAbove4G: %lx - %lx Translation=%lx\n",
- Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit, Bridge->PMemAbove4G.Translation
+ DEBUG_INFO,
+ " PMemAbove4G: %lx - %lx Translation=%lx\n",
+ Bridge->PMemAbove4G.Base,
+ Bridge->PMemAbove4G.Limit,
+ Bridge->PMemAbove4G.Translation
));
//
@@ -122,18 +143,21 @@ CreateRootBridge (
return NULL;
}
}
+
if (RESOURCE_VALID (&Bridge->MemAbove4G)) {
ASSERT (Bridge->MemAbove4G.Base >= SIZE_4GB);
if (Bridge->MemAbove4G.Base < SIZE_4GB) {
return NULL;
}
}
+
if (RESOURCE_VALID (&Bridge->PMem)) {
ASSERT (Bridge->PMem.Limit < SIZE_4GB);
if (Bridge->PMem.Limit >= SIZE_4GB) {
return NULL;
}
}
+
if (RESOURCE_VALID (&Bridge->PMemAbove4G)) {
ASSERT (Bridge->PMemAbove4G.Base >= SIZE_4GB);
if (Bridge->PMemAbove4G.Base < SIZE_4GB) {
@@ -174,17 +198,17 @@ CreateRootBridge (
RootBridge = AllocateZeroPool (sizeof (PCI_ROOT_BRIDGE_INSTANCE));
ASSERT (RootBridge != NULL);
- RootBridge->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
- RootBridge->Supports = Bridge->Supports;
- RootBridge->Attributes = Bridge->Attributes;
- RootBridge->DmaAbove4G = Bridge->DmaAbove4G;
+ RootBridge->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
+ RootBridge->Supports = Bridge->Supports;
+ RootBridge->Attributes = Bridge->Attributes;
+ RootBridge->DmaAbove4G = Bridge->DmaAbove4G;
RootBridge->NoExtendedConfigSpace = Bridge->NoExtendedConfigSpace;
- RootBridge->AllocationAttributes = Bridge->AllocationAttributes;
- RootBridge->DevicePath = DuplicateDevicePath (Bridge->DevicePath);
- RootBridge->DevicePathStr = DevicePathStr;
- RootBridge->ConfigBuffer = AllocatePool (
- TypeMax * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)
- );
+ RootBridge->AllocationAttributes = Bridge->AllocationAttributes;
+ RootBridge->DevicePath = DuplicateDevicePath (Bridge->DevicePath);
+ RootBridge->DevicePathStr = DevicePathStr;
+ RootBridge->ConfigBuffer = AllocatePool (
+ TypeMax * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR)
+ );
ASSERT (RootBridge->ConfigBuffer != NULL);
InitializeListHead (&RootBridge->Maps);
@@ -197,37 +221,40 @@ CreateRootBridge (
for (Index = TypeIo; Index < TypeMax; Index++) {
switch (Index) {
- case TypeBus:
- Aperture = &RootBridge->Bus;
- break;
- case TypeIo:
- Aperture = &RootBridge->Io;
- break;
- case TypeMem32:
- Aperture = &RootBridge->Mem;
- break;
- case TypeMem64:
- Aperture = &RootBridge->MemAbove4G;
- break;
- case TypePMem32:
- Aperture = &RootBridge->PMem;
- break;
- case TypePMem64:
- Aperture = &RootBridge->PMemAbove4G;
- break;
- default:
- ASSERT (FALSE);
- Aperture = NULL;
- break;
+ case TypeBus:
+ Aperture = &RootBridge->Bus;
+ break;
+ case TypeIo:
+ Aperture = &RootBridge->Io;
+ break;
+ case TypeMem32:
+ Aperture = &RootBridge->Mem;
+ break;
+ case TypeMem64:
+ Aperture = &RootBridge->MemAbove4G;
+ break;
+ case TypePMem32:
+ Aperture = &RootBridge->PMem;
+ break;
+ case TypePMem64:
+ Aperture = &RootBridge->PMemAbove4G;
+ break;
+ default:
+ ASSERT (FALSE);
+ Aperture = NULL;
+ break;
}
- RootBridge->ResAllocNode[Index].Type = Index;
+
+ RootBridge->ResAllocNode[Index].Type = Index;
if (Bridge->ResourceAssigned && (Aperture->Limit >= Aperture->Base)) {
//
// Base in ResAllocNode is a host address, while Base in Aperture is a
// device address.
//
- RootBridge->ResAllocNode[Index].Base = TO_HOST_ADDRESS (Aperture->Base,
- Aperture->Translation);
+ RootBridge->ResAllocNode[Index].Base = TO_HOST_ADDRESS (
+ Aperture->Base,
+ Aperture->Translation
+ );
RootBridge->ResAllocNode[Index].Length = Aperture->Limit - Aperture->Base + 1;
RootBridge->ResAllocNode[Index].Status = ResAllocated;
} else {
@@ -325,7 +352,7 @@ RootBridgeIoCheckParameter (
//
// Check to see if Width is in the valid range
//
- if ((UINT32) Width >= EfiPciWidthMaximum) {
+ if ((UINT32)Width >= EfiPciWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -333,11 +360,11 @@ RootBridgeIoCheckParameter (
// For FIFO type, the device address won't increase during the access,
// so treat Count as 1
//
- if (Width >= EfiPciWidthFifoUint8 && Width <= EfiPciWidthFifoUint64) {
+ if ((Width >= EfiPciWidthFifoUint8) && (Width <= EfiPciWidthFifoUint64)) {
Count = 1;
}
- Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)(Width & 0x03);
Size = 1 << Width;
//
@@ -382,23 +409,26 @@ RootBridgeIoCheckParameter (
//
if (Address + Length <= 0x1000) {
if ((RootBridge->Attributes & (
- EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_ATTRIBUTE_VGA_IO |
- EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
- EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_ATTRIBUTE_VGA_IO_16)) != 0) {
+ EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_ATTRIBUTE_VGA_IO |
+ EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
+ EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_ATTRIBUTE_VGA_IO_16)) != 0)
+ {
return EFI_SUCCESS;
}
}
- Base = RootBridge->Io.Base;
+
+ Base = RootBridge->Io.Base;
Limit = RootBridge->Io.Limit;
} else if (OperationType == MemOperation) {
//
// Allow Legacy MMIO access
//
- if ((Address >= 0xA0000) && (Address + Length) <= 0xC0000) {
+ if ((Address >= 0xA0000) && ((Address + Length) <= 0xC0000)) {
if ((RootBridge->Attributes & EFI_PCI_ATTRIBUTE_VGA_MEMORY) != 0) {
return EFI_SUCCESS;
}
}
+
//
// By comparing the Address against Limit we know which range to be used
// for checking
@@ -417,14 +447,16 @@ RootBridgeIoCheckParameter (
Limit = RootBridge->PMemAbove4G.Limit;
}
} else {
- PciRbAddr = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS*) &Address;
- if (PciRbAddr->Bus < RootBridge->Bus.Base ||
- PciRbAddr->Bus > RootBridge->Bus.Limit) {
+ PciRbAddr = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&Address;
+ if ((PciRbAddr->Bus < RootBridge->Bus.Base) ||
+ (PciRbAddr->Bus > RootBridge->Bus.Limit))
+ {
return EFI_INVALID_PARAMETER;
}
- if (PciRbAddr->Device > PCI_MAX_DEVICE ||
- PciRbAddr->Function > PCI_MAX_FUNC) {
+ if ((PciRbAddr->Device > PCI_MAX_DEVICE) ||
+ (PciRbAddr->Function > PCI_MAX_FUNC))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -433,12 +465,13 @@ RootBridgeIoCheckParameter (
} else {
Address = PciRbAddr->Register;
}
- Base = 0;
+
+ Base = 0;
Limit = RootBridge->NoExtendedConfigSpace ? 0xFF : 0xFFF;
}
if (Address < Base) {
- return EFI_INVALID_PARAMETER;
+ return EFI_INVALID_PARAMETER;
}
if (Address + Length > Limit + 1) {
@@ -462,18 +495,18 @@ RootBridgeIoCheckParameter (
**/
EFI_STATUS
RootBridgeIoGetMemTranslationByAddress (
- IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
- IN UINT64 Address,
- IN OUT UINT64 *Translation
+ IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
+ IN UINT64 Address,
+ IN OUT UINT64 *Translation
)
{
- if (Address >= RootBridge->Mem.Base && Address <= RootBridge->Mem.Limit) {
+ if ((Address >= RootBridge->Mem.Base) && (Address <= RootBridge->Mem.Limit)) {
*Translation = RootBridge->Mem.Translation;
- } else if (Address >= RootBridge->PMem.Base && Address <= RootBridge->PMem.Limit) {
+ } else if ((Address >= RootBridge->PMem.Base) && (Address <= RootBridge->PMem.Limit)) {
*Translation = RootBridge->PMem.Translation;
- } else if (Address >= RootBridge->MemAbove4G.Base && Address <= RootBridge->MemAbove4G.Limit) {
+ } else if ((Address >= RootBridge->MemAbove4G.Base) && (Address <= RootBridge->MemAbove4G.Limit)) {
*Translation = RootBridge->MemAbove4G.Translation;
- } else if (Address >= RootBridge->PMemAbove4G.Base && Address <= RootBridge->PMemAbove4G.Limit) {
+ } else if ((Address >= RootBridge->PMemAbove4G.Base) && (Address <= RootBridge->PMemAbove4G.Limit)) {
*Translation = RootBridge->PMemAbove4G.Translation;
} else {
return EFI_INVALID_PARAMETER;
@@ -495,15 +528,16 @@ RootBridgeIoGetMemTranslationByAddress (
**/
UINT64
MultThenDivU64x64x32 (
- IN UINT64 Multiplicand,
- IN UINT64 Multiplier,
- IN UINT32 Divisor,
- OUT UINT32 *Remainder OPTIONAL
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
)
{
- UINT64 Uint64;
- UINT32 LocalRemainder;
- UINT32 Uint32;
+ UINT64 Uint64;
+ UINT32 LocalRemainder;
+ UINT32 Uint32;
+
if (Multiplicand > DivU64x64Remainder (MAX_UINT64, Multiplier, NULL)) {
//
// Make sure Multiplicand is the bigger one.
@@ -513,6 +547,7 @@ MultThenDivU64x64x32 (
Multiplicand = Multiplier;
Multiplier = Uint64;
}
+
//
// Because Multiplicand * Multiplier overflows,
// Multiplicand * Multiplier / Divisor
@@ -525,6 +560,7 @@ MultThenDivU64x64x32 (
if ((Multiplicand & 0x1) == 1) {
Uint64 += DivU64x32Remainder (Multiplier, Divisor, &Uint32);
}
+
return Uint64 + DivU64x32Remainder (Uint32 + LShiftU64 (LocalRemainder, 1), Divisor, Remainder);
} else {
return DivU64x32Remainder (MultU64x64 (Multiplicand, Multiplier), Divisor, Remainder);
@@ -553,7 +589,7 @@ GetElapsedTick (
UINT64 PreviousTick;
PreviousTick = *CurrentTick;
- *CurrentTick = GetPerformanceCounter();
+ *CurrentTick = GetPerformanceCounter ();
if (StartTick < EndTick) {
return *CurrentTick - PreviousTick;
} else {
@@ -638,20 +674,21 @@ RootBridgeIoPollMem (
if (Delay == 0) {
return EFI_SUCCESS;
-
} else {
//
// NumberOfTicks = Frenquency * Delay / EFI_TIMER_PERIOD_SECONDS(1)
//
Frequency = GetPerformanceCounterProperties (&StartTick, &EndTick);
- NumberOfTicks = MultThenDivU64x64x32 (Frequency, Delay, (UINT32)EFI_TIMER_PERIOD_SECONDS(1), &Remainder);
- if (Remainder >= (UINTN)EFI_TIMER_PERIOD_SECONDS(1) / 2) {
+ NumberOfTicks = MultThenDivU64x64x32 (Frequency, Delay, (UINT32)EFI_TIMER_PERIOD_SECONDS (1), &Remainder);
+ if (Remainder >= (UINTN)EFI_TIMER_PERIOD_SECONDS (1) / 2) {
NumberOfTicks++;
}
- for ( ElapsedTick = 0, CurrentTick = GetPerformanceCounter()
- ; ElapsedTick <= NumberOfTicks
- ; ElapsedTick += GetElapsedTick (&CurrentTick, StartTick, EndTick)
- ) {
+
+ for ( ElapsedTick = 0, CurrentTick = GetPerformanceCounter ()
+ ; ElapsedTick <= NumberOfTicks
+ ; ElapsedTick += GetElapsedTick (&CurrentTick, StartTick, EndTick)
+ )
+ {
Status = This->Mem.Read (This, Width, Address, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
@@ -662,6 +699,7 @@ RootBridgeIoPollMem (
}
}
}
+
return EFI_TIMEOUT;
}
@@ -734,26 +772,28 @@ RootBridgeIoPollIo (
if (EFI_ERROR (Status)) {
return Status;
}
+
if ((*Result & Mask) == Value) {
return EFI_SUCCESS;
}
if (Delay == 0) {
return EFI_SUCCESS;
-
} else {
//
// NumberOfTicks = Frenquency * Delay / EFI_TIMER_PERIOD_SECONDS(1)
//
Frequency = GetPerformanceCounterProperties (&StartTick, &EndTick);
- NumberOfTicks = MultThenDivU64x64x32 (Frequency, Delay, (UINT32)EFI_TIMER_PERIOD_SECONDS(1), &Remainder);
- if (Remainder >= (UINTN)EFI_TIMER_PERIOD_SECONDS(1) / 2) {
+ NumberOfTicks = MultThenDivU64x64x32 (Frequency, Delay, (UINT32)EFI_TIMER_PERIOD_SECONDS (1), &Remainder);
+ if (Remainder >= (UINTN)EFI_TIMER_PERIOD_SECONDS (1) / 2) {
NumberOfTicks++;
}
- for ( ElapsedTick = 0, CurrentTick = GetPerformanceCounter()
- ; ElapsedTick <= NumberOfTicks
- ; ElapsedTick += GetElapsedTick (&CurrentTick, StartTick, EndTick)
- ) {
+
+ for ( ElapsedTick = 0, CurrentTick = GetPerformanceCounter ()
+ ; ElapsedTick <= NumberOfTicks
+ ; ElapsedTick += GetElapsedTick (&CurrentTick, StartTick, EndTick)
+ )
+ {
Status = This->Io.Read (This, Width, Address, 1, Result);
if (EFI_ERROR (Status)) {
return Status;
@@ -764,6 +804,7 @@ RootBridgeIoPollIo (
}
}
}
+
return EFI_TIMEOUT;
}
@@ -804,26 +845,37 @@ RootBridgeIoMemRead (
OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- UINT64 Translation;
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ UINT64 Translation;
- Status = RootBridgeIoCheckParameter (This, MemOperation, Width, Address,
- Count, Buffer);
+ Status = RootBridgeIoCheckParameter (
+ This,
+ MemOperation,
+ Width,
+ Address,
+ Count,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
return Status;
}
RootBridge = ROOT_BRIDGE_FROM_THIS (This);
- Status = RootBridgeIoGetMemTranslationByAddress (RootBridge, Address, &Translation);
+ Status = RootBridgeIoGetMemTranslationByAddress (RootBridge, Address, &Translation);
if (EFI_ERROR (Status)) {
return Status;
}
// Address passed to CpuIo->Mem.Read needs to be a host address instead of
// device address.
- return mCpuIo->Mem.Read (mCpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width,
- TO_HOST_ADDRESS (Address, Translation), Count, Buffer);
+ return mCpuIo->Mem.Read (
+ mCpuIo,
+ (EFI_CPU_IO_PROTOCOL_WIDTH)Width,
+ TO_HOST_ADDRESS (Address, Translation),
+ Count,
+ Buffer
+ );
}
/**
@@ -863,26 +915,37 @@ RootBridgeIoMemWrite (
IN VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- UINT64 Translation;
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ UINT64 Translation;
- Status = RootBridgeIoCheckParameter (This, MemOperation, Width, Address,
- Count, Buffer);
+ Status = RootBridgeIoCheckParameter (
+ This,
+ MemOperation,
+ Width,
+ Address,
+ Count,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
return Status;
}
RootBridge = ROOT_BRIDGE_FROM_THIS (This);
- Status = RootBridgeIoGetMemTranslationByAddress (RootBridge, Address, &Translation);
+ Status = RootBridgeIoGetMemTranslationByAddress (RootBridge, Address, &Translation);
if (EFI_ERROR (Status)) {
return Status;
}
// Address passed to CpuIo->Mem.Write needs to be a host address instead of
// device address.
- return mCpuIo->Mem.Write (mCpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width,
- TO_HOST_ADDRESS (Address, Translation), Count, Buffer);
+ return mCpuIo->Mem.Write (
+ mCpuIo,
+ (EFI_CPU_IO_PROTOCOL_WIDTH)Width,
+ TO_HOST_ADDRESS (Address, Translation),
+ Count,
+ Buffer
+ );
}
/**
@@ -916,12 +979,16 @@ RootBridgeIoIoRead (
OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
Status = RootBridgeIoCheckParameter (
- This, IoOperation, Width,
- Address, Count, Buffer
+ This,
+ IoOperation,
+ Width,
+ Address,
+ Count,
+ Buffer
);
if (EFI_ERROR (Status)) {
return Status;
@@ -931,8 +998,13 @@ RootBridgeIoIoRead (
// Address passed to CpuIo->Io.Read needs to be a host address instead of
// device address.
- return mCpuIo->Io.Read (mCpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width,
- TO_HOST_ADDRESS (Address, RootBridge->Io.Translation), Count, Buffer);
+ return mCpuIo->Io.Read (
+ mCpuIo,
+ (EFI_CPU_IO_PROTOCOL_WIDTH)Width,
+ TO_HOST_ADDRESS (Address, RootBridge->Io.Translation),
+ Count,
+ Buffer
+ );
}
/**
@@ -959,19 +1031,23 @@ RootBridgeIoIoRead (
EFI_STATUS
EFIAPI
RootBridgeIoIoWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
)
{
- EFI_STATUS Status;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
Status = RootBridgeIoCheckParameter (
- This, IoOperation, Width,
- Address, Count, Buffer
+ This,
+ IoOperation,
+ Width,
+ Address,
+ Count,
+ Buffer
);
if (EFI_ERROR (Status)) {
return Status;
@@ -981,8 +1057,13 @@ RootBridgeIoIoWrite (
// Address passed to CpuIo->Io.Write needs to be a host address instead of
// device address.
- return mCpuIo->Io.Write (mCpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width,
- TO_HOST_ADDRESS (Address, RootBridge->Io.Translation), Count, Buffer);
+ return mCpuIo->Io.Write (
+ mCpuIo,
+ (EFI_CPU_IO_PROTOCOL_WIDTH)Width,
+ TO_HOST_ADDRESS (Address, RootBridge->Io.Translation),
+ Count,
+ Buffer
+ );
}
/**
@@ -1019,11 +1100,11 @@ RootBridgeIoIoWrite (
EFI_STATUS
EFIAPI
RootBridgeIoCopyMem (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 DestAddress,
- IN UINT64 SrcAddress,
- IN UINTN Count
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 DestAddress,
+ IN UINT64 SrcAddress,
+ IN UINTN Count
)
{
EFI_STATUS Status;
@@ -1032,7 +1113,7 @@ RootBridgeIoCopyMem (
UINTN Index;
UINT64 Result;
- if ((UINT32) Width > EfiPciWidthUint64) {
+ if ((UINT32)Width > EfiPciWidthUint64) {
return EFI_INVALID_PARAMETER;
}
@@ -1040,13 +1121,14 @@ RootBridgeIoCopyMem (
return EFI_SUCCESS;
}
- Stride = (UINTN) (1 << Width);
+ Stride = (UINTN)(1 << Width);
Forward = TRUE;
if ((DestAddress > SrcAddress) &&
- (DestAddress < (SrcAddress + Count * Stride))) {
- Forward = FALSE;
- SrcAddress = SrcAddress + (Count - 1) * Stride;
+ (DestAddress < (SrcAddress + Count * Stride)))
+ {
+ Forward = FALSE;
+ SrcAddress = SrcAddress + (Count - 1) * Stride;
DestAddress = DestAddress + (Count - 1) * Stride;
}
@@ -1061,6 +1143,7 @@ RootBridgeIoCopyMem (
if (EFI_ERROR (Status)) {
return Status;
}
+
Status = RootBridgeIoMemWrite (
This,
Width,
@@ -1071,18 +1154,19 @@ RootBridgeIoCopyMem (
if (EFI_ERROR (Status)) {
return Status;
}
+
if (Forward) {
- SrcAddress += Stride;
+ SrcAddress += Stride;
DestAddress += Stride;
} else {
- SrcAddress -= Stride;
+ SrcAddress -= Stride;
DestAddress -= Stride;
}
}
+
return EFI_SUCCESS;
}
-
/**
PCI configuration space access.
@@ -1101,12 +1185,12 @@ RootBridgeIoCopyMem (
EFI_STATUS
EFIAPI
RootBridgeIoPciAccess (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN BOOLEAN Read,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
EFI_STATUS Status;
@@ -1145,7 +1229,7 @@ RootBridgeIoPciAccess (
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
- Size = (UINTN) (1 << (Width & 0x03));
+ Size = (UINTN)(1 << (Width & 0x03));
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (Read) {
PciSegmentReadBuffer (Address, Size, Uint8Buffer);
@@ -1153,6 +1237,7 @@ RootBridgeIoPciAccess (
PciSegmentWriteBuffer (Address, Size, Uint8Buffer);
}
}
+
return EFI_SUCCESS;
}
@@ -1173,11 +1258,11 @@ RootBridgeIoPciAccess (
EFI_STATUS
EFIAPI
RootBridgeIoPciRead (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
return RootBridgeIoPciAccess (This, TRUE, Width, Address, Count, Buffer);
@@ -1200,11 +1285,11 @@ RootBridgeIoPciRead (
EFI_STATUS
EFIAPI
RootBridgeIoPciWrite (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN OUT VOID *Buffer
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
)
{
return RootBridgeIoPciAccess (This, FALSE, Width, Address, Count, Buffer);
@@ -1242,20 +1327,21 @@ RootBridgeIoMap (
OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- EFI_PHYSICAL_ADDRESS PhysicalAddress;
- MAP_INFO *MapInfo;
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ EFI_PHYSICAL_ADDRESS PhysicalAddress;
+ MAP_INFO *MapInfo;
- if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL ||
- Mapping == NULL) {
+ if ((HostAddress == NULL) || (NumberOfBytes == NULL) || (DeviceAddress == NULL) ||
+ (Mapping == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
//
// Make sure that Operation is valid
//
- if ((UINT32) Operation >= EfiPciOperationMaximum) {
+ if ((UINT32)Operation >= EfiPciOperationMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -1267,12 +1353,13 @@ RootBridgeIoMap (
// Clear 64bit support
//
if (Operation > EfiPciOperationBusMasterCommonBuffer) {
- Operation = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION) (Operation - EfiPciOperationBusMasterRead64);
+ Operation = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION)(Operation - EfiPciOperationBusMasterRead64);
}
}
+
Status = mIoMmu->Map (
mIoMmu,
- (EDKII_IOMMU_OPERATION) Operation,
+ (EDKII_IOMMU_OPERATION)Operation,
HostAddress,
NumberOfBytes,
DeviceAddress,
@@ -1281,21 +1368,22 @@ RootBridgeIoMap (
return Status;
}
- PhysicalAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;
+ PhysicalAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
if ((!RootBridge->DmaAbove4G ||
- (Operation != EfiPciOperationBusMasterRead64 &&
- Operation != EfiPciOperationBusMasterWrite64 &&
- Operation != EfiPciOperationBusMasterCommonBuffer64)) &&
- ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB)) {
-
+ ((Operation != EfiPciOperationBusMasterRead64) &&
+ (Operation != EfiPciOperationBusMasterWrite64) &&
+ (Operation != EfiPciOperationBusMasterCommonBuffer64))) &&
+ ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB))
+ {
//
// If the root bridge or the device cannot handle performing DMA above
// 4GB but any part of the DMA transfer being mapped is above 4GB, then
// map the DMA transfer to a buffer below 4GB.
//
- if (Operation == EfiPciOperationBusMasterCommonBuffer ||
- Operation == EfiPciOperationBusMasterCommonBuffer64) {
+ if ((Operation == EfiPciOperationBusMasterCommonBuffer) ||
+ (Operation == EfiPciOperationBusMasterCommonBuffer64))
+ {
//
// Common Buffer operations can not be remapped. If the common buffer
// if above 4GB, then it is not possible to generate a mapping, so return
@@ -1344,11 +1432,12 @@ RootBridgeIoMap (
// then copy the contents of the real buffer into the mapped buffer
// so the Bus Master can read the contents of the real buffer.
//
- if (Operation == EfiPciOperationBusMasterRead ||
- Operation == EfiPciOperationBusMasterRead64) {
+ if ((Operation == EfiPciOperationBusMasterRead) ||
+ (Operation == EfiPciOperationBusMasterRead64))
+ {
CopyMem (
- (VOID *) (UINTN) MapInfo->MappedHostAddress,
- (VOID *) (UINTN) MapInfo->HostAddress,
+ (VOID *)(UINTN)MapInfo->MappedHostAddress,
+ (VOID *)(UINTN)MapInfo->HostAddress,
MapInfo->NumberOfBytes
);
}
@@ -1362,7 +1451,7 @@ RootBridgeIoMap (
//
// Return a pointer to the MAP_INFO structure in Mapping
//
- *Mapping = MapInfo;
+ *Mapping = MapInfo;
} else {
//
// If the root bridge CAN handle performing DMA above 4GB or
@@ -1400,9 +1489,9 @@ RootBridgeIoUnmap (
IN VOID *Mapping
)
{
- MAP_INFO *MapInfo;
- LIST_ENTRY *Link;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ MAP_INFO *MapInfo;
+ LIST_ENTRY *Link;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
EFI_STATUS Status;
if (mIoMmu != NULL) {
@@ -1428,18 +1517,21 @@ RootBridgeIoUnmap (
for (Link = GetFirstNode (&RootBridge->Maps)
; !IsNull (&RootBridge->Maps, Link)
; Link = GetNextNode (&RootBridge->Maps, Link)
- ) {
+ )
+ {
MapInfo = MAP_INFO_FROM_LINK (Link);
if (MapInfo == Mapping) {
break;
}
}
+
//
// Mapping is not a valid value returned by Map()
//
if (MapInfo != Mapping) {
return EFI_INVALID_PARAMETER;
}
+
RemoveEntryList (&MapInfo->Link);
//
@@ -1447,11 +1539,12 @@ RootBridgeIoUnmap (
// then copy the contents of the mapped buffer into the real buffer
// so the processor can read the contents of the real buffer.
//
- if (MapInfo->Operation == EfiPciOperationBusMasterWrite ||
- MapInfo->Operation == EfiPciOperationBusMasterWrite64) {
+ if ((MapInfo->Operation == EfiPciOperationBusMasterWrite) ||
+ (MapInfo->Operation == EfiPciOperationBusMasterWrite64))
+ {
CopyMem (
- (VOID *) (UINTN) MapInfo->HostAddress,
- (VOID *) (UINTN) MapInfo->MappedHostAddress,
+ (VOID *)(UINTN)MapInfo->HostAddress,
+ (VOID *)(UINTN)MapInfo->MappedHostAddress,
MapInfo->NumberOfBytes
);
}
@@ -1524,8 +1617,9 @@ RootBridgeIoAllocateBuffer (
// The only valid memory types are EfiBootServicesData and
// EfiRuntimeServicesData
//
- if (MemoryType != EfiBootServicesData &&
- MemoryType != EfiRuntimeServicesData) {
+ if ((MemoryType != EfiBootServicesData) &&
+ (MemoryType != EfiRuntimeServicesData))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1536,8 +1630,9 @@ RootBridgeIoAllocateBuffer (
//
// Clear DUAL_ADDRESS_CYCLE
//
- Attributes &= ~((UINT64) EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
+ Attributes &= ~((UINT64)EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE);
}
+
Status = mIoMmu->AllocateBuffer (
mIoMmu,
Type,
@@ -1551,13 +1646,15 @@ RootBridgeIoAllocateBuffer (
AllocateType = AllocateAnyPages;
if (!RootBridge->DmaAbove4G ||
- (Attributes & EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0) {
+ ((Attributes & EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0))
+ {
//
// Limit allocations to memory below 4GB
//
AllocateType = AllocateMaxAddress;
- PhysicalAddress = (EFI_PHYSICAL_ADDRESS) (SIZE_4GB - 1);
+ PhysicalAddress = (EFI_PHYSICAL_ADDRESS)(SIZE_4GB - 1);
}
+
Status = gBS->AllocatePages (
AllocateType,
MemoryType,
@@ -1565,7 +1662,7 @@ RootBridgeIoAllocateBuffer (
&PhysicalAddress
);
if (!EFI_ERROR (Status)) {
- *HostAddress = (VOID *) (UINTN) PhysicalAddress;
+ *HostAddress = (VOID *)(UINTN)PhysicalAddress;
}
return Status;
@@ -1593,7 +1690,7 @@ RootBridgeIoFreeBuffer (
OUT VOID *HostAddress
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (mIoMmu != NULL) {
Status = mIoMmu->FreeBuffer (
@@ -1604,7 +1701,7 @@ RootBridgeIoFreeBuffer (
return Status;
}
- return gBS->FreePages ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress, Pages);
+ return gBS->FreePages ((EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, Pages);
}
/**
@@ -1631,7 +1728,7 @@ RootBridgeIoFreeBuffer (
EFI_STATUS
EFIAPI
RootBridgeIoFlush (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
)
{
return EFI_SUCCESS;
@@ -1667,9 +1764,9 @@ RootBridgeIoGetAttributes (
OUT UINT64 *Attributes
)
{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- if (Attributes == NULL && Supported == NULL) {
+ if ((Attributes == NULL) && (Supported == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1678,7 +1775,7 @@ RootBridgeIoGetAttributes (
// Set the return value for Supported and Attributes
//
if (Supported != NULL) {
- *Supported = RootBridge->Supports;
+ *Supported = RootBridge->Supports;
}
if (Attributes != NULL) {
@@ -1733,7 +1830,7 @@ RootBridgeIoSetAttributes (
IN OUT UINT64 *ResourceLength
)
{
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
RootBridge = ROOT_BRIDGE_FROM_THIS (This);
@@ -1773,15 +1870,15 @@ RootBridgeIoSetAttributes (
EFI_STATUS
EFIAPI
RootBridgeIoConfiguration (
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
- OUT VOID **Resources
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ OUT VOID **Resources
)
{
- PCI_RESOURCE_TYPE Index;
- PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
- PCI_RES_NODE *ResAllocNode;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
- EFI_ACPI_END_TAG_DESCRIPTOR *End;
+ PCI_RESOURCE_TYPE Index;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
+ PCI_RES_NODE *ResAllocNode;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;
//
// Get this instance of the Root Bridge.
@@ -1793,7 +1890,6 @@ RootBridgeIoConfiguration (
);
Descriptor = RootBridge->ConfigBuffer;
for (Index = TypeIo; Index < TypeMax; Index++) {
-
ResAllocNode = &RootBridge->ResAllocNode[Index];
if (ResAllocNode->Status != ResAllocated) {
@@ -1805,48 +1901,48 @@ RootBridgeIoConfiguration (
// According to UEFI 2.7, RootBridgeIo->Configuration should return address
// range in CPU view (host address), and ResAllocNode->Base is already a CPU
// view address (host address).
- Descriptor->AddrRangeMin = ResAllocNode->Base;
- Descriptor->AddrRangeMax = ResAllocNode->Base + ResAllocNode->Length - 1;
- Descriptor->AddrLen = ResAllocNode->Length;
+ Descriptor->AddrRangeMin = ResAllocNode->Base;
+ Descriptor->AddrRangeMax = ResAllocNode->Base + ResAllocNode->Length - 1;
+ Descriptor->AddrLen = ResAllocNode->Length;
Descriptor->AddrTranslationOffset = GetTranslationByResourceType (
- RootBridge,
- ResAllocNode->Type
- );
+ RootBridge,
+ ResAllocNode->Type
+ );
switch (ResAllocNode->Type) {
-
- case TypeIo:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
- break;
-
- case TypePMem32:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem32:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 32;
- break;
-
- case TypePMem64:
- Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
- case TypeMem64:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
- Descriptor->AddrSpaceGranularity = 64;
- break;
-
- case TypeBus:
- Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
- break;
-
- default:
- break;
+ case TypeIo:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ break;
+
+ case TypePMem32:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem32:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 32;
+ break;
+
+ case TypePMem64:
+ Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ case TypeMem64:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ Descriptor->AddrSpaceGranularity = 64;
+ break;
+
+ case TypeBus:
+ Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
+ break;
+
+ default:
+ break;
}
Descriptor++;
}
+
//
// Terminate the entries.
//
- End = (EFI_ACPI_END_TAG_DESCRIPTOR *) Descriptor;
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor;
End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0x0;
diff --git a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ComponentName.c
index 68b0de8edb..eca2adb246 100644
--- a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ComponentName.c
@@ -20,14 +20,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponen
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SerialComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SerialComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SerialComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SerialComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSerialDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSerialDriverNameTable[] = {
{
"eng;en",
L"PCI SIO Serial Driver"
@@ -165,11 +164,11 @@ SerialComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SerialComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -182,18 +181,18 @@ SerialComponentNameGetControllerName (
// Make sure this driver is currently managing ControllerHandle
//
IoProtocolGuid = &gEfiSioProtocolGuid;
- Status = EfiTestManagedDevice (
- ControllerHandle,
- gSerialControllerDriver.DriverBindingHandle,
- IoProtocolGuid
- );
+ Status = EfiTestManagedDevice (
+ ControllerHandle,
+ gSerialControllerDriver.DriverBindingHandle,
+ IoProtocolGuid
+ );
if (EFI_ERROR (Status)) {
IoProtocolGuid = &gEfiPciIoProtocolGuid;
- Status = EfiTestManagedDevice (
- ControllerHandle,
- gSerialControllerDriver.DriverBindingHandle,
- IoProtocolGuid
- );
+ Status = EfiTestManagedDevice (
+ ControllerHandle,
+ gSerialControllerDriver.DriverBindingHandle,
+ IoProtocolGuid
+ );
}
if (EFI_ERROR (Status)) {
@@ -217,7 +216,7 @@ SerialComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiSerialIoProtocolGuid,
- (VOID **) &SerialIo,
+ (VOID **)&SerialIo,
gSerialControllerDriver.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -229,7 +228,7 @@ SerialComponentNameGetControllerName (
//
// Get the Serial Controller's Device structure
//
- SerialDevice = SERIAL_DEV_FROM_THIS (SerialIo);
+ SerialDevice = SERIAL_DEV_FROM_THIS (SerialIo);
ControllerNameTable = SerialDevice->ControllerNameTable;
}
@@ -250,11 +249,12 @@ SerialComponentNameGetControllerName (
**/
VOID
AddName (
- IN SERIAL_DEV *SerialDevice,
- IN UINT32 Instance
+ IN SERIAL_DEV *SerialDevice,
+ IN UINT32 Instance
)
{
- CHAR16 SerialPortName[SERIAL_PORT_NAME_LEN];
+ CHAR16 SerialPortName[SERIAL_PORT_NAME_LEN];
+
UnicodeSPrint (
SerialPortName,
sizeof (SerialPortName),
@@ -275,5 +275,4 @@ AddName (
SerialPortName,
FALSE
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.c b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.c
index 7ce2e06afe..2b5ff0a37a 100644
--- a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.c
+++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.c
@@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// ISA Serial Driver Global Variables
//
-EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver = {
+EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver = {
SerialControllerDriverSupported,
SerialControllerDriverStart,
SerialControllerDriverStop,
@@ -21,13 +21,13 @@ EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver = {
NULL
};
-CONTROLLER_DEVICE_PATH mControllerDevicePathTemplate = {
+CONTROLLER_DEVICE_PATH mControllerDevicePathTemplate = {
{
HARDWARE_DEVICE_PATH,
HW_CONTROLLER_DP,
{
- (UINT8) (sizeof (CONTROLLER_DEVICE_PATH)),
- (UINT8) ((sizeof (CONTROLLER_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (CONTROLLER_DEVICE_PATH)),
+ (UINT8)((sizeof (CONTROLLER_DEVICE_PATH)) >> 8)
}
},
0
@@ -62,26 +62,26 @@ SERIAL_DEV gSerialDevTemplate = {
MESSAGING_DEVICE_PATH,
MSG_UART_DP,
{
- (UINT8) (sizeof (UART_DEVICE_PATH)),
- (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (UART_DEVICE_PATH)),
+ (UINT8)((sizeof (UART_DEVICE_PATH)) >> 8)
}
},
- 0, 0, 0, 0, 0
- }, // UartDevicePath
- 0, // BaseAddress
- FALSE, // MmioAccess
- 1, // RegisterStride
- 0, // ClockRate
- 16, // ReceiveFifoDepth
- { 0, 0 }, // Receive;
- 16, // TransmitFifoDepth
- { 0, 0 }, // Transmit;
- FALSE, // SoftwareLoopbackEnable;
- FALSE, // HardwareFlowControl;
- NULL, // *ControllerNameTable;
- FALSE, // ContainsControllerNode;
- 0, // Instance;
- NULL // *PciDeviceInfo;
+ 0, 0,0, 0, 0
+ }, // UartDevicePath
+ 0, // BaseAddress
+ FALSE, // MmioAccess
+ 1, // RegisterStride
+ 0, // ClockRate
+ 16, // ReceiveFifoDepth
+ { 0, 0 }, // Receive;
+ 16, // TransmitFifoDepth
+ { 0, 0 }, // Transmit;
+ FALSE, // SoftwareLoopbackEnable;
+ FALSE, // HardwareFlowControl;
+ NULL, // *ControllerNameTable;
+ FALSE, // ContainsControllerNode;
+ 0, // Instance;
+ NULL // *PciDeviceInfo;
};
/**
@@ -95,14 +95,14 @@ SERIAL_DEV gSerialDevTemplate = {
**/
BOOLEAN
IsUartFlowControlDevicePathNode (
- IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl
+ IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl
)
{
- return (BOOLEAN) (
- (DevicePathType (FlowControl) == MESSAGING_DEVICE_PATH) &&
- (DevicePathSubType (FlowControl) == MSG_VENDOR_DP) &&
- (CompareGuid (&FlowControl->Guid, &gEfiUartDevicePathGuid))
- );
+ return (BOOLEAN)(
+ (DevicePathType (FlowControl) == MESSAGING_DEVICE_PATH) &&
+ (DevicePathSubType (FlowControl) == MSG_VENDOR_DP) &&
+ (CompareGuid (&FlowControl->Guid, &gEfiUartDevicePathGuid))
+ );
}
/**
@@ -118,11 +118,11 @@ IsUartFlowControlDevicePathNode (
EFI_STATUS
EFIAPI
InitializePciSioSerial (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -140,15 +140,15 @@ InitializePciSioSerial (
//
// Initialize UART default setting in gSerialDevTempate
//
- gSerialDevTemplate.SerialMode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);
- gSerialDevTemplate.SerialMode.DataBits = PcdGet8 (PcdUartDefaultDataBits);
- gSerialDevTemplate.SerialMode.Parity = PcdGet8 (PcdUartDefaultParity);
- gSerialDevTemplate.SerialMode.StopBits = PcdGet8 (PcdUartDefaultStopBits);
+ gSerialDevTemplate.SerialMode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);
+ gSerialDevTemplate.SerialMode.DataBits = PcdGet8 (PcdUartDefaultDataBits);
+ gSerialDevTemplate.SerialMode.Parity = PcdGet8 (PcdUartDefaultParity);
+ gSerialDevTemplate.SerialMode.StopBits = PcdGet8 (PcdUartDefaultStopBits);
gSerialDevTemplate.UartDevicePath.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);
gSerialDevTemplate.UartDevicePath.DataBits = PcdGet8 (PcdUartDefaultDataBits);
gSerialDevTemplate.UartDevicePath.Parity = PcdGet8 (PcdUartDefaultParity);
gSerialDevTemplate.UartDevicePath.StopBits = PcdGet8 (PcdUartDefaultStopBits);
- gSerialDevTemplate.ClockRate = PcdGet32 (PcdSerialClockRate);
+ gSerialDevTemplate.ClockRate = PcdGet32 (PcdSerialClockRate);
return Status;
}
@@ -163,13 +163,13 @@ InitializePciSioSerial (
**/
EFI_STATUS
IsSioSerialController (
- EFI_HANDLE Controller
+ EFI_HANDLE Controller
)
{
- EFI_STATUS Status;
- EFI_SIO_PROTOCOL *Sio;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- ACPI_HID_DEVICE_PATH *Acpi;
+ EFI_STATUS Status;
+ EFI_SIO_PROTOCOL *Sio;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ ACPI_HID_DEVICE_PATH *Acpi;
//
// Open the IO Abstraction(s) needed to perform the supported test
@@ -177,7 +177,7 @@ IsSioSerialController (
Status = gBS->OpenProtocol (
Controller,
&gEfiSioProtocolGuid,
- (VOID **) &Sio,
+ (VOID **)&Sio,
gSerialControllerDriver.DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -198,25 +198,26 @@ IsSioSerialController (
);
Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
- gSerialControllerDriver.DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&DevicePath,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
ASSERT (Status != EFI_ALREADY_STARTED);
if (!EFI_ERROR (Status)) {
do {
- Acpi = (ACPI_HID_DEVICE_PATH *) DevicePath;
+ Acpi = (ACPI_HID_DEVICE_PATH *)DevicePath;
DevicePath = NextDevicePathNode (DevicePath);
} while (!IsDevicePathEnd (DevicePath));
- if (DevicePathType (Acpi) != ACPI_DEVICE_PATH ||
- (DevicePathSubType (Acpi) != ACPI_DP && DevicePathSubType (Acpi) != ACPI_EXTENDED_DP) ||
- Acpi->HID != EISA_PNP_ID (0x501)
- ) {
+ if ((DevicePathType (Acpi) != ACPI_DEVICE_PATH) ||
+ ((DevicePathSubType (Acpi) != ACPI_DP) && (DevicePathSubType (Acpi) != ACPI_EXTENDED_DP)) ||
+ (Acpi->HID != EISA_PNP_ID (0x501))
+ )
+ {
Status = EFI_UNSUPPORTED;
}
}
@@ -225,12 +226,13 @@ IsSioSerialController (
// Close protocol, don't use device path protocol in the Support() function
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- gSerialControllerDriver.DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller
+ );
}
+
return Status;
}
@@ -244,26 +246,26 @@ IsSioSerialController (
**/
EFI_STATUS
IsPciSerialController (
- EFI_HANDLE Controller
+ EFI_HANDLE Controller
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- PCI_TYPE00 Pci;
- PCI_SERIAL_PARAMETER *PciSerialParameter;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ PCI_TYPE00 Pci;
+ PCI_SERIAL_PARAMETER *PciSerialParameter;
//
// Open the IO Abstraction(s) needed to perform the supported test
//
Status = gBS->OpenProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
- gSerialControllerDriver.DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ (VOID **)&PciIo,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (Status == EFI_ALREADY_STARTED) {
return EFI_SUCCESS;
}
@@ -272,16 +274,19 @@ IsPciSerialController (
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (Pci), &Pci);
if (!EFI_ERROR (Status)) {
if (!IS_PCI_16550_SERIAL (&Pci)) {
- for (PciSerialParameter = (PCI_SERIAL_PARAMETER *) PcdGetPtr (PcdPciSerialParameters)
+ for (PciSerialParameter = (PCI_SERIAL_PARAMETER *)PcdGetPtr (PcdPciSerialParameters)
; PciSerialParameter->VendorId != 0xFFFF
; PciSerialParameter++
- ) {
+ )
+ {
if ((Pci.Hdr.VendorId == PciSerialParameter->VendorId) &&
(Pci.Hdr.DeviceId == PciSerialParameter->DeviceId)
- ) {
+ )
+ {
break;
}
}
+
if (PciSerialParameter->VendorId == 0xFFFF) {
Status = EFI_UNSUPPORTED;
} else {
@@ -294,12 +299,13 @@ IsPciSerialController (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- gSerialControllerDriver.DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller
+ );
}
+
if (EFI_ERROR (Status)) {
return Status;
}
@@ -308,24 +314,24 @@ IsPciSerialController (
// Open the EFI Device Path protocol needed to perform the supported test
//
Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
- gSerialControllerDriver.DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&DevicePath,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
ASSERT (Status != EFI_ALREADY_STARTED);
//
// Close protocol, don't use device path protocol in the Support() function
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- gSerialControllerDriver.DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller
+ );
return Status;
}
@@ -343,15 +349,15 @@ IsPciSerialController (
EFI_STATUS
EFIAPI
SerialControllerDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- UART_DEVICE_PATH *Uart;
- UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
+ EFI_STATUS Status;
+ UART_DEVICE_PATH *Uart;
+ UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
//
// Test RemainingDevicePath
@@ -360,10 +366,11 @@ SerialControllerDriverSupported (
Status = EFI_UNSUPPORTED;
Uart = SkipControllerDevicePathNode (RemainingDevicePath, NULL, NULL);
- if (DevicePathType (Uart) != MESSAGING_DEVICE_PATH ||
- DevicePathSubType (Uart) != MSG_UART_DP ||
- DevicePathNodeLength (Uart) != sizeof (UART_DEVICE_PATH)
- ) {
+ if ((DevicePathType (Uart) != MESSAGING_DEVICE_PATH) ||
+ (DevicePathSubType (Uart) != MSG_UART_DP) ||
+ (DevicePathNodeLength (Uart) != sizeof (UART_DEVICE_PATH))
+ )
+ {
return EFI_UNSUPPORTED;
}
@@ -374,7 +381,7 @@ SerialControllerDriverSupported (
return EFI_UNSUPPORTED;
}
- FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *) NextDevicePathNode (Uart);
+ FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *)NextDevicePathNode (Uart);
if (IsUartFlowControlDevicePathNode (FlowControl)) {
//
// If the second node is Flow Control Node,
@@ -390,6 +397,7 @@ SerialControllerDriverSupported (
if (EFI_ERROR (Status)) {
Status = IsPciSerialController (Controller);
}
+
return Status;
}
@@ -415,31 +423,31 @@ SerialControllerDriverSupported (
**/
EFI_STATUS
CreateSerialDevice (
- IN EFI_HANDLE Controller,
- IN UART_DEVICE_PATH *Uart,
- IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
- IN BOOLEAN CreateControllerNode,
- IN UINT32 Instance,
- IN PARENT_IO_PROTOCOL_PTR ParentIo,
- IN PCI_SERIAL_PARAMETER *PciSerialParameter OPTIONAL,
- IN PCI_DEVICE_INFO *PciDeviceInfo OPTIONAL
+ IN EFI_HANDLE Controller,
+ IN UART_DEVICE_PATH *Uart,
+ IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
+ IN BOOLEAN CreateControllerNode,
+ IN UINT32 Instance,
+ IN PARENT_IO_PROTOCOL_PTR ParentIo,
+ IN PCI_SERIAL_PARAMETER *PciSerialParameter OPTIONAL,
+ IN PCI_DEVICE_INFO *PciDeviceInfo OPTIONAL
)
{
- EFI_STATUS Status;
- SERIAL_DEV *SerialDevice;
- UINT8 BarIndex;
- UINT64 Offset;
- UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
- UINT32 FlowControlMap;
- ACPI_RESOURCE_HEADER_PTR Resources;
- EFI_ACPI_IO_PORT_DESCRIPTOR *Io;
- EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIo;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AddressSpace;
- EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
-
- BarIndex = 0;
- Offset = 0;
- FlowControl = NULL;
+ EFI_STATUS Status;
+ SERIAL_DEV *SerialDevice;
+ UINT8 BarIndex;
+ UINT64 Offset;
+ UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
+ UINT32 FlowControlMap;
+ ACPI_RESOURCE_HEADER_PTR Resources;
+ EFI_ACPI_IO_PORT_DESCRIPTOR *Io;
+ EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *FixedIo;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AddressSpace;
+ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
+
+ BarIndex = 0;
+ Offset = 0;
+ FlowControl = NULL;
FlowControlMap = 0;
//
@@ -455,7 +463,7 @@ CreateSerialDevice (
if (Uart != NULL) {
CopyMem (&SerialDevice->UartDevicePath, Uart, sizeof (UART_DEVICE_PATH));
- FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *) NextDevicePathNode (Uart);
+ FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *)NextDevicePathNode (Uart);
if (IsUartFlowControlDevicePathNode (FlowControl)) {
FlowControlMap = ReadUnaligned32 (&FlowControl->FlowControlMap);
} else {
@@ -468,16 +476,19 @@ CreateSerialDevice (
//
if (PciSerialParameter != NULL) {
BarIndex = (PciSerialParameter->BarIndex == MAX_UINT8) ? 0 : PciSerialParameter->BarIndex;
- Offset = PciSerialParameter->Offset;
+ Offset = PciSerialParameter->Offset;
if (PciSerialParameter->RegisterStride != 0) {
SerialDevice->RegisterStride = PciSerialParameter->RegisterStride;
}
+
if (PciSerialParameter->ClockRate != 0) {
SerialDevice->ClockRate = PciSerialParameter->ClockRate;
}
+
if (PciSerialParameter->ReceiveFifoDepth != 0) {
SerialDevice->ReceiveFifoDepth = PciSerialParameter->ReceiveFifoDepth;
}
+
if (PciSerialParameter->TransmitFifoDepth != 0) {
SerialDevice->TransmitFifoDepth = PciSerialParameter->TransmitFifoDepth;
}
@@ -487,9 +498,16 @@ CreateSerialDevice (
// Pass NULL ActualBaudRate to VerifyUartParameters to disallow baudrate degrade.
// DriverBindingStart() shouldn't create a handle with different UART device path.
//
- if (!VerifyUartParameters (SerialDevice->ClockRate, SerialDevice->UartDevicePath.BaudRate, SerialDevice->UartDevicePath.DataBits,
- SerialDevice->UartDevicePath.Parity, SerialDevice->UartDevicePath.StopBits, NULL, NULL
- )) {
+ if (!VerifyUartParameters (
+ SerialDevice->ClockRate,
+ SerialDevice->UartDevicePath.BaudRate,
+ SerialDevice->UartDevicePath.DataBits,
+ SerialDevice->UartDevicePath.Parity,
+ SerialDevice->UartDevicePath.StopBits,
+ NULL,
+ NULL
+ ))
+ {
Status = EFI_INVALID_PARAMETER;
goto CreateError;
}
@@ -497,7 +515,7 @@ CreateSerialDevice (
if (PciSerialParameter == NULL) {
Status = ParentIo.Sio->GetResources (ParentIo.Sio, &Resources);
} else {
- Status = ParentIo.PciIo->GetBarAttributes (ParentIo.PciIo, BarIndex, NULL, (VOID **) &Resources);
+ Status = ParentIo.PciIo->GetBarAttributes (ParentIo.PciIo, BarIndex, NULL, (VOID **)&Resources);
}
if (!EFI_ERROR (Status)) {
@@ -508,39 +526,43 @@ CreateSerialDevice (
//
while ((Resources.SmallHeader->Byte != ACPI_END_TAG_DESCRIPTOR) && (SerialDevice->BaseAddress == 0)) {
switch (Resources.SmallHeader->Byte) {
- case ACPI_IO_PORT_DESCRIPTOR:
- Io = (EFI_ACPI_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
- if (Io->Length != 0) {
- SerialDevice->BaseAddress = Io->BaseAddressMin;
- }
- break;
+ case ACPI_IO_PORT_DESCRIPTOR:
+ Io = (EFI_ACPI_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
+ if (Io->Length != 0) {
+ SerialDevice->BaseAddress = Io->BaseAddressMin;
+ }
- case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
- FixedIo = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *) Resources.SmallHeader;
- if (FixedIo->Length != 0) {
- SerialDevice->BaseAddress = FixedIo->BaseAddress;
- }
- break;
+ break;
- case ACPI_ADDRESS_SPACE_DESCRIPTOR:
- AddressSpace = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Resources.SmallHeader;
- if (AddressSpace->AddrLen != 0) {
- if (AddressSpace->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
- SerialDevice->MmioAccess = TRUE;
+ case ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR:
+ FixedIo = (EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR *)Resources.SmallHeader;
+ if (FixedIo->Length != 0) {
+ SerialDevice->BaseAddress = FixedIo->BaseAddress;
}
- SerialDevice->BaseAddress = AddressSpace->AddrRangeMin + Offset;
- }
- break;
+
+ break;
+
+ case ACPI_ADDRESS_SPACE_DESCRIPTOR:
+ AddressSpace = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Resources.SmallHeader;
+ if (AddressSpace->AddrLen != 0) {
+ if (AddressSpace->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
+ SerialDevice->MmioAccess = TRUE;
+ }
+
+ SerialDevice->BaseAddress = AddressSpace->AddrRangeMin + Offset;
+ }
+
+ break;
}
if (Resources.SmallHeader->Bits.Type == 0) {
- Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *) ((UINT8 *) Resources.SmallHeader
- + Resources.SmallHeader->Bits.Length
- + sizeof (*Resources.SmallHeader));
+ Resources.SmallHeader = (ACPI_SMALL_RESOURCE_HEADER *)((UINT8 *)Resources.SmallHeader
+ + Resources.SmallHeader->Bits.Length
+ + sizeof (*Resources.SmallHeader));
} else {
- Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *) ((UINT8 *) Resources.LargeHeader
- + Resources.LargeHeader->Length
- + sizeof (*Resources.LargeHeader));
+ Resources.LargeHeader = (ACPI_LARGE_RESOURCE_HEADER *)((UINT8 *)Resources.LargeHeader
+ + Resources.LargeHeader->Length
+ + sizeof (*Resources.LargeHeader));
}
}
}
@@ -550,7 +572,7 @@ CreateSerialDevice (
goto CreateError;
}
- SerialDevice->HardwareFlowControl = (BOOLEAN) (FlowControlMap == UART_FLOW_CONTROL_HARDWARE);
+ SerialDevice->HardwareFlowControl = (BOOLEAN)(FlowControlMap == UART_FLOW_CONTROL_HARDWARE);
//
// Report status code the serial present
@@ -576,10 +598,10 @@ CreateSerialDevice (
//
if (CreateControllerNode) {
mControllerDevicePathTemplate.ControllerNumber = SerialDevice->Instance;
- SerialDevice->DevicePath = AppendDevicePathNode (
- SerialDevice->ParentDevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &mControllerDevicePathTemplate
- );
+ SerialDevice->DevicePath = AppendDevicePathNode (
+ SerialDevice->ParentDevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mControllerDevicePathTemplate
+ );
SerialDevice->ContainsControllerNode = TRUE;
}
@@ -592,15 +614,16 @@ CreateSerialDevice (
if (TempDevicePath != NULL) {
SerialDevice->DevicePath = AppendDevicePathNode (
TempDevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &SerialDevice->UartDevicePath
+ (EFI_DEVICE_PATH_PROTOCOL *)&SerialDevice->UartDevicePath
);
FreePool (TempDevicePath);
} else {
SerialDevice->DevicePath = AppendDevicePathNode (
SerialDevice->ParentDevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) &SerialDevice->UartDevicePath
+ (EFI_DEVICE_PATH_PROTOCOL *)&SerialDevice->UartDevicePath
);
}
+
//
// 3. Append the Flow Control device path node.
// Only produce the Flow Control node when remaining device path has it
@@ -610,11 +633,12 @@ CreateSerialDevice (
if (TempDevicePath != NULL) {
SerialDevice->DevicePath = AppendDevicePathNode (
TempDevicePath,
- (EFI_DEVICE_PATH_PROTOCOL *) FlowControl
+ (EFI_DEVICE_PATH_PROTOCOL *)FlowControl
);
FreePool (TempDevicePath);
}
}
+
ASSERT (SerialDevice->DevicePath != NULL);
//
@@ -644,20 +668,23 @@ CreateSerialDevice (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&SerialDevice->Handle,
- &gEfiDevicePathProtocolGuid, SerialDevice->DevicePath,
- &gEfiSerialIoProtocolGuid, &SerialDevice->SerialIo,
+ &gEfiDevicePathProtocolGuid,
+ SerialDevice->DevicePath,
+ &gEfiSerialIoProtocolGuid,
+ &SerialDevice->SerialIo,
NULL
);
if (EFI_ERROR (Status)) {
goto CreateError;
}
+
//
// Open For Child Device
//
Status = gBS->OpenProtocol (
Controller,
PciSerialParameter != NULL ? &gEfiPciIoProtocolGuid : &gEfiSioProtocolGuid,
- (VOID **) &ParentIo,
+ (VOID **)&ParentIo,
gSerialControllerDriver.DriverBindingHandle,
SerialDevice->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -666,8 +693,10 @@ CreateSerialDevice (
if (EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
SerialDevice->Handle,
- &gEfiDevicePathProtocolGuid, SerialDevice->DevicePath,
- &gEfiSerialIoProtocolGuid, &SerialDevice->SerialIo,
+ &gEfiDevicePathProtocolGuid,
+ SerialDevice->DevicePath,
+ &gEfiSerialIoProtocolGuid,
+ &SerialDevice->SerialIo,
NULL
);
}
@@ -677,11 +706,14 @@ CreateError:
if (SerialDevice->DevicePath != NULL) {
FreePool (SerialDevice->DevicePath);
}
+
if (SerialDevice->ControllerNameTable != NULL) {
FreeUnicodeStringTable (SerialDevice->ControllerNameTable);
}
+
FreePool (SerialDevice);
}
+
return Status;
}
@@ -697,18 +729,18 @@ CreateError:
**/
SERIAL_DEV **
GetChildSerialDevices (
- IN EFI_HANDLE Controller,
- IN EFI_GUID *IoProtocolGuid,
- OUT UINTN *Count
+ IN EFI_HANDLE Controller,
+ IN EFI_GUID *IoProtocolGuid,
+ OUT UINTN *Count
)
{
- EFI_STATUS Status;
- UINTN Index;
- EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
- UINTN EntryCount;
- SERIAL_DEV **SerialDevices;
- EFI_SERIAL_IO_PROTOCOL *SerialIo;
- BOOLEAN OpenByDriver;
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;
+ UINTN EntryCount;
+ SERIAL_DEV **SerialDevices;
+ EFI_SERIAL_IO_PROTOCOL *SerialIo;
+ BOOLEAN OpenByDriver;
*Count = 0;
//
@@ -716,11 +748,11 @@ GetChildSerialDevices (
// update the attributes/control.
//
Status = gBS->OpenProtocolInformation (
- Controller,
- IoProtocolGuid,
- &OpenInfoBuffer,
- &EntryCount
- );
+ Controller,
+ IoProtocolGuid,
+ &OpenInfoBuffer,
+ &EntryCount
+ );
if (EFI_ERROR (Status)) {
return NULL;
}
@@ -728,29 +760,29 @@ GetChildSerialDevices (
SerialDevices = AllocatePool (EntryCount * sizeof (SERIAL_DEV *));
ASSERT (SerialDevices != NULL);
- *Count = 0;
+ *Count = 0;
OpenByDriver = FALSE;
for (Index = 0; Index < EntryCount; Index++) {
if ((OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {
Status = gBS->OpenProtocol (
- OpenInfoBuffer[Index].ControllerHandle,
- &gEfiSerialIoProtocolGuid,
- (VOID **) &SerialIo,
- gSerialControllerDriver.DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
+ OpenInfoBuffer[Index].ControllerHandle,
+ &gEfiSerialIoProtocolGuid,
+ (VOID **)&SerialIo,
+ gSerialControllerDriver.DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
if (!EFI_ERROR (Status)) {
SerialDevices[(*Count)++] = SERIAL_DEV_FROM_THIS (SerialIo);
}
}
-
if ((OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) != 0) {
ASSERT (OpenInfoBuffer[Index].AgentHandle == gSerialControllerDriver.DriverBindingHandle);
OpenByDriver = TRUE;
}
}
+
if (OpenInfoBuffer != NULL) {
FreePool (OpenInfoBuffer);
}
@@ -772,32 +804,32 @@ GetChildSerialDevices (
EFI_STATUS
EFIAPI
SerialControllerDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- UINTN Index;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *Node;
- EFI_SERIAL_IO_PROTOCOL *SerialIo;
- UINT32 ControllerNumber;
- UART_DEVICE_PATH *Uart;
- UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
- UINT32 Control;
- PARENT_IO_PROTOCOL_PTR ParentIo;
- ACPI_HID_DEVICE_PATH *Acpi;
- EFI_GUID *IoProtocolGuid;
- PCI_SERIAL_PARAMETER *PciSerialParameter;
- PCI_SERIAL_PARAMETER DefaultPciSerialParameter;
- PCI_TYPE00 Pci;
- UINT32 PciSerialCount;
- SERIAL_DEV **SerialDevices;
- UINTN SerialDeviceCount;
- PCI_DEVICE_INFO *PciDeviceInfo;
- UINT64 Supports;
- BOOLEAN ContainsControllerNode;
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *Node;
+ EFI_SERIAL_IO_PROTOCOL *SerialIo;
+ UINT32 ControllerNumber;
+ UART_DEVICE_PATH *Uart;
+ UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
+ UINT32 Control;
+ PARENT_IO_PROTOCOL_PTR ParentIo;
+ ACPI_HID_DEVICE_PATH *Acpi;
+ EFI_GUID *IoProtocolGuid;
+ PCI_SERIAL_PARAMETER *PciSerialParameter;
+ PCI_SERIAL_PARAMETER DefaultPciSerialParameter;
+ PCI_TYPE00 Pci;
+ UINT32 PciSerialCount;
+ SERIAL_DEV **SerialDevices;
+ UINTN SerialDeviceCount;
+ PCI_DEVICE_INFO *PciDeviceInfo;
+ UINT64 Supports;
+ BOOLEAN ContainsControllerNode;
//
// Get the Parent Device Path
@@ -805,14 +837,15 @@ SerialControllerDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
);
- if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) {
+ if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
return Status;
}
+
//
// Report status code enable the serial
//
@@ -826,25 +859,26 @@ SerialControllerDriverStart (
// Grab the IO abstraction we need to get any work done
//
IoProtocolGuid = &gEfiSioProtocolGuid;
- Status = gBS->OpenProtocol (
- Controller,
- IoProtocolGuid,
- (VOID **) &ParentIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) {
+ Status = gBS->OpenProtocol (
+ Controller,
+ IoProtocolGuid,
+ (VOID **)&ParentIo,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
+ if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
IoProtocolGuid = &gEfiPciIoProtocolGuid;
- Status = gBS->OpenProtocol (
- Controller,
- IoProtocolGuid,
- (VOID **) &ParentIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ IoProtocolGuid,
+ (VOID **)&ParentIo,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
}
+
ASSERT (!EFI_ERROR (Status) || Status == EFI_ALREADY_STARTED);
//
@@ -854,9 +888,9 @@ SerialControllerDriverStart (
return EFI_SUCCESS;
}
- ControllerNumber = 0;
+ ControllerNumber = 0;
ContainsControllerNode = FALSE;
- SerialDevices = GetChildSerialDevices (Controller, IoProtocolGuid, &SerialDeviceCount);
+ SerialDevices = GetChildSerialDevices (Controller, IoProtocolGuid, &SerialDeviceCount);
if (SerialDeviceCount != 0) {
if (RemainingDevicePath == NULL) {
@@ -869,31 +903,41 @@ SerialControllerDriverStart (
//
// Update the attributes/control of the SerialIo instance specified by RemainingDevicePath.
//
- Uart = (UART_DEVICE_PATH *) SkipControllerDevicePathNode (RemainingDevicePath, &ContainsControllerNode, &ControllerNumber);
+ Uart = (UART_DEVICE_PATH *)SkipControllerDevicePathNode (RemainingDevicePath, &ContainsControllerNode, &ControllerNumber);
for (Index = 0; Index < SerialDeviceCount; Index++) {
ASSERT ((SerialDevices != NULL) && (SerialDevices[Index] != NULL));
if ((!SerialDevices[Index]->ContainsControllerNode && !ContainsControllerNode) ||
- (SerialDevices[Index]->ContainsControllerNode && ContainsControllerNode && SerialDevices[Index]->Instance == ControllerNumber)
- ) {
+ (SerialDevices[Index]->ContainsControllerNode && ContainsControllerNode && (SerialDevices[Index]->Instance == ControllerNumber))
+ )
+ {
SerialIo = &SerialDevices[Index]->SerialIo;
- Status = EFI_INVALID_PARAMETER;
+ Status = EFI_INVALID_PARAMETER;
//
// Pass NULL ActualBaudRate to VerifyUartParameters to disallow baudrate degrade.
// DriverBindingStart() shouldn't create a handle with different UART device path.
//
- if (VerifyUartParameters (SerialDevices[Index]->ClockRate, Uart->BaudRate, Uart->DataBits,
- (EFI_PARITY_TYPE) Uart->Parity, (EFI_STOP_BITS_TYPE) Uart->StopBits, NULL, NULL)) {
+ if (VerifyUartParameters (
+ SerialDevices[Index]->ClockRate,
+ Uart->BaudRate,
+ Uart->DataBits,
+ (EFI_PARITY_TYPE)Uart->Parity,
+ (EFI_STOP_BITS_TYPE)Uart->StopBits,
+ NULL,
+ NULL
+ ))
+ {
Status = SerialIo->SetAttributes (
SerialIo,
Uart->BaudRate,
SerialIo->Mode->ReceiveFifoDepth,
SerialIo->Mode->Timeout,
- (EFI_PARITY_TYPE) Uart->Parity,
+ (EFI_PARITY_TYPE)Uart->Parity,
Uart->DataBits,
- (EFI_STOP_BITS_TYPE) Uart->StopBits
+ (EFI_STOP_BITS_TYPE)Uart->StopBits
);
}
- FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *) NextDevicePathNode (Uart);
+
+ FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *)NextDevicePathNode (Uart);
if (!EFI_ERROR (Status) && IsUartFlowControlDevicePathNode (FlowControl)) {
Status = SerialIo->GetControl (SerialIo, &Control);
if (!EFI_ERROR (Status)) {
@@ -902,6 +946,7 @@ SerialControllerDriverStart (
} else {
Control &= ~EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
+
//
// Clear the bits that are not allowed to pass to SetControl
//
@@ -911,9 +956,11 @@ SerialControllerDriverStart (
Status = SerialIo->SetControl (SerialIo, Control);
}
}
+
break;
}
}
+
if (Index != SerialDeviceCount) {
//
// Directly return if the SerialIo instance specified by RemainingDevicePath is found and updated.
@@ -922,13 +969,14 @@ SerialControllerDriverStart (
if (SerialDevices != NULL) {
FreePool (SerialDevices);
}
+
return Status;
}
}
}
if (RemainingDevicePath != NULL) {
- Uart = (UART_DEVICE_PATH *) SkipControllerDevicePathNode (RemainingDevicePath, &ContainsControllerNode, &ControllerNumber);
+ Uart = (UART_DEVICE_PATH *)SkipControllerDevicePathNode (RemainingDevicePath, &ContainsControllerNode, &ControllerNumber);
} else {
Uart = NULL;
}
@@ -936,12 +984,13 @@ SerialControllerDriverStart (
PciDeviceInfo = NULL;
if (IoProtocolGuid == &gEfiSioProtocolGuid) {
Status = EFI_NOT_FOUND;
- if (RemainingDevicePath == NULL || !ContainsControllerNode) {
+ if ((RemainingDevicePath == NULL) || !ContainsControllerNode) {
Node = ParentDevicePath;
do {
- Acpi = (ACPI_HID_DEVICE_PATH *) Node;
+ Acpi = (ACPI_HID_DEVICE_PATH *)Node;
Node = NextDevicePathNode (Node);
} while (!IsDevicePathEnd (Node));
+
Status = CreateSerialDevice (Controller, Uart, ParentDevicePath, FALSE, Acpi->UID, ParentIo, NULL, NULL);
DEBUG ((DEBUG_INFO, "PciSioSerial: Create SIO child serial device - %r\n", Status));
}
@@ -955,7 +1004,8 @@ SerialControllerDriverStart (
for (PciSerialParameter = PcdGetPtr (PcdPciSerialParameters); PciSerialParameter->VendorId != 0xFFFF; PciSerialParameter++) {
if ((PciSerialParameter->VendorId == Pci.Hdr.VendorId) &&
(PciSerialParameter->DeviceId == Pci.Hdr.DeviceId)
- ) {
+ )
+ {
PciSerialCount++;
}
}
@@ -968,29 +1018,29 @@ SerialControllerDriverStart (
PciDeviceInfo = AllocatePool (sizeof (PCI_DEVICE_INFO));
ASSERT (PciDeviceInfo != NULL);
PciDeviceInfo->ChildCount = 0;
- PciDeviceInfo->PciIo = ParentIo.PciIo;
- Status = ParentIo.PciIo->Attributes (
- ParentIo.PciIo,
- EfiPciIoAttributeOperationGet,
- 0,
- &PciDeviceInfo->PciAttributes
- );
+ PciDeviceInfo->PciIo = ParentIo.PciIo;
+ Status = ParentIo.PciIo->Attributes (
+ ParentIo.PciIo,
+ EfiPciIoAttributeOperationGet,
+ 0,
+ &PciDeviceInfo->PciAttributes
+ );
if (!EFI_ERROR (Status)) {
Status = ParentIo.PciIo->Attributes (
- ParentIo.PciIo,
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
+ ParentIo.PciIo,
+ EfiPciIoAttributeOperationSupported,
+ 0,
+ &Supports
+ );
if (!EFI_ERROR (Status)) {
Supports &= (UINT64)(EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY);
- Status = ParentIo.PciIo->Attributes (
- ParentIo.PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
+ Status = ParentIo.PciIo->Attributes (
+ ParentIo.PciIo,
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
}
}
} else {
@@ -1007,18 +1057,18 @@ SerialControllerDriverStart (
//
// PCI serial device contains only one UART
//
- if (RemainingDevicePath == NULL || !ContainsControllerNode) {
+ if ((RemainingDevicePath == NULL) || !ContainsControllerNode) {
//
// This PCI serial device is matched by class code in Supported()
//
if (PciSerialCount == 0) {
- DefaultPciSerialParameter.VendorId = Pci.Hdr.VendorId;
- DefaultPciSerialParameter.DeviceId = Pci.Hdr.DeviceId;
- DefaultPciSerialParameter.BarIndex = 0;
- DefaultPciSerialParameter.Offset = 0;
+ DefaultPciSerialParameter.VendorId = Pci.Hdr.VendorId;
+ DefaultPciSerialParameter.DeviceId = Pci.Hdr.DeviceId;
+ DefaultPciSerialParameter.BarIndex = 0;
+ DefaultPciSerialParameter.Offset = 0;
DefaultPciSerialParameter.RegisterStride = 0;
- DefaultPciSerialParameter.ClockRate = 0;
- PciSerialParameter = &DefaultPciSerialParameter;
+ DefaultPciSerialParameter.ClockRate = 0;
+ PciSerialParameter = &DefaultPciSerialParameter;
} else if (PciSerialCount == 1) {
PciSerialParameter = PcdGetPtr (PcdPciSerialParameters);
}
@@ -1033,13 +1083,14 @@ SerialControllerDriverStart (
//
// PCI serial device contains multiple UARTs
//
- if (RemainingDevicePath == NULL || ContainsControllerNode) {
+ if ((RemainingDevicePath == NULL) || ContainsControllerNode) {
PciSerialCount = 0;
for (PciSerialParameter = PcdGetPtr (PcdPciSerialParameters); PciSerialParameter->VendorId != 0xFFFF; PciSerialParameter++) {
if ((PciSerialParameter->VendorId == Pci.Hdr.VendorId) &&
(PciSerialParameter->DeviceId == Pci.Hdr.DeviceId) &&
((RemainingDevicePath == NULL) || (ControllerNumber == PciSerialCount))
- ) {
+ )
+ {
//
// Create controller node when PCI serial device contains multiple UARTs
//
@@ -1070,14 +1121,15 @@ SerialControllerDriverStart (
if (EFI_ERROR (Status) && (SerialDeviceCount == 0)) {
if (PciDeviceInfo != NULL) {
Status = ParentIo.PciIo->Attributes (
- ParentIo.PciIo,
- EfiPciIoAttributeOperationSet,
- PciDeviceInfo->PciAttributes,
- NULL
- );
+ ParentIo.PciIo,
+ EfiPciIoAttributeOperationSet,
+ PciDeviceInfo->PciAttributes,
+ NULL
+ );
ASSERT_EFI_ERROR (Status);
FreePool (PciDeviceInfo);
}
+
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
@@ -1110,28 +1162,28 @@ SerialControllerDriverStart (
EFI_STATUS
EFIAPI
SerialControllerDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- UINTN Index;
- BOOLEAN AllChildrenStopped;
- EFI_SERIAL_IO_PROTOCOL *SerialIo;
- SERIAL_DEV *SerialDevice;
- VOID *IoProtocol;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- PCI_DEVICE_INFO *PciDeviceInfo;
+ EFI_STATUS Status;
+ UINTN Index;
+ BOOLEAN AllChildrenStopped;
+ EFI_SERIAL_IO_PROTOCOL *SerialIo;
+ SERIAL_DEV *SerialDevice;
+ VOID *IoProtocol;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ PCI_DEVICE_INFO *PciDeviceInfo;
PciDeviceInfo = NULL;
Status = gBS->HandleProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath
+ (VOID **)&DevicePath
);
//
@@ -1174,17 +1226,15 @@ SerialControllerDriverStop (
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiSerialIoProtocolGuid,
- (VOID **) &SerialIo,
+ (VOID **)&SerialIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
);
if (!EFI_ERROR (Status)) {
-
SerialDevice = SERIAL_DEV_FROM_THIS (SerialIo);
ASSERT ((PciDeviceInfo == NULL) || (PciDeviceInfo == SerialDevice->PciDeviceInfo));
PciDeviceInfo = SerialDevice->PciDeviceInfo;
@@ -1198,8 +1248,10 @@ SerialControllerDriverStop (
Status = gBS->UninstallMultipleProtocolInterfaces (
ChildHandleBuffer[Index],
- &gEfiDevicePathProtocolGuid, SerialDevice->DevicePath,
- &gEfiSerialIoProtocolGuid, &SerialDevice->SerialIo,
+ &gEfiDevicePathProtocolGuid,
+ SerialDevice->DevicePath,
+ &gEfiSerialIoProtocolGuid,
+ &SerialDevice->SerialIo,
NULL
);
if (EFI_ERROR (Status)) {
@@ -1237,14 +1289,15 @@ SerialControllerDriverStop (
if ((PciDeviceInfo != NULL) && (PciDeviceInfo->ChildCount == 0)) {
ASSERT (PciDeviceInfo->PciIo != NULL);
Status = PciDeviceInfo->PciIo->Attributes (
- PciDeviceInfo->PciIo,
- EfiPciIoAttributeOperationSet,
- PciDeviceInfo->PciAttributes,
- NULL
- );
+ PciDeviceInfo->PciIo,
+ EfiPciIoAttributeOperationSet,
+ PciDeviceInfo->PciAttributes,
+ NULL
+ );
ASSERT_EFI_ERROR (Status);
FreePool (PciDeviceInfo);
}
+
return EFI_SUCCESS;
}
}
diff --git a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h
index fa5aba07e1..5903ab5cd3 100644
--- a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h
+++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SERIAL_H_
#define _SERIAL_H_
-
#include <Uefi.h>
#include <IndustryStandard/Pci.h>
@@ -34,13 +33,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Driver Binding Externs
//
-extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
-extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
+extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;
-#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d"
-#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d"
-#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS)
+#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d"
+#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d"
+#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS)
//
// Internal Data Structures
@@ -61,73 +60,73 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;
/// RegisterStride equals to 4.
///
typedef struct {
- UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
- UINT16 DeviceId; ///< Device ID to match the PCI device
- UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz
- UINT64 Offset; ///< The byte offset into to the BAR
- UINT8 BarIndex; ///< Which BAR to get the UART base address
- UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.
- UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
- UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
- UINT8 Reserved[2];
+ UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
+ UINT16 DeviceId; ///< Device ID to match the PCI device
+ UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz
+ UINT64 Offset; ///< The byte offset into to the BAR
+ UINT8 BarIndex; ///< Which BAR to get the UART base address
+ UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.
+ UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ UINT8 Reserved[2];
} PCI_SERIAL_PARAMETER;
#pragma pack()
-#define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit.
+#define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit.
typedef struct {
- UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail).
- UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head).
- UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data.
+ UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail).
+ UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head).
+ UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data.
} SERIAL_DEV_FIFO;
typedef union {
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_SIO_PROTOCOL *Sio;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_SIO_PROTOCOL *Sio;
} PARENT_IO_PROTOCOL_PTR;
typedef struct {
- EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance.
- UINTN ChildCount; // Count of child SerialIo instance.
- UINT64 PciAttributes; // Original PCI attributes.
+ EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance.
+ UINTN ChildCount; // Count of child SerialIo instance.
+ UINT64 PciAttributes; // Original PCI attributes.
} PCI_DEVICE_INFO;
typedef struct {
- UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_SERIAL_IO_PROTOCOL SerialIo;
- EFI_SERIAL_IO_MODE SerialMode;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
-
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- UART_DEVICE_PATH UartDevicePath;
-
- EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address
- BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO
- UINT8 RegisterStride; ///< UART Register Stride
- UINT32 ClockRate; ///< UART clock rate
-
- UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes.
- SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data
-
- UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes.
- SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data
-
- BOOLEAN SoftwareLoopbackEnable;
- BOOLEAN HardwareFlowControl;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
- BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node
- UINT32 Instance;
- PCI_DEVICE_INFO *PciDeviceInfo;
+ UINT32 Signature;
+ EFI_HANDLE Handle;
+ EFI_SERIAL_IO_PROTOCOL SerialIo;
+ EFI_SERIAL_IO_MODE SerialMode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ UART_DEVICE_PATH UartDevicePath;
+
+ EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address
+ BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO
+ UINT8 RegisterStride; ///< UART Register Stride
+ UINT32 ClockRate; ///< UART clock rate
+
+ UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes.
+ SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data
+
+ UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes.
+ SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data
+
+ BOOLEAN SoftwareLoopbackEnable;
+ BOOLEAN HardwareFlowControl;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node
+ UINT32 Instance;
+ PCI_DEVICE_INFO *PciDeviceInfo;
} SERIAL_DEV;
-#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')
-#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
+#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')
+#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
//
// Serial Driver Defaults
//
-#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000
-#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \
+#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000
+#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \
EFI_SERIAL_DATA_SET_READY | \
EFI_SERIAL_RING_INDICATE | \
EFI_SERIAL_CARRIER_DETECT | \
@@ -139,23 +138,23 @@ typedef struct {
EFI_SERIAL_OUTPUT_BUFFER_EMPTY | \
EFI_SERIAL_INPUT_BUFFER_EMPTY)
-#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS
-#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
+#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS
+#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
//
// UART Registers
//
-#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register
-#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register
-#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB
-#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB
-#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register
-#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register
-#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register
-#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register
-#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register
-#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register
-#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register
-#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register
+#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register
+#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register
+#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB
+#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB
+#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register
+#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register
+#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register
+#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register
+#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register
+#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register
+#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register
+#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register
#pragma pack(1)
///
@@ -163,13 +162,13 @@ typedef struct {
///
typedef union {
struct {
- UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable
- UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable
- UINT8 Rie : 1; ///< Receiver Interrupt Enable
- UINT8 Mie : 1; ///< Modem Interrupt Enable
- UINT8 Reserved : 4;
+ UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable
+ UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable
+ UINT8 Rie : 1; ///< Receiver Interrupt Enable
+ UINT8 Mie : 1; ///< Modem Interrupt Enable
+ UINT8 Reserved : 4;
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_IER;
///
@@ -177,15 +176,15 @@ typedef union {
///
typedef union {
struct {
- UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable
- UINT8 ResetRF : 1; ///< Reset Reciever FIFO
- UINT8 ResetTF : 1; ///< Reset Transmistter FIFO
- UINT8 Dms : 1; ///< DMA Mode Select
- UINT8 Reserved : 1;
- UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO
- UINT8 Rtb : 2; ///< Receive Trigger Bits
+ UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable
+ UINT8 ResetRF : 1; ///< Reset Reciever FIFO
+ UINT8 ResetTF : 1; ///< Reset Transmistter FIFO
+ UINT8 Dms : 1; ///< DMA Mode Select
+ UINT8 Reserved : 1;
+ UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO
+ UINT8 Rtb : 2; ///< Receive Trigger Bits
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_FCR;
///
@@ -193,15 +192,15 @@ typedef union {
///
typedef union {
struct {
- UINT8 SerialDB : 2; ///< Number of Serial Data Bits
- UINT8 StopB : 1; ///< Number of Stop Bits
- UINT8 ParEn : 1; ///< Parity Enable
- UINT8 EvenPar : 1; ///< Even Parity Select
- UINT8 SticPar : 1; ///< Sticky Parity
- UINT8 BrCon : 1; ///< Break Control
- UINT8 DLab : 1; ///< Divisor Latch Access Bit
+ UINT8 SerialDB : 2; ///< Number of Serial Data Bits
+ UINT8 StopB : 1; ///< Number of Stop Bits
+ UINT8 ParEn : 1; ///< Parity Enable
+ UINT8 EvenPar : 1; ///< Even Parity Select
+ UINT8 SticPar : 1; ///< Sticky Parity
+ UINT8 BrCon : 1; ///< Break Control
+ UINT8 DLab : 1; ///< Divisor Latch Access Bit
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_LCR;
///
@@ -209,14 +208,14 @@ typedef union {
///
typedef union {
struct {
- UINT8 DtrC : 1; ///< Data Terminal Ready Control
- UINT8 Rts : 1; ///< Request To Send Control
- UINT8 Out1 : 1; ///< Output1
- UINT8 Out2 : 1; ///< Output2, used to disable interrupt
- UINT8 Lme : 1; ///< Loopback Mode Enable
- UINT8 Reserved : 3;
+ UINT8 DtrC : 1; ///< Data Terminal Ready Control
+ UINT8 Rts : 1; ///< Request To Send Control
+ UINT8 Out1 : 1; ///< Output1
+ UINT8 Out2 : 1; ///< Output2, used to disable interrupt
+ UINT8 Lme : 1; ///< Loopback Mode Enable
+ UINT8 Reserved : 3;
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_MCR;
///
@@ -224,16 +223,16 @@ typedef union {
///
typedef union {
struct {
- UINT8 Dr : 1; ///< Receiver Data Ready Status
- UINT8 Oe : 1; ///< Overrun Error Status
- UINT8 Pe : 1; ///< Parity Error Status
- UINT8 Fe : 1; ///< Framing Error Status
- UINT8 Bi : 1; ///< Break Interrupt Status
- UINT8 Thre : 1; ///< Transmistter Holding Register Status
- UINT8 Temt : 1; ///< Transmitter Empty Status
- UINT8 FIFOe : 1; ///< FIFO Error Status
+ UINT8 Dr : 1; ///< Receiver Data Ready Status
+ UINT8 Oe : 1; ///< Overrun Error Status
+ UINT8 Pe : 1; ///< Parity Error Status
+ UINT8 Fe : 1; ///< Framing Error Status
+ UINT8 Bi : 1; ///< Break Interrupt Status
+ UINT8 Thre : 1; ///< Transmistter Holding Register Status
+ UINT8 Temt : 1; ///< Transmitter Empty Status
+ UINT8 FIFOe : 1; ///< FIFO Error Status
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_LSR;
///
@@ -241,48 +240,49 @@ typedef union {
///
typedef union {
struct {
- UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status
- UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status
- UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status
- UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status
- UINT8 Cts : 1; ///< Clear To Send Status
- UINT8 Dsr : 1; ///< Data Set Ready Status
- UINT8 Ri : 1; ///< Ring Indicator Status
- UINT8 Dcd : 1; ///< Data Carrier Detect Status
+ UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status
+ UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status
+ UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status
+ UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status
+ UINT8 Cts : 1; ///< Clear To Send Status
+ UINT8 Dsr : 1; ///< Data Set Ready Status
+ UINT8 Ri : 1; ///< Ring Indicator Status
+ UINT8 Dcd : 1; ///< Data Carrier Detect Status
} Bits;
- UINT8 Data;
+ UINT8 Data;
} SERIAL_PORT_MSR;
#pragma pack()
//
// Define serial register I/O macros
//
-#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR)
-#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL)
-#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM)
-#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER)
-#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR)
-#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR)
-#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR)
-#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR)
-#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR)
-#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR)
-
-#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D)
-#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D)
-#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D)
-#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D)
-#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D)
-#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D)
-#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D)
-#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D)
-#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D)
-#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D)
+#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR)
+#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL)
+#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM)
+#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER)
+#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR)
+#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR)
+#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR)
+#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR)
+#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR)
+#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR)
+
+#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D)
+#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D)
+#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D)
+#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D)
+#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D)
+#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D)
+#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D)
+#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D)
+#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D)
+#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D)
//
// Prototypes
// Driver model protocol interface
//
+
/**
Check to see if this driver supports the given controller
@@ -296,9 +296,9 @@ typedef union {
EFI_STATUS
EFIAPI
SerialControllerDriverSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -313,9 +313,9 @@ SerialControllerDriverSupported (
EFI_STATUS
EFIAPI
SerialControllerDriverStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -333,15 +333,16 @@ SerialControllerDriverStart (
EFI_STATUS
EFIAPI
SerialControllerDriverStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// Serial I/O Protocol Interface
//
+
/**
Reset serial device.
@@ -354,7 +355,7 @@ SerialControllerDriverStop (
EFI_STATUS
EFIAPI
SerialReset (
- IN EFI_SERIAL_IO_PROTOCOL *This
+ IN EFI_SERIAL_IO_PROTOCOL *This
);
/**
@@ -377,13 +378,13 @@ SerialReset (
EFI_STATUS
EFIAPI
SerialSetAttributes (
- IN EFI_SERIAL_IO_PROTOCOL *This,
- IN UINT64 BaudRate,
- IN UINT32 ReceiveFifoDepth,
- IN UINT32 Timeout,
- IN EFI_PARITY_TYPE Parity,
- IN UINT8 DataBits,
- IN EFI_STOP_BITS_TYPE StopBits
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN UINT64 BaudRate,
+ IN UINT32 ReceiveFifoDepth,
+ IN UINT32 Timeout,
+ IN EFI_PARITY_TYPE Parity,
+ IN UINT8 DataBits,
+ IN EFI_STOP_BITS_TYPE StopBits
);
/**
@@ -399,8 +400,8 @@ SerialSetAttributes (
EFI_STATUS
EFIAPI
SerialSetControl (
- IN EFI_SERIAL_IO_PROTOCOL *This,
- IN UINT32 Control
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN UINT32 Control
);
/**
@@ -415,8 +416,8 @@ SerialSetControl (
EFI_STATUS
EFIAPI
SerialGetControl (
- IN EFI_SERIAL_IO_PROTOCOL *This,
- OUT UINT32 *Control
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ OUT UINT32 *Control
);
/**
@@ -435,9 +436,9 @@ SerialGetControl (
EFI_STATUS
EFIAPI
SerialWrite (
- IN EFI_SERIAL_IO_PROTOCOL *This,
- IN OUT UINTN *BufferSize,
- IN VOID *Buffer
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
);
/**
@@ -456,14 +457,15 @@ SerialWrite (
EFI_STATUS
EFIAPI
SerialRead (
- IN EFI_SERIAL_IO_PROTOCOL *This,
- IN OUT UINTN *BufferSize,
- OUT VOID *Buffer
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
);
//
// Internal Functions
//
+
/**
Use scratchpad register to test if this serial port is present.
@@ -473,7 +475,7 @@ SerialRead (
**/
BOOLEAN
SerialPresent (
- IN SERIAL_DEV *SerialDevice
+ IN SERIAL_DEV *SerialDevice
);
/**
@@ -486,7 +488,7 @@ SerialPresent (
**/
BOOLEAN
SerialFifoFull (
- IN SERIAL_DEV_FIFO *Fifo
+ IN SERIAL_DEV_FIFO *Fifo
);
/**
@@ -499,7 +501,7 @@ SerialFifoFull (
**/
BOOLEAN
SerialFifoEmpty (
- IN SERIAL_DEV_FIFO *Fifo
+ IN SERIAL_DEV_FIFO *Fifo
);
/**
@@ -514,8 +516,8 @@ SerialFifoEmpty (
**/
EFI_STATUS
SerialFifoAdd (
- IN SERIAL_DEV_FIFO *Fifo,
- IN UINT8 Data
+ IN SERIAL_DEV_FIFO *Fifo,
+ IN UINT8 Data
);
/**
@@ -530,8 +532,8 @@ SerialFifoAdd (
**/
EFI_STATUS
SerialFifoRemove (
- IN SERIAL_DEV_FIFO *Fifo,
- OUT UINT8 *Data
+ IN SERIAL_DEV_FIFO *Fifo,
+ OUT UINT8 *Data
);
/**
@@ -546,7 +548,7 @@ SerialFifoRemove (
**/
EFI_STATUS
SerialReceiveTransmit (
- IN SERIAL_DEV *SerialDevice
+ IN SERIAL_DEV *SerialDevice
);
/**
@@ -559,8 +561,8 @@ SerialReceiveTransmit (
**/
UINT8
SerialReadRegister (
- IN SERIAL_DEV *SerialDev,
- IN UINT32 Offset
+ IN SERIAL_DEV *SerialDev,
+ IN UINT32 Offset
);
/**
@@ -572,15 +574,15 @@ SerialReadRegister (
**/
VOID
SerialWriteRegister (
- IN SERIAL_DEV *SerialDev,
- IN UINT32 Offset,
- IN UINT8 Data
+ IN SERIAL_DEV *SerialDev,
+ IN UINT32 Offset,
+ IN UINT8 Data
);
-
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -628,7 +630,6 @@ SerialComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -700,11 +701,11 @@ SerialComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SerialComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -715,8 +716,8 @@ SerialComponentNameGetControllerName (
**/
VOID
AddName (
- IN SERIAL_DEV *SerialDevice,
- IN UINT32 Uid
+ IN SERIAL_DEV *SerialDevice,
+ IN UINT32 Uid
);
/**
@@ -741,13 +742,13 @@ AddName (
**/
BOOLEAN
VerifyUartParameters (
- IN UINT32 ClockRate,
- IN UINT64 BaudRate,
- IN UINT8 DataBits,
- IN EFI_PARITY_TYPE Parity,
- IN EFI_STOP_BITS_TYPE StopBits,
- OUT UINT64 *Divisor,
- OUT UINT64 *ActualBaudRate
+ IN UINT32 ClockRate,
+ IN UINT64 BaudRate,
+ IN UINT8 DataBits,
+ IN EFI_PARITY_TYPE Parity,
+ IN EFI_STOP_BITS_TYPE StopBits,
+ OUT UINT64 *Divisor,
+ OUT UINT64 *ActualBaudRate
);
/**
@@ -762,9 +763,9 @@ VerifyUartParameters (
**/
UART_DEVICE_PATH *
SkipControllerDevicePathNode (
- EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- BOOLEAN *ContainsControllerNode,
- UINT32 *ControllerNumber
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ BOOLEAN *ContainsControllerNode,
+ UINT32 *ControllerNumber
);
/**
@@ -778,6 +779,7 @@ SkipControllerDevicePathNode (
**/
BOOLEAN
IsUartFlowControlDevicePathNode (
- IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl
+ IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl
);
+
#endif
diff --git a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c
index f8b9a0e3ee..8a85a6c3b8 100644
--- a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c
+++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c
@@ -20,27 +20,31 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UART_DEVICE_PATH *
SkipControllerDevicePathNode (
- EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- BOOLEAN *ContainsControllerNode,
- UINT32 *ControllerNumber
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ BOOLEAN *ContainsControllerNode,
+ UINT32 *ControllerNumber
)
{
if ((DevicePathType (DevicePath) == HARDWARE_DEVICE_PATH) &&
(DevicePathSubType (DevicePath) == HW_CONTROLLER_DP)
- ) {
+ )
+ {
if (ContainsControllerNode != NULL) {
*ContainsControllerNode = TRUE;
}
+
if (ControllerNumber != NULL) {
- *ControllerNumber = ((CONTROLLER_DEVICE_PATH *) DevicePath)->ControllerNumber;
+ *ControllerNumber = ((CONTROLLER_DEVICE_PATH *)DevicePath)->ControllerNumber;
}
+
DevicePath = NextDevicePathNode (DevicePath);
} else {
if (ContainsControllerNode != NULL) {
*ContainsControllerNode = FALSE;
}
}
- return (UART_DEVICE_PATH *) DevicePath;
+
+ return (UART_DEVICE_PATH *)DevicePath;
}
/**
@@ -65,26 +69,27 @@ SkipControllerDevicePathNode (
**/
BOOLEAN
VerifyUartParameters (
- IN UINT32 ClockRate,
- IN UINT64 BaudRate,
- IN UINT8 DataBits,
- IN EFI_PARITY_TYPE Parity,
- IN EFI_STOP_BITS_TYPE StopBits,
- OUT UINT64 *Divisor,
- OUT UINT64 *ActualBaudRate
+ IN UINT32 ClockRate,
+ IN UINT64 BaudRate,
+ IN UINT8 DataBits,
+ IN EFI_PARITY_TYPE Parity,
+ IN EFI_STOP_BITS_TYPE StopBits,
+ OUT UINT64 *Divisor,
+ OUT UINT64 *ActualBaudRate
)
{
- UINT64 Remainder;
- UINT32 ComputedBaudRate;
- UINT64 ComputedDivisor;
- UINT64 Percent;
+ UINT64 Remainder;
+ UINT32 ComputedBaudRate;
+ UINT64 ComputedDivisor;
+ UINT64 Percent;
if ((DataBits < 5) || (DataBits > 8) ||
(Parity < NoParity) || (Parity > SpaceParity) ||
(StopBits < OneStopBit) || (StopBits > TwoStopBits) ||
((DataBits == 5) && (StopBits == TwoStopBits)) ||
((DataBits >= 6) && (DataBits <= 8) && (StopBits == OneFiveStopBits))
- ) {
+ )
+ {
return FALSE;
}
@@ -108,6 +113,7 @@ VerifyUartParameters (
if (Remainder >= LShiftU64 (BaudRate, 3)) {
ComputedDivisor++;
}
+
//
// If the computed divisor is larger than the maximum value that can be programmed
// into the UART, then the requested baud rate can not be supported.
@@ -128,13 +134,13 @@ VerifyUartParameters (
// Actual baud rate that the serial port will be programmed for
// should be with in 4% of requested one.
//
- ComputedBaudRate = ClockRate / ((UINT16) ComputedDivisor << 4);
+ ComputedBaudRate = ClockRate / ((UINT16)ComputedDivisor << 4);
if (ComputedBaudRate == 0) {
return FALSE;
}
Percent = DivU64x32 (MultU64x32 (BaudRate, 100), ComputedBaudRate);
- DEBUG ((DEBUG_INFO, "ClockRate = %d\n", ClockRate));
+ DEBUG ((DEBUG_INFO, "ClockRate = %d\n", ClockRate));
DEBUG ((DEBUG_INFO, "Divisor = %ld\n", ComputedDivisor));
DEBUG ((DEBUG_INFO, "BaudRate/Actual (%ld/%d) = %d%%\n", BaudRate, ComputedBaudRate, Percent));
@@ -147,18 +153,23 @@ VerifyUartParameters (
if (ActualBaudRate != NULL) {
*ActualBaudRate = BaudRate;
}
+
if (Divisor != NULL) {
*Divisor = ComputedDivisor;
}
+
return TRUE;
}
+
if (ComputedBaudRate < BaudRate) {
if (ActualBaudRate != NULL) {
*ActualBaudRate = ComputedBaudRate;
}
+
if (Divisor != NULL) {
*Divisor = ComputedDivisor;
}
+
return TRUE;
}
@@ -170,22 +181,25 @@ VerifyUartParameters (
if (ComputedDivisor == MAX_UINT16) {
return FALSE;
}
+
ComputedDivisor++;
- ComputedBaudRate = ClockRate / ((UINT16) ComputedDivisor << 4);
+ ComputedBaudRate = ClockRate / ((UINT16)ComputedDivisor << 4);
if (ComputedBaudRate == 0) {
return FALSE;
}
- DEBUG ((DEBUG_INFO, "ClockRate = %d\n", ClockRate));
+ DEBUG ((DEBUG_INFO, "ClockRate = %d\n", ClockRate));
DEBUG ((DEBUG_INFO, "Divisor = %ld\n", ComputedDivisor));
DEBUG ((DEBUG_INFO, "BaudRate/Actual (%ld/%d) = %d%%\n", BaudRate, ComputedBaudRate, Percent));
if (ActualBaudRate != NULL) {
*ActualBaudRate = ComputedBaudRate;
}
+
if (Divisor != NULL) {
*Divisor = ComputedDivisor;
}
+
return TRUE;
}
@@ -198,10 +212,10 @@ VerifyUartParameters (
**/
BOOLEAN
SerialFifoFull (
- IN SERIAL_DEV_FIFO *Fifo
+ IN SERIAL_DEV_FIFO *Fifo
)
{
- return (BOOLEAN) (((Fifo->Tail + 1) % SERIAL_MAX_FIFO_SIZE) == Fifo->Head);
+ return (BOOLEAN)(((Fifo->Tail + 1) % SERIAL_MAX_FIFO_SIZE) == Fifo->Head);
}
/**
@@ -213,11 +227,11 @@ SerialFifoFull (
**/
BOOLEAN
SerialFifoEmpty (
- IN SERIAL_DEV_FIFO *Fifo
+ IN SERIAL_DEV_FIFO *Fifo
)
{
- return (BOOLEAN) (Fifo->Head == Fifo->Tail);
+ return (BOOLEAN)(Fifo->Head == Fifo->Tail);
}
/**
@@ -231,8 +245,8 @@ SerialFifoEmpty (
**/
EFI_STATUS
SerialFifoAdd (
- IN OUT SERIAL_DEV_FIFO *Fifo,
- IN UINT8 Data
+ IN OUT SERIAL_DEV_FIFO *Fifo,
+ IN UINT8 Data
)
{
//
@@ -241,11 +255,12 @@ SerialFifoAdd (
if (SerialFifoFull (Fifo)) {
return EFI_OUT_OF_RESOURCES;
}
+
//
// FIFO is not full can add data
//
Fifo->Data[Fifo->Tail] = Data;
- Fifo->Tail = (Fifo->Tail + 1) % SERIAL_MAX_FIFO_SIZE;
+ Fifo->Tail = (Fifo->Tail + 1) % SERIAL_MAX_FIFO_SIZE;
return EFI_SUCCESS;
}
@@ -261,8 +276,8 @@ SerialFifoAdd (
**/
EFI_STATUS
SerialFifoRemove (
- IN OUT SERIAL_DEV_FIFO *Fifo,
- OUT UINT8 *Data
+ IN OUT SERIAL_DEV_FIFO *Fifo,
+ OUT UINT8 *Data
)
{
//
@@ -271,10 +286,11 @@ SerialFifoRemove (
if (SerialFifoEmpty (Fifo)) {
return EFI_OUT_OF_RESOURCES;
}
+
//
// FIFO is not empty, can remove data
//
- *Data = Fifo->Data[Fifo->Head];
+ *Data = Fifo->Data[Fifo->Head];
Fifo->Head = (Fifo->Head + 1) % SERIAL_MAX_FIFO_SIZE;
return EFI_SUCCESS;
}
@@ -291,16 +307,16 @@ SerialFifoRemove (
**/
EFI_STATUS
SerialReceiveTransmit (
- IN SERIAL_DEV *SerialDevice
+ IN SERIAL_DEV *SerialDevice
)
{
- SERIAL_PORT_LSR Lsr;
- UINT8 Data;
- BOOLEAN ReceiveFifoFull;
- SERIAL_PORT_MSR Msr;
- SERIAL_PORT_MCR Mcr;
- UINTN TimeOut;
+ SERIAL_PORT_LSR Lsr;
+ UINT8 Data;
+ BOOLEAN ReceiveFifoFull;
+ SERIAL_PORT_MSR Msr;
+ SERIAL_PORT_MCR Mcr;
+ UINTN TimeOut;
Data = 0;
@@ -326,13 +342,15 @@ SerialReceiveTransmit (
// if receive buffer is available.
//
if (SerialDevice->HardwareFlowControl &&
- !FeaturePcdGet(PcdSerialUseHalfHandshake)&&
+ !FeaturePcdGet (PcdSerialUseHalfHandshake) &&
!ReceiveFifoFull
- ) {
+ )
+ {
Mcr.Data = READ_MCR (SerialDevice);
Mcr.Bits.Rts = 1;
WRITE_MCR (SerialDevice, Mcr.Data);
}
+
do {
Lsr.Data = READ_LSR (SerialDevice);
@@ -342,13 +360,13 @@ SerialReceiveTransmit (
if ((Lsr.Bits.Dr == 1) && !ReceiveFifoFull) {
ReceiveFifoFull = SerialFifoFull (&SerialDevice->Receive);
if (!ReceiveFifoFull) {
- if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Oe == 1 || Lsr.Bits.Pe == 1 || Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
+ if ((Lsr.Bits.FIFOe == 1) || (Lsr.Bits.Oe == 1) || (Lsr.Bits.Pe == 1) || (Lsr.Bits.Fe == 1) || (Lsr.Bits.Bi == 1)) {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
EFI_ERROR_CODE,
EFI_P_EC_INPUT_ERROR | EFI_PERIPHERAL_SERIAL_PORT,
SerialDevice->DevicePath
);
- if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Pe == 1|| Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
+ if ((Lsr.Bits.FIFOe == 1) || (Lsr.Bits.Pe == 1) || (Lsr.Bits.Fe == 1) || (Lsr.Bits.Bi == 1)) {
Data = READ_RBR (SerialDevice);
continue;
}
@@ -363,15 +381,15 @@ SerialReceiveTransmit (
// tell the peer to stop sending data.
//
if (SerialDevice->HardwareFlowControl &&
- !FeaturePcdGet(PcdSerialUseHalfHandshake) &&
+ !FeaturePcdGet (PcdSerialUseHalfHandshake) &&
SerialFifoFull (&SerialDevice->Receive)
- ) {
+ )
+ {
Mcr.Data = READ_MCR (SerialDevice);
Mcr.Bits.Rts = 0;
WRITE_MCR (SerialDevice, Mcr.Data);
}
-
continue;
} else {
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
@@ -381,10 +399,11 @@ SerialReceiveTransmit (
);
}
}
+
//
// Do the write
//
- if (Lsr.Bits.Thre == 1 && !SerialFifoEmpty (&SerialDevice->Transmit)) {
+ if ((Lsr.Bits.Thre == 1) && !SerialFifoEmpty (&SerialDevice->Transmit)) {
//
// Make sure the transmit data will not be missed
//
@@ -392,17 +411,18 @@ SerialReceiveTransmit (
//
// For half handshake flow control assert RTS before sending.
//
- if (FeaturePcdGet(PcdSerialUseHalfHandshake)) {
+ if (FeaturePcdGet (PcdSerialUseHalfHandshake)) {
Mcr.Data = READ_MCR (SerialDevice);
- Mcr.Bits.Rts= 0;
+ Mcr.Bits.Rts = 0;
WRITE_MCR (SerialDevice, Mcr.Data);
}
+
//
// Wait for CTS
//
- TimeOut = 0;
- Msr.Data = READ_MSR (SerialDevice);
- while ((Msr.Bits.Dcd == 1) && ((Msr.Bits.Cts == 0) ^ FeaturePcdGet(PcdSerialUseHalfHandshake))) {
+ TimeOut = 0;
+ Msr.Data = READ_MSR (SerialDevice);
+ while ((Msr.Bits.Dcd == 1) && ((Msr.Bits.Cts == 0) ^ FeaturePcdGet (PcdSerialUseHalfHandshake))) {
gBS->Stall (TIMEOUT_STALL_INTERVAL);
TimeOut++;
if (TimeOut > 5) {
@@ -412,7 +432,7 @@ SerialReceiveTransmit (
Msr.Data = READ_MSR (SerialDevice);
}
- if ((Msr.Bits.Dcd == 0) || ((Msr.Bits.Cts == 1) ^ FeaturePcdGet(PcdSerialUseHalfHandshake))) {
+ if ((Msr.Bits.Dcd == 0) || ((Msr.Bits.Cts == 1) ^ FeaturePcdGet (PcdSerialUseHalfHandshake))) {
SerialFifoRemove (&SerialDevice->Transmit, &Data);
WRITE_THR (SerialDevice, Data);
}
@@ -420,8 +440,8 @@ SerialReceiveTransmit (
//
// For half handshake flow control, tell DCE we are done.
//
- if (FeaturePcdGet(PcdSerialUseHalfHandshake)) {
- Mcr.Data = READ_MCR (SerialDevice);
+ if (FeaturePcdGet (PcdSerialUseHalfHandshake)) {
+ Mcr.Data = READ_MCR (SerialDevice);
Mcr.Bits.Rts = 1;
WRITE_MCR (SerialDevice, Mcr.Data);
}
@@ -484,12 +504,13 @@ SerialFlushTransmitFifo (
// in the rest of this function that may send additional characters to this
// UART device invalidating the flush operation.
//
- Elapsed = 0;
+ Elapsed = 0;
Lsr.Data = READ_LSR (SerialDevice);
while (Lsr.Bits.Temt == 0 || Lsr.Bits.Thre == 0) {
if (Elapsed >= Timeout) {
return EFI_TIMEOUT;
}
+
gBS->Stall (TIMEOUT_STALL_INTERVAL);
Elapsed += TIMEOUT_STALL_INTERVAL;
Lsr.Data = READ_LSR (SerialDevice);
@@ -501,6 +522,7 @@ SerialFlushTransmitFifo (
//
// Interface Functions
//
+
/**
Reset serial device.
@@ -516,14 +538,14 @@ SerialReset (
IN EFI_SERIAL_IO_PROTOCOL *This
)
{
- EFI_STATUS Status;
- SERIAL_DEV *SerialDevice;
- SERIAL_PORT_LCR Lcr;
- SERIAL_PORT_IER Ier;
- SERIAL_PORT_MCR Mcr;
- SERIAL_PORT_FCR Fcr;
- EFI_TPL Tpl;
- UINT32 Control;
+ EFI_STATUS Status;
+ SERIAL_DEV *SerialDevice;
+ SERIAL_PORT_LCR Lcr;
+ SERIAL_PORT_IER Ier;
+ SERIAL_PORT_MCR Mcr;
+ SERIAL_PORT_FCR Fcr;
+ EFI_TPL Tpl;
+ UINT32 Control;
SerialDevice = SERIAL_DEV_FROM_THIS (This);
@@ -557,17 +579,17 @@ SerialReset (
//
// Turn off all interrupts
//
- Ier.Data = READ_IER (SerialDevice);
- Ier.Bits.Ravie = 0;
- Ier.Bits.Theie = 0;
- Ier.Bits.Rie = 0;
- Ier.Bits.Mie = 0;
+ Ier.Data = READ_IER (SerialDevice);
+ Ier.Bits.Ravie = 0;
+ Ier.Bits.Theie = 0;
+ Ier.Bits.Rie = 0;
+ Ier.Bits.Mie = 0;
WRITE_IER (SerialDevice, Ier.Data);
//
// Reset the FIFO
//
- Fcr.Data = 0;
+ Fcr.Data = 0;
Fcr.Bits.TrFIFOE = 0;
WRITE_FCR (SerialDevice, Fcr.Data);
@@ -588,12 +610,13 @@ SerialReset (
//
// Enable FIFO
//
- Fcr.Bits.TrFIFOE = 1;
+ Fcr.Bits.TrFIFOE = 1;
if (SerialDevice->ReceiveFifoDepth > 16) {
Fcr.Bits.TrFIFO64 = 1;
}
- Fcr.Bits.ResetRF = 1;
- Fcr.Bits.ResetTF = 1;
+
+ Fcr.Bits.ResetRF = 1;
+ Fcr.Bits.ResetTF = 1;
WRITE_FCR (SerialDevice, Fcr.Data);
//
@@ -604,15 +627,16 @@ SerialReset (
This->Mode->BaudRate,
This->Mode->ReceiveFifoDepth,
This->Mode->Timeout,
- (EFI_PARITY_TYPE) This->Mode->Parity,
- (UINT8) This->Mode->DataBits,
- (EFI_STOP_BITS_TYPE) This->Mode->StopBits
+ (EFI_PARITY_TYPE)This->Mode->Parity,
+ (UINT8)This->Mode->DataBits,
+ (EFI_STOP_BITS_TYPE)This->Mode->StopBits
);
if (EFI_ERROR (Status)) {
gBS->RestoreTPL (Tpl);
return EFI_DEVICE_ERROR;
}
+
//
// Go set the current control bits
//
@@ -620,9 +644,11 @@ SerialReset (
if (SerialDevice->HardwareFlowControl) {
Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
+
if (SerialDevice->SoftwareLoopbackEnable) {
Control |= EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;
}
+
Status = This->SetControl (
This,
Control
@@ -636,7 +662,7 @@ SerialReset (
//
// Reset the software FIFO
//
- SerialDevice->Receive.Head = SerialDevice->Receive.Tail = 0;
+ SerialDevice->Receive.Head = SerialDevice->Receive.Tail = 0;
SerialDevice->Transmit.Head = SerialDevice->Transmit.Tail = 0;
gBS->RestoreTPL (Tpl);
@@ -675,12 +701,12 @@ SerialSetAttributes (
IN EFI_STOP_BITS_TYPE StopBits
)
{
- EFI_STATUS Status;
- SERIAL_DEV *SerialDevice;
- UINT64 Divisor;
- SERIAL_PORT_LCR Lcr;
- UART_DEVICE_PATH *Uart;
- EFI_TPL Tpl;
+ EFI_STATUS Status;
+ SERIAL_DEV *SerialDevice;
+ UINT64 Divisor;
+ SERIAL_PORT_LCR Lcr;
+ UART_DEVICE_PATH *Uart;
+ EFI_TPL Tpl;
SerialDevice = SERIAL_DEV_FROM_THIS (This);
@@ -700,7 +726,7 @@ SerialSetAttributes (
}
if (Parity == DefaultParity) {
- Parity = (EFI_PARITY_TYPE) PcdGet8 (PcdUartDefaultParity);
+ Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
}
if (DataBits == 0) {
@@ -708,7 +734,7 @@ SerialSetAttributes (
}
if (StopBits == DefaultStopBits) {
- StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
+ StopBits = (EFI_STOP_BITS_TYPE)PcdGet8 (PcdUartDefaultStopBits);
}
if (!VerifyUartParameters (SerialDevice->ClockRate, BaudRate, DataBits, Parity, StopBits, &Divisor, &BaudRate)) {
@@ -744,8 +770,8 @@ SerialSetAttributes (
//
// Write the divisor to the serial port
//
- WRITE_DLL (SerialDevice, (UINT8) Divisor);
- WRITE_DLM (SerialDevice, (UINT8) ((UINT16) Divisor >> 8));
+ WRITE_DLL (SerialDevice, (UINT8)Divisor);
+ WRITE_DLM (SerialDevice, (UINT8)((UINT16)Divisor >> 8));
//
// Put serial port back in normal mode and set remaining attributes.
@@ -753,98 +779,100 @@ SerialSetAttributes (
Lcr.Bits.DLab = 0;
switch (Parity) {
- case NoParity:
- Lcr.Bits.ParEn = 0;
- Lcr.Bits.EvenPar = 0;
- Lcr.Bits.SticPar = 0;
- break;
-
- case EvenParity:
- Lcr.Bits.ParEn = 1;
- Lcr.Bits.EvenPar = 1;
- Lcr.Bits.SticPar = 0;
- break;
-
- case OddParity:
- Lcr.Bits.ParEn = 1;
- Lcr.Bits.EvenPar = 0;
- Lcr.Bits.SticPar = 0;
- break;
-
- case SpaceParity:
- Lcr.Bits.ParEn = 1;
- Lcr.Bits.EvenPar = 1;
- Lcr.Bits.SticPar = 1;
- break;
-
- case MarkParity:
- Lcr.Bits.ParEn = 1;
- Lcr.Bits.EvenPar = 0;
- Lcr.Bits.SticPar = 1;
- break;
-
- default:
- break;
+ case NoParity:
+ Lcr.Bits.ParEn = 0;
+ Lcr.Bits.EvenPar = 0;
+ Lcr.Bits.SticPar = 0;
+ break;
+
+ case EvenParity:
+ Lcr.Bits.ParEn = 1;
+ Lcr.Bits.EvenPar = 1;
+ Lcr.Bits.SticPar = 0;
+ break;
+
+ case OddParity:
+ Lcr.Bits.ParEn = 1;
+ Lcr.Bits.EvenPar = 0;
+ Lcr.Bits.SticPar = 0;
+ break;
+
+ case SpaceParity:
+ Lcr.Bits.ParEn = 1;
+ Lcr.Bits.EvenPar = 1;
+ Lcr.Bits.SticPar = 1;
+ break;
+
+ case MarkParity:
+ Lcr.Bits.ParEn = 1;
+ Lcr.Bits.EvenPar = 0;
+ Lcr.Bits.SticPar = 1;
+ break;
+
+ default:
+ break;
}
switch (StopBits) {
- case OneStopBit:
- Lcr.Bits.StopB = 0;
- break;
+ case OneStopBit:
+ Lcr.Bits.StopB = 0;
+ break;
- case OneFiveStopBits:
- case TwoStopBits:
- Lcr.Bits.StopB = 1;
- break;
+ case OneFiveStopBits:
+ case TwoStopBits:
+ Lcr.Bits.StopB = 1;
+ break;
- default:
- break;
+ default:
+ break;
}
+
//
// DataBits
//
- Lcr.Bits.SerialDB = (UINT8) ((DataBits - 5) & 0x03);
+ Lcr.Bits.SerialDB = (UINT8)((DataBits - 5) & 0x03);
WRITE_LCR (SerialDevice, Lcr.Data);
//
// Set the Serial I/O mode
//
- This->Mode->BaudRate = BaudRate;
- This->Mode->ReceiveFifoDepth = ReceiveFifoDepth;
- This->Mode->Timeout = Timeout;
- This->Mode->Parity = Parity;
- This->Mode->DataBits = DataBits;
- This->Mode->StopBits = StopBits;
+ This->Mode->BaudRate = BaudRate;
+ This->Mode->ReceiveFifoDepth = ReceiveFifoDepth;
+ This->Mode->Timeout = Timeout;
+ This->Mode->Parity = Parity;
+ This->Mode->DataBits = DataBits;
+ This->Mode->StopBits = StopBits;
//
// See if Device Path Node has actually changed
//
- if (SerialDevice->UartDevicePath.BaudRate == BaudRate &&
- SerialDevice->UartDevicePath.DataBits == DataBits &&
- SerialDevice->UartDevicePath.Parity == Parity &&
- SerialDevice->UartDevicePath.StopBits == StopBits
- ) {
+ if ((SerialDevice->UartDevicePath.BaudRate == BaudRate) &&
+ (SerialDevice->UartDevicePath.DataBits == DataBits) &&
+ (SerialDevice->UartDevicePath.Parity == Parity) &&
+ (SerialDevice->UartDevicePath.StopBits == StopBits)
+ )
+ {
gBS->RestoreTPL (Tpl);
return EFI_SUCCESS;
}
+
//
// Update the device path
//
SerialDevice->UartDevicePath.BaudRate = BaudRate;
SerialDevice->UartDevicePath.DataBits = DataBits;
- SerialDevice->UartDevicePath.Parity = (UINT8) Parity;
- SerialDevice->UartDevicePath.StopBits = (UINT8) StopBits;
+ SerialDevice->UartDevicePath.Parity = (UINT8)Parity;
+ SerialDevice->UartDevicePath.StopBits = (UINT8)StopBits;
Status = EFI_SUCCESS;
if (SerialDevice->Handle != NULL) {
-
//
// Skip the optional Controller device path node
//
Uart = SkipControllerDevicePathNode (
- (EFI_DEVICE_PATH_PROTOCOL *) (
- (UINT8 *) SerialDevice->DevicePath + GetDevicePathSize (SerialDevice->ParentDevicePath) - END_DEVICE_PATH_LENGTH
- ),
+ (EFI_DEVICE_PATH_PROTOCOL *)(
+ (UINT8 *)SerialDevice->DevicePath + GetDevicePathSize (SerialDevice->ParentDevicePath) - END_DEVICE_PATH_LENGTH
+ ),
NULL,
NULL
);
@@ -879,11 +907,11 @@ SerialSetControl (
IN UINT32 Control
)
{
- SERIAL_DEV *SerialDevice;
- SERIAL_PORT_MCR Mcr;
- EFI_TPL Tpl;
- UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
- EFI_STATUS Status;
+ SERIAL_DEV *SerialDevice;
+ SERIAL_PORT_MCR Mcr;
+ EFI_TPL Tpl;
+ UART_FLOW_CONTROL_DEVICE_PATH *FlowControl;
+ EFI_STATUS Status;
//
// The control bits that can be set are :
@@ -900,7 +928,8 @@ SerialSetControl (
//
if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY |
EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE |
- EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) != 0) {
+ EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) != 0)
+ {
return EFI_UNSUPPORTED;
}
@@ -915,12 +944,12 @@ SerialSetControl (
//
SerialFlushTransmitFifo (SerialDevice);
- Mcr.Data = READ_MCR (SerialDevice);
- Mcr.Bits.DtrC = 0;
- Mcr.Bits.Rts = 0;
- Mcr.Bits.Lme = 0;
+ Mcr.Data = READ_MCR (SerialDevice);
+ Mcr.Bits.DtrC = 0;
+ Mcr.Bits.Rts = 0;
+ Mcr.Bits.Lme = 0;
SerialDevice->SoftwareLoopbackEnable = FALSE;
- SerialDevice->HardwareFlowControl = FALSE;
+ SerialDevice->HardwareFlowControl = FALSE;
if ((Control & EFI_SERIAL_DATA_TERMINAL_READY) == EFI_SERIAL_DATA_TERMINAL_READY) {
Mcr.Bits.DtrC = 1;
@@ -946,14 +975,15 @@ SerialSetControl (
Status = EFI_SUCCESS;
if (SerialDevice->Handle != NULL) {
- FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *) (
- (UINTN) SerialDevice->DevicePath
- + GetDevicePathSize (SerialDevice->ParentDevicePath)
- - END_DEVICE_PATH_LENGTH
- + sizeof (UART_DEVICE_PATH)
- );
+ FlowControl = (UART_FLOW_CONTROL_DEVICE_PATH *)(
+ (UINTN)SerialDevice->DevicePath
+ + GetDevicePathSize (SerialDevice->ParentDevicePath)
+ - END_DEVICE_PATH_LENGTH
+ + sizeof (UART_DEVICE_PATH)
+ );
if (IsUartFlowControlDevicePathNode (FlowControl) &&
- ((BOOLEAN) (ReadUnaligned32 (&FlowControl->FlowControlMap) == UART_FLOW_CONTROL_HARDWARE) != SerialDevice->HardwareFlowControl)) {
+ ((BOOLEAN)(ReadUnaligned32 (&FlowControl->FlowControlMap) == UART_FLOW_CONTROL_HARDWARE) != SerialDevice->HardwareFlowControl))
+ {
//
// Flow Control setting is changed, need to reinstall device path protocol
//
@@ -988,16 +1018,16 @@ SerialGetControl (
OUT UINT32 *Control
)
{
- SERIAL_DEV *SerialDevice;
- SERIAL_PORT_MSR Msr;
- SERIAL_PORT_MCR Mcr;
- EFI_TPL Tpl;
+ SERIAL_DEV *SerialDevice;
+ SERIAL_PORT_MSR Msr;
+ SERIAL_PORT_MCR Mcr;
+ EFI_TPL Tpl;
- Tpl = gBS->RaiseTPL (TPL_NOTIFY);
+ Tpl = gBS->RaiseTPL (TPL_NOTIFY);
- SerialDevice = SERIAL_DEV_FROM_THIS (This);
+ SerialDevice = SERIAL_DEV_FROM_THIS (This);
- *Control = 0;
+ *Control = 0;
//
// Read the Modem Status Register
@@ -1019,6 +1049,7 @@ SerialGetControl (
if (Msr.Bits.Dcd == 1) {
*Control |= EFI_SERIAL_CARRIER_DETECT;
}
+
//
// Read the Modem Control Register
//
@@ -1039,6 +1070,7 @@ SerialGetControl (
if (SerialDevice->HardwareFlowControl) {
*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
+
//
// Update FIFO status
//
@@ -1097,9 +1129,9 @@ SerialWrite (
UINTN Timeout;
UINTN BitsPerCharacter;
- SerialDevice = SERIAL_DEV_FROM_THIS (This);
- Elapsed = 0;
- ActualWrite = 0;
+ SerialDevice = SERIAL_DEV_FROM_THIS (This);
+ Elapsed = 0;
+ ActualWrite = 0;
if (*BufferSize == 0) {
return EFI_SUCCESS;
@@ -1115,9 +1147,9 @@ SerialWrite (
return EFI_DEVICE_ERROR;
}
- Tpl = gBS->RaiseTPL (TPL_NOTIFY);
+ Tpl = gBS->RaiseTPL (TPL_NOTIFY);
- CharBuffer = (UINT8 *) Buffer;
+ CharBuffer = (UINT8 *)Buffer;
//
// Compute the number of bits in a single character. This is a start bit,
@@ -1143,10 +1175,10 @@ SerialWrite (
Timeout = MAX (
This->Mode->Timeout,
(UINTN)DivU64x64Remainder (
- BitsPerCharacter * (SerialDevice->TransmitFifoDepth + 1) * 1000000,
- This->Mode->BaudRate,
- NULL
- )
+ BitsPerCharacter * (SerialDevice->TransmitFifoDepth + 1) * 1000000,
+ This->Mode->BaudRate,
+ NULL
+ )
);
for (Index = 0; Index < *BufferSize; Index++) {
@@ -1208,8 +1240,8 @@ SerialRead (
EFI_STATUS Status;
EFI_TPL Tpl;
- SerialDevice = SERIAL_DEV_FROM_THIS (This);
- Elapsed = 0;
+ SerialDevice = SERIAL_DEV_FROM_THIS (This);
+ Elapsed = 0;
if (*BufferSize == 0) {
return EFI_SUCCESS;
@@ -1219,9 +1251,9 @@ SerialRead (
return EFI_DEVICE_ERROR;
}
- Tpl = gBS->RaiseTPL (TPL_NOTIFY);
+ Tpl = gBS->RaiseTPL (TPL_NOTIFY);
- Status = SerialReceiveTransmit (SerialDevice);
+ Status = SerialReceiveTransmit (SerialDevice);
if (EFI_ERROR (Status)) {
*BufferSize = 0;
@@ -1237,7 +1269,7 @@ SerialRead (
return EFI_DEVICE_ERROR;
}
- CharBuffer = (UINT8 *) Buffer;
+ CharBuffer = (UINT8 *)Buffer;
for (Index = 0; Index < *BufferSize; Index++) {
while (SerialFifoRemove (&SerialDevice->Receive, &(CharBuffer[Index])) != EFI_SUCCESS) {
//
@@ -1261,6 +1293,7 @@ SerialRead (
return EFI_DEVICE_ERROR;
}
}
+
//
// Successful read so reset timeout
//
@@ -1283,12 +1316,12 @@ SerialRead (
**/
BOOLEAN
SerialPresent (
- IN SERIAL_DEV *SerialDevice
+ IN SERIAL_DEV *SerialDevice
)
{
- UINT8 Temp;
- BOOLEAN Status;
+ UINT8 Temp;
+ BOOLEAN Status;
Status = TRUE;
@@ -1307,6 +1340,7 @@ SerialPresent (
if (READ_SCR (SerialDevice) != 0x55) {
Status = FALSE;
}
+
//
// Restore SCR
//
@@ -1325,23 +1359,36 @@ SerialPresent (
**/
UINT8
SerialReadRegister (
- IN SERIAL_DEV *SerialDev,
- IN UINT32 Offset
+ IN SERIAL_DEV *SerialDev,
+ IN UINT32 Offset
)
{
- UINT8 Data;
- EFI_STATUS Status;
+ UINT8 Data;
+ EFI_STATUS Status;
if (SerialDev->PciDeviceInfo == NULL) {
- return IoRead8 ((UINTN) SerialDev->BaseAddress + Offset * SerialDev->RegisterStride);
+ return IoRead8 ((UINTN)SerialDev->BaseAddress + Offset * SerialDev->RegisterStride);
} else {
if (SerialDev->MmioAccess) {
- Status = SerialDev->PciDeviceInfo->PciIo->Mem.Read (SerialDev->PciDeviceInfo->PciIo, EfiPciIoWidthUint8, EFI_PCI_IO_PASS_THROUGH_BAR,
- SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, 1, &Data);
+ Status = SerialDev->PciDeviceInfo->PciIo->Mem.Read (
+ SerialDev->PciDeviceInfo->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_IO_PASS_THROUGH_BAR,
+ SerialDev->BaseAddress + Offset * SerialDev->RegisterStride,
+ 1,
+ &Data
+ );
} else {
- Status = SerialDev->PciDeviceInfo->PciIo->Io.Read (SerialDev->PciDeviceInfo->PciIo, EfiPciIoWidthUint8, EFI_PCI_IO_PASS_THROUGH_BAR,
- SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, 1, &Data);
+ Status = SerialDev->PciDeviceInfo->PciIo->Io.Read (
+ SerialDev->PciDeviceInfo->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_IO_PASS_THROUGH_BAR,
+ SerialDev->BaseAddress + Offset * SerialDev->RegisterStride,
+ 1,
+ &Data
+ );
}
+
ASSERT_EFI_ERROR (Status);
return Data;
}
@@ -1356,23 +1403,36 @@ SerialReadRegister (
**/
VOID
SerialWriteRegister (
- IN SERIAL_DEV *SerialDev,
- IN UINT32 Offset,
- IN UINT8 Data
+ IN SERIAL_DEV *SerialDev,
+ IN UINT32 Offset,
+ IN UINT8 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (SerialDev->PciDeviceInfo == NULL) {
- IoWrite8 ((UINTN) SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, Data);
+ IoWrite8 ((UINTN)SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, Data);
} else {
if (SerialDev->MmioAccess) {
- Status = SerialDev->PciDeviceInfo->PciIo->Mem.Write (SerialDev->PciDeviceInfo->PciIo, EfiPciIoWidthUint8, EFI_PCI_IO_PASS_THROUGH_BAR,
- SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, 1, &Data);
+ Status = SerialDev->PciDeviceInfo->PciIo->Mem.Write (
+ SerialDev->PciDeviceInfo->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_IO_PASS_THROUGH_BAR,
+ SerialDev->BaseAddress + Offset * SerialDev->RegisterStride,
+ 1,
+ &Data
+ );
} else {
- Status = SerialDev->PciDeviceInfo->PciIo->Io.Write (SerialDev->PciDeviceInfo->PciIo, EfiPciIoWidthUint8, EFI_PCI_IO_PASS_THROUGH_BAR,
- SerialDev->BaseAddress + Offset * SerialDev->RegisterStride, 1, &Data);
+ Status = SerialDev->PciDeviceInfo->PciIo->Io.Write (
+ SerialDev->PciDeviceInfo->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_IO_PASS_THROUGH_BAR,
+ SerialDev->BaseAddress + Offset * SerialDev->RegisterStride,
+ 1,
+ &Data
+ );
}
+
ASSERT_EFI_ERROR (Status);
}
}
diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/SataControllerDxe/ComponentName.c
index 5086d77474..9cc416fc1f 100644
--- a/MdeModulePkg/Bus/Pci/SataControllerDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/ComponentName.c
@@ -20,16 +20,16 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSataControllerCompon
//
/// EFI Component Name 2 Protocol
///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SataControllerComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SataControllerComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SataControllerComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SataControllerComponentNameGetControllerName,
"en"
};
//
/// Driver Name Strings
///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerDriverNameTable[] = {
{
"eng;en",
(CHAR16 *)L"Sata Controller Init Driver"
@@ -43,7 +43,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerDriverName
///
/// Controller Name Strings
///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerControllerNameTable[] = {
{
"eng;en",
(CHAR16 *)L"Sata Controller"
@@ -78,9 +78,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerController
EFI_STATUS
EFIAPI
SataControllerComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -135,14 +135,14 @@ SataControllerComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SataControllerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Make sure this driver is currently managing ControllHandle
@@ -161,11 +161,10 @@ SataControllerComponentNameGetControllerName (
}
return LookupUnicodeString2 (
- Language,
- This->SupportedLanguages,
- mSataControllerControllerNameTable,
- ControllerName,
- (BOOLEAN)(This == &gSataControllerComponentName)
- );
+ Language,
+ This->SupportedLanguages,
+ mSataControllerControllerNameTable,
+ ControllerName,
+ (BOOLEAN)(This == &gSataControllerComponentName)
+ );
}
-
diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c
index 1133e1c935..f661efaec7 100644
--- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c
+++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c
@@ -12,7 +12,7 @@
///
/// EFI_DRIVER_BINDING_PROTOCOL instance
///
-EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding = {
SataControllerSupported,
SataControllerStart,
SataControllerStop,
@@ -33,11 +33,11 @@ EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding = {
UINT32
EFIAPI
AhciReadReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (PciIo != NULL);
@@ -47,7 +47,7 @@ AhciReadReg (
PciIo,
EfiPciIoWidthUint32,
AHCI_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
@@ -73,21 +73,20 @@ CalculateBestPioMode (
OUT UINT16 *SelectedMode
)
{
- UINT16 PioMode;
- UINT16 AdvancedPioMode;
- UINT16 Temp;
- UINT16 Index;
- UINT16 MinimumPioCycleTime;
+ UINT16 PioMode;
+ UINT16 AdvancedPioMode;
+ UINT16 Temp;
+ UINT16 Index;
+ UINT16 MinimumPioCycleTime;
Temp = 0xff;
- PioMode = (UINT8) (((ATA5_IDENTIFY_DATA *) (&(IdentifyData->AtaData)))->pio_cycle_timing >> 8);
+ PioMode = (UINT8)(((ATA5_IDENTIFY_DATA *)(&(IdentifyData->AtaData)))->pio_cycle_timing >> 8);
//
// See whether Identify Data word 64 - 70 are valid
//
if ((IdentifyData->AtaData.field_validity & 0x02) == 0x02) {
-
AdvancedPioMode = IdentifyData->AtaData.advanced_pio_modes;
DEBUG ((DEBUG_INFO, "CalculateBestPioMode: AdvancedPioMode = %x\n", AdvancedPioMode));
@@ -105,7 +104,7 @@ CalculateBestPioMode (
// the best PIO Mode is the value in pio_cycle_timing.
//
if (Temp != 0xff) {
- AdvancedPioMode = (UINT16) (Temp + 3);
+ AdvancedPioMode = (UINT16)(Temp + 3);
} else {
AdvancedPioMode = PioMode;
}
@@ -113,16 +112,16 @@ CalculateBestPioMode (
//
// Limit the PIO mode to at most PIO4.
//
- PioMode = (UINT16) MIN (AdvancedPioMode, 4);
+ PioMode = (UINT16)MIN (AdvancedPioMode, 4);
MinimumPioCycleTime = IdentifyData->AtaData.min_pio_cycle_time_with_flow_control;
if (MinimumPioCycleTime <= 120) {
- PioMode = (UINT16) MIN (4, PioMode);
+ PioMode = (UINT16)MIN (4, PioMode);
} else if (MinimumPioCycleTime <= 180) {
- PioMode = (UINT16) MIN (3, PioMode);
+ PioMode = (UINT16)MIN (3, PioMode);
} else if (MinimumPioCycleTime <= 240) {
- PioMode = (UINT16) MIN (2, PioMode);
+ PioMode = (UINT16)MIN (2, PioMode);
} else {
PioMode = 0;
}
@@ -136,7 +135,7 @@ CalculateBestPioMode (
}
if (PioMode >= *DisPioMode) {
- PioMode = (UINT16) (*DisPioMode - 1);
+ PioMode = (UINT16)(*DisPioMode - 1);
}
}
@@ -145,7 +144,6 @@ CalculateBestPioMode (
} else {
*SelectedMode = PioMode; // ATA_PIO_MODE_2 to ATA_PIO_MODE_4;
}
-
} else {
//
// Identify Data word 64 - 70 are not valid
@@ -166,7 +164,6 @@ CalculateBestPioMode (
} else {
*SelectedMode = 2; // ATA_PIO_MODE_2;
}
-
}
return EFI_SUCCESS;
@@ -190,8 +187,8 @@ CalculateBestUdmaMode (
OUT UINT16 *SelectedMode
)
{
- UINT16 TempMode;
- UINT16 DeviceUDmaMode;
+ UINT16 TempMode;
+ UINT16 DeviceUDmaMode;
DeviceUDmaMode = 0;
@@ -205,7 +202,7 @@ CalculateBestUdmaMode (
DeviceUDmaMode = IdentifyData->AtaData.ultra_dma_mode;
DEBUG ((DEBUG_INFO, "CalculateBestUdmaMode: DeviceUDmaMode = %x\n", DeviceUDmaMode));
DeviceUDmaMode &= 0x3f;
- TempMode = 0; // initialize it to UDMA-0
+ TempMode = 0; // initialize it to UDMA-0
while ((DeviceUDmaMode >>= 1) != 0) {
TempMode++;
@@ -221,7 +218,7 @@ CalculateBestUdmaMode (
}
if (TempMode >= *DisUDmaMode) {
- TempMode = (UINT16) (*DisUDmaMode - 1);
+ TempMode = (UINT16)(*DisUDmaMode - 1);
}
}
@@ -246,11 +243,11 @@ CalculateBestUdmaMode (
EFI_STATUS
EFIAPI
InitializeSataControllerDriver (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -285,14 +282,14 @@ InitializeSataControllerDriver (
EFI_STATUS
EFIAPI
SataControllerSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 PciData;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ PCI_TYPE00 PciData;
//
// Attempt to open PCI I/O Protocol
@@ -300,7 +297,7 @@ SataControllerSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -348,9 +345,9 @@ SataControllerSupported (
EFI_STATUS
EFIAPI
SataControllerStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
@@ -372,7 +369,7 @@ SataControllerStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -394,8 +391,8 @@ SataControllerStart (
//
// Initialize Sata Private Data
//
- Private->Signature = SATA_CONTROLLER_SIGNATURE;
- Private->PciIo = PciIo;
+ Private->Signature = SATA_CONTROLLER_SIGNATURE;
+ Private->PciIo = PciIo;
Private->IdeInit.GetChannelInfo = IdeInitGetChannelInfo;
Private->IdeInit.NotifyPhase = IdeInitNotifyPhase;
Private->IdeInit.SubmitData = IdeInitSubmitData;
@@ -415,7 +412,7 @@ SataControllerStart (
&Private->OriginalPciAttributes
);
if (EFI_ERROR (Status)) {
- goto Done;
+ goto Done;
}
DEBUG ((
@@ -437,12 +434,12 @@ SataControllerStart (
DEBUG ((DEBUG_INFO, "Supported PCI Attributes = 0x%llx\n", Supports));
Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
if (EFI_ERROR (Status)) {
goto Done;
}
@@ -475,13 +472,16 @@ SataControllerStart (
Status = EFI_UNSUPPORTED;
goto Done;
}
+
MaxPortNumber = 31;
while (MaxPortNumber > 0) {
if ((Data32 & ((UINT32)1 << MaxPortNumber)) != 0) {
break;
}
+
MaxPortNumber--;
}
+
//
// Make the ChannelCount equal to the max port number (0 based) plus 1.
//
@@ -492,13 +492,13 @@ SataControllerStart (
//
Data32 = AhciReadReg (PciIo, R_AHCI_CAP);
DEBUG ((DEBUG_INFO, "HBA Capabilities(CAP) = 0x%x\n", Data32));
- Private->DeviceCount = AHCI_MAX_DEVICES;
+ Private->DeviceCount = AHCI_MAX_DEVICES;
if ((Data32 & B_AHCI_CAP_SPM) == B_AHCI_CAP_SPM) {
Private->DeviceCount = AHCI_MULTI_MAX_DEVICES;
}
}
- TotalCount = (UINTN) (Private->IdeInit.ChannelCount) * (UINTN) (Private->DeviceCount);
+ TotalCount = (UINTN)(Private->IdeInit.ChannelCount) * (UINTN)(Private->DeviceCount);
Private->DisqualifiedModes = AllocateZeroPool ((sizeof (EFI_ATA_COLLECTIVE_MODE)) * TotalCount);
if (Private->DisqualifiedModes == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -529,23 +529,25 @@ SataControllerStart (
Done:
if (EFI_ERROR (Status)) {
-
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
if (Private != NULL) {
if (Private->DisqualifiedModes != NULL) {
FreePool (Private->DisqualifiedModes);
}
+
if (Private->IdentifyData != NULL) {
FreePool (Private->IdentifyData);
}
+
if (Private->IdentifyValid != NULL) {
FreePool (Private->IdentifyValid);
}
+
if (Private->PciAttributesChanged) {
//
// Restore original PCI attributes
@@ -557,6 +559,7 @@ Done:
NULL
);
}
+
FreePool (Private);
}
}
@@ -581,10 +584,10 @@ Done:
EFI_STATUS
EFIAPI
SataControllerStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -597,7 +600,7 @@ SataControllerStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiIdeControllerInitProtocolGuid,
- (VOID **) &IdeInit,
+ (VOID **)&IdeInit,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -626,12 +629,15 @@ SataControllerStop (
if (Private->DisqualifiedModes != NULL) {
FreePool (Private->DisqualifiedModes);
}
+
if (Private->IdentifyData != NULL) {
FreePool (Private->IdentifyData);
}
+
if (Private->IdentifyValid != NULL) {
FreePool (Private->IdentifyValid);
}
+
if (Private->PciAttributesChanged) {
//
// Restore original PCI attributes
@@ -643,6 +649,7 @@ SataControllerStop (
NULL
);
}
+
FreePool (Private);
}
@@ -691,6 +698,7 @@ FlatDeviceIndex (
//
// Interface functions of IDE_CONTROLLER_INIT protocol
//
+
/**
Returns the information about the specified IDE channel.
@@ -730,18 +738,19 @@ FlatDeviceIndex (
EFI_STATUS
EFIAPI
IdeInitGetChannelInfo (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- OUT BOOLEAN *Enabled,
- OUT UINT8 *MaxDevices
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ OUT BOOLEAN *Enabled,
+ OUT UINT8 *MaxDevices
)
{
EFI_SATA_CONTROLLER_PRIVATE_DATA *Private;
+
Private = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
ASSERT (Private != NULL);
if (Channel < This->ChannelCount) {
- *Enabled = TRUE;
+ *Enabled = TRUE;
*MaxDevices = Private->DeviceCount;
return EFI_SUCCESS;
}
@@ -778,9 +787,9 @@ IdeInitGetChannelInfo (
EFI_STATUS
EFIAPI
IdeInitNotifyPhase (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
- IN UINT8 Channel
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
+ IN UINT8 Channel
)
{
return EFI_SUCCESS;
@@ -828,10 +837,10 @@ IdeInitNotifyPhase (
EFI_STATUS
EFIAPI
IdeInitSubmitData (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_IDENTIFY_DATA *IdentifyData
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_IDENTIFY_DATA *IdentifyData
)
{
EFI_SATA_CONTROLLER_PRIVATE_DATA *Private;
@@ -907,10 +916,10 @@ IdeInitSubmitData (
EFI_STATUS
EFIAPI
IdeInitDisqualifyMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *BadModes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *BadModes
)
{
EFI_SATA_CONTROLLER_PRIVATE_DATA *Private;
@@ -995,10 +1004,10 @@ IdeInitDisqualifyMode (
EFI_STATUS
EFIAPI
IdeInitCalculateMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
)
{
EFI_SATA_CONTROLLER_PRIVATE_DATA *Private;
@@ -1024,8 +1033,8 @@ IdeInitCalculateMode (
DeviceIndex = FlatDeviceIndex (Private, Channel, Device);
- IdentifyData = &(Private->IdentifyData[DeviceIndex]);
- IdentifyValid = Private->IdentifyValid[DeviceIndex];
+ IdentifyData = &(Private->IdentifyData[DeviceIndex]);
+ IdentifyValid = Private->IdentifyValid[DeviceIndex];
DisqualifiedModes = &(Private->DisqualifiedModes[DeviceIndex]);
//
@@ -1037,32 +1046,32 @@ IdeInitCalculateMode (
}
Status = CalculateBestPioMode (
- IdentifyData,
- (DisqualifiedModes->PioMode.Valid ? ((UINT16 *) &(DisqualifiedModes->PioMode.Mode)) : NULL),
- &SelectedMode
- );
+ IdentifyData,
+ (DisqualifiedModes->PioMode.Valid ? ((UINT16 *)&(DisqualifiedModes->PioMode.Mode)) : NULL),
+ &SelectedMode
+ );
if (!EFI_ERROR (Status)) {
(*SupportedModes)->PioMode.Valid = TRUE;
- (*SupportedModes)->PioMode.Mode = SelectedMode;
-
+ (*SupportedModes)->PioMode.Mode = SelectedMode;
} else {
(*SupportedModes)->PioMode.Valid = FALSE;
}
+
DEBUG ((DEBUG_INFO, "IdeInitCalculateMode: PioMode = %x\n", (*SupportedModes)->PioMode.Mode));
Status = CalculateBestUdmaMode (
- IdentifyData,
- (DisqualifiedModes->UdmaMode.Valid ? ((UINT16 *) &(DisqualifiedModes->UdmaMode.Mode)) : NULL),
- &SelectedMode
- );
+ IdentifyData,
+ (DisqualifiedModes->UdmaMode.Valid ? ((UINT16 *)&(DisqualifiedModes->UdmaMode.Mode)) : NULL),
+ &SelectedMode
+ );
if (!EFI_ERROR (Status)) {
(*SupportedModes)->UdmaMode.Valid = TRUE;
(*SupportedModes)->UdmaMode.Mode = SelectedMode;
-
} else {
(*SupportedModes)->UdmaMode.Valid = FALSE;
}
+
DEBUG ((DEBUG_INFO, "IdeInitCalculateMode: UdmaMode = %x\n", (*SupportedModes)->UdmaMode.Mode));
//
@@ -1097,10 +1106,10 @@ IdeInitCalculateMode (
EFI_STATUS
EFIAPI
IdeInitSetTiming (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *Modes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *Modes
)
{
return EFI_SUCCESS;
diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h
index 7af3ad855f..4d545fb1f9 100644
--- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h
+++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h
@@ -30,94 +30,95 @@
//
// Global Variables definitions
//
-extern EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gSataControllerComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gSataControllerComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2;
-#define AHCI_BAR_INDEX 0x05
-#define R_AHCI_CAP 0x0
-#define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
-#define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier
-#define R_AHCI_PI 0xC
+#define AHCI_BAR_INDEX 0x05
+#define R_AHCI_CAP 0x0
+#define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
+#define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier
+#define R_AHCI_PI 0xC
///
/// AHCI each channel can have up to 1 device
///
-#define AHCI_MAX_DEVICES 0x01
+#define AHCI_MAX_DEVICES 0x01
///
/// AHCI each channel can have 15 devices in the presence of a multiplier
///
-#define AHCI_MULTI_MAX_DEVICES 0x0F
+#define AHCI_MULTI_MAX_DEVICES 0x0F
///
/// IDE supports 2 channel max
///
-#define IDE_MAX_CHANNEL 0x02
+#define IDE_MAX_CHANNEL 0x02
///
/// IDE supports 2 devices max
///
-#define IDE_MAX_DEVICES 0x02
+#define IDE_MAX_DEVICES 0x02
-#define SATA_ENUMER_ALL FALSE
+#define SATA_ENUMER_ALL FALSE
//
// Sata Controller driver private data structure
//
-#define SATA_CONTROLLER_SIGNATURE SIGNATURE_32('S','A','T','A')
+#define SATA_CONTROLLER_SIGNATURE SIGNATURE_32('S','A','T','A')
typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA {
//
// Standard signature used to identify Sata Controller private data
//
- UINT32 Signature;
+ UINT32 Signature;
//
// Protocol instance of IDE_CONTROLLER_INIT produced by this driver
//
- EFI_IDE_CONTROLLER_INIT_PROTOCOL IdeInit;
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL IdeInit;
//
// Copy of protocol pointers used by this driver
//
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
//
// The number of devices that are supported by this channel
//
- UINT8 DeviceCount;
+ UINT8 DeviceCount;
//
// The highest disqulified mode for each attached device,
// From ATA/ATAPI spec, if a mode is not supported,
// the modes higher than it is also not supported
//
- EFI_ATA_COLLECTIVE_MODE *DisqualifiedModes;
+ EFI_ATA_COLLECTIVE_MODE *DisqualifiedModes;
//
// A copy of EFI_IDENTIFY_DATA data for each attached SATA device and its flag
//
- EFI_IDENTIFY_DATA *IdentifyData;
- BOOLEAN *IdentifyValid;
+ EFI_IDENTIFY_DATA *IdentifyData;
+ BOOLEAN *IdentifyValid;
//
// Track the state so that the PCI attributes that were modified
// can be restored to the original value later.
//
- BOOLEAN PciAttributesChanged;
+ BOOLEAN PciAttributesChanged;
//
// Copy of the original PCI Attributes
//
- UINT64 OriginalPciAttributes;
+ UINT64 OriginalPciAttributes;
} EFI_SATA_CONTROLLER_PRIVATE_DATA;
-#define SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_SATA_CONTROLLER_PRIVATE_DATA, IdeInit, SATA_CONTROLLER_SIGNATURE)
+#define SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_SATA_CONTROLLER_PRIVATE_DATA, IdeInit, SATA_CONTROLLER_SIGNATURE)
//
// Driver binding functions declaration
//
+
/**
Supported function of Driver Binding protocol for this driver.
Test to see if this driver supports ControllerHandle.
@@ -135,9 +136,9 @@ typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA {
EFI_STATUS
EFIAPI
SataControllerSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -157,9 +158,9 @@ SataControllerSupported (
EFI_STATUS
EFIAPI
SataControllerStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -177,15 +178,16 @@ SataControllerStart (
EFI_STATUS
EFIAPI
SataControllerStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// IDE controller init functions declaration
//
+
/**
Returns the information about the specified IDE channel.
@@ -226,10 +228,10 @@ SataControllerStop (
EFI_STATUS
EFIAPI
IdeInitGetChannelInfo (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- OUT BOOLEAN *Enabled,
- OUT UINT8 *MaxDevices
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ OUT BOOLEAN *Enabled,
+ OUT UINT8 *MaxDevices
);
/**
@@ -260,9 +262,9 @@ IdeInitGetChannelInfo (
EFI_STATUS
EFIAPI
IdeInitNotifyPhase (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
- IN UINT8 Channel
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
+ IN UINT8 Channel
);
/**
@@ -307,10 +309,10 @@ IdeInitNotifyPhase (
EFI_STATUS
EFIAPI
IdeInitSubmitData (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_IDENTIFY_DATA *IdentifyData
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_IDENTIFY_DATA *IdentifyData
);
/**
@@ -356,10 +358,10 @@ IdeInitSubmitData (
EFI_STATUS
EFIAPI
IdeInitDisqualifyMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *BadModes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *BadModes
);
/**
@@ -419,10 +421,10 @@ IdeInitDisqualifyMode (
EFI_STATUS
EFIAPI
IdeInitCalculateMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
);
/**
@@ -451,15 +453,16 @@ IdeInitCalculateMode (
EFI_STATUS
EFIAPI
IdeInitSetTiming (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *Modes
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *Modes
);
//
// Forward reference declaration
//
+
/**
Retrieves a Unicode string that is the user readable name of the UEFI Driver.
@@ -484,9 +487,9 @@ IdeInitSetTiming (
EFI_STATUS
EFIAPI
SataControllerComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
);
/**
@@ -532,12 +535,11 @@ SataControllerComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SataControllerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
#endif
-
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ComponentName.c
index c915d37bf3..2301d4ab4d 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/ComponentName.c
@@ -11,7 +11,7 @@
//
// EFI Component Name Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName = {
SdMmcPciHcComponentNameGetDriverName,
SdMmcPciHcComponentNameGetControllerName,
"eng"
@@ -20,20 +20,20 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentNa
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SdMmcPciHcComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SdMmcPciHcComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SdMmcPciHcComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SdMmcPciHcComponentNameGetControllerName,
"en"
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcDriverNameTable[] = {
{ "eng;en", L"Edkii Sd/Mmc Host Controller Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcControllerNameTable[] = {
{ "eng;en", L"Edkii Sd/Mmc Host Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -78,9 +78,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcControllerName
EFI_STATUS
EFIAPI
SdMmcPciHcComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -163,16 +163,16 @@ SdMmcPciHcComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SdMmcPciHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- if (Language == NULL || ControllerName == NULL) {
+ if ((Language == NULL) || (ControllerName == NULL)) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
index 8b5f8e8ee7..a392a4e31a 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
@@ -24,14 +24,14 @@
**/
EFI_STATUS
EmmcReset (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -41,9 +41,9 @@ EmmcReset (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;
- SdMmcCmdBlk.ResponseType = 0;
+ SdMmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;
+ SdMmcCmdBlk.ResponseType = 0;
SdMmcCmdBlk.CommandArgument = 0;
gBS->Stall (1000);
@@ -74,10 +74,10 @@ EmmcGetOcr (
IN OUT UINT32 *Argument
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -87,9 +87,9 @@ EmmcGetOcr (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;
SdMmcCmdBlk.CommandArgument = *Argument;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -118,14 +118,14 @@ EmmcGetOcr (
**/
EFI_STATUS
EmmcGetAllCid (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -135,9 +135,9 @@ EmmcGetAllCid (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = 0;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -161,15 +161,15 @@ EmmcGetAllCid (
**/
EFI_STATUS
EmmcSetRca (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -179,9 +179,9 @@ EmmcSetRca (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -211,13 +211,13 @@ EmmcGetCsd (
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
IN UINT8 Slot,
IN UINT16 Rca,
- OUT EMMC_CSD *Csd
+ OUT EMMC_CSD *Csd
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -227,9 +227,9 @@ EmmcGetCsd (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -237,7 +237,7 @@ EmmcGetCsd (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
}
return Status;
@@ -258,15 +258,15 @@ EmmcGetCsd (
**/
EFI_STATUS
EmmcSelect (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -276,9 +276,9 @@ EmmcSelect (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -303,13 +303,13 @@ EFI_STATUS
EmmcGetExtCsd (
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
IN UINT8 Slot,
- OUT EMMC_EXT_CSD *ExtCsd
+ OUT EMMC_EXT_CSD *ExtCsd
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -319,9 +319,9 @@ EmmcGetExtCsd (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = 0x00000000;
Packet.InDataBuffer = ExtCsd;
@@ -350,18 +350,18 @@ EmmcGetExtCsd (
**/
EFI_STATUS
EmmcSwitch (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT8 Access,
+ IN UINT8 Index,
+ IN UINT8 Value,
+ IN UINT8 CmdSet
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -371,9 +371,9 @@ EmmcSwitch (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SWITCH;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
+ SdMmcCmdBlk.CommandIndex = EMMC_SWITCH;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
SdMmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -400,13 +400,13 @@ EmmcSendStatus (
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
IN UINT8 Slot,
IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ OUT UINT32 *DevStatus
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -416,9 +416,9 @@ EmmcSendStatus (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -447,16 +447,16 @@ EmmcSendStatus (
**/
EFI_STATUS
EmmcSendTuningBlk (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 BusWidth
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT8 BusWidth
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[128];
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 TuningBlock[128];
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -466,9 +466,9 @@ EmmcSendTuningBlk (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = 0;
Packet.InDataBuffer = TuningBlock;
@@ -503,24 +503,25 @@ EmmcSendTuningBlk (
**/
EFI_STATUS
EmmcTuningClkForHs200 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 BusWidth
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 Retry;
//
// Notify the host that the sampling clock tuning procedure starts.
//
HostCtrl2 = BIT6;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
//
@@ -550,11 +551,12 @@ EmmcTuningClkForHs200 (
//
// Abort the tuning procedure and reset the tuning circuit.
//
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
return EFI_DEVICE_ERROR;
}
@@ -615,19 +617,19 @@ EmmcCheckSwitchStatus (
**/
EFI_STATUS
EmmcSwitchBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN BOOLEAN IsDdr,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
//
// Write Byte, the Value field is written into the byte pointed by Index.
@@ -683,23 +685,23 @@ EmmcSwitchBusWidth (
**/
EFI_STATUS
EmmcSwitchBusTiming (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength,
- IN SD_MMC_BUS_MODE BusTiming,
- IN UINT32 ClockFreq
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength,
+ IN SD_MMC_BUS_MODE BusTiming,
+ IN UINT32 ClockFreq
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- SD_MMC_HC_PRIVATE_DATA *Private;
- UINT8 HostCtrl1;
- BOOLEAN DelaySendStatus;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ UINT8 HostCtrl1;
+ BOOLEAN DelaySendStatus;
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
//
@@ -733,15 +735,15 @@ EmmcSwitchBusTiming (
return Status;
}
- if (BusTiming == SdMmcMmcHsSdr || BusTiming == SdMmcMmcHsDdr) {
+ if ((BusTiming == SdMmcMmcHsSdr) || (BusTiming == SdMmcMmcHsDdr)) {
HostCtrl1 = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
} else {
- HostCtrl1 = (UINT8)~BIT2;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 = (UINT8) ~BIT2;
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -767,6 +769,7 @@ EmmcSwitchBusTiming (
if (EFI_ERROR (Status)) {
return Status;
}
+
DelaySendStatus = FALSE;
} else {
DelaySendStatus = TRUE;
@@ -808,18 +811,19 @@ EmmcSwitchBusTiming (
**/
EFI_STATUS
EmmcSwitchToHighSpeed (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN SD_MMC_BUS_SETTINGS *BusMode
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN SD_MMC_BUS_SETTINGS *BusMode
)
{
EFI_STATUS Status;
BOOLEAN IsDdr;
- if ((BusMode->BusTiming != SdMmcMmcHsSdr && BusMode->BusTiming != SdMmcMmcHsDdr && BusMode->BusTiming != SdMmcMmcLegacy) ||
- BusMode->ClockFreq > 52) {
+ if (((BusMode->BusTiming != SdMmcMmcHsSdr) && (BusMode->BusTiming != SdMmcMmcHsDdr) && (BusMode->BusTiming != SdMmcMmcLegacy)) ||
+ (BusMode->ClockFreq > 52))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -855,17 +859,18 @@ EmmcSwitchToHighSpeed (
**/
EFI_STATUS
EmmcSwitchToHS200 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN SD_MMC_BUS_SETTINGS *BusMode
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN SD_MMC_BUS_SETTINGS *BusMode
)
{
EFI_STATUS Status;
- if (BusMode->BusTiming != SdMmcMmcHs200 ||
- (BusMode->BusWidth != 4 && BusMode->BusWidth != 8)) {
+ if ((BusMode->BusTiming != SdMmcMmcHs200) ||
+ ((BusMode->BusWidth != 4) && (BusMode->BusWidth != 8)))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -902,25 +907,26 @@ EmmcSwitchToHS200 (
**/
EFI_STATUS
EmmcSwitchToHS400 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN SD_MMC_BUS_SETTINGS *BusMode
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN SD_MMC_BUS_SETTINGS *BusMode
)
{
EFI_STATUS Status;
SD_MMC_BUS_SETTINGS Hs200BusMode;
UINT32 HsFreq;
- if (BusMode->BusTiming != SdMmcMmcHs400 ||
- BusMode->BusWidth != 8) {
+ if ((BusMode->BusTiming != SdMmcMmcHs400) ||
+ (BusMode->BusWidth != 8))
+ {
return EFI_INVALID_PARAMETER;
}
- Hs200BusMode.BusTiming = SdMmcMmcHs200;
- Hs200BusMode.BusWidth = BusMode->BusWidth;
- Hs200BusMode.ClockFreq = BusMode->ClockFreq;
+ Hs200BusMode.BusTiming = SdMmcMmcHs200;
+ Hs200BusMode.BusWidth = BusMode->BusWidth;
+ Hs200BusMode.ClockFreq = BusMode->ClockFreq;
Hs200BusMode.DriverStrength = BusMode->DriverStrength;
Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, &Hs200BusMode);
@@ -973,29 +979,34 @@ EmmcIsBusTimingSupported (
Supported = FALSE;
switch (BusTiming) {
case SdMmcMmcHs400:
- if ((((ExtCsd->DeviceType & (BIT6 | BIT7)) != 0) && (Capabilities->Hs400 != 0)) && Capabilities->BusWidth8 != 0) {
+ if ((((ExtCsd->DeviceType & (BIT6 | BIT7)) != 0) && (Capabilities->Hs400 != 0)) && (Capabilities->BusWidth8 != 0)) {
Supported = TRUE;
}
+
break;
case SdMmcMmcHs200:
if ((((ExtCsd->DeviceType & (BIT4 | BIT5)) != 0) && (Capabilities->Sdr104 != 0))) {
Supported = TRUE;
}
+
break;
case SdMmcMmcHsDdr:
if ((((ExtCsd->DeviceType & (BIT2 | BIT3)) != 0) && (Capabilities->Ddr50 != 0))) {
Supported = TRUE;
}
+
break;
case SdMmcMmcHsSdr:
if ((((ExtCsd->DeviceType & BIT1) != 0) && (Capabilities->HighSpeed != 0))) {
Supported = TRUE;
}
+
break;
case SdMmcMmcLegacy:
if ((ExtCsd->DeviceType & BIT0) != 0) {
Supported = TRUE;
}
+
break;
default:
ASSERT (FALSE);
@@ -1018,8 +1029,8 @@ EmmcIsBusTimingSupported (
SD_MMC_BUS_MODE
EmmcGetTargetBusTiming (
IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN EMMC_EXT_CSD *ExtCsd
+ IN UINT8 SlotIndex,
+ IN EMMC_EXT_CSD *ExtCsd
)
{
SD_MMC_BUS_MODE BusTiming;
@@ -1033,6 +1044,7 @@ EmmcGetTargetBusTiming (
if (EmmcIsBusTimingSupported (Private, SlotIndex, ExtCsd, BusTiming)) {
break;
}
+
BusTiming--;
}
@@ -1052,17 +1064,17 @@ EmmcGetTargetBusTiming (
**/
BOOLEAN
EmmcIsBusWidthSupported (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN SD_MMC_BUS_MODE BusTiming,
- IN UINT16 BusWidth
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN SD_MMC_BUS_MODE BusTiming,
+ IN UINT16 BusWidth
)
{
- if (BusWidth == 8 && Private->Capability[SlotIndex].BusWidth8 != 0) {
+ if ((BusWidth == 8) && (Private->Capability[SlotIndex].BusWidth8 != 0)) {
return TRUE;
- } else if (BusWidth == 4 && BusTiming != SdMmcMmcHs400) {
+ } else if ((BusWidth == 4) && (BusTiming != SdMmcMmcHs400)) {
return TRUE;
- } else if (BusWidth == 1 && (BusTiming == SdMmcMmcHsSdr || BusTiming == SdMmcMmcLegacy)) {
+ } else if ((BusWidth == 1) && ((BusTiming == SdMmcMmcHsSdr) || (BusTiming == SdMmcMmcLegacy))) {
return TRUE;
}
@@ -1081,10 +1093,10 @@ EmmcIsBusWidthSupported (
**/
UINT8
EmmcGetTargetBusWidth (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN EMMC_EXT_CSD *ExtCsd,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN EMMC_EXT_CSD *ExtCsd,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
UINT8 BusWidth;
@@ -1092,8 +1104,9 @@ EmmcGetTargetBusWidth (
PreferredBusWidth = Private->Slot[SlotIndex].OperatingParameters.BusWidth;
- if (PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE &&
- EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, PreferredBusWidth)) {
+ if ((PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE) &&
+ EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, PreferredBusWidth))
+ {
BusWidth = PreferredBusWidth;
} else if (EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, 8)) {
BusWidth = 8;
@@ -1118,14 +1131,14 @@ EmmcGetTargetBusWidth (
**/
UINT32
EmmcGetTargetClockFreq (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN EMMC_EXT_CSD *ExtCsd,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN EMMC_EXT_CSD *ExtCsd,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
- UINT32 PreferredClockFreq;
- UINT32 MaxClockFreq;
+ UINT32 PreferredClockFreq;
+ UINT32 MaxClockFreq;
PreferredClockFreq = Private->Slot[SlotIndex].OperatingParameters.ClockFreq;
@@ -1143,7 +1156,7 @@ EmmcGetTargetClockFreq (
break;
}
- if (PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE && PreferredClockFreq < MaxClockFreq) {
+ if ((PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE) && (PreferredClockFreq < MaxClockFreq)) {
return PreferredClockFreq;
} else {
return MaxClockFreq;
@@ -1162,20 +1175,21 @@ EmmcGetTargetClockFreq (
**/
EDKII_SD_MMC_DRIVER_STRENGTH
EmmcGetTargetDriverStrength (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN EMMC_EXT_CSD *ExtCsd,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN EMMC_EXT_CSD *ExtCsd,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
EDKII_SD_MMC_DRIVER_STRENGTH PreferredDriverStrength;
EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;
PreferredDriverStrength = Private->Slot[SlotIndex].OperatingParameters.DriverStrength;
- DriverStrength.Emmc = EmmcDriverStrengthType0;
+ DriverStrength.Emmc = EmmcDriverStrengthType0;
- if (PreferredDriverStrength.Emmc != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE &&
- (ExtCsd->DriverStrength & (BIT0 << PreferredDriverStrength.Emmc))) {
+ if ((PreferredDriverStrength.Emmc != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE) &&
+ (ExtCsd->DriverStrength & (BIT0 << PreferredDriverStrength.Emmc)))
+ {
DriverStrength.Emmc = PreferredDriverStrength.Emmc;
}
@@ -1198,9 +1212,9 @@ EmmcGetTargetBusMode (
OUT SD_MMC_BUS_SETTINGS *BusMode
)
{
- BusMode->BusTiming = EmmcGetTargetBusTiming (Private, SlotIndex, ExtCsd);
- BusMode->BusWidth = EmmcGetTargetBusWidth (Private, SlotIndex, ExtCsd, BusMode->BusTiming);
- BusMode->ClockFreq = EmmcGetTargetClockFreq (Private, SlotIndex, ExtCsd, BusMode->BusTiming);
+ BusMode->BusTiming = EmmcGetTargetBusTiming (Private, SlotIndex, ExtCsd);
+ BusMode->BusWidth = EmmcGetTargetBusWidth (Private, SlotIndex, ExtCsd, BusMode->BusTiming);
+ BusMode->ClockFreq = EmmcGetTargetClockFreq (Private, SlotIndex, ExtCsd, BusMode->BusTiming);
BusMode->DriverStrength = EmmcGetTargetDriverStrength (Private, SlotIndex, ExtCsd, BusMode->BusTiming);
}
@@ -1221,17 +1235,17 @@ EmmcGetTargetBusMode (
**/
EFI_STATUS
EmmcSetBusMode (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca
)
{
- EFI_STATUS Status;
- EMMC_CSD Csd;
- EMMC_EXT_CSD ExtCsd;
- SD_MMC_BUS_SETTINGS BusMode;
- SD_MMC_HC_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ EMMC_CSD Csd;
+ EMMC_EXT_CSD ExtCsd;
+ SD_MMC_BUS_SETTINGS BusMode;
+ SD_MMC_HC_PRIVATE_DATA *Private;
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
@@ -1260,8 +1274,14 @@ EmmcSetBusMode (
EmmcGetTargetBusMode (Private, Slot, &ExtCsd, &BusMode);
- DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Target bus mode: timing = %d, width = %d, clock freq = %d, driver strength = %d\n",
- BusMode.BusTiming, BusMode.BusWidth, BusMode.ClockFreq, BusMode.DriverStrength.Emmc));
+ DEBUG ((
+ DEBUG_INFO,
+ "EmmcSetBusMode: Target bus mode: timing = %d, width = %d, clock freq = %d, driver strength = %d\n",
+ BusMode.BusTiming,
+ BusMode.BusWidth,
+ BusMode.ClockFreq,
+ BusMode.DriverStrength.Emmc
+ ));
if (BusMode.BusTiming == SdMmcMmcHs400) {
Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, &BusMode);
@@ -1296,8 +1316,8 @@ EmmcSetBusMode (
**/
EFI_STATUS
EmmcIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
EFI_STATUS Status;
@@ -1324,13 +1344,15 @@ EmmcIdentification (
DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails with %r\n", Status));
return Status;
}
+
Ocr |= BIT30;
if (Retry++ == 100) {
DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails too many times\n"));
return EFI_DEVICE_ERROR;
}
- gBS->Stall(10 * 1000);
+
+ gBS->Stall (10 * 1000);
} while ((Ocr & BIT31) == 0);
Status = EmmcGetAllCid (PassThru, Slot);
@@ -1338,6 +1360,7 @@ EmmcIdentification (
DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd2 fails with %r\n", Status));
return Status;
}
+
//
// Slot starts from 0 and valid RCA starts from 1.
// Here we takes a simple formula to calculate the RCA.
@@ -1350,6 +1373,7 @@ EmmcIdentification (
DEBUG ((DEBUG_ERROR, "EmmcIdentification: Executing Cmd3 fails with %r\n", Status));
return Status;
}
+
//
// Enter Data Tranfer Mode.
//
@@ -1360,4 +1384,3 @@ EmmcIdentification (
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
index b630daab76..662f9f483c 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
@@ -23,14 +23,14 @@
**/
EFI_STATUS
SdCardReset (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -65,16 +65,16 @@ SdCardReset (
**/
EFI_STATUS
SdCardVoltageCheck (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 SupplyVoltage,
- IN UINT8 CheckPattern
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT8 SupplyVoltage,
+ IN UINT8 CheckPattern
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -84,9 +84,9 @@ SdCardVoltageCheck (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_IF_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR7;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_IF_COND;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR7;
SdMmcCmdBlk.CommandArgument = (SupplyVoltage << 8) | CheckPattern;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -116,17 +116,17 @@ SdCardVoltageCheck (
**/
EFI_STATUS
SdioSendOpCond (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT32 VoltageWindow,
- IN BOOLEAN S18R
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT32 VoltageWindow,
+ IN BOOLEAN S18R
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 Switch;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -176,16 +176,16 @@ SdCardSendOpCond (
IN BOOLEAN S18R,
IN BOOLEAN Xpc,
IN BOOLEAN Hcs,
- OUT UINT32 *Ocr
+ OUT UINT32 *Ocr
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
- UINT32 MaxPower;
- UINT32 HostCapacity;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 Switch;
+ UINT32 MaxPower;
+ UINT32 HostCapacity;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -195,9 +195,9 @@ SdCardSendOpCond (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -241,14 +241,14 @@ SdCardSendOpCond (
**/
EFI_STATUS
SdCardAllSendCid (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -285,13 +285,13 @@ EFI_STATUS
SdCardSetRca (
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
IN UINT8 Slot,
- OUT UINT16 *Rca
+ OUT UINT16 *Rca
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -328,15 +328,15 @@ SdCardSetRca (
**/
EFI_STATUS
SdCardSelect (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -351,6 +351,7 @@ SdCardSelect (
if (Rca != 0) {
SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
}
+
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -372,14 +373,14 @@ SdCardSelect (
**/
EFI_STATUS
SdCardVoltageSwitch (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -389,9 +390,9 @@ SdCardVoltageSwitch (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = 0;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -415,17 +416,17 @@ SdCardVoltageSwitch (
**/
EFI_STATUS
SdCardSetBusWidth (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN UINT8 BusWidth
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 Value;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 Value;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -435,9 +436,9 @@ SdCardSetBusWidth (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -490,15 +491,15 @@ SdCardSwitch (
IN SD_DRIVER_STRENGTH_TYPE DriverStrength,
IN UINT8 PowerLimit,
IN BOOLEAN Mode,
- OUT UINT8 *SwitchResp
+ OUT UINT8 *SwitchResp
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 ModeValue;
- UINT8 AccessMode;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 ModeValue;
+ UINT8 AccessMode;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -552,7 +553,8 @@ SdCardSwitch (
if ((((AccessMode & 0xF) != 0xF) && ((SwitchResp[16] & 0xF) != AccessMode)) ||
(((CommandSystem & 0xF) != 0xF) && (((SwitchResp[16] >> 4) & 0xF) != CommandSystem)) ||
(((DriverStrength & 0xF) != 0xF) && ((SwitchResp[15] & 0xF) != DriverStrength)) ||
- (((PowerLimit & 0xF) != 0xF) && (((SwitchResp[15] >> 4) & 0xF) != PowerLimit))) {
+ (((PowerLimit & 0xF) != 0xF) && (((SwitchResp[15] >> 4) & 0xF) != PowerLimit)))
+ {
return EFI_DEVICE_ERROR;
}
}
@@ -579,13 +581,13 @@ SdCardSendStatus (
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
IN UINT8 Slot,
IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ OUT UINT32 *DevStatus
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -595,9 +597,9 @@ SdCardSendStatus (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_STATUS;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
@@ -625,15 +627,15 @@ SdCardSendStatus (
**/
EFI_STATUS
SdCardSendTuningBlk (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[64];
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 TuningBlock[64];
ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
@@ -643,9 +645,9 @@ SdCardSendTuningBlk (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = 0;
Packet.InDataBuffer = TuningBlock;
@@ -675,23 +677,24 @@ SdCardSendTuningBlk (
**/
EFI_STATUS
SdCardTuningClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 Retry;
//
// Notify the host that the sampling clock tuning procedure starts.
//
HostCtrl2 = BIT6;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
//
@@ -711,6 +714,7 @@ SdCardTuningClock (
if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {
break;
}
+
if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {
return EFI_SUCCESS;
}
@@ -720,11 +724,12 @@ SdCardTuningClock (
//
// Abort the tuning procedure and reset the tuning circuit.
//
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
return EFI_DEVICE_ERROR;
}
@@ -746,15 +751,15 @@ SdCardTuningClock (
**/
EFI_STATUS
SdCardSwitchBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT32 DevStatus;
Status = SdCardSetBusWidth (PassThru, Slot, Rca, BusWidth);
if (EFI_ERROR (Status)) {
@@ -767,6 +772,7 @@ SdCardSwitchBusWidth (
DEBUG ((DEBUG_ERROR, "SdCardSwitchBusWidth: Send status fails with %r\n", Status));
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
@@ -793,14 +799,14 @@ SdCardSwitchBusWidth (
**/
BOOLEAN
SdIsBusTimingSupported (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN UINT8 CardSupportedBusTimings,
- IN BOOLEAN IsInUhsI,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN UINT8 CardSupportedBusTimings,
+ IN BOOLEAN IsInUhsI,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
- SD_MMC_HC_SLOT_CAP *Capability;
+ SD_MMC_HC_SLOT_CAP *Capability;
Capability = &Private->Capability[SlotIndex];
@@ -810,26 +816,31 @@ SdIsBusTimingSupported (
if ((Capability->Sdr104 != 0) && ((CardSupportedBusTimings & BIT3) != 0)) {
return TRUE;
}
+
break;
case SdMmcUhsDdr50:
if ((Capability->Ddr50 != 0) && ((CardSupportedBusTimings & BIT4) != 0)) {
return TRUE;
}
+
break;
case SdMmcUhsSdr50:
if ((Capability->Sdr50 != 0) && ((CardSupportedBusTimings & BIT2) != 0)) {
return TRUE;
}
+
break;
case SdMmcUhsSdr25:
if ((CardSupportedBusTimings & BIT1) != 0) {
return TRUE;
}
+
break;
case SdMmcUhsSdr12:
if ((CardSupportedBusTimings & BIT0) != 0) {
return TRUE;
}
+
break;
default:
break;
@@ -837,14 +848,16 @@ SdIsBusTimingSupported (
} else {
switch (BusTiming) {
case SdMmcSdHs:
- if ((Capability->HighSpeed != 0) && (CardSupportedBusTimings & BIT1) != 0) {
+ if ((Capability->HighSpeed != 0) && ((CardSupportedBusTimings & BIT1) != 0)) {
return TRUE;
}
+
break;
case SdMmcSdDs:
if ((CardSupportedBusTimings & BIT0) != 0) {
return TRUE;
}
+
break;
default:
break;
@@ -886,6 +899,7 @@ SdGetTargetBusTiming (
if (SdIsBusTimingSupported (Private, SlotIndex, CardSupportedBusTimings, IsInUhsI, BusTiming)) {
break;
}
+
BusTiming--;
}
@@ -903,9 +917,9 @@ SdGetTargetBusTiming (
**/
UINT8
SdGetTargetBusWidth (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
UINT8 BusWidth;
@@ -913,9 +927,10 @@ SdGetTargetBusWidth (
PreferredBusWidth = Private->Slot[SlotIndex].OperatingParameters.BusWidth;
- if (BusTiming == SdMmcSdDs || BusTiming == SdMmcSdHs) {
- if (PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE &&
- (PreferredBusWidth == 1 || PreferredBusWidth == 4)) {
+ if ((BusTiming == SdMmcSdDs) || (BusTiming == SdMmcSdHs)) {
+ if ((PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE) &&
+ ((PreferredBusWidth == 1) || (PreferredBusWidth == 4)))
+ {
BusWidth = PreferredBusWidth;
} else {
BusWidth = 4;
@@ -943,13 +958,13 @@ SdGetTargetBusWidth (
**/
UINT32
SdGetTargetBusClockFreq (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
- UINT32 PreferredClockFreq;
- UINT32 MaxClockFreq;
+ UINT32 PreferredClockFreq;
+ UINT32 MaxClockFreq;
PreferredClockFreq = Private->Slot[SlotIndex].OperatingParameters.ClockFreq;
@@ -971,7 +986,7 @@ SdGetTargetBusClockFreq (
MaxClockFreq = 25;
}
- if (PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE && PreferredClockFreq < MaxClockFreq) {
+ if ((PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE) && (PreferredClockFreq < MaxClockFreq)) {
return PreferredClockFreq;
} else {
return MaxClockFreq;
@@ -990,32 +1005,33 @@ SdGetTargetBusClockFreq (
**/
EDKII_SD_MMC_DRIVER_STRENGTH
SdGetTargetDriverStrength (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 SlotIndex,
- IN UINT8 CardSupportedDriverStrengths,
- IN SD_MMC_BUS_MODE BusTiming
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 SlotIndex,
+ IN UINT8 CardSupportedDriverStrengths,
+ IN SD_MMC_BUS_MODE BusTiming
)
{
EDKII_SD_MMC_DRIVER_STRENGTH PreferredDriverStrength;
EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;
- if (BusTiming == SdMmcSdDs || BusTiming == SdMmcSdHs) {
+ if ((BusTiming == SdMmcSdDs) || (BusTiming == SdMmcSdHs)) {
DriverStrength.Sd = SdDriverStrengthIgnore;
return DriverStrength;
}
PreferredDriverStrength = Private->Slot[SlotIndex].OperatingParameters.DriverStrength;
- DriverStrength.Sd = SdDriverStrengthTypeB;
-
- if (PreferredDriverStrength.Sd != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE &&
- (CardSupportedDriverStrengths & (BIT0 << PreferredDriverStrength.Sd))) {
-
- if ((PreferredDriverStrength.Sd == SdDriverStrengthTypeA &&
- (Private->Capability[SlotIndex].DriverTypeA != 0)) ||
- (PreferredDriverStrength.Sd == SdDriverStrengthTypeC &&
- (Private->Capability[SlotIndex].DriverTypeC != 0)) ||
- (PreferredDriverStrength.Sd == SdDriverStrengthTypeD &&
- (Private->Capability[SlotIndex].DriverTypeD != 0))) {
+ DriverStrength.Sd = SdDriverStrengthTypeB;
+
+ if ((PreferredDriverStrength.Sd != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE) &&
+ (CardSupportedDriverStrengths & (BIT0 << PreferredDriverStrength.Sd)))
+ {
+ if (((PreferredDriverStrength.Sd == SdDriverStrengthTypeA) &&
+ (Private->Capability[SlotIndex].DriverTypeA != 0)) ||
+ ((PreferredDriverStrength.Sd == SdDriverStrengthTypeC) &&
+ (Private->Capability[SlotIndex].DriverTypeC != 0)) ||
+ ((PreferredDriverStrength.Sd == SdDriverStrengthTypeD) &&
+ (Private->Capability[SlotIndex].DriverTypeD != 0)))
+ {
DriverStrength.Sd = PreferredDriverStrength.Sd;
}
}
@@ -1041,9 +1057,9 @@ SdGetTargetBusMode (
OUT SD_MMC_BUS_SETTINGS *BusMode
)
{
- BusMode->BusTiming = SdGetTargetBusTiming (Private, SlotIndex, SwitchQueryResp[13], IsInUhsI);
- BusMode->BusWidth = SdGetTargetBusWidth (Private, SlotIndex, BusMode->BusTiming);
- BusMode->ClockFreq = SdGetTargetBusClockFreq (Private, SlotIndex, BusMode->BusTiming);
+ BusMode->BusTiming = SdGetTargetBusTiming (Private, SlotIndex, SwitchQueryResp[13], IsInUhsI);
+ BusMode->BusWidth = SdGetTargetBusWidth (Private, SlotIndex, BusMode->BusTiming);
+ BusMode->ClockFreq = SdGetTargetBusClockFreq (Private, SlotIndex, BusMode->BusTiming);
BusMode->DriverStrength = SdGetTargetDriverStrength (Private, SlotIndex, SwitchQueryResp[9], BusMode->BusTiming);
}
@@ -1065,19 +1081,19 @@ SdGetTargetBusMode (
**/
EFI_STATUS
SdCardSetBusMode (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN BOOLEAN S18A
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
+ IN UINT8 Slot,
+ IN UINT16 Rca,
+ IN BOOLEAN S18A
)
{
- EFI_STATUS Status;
- SD_MMC_HC_SLOT_CAP *Capability;
- UINT8 HostCtrl1;
- UINT8 SwitchResp[64];
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_MMC_BUS_SETTINGS BusMode;
+ EFI_STATUS Status;
+ SD_MMC_HC_SLOT_CAP *Capability;
+ UINT8 HostCtrl1;
+ UINT8 SwitchResp[64];
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ SD_MMC_BUS_SETTINGS BusMode;
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
@@ -1109,8 +1125,14 @@ SdCardSetBusMode (
SdGetTargetBusMode (Private, Slot, SwitchResp, S18A, &BusMode);
- DEBUG ((DEBUG_INFO, "SdCardSetBusMode: Target bus mode: bus timing = %d, bus width = %d, clock freq[MHz] = %d, driver strength = %d\n",
- BusMode.BusTiming, BusMode.BusWidth, BusMode.ClockFreq, BusMode.DriverStrength.Sd));
+ DEBUG ((
+ DEBUG_INFO,
+ "SdCardSetBusMode: Target bus mode: bus timing = %d, bus width = %d, clock freq[MHz] = %d, driver strength = %d\n",
+ BusMode.BusTiming,
+ BusMode.BusWidth,
+ BusMode.ClockFreq,
+ BusMode.DriverStrength.Sd
+ ));
if (!S18A) {
Status = SdCardSwitchBusWidth (PciIo, PassThru, Slot, Rca, BusMode.BusWidth);
@@ -1134,7 +1156,7 @@ SdCardSetBusMode (
//
if (BusMode.BusTiming == SdMmcSdHs) {
HostCtrl1 = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1174,8 +1196,8 @@ SdCardSetBusMode (
**/
EFI_STATUS
SdCardIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
EFI_STATUS Status;
@@ -1202,6 +1224,7 @@ SdCardIdentification (
DEBUG ((DEBUG_INFO, "SdCardIdentification: Executing Cmd0 fails with %r\n", Status));
return Status;
}
+
//
// 2. Send Cmd8 to the device
//
@@ -1210,6 +1233,7 @@ SdCardIdentification (
DEBUG ((DEBUG_INFO, "SdCardIdentification: Executing Cmd8 fails with %r\n", Status));
return Status;
}
+
//
// 3. Send SDIO Cmd5 to the device to the SDIO device OCR register.
//
@@ -1218,6 +1242,7 @@ SdCardIdentification (
DEBUG ((DEBUG_INFO, "SdCardIdentification: Found SDIO device, ignore it as we don't support\n"));
return EFI_DEVICE_ERROR;
}
+
//
// 4. Send Acmd41 with voltage window 0 to the device
//
@@ -1259,7 +1284,8 @@ SdCardIdentification (
}
if (((ControllerVer & 0xFF) >= SD_MMC_HC_CTRL_VER_300) &&
- ((ControllerVer & 0xFF) <= SD_MMC_HC_CTRL_VER_420)) {
+ ((ControllerVer & 0xFF) <= SD_MMC_HC_CTRL_VER_420))
+ {
S18r = TRUE;
} else if (((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_100) || ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_200)) {
S18r = FALSE;
@@ -1267,6 +1293,7 @@ SdCardIdentification (
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
+
//
// 5. Repeatly send Acmd41 with supply voltage window to the device.
// Note here we only support the cards complied with SD physical
@@ -1285,7 +1312,8 @@ SdCardIdentification (
DEBUG ((DEBUG_ERROR, "SdCardIdentification: SdCardSendOpCond fails too many times\n"));
return EFI_DEVICE_ERROR;
}
- gBS->Stall(10 * 1000);
+
+ gBS->Stall (10 * 1000);
} while ((Ocr & BIT31) == 0);
//
@@ -1293,10 +1321,11 @@ SdCardIdentification (
// (One of support bits is set to 1: SDR50, SDR104 or DDR50 in the
// Capabilities register), switch its voltage to 1.8V.
//
- if ((Private->Capability[Slot].Sdr50 != 0 ||
- Private->Capability[Slot].Sdr104 != 0 ||
- Private->Capability[Slot].Ddr50 != 0) &&
- ((Ocr & BIT24) != 0)) {
+ if (((Private->Capability[Slot].Sdr50 != 0) ||
+ (Private->Capability[Slot].Sdr104 != 0) ||
+ (Private->Capability[Slot].Ddr50 != 0)) &&
+ ((Ocr & BIT24) != 0))
+ {
Status = SdCardVoltageSwitch (PassThru, Slot);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SdCardIdentification: Executing SdCardVoltageSwitch fails with %r\n", Status));
@@ -1315,7 +1344,8 @@ SdCardIdentification (
Status = EFI_DEVICE_ERROR;
goto Error;
}
- HostCtrl2 = BIT3;
+
+ HostCtrl2 = BIT3;
SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
gBS->Stall (5000);
@@ -1341,6 +1371,7 @@ SdCardIdentification (
goto Error;
}
}
+
DEBUG ((DEBUG_INFO, "SdCardIdentification: Switch to 1.8v signal voltage success\n"));
}
@@ -1355,6 +1386,7 @@ SdCardIdentification (
DEBUG ((DEBUG_ERROR, "SdCardIdentification: Executing SdCardSetRca fails with %r\n", Status));
return Status;
}
+
//
// Enter Data Tranfer Mode.
//
@@ -1369,8 +1401,7 @@ Error:
//
// Set SD Bus Power = 0
//
- PowerCtrl = (UINT8)~BIT0;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl = (UINT8) ~BIT0;
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);
return EFI_DEVICE_ERROR;
}
-
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
index 57f4cf329a..ab2becdd19 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
@@ -14,12 +14,12 @@
#include "SdMmcPciHcDxe.h"
-EDKII_SD_MMC_OVERRIDE *mOverride;
+EDKII_SD_MMC_OVERRIDE *mOverride;
//
// Driver Global Variables
//
-EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding = {
SdMmcPciHcDriverBindingSupported,
SdMmcPciHcDriverBindingStart,
SdMmcPciHcDriverBindingStop,
@@ -28,7 +28,7 @@ EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding = {
NULL
};
-#define SLOT_INIT_TEMPLATE {0, UnknownSlot, 0, 0, 0, 0, \
+#define SLOT_INIT_TEMPLATE {0, UnknownSlot, 0, 0, 0, 0,\
{EDKII_SD_MMC_BUS_WIDTH_IGNORE,\
EDKII_SD_MMC_CLOCK_FREQ_IGNORE,\
{EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE}}}
@@ -36,7 +36,7 @@ EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding = {
//
// Template for SD/MMC host controller private data.
//
-SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate = {
+SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate = {
SD_MMC_HC_PRIVATE_SIGNATURE, // Signature
NULL, // ControllerHandle
NULL, // PciIo
@@ -63,7 +63,7 @@ SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate = {
SLOT_INIT_TEMPLATE
},
{ // Capability
- {0},
+ { 0 },
},
{ // MaxCurrent
0,
@@ -73,25 +73,25 @@ SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate = {
}
};
-SD_DEVICE_PATH mSdDpTemplate = {
+SD_DEVICE_PATH mSdDpTemplate = {
{
MESSAGING_DEVICE_PATH,
MSG_SD_DP,
{
- (UINT8) (sizeof (SD_DEVICE_PATH)),
- (UINT8) ((sizeof (SD_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (SD_DEVICE_PATH)),
+ (UINT8)((sizeof (SD_DEVICE_PATH)) >> 8)
}
},
0
};
-EMMC_DEVICE_PATH mEmmcDpTemplate = {
+EMMC_DEVICE_PATH mEmmcDpTemplate = {
{
MESSAGING_DEVICE_PATH,
MSG_EMMC_DP,
{
- (UINT8) (sizeof (EMMC_DEVICE_PATH)),
- (UINT8) ((sizeof (EMMC_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (EMMC_DEVICE_PATH)),
+ (UINT8)((sizeof (EMMC_DEVICE_PATH)) >> 8)
}
},
0
@@ -101,7 +101,7 @@ EMMC_DEVICE_PATH mEmmcDpTemplate = {
// Prioritized function list to detect card type.
// User could add other card detection logic here.
//
-CARD_TYPE_DETECT_ROUTINE mCardTypeDetectRoutineTable[] = {
+CARD_TYPE_DETECT_ROUTINE mCardTypeDetectRoutineTable[] = {
EmmcIdentification,
SdCardIdentification,
NULL
@@ -124,7 +124,7 @@ InitializeSdMmcPciHcDxe (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@@ -150,19 +150,19 @@ InitializeSdMmcPciHcDxe (
VOID
EFIAPI
ProcessAsyncTaskList (
- IN EFI_EVENT Event,
- IN VOID* Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- LIST_ENTRY *Link;
- SD_MMC_HC_TRB *Trb;
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- BOOLEAN InfiniteWait;
- EFI_EVENT TrbEvent;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ LIST_ENTRY *Link;
+ SD_MMC_HC_TRB *Trb;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ BOOLEAN InfiniteWait;
+ EFI_EVENT TrbEvent;
- Private = (SD_MMC_HC_PRIVATE_DATA*)Context;
+ Private = (SD_MMC_HC_PRIVATE_DATA *)Context;
//
// Check if the first entry in the async I/O queue is done or not.
@@ -176,6 +176,7 @@ ProcessAsyncTaskList (
Status = EFI_NO_MEDIA;
goto Done;
}
+
if (!Trb->Started) {
//
// Check whether the cmd/data line is ready for transfer.
@@ -183,7 +184,7 @@ ProcessAsyncTaskList (
Status = SdMmcCheckTrbEnv (Private, Trb);
if (!EFI_ERROR (Status)) {
Trb->Started = TRUE;
- Status = SdMmcExecTrb (Private, Trb);
+ Status = SdMmcExecTrb (Private, Trb);
if (EFI_ERROR (Status)) {
goto Done;
}
@@ -191,6 +192,7 @@ ProcessAsyncTaskList (
goto Done;
}
}
+
Status = SdMmcCheckTrbResult (Private, Trb);
}
@@ -202,10 +204,11 @@ Done:
} else {
InfiniteWait = FALSE;
}
+
if ((!InfiniteWait) && (Trb->Timeout-- == 0)) {
RemoveEntryList (Link);
Trb->Packet->TransactionStatus = EFI_TIMEOUT;
- TrbEvent = Trb->Event;
+ TrbEvent = Trb->Event;
SdMmcFreeTrb (Trb);
DEBUG ((DEBUG_VERBOSE, "ProcessAsyncTaskList(): Signal Event %p EFI_TIMEOUT\n", TrbEvent));
gBS->SignalEvent (TrbEvent);
@@ -217,11 +220,12 @@ Done:
} else if ((Trb != NULL)) {
RemoveEntryList (Link);
Trb->Packet->TransactionStatus = Status;
- TrbEvent = Trb->Event;
+ TrbEvent = Trb->Event;
SdMmcFreeTrb (Trb);
DEBUG ((DEBUG_VERBOSE, "ProcessAsyncTaskList(): Signal Event %p with %r\n", TrbEvent, Status));
gBS->SignalEvent (TrbEvent);
}
+
return;
}
@@ -236,23 +240,23 @@ Done:
VOID
EFIAPI
SdMmcPciHcEnumerateDevice (
- IN EFI_EVENT Event,
- IN VOID* Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_STATUS Status;
- UINT8 Slot;
- BOOLEAN MediaPresent;
- UINT32 RoutineNum;
- CARD_TYPE_DETECT_ROUTINE *Routine;
- UINTN Index;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
- EFI_TPL OldTpl;
-
- Private = (SD_MMC_HC_PRIVATE_DATA*)Context;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ UINT8 Slot;
+ BOOLEAN MediaPresent;
+ UINT32 RoutineNum;
+ CARD_TYPE_DETECT_ROUTINE *Routine;
+ UINTN Index;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ SD_MMC_HC_TRB *Trb;
+ EFI_TPL OldTpl;
+
+ Private = (SD_MMC_HC_PRIVATE_DATA *)Context;
for (Slot = 0; Slot < SD_MMC_HC_MAX_SLOT; Slot++) {
if ((Private->Slot[Slot].Enable) && (Private->Slot[Slot].SlotType == RemovableSlot)) {
@@ -267,9 +271,10 @@ SdMmcPciHcEnumerateDevice (
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
for (Link = GetFirstNode (&Private->Queue);
!IsNull (&Private->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Private->Queue, Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
+ Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
if (Trb->Slot == Slot) {
RemoveEntryList (Link);
Trb->Packet->TransactionStatus = EFI_NO_MEDIA;
@@ -277,17 +282,19 @@ SdMmcPciHcEnumerateDevice (
SdMmcFreeTrb (Trb);
}
}
+
gBS->RestoreTPL (OldTpl);
//
// Notify the upper layer the connect state change through ReinstallProtocolInterface.
//
gBS->ReinstallProtocolInterface (
- Private->ControllerHandle,
- &gEfiSdMmcPassThruProtocolGuid,
- &Private->PassThru,
- &Private->PassThru
- );
+ Private->ControllerHandle,
+ &gEfiSdMmcPassThruProtocolGuid,
+ &Private->PassThru,
+ &Private->PassThru
+ );
}
+
if ((Status == EFI_MEDIA_CHANGED) && MediaPresent) {
DEBUG ((DEBUG_INFO, "SdMmcPciHcEnumerateDevice: device connected at slot %d of pci %p\n", Slot, Private->PciIo));
//
@@ -297,6 +304,7 @@ SdMmcPciHcEnumerateDevice (
if (EFI_ERROR (Status)) {
continue;
}
+
//
// Reinitialize slot and restart identification process for the new attached device
//
@@ -307,16 +315,17 @@ SdMmcPciHcEnumerateDevice (
Private->Slot[Slot].MediaPresent = TRUE;
Private->Slot[Slot].Initialized = TRUE;
- RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
+ RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
for (Index = 0; Index < RoutineNum; Index++) {
Routine = &mCardTypeDetectRoutineTable[Index];
if (*Routine != NULL) {
- Status = (*Routine) (Private, Slot);
+ Status = (*Routine)(Private, Slot);
if (!EFI_ERROR (Status)) {
break;
}
}
}
+
//
// This card doesn't get initialized correctly.
//
@@ -385,9 +394,9 @@ SdMmcPciHcEnumerateDevice (
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
@@ -405,7 +414,7 @@ SdMmcPciHcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID *) &ParentDevicePath,
+ (VOID *)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -416,15 +425,16 @@ SdMmcPciHcDriverBindingSupported (
//
return Status;
}
+
//
// Close the protocol because we don't use it here.
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Now test the EfiPciIoProtocol.
@@ -432,7 +442,7 @@ SdMmcPciHcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -455,30 +465,32 @@ SdMmcPciHcDriverBindingSupported (
);
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_UNSUPPORTED;
}
+
//
// Since we already got the PciData, we can close protocol to avoid to carry it
// on for multiple exit points.
//
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Examine SD PCI Host Controller PCI Configuration table fields.
//
if ((PciData.Hdr.ClassCode[2] == PCI_CLASS_SYSTEM_PERIPHERAL) &&
(PciData.Hdr.ClassCode[1] == PCI_SUBCLASS_SD_HOST_CONTROLLER) &&
- ((PciData.Hdr.ClassCode[0] == 0x00) || (PciData.Hdr.ClassCode[0] == 0x01))) {
+ ((PciData.Hdr.ClassCode[0] == 0x00) || (PciData.Hdr.ClassCode[0] == 0x01)))
+ {
return EFI_SUCCESS;
}
@@ -523,24 +535,24 @@ SdMmcPciHcDriverBindingSupported (
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Supports;
- UINT64 PciAttributes;
- UINT8 SlotNum;
- UINT8 FirstBar;
- UINT8 Slot;
- UINT8 Index;
- CARD_TYPE_DETECT_ROUTINE *Routine;
- UINT32 RoutineNum;
- BOOLEAN MediaPresent;
- BOOLEAN Support64BitDma;
+ EFI_STATUS Status;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Supports;
+ UINT64 PciAttributes;
+ UINT8 SlotNum;
+ UINT8 FirstBar;
+ UINT8 Slot;
+ UINT8 Index;
+ CARD_TYPE_DETECT_ROUTINE *Routine;
+ UINT32 RoutineNum;
+ BOOLEAN MediaPresent;
+ BOOLEAN Support64BitDma;
DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStart: Start\n"));
@@ -552,7 +564,7 @@ SdMmcPciHcDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -620,11 +632,17 @@ SdMmcPciHcDriverBindingStart (
// implementations.
//
if (mOverride == NULL) {
- Status = gBS->LocateProtocol (&gEdkiiSdMmcOverrideProtocolGuid, NULL,
- (VOID **)&mOverride);
+ Status = gBS->LocateProtocol (
+ &gEdkiiSdMmcOverrideProtocolGuid,
+ NULL,
+ (VOID **)&mOverride
+ );
if (!EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "%a: found SD/MMC override protocol\n",
- __FUNCTION__));
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: found SD/MMC override protocol\n",
+ __FUNCTION__
+ ));
}
}
@@ -655,8 +673,12 @@ SdMmcPciHcDriverBindingStart (
&Private->BaseClkFreq[Slot]
);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "%a: Failed to override capability - %r\n",
- __FUNCTION__, Status));
+ DEBUG ((
+ DEBUG_WARN,
+ "%a: Failed to override capability - %r\n",
+ __FUNCTION__,
+ Status
+ ));
continue;
}
}
@@ -666,7 +688,7 @@ SdMmcPciHcDriverBindingStart (
Controller,
Slot,
EdkiiSdMmcGetOperatingParam,
- (VOID*)&Private->Slot[Slot].OperatingParameters
+ (VOID *)&Private->Slot[Slot].OperatingParameters
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_WARN, "%a: Failed to get operating parameters, using defaults\n", __FUNCTION__));
@@ -686,12 +708,13 @@ SdMmcPciHcDriverBindingStart (
// If any of the slots does not support 64b system bus
// do not enable 64b DMA in the PCI layer.
//
- if ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300 &&
- Private->Capability[Slot].SysBus64V3 == 0) ||
- (Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400 &&
- Private->Capability[Slot].SysBus64V3 == 0) ||
- (Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410 &&
- Private->Capability[Slot].SysBus64V4 == 0)) {
+ if (((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300) &&
+ (Private->Capability[Slot].SysBus64V3 == 0)) ||
+ ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400) &&
+ (Private->Capability[Slot].SysBus64V3 == 0)) ||
+ ((Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410) &&
+ (Private->Capability[Slot].SysBus64V4 == 0)))
+ {
Support64BitDma = FALSE;
}
@@ -713,6 +736,7 @@ SdMmcPciHcDriverBindingStart (
if (EFI_ERROR (Status)) {
continue;
}
+
//
// Check whether there is a SD/MMC card attached
//
@@ -737,16 +761,17 @@ SdMmcPciHcDriverBindingStart (
Private->Slot[Slot].MediaPresent = TRUE;
Private->Slot[Slot].Initialized = TRUE;
- RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
+ RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
for (Index = 0; Index < RoutineNum; Index++) {
Routine = &mCardTypeDetectRoutineTable[Index];
if (*Routine != NULL) {
- Status = (*Routine) (Private, Slot);
+ Status = (*Routine)(Private, Slot);
if (!EFI_ERROR (Status)) {
break;
}
}
}
+
//
// This card doesn't get initialized correctly.
//
@@ -831,12 +856,13 @@ Done:
NULL
);
}
+
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
if ((Private != NULL) && (Private->TimerEvent != NULL)) {
gBS->CloseEvent (Private->TimerEvent);
@@ -883,26 +909,26 @@ Done:
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ SD_MMC_HC_TRB *Trb;
DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStop: Start\n"));
Status = gBS->OpenProtocol (
Controller,
&gEfiSdMmcPassThruProtocolGuid,
- (VOID**) &PassThru,
+ (VOID **)&PassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -919,20 +945,23 @@ SdMmcPciHcDriverBindingStop (
gBS->CloseEvent (Private->TimerEvent);
Private->TimerEvent = NULL;
}
+
if (Private->ConnectEvent != NULL) {
gBS->CloseEvent (Private->ConnectEvent);
Private->ConnectEvent = NULL;
}
+
//
// As the timer is closed, there is no needs to use TPL lock to
// protect the critical region "queue".
//
for (Link = GetFirstNode (&Private->Queue);
!IsNull (&Private->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Private->Queue, Link);
RemoveEntryList (Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
+ Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
Trb->Packet->TransactionStatus = EFI_ABORTED;
gBS->SignalEvent (Trb->Event);
SdMmcFreeTrb (Trb);
@@ -1003,6 +1032,7 @@ SdMmcPassThruExecSyncTrb (
gBS->RestoreTPL (OldTpl);
break;
}
+
gBS->RestoreTPL (OldTpl);
}
@@ -1068,15 +1098,15 @@ SdMmcPassThruExecSyncTrb (
EFI_STATUS
EFIAPI
SdMmcPassThruPassThru (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot,
+ IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
- EFI_STATUS Status;
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_MMC_HC_TRB *Trb;
+ EFI_STATUS Status;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ SD_MMC_HC_TRB *Trb;
if ((This == NULL) || (Packet == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -1112,6 +1142,7 @@ SdMmcPassThruPassThru (
if (Trb == NULL) {
return EFI_OUT_OF_RESOURCES;
}
+
//
// Immediately return for async I/O.
//
@@ -1158,12 +1189,12 @@ SdMmcPassThruPassThru (
EFI_STATUS
EFIAPI
SdMmcPassThruGetNextSlot (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 *Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 *Slot
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- UINT8 Index;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ UINT8 Index;
if ((This == NULL) || (Slot == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -1174,20 +1205,22 @@ SdMmcPassThruGetNextSlot (
if (*Slot == 0xFF) {
for (Index = 0; Index < SD_MMC_HC_MAX_SLOT; Index++) {
if (Private->Slot[Index].Enable) {
- *Slot = Index;
+ *Slot = Index;
Private->PreviousSlot = Index;
return EFI_SUCCESS;
}
}
+
return EFI_NOT_FOUND;
} else if (*Slot == Private->PreviousSlot) {
for (Index = *Slot + 1; Index < SD_MMC_HC_MAX_SLOT; Index++) {
if (Private->Slot[Index].Enable) {
- *Slot = Index;
+ *Slot = Index;
Private->PreviousSlot = Index;
return EFI_SUCCESS;
}
}
+
return EFI_NOT_FOUND;
} else {
return EFI_INVALID_PARAMETER;
@@ -1231,14 +1264,14 @@ SdMmcPassThruGetNextSlot (
EFI_STATUS
EFIAPI
SdMmcPassThruBuildDevicePath (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_DEVICE_PATH *SdNode;
- EMMC_DEVICE_PATH *EmmcNode;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ SD_DEVICE_PATH *SdNode;
+ EMMC_DEVICE_PATH *EmmcNode;
if ((This == NULL) || (DevicePath == NULL) || (Slot >= SD_MMC_HC_MAX_SLOT)) {
return EFI_INVALID_PARAMETER;
@@ -1255,17 +1288,19 @@ SdMmcPassThruBuildDevicePath (
if (SdNode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
+
SdNode->SlotNumber = Slot;
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) SdNode;
+ *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)SdNode;
} else if (Private->Slot[Slot].CardType == EmmcCardType) {
EmmcNode = AllocateCopyPool (sizeof (EMMC_DEVICE_PATH), &mEmmcDpTemplate);
if (EmmcNode == NULL) {
return EFI_OUT_OF_RESOURCES;
}
+
EmmcNode->SlotNumber = Slot;
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) EmmcNode;
+ *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)EmmcNode;
} else {
//
// Currently we only support SD and EMMC two device nodes.
@@ -1300,15 +1335,15 @@ SdMmcPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
SdMmcPassThruGetSlotNumber (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 *Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 *Slot
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_DEVICE_PATH *SdNode;
- EMMC_DEVICE_PATH *EmmcNode;
- UINT8 SlotNumber;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ SD_DEVICE_PATH *SdNode;
+ EMMC_DEVICE_PATH *EmmcNode;
+ UINT8 SlotNumber;
if ((This == NULL) || (DevicePath == NULL) || (Slot == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -1322,16 +1357,17 @@ SdMmcPassThruGetSlotNumber (
if ((DevicePath->Type != MESSAGING_DEVICE_PATH) ||
((DevicePath->SubType != MSG_SD_DP) &&
(DevicePath->SubType != MSG_EMMC_DP)) ||
- (DevicePathNodeLength(DevicePath) != sizeof(SD_DEVICE_PATH)) ||
- (DevicePathNodeLength(DevicePath) != sizeof(EMMC_DEVICE_PATH))) {
+ (DevicePathNodeLength (DevicePath) != sizeof (SD_DEVICE_PATH)) ||
+ (DevicePathNodeLength (DevicePath) != sizeof (EMMC_DEVICE_PATH)))
+ {
return EFI_UNSUPPORTED;
}
if (DevicePath->SubType == MSG_SD_DP) {
- SdNode = (SD_DEVICE_PATH *) DevicePath;
+ SdNode = (SD_DEVICE_PATH *)DevicePath;
SlotNumber = SdNode->SlotNumber;
} else {
- EmmcNode = (EMMC_DEVICE_PATH *) DevicePath;
+ EmmcNode = (EMMC_DEVICE_PATH *)DevicePath;
SlotNumber = EmmcNode->SlotNumber;
}
@@ -1373,15 +1409,15 @@ SdMmcPassThruGetSlotNumber (
EFI_STATUS
EFIAPI
SdMmcPassThruResetDevice (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot
)
{
- SD_MMC_HC_PRIVATE_DATA *Private;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
- EFI_TPL OldTpl;
+ SD_MMC_HC_PRIVATE_DATA *Private;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ SD_MMC_HC_TRB *Trb;
+ EFI_TPL OldTpl;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1400,6 +1436,7 @@ SdMmcPassThruResetDevice (
if (!Private->Slot[Slot].Initialized) {
return EFI_DEVICE_ERROR;
}
+
//
// Free all async I/O requests in the queue
//
@@ -1407,10 +1444,11 @@ SdMmcPassThruResetDevice (
for (Link = GetFirstNode (&Private->Queue);
!IsNull (&Private->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Private->Queue, Link);
RemoveEntryList (Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
+ Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
Trb->Packet->TransactionStatus = EFI_ABORTED;
gBS->SignalEvent (Trb->Event);
SdMmcFreeTrb (Trb);
@@ -1420,4 +1458,3 @@ SdMmcPassThruResetDevice (
return EFI_SUCCESS;
}
-
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
index fb69aa4baf..85e09cf114 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
@@ -35,11 +35,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "SdMmcPciHci.h"
-extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;
-extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;
-extern EDKII_SD_MMC_OVERRIDE *mOverride;
+extern EDKII_SD_MMC_OVERRIDE *mOverride;
#define SD_MMC_HC_PRIVATE_SIGNATURE SIGNATURE_32 ('s', 'd', 't', 'f')
@@ -49,18 +49,18 @@ extern EDKII_SD_MMC_OVERRIDE *mOverride;
//
// Generic time out value, 1 microsecond as unit.
//
-#define SD_MMC_HC_GENERIC_TIMEOUT 1 * 1000 * 1000
+#define SD_MMC_HC_GENERIC_TIMEOUT 1 * 1000 * 1000
//
// SD/MMC async transfer timer interval, set by experience.
// The unit is 100us, takes 1ms as interval.
//
-#define SD_MMC_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)
+#define SD_MMC_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)
//
// SD/MMC removable device enumeration timer interval, set by experience.
// The unit is 100us, takes 100ms as interval.
//
-#define SD_MMC_HC_ENUM_TIMER EFI_TIMER_PERIOD_MILLISECONDS(100)
+#define SD_MMC_HC_ENUM_TIMER EFI_TIMER_PERIOD_MILLISECONDS(100)
typedef enum {
UnknownCardType,
@@ -78,97 +78,97 @@ typedef enum {
} EFI_SD_MMC_SLOT_TYPE;
typedef struct {
- BOOLEAN Enable;
- EFI_SD_MMC_SLOT_TYPE SlotType;
- BOOLEAN MediaPresent;
- BOOLEAN Initialized;
- SD_MMC_CARD_TYPE CardType;
- UINT64 CurrentFreq;
- EDKII_SD_MMC_OPERATING_PARAMETERS OperatingParameters;
+ BOOLEAN Enable;
+ EFI_SD_MMC_SLOT_TYPE SlotType;
+ BOOLEAN MediaPresent;
+ BOOLEAN Initialized;
+ SD_MMC_CARD_TYPE CardType;
+ UINT64 CurrentFreq;
+ EDKII_SD_MMC_OPERATING_PARAMETERS OperatingParameters;
} SD_MMC_HC_SLOT;
typedef struct {
- UINTN Signature;
+ UINTN Signature;
- EFI_HANDLE ControllerHandle;
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_HANDLE ControllerHandle;
+ EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_SD_MMC_PASS_THRU_PROTOCOL PassThru;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL PassThru;
- UINT64 PciAttributes;
+ UINT64 PciAttributes;
//
// The field is used to record the previous slot in GetNextSlot().
//
- UINT8 PreviousSlot;
+ UINT8 PreviousSlot;
//
// For Non-blocking operation.
//
- EFI_EVENT TimerEvent;
+ EFI_EVENT TimerEvent;
//
// For Sd removable device enumeration.
//
- EFI_EVENT ConnectEvent;
- LIST_ENTRY Queue;
+ EFI_EVENT ConnectEvent;
+ LIST_ENTRY Queue;
- SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];
- SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];
- UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];
- UINT16 ControllerVersion[SD_MMC_HC_MAX_SLOT];
+ SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];
+ SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];
+ UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];
+ UINT16 ControllerVersion[SD_MMC_HC_MAX_SLOT];
//
// Some controllers may require to override base clock frequency
// value stored in Capabilities Register 1.
//
- UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];
+ UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];
} SD_MMC_HC_PRIVATE_DATA;
typedef struct {
- SD_MMC_BUS_MODE BusTiming;
- UINT8 BusWidth;
- UINT32 ClockFreq;
- EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;
+ SD_MMC_BUS_MODE BusTiming;
+ UINT8 BusWidth;
+ UINT32 ClockFreq;
+ EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;
} SD_MMC_BUS_SETTINGS;
-#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')
+#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')
-#define SD_MMC_TRB_RETRIES 5
+#define SD_MMC_TRB_RETRIES 5
//
// TRB (Transfer Request Block) contains information for the cmd request.
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY TrbList;
-
- UINT8 Slot;
- UINT16 BlockSize;
-
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- VOID *Data;
- UINT32 DataLen;
- BOOLEAN Read;
- EFI_PHYSICAL_ADDRESS DataPhy;
- VOID *DataMap;
- SD_MMC_HC_TRANSFER_MODE Mode;
- SD_MMC_HC_ADMA_LENGTH_MODE AdmaLengthMode;
-
- EFI_EVENT Event;
- BOOLEAN Started;
- BOOLEAN CommandComplete;
- UINT64 Timeout;
- UINT32 Retries;
-
- BOOLEAN PioModeTransferCompleted;
- UINT32 PioBlockIndex;
-
- SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;
- SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc;
- SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc;
- EFI_PHYSICAL_ADDRESS AdmaDescPhy;
- VOID *AdmaMap;
- UINT32 AdmaPages;
-
- SD_MMC_HC_PRIVATE_DATA *Private;
+ UINT32 Signature;
+ LIST_ENTRY TrbList;
+
+ UINT8 Slot;
+ UINT16 BlockSize;
+
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ VOID *Data;
+ UINT32 DataLen;
+ BOOLEAN Read;
+ EFI_PHYSICAL_ADDRESS DataPhy;
+ VOID *DataMap;
+ SD_MMC_HC_TRANSFER_MODE Mode;
+ SD_MMC_HC_ADMA_LENGTH_MODE AdmaLengthMode;
+
+ EFI_EVENT Event;
+ BOOLEAN Started;
+ BOOLEAN CommandComplete;
+ UINT64 Timeout;
+ UINT32 Retries;
+
+ BOOLEAN PioModeTransferCompleted;
+ UINT32 PioBlockIndex;
+
+ SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;
+ SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc;
+ SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc;
+ EFI_PHYSICAL_ADDRESS AdmaDescPhy;
+ VOID *AdmaMap;
+ UINT32 AdmaPages;
+
+ SD_MMC_HC_PRIVATE_DATA *Private;
} SD_MMC_HC_TRB;
#define SD_MMC_HC_TRB_FROM_THIS(a) \
@@ -178,22 +178,23 @@ typedef struct {
// Task for Non-blocking mode.
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
-
- UINT8 Slot;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- BOOLEAN IsStart;
- EFI_EVENT Event;
- UINT64 RetryTimes;
- BOOLEAN InfiniteWait;
- VOID *Map;
- VOID *MapAddress;
+ UINT32 Signature;
+ LIST_ENTRY Link;
+
+ UINT8 Slot;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ BOOLEAN IsStart;
+ EFI_EVENT Event;
+ UINT64 RetryTimes;
+ BOOLEAN InfiniteWait;
+ VOID *Map;
+ VOID *MapAddress;
} SD_MMC_HC_QUEUE;
//
// Prototypes
//
+
/**
Execute card identification procedure.
@@ -207,8 +208,8 @@ typedef struct {
typedef
EFI_STATUS
(*CARD_TYPE_DETECT_ROUTINE) (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
);
/**
@@ -251,10 +252,10 @@ EFI_STATUS
EFI_STATUS
EFIAPI
SdMmcPassThruPassThru (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot,
+ IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
);
/**
@@ -289,8 +290,8 @@ SdMmcPassThruPassThru (
EFI_STATUS
EFIAPI
SdMmcPassThruGetNextSlot (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 *Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 *Slot
);
/**
@@ -330,9 +331,9 @@ SdMmcPassThruGetNextSlot (
EFI_STATUS
EFIAPI
SdMmcPassThruBuildDevicePath (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -359,9 +360,9 @@ SdMmcPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
SdMmcPassThruGetSlotNumber (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 *Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 *Slot
);
/**
@@ -390,13 +391,14 @@ SdMmcPassThruGetSlotNumber (
EFI_STATUS
EFIAPI
SdMmcPassThruResetDevice (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
+ IN UINT8 Slot
);
//
// Driver model protocol interfaces
//
+
/**
Tests to see if this driver supports a given controller. If a child device is provided,
it further tests to see if this driver supports creating a handle for the specified child device.
@@ -442,9 +444,9 @@ SdMmcPassThruResetDevice (
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -485,9 +487,9 @@ SdMmcPciHcDriverBindingSupported (
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -519,15 +521,16 @@ SdMmcPciHcDriverBindingStart (
EFI_STATUS
EFIAPI
SdMmcPciHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -570,9 +573,9 @@ SdMmcPciHcDriverBindingStop (
EFI_STATUS
EFIAPI
SdMmcPciHcComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
);
/**
@@ -646,11 +649,11 @@ SdMmcPciHcComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SdMmcPciHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -668,10 +671,10 @@ SdMmcPciHcComponentNameGetControllerName (
**/
SD_MMC_HC_TRB *
SdMmcCreateTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot,
- IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot,
+ IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event
);
/**
@@ -682,7 +685,7 @@ SdMmcCreateTrb (
**/
VOID
SdMmcFreeTrb (
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -698,8 +701,8 @@ SdMmcFreeTrb (
**/
EFI_STATUS
SdMmcCheckTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -715,8 +718,8 @@ SdMmcCheckTrbEnv (
**/
EFI_STATUS
SdMmcWaitTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -731,8 +734,8 @@ SdMmcWaitTrbEnv (
**/
EFI_STATUS
SdMmcExecTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -748,8 +751,8 @@ SdMmcExecTrb (
**/
EFI_STATUS
SdMmcCheckTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -764,8 +767,8 @@ SdMmcCheckTrbResult (
**/
EFI_STATUS
SdMmcWaitTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
);
/**
@@ -782,8 +785,8 @@ SdMmcWaitTrbResult (
**/
EFI_STATUS
EmmcIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
);
/**
@@ -800,8 +803,8 @@ EmmcIdentification (
**/
EFI_STATUS
SdCardIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
);
/**
@@ -840,8 +843,8 @@ SdMmcHcClockSupply (
**/
EFI_STATUS
SdMmcHcReset (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
);
/**
@@ -857,8 +860,8 @@ SdMmcHcReset (
**/
EFI_STATUS
SdMmcHcInitHost (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index 6548ef71de..53b63ab52b 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -23,8 +23,8 @@
**/
VOID
DumpCapabilityReg (
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP *Capability
+ IN UINT8 Slot,
+ IN SD_MMC_HC_SLOT_CAP *Capability
)
{
//
@@ -55,6 +55,7 @@ DumpCapabilityReg (
} else {
DEBUG ((DEBUG_INFO, "%a\n", "Reserved"));
}
+
DEBUG ((DEBUG_INFO, " SDR50 Support %a\n", Capability->Sdr50 ? "TRUE" : "FALSE"));
DEBUG ((DEBUG_INFO, " SDR104 Support %a\n", Capability->Sdr104 ? "TRUE" : "FALSE"));
DEBUG ((DEBUG_INFO, " DDR50 Support %a\n", Capability->Ddr50 ? "TRUE" : "FALSE"));
@@ -67,6 +68,7 @@ DumpCapabilityReg (
} else {
DEBUG ((DEBUG_INFO, " Retuning TimerCnt %dseconds\n", 2 * (Capability->TimerCount - 1)));
}
+
DEBUG ((DEBUG_INFO, " SDR50 Tuning %a\n", Capability->TuningSDR50 ? "TRUE" : "FALSE"));
DEBUG ((DEBUG_INFO, " Retuning Mode Mode %d\n", Capability->RetuningMod + 1));
DEBUG ((DEBUG_INFO, " Clock Multiplier M = %d\n", Capability->ClkMultiplier + 1));
@@ -88,13 +90,13 @@ DumpCapabilityReg (
EFI_STATUS
EFIAPI
SdMmcHcGetSlotInfo (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- OUT UINT8 *FirstBar,
- OUT UINT8 *SlotNum
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ OUT UINT8 *FirstBar,
+ OUT UINT8 *SlotNum
)
{
- EFI_STATUS Status;
- SD_MMC_HC_SLOT_INFO SlotInfo;
+ EFI_STATUS Status;
+ SD_MMC_HC_SLOT_INFO SlotInfo;
Status = PciIo->Pci.Read (
PciIo,
@@ -139,18 +141,18 @@ SdMmcHcGetSlotInfo (
EFI_STATUS
EFIAPI
SdMmcHcRwMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL_WIDTH Width;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL_WIDTH Width;
- if ((PciIo == NULL) || (Data == NULL)) {
+ if ((PciIo == NULL) || (Data == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -179,7 +181,7 @@ SdMmcHcRwMmio (
PciIo,
Width,
BarIndex,
- (UINT64) Offset,
+ (UINT64)Offset,
Count,
Data
);
@@ -188,7 +190,7 @@ SdMmcHcRwMmio (
PciIo,
Width,
BarIndex,
- (UINT64) Offset,
+ (UINT64)Offset,
Count,
Data
);
@@ -221,16 +223,16 @@ SdMmcHcRwMmio (
EFI_STATUS
EFIAPI
SdMmcHcOrMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *OrData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *OrData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 Or;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 Or;
Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -238,13 +240,13 @@ SdMmcHcOrMmio (
}
if (Count == 1) {
- Or = *(UINT8*) OrData;
+ Or = *(UINT8 *)OrData;
} else if (Count == 2) {
- Or = *(UINT16*) OrData;
+ Or = *(UINT16 *)OrData;
} else if (Count == 4) {
- Or = *(UINT32*) OrData;
+ Or = *(UINT32 *)OrData;
} else if (Count == 8) {
- Or = *(UINT64*) OrData;
+ Or = *(UINT64 *)OrData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -279,16 +281,16 @@ SdMmcHcOrMmio (
EFI_STATUS
EFIAPI
SdMmcHcAndMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *AndData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *AndData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 And;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 And;
Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -296,13 +298,13 @@ SdMmcHcAndMmio (
}
if (Count == 1) {
- And = *(UINT8*) AndData;
+ And = *(UINT8 *)AndData;
} else if (Count == 2) {
- And = *(UINT16*) AndData;
+ And = *(UINT16 *)AndData;
} else if (Count == 4) {
- And = *(UINT32*) AndData;
+ And = *(UINT32 *)AndData;
} else if (Count == 8) {
- And = *(UINT64*) AndData;
+ And = *(UINT64 *)AndData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -335,16 +337,16 @@ SdMmcHcAndMmio (
EFI_STATUS
EFIAPI
SdMmcHcCheckMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue
)
{
- EFI_STATUS Status;
- UINT64 Value;
+ EFI_STATUS Status;
+ UINT64 Value;
//
// Access PCI MMIO space to see if the value is the tested one.
@@ -389,17 +391,17 @@ SdMmcHcCheckMmioSet (
EFI_STATUS
EFIAPI
SdMmcHcWaitMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -449,7 +451,7 @@ SdMmcHcGetControllerVersion (
OUT UINT16 *Version
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, sizeof (UINT16), Version);
if (EFI_ERROR (Status)) {
@@ -473,28 +475,32 @@ SdMmcHcGetControllerVersion (
**/
EFI_STATUS
SdMmcHcReset (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- UINT8 SwReset;
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT8 SwReset;
+ EFI_PCI_IO_PROTOCOL *PciIo;
//
// Notify the SD/MMC override protocol that we are about to reset
// the SD/MMC host controller.
//
- if (mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
Private->ControllerHandle,
Slot,
EdkiiSdMmcResetPre,
- NULL);
+ NULL
+ );
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: SD/MMC pre reset notifier callback failed - %r\n",
- __FUNCTION__, Status));
+ __FUNCTION__,
+ Status
+ ));
return Status;
}
}
@@ -527,8 +533,11 @@ SdMmcHcReset (
//
Status = SdMmcHcEnableInterrupt (PciIo, Slot);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdMmcHcReset: SdMmcHcEnableInterrupt done with %r\n",
- Status));
+ DEBUG ((
+ DEBUG_INFO,
+ "SdMmcHcReset: SdMmcHcEnableInterrupt done with %r\n",
+ Status
+ ));
return Status;
}
@@ -536,16 +545,20 @@ SdMmcHcReset (
// Notify the SD/MMC override protocol that we have just reset
// the SD/MMC host controller.
//
- if (mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
Private->ControllerHandle,
Slot,
EdkiiSdMmcResetPost,
- NULL);
+ NULL
+ );
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: SD/MMC post reset notifier callback failed - %r\n",
- __FUNCTION__, Status));
+ __FUNCTION__,
+ Status
+ ));
}
}
@@ -565,26 +578,27 @@ SdMmcHcReset (
**/
EFI_STATUS
SdMmcHcEnableInterrupt (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- UINT16 IntStatus;
+ EFI_STATUS Status;
+ UINT16 IntStatus;
//
// Enable all bits in Error Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Enable all bits in Normal Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
return Status;
}
@@ -604,11 +618,11 @@ EFI_STATUS
SdMmcHcGetCapability (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
- OUT SD_MMC_HC_SLOT_CAP *Capability
+ OUT SD_MMC_HC_SLOT_CAP *Capability
)
{
- EFI_STATUS Status;
- UINT64 Cap;
+ EFI_STATUS Status;
+ UINT64 Cap;
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CAP, TRUE, sizeof (Cap), &Cap);
if (EFI_ERROR (Status)) {
@@ -635,10 +649,10 @@ EFI_STATUS
SdMmcHcGetMaxCurrent (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
- OUT UINT64 *MaxCurrent
+ OUT UINT64 *MaxCurrent
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_MAX_CURRENT_CAP, TRUE, sizeof (UINT64), MaxCurrent);
@@ -662,14 +676,14 @@ SdMmcHcGetMaxCurrent (
**/
EFI_STATUS
SdMmcHcCardDetect (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT BOOLEAN *MediaPresent
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ OUT BOOLEAN *MediaPresent
)
{
- EFI_STATUS Status;
- UINT16 Data;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ UINT16 Data;
+ UINT32 PresentState;
//
// Check Present State Register to see if there is a card presented.
@@ -723,13 +737,13 @@ SdMmcHcCardDetect (
**/
EFI_STATUS
SdMmcHcStopClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- UINT32 PresentState;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT32 PresentState;
+ UINT16 ClockCtrl;
//
// Ensure no SD transactions are occurring on the SD Bus by
@@ -752,8 +766,8 @@ SdMmcHcStopClock (
//
// Set SD Clock Enable in the Clock Control register to 0
//
- ClockCtrl = (UINT16)~BIT2;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ ClockCtrl = (UINT16) ~BIT2;
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -773,7 +787,7 @@ SdMmcHcStartSdClock (
IN UINT8 Slot
)
{
- UINT16 ClockCtrl;
+ UINT16 ClockCtrl;
//
// Set SD Clock Enable in the Clock Control register to 1
@@ -806,20 +820,20 @@ SdMmcHcClockSupply (
IN UINT64 ClockFreq
)
{
- EFI_STATUS Status;
- UINT32 SettingFreq;
- UINT32 Divisor;
- UINT32 Remainder;
- UINT16 ClockCtrl;
- UINT32 BaseClkFreq;
- UINT16 ControllerVer;
- EFI_PCI_IO_PROTOCOL *PciIo;
-
- PciIo = Private->PciIo;
- BaseClkFreq = Private->BaseClkFreq[Slot];
+ EFI_STATUS Status;
+ UINT32 SettingFreq;
+ UINT32 Divisor;
+ UINT32 Remainder;
+ UINT16 ClockCtrl;
+ UINT32 BaseClkFreq;
+ UINT16 ControllerVer;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+
+ PciIo = Private->PciIo;
+ BaseClkFreq = Private->BaseClkFreq[Slot];
ControllerVer = Private->ControllerVersion[Slot];
- if (BaseClkFreq == 0 || ClockFreq == 0) {
+ if ((BaseClkFreq == 0) || (ClockFreq == 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -840,8 +854,9 @@ SdMmcHcClockSupply (
if ((ClockFreq == SettingFreq) && (Remainder == 0)) {
break;
}
+
if ((ClockFreq == SettingFreq) && (Remainder != 0)) {
- SettingFreq ++;
+ SettingFreq++;
}
}
@@ -851,17 +866,20 @@ SdMmcHcClockSupply (
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
//
if ((ControllerVer >= SD_MMC_HC_CTRL_VER_300) &&
- (ControllerVer <= SD_MMC_HC_CTRL_VER_420)) {
+ (ControllerVer <= SD_MMC_HC_CTRL_VER_420))
+ {
ASSERT (Divisor <= 0x3FF);
ClockCtrl = ((Divisor & 0xFF) << 8) | ((Divisor & 0x300) >> 2);
} else if ((ControllerVer == SD_MMC_HC_CTRL_VER_100) ||
- (ControllerVer == SD_MMC_HC_CTRL_VER_200)) {
+ (ControllerVer == SD_MMC_HC_CTRL_VER_200))
+ {
//
// Only the most significant bit can be used as divisor.
//
if (((Divisor - 1) & Divisor) != 0) {
Divisor = 1 << (HighBitSet32 (Divisor) + 1);
}
+
ASSERT (Divisor <= 0x80);
ClockCtrl = (Divisor & 0xFF) << 8;
} else {
@@ -881,7 +899,7 @@ SdMmcHcClockSupply (
// Supply clock frequency with specified divisor
//
ClockCtrl |= BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
return Status;
@@ -913,7 +931,7 @@ SdMmcHcClockSupply (
// legacy behavior. During first time setup we also don't know what type
// of the card slot it is and which enum value of BusTiming applies.
//
- if (!FirstTimeSetup && mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if (!FirstTimeSetup && (mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
Private->ControllerHandle,
Slot,
@@ -951,18 +969,18 @@ SdMmcHcClockSupply (
**/
EFI_STATUS
SdMmcHcPowerControl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT8 PowerCtrl
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN UINT8 PowerCtrl
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Clr SD Bus Power
//
- PowerCtrl &= (UINT8)~BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl &= (UINT8) ~BIT0;
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -971,7 +989,7 @@ SdMmcHcPowerControl (
// Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
//
PowerCtrl |= BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
return Status;
}
@@ -991,33 +1009,35 @@ SdMmcHcPowerControl (
**/
EFI_STATUS
SdMmcHcSetBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT16 BusWidth
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN UINT16 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (BusWidth == 1) {
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 = (UINT8) ~(BIT5 | BIT1);
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 4) {
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl1 |= BIT1;
- HostCtrl1 &= (UINT8)~BIT5;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 &= (UINT8) ~BIT5;
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 8) {
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl1 &= (UINT8)~BIT1;
+
+ HostCtrl1 &= (UINT8) ~BIT1;
HostCtrl1 |= BIT5;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else {
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
@@ -1039,14 +1059,14 @@ SdMmcHcSetBusWidth (
**/
EFI_STATUS
SdMmcHcInitV4Enhancements (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability,
- IN UINT16 ControllerVer
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN SD_MMC_HC_SLOT_CAP Capability,
+ IN UINT16 ControllerVer
)
{
- EFI_STATUS Status;
- UINT16 HostCtrl2;
+ EFI_STATUS Status;
+ UINT16 HostCtrl2;
//
// Check if controller version V4 or higher
@@ -1076,9 +1096,11 @@ SdMmcHcInitV4Enhancements (
HostCtrl2 |= SD_MMC_HC_64_ADDR_EN;
DEBUG ((DEBUG_INFO, "Enabled V4 64 bit system bus support\n"));
}
+
HostCtrl2 |= SD_MMC_HC_26_DATA_LEN_ADMA_EN;
DEBUG ((DEBUG_INFO, "Enabled V4 26 bit data length ADMA support\n"));
}
+
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
@@ -1103,14 +1125,14 @@ SdMmcHcInitV4Enhancements (
**/
EFI_STATUS
SdMmcHcInitPowerVoltage (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN SD_MMC_HC_SLOT_CAP Capability
)
{
- EFI_STATUS Status;
- UINT8 MaxVoltage;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 MaxVoltage;
+ UINT8 HostCtrl2;
//
// Calculate supported maximum voltage according to SD Bus Voltage Select
@@ -1131,7 +1153,7 @@ SdMmcHcInitPowerVoltage (
//
MaxVoltage = 0x0A;
HostCtrl2 = BIT3;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
gBS->Stall (5000);
if (EFI_ERROR (Status)) {
return Status;
@@ -1163,12 +1185,12 @@ SdMmcHcInitPowerVoltage (
**/
EFI_STATUS
SdMmcHcInitTimeoutCtrl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- UINT8 Timeout;
+ EFI_STATUS Status;
+ UINT8 Timeout;
Timeout = 0x0E;
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);
@@ -1189,33 +1211,37 @@ SdMmcHcInitTimeoutCtrl (
**/
EFI_STATUS
SdMmcHcInitHost (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- SD_MMC_HC_SLOT_CAP Capability;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ SD_MMC_HC_SLOT_CAP Capability;
//
// Notify the SD/MMC override protocol that we are about to initialize
// the SD/MMC host controller.
//
- if (mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
Private->ControllerHandle,
Slot,
EdkiiSdMmcInitHostPre,
- NULL);
+ NULL
+ );
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: SD/MMC pre init notifier callback failed - %r\n",
- __FUNCTION__, Status));
+ __FUNCTION__,
+ Status
+ ));
return Status;
}
}
- PciIo = Private->PciIo;
+ PciIo = Private->PciIo;
Capability = Private->Capability[Slot];
Status = SdMmcHcInitV4Enhancements (PciIo, Slot, Capability, Private->ControllerVersion[Slot]);
@@ -1249,18 +1275,23 @@ SdMmcHcInitHost (
// Notify the SD/MMC override protocol that we are have just initialized
// the SD/MMC host controller.
//
- if (mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
Private->ControllerHandle,
Slot,
EdkiiSdMmcInitHostPost,
- NULL);
+ NULL
+ );
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: SD/MMC post init notifier callback failed - %r\n",
- __FUNCTION__, Status));
+ __FUNCTION__,
+ Status
+ ));
}
}
+
return Status;
}
@@ -1277,17 +1308,17 @@ SdMmcHcInitHost (
**/
EFI_STATUS
SdMmcHcUhsSignaling (
- IN EFI_HANDLE ControllerHandle,
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_BUS_MODE Timing
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN SD_MMC_BUS_MODE Timing
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
- HostCtrl2 = (UINT8)~SD_MMC_HC_CTRL_UHS_MASK;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~SD_MMC_HC_CTRL_UHS_MASK;
+ Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1324,15 +1355,16 @@ SdMmcHcUhsSignaling (
HostCtrl2 = SD_MMC_HC_CTRL_MMC_HS400;
break;
default:
- HostCtrl2 = 0;
- break;
+ HostCtrl2 = 0;
+ break;
}
+
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
- if (mOverride != NULL && mOverride->NotifyPhase != NULL) {
+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) {
Status = mOverride->NotifyPhase (
ControllerHandle,
Slot,
@@ -1377,8 +1409,8 @@ SdMmcSetDriverStrength (
return EFI_SUCCESS;
}
- HostCtrl2 = (UINT16)~SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK;
- Status = SdMmcHcAndMmio (PciIo, SlotIndex, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT16) ~SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK;
+ Status = SdMmcHcAndMmio (PciIo, SlotIndex, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1400,19 +1432,19 @@ SdMmcSetDriverStrength (
**/
EFI_STATUS
SdMmcHcLedOnOff (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN BOOLEAN On
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN BOOLEAN On
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (On) {
HostCtrl1 = BIT0;
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else {
- HostCtrl1 = (UINT8)~BIT0;
+ HostCtrl1 = (UINT8) ~BIT0;
Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
}
@@ -1433,23 +1465,23 @@ SdMmcHcLedOnOff (
**/
EFI_STATUS
BuildAdmaDescTable (
- IN SD_MMC_HC_TRB *Trb,
- IN UINT16 ControllerVer
+ IN SD_MMC_HC_TRB *Trb,
+ IN UINT16 ControllerVer
)
{
- EFI_PHYSICAL_ADDRESS Data;
- UINT64 DataLen;
- UINT64 Entries;
- UINT32 Index;
- UINT64 Remaining;
- UINT64 Address;
- UINTN TableSize;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINTN Bytes;
- UINT32 AdmaMaxDataPerLine;
- UINT32 DescSize;
- VOID *AdmaDesc;
+ EFI_PHYSICAL_ADDRESS Data;
+ UINT64 DataLen;
+ UINT64 Entries;
+ UINT32 Index;
+ UINT64 Remaining;
+ UINT64 Address;
+ UINTN TableSize;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINTN Bytes;
+ UINT32 AdmaMaxDataPerLine;
+ UINT32 DescSize;
+ VOID *AdmaDesc;
AdmaMaxDataPerLine = ADMA_MAX_DATA_PER_LINE_16B;
DescSize = sizeof (SD_MMC_HC_ADMA_32_DESC_LINE);
@@ -1463,9 +1495,11 @@ BuildAdmaDescTable (
// Check for valid ranges in 32bit ADMA Descriptor Table
//
if ((Trb->Mode == SdMmcAdma32bMode) &&
- ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul))) {
+ ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)))
+ {
return EFI_INVALID_PARAMETER;
}
+
//
// Check address field alignment
//
@@ -1490,9 +1524,10 @@ BuildAdmaDescTable (
//
if (Trb->Mode == SdMmcAdma64bV3Mode) {
DescSize = sizeof (SD_MMC_HC_ADMA_64_V3_DESC_LINE);
- }else if (Trb->Mode == SdMmcAdma64bV4Mode) {
+ } else if (Trb->Mode == SdMmcAdma64bV4Mode) {
DescSize = sizeof (SD_MMC_HC_ADMA_64_V4_DESC_LINE);
}
+
//
// Configure 26b data length.
//
@@ -1500,20 +1535,21 @@ BuildAdmaDescTable (
AdmaMaxDataPerLine = ADMA_MAX_DATA_PER_LINE_26B;
}
- Entries = DivU64x32 ((DataLen + AdmaMaxDataPerLine - 1), AdmaMaxDataPerLine);
- TableSize = (UINTN)MultU64x32 (Entries, DescSize);
+ Entries = DivU64x32 ((DataLen + AdmaMaxDataPerLine - 1), AdmaMaxDataPerLine);
+ TableSize = (UINTN)MultU64x32 (Entries, DescSize);
Trb->AdmaPages = (UINT32)EFI_SIZE_TO_PAGES (TableSize);
- Status = PciIo->AllocateBuffer (
- PciIo,
- AllocateAnyPages,
- EfiBootServicesData,
- EFI_SIZE_TO_PAGES (TableSize),
- (VOID **)&AdmaDesc,
- 0
- );
+ Status = PciIo->AllocateBuffer (
+ PciIo,
+ AllocateAnyPages,
+ EfiBootServicesData,
+ EFI_SIZE_TO_PAGES (TableSize),
+ (VOID **)&AdmaDesc,
+ 0
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
ZeroMem (AdmaDesc, TableSize);
Bytes = TableSize;
Status = PciIo->Map (
@@ -1538,21 +1574,22 @@ BuildAdmaDescTable (
}
if ((Trb->Mode == SdMmcAdma32bMode) &&
- (UINT64)(UINTN)Trb->AdmaDescPhy > 0x100000000ul) {
+ ((UINT64)(UINTN)Trb->AdmaDescPhy > 0x100000000ul))
+ {
//
// The ADMA doesn't support 64bit addressing.
//
PciIo->Unmap (
- PciIo,
- Trb->AdmaMap
- );
+ PciIo,
+ Trb->AdmaMap
+ );
Trb->AdmaMap = NULL;
PciIo->FreeBuffer (
- PciIo,
- EFI_SIZE_TO_PAGES (TableSize),
- AdmaDesc
- );
+ PciIo,
+ EFI_SIZE_TO_PAGES (TableSize),
+ AdmaDesc
+ );
return EFI_DEVICE_ERROR;
}
@@ -1574,25 +1611,28 @@ BuildAdmaDescTable (
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
Trb->Adma32Desc[Index].UpperLength = (UINT16)RShiftU64 (Remaining, 16);
}
+
Trb->Adma32Desc[Index].LowerLength = (UINT16)(Remaining & MAX_UINT16);
- Trb->Adma32Desc[Index].Address = (UINT32)Address;
+ Trb->Adma32Desc[Index].Address = (UINT32)Address;
break;
} else {
Trb->Adma32Desc[Index].Valid = 1;
Trb->Adma32Desc[Index].Act = 2;
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
- Trb->Adma32Desc[Index].UpperLength = 0;
+ Trb->Adma32Desc[Index].UpperLength = 0;
}
- Trb->Adma32Desc[Index].LowerLength = 0;
- Trb->Adma32Desc[Index].Address = (UINT32)Address;
+
+ Trb->Adma32Desc[Index].LowerLength = 0;
+ Trb->Adma32Desc[Index].Address = (UINT32)Address;
}
} else if (Trb->Mode == SdMmcAdma64bV3Mode) {
if (Remaining <= AdmaMaxDataPerLine) {
Trb->Adma64V3Desc[Index].Valid = 1;
Trb->Adma64V3Desc[Index].Act = 2;
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
- Trb->Adma64V3Desc[Index].UpperLength = (UINT16)RShiftU64 (Remaining, 16);
+ Trb->Adma64V3Desc[Index].UpperLength = (UINT16)RShiftU64 (Remaining, 16);
}
+
Trb->Adma64V3Desc[Index].LowerLength = (UINT16)(Remaining & MAX_UINT16);
Trb->Adma64V3Desc[Index].LowerAddress = (UINT32)Address;
Trb->Adma64V3Desc[Index].UpperAddress = (UINT32)RShiftU64 (Address, 32);
@@ -1601,8 +1641,9 @@ BuildAdmaDescTable (
Trb->Adma64V3Desc[Index].Valid = 1;
Trb->Adma64V3Desc[Index].Act = 2;
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
- Trb->Adma64V3Desc[Index].UpperLength = 0;
+ Trb->Adma64V3Desc[Index].UpperLength = 0;
}
+
Trb->Adma64V3Desc[Index].LowerLength = 0;
Trb->Adma64V3Desc[Index].LowerAddress = (UINT32)Address;
Trb->Adma64V3Desc[Index].UpperAddress = (UINT32)RShiftU64 (Address, 32);
@@ -1612,8 +1653,9 @@ BuildAdmaDescTable (
Trb->Adma64V4Desc[Index].Valid = 1;
Trb->Adma64V4Desc[Index].Act = 2;
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
- Trb->Adma64V4Desc[Index].UpperLength = (UINT16)RShiftU64 (Remaining, 16);
+ Trb->Adma64V4Desc[Index].UpperLength = (UINT16)RShiftU64 (Remaining, 16);
}
+
Trb->Adma64V4Desc[Index].LowerLength = (UINT16)(Remaining & MAX_UINT16);
Trb->Adma64V4Desc[Index].LowerAddress = (UINT32)Address;
Trb->Adma64V4Desc[Index].UpperAddress = (UINT32)RShiftU64 (Address, 32);
@@ -1622,8 +1664,9 @@ BuildAdmaDescTable (
Trb->Adma64V4Desc[Index].Valid = 1;
Trb->Adma64V4Desc[Index].Act = 2;
if (Trb->AdmaLengthMode == SdMmcAdmaLen26b) {
- Trb->Adma64V4Desc[Index].UpperLength = 0;
+ Trb->Adma64V4Desc[Index].UpperLength = 0;
}
+
Trb->Adma64V4Desc[Index].LowerLength = 0;
Trb->Adma64V4Desc[Index].LowerAddress = (UINT32)Address;
Trb->Adma64V4Desc[Index].UpperAddress = (UINT32)RShiftU64 (Address, 32);
@@ -1644,6 +1687,7 @@ BuildAdmaDescTable (
} else {
Trb->Adma64V4Desc[Index].End = 1;
}
+
return EFI_SUCCESS;
}
@@ -1668,14 +1712,18 @@ SdMmcPrintPacket (
DEBUG ((DebugLevel, "Command index: %d, argument: %X\n", Packet->SdMmcCmdBlk->CommandIndex, Packet->SdMmcCmdBlk->CommandArgument));
DEBUG ((DebugLevel, "Command type: %d, response type: %d\n", Packet->SdMmcCmdBlk->CommandType, Packet->SdMmcCmdBlk->ResponseType));
}
+
if (Packet->SdMmcStatusBlk != NULL) {
- DEBUG ((DebugLevel, "Response 0: %X, 1: %X, 2: %X, 3: %X\n",
- Packet->SdMmcStatusBlk->Resp0,
- Packet->SdMmcStatusBlk->Resp1,
- Packet->SdMmcStatusBlk->Resp2,
- Packet->SdMmcStatusBlk->Resp3
- ));
+ DEBUG ((
+ DebugLevel,
+ "Response 0: %X, 1: %X, 2: %X, 3: %X\n",
+ Packet->SdMmcStatusBlk->Resp0,
+ Packet->SdMmcStatusBlk->Resp1,
+ Packet->SdMmcStatusBlk->Resp2,
+ Packet->SdMmcStatusBlk->Resp3
+ ));
}
+
DEBUG ((DebugLevel, "Timeout: %ld\n", Packet->Timeout));
DEBUG ((DebugLevel, "InDataBuffer: %p\n", Packet->InDataBuffer));
DEBUG ((DebugLevel, "OutDataBuffer: %p\n", Packet->OutDataBuffer));
@@ -1743,10 +1791,10 @@ SdMmcSetupMemoryForDmaTransfer (
IN SD_MMC_HC_TRB *Trb
)
{
- EFI_PCI_IO_PROTOCOL_OPERATION Flag;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN MapLength;
- EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL_OPERATION Flag;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN MapLength;
+ EFI_STATUS Status;
if (Trb->Read) {
Flag = EfiPciIoOperationBusMasterWrite;
@@ -1755,24 +1803,25 @@ SdMmcSetupMemoryForDmaTransfer (
}
PciIo = Private->PciIo;
- if (Trb->Data != NULL && Trb->DataLen != 0) {
+ if ((Trb->Data != NULL) && (Trb->DataLen != 0)) {
MapLength = Trb->DataLen;
- Status = PciIo->Map (
- PciIo,
- Flag,
- Trb->Data,
- &MapLength,
- &Trb->DataPhy,
- &Trb->DataMap
- );
+ Status = PciIo->Map (
+ PciIo,
+ Flag,
+ Trb->Data,
+ &MapLength,
+ &Trb->DataPhy,
+ &Trb->DataMap
+ );
if (EFI_ERROR (Status) || (Trb->DataLen != MapLength)) {
return EFI_BAD_BUFFER_SIZE;
}
}
- if (Trb->Mode == SdMmcAdma32bMode ||
- Trb->Mode == SdMmcAdma64bV3Mode ||
- Trb->Mode == SdMmcAdma64bV4Mode) {
+ if ((Trb->Mode == SdMmcAdma32bMode) ||
+ (Trb->Mode == SdMmcAdma64bV3Mode) ||
+ (Trb->Mode == SdMmcAdma64bV4Mode))
+ {
Status = BuildAdmaDescTable (Trb, Private->ControllerVersion[Slot]);
if (EFI_ERROR (Status)) {
return Status;
@@ -1797,33 +1846,33 @@ SdMmcSetupMemoryForDmaTransfer (
**/
SD_MMC_HC_TRB *
SdMmcCreateTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot,
- IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot,
+ IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
+ IN EFI_EVENT Event
)
{
- SD_MMC_HC_TRB *Trb;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ SD_MMC_HC_TRB *Trb;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
Trb = AllocateZeroPool (sizeof (SD_MMC_HC_TRB));
if (Trb == NULL) {
return NULL;
}
- Trb->Signature = SD_MMC_HC_TRB_SIG;
- Trb->Slot = Slot;
- Trb->BlockSize = 0x200;
- Trb->Packet = Packet;
- Trb->Event = Event;
- Trb->Started = FALSE;
- Trb->CommandComplete = FALSE;
- Trb->Timeout = Packet->Timeout;
- Trb->Retries = SD_MMC_TRB_RETRIES;
+ Trb->Signature = SD_MMC_HC_TRB_SIG;
+ Trb->Slot = Slot;
+ Trb->BlockSize = 0x200;
+ Trb->Packet = Packet;
+ Trb->Event = Event;
+ Trb->Started = FALSE;
+ Trb->CommandComplete = FALSE;
+ Trb->Timeout = Packet->Timeout;
+ Trb->Retries = SD_MMC_TRB_RETRIES;
Trb->PioModeTransferCompleted = FALSE;
- Trb->PioBlockIndex = 0;
- Trb->Private = Private;
+ Trb->PioBlockIndex = 0;
+ Trb->Private = Private;
if ((Packet->InTransferLength != 0) && (Packet->InDataBuffer != NULL)) {
Trb->Data = Packet->InDataBuffer;
@@ -1847,33 +1896,38 @@ SdMmcCreateTrb (
if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) &&
(Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) ||
((Private->Slot[Trb->Slot].CardType == SdCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) {
+ (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK)))
+ {
Trb->Mode = SdMmcPioMode;
} else {
if (Trb->DataLen == 0) {
Trb->Mode = SdMmcNoData;
} else if (Private->Capability[Slot].Adma2 != 0) {
- Trb->Mode = SdMmcAdma32bMode;
+ Trb->Mode = SdMmcAdma32bMode;
Trb->AdmaLengthMode = SdMmcAdmaLen16b;
if ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300) &&
- (Private->Capability[Slot].SysBus64V3 == 1)) {
+ (Private->Capability[Slot].SysBus64V3 == 1))
+ {
Trb->Mode = SdMmcAdma64bV3Mode;
} else if (((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400) &&
(Private->Capability[Slot].SysBus64V3 == 1)) ||
((Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410) &&
- (Private->Capability[Slot].SysBus64V4 == 1))) {
+ (Private->Capability[Slot].SysBus64V4 == 1)))
+ {
Trb->Mode = SdMmcAdma64bV4Mode;
}
+
if (Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410) {
Trb->AdmaLengthMode = SdMmcAdmaLen26b;
}
+
Status = SdMmcSetupMemoryForDmaTransfer (Private, Slot, Trb);
if (EFI_ERROR (Status)) {
goto Error;
}
} else if (Private->Capability[Slot].Sdma != 0) {
Trb->Mode = SdMmcSdmaMode;
- Status = SdMmcSetupMemoryForDmaTransfer (Private, Slot, Trb);
+ Status = SdMmcSetupMemoryForDmaTransfer (Private, Slot, Trb);
if (EFI_ERROR (Status)) {
goto Error;
}
@@ -1903,46 +1957,51 @@ Error:
**/
VOID
SdMmcFreeTrb (
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = Trb->Private->PciIo;
if (Trb->AdmaMap != NULL) {
PciIo->Unmap (
- PciIo,
- Trb->AdmaMap
- );
+ PciIo,
+ Trb->AdmaMap
+ );
}
+
if (Trb->Adma32Desc != NULL) {
PciIo->FreeBuffer (
- PciIo,
- Trb->AdmaPages,
- Trb->Adma32Desc
- );
+ PciIo,
+ Trb->AdmaPages,
+ Trb->Adma32Desc
+ );
}
+
if (Trb->Adma64V3Desc != NULL) {
PciIo->FreeBuffer (
- PciIo,
- Trb->AdmaPages,
- Trb->Adma64V3Desc
- );
+ PciIo,
+ Trb->AdmaPages,
+ Trb->Adma64V3Desc
+ );
}
+
if (Trb->Adma64V4Desc != NULL) {
PciIo->FreeBuffer (
- PciIo,
- Trb->AdmaPages,
- Trb->Adma64V4Desc
- );
+ PciIo,
+ Trb->AdmaPages,
+ Trb->Adma64V4Desc
+ );
}
+
if (Trb->DataMap != NULL) {
PciIo->Unmap (
- PciIo,
- Trb->DataMap
- );
+ PciIo,
+ Trb->DataMap
+ );
}
+
FreePool (Trb);
return;
}
@@ -1960,20 +2019,21 @@ SdMmcFreeTrb (
**/
EFI_STATUS
SdMmcCheckTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 PresentState;
Packet = Trb->Packet;
if ((Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc) ||
(Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR1b) ||
- (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b)) {
+ (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b))
+ {
//
// Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
// the Present State register to be 0
@@ -2013,14 +2073,14 @@ SdMmcCheckTrbEnv (
**/
EFI_STATUS
SdMmcWaitTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
//
// Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
@@ -2041,6 +2101,7 @@ SdMmcWaitTrbEnv (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -2064,23 +2125,23 @@ SdMmcWaitTrbEnv (
**/
EFI_STATUS
SdMmcExecTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT16 Cmd;
- UINT16 IntStatus;
- UINT32 Argument;
- UINT32 BlkCount;
- UINT16 BlkSize;
- UINT16 TransMode;
- UINT8 HostCtrl1;
- UINT64 SdmaAddr;
- UINT64 AdmaAddr;
- BOOLEAN AddressingMode64;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 Cmd;
+ UINT16 IntStatus;
+ UINT32 Argument;
+ UINT32 BlkCount;
+ UINT16 BlkSize;
+ UINT16 TransMode;
+ UINT8 HostCtrl1;
+ UINT64 SdmaAddr;
+ UINT64 AdmaAddr;
+ BOOLEAN AddressingMode64;
AddressingMode64 = FALSE;
@@ -2094,6 +2155,7 @@ SdMmcExecTrb (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Clear all bits in Normal Interrupt Status Register excepts for Card Removal & Card Insertion bits.
//
@@ -2104,8 +2166,14 @@ SdMmcExecTrb (
}
if (Private->ControllerVersion[Trb->Slot] >= SD_MMC_HC_CTRL_VER_400) {
- Status = SdMmcHcCheckMmioSet(PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL2, sizeof(UINT16),
- SD_MMC_HC_64_ADDR_EN, SD_MMC_HC_64_ADDR_EN);
+ Status = SdMmcHcCheckMmioSet (
+ PciIo,
+ Trb->Slot,
+ SD_MMC_HC_HOST_CTRL2,
+ sizeof (UINT16),
+ SD_MMC_HC_64_ADDR_EN,
+ SD_MMC_HC_64_ADDR_EN
+ );
if (!EFI_ERROR (Status)) {
AddressingMode64 = TRUE;
}
@@ -2115,15 +2183,16 @@ SdMmcExecTrb (
// Set Host Control 1 register DMA Select field
//
if ((Trb->Mode == SdMmcAdma32bMode) ||
- (Trb->Mode == SdMmcAdma64bV4Mode)) {
+ (Trb->Mode == SdMmcAdma64bV4Mode))
+ {
HostCtrl1 = BIT4;
- Status = SdMmcHcOrMmio (PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdMmcHcOrMmio (PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
} else if (Trb->Mode == SdMmcAdma64bV3Mode) {
HostCtrl1 = BIT4|BIT3;
- Status = SdMmcHcOrMmio (PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdMmcHcOrMmio (PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2133,7 +2202,8 @@ SdMmcExecTrb (
if (Trb->Mode == SdMmcSdmaMode) {
if ((!AddressingMode64) &&
- ((UINT64)(UINTN)Trb->DataPhy >= 0x100000000ul)) {
+ ((UINT64)(UINTN)Trb->DataPhy >= 0x100000000ul))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -2150,7 +2220,8 @@ SdMmcExecTrb (
}
} else if ((Trb->Mode == SdMmcAdma32bMode) ||
(Trb->Mode == SdMmcAdma64bV3Mode) ||
- (Trb->Mode == SdMmcAdma64bV4Mode)) {
+ (Trb->Mode == SdMmcAdma64bV4Mode))
+ {
AdmaAddr = (UINT64)(UINTN)Trb->AdmaDescPhy;
Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_ADMA_SYS_ADDR, FALSE, sizeof (AdmaAddr), &AdmaAddr);
if (EFI_ERROR (Status)) {
@@ -2178,11 +2249,13 @@ SdMmcExecTrb (
//
BlkCount = (Trb->DataLen / Trb->BlockSize);
}
+
if (Private->ControllerVersion[Trb->Slot] >= SD_MMC_HC_CTRL_VER_410) {
Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_SDMA_ADDR, FALSE, sizeof (UINT32), &BlkCount);
} else {
Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_BLK_COUNT, FALSE, sizeof (UINT16), &BlkCount);
}
+
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2198,12 +2271,15 @@ SdMmcExecTrb (
if (Trb->Mode != SdMmcPioMode) {
TransMode |= BIT0;
}
+
if (Trb->Read) {
TransMode |= BIT4;
}
+
if (BlkCount > 1) {
TransMode |= BIT5 | BIT1;
}
+
//
// Only SD memory card needs to use AUTO CMD12 feature.
//
@@ -2219,10 +2295,11 @@ SdMmcExecTrb (
return Status;
}
- Cmd = (UINT16)LShiftU64(Packet->SdMmcCmdBlk->CommandIndex, 8);
+ Cmd = (UINT16)LShiftU64 (Packet->SdMmcCmdBlk->CommandIndex, 8);
if (Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc) {
Cmd |= BIT5;
}
+
//
// Convert ResponseType to value
//
@@ -2236,7 +2313,7 @@ SdMmcExecTrb (
break;
case SdMmcResponseTypeR2:
Cmd |= (BIT0 | BIT3);
- break;
+ break;
case SdMmcResponseTypeR3:
case SdMmcResponseTypeR4:
Cmd |= BIT1;
@@ -2250,6 +2327,7 @@ SdMmcExecTrb (
break;
}
}
+
//
// Execute cmd
//
@@ -2281,18 +2359,19 @@ SdMmcSoftwareReset (
if ((ErrIntStatus & 0x0F) != 0) {
SwReset |= BIT1;
}
+
if ((ErrIntStatus & 0x70) != 0) {
SwReset |= BIT2;
}
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Slot,
- SD_MMC_HC_SW_RST,
- FALSE,
- sizeof (SwReset),
- &SwReset
- );
+ Status = SdMmcHcRwMmio (
+ Private->PciIo,
+ Slot,
+ SD_MMC_HC_SW_RST,
+ FALSE,
+ sizeof (SwReset),
+ &SwReset
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2429,10 +2508,11 @@ SdMmcGetResponse (
sizeof (UINT32),
&Response[Index]
);
- if (EFI_ERROR (Status)) {
- return Status;
- }
+ if (EFI_ERROR (Status)) {
+ return Status;
}
+ }
+
CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response));
return EFI_SUCCESS;
@@ -2474,10 +2554,12 @@ SdMmcCheckCommandComplete (
if (EFI_ERROR (Status)) {
return Status;
}
+
Status = SdMmcGetResponse (Private, Trb);
if (EFI_ERROR (Status)) {
return Status;
}
+
Trb->CommandComplete = TRUE;
return EFI_SUCCESS;
}
@@ -2503,11 +2585,11 @@ SdMmcTransferDataWithPio (
IN UINT16 IntStatus
)
{
- EFI_STATUS Status;
- UINT16 Data16;
- UINT32 BlockCount;
+ EFI_STATUS Status;
+ UINT16 Data16;
+ UINT32 BlockCount;
EFI_PCI_IO_PROTOCOL_WIDTH Width;
- UINTN Count;
+ UINTN Count;
BlockCount = (Trb->DataLen / Trb->BlockSize);
if (Trb->DataLen % Trb->BlockSize != 0) {
@@ -2533,45 +2615,49 @@ SdMmcTransferDataWithPio (
Width = EfiPciIoWidthFifoUint8;
Count = Trb->BlockSize;
break;
- }
+ }
if (Trb->Read) {
if ((IntStatus & BIT5) == 0) {
return EFI_NOT_READY;
}
+
Data16 = BIT5;
SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (Data16), &Data16);
Status = Private->PciIo->Mem.Read (
- Private->PciIo,
- Width,
- Trb->Slot,
- SD_MMC_HC_BUF_DAT_PORT,
- Count,
- (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex))
- );
+ Private->PciIo,
+ Width,
+ Trb->Slot,
+ SD_MMC_HC_BUF_DAT_PORT,
+ Count,
+ (VOID *)((UINT8 *)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex))
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
Trb->PioBlockIndex++;
} else {
if ((IntStatus & BIT4) == 0) {
return EFI_NOT_READY;
}
+
Data16 = BIT4;
SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (Data16), &Data16);
Status = Private->PciIo->Mem.Write (
- Private->PciIo,
- Width,
- Trb->Slot,
- SD_MMC_HC_BUF_DAT_PORT,
- Count,
- (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex))
- );
+ Private->PciIo,
+ Width,
+ Trb->Slot,
+ SD_MMC_HC_BUF_DAT_PORT,
+ Count,
+ (VOID *)((UINT8 *)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex))
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
Trb->PioBlockIndex++;
}
@@ -2667,7 +2753,7 @@ SdMmcCheckDataTransfer (
return Status;
}
- if (Trb->Mode == SdMmcPioMode && !Trb->PioModeTransferCompleted) {
+ if ((Trb->Mode == SdMmcPioMode) && !Trb->PioModeTransferCompleted) {
Status = SdMmcTransferDataWithPio (Private, Trb, IntStatus);
if (EFI_ERROR (Status)) {
return Status;
@@ -2687,6 +2773,7 @@ SdMmcCheckDataTransfer (
if (EFI_ERROR (Status)) {
return Status;
}
+
Status = SdMmcUpdateSdmaAddress (Private, Trb);
if (EFI_ERROR (Status)) {
return Status;
@@ -2709,15 +2796,15 @@ SdMmcCheckDataTransfer (
**/
EFI_STATUS
SdMmcCheckTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT16 IntStatus;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ UINT16 IntStatus;
- Packet = Trb->Packet;
+ Packet = Trb->Packet;
//
// Check Trb execution result by reading Normal Interrupt Status register.
//
@@ -2750,7 +2837,8 @@ SdMmcCheckTrbResult (
if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) &&
(Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) ||
((Private->Slot[Trb->Slot].CardType == SdCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) {
+ (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK)))
+ {
Status = SdMmcTransferDataWithPio (Private, Trb, IntStatus);
goto Done;
}
@@ -2762,9 +2850,10 @@ SdMmcCheckTrbResult (
}
}
- if (Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc ||
- Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR1b ||
- Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b) {
+ if ((Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc) ||
+ (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR1b) ||
+ (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b))
+ {
Status = SdMmcCheckDataTransfer (Private, Trb, IntStatus);
} else {
Status = EFI_SUCCESS;
@@ -2797,14 +2886,14 @@ Done:
**/
EFI_STATUS
SdMmcWaitTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
+ IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN SD_MMC_HC_TRB *Trb
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
Packet = Trb->Packet;
//
@@ -2825,6 +2914,7 @@ SdMmcWaitTrbResult (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -2835,4 +2925,3 @@ SdMmcWaitTrbResult (
return EFI_TIMEOUT;
}
-
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
index 16229a846c..91155770e0 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
@@ -14,9 +14,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// SD Host Controller SlotInfo Register Offset
//
-#define SD_MMC_HC_SLOT_OFFSET 0x40
+#define SD_MMC_HC_SLOT_OFFSET 0x40
-#define SD_MMC_HC_MAX_SLOT 6
+#define SD_MMC_HC_MAX_SLOT 6
//
// SD Host Controller MMIO Register Offset
@@ -60,17 +60,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// SD Host Controller bits to HOST_CTRL2 register
//
-#define SD_MMC_HC_CTRL_UHS_MASK 0x0007
-#define SD_MMC_HC_CTRL_UHS_SDR12 0x0000
-#define SD_MMC_HC_CTRL_UHS_SDR25 0x0001
-#define SD_MMC_HC_CTRL_UHS_SDR50 0x0002
-#define SD_MMC_HC_CTRL_UHS_SDR104 0x0003
-#define SD_MMC_HC_CTRL_UHS_DDR50 0x0004
-#define SD_MMC_HC_CTRL_MMC_LEGACY 0x0000
-#define SD_MMC_HC_CTRL_MMC_HS_SDR 0x0001
-#define SD_MMC_HC_CTRL_MMC_HS_DDR 0x0004
-#define SD_MMC_HC_CTRL_MMC_HS200 0x0003
-#define SD_MMC_HC_CTRL_MMC_HS400 0x0005
+#define SD_MMC_HC_CTRL_UHS_MASK 0x0007
+#define SD_MMC_HC_CTRL_UHS_SDR12 0x0000
+#define SD_MMC_HC_CTRL_UHS_SDR25 0x0001
+#define SD_MMC_HC_CTRL_UHS_SDR50 0x0002
+#define SD_MMC_HC_CTRL_UHS_SDR104 0x0003
+#define SD_MMC_HC_CTRL_UHS_DDR50 0x0004
+#define SD_MMC_HC_CTRL_MMC_LEGACY 0x0000
+#define SD_MMC_HC_CTRL_MMC_HS_SDR 0x0001
+#define SD_MMC_HC_CTRL_MMC_HS_DDR 0x0004
+#define SD_MMC_HC_CTRL_MMC_HS200 0x0003
+#define SD_MMC_HC_CTRL_MMC_HS400 0x0005
#define SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK 0x0030
@@ -97,113 +97,113 @@ typedef enum {
//
// The maximum data length of each descriptor line
//
-#define ADMA_MAX_DATA_PER_LINE_16B SIZE_64KB
-#define ADMA_MAX_DATA_PER_LINE_26B SIZE_64MB
+#define ADMA_MAX_DATA_PER_LINE_16B SIZE_64KB
+#define ADMA_MAX_DATA_PER_LINE_26B SIZE_64MB
//
// ADMA descriptor for 32b addressing.
//
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 UpperLength:10;
- UINT32 LowerLength:16;
- UINT32 Address;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 UpperLength : 10;
+ UINT32 LowerLength : 16;
+ UINT32 Address;
} SD_MMC_HC_ADMA_32_DESC_LINE;
//
// ADMA descriptor for 64b addressing.
//
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 UpperLength:10;
- UINT32 LowerLength:16;
- UINT32 LowerAddress;
- UINT32 UpperAddress;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 UpperLength : 10;
+ UINT32 LowerLength : 16;
+ UINT32 LowerAddress;
+ UINT32 UpperAddress;
} SD_MMC_HC_ADMA_64_V3_DESC_LINE;
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 UpperLength:10;
- UINT32 LowerLength:16;
- UINT32 LowerAddress;
- UINT32 UpperAddress;
- UINT32 Reserved1;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 UpperLength : 10;
+ UINT32 LowerLength : 16;
+ UINT32 LowerAddress;
+ UINT32 UpperAddress;
+ UINT32 Reserved1;
} SD_MMC_HC_ADMA_64_V4_DESC_LINE;
-#define SD_MMC_SDMA_BOUNDARY 512 * 1024
-#define SD_MMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
+#define SD_MMC_SDMA_BOUNDARY 512 * 1024
+#define SD_MMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
typedef struct {
- UINT8 FirstBar:3; // bit 0:2
- UINT8 Reserved:1; // bit 3
- UINT8 SlotNum:3; // bit 4:6
- UINT8 Reserved1:1; // bit 7
+ UINT8 FirstBar : 3; // bit 0:2
+ UINT8 Reserved : 1; // bit 3
+ UINT8 SlotNum : 3; // bit 4:6
+ UINT8 Reserved1 : 1; // bit 7
} SD_MMC_HC_SLOT_INFO;
typedef struct {
- UINT32 TimeoutFreq:6; // bit 0:5
- UINT32 Reserved:1; // bit 6
- UINT32 TimeoutUnit:1; // bit 7
- UINT32 BaseClkFreq:8; // bit 8:15
- UINT32 MaxBlkLen:2; // bit 16:17
- UINT32 BusWidth8:1; // bit 18
- UINT32 Adma2:1; // bit 19
- UINT32 Reserved2:1; // bit 20
- UINT32 HighSpeed:1; // bit 21
- UINT32 Sdma:1; // bit 22
- UINT32 SuspRes:1; // bit 23
- UINT32 Voltage33:1; // bit 24
- UINT32 Voltage30:1; // bit 25
- UINT32 Voltage18:1; // bit 26
- UINT32 SysBus64V4:1; // bit 27
- UINT32 SysBus64V3:1; // bit 28
- UINT32 AsyncInt:1; // bit 29
- UINT32 SlotType:2; // bit 30:31
- UINT32 Sdr50:1; // bit 32
- UINT32 Sdr104:1; // bit 33
- UINT32 Ddr50:1; // bit 34
- UINT32 Reserved3:1; // bit 35
- UINT32 DriverTypeA:1; // bit 36
- UINT32 DriverTypeC:1; // bit 37
- UINT32 DriverTypeD:1; // bit 38
- UINT32 DriverType4:1; // bit 39
- UINT32 TimerCount:4; // bit 40:43
- UINT32 Reserved4:1; // bit 44
- UINT32 TuningSDR50:1; // bit 45
- UINT32 RetuningMod:2; // bit 46:47
- UINT32 ClkMultiplier:8; // bit 48:55
- UINT32 Reserved5:7; // bit 56:62
- UINT32 Hs400:1; // bit 63
+ UINT32 TimeoutFreq : 6; // bit 0:5
+ UINT32 Reserved : 1; // bit 6
+ UINT32 TimeoutUnit : 1; // bit 7
+ UINT32 BaseClkFreq : 8; // bit 8:15
+ UINT32 MaxBlkLen : 2; // bit 16:17
+ UINT32 BusWidth8 : 1; // bit 18
+ UINT32 Adma2 : 1; // bit 19
+ UINT32 Reserved2 : 1; // bit 20
+ UINT32 HighSpeed : 1; // bit 21
+ UINT32 Sdma : 1; // bit 22
+ UINT32 SuspRes : 1; // bit 23
+ UINT32 Voltage33 : 1; // bit 24
+ UINT32 Voltage30 : 1; // bit 25
+ UINT32 Voltage18 : 1; // bit 26
+ UINT32 SysBus64V4 : 1; // bit 27
+ UINT32 SysBus64V3 : 1; // bit 28
+ UINT32 AsyncInt : 1; // bit 29
+ UINT32 SlotType : 2; // bit 30:31
+ UINT32 Sdr50 : 1; // bit 32
+ UINT32 Sdr104 : 1; // bit 33
+ UINT32 Ddr50 : 1; // bit 34
+ UINT32 Reserved3 : 1; // bit 35
+ UINT32 DriverTypeA : 1; // bit 36
+ UINT32 DriverTypeC : 1; // bit 37
+ UINT32 DriverTypeD : 1; // bit 38
+ UINT32 DriverType4 : 1; // bit 39
+ UINT32 TimerCount : 4; // bit 40:43
+ UINT32 Reserved4 : 1; // bit 44
+ UINT32 TuningSDR50 : 1; // bit 45
+ UINT32 RetuningMod : 2; // bit 46:47
+ UINT32 ClkMultiplier : 8; // bit 48:55
+ UINT32 Reserved5 : 7; // bit 56:62
+ UINT32 Hs400 : 1; // bit 63
} SD_MMC_HC_SLOT_CAP;
//
// SD Host controller version
//
-#define SD_MMC_HC_CTRL_VER_100 0x00
-#define SD_MMC_HC_CTRL_VER_200 0x01
-#define SD_MMC_HC_CTRL_VER_300 0x02
-#define SD_MMC_HC_CTRL_VER_400 0x03
-#define SD_MMC_HC_CTRL_VER_410 0x04
-#define SD_MMC_HC_CTRL_VER_420 0x05
+#define SD_MMC_HC_CTRL_VER_100 0x00
+#define SD_MMC_HC_CTRL_VER_200 0x01
+#define SD_MMC_HC_CTRL_VER_300 0x02
+#define SD_MMC_HC_CTRL_VER_400 0x03
+#define SD_MMC_HC_CTRL_VER_410 0x04
+#define SD_MMC_HC_CTRL_VER_420 0x05
//
// SD Host controller V4 enhancements
//
-#define SD_MMC_HC_V4_EN BIT12
-#define SD_MMC_HC_64_ADDR_EN BIT13
-#define SD_MMC_HC_26_DATA_LEN_ADMA_EN BIT10
+#define SD_MMC_HC_V4_EN BIT12
+#define SD_MMC_HC_64_ADDR_EN BIT13
+#define SD_MMC_HC_26_DATA_LEN_ADMA_EN BIT10
/**
Dump the content of SD/MMC host controller's Capability Register.
@@ -214,8 +214,8 @@ typedef struct {
**/
VOID
DumpCapabilityReg (
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP *Capability
+ IN UINT8 Slot,
+ IN SD_MMC_HC_SLOT_CAP *Capability
);
/**
@@ -232,9 +232,9 @@ DumpCapabilityReg (
EFI_STATUS
EFIAPI
SdMmcHcGetSlotInfo (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- OUT UINT8 *FirstBar,
- OUT UINT8 *SlotNum
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ OUT UINT8 *FirstBar,
+ OUT UINT8 *SlotNum
);
/**
@@ -263,12 +263,12 @@ SdMmcHcGetSlotInfo (
EFI_STATUS
EFIAPI
SdMmcHcRwMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
);
/**
@@ -295,11 +295,11 @@ SdMmcHcRwMmio (
EFI_STATUS
EFIAPI
SdMmcHcOrMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *OrData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *OrData
);
/**
@@ -326,11 +326,11 @@ SdMmcHcOrMmio (
EFI_STATUS
EFIAPI
SdMmcHcAndMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *AndData
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *AndData
);
/**
@@ -358,13 +358,13 @@ SdMmcHcAndMmio (
EFI_STATUS
EFIAPI
SdMmcHcWaitMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
);
/**
@@ -398,8 +398,8 @@ SdMmcHcGetControllerVersion (
**/
EFI_STATUS
SdMmcHcEnableInterrupt (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
);
/**
@@ -417,7 +417,7 @@ EFI_STATUS
SdMmcHcGetCapability (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
- OUT SD_MMC_HC_SLOT_CAP *Capability
+ OUT SD_MMC_HC_SLOT_CAP *Capability
);
/**
@@ -435,7 +435,7 @@ EFI_STATUS
SdMmcHcGetMaxCurrent (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
- OUT UINT64 *MaxCurrent
+ OUT UINT64 *MaxCurrent
);
/**
@@ -455,9 +455,9 @@ SdMmcHcGetMaxCurrent (
**/
EFI_STATUS
SdMmcHcCardDetect (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT BOOLEAN *MediaPresent
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ OUT BOOLEAN *MediaPresent
);
/**
@@ -474,8 +474,8 @@ SdMmcHcCardDetect (
**/
EFI_STATUS
SdMmcHcStopClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
);
/**
@@ -508,9 +508,9 @@ SdMmcHcStartSdClock (
**/
EFI_STATUS
SdMmcHcPowerControl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT8 PowerCtrl
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN UINT8 PowerCtrl
);
/**
@@ -528,9 +528,9 @@ SdMmcHcPowerControl (
**/
EFI_STATUS
SdMmcHcSetBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT16 BusWidth
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN UINT16 BusWidth
);
/**
@@ -548,9 +548,9 @@ SdMmcHcSetBusWidth (
**/
EFI_STATUS
SdMmcHcInitPowerVoltage (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN SD_MMC_HC_SLOT_CAP Capability
);
/**
@@ -567,8 +567,8 @@ SdMmcHcInitPowerVoltage (
**/
EFI_STATUS
SdMmcHcInitTimeoutCtrl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
);
/**
@@ -584,10 +584,10 @@ SdMmcHcInitTimeoutCtrl (
**/
EFI_STATUS
SdMmcHcUhsSignaling (
- IN EFI_HANDLE ControllerHandle,
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_BUS_MODE Timing
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot,
+ IN SD_MMC_BUS_MODE Timing
);
/**
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
index 9c18e6fddc..89e0a1b6a4 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.c
@@ -11,7 +11,7 @@
EDKII_SD_MMC_HOST_CONTROLLER_PPI mSdMmcHostControllerPpi = { GetSdMmcHcMmioBar };
-EFI_PEI_PPI_DESCRIPTOR mPpiList = {
+EFI_PEI_PPI_DESCRIPTOR mPpiList = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEdkiiPeiSdMmcHostControllerPpiGuid,
&mSdMmcHostControllerPpi
@@ -34,10 +34,10 @@ EFI_PEI_PPI_DESCRIPTOR mPpiList = {
EFI_STATUS
EFIAPI
GetSdMmcHcMmioBar (
- IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
- IN UINT8 ControllerId,
- IN OUT UINTN **MmioBar,
- OUT UINT8 *BarNum
+ IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ IN OUT UINTN **MmioBar,
+ OUT UINT8 *BarNum
)
{
SD_MMC_HC_PEI_PRIVATE_DATA *Private;
@@ -70,26 +70,26 @@ GetSdMmcHcMmioBar (
EFI_STATUS
EFIAPI
InitializeSdMmcHcPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_BOOT_MODE BootMode;
- EFI_STATUS Status;
- UINT16 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT32 Size;
- UINT64 MmioSize;
- UINT8 SubClass;
- UINT8 BaseClass;
- UINT8 SlotInfo;
- UINT8 SlotNum;
- UINT8 FirstBar;
- UINT8 Index;
- UINT8 Slot;
- UINT32 BarAddr;
- SD_MMC_HC_PEI_PRIVATE_DATA *Private;
+ EFI_BOOT_MODE BootMode;
+ EFI_STATUS Status;
+ UINT16 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT32 Size;
+ UINT64 MmioSize;
+ UINT8 SubClass;
+ UINT8 BaseClass;
+ UINT8 SlotInfo;
+ UINT8 SlotNum;
+ UINT8 FirstBar;
+ UINT8 Index;
+ UINT8 Slot;
+ UINT32 BarAddr;
+ SD_MMC_HC_PEI_PRIVATE_DATA *Private;
//
// Shadow this PEIM to run from memory
@@ -106,7 +106,7 @@ InitializeSdMmcHcPeim (
return EFI_SUCCESS;
}
- Private = (SD_MMC_HC_PEI_PRIVATE_DATA *) AllocateZeroPool (sizeof (SD_MMC_HC_PEI_PRIVATE_DATA));
+ Private = (SD_MMC_HC_PEI_PRIVATE_DATA *)AllocateZeroPool (sizeof (SD_MMC_HC_PEI_PRIVATE_DATA));
if (Private == NULL) {
DEBUG ((DEBUG_ERROR, "Failed to allocate memory for SD_MMC_HC_PEI_PRIVATE_DATA! \n"));
return EFI_OUT_OF_RESOURCES;
@@ -129,15 +129,15 @@ InitializeSdMmcHcPeim (
// Get the SD/MMC Pci host controller's Slot Info.
//
SlotInfo = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, SD_MMC_HC_PEI_SLOT_OFFSET));
- FirstBar = (*(SD_MMC_HC_PEI_SLOT_INFO*)&SlotInfo).FirstBar;
- SlotNum = (*(SD_MMC_HC_PEI_SLOT_INFO*)&SlotInfo).SlotNum + 1;
+ FirstBar = (*(SD_MMC_HC_PEI_SLOT_INFO *)&SlotInfo).FirstBar;
+ SlotNum = (*(SD_MMC_HC_PEI_SLOT_INFO *)&SlotInfo).SlotNum + 1;
ASSERT ((FirstBar + SlotNum) < MAX_SD_MMC_SLOTS);
for (Index = 0, Slot = FirstBar; Slot < (FirstBar + SlotNum); Index++, Slot++) {
//
// Get the SD/MMC Pci host controller's MMIO region size.
//
- PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
+ PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16) ~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot), 0xFFFFFFFF);
Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot));
@@ -153,8 +153,8 @@ InitializeSdMmcHcPeim (
// Memory space: anywhere in 64 bit address space
//
MmioSize = Size & 0xFFFFFFF0;
- PciWrite32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);
- Size = PciRead32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));
+ PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);
+ Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));
//
// Fix the length to support some spefic 64 bit BAR
//
@@ -162,7 +162,7 @@ InitializeSdMmcHcPeim (
//
// Calculate the size of 64bit bar
//
- MmioSize |= LShiftU64 ((UINT64) Size, 32);
+ MmioSize |= LShiftU64 ((UINT64)Size, 32);
MmioSize = (~(MmioSize)) + 1;
//
// Clean the high 32bits of this 64bit BAR to 0 as we only allow a 32bit BAR.
@@ -175,7 +175,8 @@ InitializeSdMmcHcPeim (
//
ASSERT (FALSE);
continue;
- };
+ }
+
//
// Assign resource to the SdMmc Pci host controller's MMIO BAR.
// Enable the SdMmc Pci host controller by setting BME and MSE bits of PCI_CMD register.
@@ -187,8 +188,9 @@ InitializeSdMmcHcPeim (
//
Private->MmioBar[Private->TotalSdMmcHcs].SlotNum++;
Private->MmioBar[Private->TotalSdMmcHcs].MmioBarAddr[Index] = BarAddr;
- BarAddr += (UINT32)MmioSize;
+ BarAddr += (UINT32)MmioSize;
}
+
Private->TotalSdMmcHcs++;
ASSERT (Private->TotalSdMmcHcs < MAX_SD_MMC_HCS);
}
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
index ee04a6b897..ade59dd6e3 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h
@@ -22,10 +22,10 @@
#include <Library/PeiServicesLib.h>
#include <Library/MemoryAllocationLib.h>
-#define SD_MMC_HC_PEI_SIGNATURE SIGNATURE_32 ('S', 'D', 'M', 'C')
+#define SD_MMC_HC_PEI_SIGNATURE SIGNATURE_32 ('S', 'D', 'M', 'C')
-#define MAX_SD_MMC_HCS 8
-#define MAX_SD_MMC_SLOTS 6
+#define MAX_SD_MMC_HCS 8
+#define MAX_SD_MMC_SLOTS 6
//
// SD Host Controller SlotInfo Register Offset
@@ -33,23 +33,23 @@
#define SD_MMC_HC_PEI_SLOT_OFFSET 0x40
typedef struct {
- UINT8 FirstBar:3; // bit 0:2
- UINT8 Reserved:1; // bit 3
- UINT8 SlotNum:3; // bit 4:6
- UINT8 Reserved1:1; // bit 7
+ UINT8 FirstBar : 3; // bit 0:2
+ UINT8 Reserved : 1; // bit 3
+ UINT8 SlotNum : 3; // bit 4:6
+ UINT8 Reserved1 : 1; // bit 7
} SD_MMC_HC_PEI_SLOT_INFO;
typedef struct {
- UINTN SlotNum;
- UINTN MmioBarAddr[MAX_SD_MMC_SLOTS];
+ UINTN SlotNum;
+ UINTN MmioBarAddr[MAX_SD_MMC_SLOTS];
} SD_MMC_HC_PEI_BAR;
typedef struct {
- UINTN Signature;
- EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;
- EFI_PEI_PPI_DESCRIPTOR PpiList;
- UINTN TotalSdMmcHcs;
- SD_MMC_HC_PEI_BAR MmioBar[MAX_SD_MMC_HCS];
+ UINTN Signature;
+ EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;
+ EFI_PEI_PPI_DESCRIPTOR PpiList;
+ UINTN TotalSdMmcHcs;
+ SD_MMC_HC_PEI_BAR MmioBar[MAX_SD_MMC_HCS];
} SD_MMC_HC_PEI_PRIVATE_DATA;
#define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a) CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)
@@ -71,10 +71,10 @@ typedef struct {
EFI_STATUS
EFIAPI
GetSdMmcHcMmioBar (
- IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
- IN UINT8 ControllerId,
- IN OUT UINTN **MmioBar,
- OUT UINT8 *BarNum
+ IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ IN OUT UINTN **MmioBar,
+ OUT UINT8 *BarNum
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/ComponentName.c
index 5dc67e8905..cff05b4da5 100644
--- a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/ComponentName.c
@@ -12,7 +12,7 @@
//
// EFI Component Name Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUfsHcComponentName = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUfsHcComponentName = {
UfsHcComponentNameGetDriverName,
UfsHcComponentNameGetControllerName,
"eng"
@@ -21,13 +21,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUfsHcComponentName =
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUfsHcComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UfsHcComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UfsHcComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUfsHcComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UfsHcComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UfsHcComponentNameGetControllerName,
"en"
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcDriverNameTable[] = {
{
"eng;en",
L"Universal Flash Storage (UFS) Pci Host Controller Driver"
@@ -38,7 +38,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcDriverNameTable[] =
}
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcControllerNameTable[] = {
{
"eng;en",
L"Universal Flash Storage (UFS) Pci Host Controller"
@@ -91,9 +91,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsHcControllerNameTable
EFI_STATUS
EFIAPI
UfsHcComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
@@ -176,16 +176,16 @@ UfsHcComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UfsHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- if (Language == NULL || ControllerName == NULL) {
+ if ((Language == NULL) || (ControllerName == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -215,5 +215,4 @@ UfsHcComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gUfsHcComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.c b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.c
index 4be90d7a80..5756ef0791 100644
--- a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.c
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.c
@@ -12,7 +12,7 @@
//
// NVM Express Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gUfsHcDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUfsHcDriverBinding = {
UfsHcDriverBindingSupported,
UfsHcDriverBindingStart,
UfsHcDriverBindingStop,
@@ -24,7 +24,7 @@ EFI_DRIVER_BINDING_PROTOCOL gUfsHcDriverBinding = {
//
// Template for Ufs host controller private data.
//
-UFS_HOST_CONTROLLER_PRIVATE_DATA gUfsHcTemplate = {
+UFS_HOST_CONTROLLER_PRIVATE_DATA gUfsHcTemplate = {
UFS_HC_PRIVATE_DATA_SIGNATURE, // Signature
{ // UfsHcProtocol
UfsHcGetMmioBar,
@@ -53,15 +53,15 @@ UFS_HOST_CONTROLLER_PRIVATE_DATA gUfsHcTemplate = {
EFI_STATUS
EFIAPI
UfsHcGetMmioBar (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- OUT UINTN *MmioBar
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ OUT UINTN *MmioBar
)
{
- UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINT8 BarIndex;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
+ UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT8 BarIndex;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
if ((This == NULL) || (MmioBar == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -76,7 +76,7 @@ UfsHcGetMmioBar (
PciIo,
BarIndex,
NULL,
- (VOID**) &BarDesc
+ (VOID **)&BarDesc
);
if (EFI_ERROR (Status)) {
return Status;
@@ -115,8 +115,8 @@ UfsHcMap (
IN EDKII_UFS_HOST_CONTROLLER_OPERATION Operation,
IN VOID *HostAddress,
IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
@@ -130,7 +130,7 @@ UfsHcMap (
Private = UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC (This);
PciIo = Private->PciIo;
- Status = PciIo->Map (PciIo, (EFI_PCI_IO_PROTOCOL_OPERATION)Operation, HostAddress, NumberOfBytes, DeviceAddress, Mapping);
+ Status = PciIo->Map (PciIo, (EFI_PCI_IO_PROTOCOL_OPERATION)Operation, HostAddress, NumberOfBytes, DeviceAddress, Mapping);
return Status;
}
@@ -147,8 +147,8 @@ UfsHcMap (
EFI_STATUS
EFIAPI
UfsHcUnmap (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN VOID *Mapping
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN VOID *Mapping
)
{
UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
@@ -162,7 +162,7 @@ UfsHcUnmap (
Private = UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC (This);
PciIo = Private->PciIo;
- Status = PciIo->Unmap (PciIo, Mapping);
+ Status = PciIo->Unmap (PciIo, Mapping);
return Status;
}
@@ -189,12 +189,12 @@ UfsHcUnmap (
EFI_STATUS
EFIAPI
UfsHcAllocateBuffer (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
)
{
UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
@@ -208,7 +208,7 @@ UfsHcAllocateBuffer (
Private = UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC (This);
PciIo = Private->PciIo;
- Status = PciIo->AllocateBuffer (PciIo, Type, MemoryType, Pages, HostAddress, Attributes);
+ Status = PciIo->AllocateBuffer (PciIo, Type, MemoryType, Pages, HostAddress, Attributes);
return Status;
}
@@ -227,9 +227,9 @@ UfsHcAllocateBuffer (
EFI_STATUS
EFIAPI
UfsHcFreeBuffer (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
)
{
UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
@@ -243,7 +243,7 @@ UfsHcFreeBuffer (
Private = UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC (This);
PciIo = Private->PciIo;
- Status = PciIo->FreeBuffer (PciIo, Pages, HostAddress);
+ Status = PciIo->FreeBuffer (PciIo, Pages, HostAddress);
return Status;
}
@@ -261,7 +261,7 @@ UfsHcFreeBuffer (
EFI_STATUS
EFIAPI
UfsHcFlush (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This
)
{
UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
@@ -271,7 +271,7 @@ UfsHcFlush (
Private = UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC (This);
PciIo = Private->PciIo;
- Status = PciIo->Flush (PciIo);
+ Status = PciIo->Flush (PciIo);
return Status;
}
@@ -312,7 +312,7 @@ UfsHcMmioRead (
PciIo = Private->PciIo;
BarIndex = Private->BarIndex;
- Status = PciIo->Mem.Read (PciIo, (EFI_PCI_IO_PROTOCOL_WIDTH)Width, BarIndex, Offset, Count, Buffer);
+ Status = PciIo->Mem.Read (PciIo, (EFI_PCI_IO_PROTOCOL_WIDTH)Width, BarIndex, Offset, Count, Buffer);
return Status;
}
@@ -354,7 +354,7 @@ UfsHcMmioWrite (
PciIo = Private->PciIo;
BarIndex = Private->BarIndex;
- Status = PciIo->Mem.Write (PciIo, (EFI_PCI_IO_PROTOCOL_WIDTH)Width, BarIndex, Offset, Count, Buffer);
+ Status = PciIo->Mem.Write (PciIo, (EFI_PCI_IO_PROTOCOL_WIDTH)Width, BarIndex, Offset, Count, Buffer);
return Status;
}
@@ -426,7 +426,7 @@ UfsHcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID *) &ParentDevicePath,
+ (VOID *)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -437,15 +437,16 @@ UfsHcDriverBindingSupported (
//
return Status;
}
+
//
// Close the protocol because we don't use it here
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Now test the EfiPciIoProtocol
@@ -453,7 +454,7 @@ UfsHcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -461,6 +462,7 @@ UfsHcDriverBindingSupported (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Now further check the PCI header: Base class (offset 0x0B) and
// Sub Class (offset 0x0A). This controller should be an UFS controller
@@ -474,28 +476,30 @@ UfsHcDriverBindingSupported (
);
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_UNSUPPORTED;
}
+
//
// Since we already got the PciData, we can close protocol to avoid to carry it on for multiple exit points.
//
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
//
// Examine UFS Host Controller PCI Configuration table fields
//
if (PciData.Hdr.ClassCode[2] == PCI_CLASS_MASS_STORAGE) {
- if (PciData.Hdr.ClassCode[1] == 0x09 ) { //UFS Controller Subclass
+ if (PciData.Hdr.ClassCode[1] == 0x09 ) {
+ // UFS Controller Subclass
UfsHcFound = TRUE;
}
}
@@ -507,7 +511,6 @@ UfsHcDriverBindingSupported (
return Status;
}
-
/**
Starts a device controller or a bus controller.
@@ -551,12 +554,12 @@ UfsHcDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
- UINT64 Supports;
- UINT8 BarIndex;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UFS_HOST_CONTROLLER_PRIVATE_DATA *Private;
+ UINT64 Supports;
+ UINT8 BarIndex;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;
PciIo = NULL;
Private = NULL;
@@ -569,7 +572,7 @@ UfsHcDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -602,7 +605,7 @@ UfsHcDriverBindingStart (
PciIo,
BarIndex,
NULL,
- (VOID**) &BarDesc
+ (VOID **)&BarDesc
);
if (Status == EFI_UNSUPPORTED) {
continue;
@@ -656,7 +659,7 @@ UfsHcDriverBindingStart (
&Controller,
&gEdkiiUfsHostControllerProtocolGuid,
EFI_NATIVE_INTERFACE,
- (VOID*)&(Private->UfsHc)
+ (VOID *)&(Private->UfsHc)
);
Done:
@@ -672,12 +675,13 @@ Done:
NULL
);
}
+
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
if (Private != NULL) {
FreePool (Private);
}
@@ -686,7 +690,6 @@ Done:
return Status;
}
-
/**
Stops a device controller or a bus controller.
@@ -716,10 +719,10 @@ Done:
EFI_STATUS
EFIAPI
UfsHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -732,7 +735,7 @@ UfsHcDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEdkiiUfsHostControllerProtocolGuid,
- (VOID **) &UfsHc,
+ (VOID **)&UfsHc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -794,7 +797,7 @@ UfsHcDriverEntry (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.h b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.h
index 1cf1144675..0c329069c3 100644
--- a/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.h
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.h
@@ -30,27 +30,27 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiDriverEntryPoint.h>
-extern EFI_DRIVER_BINDING_PROTOCOL gUfsHcDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gUfsHcComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gUfsHcComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gUfsHcDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gUfsHcComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gUfsHcComponentName2;
//
// Unique signature for private data structure.
//
-#define UFS_HC_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('U','F','S','H')
+#define UFS_HC_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('U','F','S','H')
-typedef struct _UFS_HOST_CONTROLLER_PRIVATE_DATA UFS_HOST_CONTROLLER_PRIVATE_DATA;
+typedef struct _UFS_HOST_CONTROLLER_PRIVATE_DATA UFS_HOST_CONTROLLER_PRIVATE_DATA;
//
// Ufs host controller private data structure.
//
struct _UFS_HOST_CONTROLLER_PRIVATE_DATA {
- UINT32 Signature;
+ UINT32 Signature;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL UfsHc;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT8 BarIndex;
- UINT64 PciAttributes;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL UfsHc;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 BarIndex;
+ UINT64 PciAttributes;
};
#define UFS_HOST_CONTROLLER_PRIVATE_DATA_FROM_UFSHC(a) \
@@ -178,11 +178,11 @@ UfsHcComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UfsHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -307,10 +307,10 @@ UfsHcDriverBindingStart (
EFI_STATUS
EFIAPI
UfsHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -325,8 +325,8 @@ UfsHcDriverBindingStop (
EFI_STATUS
EFIAPI
UfsHcGetMmioBar (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- OUT UINTN *MmioBar
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ OUT UINTN *MmioBar
);
/**
@@ -355,8 +355,8 @@ UfsHcMap (
IN EDKII_UFS_HOST_CONTROLLER_OPERATION Operation,
IN VOID *HostAddress,
IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -372,8 +372,8 @@ UfsHcMap (
EFI_STATUS
EFIAPI
UfsHcUnmap (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN VOID *Mapping
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN VOID *Mapping
);
/**
@@ -399,12 +399,12 @@ UfsHcUnmap (
EFI_STATUS
EFIAPI
UfsHcAllocateBuffer (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN EFI_ALLOCATE_TYPE Type,
- IN EFI_MEMORY_TYPE MemoryType,
- IN UINTN Pages,
- OUT VOID **HostAddress,
- IN UINT64 Attributes
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
);
/**
@@ -422,9 +422,9 @@ UfsHcAllocateBuffer (
EFI_STATUS
EFIAPI
UfsHcFreeBuffer (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
- IN UINTN Pages,
- IN VOID *HostAddress
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
);
/**
@@ -441,7 +441,7 @@ UfsHcFreeBuffer (
EFI_STATUS
EFIAPI
UfsHcFlush (
- IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This
+ IN EDKII_UFS_HOST_CONTROLLER_PROTOCOL *This
);
/**
diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
index 68bfade9c2..ac42b1b796 100644
--- a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
@@ -11,7 +11,7 @@
EDKII_UFS_HOST_CONTROLLER_PPI mUfsHostControllerPpi = { GetUfsHcMmioBar };
-EFI_PEI_PPI_DESCRIPTOR mPpiList = {
+EFI_PEI_PPI_DESCRIPTOR mPpiList = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEdkiiPeiUfsHostControllerPpiGuid,
&mUfsHostControllerPpi
@@ -31,9 +31,9 @@ EFI_PEI_PPI_DESCRIPTOR mPpiList = {
EFI_STATUS
EFIAPI
GetUfsHcMmioBar (
- IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
- IN UINT8 ControllerId,
- OUT UINTN *MmioBar
+ IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *MmioBar
)
{
UFS_HC_PEI_PRIVATE_DATA *Private;
@@ -66,8 +66,8 @@ GetUfsHcMmioBar (
EFI_STATUS
EFIAPI
InitializeUfsHcPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_BOOT_MODE BootMode;
@@ -97,7 +97,7 @@ InitializeUfsHcPeim (
return EFI_SUCCESS;
}
- Private = (UFS_HC_PEI_PRIVATE_DATA *) AllocateZeroPool (sizeof (UFS_HC_PEI_PRIVATE_DATA));
+ Private = (UFS_HC_PEI_PRIVATE_DATA *)AllocateZeroPool (sizeof (UFS_HC_PEI_PRIVATE_DATA));
if (Private == NULL) {
DEBUG ((DEBUG_ERROR, "Failed to allocate memory for UFS_HC_PEI_PRIVATE_DATA! \n"));
return EFI_OUT_OF_RESOURCES;
@@ -119,7 +119,7 @@ InitializeUfsHcPeim (
//
// Get the Ufs Pci host controller's MMIO region size.
//
- PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
+ PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16) ~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF);
Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET));
@@ -135,8 +135,8 @@ InitializeUfsHcPeim (
// Memory space: anywhere in 64 bit address space
//
MmioSize = Size & 0xFFFFFFF0;
- PciWrite32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);
- Size = PciRead32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));
+ PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);
+ Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));
//
// Fix the length to support some specific 64 bit BAR
@@ -146,7 +146,7 @@ InitializeUfsHcPeim (
//
// Calculate the size of 64bit bar
//
- MmioSize |= LShiftU64 ((UINT64) Size, 32);
+ MmioSize |= LShiftU64 ((UINT64)Size, 32);
MmioSize = (~(MmioSize)) + 1;
//
@@ -160,7 +160,8 @@ InitializeUfsHcPeim (
//
ASSERT (FALSE);
continue;
- };
+ }
+
//
// Assign resource to the Ufs Pci host controller's MMIO BAR.
// Enable the Ufs Pci host controller by setting BME and MSE bits of PCI_CMD register.
diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.h b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.h
index 48b42b8833..c04c84e524 100644
--- a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.h
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.h
@@ -21,15 +21,15 @@
#include <Library/PeiServicesLib.h>
#include <Library/MemoryAllocationLib.h>
-#define UFS_HC_PEI_SIGNATURE SIGNATURE_32 ('U', 'F', 'S', 'P')
-#define MAX_UFS_HCS 8
+#define UFS_HC_PEI_SIGNATURE SIGNATURE_32 ('U', 'F', 'S', 'P')
+#define MAX_UFS_HCS 8
typedef struct {
- UINTN Signature;
- EDKII_UFS_HOST_CONTROLLER_PPI UfsHostControllerPpi;
- EFI_PEI_PPI_DESCRIPTOR PpiList;
- UINTN TotalUfsHcs;
- UINTN UfsHcPciAddr[MAX_UFS_HCS];
+ UINTN Signature;
+ EDKII_UFS_HOST_CONTROLLER_PPI UfsHostControllerPpi;
+ EFI_PEI_PPI_DESCRIPTOR PpiList;
+ UINTN TotalUfsHcs;
+ UINTN UfsHcPciAddr[MAX_UFS_HCS];
} UFS_HC_PEI_PRIVATE_DATA;
#define UFS_HC_PEI_PRIVATE_DATA_FROM_THIS(a) CR (a, UFS_HC_PEI_PRIVATE_DATA, UfsHostControllerPpi, UFS_HC_PEI_SIGNATURE)
@@ -48,9 +48,9 @@ typedef struct {
EFI_STATUS
EFIAPI
GetUfsHcMmioBar (
- IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
- IN UINT8 ControllerId,
- OUT UINTN *MmioBar
+ IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
+ IN UINT8 ControllerId,
+ OUT UINTN *MmioBar
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.c
index 572c11c287..7c398cb55a 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.c
@@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
//
// EFI Component Name Protocol
//
@@ -22,19 +21,17 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName =
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UhciComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UhciComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UhciComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UhciComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUhciDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUhciDriverNameTable[] = {
{ "eng;en", L"Usb Uhci Driver" },
- { NULL, NULL }
+ { NULL, NULL }
};
-
//
// EFI Component Name Functions
//
@@ -166,16 +163,16 @@ UhciComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UhciComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- USB_HC_DEV *UhciDev;
- EFI_USB2_HC_PROTOCOL *Usb2Hc;
+ EFI_STATUS Status;
+ USB_HC_DEV *UhciDev;
+ EFI_USB2_HC_PROTOCOL *Usb2Hc;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -202,7 +199,7 @@ UhciComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
gUhciDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -221,5 +218,4 @@ UhciComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gUhciComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.h b/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.h
index c3b5674e9e..7e6ee93869 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/ComponentName.h
@@ -57,7 +57,6 @@ UhciComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -129,11 +128,11 @@ UhciComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UhciComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 9f78f3dbd3..48741085e5 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -9,8 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
-EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding = {
UhciDriverBindingSupported,
UhciDriverBindingStart,
UhciDriverBindingStop,
@@ -35,15 +34,16 @@ EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding = {
EFI_STATUS
EFIAPI
Uhci2Reset (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT16 Attributes
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT16 Attributes
)
{
- USB_HC_DEV *Uhc;
- EFI_TPL OldTpl;
+ USB_HC_DEV *Uhc;
+ EFI_TPL OldTpl;
if ((Attributes == EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG) ||
- (Attributes == EFI_USB_HC_RESET_HOST_WITH_DEBUG)) {
+ (Attributes == EFI_USB_HC_RESET_HOST_WITH_DEBUG))
+ {
return EFI_UNSUPPORTED;
}
@@ -60,38 +60,38 @@ Uhci2Reset (
);
}
- OldTpl = gBS->RaiseTPL (UHCI_TPL);
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);
switch (Attributes) {
- case EFI_USB_HC_RESET_GLOBAL:
- //
- // Stop schedule and set the Global Reset bit in the command register
- //
- UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
- UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
+ case EFI_USB_HC_RESET_GLOBAL:
+ //
+ // Stop schedule and set the Global Reset bit in the command register
+ //
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
+ UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
- gBS->Stall (UHC_ROOT_PORT_RESET_STALL);
+ gBS->Stall (UHC_ROOT_PORT_RESET_STALL);
- //
- // Clear the Global Reset bit to zero.
- //
- UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
+ //
+ // Clear the Global Reset bit to zero.
+ //
+ UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
- gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
- break;
+ gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
+ break;
- case EFI_USB_HC_RESET_HOST_CONTROLLER:
- //
- // Stop schedule and set Host Controller Reset bit to 1
- //
- UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
- UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);
+ case EFI_USB_HC_RESET_HOST_CONTROLLER:
+ //
+ // Stop schedule and set Host Controller Reset bit to 1
+ //
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
+ UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);
- gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
- break;
+ gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
+ break;
- default:
- goto ON_INVAILD_PARAMETER;
+ default:
+ goto ON_INVAILD_PARAMETER;
}
//
@@ -113,7 +113,6 @@ ON_INVAILD_PARAMETER:
return EFI_INVALID_PARAMETER;
}
-
/**
Retrieves current state of the USB host controller according to UEFI 2.0 spec.
@@ -128,29 +127,27 @@ ON_INVAILD_PARAMETER:
EFI_STATUS
EFIAPI
Uhci2GetState (
- IN EFI_USB2_HC_PROTOCOL *This,
- OUT EFI_USB_HC_STATE *State
+ IN EFI_USB2_HC_PROTOCOL *This,
+ OUT EFI_USB_HC_STATE *State
)
{
- USB_HC_DEV *Uhc;
- UINT16 UsbSts;
- UINT16 UsbCmd;
+ USB_HC_DEV *Uhc;
+ UINT16 UsbSts;
+ UINT16 UsbCmd;
if (State == NULL) {
return EFI_INVALID_PARAMETER;
}
- Uhc = UHC_FROM_USB2_HC_PROTO (This);
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
- UsbSts = UhciReadReg (Uhc->PciIo, USBSTS_OFFSET);
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
+ UsbSts = UhciReadReg (Uhc->PciIo, USBSTS_OFFSET);
- if ((UsbCmd & USBCMD_EGSM) !=0 ) {
+ if ((UsbCmd & USBCMD_EGSM) != 0 ) {
*State = EfiUsbHcStateSuspend;
-
} else if ((UsbSts & USBSTS_HCH) != 0) {
*State = EfiUsbHcStateHalt;
-
} else {
*State = EfiUsbHcStateOperational;
}
@@ -158,7 +155,6 @@ Uhci2GetState (
return EFI_SUCCESS;
}
-
/**
Sets the USB host controller to a specific state according to UEFI 2.0 spec.
@@ -174,18 +170,18 @@ Uhci2GetState (
EFI_STATUS
EFIAPI
Uhci2SetState (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN EFI_USB_HC_STATE State
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN EFI_USB_HC_STATE State
)
{
- EFI_USB_HC_STATE CurState;
- USB_HC_DEV *Uhc;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- UINT16 UsbCmd;
+ EFI_USB_HC_STATE CurState;
+ USB_HC_DEV *Uhc;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT16 UsbCmd;
- Uhc = UHC_FROM_USB2_HC_PROTO (This);
- Status = Uhci2GetState (This, &CurState);
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);
+ Status = Uhci2GetState (This, &CurState);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -195,69 +191,68 @@ Uhci2SetState (
return EFI_SUCCESS;
}
- Status = EFI_SUCCESS;
- OldTpl = gBS->RaiseTPL (UHCI_TPL);
+ Status = EFI_SUCCESS;
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);
switch (State) {
- case EfiUsbHcStateHalt:
- Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
- break;
-
- case EfiUsbHcStateOperational:
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
+ case EfiUsbHcStateHalt:
+ Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
+ break;
- if (CurState == EfiUsbHcStateHalt) {
- //
- // Set Run/Stop bit to 1, also set the bandwidht reclamation
- // point to 64 bytes
- //
- UsbCmd |= USBCMD_RS | USBCMD_MAXP;
- UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
+ case EfiUsbHcStateOperational:
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
- } else if (CurState == EfiUsbHcStateSuspend) {
- //
- // If FGR(Force Global Resume) bit is 0, set it
- //
- if ((UsbCmd & USBCMD_FGR) == 0) {
- UsbCmd |= USBCMD_FGR;
+ if (CurState == EfiUsbHcStateHalt) {
+ //
+ // Set Run/Stop bit to 1, also set the bandwidht reclamation
+ // point to 64 bytes
+ //
+ UsbCmd |= USBCMD_RS | USBCMD_MAXP;
+ UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
+ } else if (CurState == EfiUsbHcStateSuspend) {
+ //
+ // If FGR(Force Global Resume) bit is 0, set it
+ //
+ if ((UsbCmd & USBCMD_FGR) == 0) {
+ UsbCmd |= USBCMD_FGR;
+ UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
+ }
+
+ //
+ // wait 20ms to let resume complete (20ms is specified by UHCI spec)
+ //
+ gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);
+
+ //
+ // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0
+ //
+ UsbCmd &= ~USBCMD_FGR;
+ UsbCmd &= ~USBCMD_EGSM;
+ UsbCmd |= USBCMD_RS;
UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
}
- //
- // wait 20ms to let resume complete (20ms is specified by UHCI spec)
- //
- gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);
+ break;
+
+ case EfiUsbHcStateSuspend:
+ Status = Uhci2SetState (This, EfiUsbHcStateHalt);
+
+ if (EFI_ERROR (Status)) {
+ Status = EFI_DEVICE_ERROR;
+ goto ON_EXIT;
+ }
//
- // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0
+ // Set Enter Global Suspend Mode bit to 1.
//
- UsbCmd &= ~USBCMD_FGR;
- UsbCmd &= ~USBCMD_EGSM;
- UsbCmd |= USBCMD_RS;
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
+ UsbCmd |= USBCMD_EGSM;
UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
- }
-
- break;
-
- case EfiUsbHcStateSuspend:
- Status = Uhci2SetState (This, EfiUsbHcStateHalt);
-
- if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
- goto ON_EXIT;
- }
-
- //
- // Set Enter Global Suspend Mode bit to 1.
- //
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
- UsbCmd |= USBCMD_EGSM;
- UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);
- break;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
- break;
+ default:
+ Status = EFI_INVALID_PARAMETER;
+ break;
}
ON_EXIT:
@@ -289,10 +284,10 @@ Uhci2GetCapability (
OUT UINT8 *Is64BitCapable
)
{
- USB_HC_DEV *Uhc;
- UINT32 Offset;
- UINT16 PortSC;
- UINT32 Index;
+ USB_HC_DEV *Uhc;
+ UINT32 Offset;
+ UINT16 PortSC;
+ UINT32 Index;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
@@ -301,13 +296,13 @@ Uhci2GetCapability (
}
*MaxSpeed = EFI_USB_SPEED_FULL;
- *Is64BitCapable = (UINT8) FALSE;
+ *Is64BitCapable = (UINT8)FALSE;
*PortNumber = 0;
for (Index = 0; Index < USB_MAX_ROOTHUB_PORT; Index++) {
- Offset = USBPORTSC_OFFSET + Index * 2;
- PortSC = UhciReadReg (Uhc->PciIo, Offset);
+ Offset = USBPORTSC_OFFSET + Index * 2;
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);
//
// Port status's bit 7 is reserved and always returns 1 if
@@ -318,6 +313,7 @@ Uhci2GetCapability (
if (((PortSC & 0x80) == 0) || (PortSC == 0xFFFF)) {
break;
}
+
(*PortNumber)++;
}
@@ -327,7 +323,6 @@ Uhci2GetCapability (
return EFI_SUCCESS;
}
-
/**
Retrieves the current status of a USB root hub port according to UEFI 2.0 spec.
@@ -344,14 +339,14 @@ Uhci2GetCapability (
EFI_STATUS
EFIAPI
Uhci2GetRootHubPortStatus (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- USB_HC_DEV *Uhc;
- UINT32 Offset;
- UINT16 PortSC;
+ USB_HC_DEV *Uhc;
+ UINT32 Offset;
+ UINT16 PortSC;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
@@ -363,11 +358,11 @@ Uhci2GetRootHubPortStatus (
return EFI_INVALID_PARAMETER;
}
- Offset = USBPORTSC_OFFSET + PortNumber * 2;
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
- PortSC = UhciReadReg (Uhc->PciIo, Offset);
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);
if ((PortSC & USBPORTSC_CCS) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_CONNECTION;
@@ -406,7 +401,6 @@ Uhci2GetRootHubPortStatus (
return EFI_SUCCESS;
}
-
/**
Sets a feature for the specified root hub port according to UEFI 2.0 spec.
@@ -424,16 +418,16 @@ Uhci2GetRootHubPortStatus (
EFI_STATUS
EFIAPI
Uhci2SetRootHubPortFeature (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_HC_DEV *Uhc;
- EFI_TPL OldTpl;
- UINT32 Offset;
- UINT16 PortSC;
- UINT16 Command;
+ USB_HC_DEV *Uhc;
+ EFI_TPL OldTpl;
+ UINT32 Offset;
+ UINT16 PortSC;
+ UINT16 Command;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
@@ -441,42 +435,43 @@ Uhci2SetRootHubPortFeature (
return EFI_INVALID_PARAMETER;
}
- Offset = USBPORTSC_OFFSET + PortNumber * 2;
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;
- OldTpl = gBS->RaiseTPL (UHCI_TPL);
- PortSC = UhciReadReg (Uhc->PciIo, Offset);
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);
switch (PortFeature) {
- case EfiUsbPortSuspend:
- Command = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
- if ((Command & USBCMD_EGSM) == 0) {
- //
- // if global suspend is not active, can set port suspend
- //
- PortSC &= 0xfff5;
- PortSC |= USBPORTSC_SUSP;
- }
- break;
+ case EfiUsbPortSuspend:
+ Command = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);
+ if ((Command & USBCMD_EGSM) == 0) {
+ //
+ // if global suspend is not active, can set port suspend
+ //
+ PortSC &= 0xfff5;
+ PortSC |= USBPORTSC_SUSP;
+ }
- case EfiUsbPortReset:
- PortSC &= 0xfff5;
- PortSC |= USBPORTSC_PR;
- break;
+ break;
- case EfiUsbPortPower:
- //
- // No action
- //
- break;
+ case EfiUsbPortReset:
+ PortSC &= 0xfff5;
+ PortSC |= USBPORTSC_PR;
+ break;
- case EfiUsbPortEnable:
- PortSC &= 0xfff5;
- PortSC |= USBPORTSC_PED;
- break;
+ case EfiUsbPortPower:
+ //
+ // No action
+ //
+ break;
- default:
- gBS->RestoreTPL (OldTpl);
- return EFI_INVALID_PARAMETER;
+ case EfiUsbPortEnable:
+ PortSC &= 0xfff5;
+ PortSC |= USBPORTSC_PED;
+ break;
+
+ default:
+ gBS->RestoreTPL (OldTpl);
+ return EFI_INVALID_PARAMETER;
}
UhciWriteReg (Uhc->PciIo, Offset, PortSC);
@@ -485,7 +480,6 @@ Uhci2SetRootHubPortFeature (
return EFI_SUCCESS;
}
-
/**
Clears a feature for the specified root hub port according to Uefi 2.0 spec.
@@ -503,15 +497,15 @@ Uhci2SetRootHubPortFeature (
EFI_STATUS
EFIAPI
Uhci2ClearRootHubPortFeature (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_HC_DEV *Uhc;
- EFI_TPL OldTpl;
- UINT32 Offset;
- UINT16 PortSC;
+ USB_HC_DEV *Uhc;
+ EFI_TPL OldTpl;
+ UINT32 Offset;
+ UINT16 PortSC;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
@@ -519,67 +513,67 @@ Uhci2ClearRootHubPortFeature (
return EFI_INVALID_PARAMETER;
}
- Offset = USBPORTSC_OFFSET + PortNumber * 2;
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;
- OldTpl = gBS->RaiseTPL (UHCI_TPL);
- PortSC = UhciReadReg (Uhc->PciIo, Offset);
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);
switch (PortFeature) {
- case EfiUsbPortEnable:
- PortSC &= 0xfff5;
- PortSC &= ~USBPORTSC_PED;
- break;
+ case EfiUsbPortEnable:
+ PortSC &= 0xfff5;
+ PortSC &= ~USBPORTSC_PED;
+ break;
- case EfiUsbPortSuspend:
- //
- // Cause a resume on the specified port if in suspend mode.
- //
- PortSC &= 0xfff5;
- PortSC &= ~USBPORTSC_SUSP;
- break;
+ case EfiUsbPortSuspend:
+ //
+ // Cause a resume on the specified port if in suspend mode.
+ //
+ PortSC &= 0xfff5;
+ PortSC &= ~USBPORTSC_SUSP;
+ break;
- case EfiUsbPortPower:
- //
- // No action
- //
- break;
+ case EfiUsbPortPower:
+ //
+ // No action
+ //
+ break;
- case EfiUsbPortReset:
- PortSC &= 0xfff5;
- PortSC &= ~USBPORTSC_PR;
- break;
+ case EfiUsbPortReset:
+ PortSC &= 0xfff5;
+ PortSC &= ~USBPORTSC_PR;
+ break;
- case EfiUsbPortConnectChange:
- PortSC &= 0xfff5;
- PortSC |= USBPORTSC_CSC;
- break;
+ case EfiUsbPortConnectChange:
+ PortSC &= 0xfff5;
+ PortSC |= USBPORTSC_CSC;
+ break;
- case EfiUsbPortEnableChange:
- PortSC &= 0xfff5;
- PortSC |= USBPORTSC_PEDC;
- break;
+ case EfiUsbPortEnableChange:
+ PortSC &= 0xfff5;
+ PortSC |= USBPORTSC_PEDC;
+ break;
- case EfiUsbPortSuspendChange:
- //
- // Root hub does not support this
- //
- break;
+ case EfiUsbPortSuspendChange:
+ //
+ // Root hub does not support this
+ //
+ break;
- case EfiUsbPortOverCurrentChange:
- //
- // Root hub does not support this
- //
- break;
+ case EfiUsbPortOverCurrentChange:
+ //
+ // Root hub does not support this
+ //
+ break;
- case EfiUsbPortResetChange:
- //
- // Root hub does not support this
- //
- break;
+ case EfiUsbPortResetChange:
+ //
+ // Root hub does not support this
+ //
+ break;
- default:
- gBS->RestoreTPL (OldTpl);
- return EFI_INVALID_PARAMETER;
+ default:
+ gBS->RestoreTPL (OldTpl);
+ return EFI_INVALID_PARAMETER;
}
UhciWriteReg (Uhc->PciIo, Offset, PortSC);
@@ -588,7 +582,6 @@ Uhci2ClearRootHubPortFeature (
return EFI_SUCCESS;
}
-
/**
Submits control transfer to a target USB device according to UEFI 2.0 spec.
@@ -614,45 +607,45 @@ Uhci2ClearRootHubPortFeature (
EFI_STATUS
EFIAPI
Uhci2ControlTransfer (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 DeviceAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN EFI_USB_DATA_DIRECTION TransferDirection,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN TimeOut,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
- USB_HC_DEV *Uhc;
- UHCI_TD_SW *TDs;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- UHCI_QH_RESULT QhResult;
- UINT8 PktId;
- UINT8 *RequestPhy;
- VOID *RequestMap;
- UINT8 *DataPhy;
- VOID *DataMap;
- BOOLEAN IsSlowDevice;
- UINTN TransferDataLength;
-
- Uhc = UHC_FROM_USB2_HC_PROTO (This);
- TDs = NULL;
- DataPhy = NULL;
- DataMap = NULL;
- RequestPhy = NULL;
- RequestMap = NULL;
-
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
+ USB_HC_DEV *Uhc;
+ UHCI_TD_SW *TDs;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UHCI_QH_RESULT QhResult;
+ UINT8 PktId;
+ UINT8 *RequestPhy;
+ VOID *RequestMap;
+ UINT8 *DataPhy;
+ VOID *DataMap;
+ BOOLEAN IsSlowDevice;
+ UINTN TransferDataLength;
+
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);
+ TDs = NULL;
+ DataPhy = NULL;
+ DataMap = NULL;
+ RequestPhy = NULL;
+ RequestMap = NULL;
+
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
//
// Parameters Checking
//
- if (Request == NULL || TransferResult == NULL) {
+ if ((Request == NULL) || (TransferResult == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -661,12 +654,12 @@ Uhci2ControlTransfer (
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
-
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
- if ((TransferDirection != EfiUsbNoData) && (Data == NULL || DataLength == NULL)) {
+ if ((TransferDirection != EfiUsbNoData) && ((Data == NULL) || (DataLength == NULL))) {
return EFI_INVALID_PARAMETER;
}
@@ -712,12 +705,12 @@ Uhci2ControlTransfer (
Uhc,
DeviceAddress,
PktId,
- (UINT8*)Request,
+ (UINT8 *)Request,
RequestPhy,
- (UINT8*)Data,
+ (UINT8 *)Data,
DataPhy,
TransferDataLength,
- (UINT8) MaximumPacketLength,
+ (UINT8)MaximumPacketLength,
IsSlowDevice
);
@@ -754,7 +747,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits bulk transfer to a bulk endpoint of a USB device.
@@ -782,18 +774,18 @@ ON_EXIT:
EFI_STATUS
EFIAPI
Uhci2BulkTransfer (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN UINT8 DataBuffersNumber,
- IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINT8 DataBuffersNumber,
+ IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
EFI_USB_DATA_DIRECTION Direction;
@@ -824,7 +816,8 @@ Uhci2BulkTransfer (
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -869,7 +862,7 @@ Uhci2BulkTransfer (
DataPhy,
*DataLength,
DataToggle,
- (UINT8) MaximumPacketLength,
+ (UINT8)MaximumPacketLength,
FALSE
);
@@ -878,7 +871,6 @@ Uhci2BulkTransfer (
goto ON_EXIT;
}
-
//
// Link the TDs to bulk queue head. According to the platfore
// defintion of UHCI_NO_BW_RECLAMATION, BulkQh is either configured
@@ -904,7 +896,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits an asynchronous interrupt transfer to an
interrupt endpoint of a USB device according to UEFI 2.0 spec.
@@ -932,37 +923,37 @@ ON_EXIT:
EFI_STATUS
EFIAPI
Uhci2AsyncInterruptTransfer (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN BOOLEAN IsNewTransfer,
- IN OUT UINT8 *DataToggle,
- IN UINTN PollingInterval,
- IN UINTN DataLength,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
- IN VOID *Context
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN BOOLEAN IsNewTransfer,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN PollingInterval,
+ IN UINTN DataLength,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
+ IN VOID *Context
)
{
- USB_HC_DEV *Uhc;
- BOOLEAN IsSlowDevice;
- UHCI_QH_SW *Qh;
- UHCI_TD_SW *IntTds;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- UINT8 *DataPtr;
- UINT8 *DataPhy;
- UINT8 PktId;
-
- Uhc = UHC_FROM_USB2_HC_PROTO (This);
- Qh = NULL;
- IntTds = NULL;
- DataPtr = NULL;
- DataPhy = NULL;
-
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
+ USB_HC_DEV *Uhc;
+ BOOLEAN IsSlowDevice;
+ UHCI_QH_SW *Qh;
+ UHCI_TD_SW *IntTds;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT8 *DataPtr;
+ UINT8 *DataPhy;
+ UINT8 PktId;
+
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);
+ Qh = NULL;
+ IntTds = NULL;
+ DataPtr = NULL;
+ DataPhy = NULL;
+
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
if ((EndPointAddress & 0x80) == 0) {
return EFI_INVALID_PARAMETER;
@@ -979,7 +970,7 @@ Uhci2AsyncInterruptTransfer (
return Status;
}
- if (PollingInterval < 1 || PollingInterval > 255) {
+ if ((PollingInterval < 1) || (PollingInterval > 255)) {
return EFI_INVALID_PARAMETER;
}
@@ -1016,7 +1007,7 @@ Uhci2AsyncInterruptTransfer (
return EFI_OUT_OF_RESOURCES;
}
- DataPhy = (UINT8 *) (UINTN) UsbHcGetPciAddressForHostMem (Uhc->MemPool, DataPtr, DataLength);
+ DataPhy = (UINT8 *)(UINTN)UsbHcGetPciAddressForHostMem (Uhc->MemPool, DataPtr, DataLength);
OldTpl = gBS->RaiseTPL (UHCI_TPL);
@@ -1036,7 +1027,7 @@ Uhci2AsyncInterruptTransfer (
DataPhy,
DataLength,
DataToggle,
- (UINT8) MaximumPacketLength,
+ (UINT8)MaximumPacketLength,
IsSlowDevice
);
@@ -1113,28 +1104,28 @@ FREE_DATA:
EFI_STATUS
EFIAPI
Uhci2SyncInterruptTransfer (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
- EFI_STATUS Status;
- USB_HC_DEV *Uhc;
- UHCI_TD_SW *TDs;
- UHCI_QH_RESULT QhResult;
- EFI_TPL OldTpl;
- UINT8 *DataPhy;
- VOID *DataMap;
- UINT8 PktId;
- BOOLEAN IsSlowDevice;
+ EFI_STATUS Status;
+ USB_HC_DEV *Uhc;
+ UHCI_TD_SW *TDs;
+ UHCI_QH_RESULT QhResult;
+ EFI_TPL OldTpl;
+ UINT8 *DataPhy;
+ VOID *DataMap;
+ UINT8 PktId;
+ BOOLEAN IsSlowDevice;
Uhc = UHC_FROM_USB2_HC_PROTO (This);
DataPhy = NULL;
@@ -1145,7 +1136,7 @@ Uhci2SyncInterruptTransfer (
return EFI_INVALID_PARAMETER;
}
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
if ((DataLength == NULL) || (Data == NULL) || (TransferResult == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -1166,7 +1157,6 @@ Uhci2SyncInterruptTransfer (
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
-
UhciAckAllInterrupt (Uhc);
if (!UhciIsHcWorking (Uhc->PciIo)) {
@@ -1202,7 +1192,7 @@ Uhci2SyncInterruptTransfer (
DataPhy,
*DataLength,
DataToggle,
- (UINT8) MaximumPacketLength,
+ (UINT8)MaximumPacketLength,
IsSlowDevice
);
@@ -1213,7 +1203,6 @@ Uhci2SyncInterruptTransfer (
goto ON_EXIT;
}
-
UhciLinkTdToQh (Uhc, Uhc->SyncIntQh, TDs);
Status = UhciExecuteTransfer (Uhc, Uhc->SyncIntQh, TDs, TimeOut, IsSlowDevice, &QhResult);
@@ -1233,7 +1222,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits isochronous transfer to a target USB device according to UEFI 2.0 spec.
@@ -1255,22 +1243,21 @@ ON_EXIT:
EFI_STATUS
EFIAPI
Uhci2IsochronousTransfer (
- IN EFI_USB2_HC_PROTOCOL *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN UINT8 DataBuffersNumber,
- IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
- IN UINTN DataLength,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINT8 DataBuffersNumber,
+ IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
+ IN UINTN DataLength,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
return EFI_UNSUPPORTED;
}
-
/**
Submits Async isochronous transfer to a target USB device according to UEFI 2.0 spec.
@@ -1322,8 +1309,8 @@ Uhci2AsyncIsochronousTransfer (
EFI_STATUS
EFIAPI
UhciDriverEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EfiLibInstallDriverBindingComponentName2 (
@@ -1336,7 +1323,6 @@ UhciDriverEntryPoint (
);
}
-
/**
Test to see if this driver supports ControllerHandle. Any
ControllerHandle that has UsbHcProtocol installed will be supported.
@@ -1352,15 +1338,15 @@ UhciDriverEntryPoint (
EFI_STATUS
EFIAPI
UhciDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS OpenStatus;
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- USB_CLASSC UsbClassCReg;
+ EFI_STATUS OpenStatus;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ USB_CLASSC UsbClassCReg;
//
// Test whether there is PCI IO Protocol attached on the controller handle.
@@ -1368,7 +1354,7 @@ UhciDriverBindingSupported (
OpenStatus = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1397,8 +1383,8 @@ UhciDriverBindingSupported (
if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
(UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
(UsbClassCReg.ProgInterface != PCI_IF_UHCI)
- ) {
-
+ )
+ {
Status = EFI_UNSUPPORTED;
}
@@ -1411,10 +1397,8 @@ ON_EXIT:
);
return Status;
-
}
-
/**
Allocate and initialize the empty UHCI device.
@@ -1445,22 +1429,22 @@ UhciAllocateDev (
// This driver supports both USB_HC_PROTOCOL and USB2_HC_PROTOCOL.
// USB_HC_PROTOCOL is for EFI 1.1 backward compability.
//
- Uhc->Signature = USB_HC_DEV_SIGNATURE;
- Uhc->Usb2Hc.GetCapability = Uhci2GetCapability;
- Uhc->Usb2Hc.Reset = Uhci2Reset;
- Uhc->Usb2Hc.GetState = Uhci2GetState;
- Uhc->Usb2Hc.SetState = Uhci2SetState;
- Uhc->Usb2Hc.ControlTransfer = Uhci2ControlTransfer;
- Uhc->Usb2Hc.BulkTransfer = Uhci2BulkTransfer;
- Uhc->Usb2Hc.AsyncInterruptTransfer = Uhci2AsyncInterruptTransfer;
- Uhc->Usb2Hc.SyncInterruptTransfer = Uhci2SyncInterruptTransfer;
- Uhc->Usb2Hc.IsochronousTransfer = Uhci2IsochronousTransfer;
- Uhc->Usb2Hc.AsyncIsochronousTransfer = Uhci2AsyncIsochronousTransfer;
- Uhc->Usb2Hc.GetRootHubPortStatus = Uhci2GetRootHubPortStatus;
- Uhc->Usb2Hc.SetRootHubPortFeature = Uhci2SetRootHubPortFeature;
- Uhc->Usb2Hc.ClearRootHubPortFeature = Uhci2ClearRootHubPortFeature;
- Uhc->Usb2Hc.MajorRevision = 0x1;
- Uhc->Usb2Hc.MinorRevision = 0x1;
+ Uhc->Signature = USB_HC_DEV_SIGNATURE;
+ Uhc->Usb2Hc.GetCapability = Uhci2GetCapability;
+ Uhc->Usb2Hc.Reset = Uhci2Reset;
+ Uhc->Usb2Hc.GetState = Uhci2GetState;
+ Uhc->Usb2Hc.SetState = Uhci2SetState;
+ Uhc->Usb2Hc.ControlTransfer = Uhci2ControlTransfer;
+ Uhc->Usb2Hc.BulkTransfer = Uhci2BulkTransfer;
+ Uhc->Usb2Hc.AsyncInterruptTransfer = Uhci2AsyncInterruptTransfer;
+ Uhc->Usb2Hc.SyncInterruptTransfer = Uhci2SyncInterruptTransfer;
+ Uhc->Usb2Hc.IsochronousTransfer = Uhci2IsochronousTransfer;
+ Uhc->Usb2Hc.AsyncIsochronousTransfer = Uhci2AsyncIsochronousTransfer;
+ Uhc->Usb2Hc.GetRootHubPortStatus = Uhci2GetRootHubPortStatus;
+ Uhc->Usb2Hc.SetRootHubPortFeature = Uhci2SetRootHubPortFeature;
+ Uhc->Usb2Hc.ClearRootHubPortFeature = Uhci2ClearRootHubPortFeature;
+ Uhc->Usb2Hc.MajorRevision = 0x1;
+ Uhc->Usb2Hc.MinorRevision = 0x1;
Uhc->PciIo = PciIo;
Uhc->DevicePath = DevicePath;
@@ -1494,7 +1478,6 @@ ON_ERROR:
return NULL;
}
-
/**
Free the UHCI device and release its associated resources.
@@ -1503,7 +1486,7 @@ ON_ERROR:
**/
VOID
UhciFreeDev (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
if (Uhc->AsyncIntMonitor != NULL) {
@@ -1525,7 +1508,6 @@ UhciFreeDev (
FreePool (Uhc);
}
-
/**
Uninstall all Uhci Interface.
@@ -1535,26 +1517,25 @@ UhciFreeDev (
**/
VOID
UhciCleanDevUp (
- IN EFI_HANDLE Controller,
- IN EFI_USB2_HC_PROTOCOL *This
+ IN EFI_HANDLE Controller,
+ IN EFI_USB2_HC_PROTOCOL *This
)
{
- USB_HC_DEV *Uhc;
- EFI_STATUS Status;
+ USB_HC_DEV *Uhc;
+ EFI_STATUS Status;
//
// Uninstall the USB_HC and USB_HC2 protocol, then disable the controller
//
Uhc = UHC_FROM_USB2_HC_PROTO (This);
-
Status = gBS->UninstallProtocolInterface (
Controller,
&gEfiUsb2HcProtocolGuid,
&Uhc->Usb2Hc
);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
@@ -1565,11 +1546,11 @@ UhciCleanDevUp (
// Restore original PCI attributes
//
Uhc->PciIo->Attributes (
- Uhc->PciIo,
- EfiPciIoAttributeOperationSet,
- Uhc->OriginalPciAttributes,
- NULL
- );
+ Uhc->PciIo,
+ EfiPciIoAttributeOperationSet,
+ Uhc->OriginalPciAttributes,
+ NULL
+ );
UhciFreeDev (Uhc);
}
@@ -1584,13 +1565,13 @@ UhciCleanDevUp (
VOID
EFIAPI
UhcExitBootService (
- EFI_EVENT Event,
- VOID *Context
+ EFI_EVENT Event,
+ VOID *Context
)
{
- USB_HC_DEV *Uhc;
+ USB_HC_DEV *Uhc;
- Uhc = (USB_HC_DEV *) Context;
+ Uhc = (USB_HC_DEV *)Context;
//
// Stop the Host Controller
@@ -1620,27 +1601,27 @@ UhcExitBootService (
EFI_STATUS
EFIAPI
UhciDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- USB_HC_DEV *Uhc;
- UINT64 Supports;
- UINT64 OriginalPciAttributes;
- BOOLEAN PciAttributesSaved;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ USB_HC_DEV *Uhc;
+ UINT64 Supports;
+ UINT64 OriginalPciAttributes;
+ BOOLEAN PciAttributesSaved;
EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
//
// Open PCIIO, then enable the EHC device and turn off emulation
//
- Uhc = NULL;
+ Uhc = NULL;
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1654,14 +1635,14 @@ UhciDriverBindingStart (
// Open Device Path Protocol for on USB host controller
//
HcDevicePath = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &HcDevicePath,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&HcDevicePath,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
PciAttributesSaved = FALSE;
//
@@ -1677,6 +1658,7 @@ UhciDriverBindingStart (
if (EFI_ERROR (Status)) {
goto CLOSE_PCIIO;
}
+
PciAttributesSaved = TRUE;
//
@@ -1695,12 +1677,12 @@ UhciDriverBindingStart (
);
if (!EFI_ERROR (Status)) {
Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
}
if (EFI_ERROR (Status)) {
@@ -1783,7 +1765,6 @@ UhciDriverBindingStart (
FALSE
);
-
//
// Start the UHCI hardware, also set its reclamation point to 64 bytes
//
@@ -1808,24 +1789,23 @@ CLOSE_PCIIO:
// Restore original PCI attributes
//
PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- OriginalPciAttributes,
- NULL
- );
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ OriginalPciAttributes,
+ NULL
+ );
}
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return Status;
}
-
/**
Stop this driver on ControllerHandle. Support stopping any child handles
created by this driver.
@@ -1842,19 +1822,19 @@ CLOSE_PCIIO:
EFI_STATUS
EFIAPI
UhciDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_USB2_HC_PROTOCOL *Usb2Hc;
EFI_STATUS Status;
- Status = gBS->OpenProtocol (
+ Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1872,11 +1852,11 @@ UhciDriverBindingStop (
UhciCleanDevUp (Controller, Usb2Hc);
gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiPciIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_SUCCESS;
}
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
index 882f5e55ea..138623ed6b 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_UHCI_H_
#define _EFI_UHCI_H_
-
#include <Uefi.h>
#include <Protocol/Usb2HostController.h>
@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Pci.h>
-typedef struct _USB_HC_DEV USB_HC_DEV;
+typedef struct _USB_HC_DEV USB_HC_DEV;
#include "UsbHcMem.h"
#include "UhciQueue.h"
@@ -44,20 +43,20 @@ typedef struct _USB_HC_DEV USB_HC_DEV;
// UHC timeout experience values
//
-#define UHC_1_MICROSECOND 1
-#define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)
-#define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)
+#define UHC_1_MICROSECOND 1
+#define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)
+#define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)
//
// UHCI register operation timeout, set by experience
//
-#define UHC_GENERIC_TIMEOUT UHC_1_SECOND
+#define UHC_GENERIC_TIMEOUT UHC_1_SECOND
//
// Wait for force global resume(FGR) complete, refers to
// specification[UHCI11-2.1.1]
//
-#define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)
+#define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)
//
// Wait for roothub port reset and recovery, reset stall
@@ -71,22 +70,22 @@ typedef struct _USB_HC_DEV USB_HC_DEV;
// Sync and Async transfer polling interval, set by experience,
// and the unit of Async is 100us.
//
-#define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)
-#define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
+#define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)
+#define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
//
// UHC raises TPL to TPL_NOTIFY to serialize all its operations
// to protect shared data structures.
//
-#define UHCI_TPL TPL_NOTIFY
+#define UHCI_TPL TPL_NOTIFY
-#define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')
+#define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')
#pragma pack(1)
typedef struct {
- UINT8 ProgInterface;
- UINT8 SubClassCode;
- UINT8 BaseCode;
+ UINT8 ProgInterface;
+ UINT8 SubClassCode;
+ UINT8 BaseCode;
} USB_CLASSC;
#pragma pack()
@@ -104,20 +103,20 @@ typedef struct {
// device requires this bandwidth reclamation capability.
//
struct _USB_HC_DEV {
- UINT32 Signature;
- EFI_USB2_HC_PROTOCOL Usb2Hc;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINT64 OriginalPciAttributes;
+ UINT32 Signature;
+ EFI_USB2_HC_PROTOCOL Usb2Hc;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT64 OriginalPciAttributes;
//
// Schedule data structures
//
- UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
- UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
- UHCI_QH_SW *SyncIntQh;
- UHCI_QH_SW *CtrlQh;
- UHCI_QH_SW *BulkQh;
+ UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
+ UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
+ UHCI_QH_SW *SyncIntQh;
+ UHCI_QH_SW *CtrlQh;
+ UHCI_QH_SW *BulkQh;
//
// Structures to maintain asynchronus interrupt transfers.
@@ -127,22 +126,21 @@ struct _USB_HC_DEV {
// released in two steps using Recycle and RecycleWait.
// Check the asynchronous interrupt management routines.
//
- LIST_ENTRY AsyncIntList;
- EFI_EVENT AsyncIntMonitor;
- UHCI_ASYNC_REQUEST *Recycle;
- UHCI_ASYNC_REQUEST *RecycleWait;
-
+ LIST_ENTRY AsyncIntList;
+ EFI_EVENT AsyncIntMonitor;
+ UHCI_ASYNC_REQUEST *Recycle;
+ UHCI_ASYNC_REQUEST *RecycleWait;
- UINTN RootPorts;
- USBHC_MEM_POOL *MemPool;
- EFI_UNICODE_STRING_TABLE *CtrlNameTable;
- VOID *FrameMapping;
+ UINTN RootPorts;
+ USBHC_MEM_POOL *MemPool;
+ EFI_UNICODE_STRING_TABLE *CtrlNameTable;
+ VOID *FrameMapping;
//
// ExitBootServicesEvent is used to stop the EHC DMA operation
// after exit boot service.
//
- EFI_EVENT ExitBootServiceEvent;
+ EFI_EVENT ExitBootServiceEvent;
};
extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;
@@ -164,9 +162,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2;
EFI_STATUS
EFIAPI
UhciDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -185,9 +183,9 @@ UhciDriverBindingSupported (
EFI_STATUS
EFIAPI
UhciDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -206,10 +204,10 @@ UhciDriverBindingStart (
EFI_STATUS
EFIAPI
UhciDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.c
index 3d499c9baf..3dc27eff1a 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.c
@@ -17,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
UhciDumpQh (
- IN UHCI_QH_SW *QhSw
+ IN UHCI_QH_SW *QhSw
)
{
DEBUG ((DEBUG_VERBOSE, "&QhSw @ 0x%p\n", QhSw));
@@ -28,7 +28,6 @@ UhciDumpQh (
DEBUG ((DEBUG_VERBOSE, " Vertical Link - %x\n\n", QhSw->QhHw.VerticalLink));
}
-
/**
Dump the content of TD structure.
@@ -37,33 +36,33 @@ UhciDumpQh (
**/
VOID
UhciDumpTds (
- IN UHCI_TD_SW *TdSw
+ IN UHCI_TD_SW *TdSw
)
{
- UHCI_TD_SW *CurTdSw;
+ UHCI_TD_SW *CurTdSw;
CurTdSw = TdSw;
while (CurTdSw != NULL) {
- DEBUG ((DEBUG_VERBOSE, "TdSw @ 0x%p\n", CurTdSw));
- DEBUG ((DEBUG_VERBOSE, "TdSw.NextTd - 0x%p\n", CurTdSw->NextTd));
- DEBUG ((DEBUG_VERBOSE, "TdSw.DataLen - %d\n", CurTdSw->DataLen));
- DEBUG ((DEBUG_VERBOSE, "TdSw.Data - 0x%p\n", CurTdSw->Data));
+ DEBUG ((DEBUG_VERBOSE, "TdSw @ 0x%p\n", CurTdSw));
+ DEBUG ((DEBUG_VERBOSE, "TdSw.NextTd - 0x%p\n", CurTdSw->NextTd));
+ DEBUG ((DEBUG_VERBOSE, "TdSw.DataLen - %d\n", CurTdSw->DataLen));
+ DEBUG ((DEBUG_VERBOSE, "TdSw.Data - 0x%p\n", CurTdSw->Data));
DEBUG ((DEBUG_VERBOSE, "TdHw:\n"));
- DEBUG ((DEBUG_VERBOSE, " NextLink - 0x%x\n", CurTdSw->TdHw.NextLink));
- DEBUG ((DEBUG_VERBOSE, " ActualLen - %d\n", CurTdSw->TdHw.ActualLen));
- DEBUG ((DEBUG_VERBOSE, " Status - 0x%x\n", CurTdSw->TdHw.Status));
- DEBUG ((DEBUG_VERBOSE, " IOC - %d\n", CurTdSw->TdHw.IntOnCpl));
- DEBUG ((DEBUG_VERBOSE, " IsIsoCh - %d\n", CurTdSw->TdHw.IsIsoch));
- DEBUG ((DEBUG_VERBOSE, " LowSpeed - %d\n", CurTdSw->TdHw.LowSpeed));
- DEBUG ((DEBUG_VERBOSE, " ErrorCount - %d\n", CurTdSw->TdHw.ErrorCount));
- DEBUG ((DEBUG_VERBOSE, " ShortPacket - %d\n", CurTdSw->TdHw.ShortPacket));
- DEBUG ((DEBUG_VERBOSE, " PidCode - 0x%x\n", CurTdSw->TdHw.PidCode));
- DEBUG ((DEBUG_VERBOSE, " DevAddr - %d\n", CurTdSw->TdHw.DeviceAddr));
- DEBUG ((DEBUG_VERBOSE, " EndPoint - %d\n", CurTdSw->TdHw.EndPoint));
- DEBUG ((DEBUG_VERBOSE, " DataToggle - %d\n", CurTdSw->TdHw.DataToggle));
- DEBUG ((DEBUG_VERBOSE, " MaxPacketLen - %d\n", CurTdSw->TdHw.MaxPacketLen));
- DEBUG ((DEBUG_VERBOSE, " DataBuffer - 0x%x\n\n",CurTdSw->TdHw.DataBuffer));
+ DEBUG ((DEBUG_VERBOSE, " NextLink - 0x%x\n", CurTdSw->TdHw.NextLink));
+ DEBUG ((DEBUG_VERBOSE, " ActualLen - %d\n", CurTdSw->TdHw.ActualLen));
+ DEBUG ((DEBUG_VERBOSE, " Status - 0x%x\n", CurTdSw->TdHw.Status));
+ DEBUG ((DEBUG_VERBOSE, " IOC - %d\n", CurTdSw->TdHw.IntOnCpl));
+ DEBUG ((DEBUG_VERBOSE, " IsIsoCh - %d\n", CurTdSw->TdHw.IsIsoch));
+ DEBUG ((DEBUG_VERBOSE, " LowSpeed - %d\n", CurTdSw->TdHw.LowSpeed));
+ DEBUG ((DEBUG_VERBOSE, " ErrorCount - %d\n", CurTdSw->TdHw.ErrorCount));
+ DEBUG ((DEBUG_VERBOSE, " ShortPacket - %d\n", CurTdSw->TdHw.ShortPacket));
+ DEBUG ((DEBUG_VERBOSE, " PidCode - 0x%x\n", CurTdSw->TdHw.PidCode));
+ DEBUG ((DEBUG_VERBOSE, " DevAddr - %d\n", CurTdSw->TdHw.DeviceAddr));
+ DEBUG ((DEBUG_VERBOSE, " EndPoint - %d\n", CurTdSw->TdHw.EndPoint));
+ DEBUG ((DEBUG_VERBOSE, " DataToggle - %d\n", CurTdSw->TdHw.DataToggle));
+ DEBUG ((DEBUG_VERBOSE, " MaxPacketLen - %d\n", CurTdSw->TdHw.MaxPacketLen));
+ DEBUG ((DEBUG_VERBOSE, " DataBuffer - 0x%x\n\n", CurTdSw->TdHw.DataBuffer));
CurTdSw = CurTdSw->NextTd;
}
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.h
index 34f8ea1ff4..27a2ec51a0 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciDebug.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_UHCI_DEBUG_H_
#define _EFI_UHCI_DEBUG_H_
-
/**
Dump the content of QH structure.
@@ -21,10 +20,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
UhciDumpQh (
- IN UHCI_QH_SW *QhSw
+ IN UHCI_QH_SW *QhSw
);
-
/**
Dump the content of TD structure.
@@ -35,7 +33,7 @@ UhciDumpQh (
**/
VOID
UhciDumpTds (
- IN UHCI_TD_SW *TdSw
+ IN UHCI_TD_SW *TdSw
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c
index fb97326dc0..bd9703dd13 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
/**
Map address of request structure buffer.
@@ -24,10 +23,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
UhciMapUserRequest (
- IN USB_HC_DEV *Uhc,
- IN OUT VOID *Request,
- OUT UINT8 **MappedAddr,
- OUT VOID **Map
+ IN USB_HC_DEV *Uhc,
+ IN OUT VOID *Request,
+ OUT UINT8 **MappedAddr,
+ OUT VOID **Map
)
{
EFI_STATUS Status;
@@ -45,13 +44,12 @@ UhciMapUserRequest (
);
if (!EFI_ERROR (Status)) {
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
}
return Status;
}
-
/**
Map address of user data buffer.
@@ -84,65 +82,64 @@ UhciMapUserData (
Status = EFI_SUCCESS;
switch (Direction) {
- case EfiUsbDataIn:
- //
- // BusMasterWrite means cpu read
- //
- *PktId = INPUT_PACKET_ID;
- Status = Uhc->PciIo->Map (
- Uhc->PciIo,
- EfiPciIoOperationBusMasterWrite,
- Data,
- Len,
- &PhyAddr,
- Map
- );
-
- if (EFI_ERROR (Status)) {
- goto EXIT;
- }
-
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
- break;
-
- case EfiUsbDataOut:
- *PktId = OUTPUT_PACKET_ID;
- Status = Uhc->PciIo->Map (
- Uhc->PciIo,
- EfiPciIoOperationBusMasterRead,
- Data,
- Len,
- &PhyAddr,
- Map
- );
-
- if (EFI_ERROR (Status)) {
- goto EXIT;
- }
-
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
- break;
-
- case EfiUsbNoData:
- if ((Len != NULL) && (*Len != 0)) {
- Status = EFI_INVALID_PARAMETER;
- goto EXIT;
- }
-
- *PktId = OUTPUT_PACKET_ID;
- *MappedAddr = NULL;
- *Map = NULL;
- break;
-
- default:
- Status = EFI_INVALID_PARAMETER;
+ case EfiUsbDataIn:
+ //
+ // BusMasterWrite means cpu read
+ //
+ *PktId = INPUT_PACKET_ID;
+ Status = Uhc->PciIo->Map (
+ Uhc->PciIo,
+ EfiPciIoOperationBusMasterWrite,
+ Data,
+ Len,
+ &PhyAddr,
+ Map
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto EXIT;
+ }
+
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
+ break;
+
+ case EfiUsbDataOut:
+ *PktId = OUTPUT_PACKET_ID;
+ Status = Uhc->PciIo->Map (
+ Uhc->PciIo,
+ EfiPciIoOperationBusMasterRead,
+ Data,
+ Len,
+ &PhyAddr,
+ Map
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto EXIT;
+ }
+
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
+ break;
+
+ case EfiUsbNoData:
+ if ((Len != NULL) && (*Len != 0)) {
+ Status = EFI_INVALID_PARAMETER;
+ goto EXIT;
+ }
+
+ *PktId = OUTPUT_PACKET_ID;
+ *MappedAddr = NULL;
+ *Map = NULL;
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
EXIT:
return Status;
}
-
/**
Link the TD To QH.
@@ -153,9 +150,9 @@ EXIT:
**/
VOID
UhciLinkTdToQh (
- IN USB_HC_DEV *Uhc,
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td
)
{
EFI_PHYSICAL_ADDRESS PhyAddr;
@@ -165,10 +162,9 @@ UhciLinkTdToQh (
ASSERT ((Qh != NULL) && (Td != NULL));
Qh->QhHw.VerticalLink = QH_VLINK (PhyAddr, FALSE);
- Qh->TDs = (VOID *) Td;
+ Qh->TDs = (VOID *)Td;
}
-
/**
Unlink TD from the QH.
@@ -178,8 +174,8 @@ UhciLinkTdToQh (
**/
VOID
UhciUnlinkTdFromQh (
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td
)
{
ASSERT ((Qh != NULL) && (Td != NULL));
@@ -188,7 +184,6 @@ UhciUnlinkTdFromQh (
Qh->TDs = NULL;
}
-
/**
Append a new TD To the previous TD.
@@ -199,9 +194,9 @@ UhciUnlinkTdFromQh (
**/
VOID
UhciAppendTd (
- IN USB_HC_DEV *Uhc,
- IN UHCI_TD_SW *PrevTd,
- IN UHCI_TD_SW *ThisTd
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_TD_SW *PrevTd,
+ IN UHCI_TD_SW *ThisTd
)
{
EFI_PHYSICAL_ADDRESS PhyAddr;
@@ -211,10 +206,9 @@ UhciAppendTd (
ASSERT ((PrevTd != NULL) && (ThisTd != NULL));
PrevTd->TdHw.NextLink = TD_LINK (PhyAddr, TRUE, FALSE);
- PrevTd->NextTd = (VOID *) ThisTd;
+ PrevTd->NextTd = (VOID *)ThisTd;
}
-
/**
Delete a list of TDs.
@@ -226,23 +220,22 @@ UhciAppendTd (
**/
VOID
UhciDestoryTds (
- IN USB_HC_DEV *Uhc,
- IN UHCI_TD_SW *FirstTd
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_TD_SW *FirstTd
)
{
- UHCI_TD_SW *NextTd;
- UHCI_TD_SW *ThisTd;
+ UHCI_TD_SW *NextTd;
+ UHCI_TD_SW *ThisTd;
NextTd = FirstTd;
while (NextTd != NULL) {
- ThisTd = NextTd;
- NextTd = ThisTd->NextTd;
+ ThisTd = NextTd;
+ NextTd = ThisTd->NextTd;
UsbHcFreeMem (Uhc->MemPool, ThisTd, sizeof (UHCI_TD_SW));
}
}
-
/**
Create an initialize a new queue head.
@@ -254,11 +247,11 @@ UhciDestoryTds (
**/
UHCI_QH_SW *
UhciCreateQh (
- IN USB_HC_DEV *Uhc,
- IN UINTN Interval
+ IN USB_HC_DEV *Uhc,
+ IN UINTN Interval
)
{
- UHCI_QH_SW *Qh;
+ UHCI_QH_SW *Qh;
Qh = UsbHcAllocateMem (Uhc->MemPool, sizeof (UHCI_QH_SW));
@@ -268,14 +261,13 @@ UhciCreateQh (
Qh->QhHw.HorizonLink = QH_HLINK (NULL, TRUE);
Qh->QhHw.VerticalLink = QH_VLINK (NULL, TRUE);
- Qh->Interval = UhciConvertPollRate(Interval);
+ Qh->Interval = UhciConvertPollRate (Interval);
Qh->TDs = NULL;
Qh->NextQh = NULL;
return Qh;
}
-
/**
Create and intialize a TD.
@@ -286,12 +278,12 @@ UhciCreateQh (
**/
UHCI_TD_SW *
UhciCreateTd (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
- UHCI_TD_SW *Td;
+ UHCI_TD_SW *Td;
- Td = UsbHcAllocateMem (Uhc->MemPool, sizeof (UHCI_TD_SW));
+ Td = UsbHcAllocateMem (Uhc->MemPool, sizeof (UHCI_TD_SW));
if (Td == NULL) {
return NULL;
}
@@ -304,7 +296,6 @@ UhciCreateTd (
return Td;
}
-
/**
Create and initialize a TD for Setup Stage of a control transfer.
@@ -319,14 +310,14 @@ UhciCreateTd (
**/
UHCI_TD_SW *
UhciCreateSetupTd (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 *Request,
- IN UINT8 *RequestPhy,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 *Request,
+ IN UINT8 *RequestPhy,
+ IN BOOLEAN IsLow
)
{
- UHCI_TD_SW *Td;
+ UHCI_TD_SW *Td;
Td = UhciCreateTd (Uhc);
@@ -344,17 +335,16 @@ UhciCreateSetupTd (
Td->TdHw.EndPoint = 0;
Td->TdHw.LowSpeed = IsLow ? 1 : 0;
Td->TdHw.DeviceAddr = DevAddr & 0x7F;
- Td->TdHw.MaxPacketLen = (UINT32) (sizeof (EFI_USB_DEVICE_REQUEST) - 1);
+ Td->TdHw.MaxPacketLen = (UINT32)(sizeof (EFI_USB_DEVICE_REQUEST) - 1);
Td->TdHw.PidCode = SETUP_PACKET_ID;
- Td->TdHw.DataBuffer = (UINT32) (UINTN) RequestPhy;
+ Td->TdHw.DataBuffer = (UINT32)(UINTN)RequestPhy;
- Td->Data = Request;
- Td->DataLen = (UINT16) sizeof (EFI_USB_DEVICE_REQUEST);
+ Td->Data = Request;
+ Td->DataLen = (UINT16)sizeof (EFI_USB_DEVICE_REQUEST);
return Td;
}
-
/**
Create a TD for data.
@@ -373,15 +363,15 @@ UhciCreateSetupTd (
**/
UHCI_TD_SW *
UhciCreateDataTd (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 *DataPtr,
- IN UINT8 *DataPhyPtr,
- IN UINTN Len,
- IN UINT8 PktId,
- IN UINT8 Toggle,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 *DataPtr,
+ IN UINT8 *DataPhyPtr,
+ IN UINTN Len,
+ IN UINT8 PktId,
+ IN UINT8 Toggle,
+ IN BOOLEAN IsLow
)
{
UHCI_TD_SW *Td;
@@ -391,7 +381,7 @@ UhciCreateDataTd (
//
ASSERT (Len <= 0x500);
- Td = UhciCreateTd (Uhc);
+ Td = UhciCreateTd (Uhc);
if (Td == NULL) {
return NULL;
@@ -407,17 +397,16 @@ UhciCreateDataTd (
Td->TdHw.DataToggle = Toggle & 0x01;
Td->TdHw.EndPoint = Endpoint & 0x0F;
Td->TdHw.DeviceAddr = DevAddr & 0x7F;
- Td->TdHw.MaxPacketLen = (UINT32) (Len - 1);
- Td->TdHw.PidCode = (UINT8) PktId;
- Td->TdHw.DataBuffer = (UINT32) (UINTN) DataPhyPtr;
+ Td->TdHw.MaxPacketLen = (UINT32)(Len - 1);
+ Td->TdHw.PidCode = (UINT8)PktId;
+ Td->TdHw.DataBuffer = (UINT32)(UINTN)DataPhyPtr;
- Td->Data = DataPtr;
- Td->DataLen = (UINT16) Len;
+ Td->Data = DataPtr;
+ Td->DataLen = (UINT16)Len;
return Td;
}
-
/**
Create TD for the Status Stage of control transfer.
@@ -431,13 +420,13 @@ UhciCreateDataTd (
**/
UHCI_TD_SW *
UhciCreateStatusTd (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 PktId,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 PktId,
+ IN BOOLEAN IsLow
)
{
- UHCI_TD_SW *Td;
+ UHCI_TD_SW *Td;
Td = UhciCreateTd (Uhc);
@@ -451,21 +440,20 @@ UhciCreateStatusTd (
Td->TdHw.IntOnCpl = FALSE;
Td->TdHw.ErrorCount = 0x03;
Td->TdHw.Status |= USBTD_ACTIVE;
- Td->TdHw.MaxPacketLen = 0x7FF; //0x7FF: there is no data (refer to UHCI spec)
+ Td->TdHw.MaxPacketLen = 0x7FF; // 0x7FF: there is no data (refer to UHCI spec)
Td->TdHw.DataToggle = 1;
Td->TdHw.EndPoint = 0;
Td->TdHw.LowSpeed = IsLow ? 1 : 0;
Td->TdHw.DeviceAddr = DevAddr & 0x7F;
- Td->TdHw.PidCode = (UINT8) PktId;
- Td->TdHw.DataBuffer = (UINT32) (UINTN) NULL;
+ Td->TdHw.PidCode = (UINT8)PktId;
+ Td->TdHw.DataBuffer = (UINT32)(UINTN)NULL;
- Td->Data = NULL;
- Td->DataLen = 0;
+ Td->Data = NULL;
+ Td->DataLen = 0;
return Td;
}
-
/**
Create Tds list for Control Transfer.
@@ -485,27 +473,26 @@ UhciCreateStatusTd (
**/
UHCI_TD_SW *
UhciCreateCtrlTds (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DeviceAddr,
- IN UINT8 DataPktId,
- IN UINT8 *Request,
- IN UINT8 *RequestPhy,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN UINT8 MaxPacket,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DeviceAddr,
+ IN UINT8 DataPktId,
+ IN UINT8 *Request,
+ IN UINT8 *RequestPhy,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN UINT8 MaxPacket,
+ IN BOOLEAN IsLow
)
{
- UHCI_TD_SW *SetupTd;
- UHCI_TD_SW *FirstDataTd;
- UHCI_TD_SW *DataTd;
- UHCI_TD_SW *PrevDataTd;
- UHCI_TD_SW *StatusTd;
- UINT8 DataToggle;
- UINT8 StatusPktId;
- UINTN ThisTdLen;
-
+ UHCI_TD_SW *SetupTd;
+ UHCI_TD_SW *FirstDataTd;
+ UHCI_TD_SW *DataTd;
+ UHCI_TD_SW *PrevDataTd;
+ UHCI_TD_SW *StatusTd;
+ UINT8 DataToggle;
+ UINT8 StatusPktId;
+ UINTN ThisTdLen;
DataTd = NULL;
SetupTd = NULL;
@@ -537,8 +524,8 @@ UhciCreateCtrlTds (
Uhc,
DeviceAddr,
0,
- Data, //cpu memory address
- DataPhy, //Pci memory address
+ Data, // cpu memory address
+ DataPhy, // Pci memory address
ThisTdLen,
DataPktId,
DataToggle,
@@ -557,10 +544,10 @@ UhciCreateCtrlTds (
}
DataToggle ^= 1;
- PrevDataTd = DataTd;
- Data += ThisTdLen;
- DataPhy += ThisTdLen;
- DataLen -= ThisTdLen;
+ PrevDataTd = DataTd;
+ Data += ThisTdLen;
+ DataPhy += ThisTdLen;
+ DataLen -= ThisTdLen;
}
//
@@ -602,7 +589,6 @@ FREE_TD:
return NULL;
}
-
/**
Create Tds list for Bulk/Interrupt Transfer.
@@ -622,22 +608,22 @@ FREE_TD:
**/
UHCI_TD_SW *
UhciCreateBulkOrIntTds (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 EndPoint,
- IN UINT8 PktId,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN OUT UINT8 *DataToggle,
- IN UINT8 MaxPacket,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EndPoint,
+ IN UINT8 PktId,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN OUT UINT8 *DataToggle,
+ IN UINT8 MaxPacket,
+ IN BOOLEAN IsLow
)
{
- UHCI_TD_SW *DataTd;
- UHCI_TD_SW *FirstDataTd;
- UHCI_TD_SW *PrevDataTd;
- UINTN ThisTdLen;
+ UHCI_TD_SW *DataTd;
+ UHCI_TD_SW *FirstDataTd;
+ UHCI_TD_SW *PrevDataTd;
+ UINTN ThisTdLen;
DataTd = NULL;
FirstDataTd = NULL;
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h
index 594ea28ee8..a0f483de56 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.h
@@ -30,9 +30,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
(((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \
((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0))
-#define LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
+#define LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
-#define UHCI_ADDR(QhOrTd) ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))
+#define UHCI_ADDR(QhOrTd) ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))
#pragma pack(1)
//
@@ -41,8 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// This is the same as frame list entry.
//
typedef struct {
- UINT32 HorizonLink;
- UINT32 VerticalLink;
+ UINT32 HorizonLink;
+ UINT32 VerticalLink;
} UHCI_QH_HW;
//
@@ -50,23 +50,23 @@ typedef struct {
// Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1
//
typedef struct {
- UINT32 NextLink;
- UINT32 ActualLen : 11;
- UINT32 Reserved1 : 5;
- UINT32 Status : 8;
- UINT32 IntOnCpl : 1;
- UINT32 IsIsoch : 1;
- UINT32 LowSpeed : 1;
- UINT32 ErrorCount : 2;
- UINT32 ShortPacket : 1;
- UINT32 Reserved2 : 2;
- UINT32 PidCode : 8;
- UINT32 DeviceAddr : 7;
- UINT32 EndPoint : 4;
- UINT32 DataToggle : 1;
- UINT32 Reserved3 : 1;
- UINT32 MaxPacketLen: 11;
- UINT32 DataBuffer;
+ UINT32 NextLink;
+ UINT32 ActualLen : 11;
+ UINT32 Reserved1 : 5;
+ UINT32 Status : 8;
+ UINT32 IntOnCpl : 1;
+ UINT32 IsIsoch : 1;
+ UINT32 LowSpeed : 1;
+ UINT32 ErrorCount : 2;
+ UINT32 ShortPacket : 1;
+ UINT32 Reserved2 : 2;
+ UINT32 PidCode : 8;
+ UINT32 DeviceAddr : 7;
+ UINT32 EndPoint : 4;
+ UINT32 DataToggle : 1;
+ UINT32 Reserved3 : 1;
+ UINT32 MaxPacketLen : 11;
+ UINT32 DataBuffer;
} UHCI_TD_HW;
#pragma pack()
@@ -74,20 +74,19 @@ typedef struct _UHCI_TD_SW UHCI_TD_SW;
typedef struct _UHCI_QH_SW UHCI_QH_SW;
struct _UHCI_QH_SW {
- UHCI_QH_HW QhHw;
- UHCI_QH_SW *NextQh;
- UHCI_TD_SW *TDs;
- UINTN Interval;
+ UHCI_QH_HW QhHw;
+ UHCI_QH_SW *NextQh;
+ UHCI_TD_SW *TDs;
+ UINTN Interval;
};
struct _UHCI_TD_SW {
- UHCI_TD_HW TdHw;
- UHCI_TD_SW *NextTd;
- UINT8 *Data;
- UINT16 DataLen;
+ UHCI_TD_HW TdHw;
+ UHCI_TD_SW *NextTd;
+ UINT8 *Data;
+ UINT16 DataLen;
};
-
/**
Link the TD To QH.
@@ -98,12 +97,11 @@ struct _UHCI_TD_SW {
**/
VOID
UhciLinkTdToQh (
- IN USB_HC_DEV *Uhc,
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td
);
-
/**
Unlink TD from the QH.
@@ -115,11 +113,10 @@ UhciLinkTdToQh (
**/
VOID
UhciUnlinkTdFromQh (
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td
);
-
/**
Map address of request structure buffer.
@@ -134,13 +131,12 @@ UhciUnlinkTdFromQh (
**/
EFI_STATUS
UhciMapUserRequest (
- IN USB_HC_DEV *Uhc,
- IN OUT VOID *Request,
- OUT UINT8 **MappedAddr,
- OUT VOID **Map
+ IN USB_HC_DEV *Uhc,
+ IN OUT VOID *Request,
+ OUT UINT8 **MappedAddr,
+ OUT VOID **Map
);
-
/**
Map address of user data buffer.
@@ -167,7 +163,6 @@ UhciMapUserData (
OUT VOID **Map
);
-
/**
Delete a list of TDs.
@@ -179,11 +174,10 @@ UhciMapUserData (
**/
VOID
UhciDestoryTds (
- IN USB_HC_DEV *Uhc,
- IN UHCI_TD_SW *FirstTd
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_TD_SW *FirstTd
);
-
/**
Create an initialize a new queue head.
@@ -195,11 +189,10 @@ UhciDestoryTds (
**/
UHCI_QH_SW *
UhciCreateQh (
- IN USB_HC_DEV *Uhc,
- IN UINTN Interval
+ IN USB_HC_DEV *Uhc,
+ IN UINTN Interval
);
-
/**
Create Tds list for Control Transfer.
@@ -219,19 +212,18 @@ UhciCreateQh (
**/
UHCI_TD_SW *
UhciCreateCtrlTds (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DeviceAddr,
- IN UINT8 DataPktId,
- IN UINT8 *Request,
- IN UINT8 *RequestPhy,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN UINT8 MaxPacket,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DeviceAddr,
+ IN UINT8 DataPktId,
+ IN UINT8 *Request,
+ IN UINT8 *RequestPhy,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN UINT8 MaxPacket,
+ IN BOOLEAN IsLow
);
-
/**
Create Tds list for Bulk/Interrupt Transfer.
@@ -251,16 +243,16 @@ UhciCreateCtrlTds (
**/
UHCI_TD_SW *
UhciCreateBulkOrIntTds (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 EndPoint,
- IN UINT8 PktId,
- IN UINT8 *Data,
- IN UINT8 *DataPhy,
- IN UINTN DataLen,
- IN OUT UINT8 *DataToggle,
- IN UINT8 MaxPacket,
- IN BOOLEAN IsLow
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EndPoint,
+ IN UINT8 PktId,
+ IN UINT8 *Data,
+ IN UINT8 *DataPhy,
+ IN UINTN DataLen,
+ IN OUT UINT8 *DataToggle,
+ IN UINT8 MaxPacket,
+ IN BOOLEAN IsLow
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c
index 44bcde4c4e..9aa138fa46 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
/**
Read a UHCI register.
@@ -21,21 +20,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT16
UhciReadReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset
)
{
UINT16 Data;
EFI_STATUS Status;
Status = PciIo->Io.Read (
- PciIo,
- EfiPciIoWidthUint16,
- USB_BAR_INDEX,
- Offset,
- 1,
- &Data
- );
+ PciIo,
+ EfiPciIoWidthUint16,
+ USB_BAR_INDEX,
+ Offset,
+ 1,
+ &Data
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset));
@@ -46,7 +45,6 @@ UhciReadReg (
return Data;
}
-
/**
Write data to UHCI register.
@@ -57,28 +55,27 @@ UhciReadReg (
**/
VOID
UhciWriteReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Data
)
{
EFI_STATUS Status;
Status = PciIo->Io.Write (
- PciIo,
- EfiPciIoWidthUint16,
- USB_BAR_INDEX,
- Offset,
- 1,
- &Data
- );
+ PciIo,
+ EfiPciIoWidthUint16,
+ USB_BAR_INDEX,
+ Offset,
+ 1,
+ &Data
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset));
}
}
-
/**
Set a bit of the UHCI Register.
@@ -89,19 +86,18 @@ UhciWriteReg (
**/
VOID
UhciSetRegBit (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Bit
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Bit
)
{
UINT16 Data;
Data = UhciReadReg (PciIo, Offset);
- Data = (UINT16) (Data |Bit);
+ Data = (UINT16)(Data |Bit);
UhciWriteReg (PciIo, Offset, Data);
}
-
/**
Clear a bit of the UHCI Register.
@@ -112,19 +108,18 @@ UhciSetRegBit (
**/
VOID
UhciClearRegBit (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Bit
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Bit
)
{
UINT16 Data;
Data = UhciReadReg (PciIo, Offset);
- Data = (UINT16) (Data & ~Bit);
+ Data = (UINT16)(Data & ~Bit);
UhciWriteReg (PciIo, Offset, Data);
}
-
/**
Clear all the interrutp status bits, these bits
are Write-Clean.
@@ -134,7 +129,7 @@ UhciClearRegBit (
**/
VOID
UhciAckAllInterrupt (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
UhciWriteReg (Uhc->PciIo, USBSTS_OFFSET, 0x3F);
@@ -149,7 +144,6 @@ UhciAckAllInterrupt (
}
}
-
/**
Stop the host controller.
@@ -162,12 +156,12 @@ UhciAckAllInterrupt (
**/
EFI_STATUS
UhciStopHc (
- IN USB_HC_DEV *Uhc,
- IN UINTN Timeout
+ IN USB_HC_DEV *Uhc,
+ IN UINTN Timeout
)
{
- UINT16 UsbSts;
- UINTN Index;
+ UINT16 UsbSts;
+ UINTN Index;
UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_RS);
@@ -188,7 +182,6 @@ UhciStopHc (
return EFI_TIMEOUT;
}
-
/**
Check whether the host controller operates well.
@@ -200,10 +193,10 @@ UhciStopHc (
**/
BOOLEAN
UhciIsHcWorking (
- IN EFI_PCI_IO_PROTOCOL *PciIo
+ IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
- UINT16 UsbSts;
+ UINT16 UsbSts;
UsbSts = UhciReadReg (PciIo, USBSTS_OFFSET);
@@ -215,7 +208,6 @@ UhciIsHcWorking (
return TRUE;
}
-
/**
Set the UHCI frame list base address. It can't use
UhciWriteReg which access memory in UINT16.
@@ -226,20 +218,20 @@ UhciIsHcWorking (
**/
VOID
UhciSetFrameListBaseAddr (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN VOID *Addr
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN VOID *Addr
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
- Data = (UINT32) ((UINTN) Addr & 0xFFFFF000);
+ Data = (UINT32)((UINTN)Addr & 0xFFFFF000);
Status = PciIo->Io.Write (
PciIo,
EfiPciIoWidthUint32,
USB_BAR_INDEX,
- (UINT64) USB_FRAME_BASE_OFFSET,
+ (UINT64)USB_FRAME_BASE_OFFSET,
1,
&Data
);
@@ -249,7 +241,6 @@ UhciSetFrameListBaseAddr (
}
}
-
/**
Disable USB Emulation.
@@ -258,10 +249,10 @@ UhciSetFrameListBaseAddr (
**/
VOID
UhciTurnOffUsbEmulation (
- IN EFI_PCI_IO_PROTOCOL *PciIo
+ IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
- UINT16 Command;
+ UINT16 Command;
Command = 0;
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
index b39dcbbbec..84e2d1bd2a 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
@@ -14,42 +14,42 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// UHCI register offset
//
-#define UHCI_FRAME_NUM 1024
+#define UHCI_FRAME_NUM 1024
//
// Register offset and PCI related staff
//
-#define USB_BAR_INDEX 4
+#define USB_BAR_INDEX 4
-#define USBCMD_OFFSET 0
-#define USBSTS_OFFSET 2
-#define USBINTR_OFFSET 4
-#define USBPORTSC_OFFSET 0x10
-#define USB_FRAME_NO_OFFSET 6
-#define USB_FRAME_BASE_OFFSET 8
-#define USB_EMULATION_OFFSET 0xC0
+#define USBCMD_OFFSET 0
+#define USBSTS_OFFSET 2
+#define USBINTR_OFFSET 4
+#define USBPORTSC_OFFSET 0x10
+#define USB_FRAME_NO_OFFSET 6
+#define USB_FRAME_BASE_OFFSET 8
+#define USB_EMULATION_OFFSET 0xC0
//
// Packet IDs
//
-#define SETUP_PACKET_ID 0x2D
-#define INPUT_PACKET_ID 0x69
-#define OUTPUT_PACKET_ID 0xE1
-#define ERROR_PACKET_ID 0x55
+#define SETUP_PACKET_ID 0x2D
+#define INPUT_PACKET_ID 0x69
+#define OUTPUT_PACKET_ID 0xE1
+#define ERROR_PACKET_ID 0x55
//
// USB port status and control bit definition.
//
-#define USBPORTSC_CCS BIT0 // Current Connect Status
-#define USBPORTSC_CSC BIT1 // Connect Status Change
-#define USBPORTSC_PED BIT2 // Port Enable / Disable
-#define USBPORTSC_PEDC BIT3 // Port Enable / Disable Change
-#define USBPORTSC_LSL BIT4 // Line Status Low BIT
-#define USBPORTSC_LSH BIT5 // Line Status High BIT
-#define USBPORTSC_RD BIT6 // Resume Detect
-#define USBPORTSC_LSDA BIT8 // Low Speed Device Attached
-#define USBPORTSC_PR BIT9 // Port Reset
-#define USBPORTSC_SUSP BIT12 // Suspend
+#define USBPORTSC_CCS BIT0 // Current Connect Status
+#define USBPORTSC_CSC BIT1 // Connect Status Change
+#define USBPORTSC_PED BIT2 // Port Enable / Disable
+#define USBPORTSC_PEDC BIT3 // Port Enable / Disable Change
+#define USBPORTSC_LSL BIT4 // Line Status Low BIT
+#define USBPORTSC_LSH BIT5 // Line Status High BIT
+#define USBPORTSC_RD BIT6 // Resume Detect
+#define USBPORTSC_LSDA BIT8 // Low Speed Device Attached
+#define USBPORTSC_PR BIT9 // Port Reset
+#define USBPORTSC_SUSP BIT12 // Suspend
//
// UHCI Spec said it must implement 2 ports each host at least,
@@ -61,33 +61,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Command register bit definitions
//
-#define USBCMD_RS BIT0 // Run/Stop
-#define USBCMD_HCRESET BIT1 // Host reset
-#define USBCMD_GRESET BIT2 // Global reset
-#define USBCMD_EGSM BIT3 // Global Suspend Mode
-#define USBCMD_FGR BIT4 // Force Global Resume
-#define USBCMD_SWDBG BIT5 // SW Debug mode
-#define USBCMD_CF BIT6 // Config Flag (sw only)
-#define USBCMD_MAXP BIT7 // Max Packet (0 = 32, 1 = 64)
+#define USBCMD_RS BIT0 // Run/Stop
+#define USBCMD_HCRESET BIT1 // Host reset
+#define USBCMD_GRESET BIT2 // Global reset
+#define USBCMD_EGSM BIT3 // Global Suspend Mode
+#define USBCMD_FGR BIT4 // Force Global Resume
+#define USBCMD_SWDBG BIT5 // SW Debug mode
+#define USBCMD_CF BIT6 // Config Flag (sw only)
+#define USBCMD_MAXP BIT7 // Max Packet (0 = 32, 1 = 64)
//
// USB Status register bit definitions
//
-#define USBSTS_USBINT BIT0 // Interrupt due to IOC
-#define USBSTS_ERROR BIT1 // Interrupt due to error
-#define USBSTS_RD BIT2 // Resume Detect
-#define USBSTS_HSE BIT3 // Host System Error
-#define USBSTS_HCPE BIT4 // Host Controller Process Error
-#define USBSTS_HCH BIT5 // HC Halted
-
-#define USBTD_ACTIVE BIT7 // TD is still active
-#define USBTD_STALLED BIT6 // TD is stalled
-#define USBTD_BUFFERR BIT5 // Buffer underflow or overflow
-#define USBTD_BABBLE BIT4 // Babble condition
-#define USBTD_NAK BIT3 // NAK is received
-#define USBTD_CRC BIT2 // CRC/Time out error
-#define USBTD_BITSTUFF BIT1 // Bit stuff error
-
+#define USBSTS_USBINT BIT0 // Interrupt due to IOC
+#define USBSTS_ERROR BIT1 // Interrupt due to error
+#define USBSTS_RD BIT2 // Resume Detect
+#define USBSTS_HSE BIT3 // Host System Error
+#define USBSTS_HCPE BIT4 // Host Controller Process Error
+#define USBSTS_HCH BIT5 // HC Halted
+
+#define USBTD_ACTIVE BIT7 // TD is still active
+#define USBTD_STALLED BIT6 // TD is stalled
+#define USBTD_BUFFERR BIT5 // Buffer underflow or overflow
+#define USBTD_BABBLE BIT4 // Babble condition
+#define USBTD_NAK BIT3 // NAK is received
+#define USBTD_CRC BIT2 // CRC/Time out error
+#define USBTD_BITSTUFF BIT1 // Bit stuff error
/**
Read a UHCI register.
@@ -100,12 +99,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT16
UhciReadReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset
);
-
-
/**
Write data to UHCI register.
@@ -118,13 +115,11 @@ UhciReadReg (
**/
VOID
UhciWriteReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Data
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Data
);
-
-
/**
Set a bit of the UHCI Register.
@@ -137,13 +132,11 @@ UhciWriteReg (
**/
VOID
UhciSetRegBit (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Bit
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Bit
);
-
-
/**
Clear a bit of the UHCI Register.
@@ -156,12 +149,11 @@ UhciSetRegBit (
**/
VOID
UhciClearRegBit (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT16 Bit
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT32 Offset,
+ IN UINT16 Bit
);
-
/**
Clear all the interrutp status bits, these bits
are Write-Clean.
@@ -173,10 +165,9 @@ UhciClearRegBit (
**/
VOID
UhciAckAllInterrupt (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
);
-
/**
Stop the host controller.
@@ -189,12 +180,10 @@ UhciAckAllInterrupt (
**/
EFI_STATUS
UhciStopHc (
- IN USB_HC_DEV *Uhc,
- IN UINTN Timeout
+ IN USB_HC_DEV *Uhc,
+ IN UINTN Timeout
);
-
-
/**
Check whether the host controller operates well.
@@ -206,10 +195,9 @@ UhciStopHc (
**/
BOOLEAN
UhciIsHcWorking (
- IN EFI_PCI_IO_PROTOCOL *PciIo
+ IN EFI_PCI_IO_PROTOCOL *PciIo
);
-
/**
Set the UHCI frame list base address. It can't use
UhciWriteReg which access memory in UINT16.
@@ -222,11 +210,10 @@ UhciIsHcWorking (
**/
VOID
UhciSetFrameListBaseAddr (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN VOID *Addr
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN VOID *Addr
);
-
/**
Disable USB Emulation.
@@ -237,6 +224,7 @@ UhciSetFrameListBaseAddr (
**/
VOID
UhciTurnOffUsbEmulation (
- IN EFI_PCI_IO_PROTOCOL *PciIo
+ IN EFI_PCI_IO_PROTOCOL *PciIo
);
+
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
index 0829bc2a8c..c08f949696 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
/**
Create Frame List Structure.
@@ -22,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
UhciInitFrameList (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
EFI_PHYSICAL_ADDRESS MappedAddr;
@@ -70,14 +69,14 @@ UhciInitFrameList (
goto ON_ERROR;
}
- Uhc->FrameBase = (UINT32 *) (UINTN) Buffer;
- Uhc->FrameMapping = Mapping;
+ Uhc->FrameBase = (UINT32 *)(UINTN)Buffer;
+ Uhc->FrameMapping = Mapping;
//
// Tell the Host Controller where the Frame List lies,
// by set the Frame List Base Address Register.
//
- UhciSetFrameListBaseAddr (Uhc->PciIo, (VOID *) (UINTN) MappedAddr);
+ UhciSetFrameListBaseAddr (Uhc->PciIo, (VOID *)(UINTN)MappedAddr);
//
// Allocate the QH used by sync interrupt/control/bulk transfer.
@@ -85,9 +84,9 @@ UhciInitFrameList (
// can be reclaimed. Notice, LS don't support bulk transfer and
// also doesn't support BW reclamation.
//
- Uhc->SyncIntQh = UhciCreateQh (Uhc, 1);
- Uhc->CtrlQh = UhciCreateQh (Uhc, 1);
- Uhc->BulkQh = UhciCreateQh (Uhc, 1);
+ Uhc->SyncIntQh = UhciCreateQh (Uhc, 1);
+ Uhc->CtrlQh = UhciCreateQh (Uhc, 1);
+ Uhc->BulkQh = UhciCreateQh (Uhc, 1);
if ((Uhc->SyncIntQh == NULL) || (Uhc->CtrlQh == NULL) || (Uhc->BulkQh == NULL)) {
Uhc->PciIo->Unmap (Uhc->PciIo, Mapping);
@@ -102,22 +101,22 @@ UhciInitFrameList (
// Each frame entry is linked to this sequence of QH. These QH
// will remain on the schedul, never got removed
//
- PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->CtrlQh, sizeof (UHCI_QH_HW));
- Uhc->SyncIntQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
- Uhc->SyncIntQh->NextQh = Uhc->CtrlQh;
+ PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->CtrlQh, sizeof (UHCI_QH_HW));
+ Uhc->SyncIntQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
+ Uhc->SyncIntQh->NextQh = Uhc->CtrlQh;
- PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->BulkQh, sizeof (UHCI_QH_HW));
- Uhc->CtrlQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
- Uhc->CtrlQh->NextQh = Uhc->BulkQh;
+ PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->BulkQh, sizeof (UHCI_QH_HW));
+ Uhc->CtrlQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
+ Uhc->CtrlQh->NextQh = Uhc->BulkQh;
//
// Some old platform such as Intel's Tiger 4 has a difficult time
// in supporting the full speed bandwidth reclamation in the previous
// mentioned form. Most new platforms don't suffer it.
//
- Uhc->BulkQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
+ Uhc->BulkQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
- Uhc->BulkQh->NextQh = NULL;
+ Uhc->BulkQh->NextQh = NULL;
Uhc->FrameBaseHostAddr = AllocateZeroPool (4096);
if (Uhc->FrameBaseHostAddr == NULL) {
@@ -127,7 +126,7 @@ UhciInitFrameList (
PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->SyncIntQh, sizeof (UHCI_QH_HW));
for (Index = 0; Index < UHCI_FRAME_NUM; Index++) {
- Uhc->FrameBase[Index] = QH_HLINK (PhyAddr, FALSE);
+ Uhc->FrameBase[Index] = QH_HLINK (PhyAddr, FALSE);
Uhc->FrameBaseHostAddr[Index] = (UINT32)(UINTN)Uhc->SyncIntQh;
}
@@ -150,7 +149,6 @@ ON_ERROR:
return Status;
}
-
/**
Destory FrameList buffer.
@@ -159,7 +157,7 @@ ON_ERROR:
**/
VOID
UhciDestoryFrameList (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
//
@@ -172,7 +170,7 @@ UhciDestoryFrameList (
Uhc->PciIo->FreeBuffer (
Uhc->PciIo,
EFI_SIZE_TO_PAGES (4096),
- (VOID *) Uhc->FrameBase
+ (VOID *)Uhc->FrameBase
);
if (Uhc->FrameBaseHostAddr != NULL) {
@@ -191,14 +189,13 @@ UhciDestoryFrameList (
UsbHcFreeMem (Uhc->MemPool, Uhc->BulkQh, sizeof (UHCI_QH_SW));
}
- Uhc->FrameBase = NULL;
- Uhc->FrameBaseHostAddr = NULL;
- Uhc->SyncIntQh = NULL;
- Uhc->CtrlQh = NULL;
- Uhc->BulkQh = NULL;
+ Uhc->FrameBase = NULL;
+ Uhc->FrameBaseHostAddr = NULL;
+ Uhc->SyncIntQh = NULL;
+ Uhc->CtrlQh = NULL;
+ Uhc->BulkQh = NULL;
}
-
/**
Convert the poll rate to the maxium 2^n that is smaller
than Interval.
@@ -210,10 +207,10 @@ UhciDestoryFrameList (
**/
UINTN
UhciConvertPollRate (
- IN UINTN Interval
+ IN UINTN Interval
)
{
- UINTN BitCount;
+ UINTN BitCount;
ASSERT (Interval != 0);
@@ -230,7 +227,6 @@ UhciConvertPollRate (
return (UINTN)1 << (BitCount - 1);
}
-
/**
Link a queue head (for asynchronous interrupt transfer) to
the frame list.
@@ -241,15 +237,15 @@ UhciConvertPollRate (
**/
VOID
UhciLinkQhToFrameList (
- USB_HC_DEV *Uhc,
- UHCI_QH_SW *Qh
+ USB_HC_DEV *Uhc,
+ UHCI_QH_SW *Qh
)
{
- UINTN Index;
- UHCI_QH_SW *Prev;
- UHCI_QH_SW *Next;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_PHYSICAL_ADDRESS QhPciAddr;
+ UINTN Index;
+ UHCI_QH_SW *Prev;
+ UHCI_QH_SW *Next;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_PHYSICAL_ADDRESS QhPciAddr;
ASSERT ((Uhc->FrameBase != NULL) && (Qh != NULL));
@@ -261,8 +257,8 @@ UhciLinkQhToFrameList (
// heads on the frame list
//
ASSERT (!LINK_TERMINATED (Uhc->FrameBase[Index]));
- Next = (UHCI_QH_SW*)(UINTN)Uhc->FrameBaseHostAddr[Index];
- Prev = NULL;
+ Next = (UHCI_QH_SW *)(UINTN)Uhc->FrameBaseHostAddr[Index];
+ Prev = NULL;
//
// Now, insert the queue head (Qh) into this frame:
@@ -279,8 +275,8 @@ UhciLinkQhToFrameList (
// rate is correct.
//
while (Next->Interval > Qh->Interval) {
- Prev = Next;
- Next = Next->NextQh;
+ Prev = Next;
+ Next = Next->NextQh;
ASSERT (Next != NULL);
}
@@ -305,15 +301,15 @@ UhciLinkQhToFrameList (
//
ASSERT ((Index == 0) && (Qh->NextQh == NULL));
- Prev = Next;
- Next = Next->NextQh;
+ Prev = Next;
+ Next = Next->NextQh;
- Qh->NextQh = Next;
- Prev->NextQh = Qh;
+ Qh->NextQh = Next;
+ Prev->NextQh = Qh;
- Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
+ Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
- Prev->QhHw.HorizonLink = QH_HLINK (QhPciAddr, FALSE);
+ Prev->QhHw.HorizonLink = QH_HLINK (QhPciAddr, FALSE);
break;
}
@@ -323,22 +319,21 @@ UhciLinkQhToFrameList (
// guarranted by 2^n polling interval.
//
if (Qh->NextQh == NULL) {
- Qh->NextQh = Next;
- PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Next, sizeof (UHCI_QH_HW));
- Qh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
+ Qh->NextQh = Next;
+ PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Next, sizeof (UHCI_QH_HW));
+ Qh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
}
if (Prev == NULL) {
- Uhc->FrameBase[Index] = QH_HLINK (QhPciAddr, FALSE);
- Uhc->FrameBaseHostAddr[Index] = (UINT32)(UINTN)Qh;
+ Uhc->FrameBase[Index] = QH_HLINK (QhPciAddr, FALSE);
+ Uhc->FrameBaseHostAddr[Index] = (UINT32)(UINTN)Qh;
} else {
- Prev->NextQh = Qh;
- Prev->QhHw.HorizonLink = QH_HLINK (QhPciAddr, FALSE);
+ Prev->NextQh = Qh;
+ Prev->QhHw.HorizonLink = QH_HLINK (QhPciAddr, FALSE);
}
}
}
-
/**
Unlink QH from the frame list is easier: find all
the precedence node, and pointer there next to QhSw's
@@ -350,13 +345,13 @@ UhciLinkQhToFrameList (
**/
VOID
UhciUnlinkQhFromFrameList (
- USB_HC_DEV *Uhc,
- UHCI_QH_SW *Qh
+ USB_HC_DEV *Uhc,
+ UHCI_QH_SW *Qh
)
{
- UINTN Index;
- UHCI_QH_SW *Prev;
- UHCI_QH_SW *This;
+ UINTN Index;
+ UHCI_QH_SW *Prev;
+ UHCI_QH_SW *This;
ASSERT ((Uhc->FrameBase != NULL) && (Qh != NULL));
@@ -366,16 +361,16 @@ UhciUnlinkQhFromFrameList (
// queue heads on the frame list
//
ASSERT (!LINK_TERMINATED (Uhc->FrameBase[Index]));
- This = (UHCI_QH_SW*)(UINTN)Uhc->FrameBaseHostAddr[Index];
- Prev = NULL;
+ This = (UHCI_QH_SW *)(UINTN)Uhc->FrameBaseHostAddr[Index];
+ Prev = NULL;
//
// Walk through the frame's QH list to find the
// queue head to remove
//
while ((This != NULL) && (This != Qh)) {
- Prev = This;
- This = This->NextQh;
+ Prev = This;
+ This = This->NextQh;
}
//
@@ -390,16 +385,15 @@ UhciUnlinkQhFromFrameList (
//
// Qh is the first entry in the frame
//
- Uhc->FrameBase[Index] = Qh->QhHw.HorizonLink;
- Uhc->FrameBaseHostAddr[Index] = (UINT32)(UINTN)Qh->NextQh;
+ Uhc->FrameBase[Index] = Qh->QhHw.HorizonLink;
+ Uhc->FrameBaseHostAddr[Index] = (UINT32)(UINTN)Qh->NextQh;
} else {
- Prev->NextQh = Qh->NextQh;
- Prev->QhHw.HorizonLink = Qh->QhHw.HorizonLink;
+ Prev->NextQh = Qh->NextQh;
+ Prev->QhHw.HorizonLink = Qh->QhHw.HorizonLink;
}
}
}
-
/**
Check TDs Results.
@@ -413,18 +407,18 @@ UhciUnlinkQhFromFrameList (
**/
BOOLEAN
UhciCheckTdStatus (
- IN USB_HC_DEV *Uhc,
- IN UHCI_TD_SW *Td,
- IN BOOLEAN IsLow,
- OUT UHCI_QH_RESULT *QhResult
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_TD_SW *Td,
+ IN BOOLEAN IsLow,
+ OUT UHCI_QH_RESULT *QhResult
)
{
- UINTN Len;
- UINT8 State;
- UHCI_TD_HW *TdHw;
- BOOLEAN Finished;
+ UINTN Len;
+ UINT8 State;
+ UHCI_TD_HW *TdHw;
+ BOOLEAN Finished;
- Finished = TRUE;
+ Finished = TRUE;
//
// Initialize the data toggle to that of the first
@@ -457,7 +451,6 @@ UhciCheckTdStatus (
if ((State & USBTD_STALLED) != 0) {
if ((State & USBTD_BABBLE) != 0) {
QhResult->Result |= EFI_USB_ERR_BABBLE;
-
} else if (TdHw->ErrorCount != 0) {
QhResult->Result |= EFI_USB_ERR_STALL;
}
@@ -480,7 +473,6 @@ UhciCheckTdStatus (
Finished = TRUE;
goto ON_EXIT;
-
} else if ((State & USBTD_ACTIVE) != 0) {
//
// The TD is still active, no need to check further.
@@ -489,14 +481,13 @@ UhciCheckTdStatus (
Finished = FALSE;
goto ON_EXIT;
-
} else {
//
// Update the next data toggle, it is always the
// next to the last known-good TD's data toggle if
// any TD is executed OK
//
- QhResult->NextToggle = (UINT8) (1 - (UINT8)TdHw->DataToggle);
+ QhResult->NextToggle = (UINT8)(1 - (UINT8)TdHw->DataToggle);
//
// This TD is finished OK or met short packet read. Update the
@@ -530,7 +521,7 @@ ON_EXIT:
//
if (!UhciIsHcWorking (Uhc->PciIo)) {
QhResult->Result |= EFI_USB_ERR_SYSTEM;
- Finished = TRUE;
+ Finished = TRUE;
}
if (Finished) {
@@ -541,7 +532,6 @@ ON_EXIT:
return Finished;
}
-
/**
Check the result of the transfer.
@@ -558,19 +548,19 @@ ON_EXIT:
**/
EFI_STATUS
UhciExecuteTransfer (
- IN USB_HC_DEV *Uhc,
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td,
- IN UINTN TimeOut,
- IN BOOLEAN IsLow,
- OUT UHCI_QH_RESULT *QhResult
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td,
+ IN UINTN TimeOut,
+ IN BOOLEAN IsLow,
+ OUT UHCI_QH_RESULT *QhResult
)
{
- UINTN Index;
- UINTN Delay;
- BOOLEAN Finished;
- EFI_STATUS Status;
- BOOLEAN InfiniteLoop;
+ UINTN Index;
+ UINTN Delay;
+ BOOLEAN Finished;
+ EFI_STATUS Status;
+ BOOLEAN InfiniteLoop;
Finished = FALSE;
Status = EFI_SUCCESS;
@@ -605,7 +595,6 @@ UhciExecuteTransfer (
UhciDumpTds (Td);
Status = EFI_TIMEOUT;
-
} else if (QhResult->Result != EFI_USB_NOERROR) {
DEBUG ((DEBUG_ERROR, "UhciExecuteTransfer: execution failed with result %x\n", QhResult->Result));
UhciDumpQh (Qh);
@@ -617,7 +606,6 @@ UhciExecuteTransfer (
return Status;
}
-
/**
Update Async Request, QH and TDs.
@@ -635,12 +623,12 @@ UhciUpdateAsyncReq (
IN UINT32 NextToggle
)
{
- UHCI_QH_SW *Qh;
- UHCI_TD_SW *FirstTd;
- UHCI_TD_SW *Td;
+ UHCI_QH_SW *Qh;
+ UHCI_TD_SW *FirstTd;
+ UHCI_TD_SW *Td;
- Qh = AsyncReq->QhSw;
- FirstTd = AsyncReq->FirstTd;
+ Qh = AsyncReq->QhSw;
+ FirstTd = AsyncReq->FirstTd;
if (Result == EFI_USB_NOERROR) {
//
@@ -659,11 +647,10 @@ UhciUpdateAsyncReq (
}
UhciLinkTdToQh (Uhc, Qh, FirstTd);
- return ;
+ return;
}
}
-
/**
Create Async Request node, and Link to List.
@@ -699,7 +686,7 @@ UhciCreateAsyncReq (
IN BOOLEAN IsLow
)
{
- UHCI_ASYNC_REQUEST *AsyncReq;
+ UHCI_ASYNC_REQUEST *AsyncReq;
AsyncReq = AllocatePool (sizeof (UHCI_ASYNC_REQUEST));
@@ -710,17 +697,17 @@ UhciCreateAsyncReq (
//
// Fill Request field. Data is allocated host memory, not mapped
//
- AsyncReq->Signature = UHCI_ASYNC_INT_SIGNATURE;
- AsyncReq->DevAddr = DevAddr;
- AsyncReq->EndPoint = EndPoint;
- AsyncReq->DataLen = DataLen;
- AsyncReq->Interval = UhciConvertPollRate(Interval);
- AsyncReq->Data = Data;
- AsyncReq->Callback = Callback;
- AsyncReq->Context = Context;
- AsyncReq->QhSw = Qh;
- AsyncReq->FirstTd = FirstTd;
- AsyncReq->IsLow = IsLow;
+ AsyncReq->Signature = UHCI_ASYNC_INT_SIGNATURE;
+ AsyncReq->DevAddr = DevAddr;
+ AsyncReq->EndPoint = EndPoint;
+ AsyncReq->DataLen = DataLen;
+ AsyncReq->Interval = UhciConvertPollRate (Interval);
+ AsyncReq->Data = Data;
+ AsyncReq->Callback = Callback;
+ AsyncReq->Context = Context;
+ AsyncReq->QhSw = Qh;
+ AsyncReq->FirstTd = FirstTd;
+ AsyncReq->IsLow = IsLow;
//
// Insert the new interrupt transfer to the head of the list.
@@ -733,7 +720,6 @@ UhciCreateAsyncReq (
return EFI_SUCCESS;
}
-
/**
Free an asynchronous request's resource such as memory.
@@ -743,8 +729,8 @@ UhciCreateAsyncReq (
**/
VOID
UhciFreeAsyncReq (
- IN USB_HC_DEV *Uhc,
- IN UHCI_ASYNC_REQUEST *AsyncReq
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_ASYNC_REQUEST *AsyncReq
)
{
ASSERT ((Uhc != NULL) && (AsyncReq != NULL));
@@ -759,7 +745,6 @@ UhciFreeAsyncReq (
gBS->FreePool (AsyncReq);
}
-
/**
Unlink an asynchronous request's from UHC's asynchronus list.
also remove the queue head from the frame list. If FreeNow,
@@ -775,9 +760,9 @@ UhciFreeAsyncReq (
**/
VOID
UhciUnlinkAsyncReq (
- IN USB_HC_DEV *Uhc,
- IN UHCI_ASYNC_REQUEST *AsyncReq,
- IN BOOLEAN FreeNow
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_ASYNC_REQUEST *AsyncReq,
+ IN BOOLEAN FreeNow
)
{
ASSERT ((Uhc != NULL) && (AsyncReq != NULL));
@@ -793,12 +778,11 @@ UhciUnlinkAsyncReq (
// then add AsyncReq to UHC's recycle list
//
AsyncReq->QhSw->QhHw.VerticalLink = QH_VLINK (NULL, TRUE);
- AsyncReq->Recycle = Uhc->RecycleWait;
- Uhc->RecycleWait = AsyncReq;
+ AsyncReq->Recycle = Uhc->RecycleWait;
+ Uhc->RecycleWait = AsyncReq;
}
}
-
/**
Delete Async Interrupt QH and TDs.
@@ -814,10 +798,10 @@ UhciUnlinkAsyncReq (
**/
EFI_STATUS
UhciRemoveAsyncReq (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 EndPoint,
- OUT UINT8 *Toggle
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EndPoint,
+ OUT UINT8 *Toggle
)
{
EFI_STATUS Status;
@@ -842,14 +826,13 @@ UhciRemoveAsyncReq (
Link = Uhc->AsyncIntList.ForwardLink;
do {
- AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Link);
- Link = Link->ForwardLink;
+ AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Link);
+ Link = Link->ForwardLink;
if ((AsyncReq->DevAddr == DevAddr) && (AsyncReq->EndPoint == EndPoint)) {
Found = TRUE;
break;
}
-
} while (Link != &(Uhc->AsyncIntList));
if (!Found) {
@@ -870,7 +853,6 @@ UhciRemoveAsyncReq (
return Status;
}
-
/**
Recycle the asynchronouse request. When a queue head
is unlinked from frame list, host controller hardware
@@ -889,26 +871,24 @@ UhciRemoveAsyncReq (
**/
VOID
UhciRecycleAsyncReq (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
- UHCI_ASYNC_REQUEST *Req;
- UHCI_ASYNC_REQUEST *Next;
+ UHCI_ASYNC_REQUEST *Req;
+ UHCI_ASYNC_REQUEST *Next;
Req = Uhc->Recycle;
while (Req != NULL) {
Next = Req->Recycle;
UhciFreeAsyncReq (Uhc, Req);
- Req = Next;
+ Req = Next;
}
Uhc->Recycle = Uhc->RecycleWait;
Uhc->RecycleWait = NULL;
}
-
-
/**
Release all the asynchronous transfers on the lsit.
@@ -917,11 +897,11 @@ UhciRecycleAsyncReq (
**/
VOID
UhciFreeAllAsyncReq (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
)
{
- LIST_ENTRY *Head;
- UHCI_ASYNC_REQUEST *AsyncReq;
+ LIST_ENTRY *Head;
+ UHCI_ASYNC_REQUEST *AsyncReq;
//
// Call UhciRecycleAsyncReq twice. The requests on Recycle
@@ -938,12 +918,11 @@ UhciFreeAllAsyncReq (
}
while (!IsListEmpty (Head)) {
- AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Head->ForwardLink);
+ AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Head->ForwardLink);
UhciUnlinkAsyncReq (Uhc, AsyncReq, TRUE);
}
}
-
/**
Interrupt transfer periodic check handler.
@@ -954,18 +933,18 @@ UhciFreeAllAsyncReq (
VOID
EFIAPI
UhciMonitorAsyncReqList (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- UHCI_ASYNC_REQUEST *AsyncReq;
- LIST_ENTRY *Link;
- USB_HC_DEV *Uhc;
- VOID *Data;
- BOOLEAN Finished;
- UHCI_QH_RESULT QhResult;
+ UHCI_ASYNC_REQUEST *AsyncReq;
+ LIST_ENTRY *Link;
+ USB_HC_DEV *Uhc;
+ VOID *Data;
+ BOOLEAN Finished;
+ UHCI_QH_RESULT QhResult;
- Uhc = (USB_HC_DEV *) Context;
+ Uhc = (USB_HC_DEV *)Context;
//
// Recycle the asynchronous requests expired, and promote
@@ -975,7 +954,7 @@ UhciMonitorAsyncReqList (
UhciRecycleAsyncReq (Uhc);
if (IsListEmpty (&(Uhc->AsyncIntList))) {
- return ;
+ return;
}
//
@@ -984,8 +963,8 @@ UhciMonitorAsyncReqList (
Link = Uhc->AsyncIntList.ForwardLink;
do {
- AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Link);
- Link = Link->ForwardLink;
+ AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Link);
+ Link = Link->ForwardLink;
Finished = UhciCheckTdStatus (Uhc, AsyncReq->FirstTd, AsyncReq->IsLow, &QhResult);
@@ -1004,7 +983,7 @@ UhciMonitorAsyncReqList (
Data = AllocatePool (QhResult.Complete);
if (Data == NULL) {
- return ;
+ return;
}
CopyMem (Data, AsyncReq->FirstTd->Data, QhResult.Complete);
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h
index 5bcfad5c6c..2112d13200 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_UHCI_SCHED_H_
#define _EFI_UHCI_SCHED_H_
-
#define UHCI_ASYNC_INT_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'a')
//
// The failure mask for USB transfer return status. If any of
@@ -23,7 +22,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_USB_ERR_TIMEOUT | EFI_USB_ERR_BITSTUFF | \
EFI_USB_ERR_SYSTEM)
-
//
// Structure to return the result of UHCI QH execution.
// Result is the final result of the QH's QTD. NextToggle
@@ -31,49 +29,48 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// length of data transferred.
//
typedef struct {
- UINT32 Result;
- UINT8 NextToggle;
- UINTN Complete;
+ UINT32 Result;
+ UINT8 NextToggle;
+ UINTN Complete;
} UHCI_QH_RESULT;
-typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;
+typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;
//
// Structure used to manager the asynchronous interrupt transfers.
//
-struct _UHCI_ASYNC_REQUEST{
- UINTN Signature;
- LIST_ENTRY Link;
- UHCI_ASYNC_REQUEST *Recycle;
+struct _UHCI_ASYNC_REQUEST {
+ UINTN Signature;
+ LIST_ENTRY Link;
+ UHCI_ASYNC_REQUEST *Recycle;
//
// Endpoint attributes
//
- UINT8 DevAddr;
- UINT8 EndPoint;
- BOOLEAN IsLow;
- UINTN Interval;
+ UINT8 DevAddr;
+ UINT8 EndPoint;
+ BOOLEAN IsLow;
+ UINTN Interval;
//
// Data and UHC structures
//
- UHCI_QH_SW *QhSw;
- UHCI_TD_SW *FirstTd;
- UINT8 *Data; // Allocated host memory, not mapped memory
- UINTN DataLen;
- VOID *Mapping;
+ UHCI_QH_SW *QhSw;
+ UHCI_TD_SW *FirstTd;
+ UINT8 *Data; // Allocated host memory, not mapped memory
+ UINTN DataLen;
+ VOID *Mapping;
//
// User callback and its context
//
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
- VOID *Context;
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
+ VOID *Context;
};
#define UHCI_ASYNC_INT_FROM_LINK(a) \
CR (a, UHCI_ASYNC_REQUEST, Link, UHCI_ASYNC_INT_SIGNATURE)
-
/**
Create Frame List Structure.
@@ -86,7 +83,7 @@ struct _UHCI_ASYNC_REQUEST{
**/
EFI_STATUS
UhciInitFrameList (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
);
/**
@@ -99,10 +96,9 @@ UhciInitFrameList (
**/
VOID
UhciDestoryFrameList (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
);
-
/**
Convert the poll rate to the maxium 2^n that is smaller
than Interval.
@@ -114,10 +110,9 @@ UhciDestoryFrameList (
**/
UINTN
UhciConvertPollRate (
- IN UINTN Interval
+ IN UINTN Interval
);
-
/**
Link a queue head (for asynchronous interrupt transfer) to
the frame list.
@@ -128,11 +123,10 @@ UhciConvertPollRate (
**/
VOID
UhciLinkQhToFrameList (
- USB_HC_DEV *Uhc,
- UHCI_QH_SW *Qh
+ USB_HC_DEV *Uhc,
+ UHCI_QH_SW *Qh
);
-
/**
Unlink QH from the frame list is easier: find all
the precedence node, and pointer there next to QhSw's
@@ -144,11 +138,10 @@ UhciLinkQhToFrameList (
**/
VOID
UhciUnlinkQhFromFrameList (
- USB_HC_DEV *Uhc,
- UHCI_QH_SW *Qh
+ USB_HC_DEV *Uhc,
+ UHCI_QH_SW *Qh
);
-
/**
Check the result of the transfer.
@@ -165,15 +158,14 @@ UhciUnlinkQhFromFrameList (
**/
EFI_STATUS
UhciExecuteTransfer (
- IN USB_HC_DEV *Uhc,
- IN UHCI_QH_SW *Qh,
- IN UHCI_TD_SW *Td,
- IN UINTN TimeOut,
- IN BOOLEAN IsLow,
- OUT UHCI_QH_RESULT *QhResult
+ IN USB_HC_DEV *Uhc,
+ IN UHCI_QH_SW *Qh,
+ IN UHCI_TD_SW *Td,
+ IN UINTN TimeOut,
+ IN BOOLEAN IsLow,
+ OUT UHCI_QH_RESULT *QhResult
);
-
/**
Create Async Request node, and Link to List.
@@ -209,7 +201,6 @@ UhciCreateAsyncReq (
IN BOOLEAN IsLow
);
-
/**
Delete Async Interrupt QH and TDs.
@@ -225,13 +216,12 @@ UhciCreateAsyncReq (
**/
EFI_STATUS
UhciRemoveAsyncReq (
- IN USB_HC_DEV *Uhc,
- IN UINT8 DevAddr,
- IN UINT8 EndPoint,
- OUT UINT8 *Toggle
+ IN USB_HC_DEV *Uhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EndPoint,
+ OUT UINT8 *Toggle
);
-
/**
Release all the asynchronous transfers on the lsit.
@@ -242,10 +232,9 @@ UhciRemoveAsyncReq (
**/
VOID
UhciFreeAllAsyncReq (
- IN USB_HC_DEV *Uhc
+ IN USB_HC_DEV *Uhc
);
-
/**
Interrupt transfer periodic check handler.
@@ -258,8 +247,8 @@ UhciFreeAllAsyncReq (
VOID
EFIAPI
UhciMonitorAsyncReqList (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c
index a8c098f9c3..d6b9615e49 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "Uhci.h"
-
/**
Allocate a block of memory to be used by the buffer pool.
@@ -21,17 +20,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USBHC_MEM_BLOCK *
UsbHcAllocMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Pages
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Pages
)
{
- USBHC_MEM_BLOCK *Block;
- EFI_PCI_IO_PROTOCOL *PciIo;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- UINTN Bytes;
- EFI_STATUS Status;
+ USBHC_MEM_BLOCK *Block;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ UINTN Bytes;
+ EFI_STATUS Status;
PciIo = Pool->PciIo;
@@ -46,9 +45,9 @@ UsbHcAllocMemBlock (
//
ASSERT (USBHC_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
- Block->Bits = AllocateZeroPool (Block->BitsLen);
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
+ Block->Bits = AllocateZeroPool (Block->BitsLen);
if (Block->Bits == NULL) {
gBS->FreePool (Block);
@@ -72,7 +71,7 @@ UsbHcAllocMemBlock (
goto FREE_BITARRAY;
}
- Bytes = EFI_PAGES_TO_SIZE (Pages);
+ Bytes = EFI_PAGES_TO_SIZE (Pages);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
@@ -95,9 +94,9 @@ UsbHcAllocMemBlock (
goto FREE_BUFFER;
}
- Block->BufHost = BufHost;
- Block->Buf = (UINT8 *) ((UINTN) MappedAddr);
- Block->Mapping = Mapping;
+ Block->BufHost = BufHost;
+ Block->Buf = (UINT8 *)((UINTN)MappedAddr);
+ Block->Mapping = Mapping;
return Block;
@@ -110,7 +109,6 @@ FREE_BITARRAY:
return NULL;
}
-
/**
Free the memory block from the memory pool.
@@ -120,11 +118,11 @@ FREE_BITARRAY:
**/
VOID
UsbHcFreeMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_POOL *Pool,
+ IN USBHC_MEM_BLOCK *Block
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -140,7 +138,6 @@ UsbHcFreeMemBlock (
gBS->FreePool (Block);
}
-
/**
Alloc some memory from the block.
@@ -153,22 +150,22 @@ UsbHcFreeMemBlock (
**/
VOID *
UsbHcAllocMemFromBlock (
- IN USBHC_MEM_BLOCK *Block,
- IN UINTN Units
+ IN USBHC_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -184,13 +181,12 @@ UsbHcAllocMemFromBlock (
}
NEXT_BIT (Byte, Bit);
-
} else {
NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -201,13 +197,13 @@ UsbHcAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -225,16 +221,16 @@ UsbHcAllocMemFromBlock (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINTN AllocSize;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINTN Offset;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINTN AllocSize;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -248,7 +244,7 @@ UsbHcGetPciAddressForHostMem (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
+ if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
@@ -257,8 +253,8 @@ UsbHcGetPciAddressForHostMem (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *)Mem - Block->BufHost;
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
+ Offset = (UINT8 *)Mem - Block->BufHost;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
}
@@ -271,8 +267,8 @@ UsbHcGetPciAddressForHostMem (
**/
VOID
UsbHcInsertMemBlockToPool (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -280,7 +276,6 @@ UsbHcInsertMemBlockToPool (
Head->Next = Block;
}
-
/**
Is the memory block empty?
@@ -292,10 +287,10 @@ UsbHcInsertMemBlockToPool (
**/
BOOLEAN
UsbHcIsMemBlockEmpty (
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Block
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -306,7 +301,6 @@ UsbHcIsMemBlockEmpty (
return TRUE;
}
-
/**
Unlink the memory block from the pool's list.
@@ -316,11 +310,11 @@ UsbHcIsMemBlockEmpty (
**/
VOID
UsbHcUnlinkMemBlock (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *BlockToUnlink
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *BlockToUnlink
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT ((Head != NULL) && (BlockToUnlink != NULL));
@@ -333,7 +327,6 @@ UsbHcUnlinkMemBlock (
}
}
-
/**
Initialize the memory management pool for the host controller.
@@ -353,7 +346,7 @@ UsbHcInitMemPool (
IN UINT32 Which4G
)
{
- USBHC_MEM_POOL *Pool;
+ USBHC_MEM_POOL *Pool;
Pool = AllocatePool (sizeof (USBHC_MEM_POOL));
@@ -374,7 +367,6 @@ UsbHcInitMemPool (
return Pool;
}
-
/**
Release the memory management pool.
@@ -386,10 +378,10 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -408,7 +400,6 @@ UsbHcFreeMemPool (
return EFI_SUCCESS;
}
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -421,16 +412,16 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- USBHC_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -485,7 +476,6 @@ UsbHcAllocateMem (
return Mem;
}
-
/**
Free the allocated memory back to the memory pool.
@@ -496,22 +486,22 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -522,8 +512,8 @@ UsbHcFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / USBHC_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -531,7 +521,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -554,5 +544,5 @@ UsbHcFreeMem (
UsbHcFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h b/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h
index d202669c11..6644cc4d97 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UsbHcMem.h
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_EHCI_MEM_H_
#define _EFI_EHCI_MEM_H_
-#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
+#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
#define USB_HC_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
@@ -18,16 +18,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_HC_HIGH_32BIT(Addr64) \
((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
-
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
struct _USBHC_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- USBHC_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ USBHC_MEM_BLOCK *Next;
};
//
@@ -36,16 +35,16 @@ struct _USBHC_MEM_BLOCK {
// data to be on the same 4G memory.
//
typedef struct _USBHC_MEM_POOL {
- EFI_PCI_IO_PROTOCOL *PciIo;
- BOOLEAN Check4G;
- UINT32 Which4G;
- USBHC_MEM_BLOCK *Head;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ BOOLEAN Check4G;
+ UINT32 Which4G;
+ USBHC_MEM_BLOCK *Head;
} USBHC_MEM_POOL;
//
// Memory allocation unit, must be 2^n, n>4
//
-#define USBHC_MEM_UNIT 64
+#define USBHC_MEM_UNIT 64
#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
#define USBHC_MEM_DEFAULT_PAGES 16
@@ -64,7 +63,6 @@ typedef struct _USBHC_MEM_POOL {
} \
} while (0)
-
/**
Initialize the memory management pool for the host controller.
@@ -84,7 +82,6 @@ UsbHcInitMemPool (
IN UINT32 Which4G
);
-
/**
Release the memory management pool.
@@ -96,11 +93,9 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
);
-
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -113,12 +108,10 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
);
-
-
/**
Free the allocated memory back to the memory pool.
@@ -131,9 +124,9 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -147,9 +140,9 @@ UsbHcFreeMem (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddressForHostMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/UhciPei/DmaMem.c b/MdeModulePkg/Bus/Pci/UhciPei/DmaMem.c
index 91e5bf5678..c6ef129235 100644
--- a/MdeModulePkg/Bus/Pci/UhciPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Pci/UhciPei/DmaMem.c
@@ -39,8 +39,8 @@ IoMmuMap (
OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
+ EFI_STATUS Status;
+ UINT64 Attribute;
if (IoMmu != NULL) {
Status = IoMmu->Map (
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -82,10 +84,11 @@ IoMmuMap (
return Status;
}
} else {
- *DeviceAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,8 +101,8 @@ IoMmuMap (
**/
VOID
IoMmuUnmap (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN VOID *Mapping
)
{
if (IoMmu != NULL) {
@@ -140,9 +143,9 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
- *Mapping = NULL;
+ *Mapping = NULL;
if (IoMmu != NULL) {
Status = IoMmu->AllocateBuffer (
@@ -157,19 +160,20 @@ IoMmuAllocateBuffer (
}
NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
- Status = IoMmu->Map (
- IoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
*HostAddress = NULL;
return EFI_OUT_OF_RESOURCES;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -178,7 +182,7 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
IoMmu->Unmap (IoMmu, *Mapping);
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
- *Mapping = NULL;
+ *Mapping = NULL;
*HostAddress = NULL;
return Status;
}
@@ -191,15 +195,15 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *) (UINTN) HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
-
-
/**
Initialize IOMMU.
@@ -208,7 +212,7 @@ IoMmuAllocateBuffer (
**/
VOID
IoMmuInit (
- OUT EDKII_IOMMU_PPI **IoMmu
+ OUT EDKII_IOMMU_PPI **IoMmu
)
{
*IoMmu = NULL;
@@ -216,7 +220,6 @@ IoMmuInit (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
- (VOID **) IoMmu
+ (VOID **)IoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.c b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.c
index a05834da3c..96abf3ab13 100644
--- a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.c
+++ b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.c
@@ -22,15 +22,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
UhciStopHc (
- IN USB_UHC_DEV *Uhc,
- IN UINTN Timeout
+ IN USB_UHC_DEV *Uhc,
+ IN UINTN Timeout
)
{
- UINT16 CommandContent;
- UINT16 UsbSts;
- UINTN Index;
+ UINT16 CommandContent;
+ UINT16 UsbSts;
+ UINTN Index;
- CommandContent = USBReadPortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBCMD);
+ CommandContent = USBReadPortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBCMD);
CommandContent &= USBCMD_RS;
USBWritePortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBCMD, CommandContent);
@@ -70,7 +70,7 @@ UhcEndOfPei (
IN VOID *Ppi
)
{
- USB_UHC_DEV *Uhc;
+ USB_UHC_DEV *Uhc;
Uhc = PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -95,18 +95,18 @@ UhcEndOfPei (
EFI_STATUS
EFIAPI
UhcPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
- EFI_STATUS Status;
- UINT8 Index;
- UINTN ControllerType;
- UINTN BaseAddress;
- UINTN MemPages;
- USB_UHC_DEV *UhcDev;
- EFI_PHYSICAL_ADDRESS TempPtr;
+ PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINTN ControllerType;
+ UINTN BaseAddress;
+ UINTN MemPages;
+ USB_UHC_DEV *UhcDev;
+ EFI_PHYSICAL_ADDRESS TempPtr;
//
// Shadow this PEIM to run from memory
@@ -119,7 +119,7 @@ UhcPeimEntry (
&gPeiUsbControllerPpiGuid,
0,
NULL,
- (VOID **) &ChipSetUsbControllerPpi
+ (VOID **)&ChipSetUsbControllerPpi
);
//
// If failed to locate, it is a bug in dispather as depex has gPeiUsbControllerPpiGuid.
@@ -129,7 +129,7 @@ UhcPeimEntry (
Index = 0;
while (TRUE) {
Status = ChipSetUsbControllerPpi->GetUsbController (
- (EFI_PEI_SERVICES **) PeiServices,
+ (EFI_PEI_SERVICES **)PeiServices,
ChipSetUsbControllerPpi,
Index,
&ControllerType,
@@ -161,10 +161,10 @@ UhcPeimEntry (
return EFI_OUT_OF_RESOURCES;
}
- UhcDev = (USB_UHC_DEV *) ((UINTN) TempPtr);
- UhcDev->Signature = USB_UHC_DEV_SIGNATURE;
+ UhcDev = (USB_UHC_DEV *)((UINTN)TempPtr);
+ UhcDev->Signature = USB_UHC_DEV_SIGNATURE;
IoMmuInit (&UhcDev->IoMmu);
- UhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
+ UhcDev->UsbHostControllerBaseAddress = (UINT32)BaseAddress;
//
// Init local memory management service
@@ -182,12 +182,12 @@ UhcPeimEntry (
return Status;
}
- UhcDev->UsbHostControllerPpi.ControlTransfer = UhcControlTransfer;
- UhcDev->UsbHostControllerPpi.BulkTransfer = UhcBulkTransfer;
- UhcDev->UsbHostControllerPpi.GetRootHubPortNumber = UhcGetRootHubPortNumber;
- UhcDev->UsbHostControllerPpi.GetRootHubPortStatus = UhcGetRootHubPortStatus;
- UhcDev->UsbHostControllerPpi.SetRootHubPortFeature = UhcSetRootHubPortFeature;
- UhcDev->UsbHostControllerPpi.ClearRootHubPortFeature = UhcClearRootHubPortFeature;
+ UhcDev->UsbHostControllerPpi.ControlTransfer = UhcControlTransfer;
+ UhcDev->UsbHostControllerPpi.BulkTransfer = UhcBulkTransfer;
+ UhcDev->UsbHostControllerPpi.GetRootHubPortNumber = UhcGetRootHubPortNumber;
+ UhcDev->UsbHostControllerPpi.GetRootHubPortStatus = UhcGetRootHubPortStatus;
+ UhcDev->UsbHostControllerPpi.SetRootHubPortFeature = UhcSetRootHubPortFeature;
+ UhcDev->UsbHostControllerPpi.ClearRootHubPortFeature = UhcClearRootHubPortFeature;
UhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
UhcDev->PpiDescriptor.Guid = &gPeiUsbHostControllerPpiGuid;
@@ -199,8 +199,8 @@ UhcPeimEntry (
continue;
}
- UhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- UhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
+ UhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ UhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
UhcDev->EndOfPeiNotifyList.Notify = UhcEndOfPei;
PeiServicesNotifyPpi (&UhcDev->EndOfPeiNotifyList);
@@ -239,46 +239,47 @@ UhcPeimEntry (
EFI_STATUS
EFIAPI
UhcControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 DeviceSpeed,
- IN UINT8 MaximumPacketLength,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN EFI_USB_DATA_DIRECTION TransferDirection,
- IN OUT VOID *Data OPTIONAL,
- IN OUT UINTN *DataLength OPTIONAL,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
- )
-{
- USB_UHC_DEV *UhcDev;
- UINT32 StatusReg;
- UINT8 PktID;
- QH_STRUCT *PtrQH;
- TD_STRUCT *PtrTD;
- TD_STRUCT *PtrPreTD;
- TD_STRUCT *PtrSetupTD;
- TD_STRUCT *PtrStatusTD;
- EFI_STATUS Status;
- UINT32 DataLen;
- UINT8 DataToggle;
- UINT8 *RequestPhy;
- VOID *RequestMap;
- UINT8 *DataPhy;
- VOID *DataMap;
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ )
+{
+ USB_UHC_DEV *UhcDev;
+ UINT32 StatusReg;
+ UINT8 PktID;
+ QH_STRUCT *PtrQH;
+ TD_STRUCT *PtrTD;
+ TD_STRUCT *PtrPreTD;
+ TD_STRUCT *PtrSetupTD;
+ TD_STRUCT *PtrStatusTD;
+ EFI_STATUS Status;
+ UINT32 DataLen;
+ UINT8 DataToggle;
+ UINT8 *RequestPhy;
+ VOID *RequestMap;
+ UINT8 *DataPhy;
+ VOID *DataMap;
- UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
+ UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
- StatusReg = UhcDev->UsbHostControllerBaseAddress + USBSTS;
+ StatusReg = UhcDev->UsbHostControllerBaseAddress + USBSTS;
- PktID = INPUT_PACKET_ID;
+ PktID = INPUT_PACKET_ID;
- RequestMap = NULL;
+ RequestMap = NULL;
- if (Request == NULL || TransferResult == NULL) {
+ if ((Request == NULL) || (TransferResult == NULL)) {
return EFI_INVALID_PARAMETER;
}
+
//
// if errors exist that cause host controller halt,
// then return EFI_DEVICE_ERROR.
@@ -307,6 +308,7 @@ UhcControlTransfer (
if (RequestMap != NULL) {
IoMmuUnmap (UhcDev->IoMmu, RequestMap);
}
+
return Status;
}
@@ -321,9 +323,9 @@ UhcControlTransfer (
DeviceAddress,
0,
DeviceSpeed,
- (UINT8 *) Request,
+ (UINT8 *)Request,
RequestPhy,
- (UINT8) sizeof (EFI_USB_DEVICE_REQUEST),
+ (UINT8)sizeof (EFI_USB_DEVICE_REQUEST),
&PtrSetupTD
);
@@ -341,22 +343,22 @@ UhcControlTransfer (
if (TransferDirection == EfiUsbNoData) {
DataLen = 0;
} else {
- DataLen = (UINT32) *DataLength;
+ DataLen = (UINT32)*DataLength;
}
- DataToggle = 1;
+ DataToggle = 1;
- PtrTD = PtrSetupTD;
+ PtrTD = PtrSetupTD;
while (DataLen > 0) {
//
// create TD structures and link together
//
- UINT8 PacketSize;
+ UINT8 PacketSize;
//
// PacketSize is the data load size of each TD carries.
//
- PacketSize = (UINT8) DataLen;
+ PacketSize = (UINT8)DataLen;
if (DataLen > MaximumPacketLength) {
PacketSize = MaximumPacketLength;
}
@@ -381,9 +383,9 @@ UhcControlTransfer (
PtrPreTD = PtrTD;
DataToggle ^= 1;
- Data = (VOID *) ((UINT8 *) Data + PacketSize);
- DataPhy += PacketSize;
- DataLen -= PacketSize;
+ Data = (VOID *)((UINT8 *)Data + PacketSize);
+ DataPhy += PacketSize;
+ DataLen -= PacketSize;
}
//
@@ -399,6 +401,7 @@ UhcControlTransfer (
} else {
PktID = OUTPUT_PACKET_ID;
}
+
//
// create Status Stage TD structure
//
@@ -418,17 +421,17 @@ UhcControlTransfer (
// detail status is returned
//
Status = ExecuteControlTransfer (
- UhcDev,
- PtrSetupTD,
- DataLength,
- TimeOut,
- TransferResult
- );
+ UhcDev,
+ PtrSetupTD,
+ DataLength,
+ TimeOut,
+ TransferResult
+ );
//
// TRUE means must search other framelistindex
//
- SetQHVerticalValidorInvalid(PtrQH, FALSE);
+ SetQHVerticalValidorInvalid (PtrQH, FALSE);
DeleteQueuedTDs (UhcDev, PtrSetupTD);
//
@@ -436,7 +439,7 @@ UhcControlTransfer (
//
if (!IsStatusOK (UhcDev, StatusReg)) {
*TransferResult |= EFI_USB_ERR_SYSTEM;
- Status = EFI_DEVICE_ERROR;
+ Status = EFI_DEVICE_ERROR;
}
ClearStatusReg (UhcDev, StatusReg);
@@ -444,6 +447,7 @@ UhcControlTransfer (
if (DataMap != NULL) {
IoMmuUnmap (UhcDev->IoMmu, DataMap);
}
+
if (RequestMap != NULL) {
IoMmuUnmap (UhcDev->IoMmu, RequestMap);
}
@@ -483,42 +487,42 @@ UhcControlTransfer (
EFI_STATUS
EFIAPI
UhcBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 MaximumPacketLength,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
)
{
- USB_UHC_DEV *UhcDev;
- UINT32 StatusReg;
+ USB_UHC_DEV *UhcDev;
+ UINT32 StatusReg;
- UINT32 DataLen;
+ UINT32 DataLen;
- QH_STRUCT *PtrQH;
- TD_STRUCT *PtrFirstTD;
- TD_STRUCT *PtrTD;
- TD_STRUCT *PtrPreTD;
+ QH_STRUCT *PtrQH;
+ TD_STRUCT *PtrFirstTD;
+ TD_STRUCT *PtrTD;
+ TD_STRUCT *PtrPreTD;
- UINT8 PktID;
+ UINT8 PktID;
- BOOLEAN IsFirstTD;
+ BOOLEAN IsFirstTD;
- EFI_STATUS Status;
+ EFI_STATUS Status;
EFI_USB_DATA_DIRECTION TransferDirection;
- BOOLEAN ShortPacketEnable;
+ BOOLEAN ShortPacketEnable;
- UINT16 CommandContent;
+ UINT16 CommandContent;
- UINT8 *DataPhy;
- VOID *DataMap;
+ UINT8 *DataPhy;
+ VOID *DataMap;
UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
@@ -533,16 +537,16 @@ UhcBulkTransfer (
USBWritePortW (UhcDev, UhcDev->UsbHostControllerBaseAddress + USBCMD, CommandContent);
}
- StatusReg = UhcDev->UsbHostControllerBaseAddress + USBSTS;
+ StatusReg = UhcDev->UsbHostControllerBaseAddress + USBSTS;
//
// these code lines are added here per complier's strict demand
//
- PktID = INPUT_PACKET_ID;
- PtrTD = NULL;
- PtrFirstTD = NULL;
- PtrPreTD = NULL;
- DataLen = 0;
+ PktID = INPUT_PACKET_ID;
+ PtrTD = NULL;
+ PtrFirstTD = NULL;
+ PtrPreTD = NULL;
+ DataLen = 0;
ShortPacketEnable = FALSE;
@@ -554,15 +558,16 @@ UhcBulkTransfer (
return EFI_INVALID_PARAMETER;
}
- if (MaximumPacketLength != 8 && MaximumPacketLength != 16
- && MaximumPacketLength != 32 && MaximumPacketLength != 64) {
+ if ( (MaximumPacketLength != 8) && (MaximumPacketLength != 16)
+ && (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
+
//
// if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.
//
if (!IsStatusOK (UhcDev, StatusReg)) {
-
ClearStatusReg (UhcDev, StatusReg);
*TransferResult = EFI_USB_ERR_SYSTEM;
return EFI_DEVICE_ERROR;
@@ -586,7 +591,7 @@ UhcBulkTransfer (
return Status;
}
- DataLen = (UINT32) *DataLength;
+ DataLen = (UINT32)*DataLength;
PtrQH = UhcDev->BulkQH;
@@ -595,9 +600,9 @@ UhcBulkTransfer (
//
// create TD structures and link together
//
- UINT8 PacketSize;
+ UINT8 PacketSize;
- PacketSize = (UINT8) DataLen;
+ PacketSize = (UINT8)DataLen;
if (DataLen > MaximumPacketLength) {
PacketSize = MaximumPacketLength;
}
@@ -637,10 +642,11 @@ UhcBulkTransfer (
PtrPreTD = PtrTD;
*DataToggle ^= 1;
- Data = (VOID *) ((UINT8 *) Data + PacketSize);
- DataPhy += PacketSize;
- DataLen -= PacketSize;
+ Data = (VOID *)((UINT8 *)Data + PacketSize);
+ DataPhy += PacketSize;
+ DataLen -= PacketSize;
}
+
//
// link TD structures to QH structure
//
@@ -655,13 +661,13 @@ UhcBulkTransfer (
// of the last successful TD
//
Status = ExecBulkTransfer (
- UhcDev,
- PtrFirstTD,
- DataLength,
- DataToggle,
- TimeOut,
- TransferResult
- );
+ UhcDev,
+ PtrFirstTD,
+ DataLength,
+ DataToggle,
+ TimeOut,
+ TransferResult
+ );
//
// Delete Bulk transfer TD structure
@@ -673,7 +679,7 @@ UhcBulkTransfer (
//
if (!IsStatusOK (UhcDev, StatusReg)) {
*TransferResult |= EFI_USB_ERR_SYSTEM;
- Status = EFI_DEVICE_ERROR;
+ Status = EFI_DEVICE_ERROR;
}
ClearStatusReg (UhcDev, StatusReg);
@@ -700,15 +706,15 @@ UhcBulkTransfer (
EFI_STATUS
EFIAPI
UhcGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
)
{
- USB_UHC_DEV *UhcDev;
- UINT32 PSAddr;
- UINT16 RHPortControl;
- UINT32 Index;
+ USB_UHC_DEV *UhcDev;
+ UINT32 PSAddr;
+ UINT16 RHPortControl;
+ UINT32 Index;
UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
@@ -719,7 +725,7 @@ UhcGetRootHubPortNumber (
*PortNumber = 0;
for (Index = 0; Index < 2; Index++) {
- PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + Index * 2;
+ PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + Index * 2;
RHPortControl = USBReadPortW (UhcDev, PSAddr);
//
// Port Register content is valid
@@ -748,16 +754,16 @@ UhcGetRootHubPortNumber (
EFI_STATUS
EFIAPI
UhcGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- USB_UHC_DEV *UhcDev;
- UINT32 PSAddr;
- UINT16 RHPortStatus;
- UINT8 TotalPortNumber;
+ USB_UHC_DEV *UhcDev;
+ UINT32 PSAddr;
+ UINT16 RHPortStatus;
+ UINT8 TotalPortNumber;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
@@ -768,11 +774,11 @@ UhcGetRootHubPortStatus (
return EFI_INVALID_PARAMETER;
}
- UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
- PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
+ UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
+ PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
RHPortStatus = USBReadPortW (UhcDev, PSAddr);
@@ -782,30 +788,35 @@ UhcGetRootHubPortStatus (
if ((RHPortStatus & USBPORTSC_CCS) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_CONNECTION;
}
+
//
// Port Enabled/Disabled
//
if ((RHPortStatus & USBPORTSC_PED) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_ENABLE;
}
+
//
// Port Suspend
//
if ((RHPortStatus & USBPORTSC_SUSP) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
}
+
//
// Port Reset
//
if ((RHPortStatus & USBPORTSC_PR) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_RESET;
}
+
//
// Low Speed Device Attached
//
if ((RHPortStatus & USBPORTSC_LSDA) != 0) {
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
}
+
//
// Fill Port Status Change bits
//
@@ -815,6 +826,7 @@ UhcGetRootHubPortStatus (
if ((RHPortStatus & USBPORTSC_CSC) != 0) {
PortStatus->PortChangeStatus |= USB_PORT_STAT_C_CONNECTION;
}
+
//
// Port Enabled/Disabled Change
//
@@ -841,59 +853,59 @@ UhcGetRootHubPortStatus (
EFI_STATUS
EFIAPI
UhcSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_UHC_DEV *UhcDev;
- UINT32 PSAddr;
- UINT32 CommandRegAddr;
- UINT16 RHPortControl;
- UINT8 TotalPortNumber;
+ USB_UHC_DEV *UhcDev;
+ UINT32 PSAddr;
+ UINT32 CommandRegAddr;
+ UINT16 RHPortControl;
+ UINT8 TotalPortNumber;
UhcGetRootHubPortNumber (PeiServices, This, &TotalPortNumber);
if (PortNumber > TotalPortNumber) {
return EFI_INVALID_PARAMETER;
}
- UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
- PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
- CommandRegAddr = UhcDev->UsbHostControllerBaseAddress + USBCMD;
+ UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
+ PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
+ CommandRegAddr = UhcDev->UsbHostControllerBaseAddress + USBCMD;
RHPortControl = USBReadPortW (UhcDev, PSAddr);
switch (PortFeature) {
+ case EfiUsbPortSuspend:
+ if ((USBReadPortW (UhcDev, CommandRegAddr) & USBCMD_EGSM) == 0) {
+ //
+ // if global suspend is not active, can set port suspend
+ //
+ RHPortControl &= 0xfff5;
+ RHPortControl |= USBPORTSC_SUSP;
+ }
- case EfiUsbPortSuspend:
- if ((USBReadPortW (UhcDev, CommandRegAddr) & USBCMD_EGSM) == 0) {
+ break;
+
+ case EfiUsbPortReset:
+ RHPortControl &= 0xfff5;
+ RHPortControl |= USBPORTSC_PR;
//
- // if global suspend is not active, can set port suspend
+ // Set the reset bit
//
- RHPortControl &= 0xfff5;
- RHPortControl |= USBPORTSC_SUSP;
- }
- break;
-
- case EfiUsbPortReset:
- RHPortControl &= 0xfff5;
- RHPortControl |= USBPORTSC_PR;
- //
- // Set the reset bit
- //
- break;
+ break;
- case EfiUsbPortPower:
- break;
+ case EfiUsbPortPower:
+ break;
- case EfiUsbPortEnable:
- RHPortControl &= 0xfff5;
- RHPortControl |= USBPORTSC_PED;
- break;
+ case EfiUsbPortEnable:
+ RHPortControl &= 0xfff5;
+ RHPortControl |= USBPORTSC_PED;
+ break;
- default:
- return EFI_INVALID_PARAMETER;
+ default:
+ return EFI_INVALID_PARAMETER;
}
USBWritePortW (UhcDev, PSAddr, RHPortControl);
@@ -919,16 +931,16 @@ UhcSetRootHubPortFeature (
EFI_STATUS
EFIAPI
UhcClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_UHC_DEV *UhcDev;
- UINT32 PSAddr;
- UINT16 RHPortControl;
- UINT8 TotalPortNumber;
+ USB_UHC_DEV *UhcDev;
+ UINT32 PSAddr;
+ UINT16 RHPortControl;
+ UINT8 TotalPortNumber;
UhcGetRootHubPortNumber (PeiServices, This, &TotalPortNumber);
@@ -936,79 +948,79 @@ UhcClearRootHubPortFeature (
return EFI_INVALID_PARAMETER;
}
- UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
- PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
+ UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);
+ PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;
RHPortControl = USBReadPortW (UhcDev, PSAddr);
switch (PortFeature) {
- //
- // clear PORT_ENABLE feature means disable port.
- //
- case EfiUsbPortEnable:
- RHPortControl &= 0xfff5;
- RHPortControl &= ~USBPORTSC_PED;
- break;
+ //
+ // clear PORT_ENABLE feature means disable port.
+ //
+ case EfiUsbPortEnable:
+ RHPortControl &= 0xfff5;
+ RHPortControl &= ~USBPORTSC_PED;
+ break;
- //
- // clear PORT_SUSPEND feature means resume the port.
- // (cause a resume on the specified port if in suspend mode)
- //
- case EfiUsbPortSuspend:
- RHPortControl &= 0xfff5;
- RHPortControl &= ~USBPORTSC_SUSP;
- break;
+ //
+ // clear PORT_SUSPEND feature means resume the port.
+ // (cause a resume on the specified port if in suspend mode)
+ //
+ case EfiUsbPortSuspend:
+ RHPortControl &= 0xfff5;
+ RHPortControl &= ~USBPORTSC_SUSP;
+ break;
- //
- // no operation
- //
- case EfiUsbPortPower:
- break;
+ //
+ // no operation
+ //
+ case EfiUsbPortPower:
+ break;
- //
- // clear PORT_RESET means clear the reset signal.
- //
- case EfiUsbPortReset:
- RHPortControl &= 0xfff5;
- RHPortControl &= ~USBPORTSC_PR;
- break;
+ //
+ // clear PORT_RESET means clear the reset signal.
+ //
+ case EfiUsbPortReset:
+ RHPortControl &= 0xfff5;
+ RHPortControl &= ~USBPORTSC_PR;
+ break;
- //
- // clear connect status change
- //
- case EfiUsbPortConnectChange:
- RHPortControl &= 0xfff5;
- RHPortControl |= USBPORTSC_CSC;
- break;
+ //
+ // clear connect status change
+ //
+ case EfiUsbPortConnectChange:
+ RHPortControl &= 0xfff5;
+ RHPortControl |= USBPORTSC_CSC;
+ break;
- //
- // clear enable/disable status change
- //
- case EfiUsbPortEnableChange:
- RHPortControl &= 0xfff5;
- RHPortControl |= USBPORTSC_PEDC;
- break;
+ //
+ // clear enable/disable status change
+ //
+ case EfiUsbPortEnableChange:
+ RHPortControl &= 0xfff5;
+ RHPortControl |= USBPORTSC_PEDC;
+ break;
- //
- // root hub does not support this request
- //
- case EfiUsbPortSuspendChange:
- break;
+ //
+ // root hub does not support this request
+ //
+ case EfiUsbPortSuspendChange:
+ break;
- //
- // root hub does not support this request
- //
- case EfiUsbPortOverCurrentChange:
- break;
+ //
+ // root hub does not support this request
+ //
+ case EfiUsbPortOverCurrentChange:
+ break;
- //
- // root hub does not support this request
- //
- case EfiUsbPortResetChange:
- break;
+ //
+ // root hub does not support this request
+ //
+ case EfiUsbPortResetChange:
+ break;
- default:
- return EFI_INVALID_PARAMETER;
+ default:
+ return EFI_INVALID_PARAMETER;
}
USBWritePortW (UhcDev, PSAddr, RHPortControl);
@@ -1027,7 +1039,7 @@ UhcClearRootHubPortFeature (
**/
EFI_STATUS
InitializeUsbHC (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
)
{
EFI_STATUS Status;
@@ -1043,34 +1055,33 @@ InitializeUsbHC (
return Status;
}
- FrameListBaseAddrReg = UhcDev->UsbHostControllerBaseAddress + USBFLBASEADD;
- CommandReg = UhcDev->UsbHostControllerBaseAddress + USBCMD;
+ FrameListBaseAddrReg = UhcDev->UsbHostControllerBaseAddress + USBFLBASEADD;
+ CommandReg = UhcDev->UsbHostControllerBaseAddress + USBCMD;
//
// Set Frame List Base Address to the specific register to inform the hardware.
//
- SetFrameListBaseAddress (UhcDev, FrameListBaseAddrReg, (UINT32) (UINTN) (UhcDev->FrameListEntry));
+ SetFrameListBaseAddress (UhcDev, FrameListBaseAddrReg, (UINT32)(UINTN)(UhcDev->FrameListEntry));
- Command = USBReadPortW (UhcDev, CommandReg);
+ Command = USBReadPortW (UhcDev, CommandReg);
Command |= USBCMD_GRESET;
USBWritePortW (UhcDev, CommandReg, Command);
MicroSecondDelay (50 * 1000);
-
Command &= ~USBCMD_GRESET;
USBWritePortW (UhcDev, CommandReg, Command);
//
- //UHCI spec page120 reset recovery time
+ // UHCI spec page120 reset recovery time
//
MicroSecondDelay (20 * 1000);
//
// Set Run/Stop bit to 1.
//
- Command = USBReadPortW (UhcDev, CommandReg);
+ Command = USBReadPortW (UhcDev, CommandReg);
Command |= USBCMD_RS | USBCMD_MAXP;
USBWritePortW (UhcDev, CommandReg, Command);
@@ -1088,7 +1099,7 @@ InitializeUsbHC (
**/
EFI_STATUS
CreateFrameList (
- USB_UHC_DEV *UhcDev
+ USB_UHC_DEV *UhcDev
)
{
EFI_STATUS Status;
@@ -1111,28 +1122,30 @@ CreateFrameList (
}
//
- //Create Control QH and Bulk QH and link them into Framelist Entry
+ // Create Control QH and Bulk QH and link them into Framelist Entry
//
- Status = CreateQH(UhcDev, &UhcDev->ConfigQH);
+ Status = CreateQH (UhcDev, &UhcDev->ConfigQH);
if (Status != EFI_SUCCESS) {
return EFI_OUT_OF_RESOURCES;
}
+
ASSERT (UhcDev->ConfigQH != NULL);
- Status = CreateQH(UhcDev, &UhcDev->BulkQH);
+ Status = CreateQH (UhcDev, &UhcDev->BulkQH);
if (Status != EFI_SUCCESS) {
return EFI_OUT_OF_RESOURCES;
}
+
ASSERT (UhcDev->BulkQH != NULL);
//
- //Set the corresponding QH pointer
+ // Set the corresponding QH pointer
//
- SetQHHorizontalLinkPtr(UhcDev->ConfigQH, UhcDev->BulkQH);
+ SetQHHorizontalLinkPtr (UhcDev->ConfigQH, UhcDev->BulkQH);
SetQHHorizontalQHorTDSelect (UhcDev->ConfigQH, TRUE);
SetQHHorizontalValidorInvalid (UhcDev->ConfigQH, TRUE);
- UhcDev->FrameListEntry = (FRAMELIST_ENTRY *) ((UINTN) FrameListBaseAddr);
+ UhcDev->FrameListEntry = (FRAMELIST_ENTRY *)((UINTN)FrameListBaseAddr);
FrameListPtr = UhcDev->FrameListEntry;
@@ -1141,7 +1154,7 @@ CreateFrameList (
FrameListPtr->FrameListPtr = (UINT32)(UINTN)UhcDev->ConfigQH >> 4;
FrameListPtr->FrameListPtrQSelect = 1;
FrameListPtr->FrameListRsvd = 0;
- FrameListPtr ++;
+ FrameListPtr++;
}
return EFI_SUCCESS;
@@ -1158,8 +1171,8 @@ CreateFrameList (
**/
UINT16
USBReadPortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port
)
{
return IoRead16 (Port);
@@ -1175,9 +1188,9 @@ USBReadPortW (
**/
VOID
USBWritePortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT16 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT16 Data
)
{
IoWrite16 (Port, Data);
@@ -1193,9 +1206,9 @@ USBWritePortW (
**/
VOID
USBWritePortDW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT32 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT32 Data
)
{
IoWrite32 (Port, Data);
@@ -1210,8 +1223,8 @@ USBWritePortDW (
**/
VOID
ClearStatusReg (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusAddr
)
{
//
@@ -1232,8 +1245,8 @@ ClearStatusReg (
**/
BOOLEAN
IsStatusOK (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusRegAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusRegAddr
)
{
UINT16 StatusValue;
@@ -1247,8 +1260,6 @@ IsStatusOK (
}
}
-
-
/**
Set Frame List Base Address.
@@ -1259,15 +1270,15 @@ IsStatusOK (
**/
VOID
SetFrameListBaseAddress (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 FrameListRegAddr,
- IN UINT32 Addr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 FrameListRegAddr,
+ IN UINT32 Addr
)
{
//
// Sets value in the USB Frame List Base Address register.
//
- USBWritePortDW (UhcDev, FrameListRegAddr, (UINT32) (Addr & 0xFFFFF000));
+ USBWritePortDW (UhcDev, FrameListRegAddr, (UINT32)(Addr & 0xFFFFF000));
}
/**
@@ -1282,8 +1293,8 @@ SetFrameListBaseAddress (
**/
EFI_STATUS
CreateQH (
- IN USB_UHC_DEV *UhcDev,
- OUT QH_STRUCT **PtrQH
+ IN USB_UHC_DEV *UhcDev,
+ OUT QH_STRUCT **PtrQH
)
{
EFI_STATUS Status;
@@ -1291,10 +1302,11 @@ CreateQH (
//
// allocate align memory for QH_STRUCT
//
- Status = AllocateTDorQHStruct (UhcDev, sizeof(QH_STRUCT), (void **)PtrQH);
+ Status = AllocateTDorQHStruct (UhcDev, sizeof (QH_STRUCT), (void **)PtrQH);
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
//
// init each field of the QH_STRUCT
//
@@ -1322,11 +1334,9 @@ SetQHHorizontalLinkPtr (
// Only the highest 28bit of the address is valid
// (take 32bit address as an example).
//
- PtrQH->QueueHead.QHHorizontalPtr = (UINT32) (UINTN) PtrNext >> 4;
+ PtrQH->QueueHead.QHHorizontalPtr = (UINT32)(UINTN)PtrNext >> 4;
}
-
-
/**
Set a QH or TD horizontally to be connected with a specific QH.
@@ -1385,7 +1395,7 @@ SetQHVerticalLinkPtr (
// Only the highest 28bit of the address is valid
// (take 32bit address as an example).
//
- PtrQH->QueueHead.QHVerticalPtr = (UINT32) (UINTN) PtrNext >> 4;
+ PtrQH->QueueHead.QHVerticalPtr = (UINT32)(UINTN)PtrNext >> 4;
}
/**
@@ -1428,8 +1438,6 @@ SetQHVerticalValidorInvalid (
PtrQH->QueueHead.QHVerticalTerminate = IsValid ? 0 : 1;
}
-
-
/**
Allocate TD or QH Struct.
@@ -1443,21 +1451,21 @@ SetQHVerticalValidorInvalid (
**/
EFI_STATUS
AllocateTDorQHStruct (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Size,
- OUT VOID **PtrStruct
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Size,
+ OUT VOID **PtrStruct
)
{
EFI_STATUS Status;
- Status = EFI_SUCCESS;
- *PtrStruct = NULL;
+ Status = EFI_SUCCESS;
+ *PtrStruct = NULL;
Status = UhcAllocatePool (
- UhcDev,
- (UINT8 **) PtrStruct,
- Size
- );
+ UhcDev,
+ (UINT8 **)PtrStruct,
+ Size
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1479,15 +1487,16 @@ AllocateTDorQHStruct (
**/
EFI_STATUS
CreateTD (
- IN USB_UHC_DEV *UhcDev,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ OUT TD_STRUCT **PtrTD
)
{
EFI_STATUS Status;
+
//
// create memory for TD_STRUCT, and align the memory.
//
- Status = AllocateTDorQHStruct (UhcDev, sizeof(TD_STRUCT), (void **)PtrTD);
+ Status = AllocateTDorQHStruct (UhcDev, sizeof (TD_STRUCT), (void **)PtrTD);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1518,14 +1527,14 @@ CreateTD (
**/
EFI_STATUS
GenSetupStageTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 DeviceSpeed,
- IN UINT8 *DevRequest,
- IN UINT8 *RequestPhy,
- IN UINT8 RequestLen,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 *DevRequest,
+ IN UINT8 *RequestPhy,
+ IN UINT8 RequestLen,
+ OUT TD_STRUCT **PtrTD
)
{
TD_STRUCT *TdStruct;
@@ -1564,14 +1573,15 @@ GenSetupStageTD (
// (TRUE - Slow Device; FALSE - Full Speed Device)
//
switch (DeviceSpeed) {
- case USB_SLOW_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (TdStruct, TRUE);
- break;
+ case USB_SLOW_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (TdStruct, TRUE);
+ break;
- case USB_FULL_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (TdStruct, FALSE);
- break;
+ case USB_FULL_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (TdStruct, FALSE);
+ break;
}
+
//
// Non isochronous transfer TD
//
@@ -1598,13 +1608,13 @@ GenSetupStageTD (
SetTDTokenPacketID (TdStruct, SETUP_PACKET_ID);
- TdStruct->PtrTDBuffer = (UINT8 *) DevRequest;
+ TdStruct->PtrTDBuffer = (UINT8 *)DevRequest;
TdStruct->TDBufferLength = RequestLen;
//
// Set the beginning address of the buffer that will be used
// during the transaction.
//
- TdStruct->TDData.TDBufferPtr = (UINT32) (UINTN) RequestPhy;
+ TdStruct->TDData.TDBufferPtr = (UINT32)(UINTN)RequestPhy;
*PtrTD = TdStruct;
@@ -1631,16 +1641,16 @@ GenSetupStageTD (
**/
EFI_STATUS
GenDataTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 *PtrData,
- IN UINT8 *DataPhy,
- IN UINT8 Len,
- IN UINT8 PktID,
- IN UINT8 Toggle,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 *PtrData,
+ IN UINT8 *DataPhy,
+ IN UINT8 Len,
+ IN UINT8 PktID,
+ IN UINT8 Toggle,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
)
{
TD_STRUCT *TdStruct;
@@ -1683,14 +1693,15 @@ GenDataTD (
// (TRUE - Slow Device; FALSE - Full Speed Device)
//
switch (DeviceSpeed) {
- case USB_SLOW_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (TdStruct, TRUE);
- break;
+ case USB_SLOW_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (TdStruct, TRUE);
+ break;
- case USB_FULL_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (TdStruct, FALSE);
- break;
+ case USB_FULL_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (TdStruct, FALSE);
+ break;
}
+
//
// Non isochronous transfer TD
//
@@ -1721,13 +1732,13 @@ GenDataTD (
SetTDTokenPacketID (TdStruct, PktID);
- TdStruct->PtrTDBuffer = (UINT8 *) PtrData;
+ TdStruct->PtrTDBuffer = (UINT8 *)PtrData;
TdStruct->TDBufferLength = Len;
//
// Set the beginning address of the buffer that will be used
// during the transaction.
//
- TdStruct->TDData.TDBufferPtr = (UINT32) (UINTN) DataPhy;
+ TdStruct->TDData.TDBufferPtr = (UINT32)(UINTN)DataPhy;
*PtrTD = TdStruct;
@@ -1750,12 +1761,12 @@ GenDataTD (
**/
EFI_STATUS
CreateStatusTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 PktID,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 PktID,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
)
{
TD_STRUCT *PtrTDStruct;
@@ -1794,14 +1805,15 @@ CreateStatusTD (
// (TRUE - Slow Device; FALSE - Full Speed Device)
//
switch (DeviceSpeed) {
- case USB_SLOW_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (PtrTDStruct, TRUE);
- break;
+ case USB_SLOW_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (PtrTDStruct, TRUE);
+ break;
- case USB_FULL_SPEED_DEVICE:
- SetTDLoworFullSpeedDevice (PtrTDStruct, FALSE);
- break;
+ case USB_FULL_SPEED_DEVICE:
+ SetTDLoworFullSpeedDevice (PtrTDStruct, FALSE);
+ break;
}
+
//
// Non isochronous transfer TD
//
@@ -1828,7 +1840,7 @@ CreateStatusTD (
SetTDTokenPacketID (PtrTDStruct, PktID);
- PtrTDStruct->PtrTDBuffer = NULL;
+ PtrTDStruct->PtrTDBuffer = NULL;
PtrTDStruct->TDBufferLength = 0;
//
// Set the beginning address of the buffer that will be used
@@ -1850,8 +1862,8 @@ CreateStatusTD (
**/
VOID
SetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsValid
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsValid
)
{
//
@@ -1870,8 +1882,8 @@ SetTDLinkPtrValidorInvalid (
**/
VOID
SetTDLinkPtrQHorTDSelect (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsQH
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsQH
)
{
//
@@ -1889,8 +1901,8 @@ SetTDLinkPtrQHorTDSelect (
**/
VOID
SetTDLinkPtrDepthorBreadth (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsDepth
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsDepth
)
{
//
@@ -1909,15 +1921,15 @@ SetTDLinkPtrDepthorBreadth (
**/
VOID
SetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct,
- IN VOID *PtrNext
+ IN TD_STRUCT *PtrTDStruct,
+ IN VOID *PtrNext
)
{
//
// Set TD Link Pointer. Since QH,TD align on 16-byte boundaries,
// only the highest 28 bits are valid. (if take 32bit address as an example)
//
- PtrTDStruct->TDData.TDLinkPtr = (UINT32) (UINTN) PtrNext >> 4;
+ PtrTDStruct->TDData.TDLinkPtr = (UINT32)(UINTN)PtrNext >> 4;
}
/**
@@ -1930,18 +1942,16 @@ SetTDLinkPtr (
**/
VOID *
GetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
//
// Get TD Link Pointer. Restore it back to 32bit
// (if take 32bit address as an example)
//
- return (VOID *) (UINTN) ((PtrTDStruct->TDData.TDLinkPtr) << 4);
+ return (VOID *)(UINTN)((PtrTDStruct->TDData.TDLinkPtr) << 4);
}
-
-
/**
Enable/Disable short packet detection mechanism.
@@ -1951,8 +1961,8 @@ GetTDLinkPtr (
**/
VOID
EnableorDisableTDShortPacket (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsEnable
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsEnable
)
{
//
@@ -1970,8 +1980,8 @@ EnableorDisableTDShortPacket (
**/
VOID
SetTDControlErrorCounter (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 MaxErrors
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 MaxErrors
)
{
//
@@ -1993,8 +2003,8 @@ SetTDControlErrorCounter (
**/
VOID
SetTDLoworFullSpeedDevice (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsLowSpeedDevice
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsLowSpeedDevice
)
{
//
@@ -2012,8 +2022,8 @@ SetTDLoworFullSpeedDevice (
**/
VOID
SetTDControlIsochronousorNot (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsIsochronous
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsIsochronous
)
{
//
@@ -2032,8 +2042,8 @@ SetTDControlIsochronousorNot (
**/
VOID
SetorClearTDControlIOC (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsSet
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsSet
)
{
//
@@ -2052,8 +2062,8 @@ SetorClearTDControlIOC (
**/
VOID
SetTDStatusActiveorInactive (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsActive
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsActive
)
{
//
@@ -2077,8 +2087,8 @@ SetTDStatusActiveorInactive (
**/
UINT16
SetTDTokenMaxLength (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT16 MaxLen
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT16 MaxLen
)
{
//
@@ -2102,7 +2112,7 @@ SetTDTokenMaxLength (
**/
VOID
SetTDTokenDataToggle1 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
//
@@ -2119,7 +2129,7 @@ SetTDTokenDataToggle1 (
**/
VOID
SetTDTokenDataToggle0 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
//
@@ -2137,14 +2147,14 @@ SetTDTokenDataToggle0 (
**/
VOID
SetTDTokenEndPoint (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN EndPoint
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN EndPoint
)
{
//
// Set EndPoint Number the TD is targeting at.
//
- PtrTDStruct->TDData.TDTokenEndPt = (UINT8) EndPoint;
+ PtrTDStruct->TDData.TDTokenEndPt = (UINT8)EndPoint;
}
/**
@@ -2156,14 +2166,14 @@ SetTDTokenEndPoint (
**/
VOID
SetTDTokenDeviceAddress (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN DevAddr
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN DevAddr
)
{
//
// Set Device Address the TD is targeting at.
//
- PtrTDStruct->TDData.TDTokenDevAddr = (UINT8) DevAddr;
+ PtrTDStruct->TDData.TDTokenDevAddr = (UINT8)DevAddr;
}
/**
@@ -2175,8 +2185,8 @@ SetTDTokenDeviceAddress (
**/
VOID
SetTDTokenPacketID (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 PacketID
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 PacketID
)
{
//
@@ -2195,16 +2205,16 @@ SetTDTokenPacketID (
**/
BOOLEAN
IsTDStatusActive (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether the TD is active.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x80);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x80);
}
/**
@@ -2217,16 +2227,16 @@ IsTDStatusActive (
**/
BOOLEAN
IsTDStatusStalled (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether the device/endpoint addressed by this TD is stalled.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x40);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x40);
}
/**
@@ -2239,16 +2249,16 @@ IsTDStatusStalled (
**/
BOOLEAN
IsTDStatusBufferError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether Data Buffer Error is happened.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x20);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x20);
}
/**
@@ -2261,16 +2271,16 @@ IsTDStatusBufferError (
**/
BOOLEAN
IsTDStatusBabbleError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether Babble Error is happened.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x10);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x10);
}
/**
@@ -2283,16 +2293,16 @@ IsTDStatusBabbleError (
**/
BOOLEAN
IsTDStatusNAKReceived (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether NAK is received.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x08);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x08);
}
/**
@@ -2305,16 +2315,16 @@ IsTDStatusNAKReceived (
**/
BOOLEAN
IsTDStatusCRCTimeOutError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether CRC/Time Out Error is encountered.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x04);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x04);
}
/**
@@ -2327,16 +2337,16 @@ IsTDStatusCRCTimeOutError (
**/
BOOLEAN
IsTDStatusBitStuffError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
- UINT8 TDStatus;
+ UINT8 TDStatus;
//
// Detect whether Bitstuff Error is received.
//
- TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);
- return (BOOLEAN) (TDStatus & 0x02);
+ TDStatus = (UINT8)(PtrTDStruct->TDData.TDStatus);
+ return (BOOLEAN)(TDStatus & 0x02);
}
/**
@@ -2349,14 +2359,14 @@ IsTDStatusBitStuffError (
**/
UINT16
GetTDStatusActualLength (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
//
// Retrieve the actual number of bytes that were tansferred.
// the value is encoded as n-1. so return the decoded value.
//
- return (UINT16) ((PtrTDStruct->TDData.TDStatusActualLength) + 1);
+ return (UINT16)((PtrTDStruct->TDData.TDStatusActualLength) + 1);
}
/**
@@ -2369,7 +2379,7 @@ GetTDStatusActualLength (
**/
BOOLEAN
GetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
)
{
//
@@ -2381,7 +2391,6 @@ GetTDLinkPtrValidorInvalid (
} else {
return TRUE;
}
-
}
/**
@@ -2394,19 +2403,19 @@ GetTDLinkPtrValidorInvalid (
**/
UINTN
CountTDsNumber (
- IN TD_STRUCT *PtrFirstTD
+ IN TD_STRUCT *PtrFirstTD
)
{
- UINTN Number;
- TD_STRUCT *Ptr;
+ UINTN Number;
+ TD_STRUCT *Ptr;
//
// Count the queued TDs number.
//
- Number = 0;
- Ptr = PtrFirstTD;
+ Number = 0;
+ Ptr = PtrFirstTD;
while (Ptr != 0) {
- Ptr = (TD_STRUCT *) Ptr->PtrNextTD;
+ Ptr = (TD_STRUCT *)Ptr->PtrNextTD;
Number++;
}
@@ -2422,13 +2431,14 @@ CountTDsNumber (
**/
VOID
LinkTDToQH (
- IN QH_STRUCT *PtrQH,
- IN TD_STRUCT *PtrTD
+ IN QH_STRUCT *PtrQH,
+ IN TD_STRUCT *PtrTD
)
{
- if (PtrQH == NULL || PtrTD == NULL) {
- return ;
+ if ((PtrQH == NULL) || (PtrTD == NULL)) {
+ return;
}
+
//
// Validate QH Vertical Ptr field
//
@@ -2439,9 +2449,9 @@ LinkTDToQH (
//
SetQHVerticalQHorTDSelect (PtrQH, FALSE);
- SetQHVerticalLinkPtr (PtrQH, (VOID *) PtrTD);
+ SetQHVerticalLinkPtr (PtrQH, (VOID *)PtrTD);
- PtrQH->PtrDown = (VOID *) PtrTD;
+ PtrQH->PtrDown = (VOID *)PtrTD;
}
/**
@@ -2453,13 +2463,14 @@ LinkTDToQH (
**/
VOID
LinkTDToTD (
- IN TD_STRUCT *PtrPreTD,
- IN TD_STRUCT *PtrTD
+ IN TD_STRUCT *PtrPreTD,
+ IN TD_STRUCT *PtrTD
)
{
- if (PtrPreTD == NULL || PtrTD == NULL) {
- return ;
+ if ((PtrPreTD == NULL) || (PtrTD == NULL)) {
+ return;
}
+
//
// Depth first fashion
//
@@ -2477,9 +2488,9 @@ LinkTDToTD (
SetTDLinkPtr (PtrPreTD, PtrTD);
- PtrPreTD->PtrNextTD = (VOID *) PtrTD;
+ PtrPreTD->PtrNextTD = (VOID *)PtrTD;
- PtrTD->PtrNextTD = NULL;
+ PtrTD->PtrNextTD = NULL;
}
/**
@@ -2498,21 +2509,21 @@ LinkTDToTD (
**/
EFI_STATUS
ExecuteControlTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- OUT UINTN *ActualLen,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ OUT UINTN *ActualLen,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
)
{
- UINTN ErrTDPos;
- UINTN Delay;
- BOOLEAN InfiniteLoop;
+ UINTN ErrTDPos;
+ UINTN Delay;
+ BOOLEAN InfiniteLoop;
- ErrTDPos = 0;
- *TransferResult = EFI_USB_NOERROR;
- *ActualLen = 0;
- InfiniteLoop = FALSE;
+ ErrTDPos = 0;
+ *TransferResult = EFI_USB_NOERROR;
+ *ActualLen = 0;
+ InfiniteLoop = FALSE;
Delay = TimeOut * STALL_1_MILLI_SECOND;
//
@@ -2524,7 +2535,6 @@ ExecuteControlTransfer (
}
do {
-
CheckTDsResults (PtrTD, TransferResult, &ErrTDPos, ActualLen);
//
@@ -2533,9 +2543,9 @@ ExecuteControlTransfer (
if ((*TransferResult & EFI_USB_ERR_NOTEXECUTE) != EFI_USB_ERR_NOTEXECUTE) {
break;
}
+
MicroSecondDelay (STALL_1_MICRO_SECOND);
Delay--;
-
} while (InfiniteLoop || (Delay != 0));
if (*TransferResult != EFI_USB_NOERROR) {
@@ -2562,23 +2572,23 @@ ExecuteControlTransfer (
**/
EFI_STATUS
ExecBulkTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- IN OUT UINTN *ActualLen,
- IN UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ IN OUT UINTN *ActualLen,
+ IN UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
)
{
- UINTN ErrTDPos;
- UINTN ScrollNum;
- UINTN Delay;
- BOOLEAN InfiniteLoop;
+ UINTN ErrTDPos;
+ UINTN ScrollNum;
+ UINTN Delay;
+ BOOLEAN InfiniteLoop;
- ErrTDPos = 0;
- *TransferResult = EFI_USB_NOERROR;
- *ActualLen = 0;
- InfiniteLoop = FALSE;
+ ErrTDPos = 0;
+ *TransferResult = EFI_USB_NOERROR;
+ *ActualLen = 0;
+ InfiniteLoop = FALSE;
Delay = TimeOut * STALL_1_MILLI_SECOND;
//
@@ -2590,7 +2600,6 @@ ExecBulkTransfer (
}
do {
-
CheckTDsResults (PtrTD, TransferResult, &ErrTDPos, ActualLen);
//
// TD is inactive, thus meaning bulk transfer's end.
@@ -2598,9 +2607,9 @@ ExecBulkTransfer (
if ((*TransferResult & EFI_USB_ERR_NOTEXECUTE) != EFI_USB_ERR_NOTEXECUTE) {
break;
}
+
MicroSecondDelay (STALL_1_MICRO_SECOND);
Delay--;
-
} while (InfiniteLoop || (Delay != 0));
//
@@ -2615,9 +2624,9 @@ ExecBulkTransfer (
*DataToggle ^= 1;
}
- //
- // If error, wait 100ms to retry by upper layer
- //
+ //
+ // If error, wait 100ms to retry by upper layer
+ //
MicroSecondDelay (100 * 1000);
return EFI_DEVICE_ERROR;
}
@@ -2634,20 +2643,19 @@ ExecBulkTransfer (
**/
VOID
DeleteQueuedTDs (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrFirstTD
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrFirstTD
)
{
- TD_STRUCT *Tptr1;
+ TD_STRUCT *Tptr1;
- TD_STRUCT *Tptr2;
+ TD_STRUCT *Tptr2;
Tptr1 = PtrFirstTD;
//
// Delete all the TDs in a queue.
//
while (Tptr1 != NULL) {
-
Tptr2 = Tptr1;
if (!GetTDLinkPtrValidorInvalid (Tptr2)) {
@@ -2659,10 +2667,10 @@ DeleteQueuedTDs (
Tptr1 = GetTDLinkPtr (Tptr2);
}
- UhcFreePool (UhcDev, (UINT8 *) Tptr2, sizeof (TD_STRUCT));
+ UhcFreePool (UhcDev, (UINT8 *)Tptr2, sizeof (TD_STRUCT));
}
- return ;
+ return;
}
/**
@@ -2678,13 +2686,13 @@ DeleteQueuedTDs (
**/
BOOLEAN
CheckTDsResults (
- IN TD_STRUCT *PtrTD,
- OUT UINT32 *Result,
- OUT UINTN *ErrTDPos,
- OUT UINTN *ActualTransferSize
+ IN TD_STRUCT *PtrTD,
+ OUT UINT32 *Result,
+ OUT UINTN *ErrTDPos,
+ OUT UINTN *ActualTransferSize
)
{
- UINTN Len;
+ UINTN Len;
*Result = EFI_USB_NOERROR;
*ErrTDPos = 0;
@@ -2695,7 +2703,6 @@ CheckTDsResults (
*ActualTransferSize = 0;
while (PtrTD != NULL) {
-
if (IsTDStatusActive (PtrTD)) {
*Result |= EFI_USB_ERR_NOTEXECUTE;
}
@@ -2723,10 +2730,11 @@ CheckTDsResults (
if (IsTDStatusBitStuffError (PtrTD)) {
*Result |= EFI_USB_ERR_BITSTUFF;
}
+
//
// Accumulate actual transferred data length in each TD.
//
- Len = GetTDStatusActualLength (PtrTD) & 0x7FF;
+ Len = GetTDStatusActualLength (PtrTD) & 0x7FF;
*ActualTransferSize += Len;
//
@@ -2736,7 +2744,7 @@ CheckTDsResults (
return FALSE;
}
- PtrTD = (TD_STRUCT *) (PtrTD->PtrNextTD);
+ PtrTD = (TD_STRUCT *)(PtrTD->PtrNextTD);
//
// Record the first Error TD's position in the queue,
// this value is zero-based.
@@ -2777,13 +2785,13 @@ CreateMemoryBlock (
// memory management header and bit array use 1 page
//
MemPages = MemoryBlockSizeInPages + 1;
- Status = IoMmuAllocateBuffer (
- UhcDev->IoMmu,
- MemPages,
- (VOID **) &TempPtr,
- &MappedAddr,
- &Mapping
- );
+ Status = IoMmuAllocateBuffer (
+ UhcDev->IoMmu,
+ MemPages,
+ (VOID **)&TempPtr,
+ &MappedAddr,
+ &Mapping
+ );
if (EFI_ERROR (Status) || (TempPtr == NULL)) {
return EFI_OUT_OF_RESOURCES;
}
@@ -2792,7 +2800,7 @@ CreateMemoryBlock (
ZeroMem (Ptr, MemPages * EFI_PAGE_SIZE);
- *MemoryHeader = (MEMORY_MANAGE_HEADER *) Ptr;
+ *MemoryHeader = (MEMORY_MANAGE_HEADER *)Ptr;
//
// adjust Ptr pointer to the next empty memory
//
@@ -2800,15 +2808,15 @@ CreateMemoryBlock (
//
// Set Bit Array initial address
//
- (*MemoryHeader)->BitArrayPtr = Ptr;
+ (*MemoryHeader)->BitArrayPtr = Ptr;
- (*MemoryHeader)->Next = NULL;
+ (*MemoryHeader)->Next = NULL;
//
// Memory block initial address
//
- Ptr = TempPtr;
- Ptr += EFI_PAGE_SIZE;
+ Ptr = TempPtr;
+ Ptr += EFI_PAGE_SIZE;
(*MemoryHeader)->MemoryBlockPtr = Ptr;
//
// set Memory block size
@@ -2833,15 +2841,15 @@ CreateMemoryBlock (
**/
EFI_STATUS
InitializeMemoryManagement (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
)
{
MEMORY_MANAGE_HEADER *MemoryHeader;
EFI_STATUS Status;
UINTN MemPages;
- MemPages = NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES;
- Status = CreateMemoryBlock (UhcDev, &MemoryHeader, MemPages);
+ MemPages = NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES;
+ Status = CreateMemoryBlock (UhcDev, &MemoryHeader, MemPages);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2864,9 +2872,9 @@ InitializeMemoryManagement (
**/
EFI_STATUS
UhcAllocatePool (
- IN USB_UHC_DEV *UhcDev,
- OUT UINT8 **Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ OUT UINT8 **Pool,
+ IN UINTN AllocSize
)
{
MEMORY_MANAGE_HEADER *MemoryHeader;
@@ -2891,16 +2899,16 @@ UhcAllocatePool (
Status = EFI_NOT_FOUND;
for (TempHeaderPtr = MemoryHeader; TempHeaderPtr != NULL; TempHeaderPtr = TempHeaderPtr->Next) {
-
Status = AllocMemInMemoryBlock (
- TempHeaderPtr,
- (VOID **) Pool,
- RealAllocSize / 32
- );
+ TempHeaderPtr,
+ (VOID **)Pool,
+ RealAllocSize / 32
+ );
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
}
+
//
// There is no enough memory,
// Create a new Memory Block
@@ -2919,16 +2927,17 @@ UhcAllocatePool (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Link the new Memory Block to the Memory Header list
//
InsertMemoryHeaderToList (MemoryHeader, NewMemoryHeader);
Status = AllocMemInMemoryBlock (
- NewMemoryHeader,
- (VOID **) Pool,
- RealAllocSize / 32
- );
+ NewMemoryHeader,
+ (VOID **)Pool,
+ RealAllocSize / 32
+ );
return Status;
}
@@ -2950,21 +2959,21 @@ AllocMemInMemoryBlock (
IN UINTN NumberOfMemoryUnit
)
{
- UINTN TempBytePos;
- UINTN FoundBytePos;
- UINT8 Index;
- UINT8 FoundBitPos;
- UINT8 ByteValue;
- UINT8 BitValue;
- UINTN NumberOfZeros;
- UINTN Count;
+ UINTN TempBytePos;
+ UINTN FoundBytePos;
+ UINT8 Index;
+ UINT8 FoundBitPos;
+ UINT8 ByteValue;
+ UINT8 BitValue;
+ UINTN NumberOfZeros;
+ UINTN Count;
- FoundBytePos = 0;
- FoundBitPos = 0;
+ FoundBytePos = 0;
+ FoundBitPos = 0;
ByteValue = MemoryHeader->BitArrayPtr[0];
NumberOfZeros = 0;
- Index = 0;
+ Index = 0;
for (TempBytePos = 0; TempBytePos < MemoryHeader->BitArraySizeInBytes;) {
//
// Pop out BitValue from a byte in TempBytePos.
@@ -3001,10 +3010,11 @@ AllocMemInMemoryBlock (
//
// reset the (FoundBytePos,FoundBitPos) to the position of '1'
//
- FoundBytePos = TempBytePos;
- FoundBitPos = Index;
+ FoundBytePos = TempBytePos;
+ FoundBitPos = Index;
}
}
+
//
// right shift the byte
//
@@ -3020,14 +3030,15 @@ AllocMemInMemoryBlock (
// and reset the bit pos.
//
TempBytePos += 1;
- ByteValue = MemoryHeader->BitArrayPtr[TempBytePos];
- Index = 0;
+ ByteValue = MemoryHeader->BitArrayPtr[TempBytePos];
+ Index = 0;
}
}
if (NumberOfZeros < NumberOfMemoryUnit) {
return EFI_NOT_FOUND;
}
+
//
// Found enough free space.
//
@@ -3042,23 +3053,24 @@ AllocMemInMemoryBlock (
if ((MemoryHeader->BitArrayPtr[0] & BIT0) != 0) {
FoundBitPos += 1;
}
+
//
// Have the (FoundBytePos,FoundBitPos) make sense.
//
if (FoundBitPos > 7) {
FoundBytePos += 1;
- FoundBitPos -= 8;
+ FoundBitPos -= 8;
}
+
//
// Set the memory as allocated
//
for (TempBytePos = FoundBytePos, Index = FoundBitPos, Count = 0; Count < NumberOfMemoryUnit; Count++) {
-
- MemoryHeader->BitArrayPtr[TempBytePos] = (UINT8) (MemoryHeader->BitArrayPtr[TempBytePos] | (1 << Index));
+ MemoryHeader->BitArrayPtr[TempBytePos] = (UINT8)(MemoryHeader->BitArrayPtr[TempBytePos] | (1 << Index));
Index++;
if (Index == 8) {
TempBytePos += 1;
- Index = 0;
+ Index = 0;
}
}
@@ -3077,9 +3089,9 @@ AllocMemInMemoryBlock (
**/
VOID
UhcFreePool (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 *Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 *Pool,
+ IN UINTN AllocSize
)
{
MEMORY_MANAGE_HEADER *MemoryHeader;
@@ -3103,38 +3115,37 @@ UhcFreePool (
}
for (TempHeaderPtr = MemoryHeader; TempHeaderPtr != NULL;
- TempHeaderPtr = TempHeaderPtr->Next) {
-
+ TempHeaderPtr = TempHeaderPtr->Next)
+ {
if ((Pool >= TempHeaderPtr->MemoryBlockPtr) &&
((Pool + RealAllocSize) <= (TempHeaderPtr->MemoryBlockPtr +
- TempHeaderPtr->MemoryBlockSizeInBytes))) {
-
+ TempHeaderPtr->MemoryBlockSizeInBytes)))
+ {
//
// Pool is in the Memory Block area,
// find the start byte and bit in the bit array
//
- StartBytePos = ((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) / 8;
- StartBitPos = (UINT8) (((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) % 8);
+ StartBytePos = ((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) / 8;
+ StartBitPos = (UINT8)(((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) % 8);
//
// reset associated bits in bit array
//
for (Index = StartBytePos, Index2 = StartBitPos, Count = 0; Count < (RealAllocSize / 32); Count++) {
-
- TempHeaderPtr->BitArrayPtr[Index] = (UINT8) (TempHeaderPtr->BitArrayPtr[Index] ^ (1 << Index2));
+ TempHeaderPtr->BitArrayPtr[Index] = (UINT8)(TempHeaderPtr->BitArrayPtr[Index] ^ (1 << Index2));
Index2++;
if (Index2 == 8) {
Index += 1;
Index2 = 0;
}
}
+
//
// break the loop
//
break;
}
}
-
}
/**
@@ -3160,10 +3171,6 @@ InsertMemoryHeaderToList (
}
}
-
-
-
-
/**
Map address of request structure buffer.
@@ -3178,10 +3185,10 @@ InsertMemoryHeaderToList (
**/
EFI_STATUS
UhciMapUserRequest (
- IN USB_UHC_DEV *Uhc,
- IN OUT VOID *Request,
- OUT UINT8 **MappedAddr,
- OUT VOID **Map
+ IN USB_UHC_DEV *Uhc,
+ IN OUT VOID *Request,
+ OUT UINT8 **MappedAddr,
+ OUT VOID **Map
)
{
EFI_STATUS Status;
@@ -3199,7 +3206,7 @@ UhciMapUserRequest (
);
if (!EFI_ERROR (Status)) {
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
}
return Status;
@@ -3237,61 +3244,60 @@ UhciMapUserData (
Status = EFI_SUCCESS;
switch (Direction) {
- case EfiUsbDataIn:
- //
- // BusMasterWrite means cpu read
- //
- *PktId = INPUT_PACKET_ID;
- Status = IoMmuMap (
- Uhc->IoMmu,
- EdkiiIoMmuOperationBusMasterWrite,
- Data,
- Len,
- &PhyAddr,
- Map
- );
-
- if (EFI_ERROR (Status)) {
- goto EXIT;
- }
+ case EfiUsbDataIn:
+ //
+ // BusMasterWrite means cpu read
+ //
+ *PktId = INPUT_PACKET_ID;
+ Status = IoMmuMap (
+ Uhc->IoMmu,
+ EdkiiIoMmuOperationBusMasterWrite,
+ Data,
+ Len,
+ &PhyAddr,
+ Map
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto EXIT;
+ }
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
- break;
-
- case EfiUsbDataOut:
- *PktId = OUTPUT_PACKET_ID;
- Status = IoMmuMap (
- Uhc->IoMmu,
- EdkiiIoMmuOperationBusMasterRead,
- Data,
- Len,
- &PhyAddr,
- Map
- );
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
+ break;
- if (EFI_ERROR (Status)) {
- goto EXIT;
- }
+ case EfiUsbDataOut:
+ *PktId = OUTPUT_PACKET_ID;
+ Status = IoMmuMap (
+ Uhc->IoMmu,
+ EdkiiIoMmuOperationBusMasterRead,
+ Data,
+ Len,
+ &PhyAddr,
+ Map
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto EXIT;
+ }
- *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
- break;
+ *MappedAddr = (UINT8 *)(UINTN)PhyAddr;
+ break;
- case EfiUsbNoData:
- if ((Len != NULL) && (*Len != 0)) {
- Status = EFI_INVALID_PARAMETER;
- goto EXIT;
- }
+ case EfiUsbNoData:
+ if ((Len != NULL) && (*Len != 0)) {
+ Status = EFI_INVALID_PARAMETER;
+ goto EXIT;
+ }
- *PktId = OUTPUT_PACKET_ID;
- *MappedAddr = NULL;
- *Map = NULL;
- break;
+ *PktId = OUTPUT_PACKET_ID;
+ *MappedAddr = NULL;
+ *Map = NULL;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
EXIT:
return Status;
}
-
diff --git a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h
index 9100cbeabd..5b135f2558 100644
--- a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h
+++ b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _RECOVERY_UHC_H_
#define _RECOVERY_UHC_H_
-
#include <PiPei.h>
#include <Ppi/UsbController.h>
@@ -26,39 +25,39 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/IoLib.h>
#include <Library/PeiServicesLib.h>
-#define USB_SLOW_SPEED_DEVICE 0x01
-#define USB_FULL_SPEED_DEVICE 0x02
+#define USB_SLOW_SPEED_DEVICE 0x01
+#define USB_FULL_SPEED_DEVICE 0x02
//
// One memory block uses 16 page
//
-#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
-
-#define USBCMD 0 /* Command Register Offset 00-01h */
-#define USBCMD_RS BIT0 /* Run/Stop */
-#define USBCMD_HCRESET BIT1 /* Host reset */
-#define USBCMD_GRESET BIT2 /* Global reset */
-#define USBCMD_EGSM BIT3 /* Global Suspend Mode */
-#define USBCMD_FGR BIT4 /* Force Global Resume */
-#define USBCMD_SWDBG BIT5 /* SW Debug mode */
-#define USBCMD_CF BIT6 /* Config Flag (sw only) */
-#define USBCMD_MAXP BIT7 /* Max Packet (0 = 32, 1 = 64) */
+#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
+
+#define USBCMD 0 /* Command Register Offset 00-01h */
+#define USBCMD_RS BIT0 /* Run/Stop */
+#define USBCMD_HCRESET BIT1 /* Host reset */
+#define USBCMD_GRESET BIT2 /* Global reset */
+#define USBCMD_EGSM BIT3 /* Global Suspend Mode */
+#define USBCMD_FGR BIT4 /* Force Global Resume */
+#define USBCMD_SWDBG BIT5 /* SW Debug mode */
+#define USBCMD_CF BIT6 /* Config Flag (sw only) */
+#define USBCMD_MAXP BIT7 /* Max Packet (0 = 32, 1 = 64) */
/* Status register */
-#define USBSTS 2 /* Status Register Offset 02-03h */
-#define USBSTS_USBINT BIT0 /* Interrupt due to IOC */
-#define USBSTS_ERROR BIT1 /* Interrupt due to error */
-#define USBSTS_RD BIT2 /* Resume Detect */
-#define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
-#define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
-#define USBSTS_HCH BIT5 /* HC Halted */
+#define USBSTS 2 /* Status Register Offset 02-03h */
+#define USBSTS_USBINT BIT0 /* Interrupt due to IOC */
+#define USBSTS_ERROR BIT1 /* Interrupt due to error */
+#define USBSTS_RD BIT2 /* Resume Detect */
+#define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
+#define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
+#define USBSTS_HCH BIT5 /* HC Halted */
/* Interrupt enable register */
-#define USBINTR 4 /* Interrupt Enable Register 04-05h */
-#define USBINTR_TIMEOUT BIT0 /* Timeout/CRC error enable */
-#define USBINTR_RESUME BIT1 /* Resume interrupt enable */
-#define USBINTR_IOC BIT2 /* Interrupt On Complete enable */
-#define USBINTR_SP BIT3 /* Short packet interrupt enable */
+#define USBINTR 4 /* Interrupt Enable Register 04-05h */
+#define USBINTR_TIMEOUT BIT0 /* Timeout/CRC error enable */
+#define USBINTR_RESUME BIT1 /* Resume interrupt enable */
+#define USBINTR_IOC BIT2 /* Interrupt On Complete enable */
+#define USBINTR_SP BIT3 /* Short packet interrupt enable */
/* Frame Number Register Offset 06-08h */
#define USBFRNUM 6
@@ -70,90 +69,89 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USBSOF 0x0c
/* USB port status and control registers */
-#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
-#define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
-
-#define USBPORTSC_CCS BIT0 /* Current Connect Status ("device present") */
-#define USBPORTSC_CSC BIT1 /* Connect Status Change */
-#define USBPORTSC_PED BIT2 /* Port Enable / Disable */
-#define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
-#define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
-#define USBPORTSC_LSH BIT5 /* Line Status High bit*/
-#define USBPORTSC_RD BIT6 /* Resume Detect */
-#define USBPORTSC_LSDA BIT8 /* Low Speed Device Attached */
-#define USBPORTSC_PR BIT9 /* Port Reset */
-#define USBPORTSC_SUSP BIT12 /* Suspend */
-
-#define SETUP_PACKET_ID 0x2D
-#define INPUT_PACKET_ID 0x69
-#define OUTPUT_PACKET_ID 0xE1
-#define ERROR_PACKET_ID 0x55
+#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
+#define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
+
+#define USBPORTSC_CCS BIT0 /* Current Connect Status ("device present") */
+#define USBPORTSC_CSC BIT1 /* Connect Status Change */
+#define USBPORTSC_PED BIT2 /* Port Enable / Disable */
+#define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
+#define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
+#define USBPORTSC_LSH BIT5 /* Line Status High bit*/
+#define USBPORTSC_RD BIT6 /* Resume Detect */
+#define USBPORTSC_LSDA BIT8 /* Low Speed Device Attached */
+#define USBPORTSC_PR BIT9 /* Port Reset */
+#define USBPORTSC_SUSP BIT12 /* Suspend */
+
+#define SETUP_PACKET_ID 0x2D
+#define INPUT_PACKET_ID 0x69
+#define OUTPUT_PACKET_ID 0xE1
+#define ERROR_PACKET_ID 0x55
#define STALL_1_MICRO_SECOND 1
#define STALL_1_MILLI_SECOND 1000
-
#pragma pack(1)
typedef struct {
- UINT32 FrameListPtrTerminate : 1;
- UINT32 FrameListPtrQSelect : 1;
- UINT32 FrameListRsvd : 2;
- UINT32 FrameListPtr : 28;
+ UINT32 FrameListPtrTerminate : 1;
+ UINT32 FrameListPtrQSelect : 1;
+ UINT32 FrameListRsvd : 2;
+ UINT32 FrameListPtr : 28;
} FRAMELIST_ENTRY;
typedef struct {
- UINT32 QHHorizontalTerminate : 1;
- UINT32 QHHorizontalQSelect : 1;
- UINT32 QHHorizontalRsvd : 2;
- UINT32 QHHorizontalPtr : 28;
- UINT32 QHVerticalTerminate : 1;
- UINT32 QHVerticalQSelect : 1;
- UINT32 QHVerticalRsvd : 2;
- UINT32 QHVerticalPtr : 28;
+ UINT32 QHHorizontalTerminate : 1;
+ UINT32 QHHorizontalQSelect : 1;
+ UINT32 QHHorizontalRsvd : 2;
+ UINT32 QHHorizontalPtr : 28;
+ UINT32 QHVerticalTerminate : 1;
+ UINT32 QHVerticalQSelect : 1;
+ UINT32 QHVerticalRsvd : 2;
+ UINT32 QHVerticalPtr : 28;
} QUEUE_HEAD;
typedef struct {
- QUEUE_HEAD QueueHead;
- UINT32 Reserved1;
- UINT32 Reserved2;
- VOID *PtrNext;
- VOID *PtrDown;
- VOID *Reserved3;
- UINT32 Reserved4;
+ QUEUE_HEAD QueueHead;
+ UINT32 Reserved1;
+ UINT32 Reserved2;
+ VOID *PtrNext;
+ VOID *PtrDown;
+ VOID *Reserved3;
+ UINT32 Reserved4;
} QH_STRUCT;
typedef struct {
- UINT32 TDLinkPtrTerminate : 1;
- UINT32 TDLinkPtrQSelect : 1;
- UINT32 TDLinkPtrDepthSelect : 1;
- UINT32 TDLinkPtrRsvd : 1;
- UINT32 TDLinkPtr : 28;
- UINT32 TDStatusActualLength : 11;
- UINT32 TDStatusRsvd : 5;
- UINT32 TDStatus : 8;
- UINT32 TDStatusIOC : 1;
- UINT32 TDStatusIOS : 1;
- UINT32 TDStatusLS : 1;
- UINT32 TDStatusErr : 2;
- UINT32 TDStatusSPD : 1;
- UINT32 TDStatusRsvd2 : 2;
- UINT32 TDTokenPID : 8;
- UINT32 TDTokenDevAddr : 7;
- UINT32 TDTokenEndPt : 4;
- UINT32 TDTokenDataToggle : 1;
- UINT32 TDTokenRsvd : 1;
- UINT32 TDTokenMaxLen : 11;
- UINT32 TDBufferPtr;
+ UINT32 TDLinkPtrTerminate : 1;
+ UINT32 TDLinkPtrQSelect : 1;
+ UINT32 TDLinkPtrDepthSelect : 1;
+ UINT32 TDLinkPtrRsvd : 1;
+ UINT32 TDLinkPtr : 28;
+ UINT32 TDStatusActualLength : 11;
+ UINT32 TDStatusRsvd : 5;
+ UINT32 TDStatus : 8;
+ UINT32 TDStatusIOC : 1;
+ UINT32 TDStatusIOS : 1;
+ UINT32 TDStatusLS : 1;
+ UINT32 TDStatusErr : 2;
+ UINT32 TDStatusSPD : 1;
+ UINT32 TDStatusRsvd2 : 2;
+ UINT32 TDTokenPID : 8;
+ UINT32 TDTokenDevAddr : 7;
+ UINT32 TDTokenEndPt : 4;
+ UINT32 TDTokenDataToggle : 1;
+ UINT32 TDTokenRsvd : 1;
+ UINT32 TDTokenMaxLen : 11;
+ UINT32 TDBufferPtr;
} TD;
typedef struct {
- TD TDData;
- UINT8 *PtrTDBuffer;
- VOID *PtrNextTD;
- VOID *PtrNextQH;
- UINT16 TDBufferLength;
- UINT16 Reserved;
+ TD TDData;
+ UINT8 *PtrTDBuffer;
+ VOID *PtrNextTD;
+ VOID *PtrNextQH;
+ UINT16 TDBufferLength;
+ UINT16 Reserved;
} TD_STRUCT;
#pragma pack()
@@ -161,38 +159,37 @@ typedef struct {
typedef struct _MEMORY_MANAGE_HEADER MEMORY_MANAGE_HEADER;
struct _MEMORY_MANAGE_HEADER {
- UINT8 *BitArrayPtr;
- UINTN BitArraySizeInBytes;
- UINT8 *MemoryBlockPtr;
- UINTN MemoryBlockSizeInBytes;
- MEMORY_MANAGE_HEADER *Next;
+ UINT8 *BitArrayPtr;
+ UINTN BitArraySizeInBytes;
+ UINT8 *MemoryBlockPtr;
+ UINTN MemoryBlockSizeInBytes;
+ MEMORY_MANAGE_HEADER *Next;
};
-#define USB_UHC_DEV_SIGNATURE SIGNATURE_32 ('p', 'u', 'h', 'c')
+#define USB_UHC_DEV_SIGNATURE SIGNATURE_32 ('p', 'u', 'h', 'c')
typedef struct {
- UINTN Signature;
- PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;
- EDKII_IOMMU_PPI *IoMmu;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
+ UINTN Signature;
+ PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;
+ EDKII_IOMMU_PPI *IoMmu;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
//
// EndOfPei callback is used to stop the UHC DMA operation
// after exit PEI phase.
//
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
- UINT32 UsbHostControllerBaseAddress;
- FRAMELIST_ENTRY *FrameListEntry;
- QH_STRUCT *ConfigQH;
- QH_STRUCT *BulkQH;
+ UINT32 UsbHostControllerBaseAddress;
+ FRAMELIST_ENTRY *FrameListEntry;
+ QH_STRUCT *ConfigQH;
+ QH_STRUCT *BulkQH;
//
// Header1 used for QH,TD memory blocks management
//
- MEMORY_MANAGE_HEADER *Header1;
-
+ MEMORY_MANAGE_HEADER *Header1;
} USB_UHC_DEV;
-#define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)
-#define PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY(a) CR (a, USB_UHC_DEV, EndOfPeiNotifyList, USB_UHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY(a) CR (a, USB_UHC_DEV, EndOfPeiNotifyList, USB_UHC_DEV_SIGNATURE)
/**
Submits control transfer to a target USB device.
@@ -220,17 +217,17 @@ typedef struct {
EFI_STATUS
EFIAPI
UhcControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI * This,
- IN UINT8 DeviceAddress,
- IN UINT8 DeviceSpeed,
- IN UINT8 MaximumPacketLength,
- IN EFI_USB_DEVICE_REQUEST * Request,
- IN EFI_USB_DATA_DIRECTION TransferDirection,
- IN OUT VOID *Data OPTIONAL,
- IN OUT UINTN *DataLength OPTIONAL,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -263,16 +260,16 @@ UhcControlTransfer (
EFI_STATUS
EFIAPI
UhcBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 MaximumPacketLength,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -290,9 +287,9 @@ UhcBulkTransfer (
EFI_STATUS
EFIAPI
UhcGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
);
/**
@@ -311,10 +308,10 @@ UhcGetRootHubPortNumber (
EFI_STATUS
EFIAPI
UhcGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
);
/**
@@ -333,10 +330,10 @@ UhcGetRootHubPortStatus (
EFI_STATUS
EFIAPI
UhcSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
);
/**
@@ -357,10 +354,10 @@ UhcSetRootHubPortFeature (
EFI_STATUS
EFIAPI
UhcClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
);
/**
@@ -374,7 +371,7 @@ UhcClearRootHubPortFeature (
**/
EFI_STATUS
InitializeUsbHC (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
);
/**
@@ -388,7 +385,7 @@ InitializeUsbHC (
**/
EFI_STATUS
CreateFrameList (
- USB_UHC_DEV *UhcDev
+ USB_UHC_DEV *UhcDev
);
/**
@@ -402,8 +399,8 @@ CreateFrameList (
**/
UINT16
USBReadPortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port
);
/**
@@ -416,9 +413,9 @@ USBReadPortW (
**/
VOID
USBWritePortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT16 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT16 Data
);
/**
@@ -431,9 +428,9 @@ USBWritePortW (
**/
VOID
USBWritePortDW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT32 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT32 Data
);
/**
@@ -445,8 +442,8 @@ USBWritePortDW (
**/
VOID
ClearStatusReg (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusAddr
);
/**
@@ -461,8 +458,8 @@ ClearStatusReg (
**/
BOOLEAN
IsStatusOK (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusRegAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusRegAddr
);
/**
@@ -475,9 +472,9 @@ IsStatusOK (
**/
VOID
SetFrameListBaseAddress (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 FrameListRegAddr,
- IN UINT32 Addr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 FrameListRegAddr,
+ IN UINT32 Addr
);
/**
@@ -574,7 +571,6 @@ SetQHVerticalValidorInvalid (
IN BOOLEAN IsValid
);
-
/**
Allocate TD or QH Struct.
@@ -588,9 +584,9 @@ SetQHVerticalValidorInvalid (
**/
EFI_STATUS
AllocateTDorQHStruct (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Size,
- OUT VOID **PtrStruct
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Size,
+ OUT VOID **PtrStruct
);
/**
@@ -605,8 +601,8 @@ AllocateTDorQHStruct (
**/
EFI_STATUS
CreateTD (
- IN USB_UHC_DEV *UhcDev,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -627,14 +623,14 @@ CreateTD (
**/
EFI_STATUS
GenSetupStageTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 DeviceSpeed,
- IN UINT8 *DevRequest,
- IN UINT8 *RequestPhy,
- IN UINT8 RequestLen,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 *DevRequest,
+ IN UINT8 *RequestPhy,
+ IN UINT8 RequestLen,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -657,16 +653,16 @@ GenSetupStageTD (
**/
EFI_STATUS
GenDataTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 *PtrData,
- IN UINT8 *DataPhy,
- IN UINT8 Len,
- IN UINT8 PktID,
- IN UINT8 Toggle,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 *PtrData,
+ IN UINT8 *DataPhy,
+ IN UINT8 Len,
+ IN UINT8 PktID,
+ IN UINT8 Toggle,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -685,12 +681,12 @@ GenDataTD (
**/
EFI_STATUS
CreateStatusTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 PktID,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 PktID,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -702,8 +698,8 @@ CreateStatusTD (
**/
VOID
SetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsValid
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsValid
);
/**
@@ -715,8 +711,8 @@ SetTDLinkPtrValidorInvalid (
**/
VOID
SetTDLinkPtrQHorTDSelect (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsQH
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsQH
);
/**
@@ -728,8 +724,8 @@ SetTDLinkPtrQHorTDSelect (
**/
VOID
SetTDLinkPtrDepthorBreadth (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsDepth
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsDepth
);
/**
@@ -741,8 +737,8 @@ SetTDLinkPtrDepthorBreadth (
**/
VOID
SetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct,
- IN VOID *PtrNext
+ IN TD_STRUCT *PtrTDStruct,
+ IN VOID *PtrNext
);
/**
@@ -753,12 +749,11 @@ SetTDLinkPtr (
@retval Get TD Link Pointer in TD.
**/
-VOID*
+VOID *
GetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
-
/**
Enable/Disable short packet detection mechanism.
@@ -768,8 +763,8 @@ GetTDLinkPtr (
**/
VOID
EnableorDisableTDShortPacket (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsEnable
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsEnable
);
/**
@@ -781,8 +776,8 @@ EnableorDisableTDShortPacket (
**/
VOID
SetTDControlErrorCounter (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 MaxErrors
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 MaxErrors
);
/**
@@ -794,8 +789,8 @@ SetTDControlErrorCounter (
**/
VOID
SetTDLoworFullSpeedDevice (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsLowSpeedDevice
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsLowSpeedDevice
);
/**
@@ -807,8 +802,8 @@ SetTDLoworFullSpeedDevice (
**/
VOID
SetTDControlIsochronousorNot (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsIsochronous
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsIsochronous
);
/**
@@ -821,8 +816,8 @@ SetTDControlIsochronousorNot (
**/
VOID
SetorClearTDControlIOC (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsSet
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsSet
);
/**
@@ -834,8 +829,8 @@ SetorClearTDControlIOC (
**/
VOID
SetTDStatusActiveorInactive (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsActive
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsActive
);
/**
@@ -848,8 +843,8 @@ SetTDStatusActiveorInactive (
**/
UINT16
SetTDTokenMaxLength (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT16 MaxLen
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT16 MaxLen
);
/**
@@ -860,7 +855,7 @@ SetTDTokenMaxLength (
**/
VOID
SetTDTokenDataToggle1 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -871,7 +866,7 @@ SetTDTokenDataToggle1 (
**/
VOID
SetTDTokenDataToggle0 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -883,8 +878,8 @@ SetTDTokenDataToggle0 (
**/
VOID
SetTDTokenEndPoint (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN EndPoint
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN EndPoint
);
/**
@@ -896,8 +891,8 @@ SetTDTokenEndPoint (
**/
VOID
SetTDTokenDeviceAddress (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN DevAddr
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN DevAddr
);
/**
@@ -909,8 +904,8 @@ SetTDTokenDeviceAddress (
**/
VOID
SetTDTokenPacketID (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 PacketID
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 PacketID
);
/**
@@ -922,7 +917,7 @@ SetTDTokenPacketID (
**/
VOID
SetTDDataBuffer (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -935,7 +930,7 @@ SetTDDataBuffer (
**/
BOOLEAN
IsTDStatusActive (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -948,7 +943,7 @@ IsTDStatusActive (
**/
BOOLEAN
IsTDStatusStalled (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -961,7 +956,7 @@ IsTDStatusStalled (
**/
BOOLEAN
IsTDStatusBufferError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -974,7 +969,7 @@ IsTDStatusBufferError (
**/
BOOLEAN
IsTDStatusBabbleError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -987,7 +982,7 @@ IsTDStatusBabbleError (
**/
BOOLEAN
IsTDStatusNAKReceived (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1000,7 +995,7 @@ IsTDStatusNAKReceived (
**/
BOOLEAN
IsTDStatusCRCTimeOutError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1013,7 +1008,7 @@ IsTDStatusCRCTimeOutError (
**/
BOOLEAN
IsTDStatusBitStuffError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1026,7 +1021,7 @@ IsTDStatusBitStuffError (
**/
UINT16
GetTDStatusActualLength (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1039,7 +1034,7 @@ GetTDStatusActualLength (
**/
BOOLEAN
GetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1052,7 +1047,7 @@ GetTDLinkPtrValidorInvalid (
**/
UINTN
CountTDsNumber (
- IN TD_STRUCT *PtrFirstTD
+ IN TD_STRUCT *PtrFirstTD
);
/**
@@ -1064,8 +1059,8 @@ CountTDsNumber (
**/
VOID
LinkTDToQH (
- IN QH_STRUCT *PtrQH,
- IN TD_STRUCT *PtrTD
+ IN QH_STRUCT *PtrQH,
+ IN TD_STRUCT *PtrTD
);
/**
@@ -1077,8 +1072,8 @@ LinkTDToQH (
**/
VOID
LinkTDToTD (
- IN TD_STRUCT *PtrPreTD,
- IN TD_STRUCT *PtrTD
+ IN TD_STRUCT *PtrPreTD,
+ IN TD_STRUCT *PtrTD
);
/**
@@ -1097,11 +1092,11 @@ LinkTDToTD (
**/
EFI_STATUS
ExecuteControlTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- OUT UINTN *ActualLen,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ OUT UINTN *ActualLen,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -1121,12 +1116,12 @@ ExecuteControlTransfer (
**/
EFI_STATUS
ExecBulkTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- IN OUT UINTN *ActualLen,
- IN UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ IN OUT UINTN *ActualLen,
+ IN UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -1138,8 +1133,8 @@ ExecBulkTransfer (
**/
VOID
DeleteQueuedTDs (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrFirstTD
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrFirstTD
);
/**
@@ -1155,10 +1150,10 @@ DeleteQueuedTDs (
**/
BOOLEAN
CheckTDsResults (
- IN TD_STRUCT *PtrTD,
- OUT UINT32 *Result,
- OUT UINTN *ErrTDPos,
- OUT UINTN *ActualTransferSize
+ IN TD_STRUCT *PtrTD,
+ OUT UINT32 *Result,
+ OUT UINTN *ErrTDPos,
+ OUT UINTN *ActualTransferSize
);
/**
@@ -1190,7 +1185,7 @@ CreateMemoryBlock (
**/
EFI_STATUS
InitializeMemoryManagement (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
);
/**
@@ -1206,9 +1201,9 @@ InitializeMemoryManagement (
**/
EFI_STATUS
UhcAllocatePool (
- IN USB_UHC_DEV *UhcDev,
- OUT UINT8 **Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ OUT UINT8 **Pool,
+ IN UINTN AllocSize
);
/**
@@ -1239,9 +1234,9 @@ AllocMemInMemoryBlock (
**/
VOID
UhcFreePool (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 *Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 *Pool,
+ IN UINTN AllocSize
);
/**
@@ -1257,7 +1252,6 @@ InsertMemoryHeaderToList (
IN MEMORY_MANAGE_HEADER *NewMemoryHeader
);
-
/**
Map address of request structure buffer.
@@ -1272,10 +1266,10 @@ InsertMemoryHeaderToList (
**/
EFI_STATUS
UhciMapUserRequest (
- IN USB_UHC_DEV *Uhc,
- IN OUT VOID *Request,
- OUT UINT8 **MappedAddr,
- OUT VOID **Map
+ IN USB_UHC_DEV *Uhc,
+ IN OUT VOID *Request,
+ OUT UINT8 **MappedAddr,
+ OUT VOID **Map
);
/**
@@ -1343,8 +1337,8 @@ IoMmuMap (
**/
VOID
IoMmuUnmap (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN VOID *Mapping
);
/**
@@ -1375,7 +1369,6 @@ IoMmuAllocateBuffer (
OUT VOID **Mapping
);
-
/**
Initialize IOMMU.
@@ -1384,7 +1377,7 @@ IoMmuAllocateBuffer (
**/
VOID
IoMmuInit (
- OUT EDKII_IOMMU_PPI **IoMmu
+ OUT EDKII_IOMMU_PPI **IoMmu
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.c b/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.c
index 9e2697b822..e3af49c8c9 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.c
@@ -21,15 +21,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gXhciComponentName =
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) XhciComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) XhciComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)XhciComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)XhciComponentNameGetControllerName,
"en"
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mXhciDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mXhciDriverNameTable[] = {
{ "eng;en", L"Usb Xhci Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -166,9 +166,9 @@ XhciComponentNameGetControllerName (
OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- EFI_USB2_HC_PROTOCOL *Usb2Hc;
- USB_XHCI_INSTANCE *XhciDev;
+ EFI_STATUS Status;
+ EFI_USB2_HC_PROTOCOL *Usb2Hc;
+ USB_XHCI_INSTANCE *XhciDev;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -195,7 +195,7 @@ XhciComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
gXhciDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -213,5 +213,4 @@ XhciComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gXhciComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.h b/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.h
index 13fbde1658..103ad60575 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/ComponentName.h
@@ -57,7 +57,6 @@ XhciComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -137,4 +136,3 @@ XhciComponentNameGetControllerName (
);
#endif
-
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
index 005820e011..99fb3521d5 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c
@@ -7,10 +7,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "Xhci.h"
-
/**
Allocate a block of memory to be used by the buffer pool.
@@ -22,17 +20,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USBHC_MEM_BLOCK *
UsbHcAllocMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Pages
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Pages
)
{
- USBHC_MEM_BLOCK *Block;
- EFI_PCI_IO_PROTOCOL *PciIo;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- UINTN Bytes;
- EFI_STATUS Status;
+ USBHC_MEM_BLOCK *Block;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ UINTN Bytes;
+ EFI_STATUS Status;
PciIo = Pool->PciIo;
@@ -47,9 +45,9 @@ UsbHcAllocMemBlock (
//
ASSERT (USBHC_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
- Block->Bits = AllocateZeroPool (Block->BitsLen);
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
+ Block->Bits = AllocateZeroPool (Block->BitsLen);
if (Block->Bits == NULL) {
gBS->FreePool (Block);
@@ -73,7 +71,7 @@ UsbHcAllocMemBlock (
goto FREE_BITARRAY;
}
- Bytes = EFI_PAGES_TO_SIZE (Pages);
+ Bytes = EFI_PAGES_TO_SIZE (Pages);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
@@ -87,9 +85,9 @@ UsbHcAllocMemBlock (
goto FREE_BUFFER;
}
- Block->BufHost = BufHost;
- Block->Buf = (UINT8 *) ((UINTN) MappedAddr);
- Block->Mapping = Mapping;
+ Block->BufHost = BufHost;
+ Block->Buf = (UINT8 *)((UINTN)MappedAddr);
+ Block->Mapping = Mapping;
return Block;
@@ -102,7 +100,6 @@ FREE_BITARRAY:
return NULL;
}
-
/**
Free the memory block from the memory pool.
@@ -112,11 +109,11 @@ FREE_BITARRAY:
**/
VOID
UsbHcFreeMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_POOL *Pool,
+ IN USBHC_MEM_BLOCK *Block
)
{
- EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_PCI_IO_PROTOCOL *PciIo;
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -132,7 +129,6 @@ UsbHcFreeMemBlock (
gBS->FreePool (Block);
}
-
/**
Alloc some memory from the block.
@@ -145,22 +141,22 @@ UsbHcFreeMemBlock (
**/
VOID *
UsbHcAllocMemFromBlock (
- IN USBHC_MEM_BLOCK *Block,
- IN UINTN Units
+ IN USBHC_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -176,13 +172,12 @@ UsbHcAllocMemFromBlock (
}
NEXT_BIT (Byte, Bit);
-
} else {
NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -193,13 +188,13 @@ UsbHcAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -218,16 +213,16 @@ UsbHcAllocMemFromBlock (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddrForHostAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINTN AllocSize;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINTN Offset;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINTN AllocSize;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -241,7 +236,7 @@ UsbHcGetPciAddrForHostAddr (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
+ if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
@@ -250,8 +245,8 @@ UsbHcGetPciAddrForHostAddr (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *)Mem - Block->BufHost;
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
+ Offset = (UINT8 *)Mem - Block->BufHost;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
}
@@ -267,16 +262,16 @@ UsbHcGetPciAddrForHostAddr (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetHostAddrForPciAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINTN AllocSize;
- EFI_PHYSICAL_ADDRESS HostAddr;
- UINTN Offset;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINTN AllocSize;
+ EFI_PHYSICAL_ADDRESS HostAddr;
+ UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -290,7 +285,7 @@ UsbHcGetHostAddrForPciAddr (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->Buf <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->Buf + Block->BufLen))) {
+ if ((Block->Buf <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->Buf + Block->BufLen))) {
break;
}
}
@@ -299,8 +294,8 @@ UsbHcGetHostAddrForPciAddr (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *)Mem - Block->Buf;
- HostAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->BufHost + Offset);
+ Offset = (UINT8 *)Mem - Block->Buf;
+ HostAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->BufHost + Offset);
return HostAddr;
}
@@ -313,8 +308,8 @@ UsbHcGetHostAddrForPciAddr (
**/
VOID
UsbHcInsertMemBlockToPool (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -322,7 +317,6 @@ UsbHcInsertMemBlockToPool (
Head->Next = Block;
}
-
/**
Is the memory block empty?
@@ -334,10 +328,10 @@ UsbHcInsertMemBlockToPool (
**/
BOOLEAN
UsbHcIsMemBlockEmpty (
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Block
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -348,7 +342,6 @@ UsbHcIsMemBlockEmpty (
return TRUE;
}
-
/**
Unlink the memory block from the pool's list.
@@ -358,11 +351,11 @@ UsbHcIsMemBlockEmpty (
**/
VOID
UsbHcUnlinkMemBlock (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *BlockToUnlink
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *BlockToUnlink
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT ((Head != NULL) && (BlockToUnlink != NULL));
@@ -375,7 +368,6 @@ UsbHcUnlinkMemBlock (
}
}
-
/**
Initialize the memory management pool for the host controller.
@@ -390,7 +382,7 @@ UsbHcInitMemPool (
IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
- USBHC_MEM_POOL *Pool;
+ USBHC_MEM_POOL *Pool;
Pool = AllocatePool (sizeof (USBHC_MEM_POOL));
@@ -398,8 +390,8 @@ UsbHcInitMemPool (
return Pool;
}
- Pool->PciIo = PciIo;
- Pool->Head = UsbHcAllocMemBlock (Pool, USBHC_MEM_DEFAULT_PAGES);
+ Pool->PciIo = PciIo;
+ Pool->Head = UsbHcAllocMemBlock (Pool, USBHC_MEM_DEFAULT_PAGES);
if (Pool->Head == NULL) {
gBS->FreePool (Pool);
@@ -409,7 +401,6 @@ UsbHcInitMemPool (
return Pool;
}
-
/**
Release the memory management pool.
@@ -421,10 +412,10 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -443,7 +434,6 @@ UsbHcFreeMemPool (
return EFI_SUCCESS;
}
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -456,16 +446,16 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- USBHC_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -520,7 +510,6 @@ UsbHcAllocateMem (
return Mem;
}
-
/**
Free the allocated memory back to the memory pool.
@@ -531,22 +520,22 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -557,8 +546,8 @@ UsbHcFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -566,7 +555,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -589,7 +578,7 @@ UsbHcFreeMem (
UsbHcFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
/**
@@ -621,13 +610,13 @@ UsbHcAllocateAlignedPages (
OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- VOID *Memory;
- UINTN AlignedMemory;
- UINTN AlignmentMask;
- UINTN UnalignedPages;
- UINTN RealPages;
- UINTN Bytes;
+ EFI_STATUS Status;
+ VOID *Memory;
+ UINTN AlignedMemory;
+ UINTN AlignmentMask;
+ UINTN UnalignedPages;
+ UINTN RealPages;
+ UINTN Bytes;
//
// Alignment must be a power of two or zero.
@@ -641,12 +630,13 @@ UsbHcAllocateAlignedPages (
if (Pages == 0) {
return EFI_INVALID_PARAMETER;
}
+
if (Alignment > EFI_PAGE_SIZE) {
//
// Calculate the total number of pages since alignment is larger than page size.
//
- AlignmentMask = Alignment - 1;
- RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment);
+ AlignmentMask = Alignment - 1;
+ RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment);
//
// Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not overflow.
//
@@ -663,8 +653,9 @@ UsbHcAllocateAlignedPages (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- AlignedMemory = ((UINTN) Memory + AlignmentMask) & ~AlignmentMask;
- UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN) Memory);
+
+ AlignedMemory = ((UINTN)Memory + AlignmentMask) & ~AlignmentMask;
+ UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN)Memory);
if (UnalignedPages > 0) {
//
// Free first unaligned page(s).
@@ -672,6 +663,7 @@ UsbHcAllocateAlignedPages (
Status = PciIo->FreeBuffer (PciIo, UnalignedPages, Memory);
ASSERT_EFI_ERROR (Status);
}
+
Memory = (VOID *)(UINTN)(AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
UnalignedPages = RealPages - Pages - UnalignedPages;
if (UnalignedPages > 0) {
@@ -696,25 +688,26 @@ UsbHcAllocateAlignedPages (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- AlignedMemory = (UINTN) Memory;
+
+ AlignedMemory = (UINTN)Memory;
}
- Bytes = EFI_PAGES_TO_SIZE (Pages);
+ Bytes = EFI_PAGES_TO_SIZE (Pages);
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
- (VOID *) AlignedMemory,
+ (VOID *)AlignedMemory,
&Bytes,
DeviceAddress,
Mapping
);
if (EFI_ERROR (Status) || (Bytes != EFI_PAGES_TO_SIZE (Pages))) {
- Status = PciIo->FreeBuffer (PciIo, Pages, (VOID *) AlignedMemory);
+ Status = PciIo->FreeBuffer (PciIo, Pages, (VOID *)AlignedMemory);
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *) AlignedMemory;
+ *HostAddress = (VOID *)AlignedMemory;
return EFI_SUCCESS;
}
@@ -730,13 +723,13 @@ UsbHcAllocateAlignedPages (
**/
VOID
UsbHcFreeAlignedPages (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN VOID *HostAddress,
- IN UINTN Pages,
- VOID *Mapping
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN VOID *HostAddress,
+ IN UINTN Pages,
+ VOID *Mapping
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Pages != 0);
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.h b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.h
index 319110da3a..48ae86141c 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.h
@@ -10,20 +10,20 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_XHCI_MEM_H_
#define _EFI_XHCI_MEM_H_
-#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
+#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
#define USB_HC_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
struct _USBHC_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- USBHC_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ USBHC_MEM_BLOCK *Next;
};
//
@@ -32,16 +32,16 @@ struct _USBHC_MEM_BLOCK {
// data to be on the same 4G memory.
//
typedef struct _USBHC_MEM_POOL {
- EFI_PCI_IO_PROTOCOL *PciIo;
- BOOLEAN Check4G;
- UINT32 Which4G;
- USBHC_MEM_BLOCK *Head;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ BOOLEAN Check4G;
+ UINT32 Which4G;
+ USBHC_MEM_BLOCK *Head;
} USBHC_MEM_POOL;
//
// Memory allocation unit, must be 2^n, n>4
//
-#define USBHC_MEM_UNIT 64
+#define USBHC_MEM_UNIT 64
#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
#define USBHC_MEM_DEFAULT_PAGES 16
@@ -60,8 +60,6 @@ typedef struct _USBHC_MEM_POOL {
} \
} while (0)
-
-
/**
Initialize the memory management pool for the host controller.
@@ -76,7 +74,6 @@ UsbHcInitMemPool (
IN EFI_PCI_IO_PROTOCOL *PciIo
);
-
/**
Release the memory management pool.
@@ -88,10 +85,9 @@ UsbHcInitMemPool (
**/
EFI_STATUS
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
);
-
/**
Allocate some memory from the host controller's memory pool
which can be used to communicate with host controller.
@@ -104,11 +100,10 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
);
-
/**
Free the allocated memory back to the memory pool.
@@ -119,9 +114,9 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -136,9 +131,9 @@ UsbHcFreeMem (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddrForHostAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -153,9 +148,9 @@ UsbHcGetPciAddrForHostAddr (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetHostAddrForPciAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -198,10 +193,10 @@ UsbHcAllocateAlignedPages (
**/
VOID
UsbHcFreeAlignedPages (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN VOID *HostAddress,
- IN UINTN Pages,
- VOID *Mapping
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN VOID *HostAddress,
+ IN UINTN Pages,
+ VOID *Mapping
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 5a1f907ff0..b79499e225 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -13,46 +13,46 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// to the UEFI protocol's port state (change).
//
USB_PORT_STATE_MAP mUsbPortStateMap[] = {
- {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
- {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
- {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
- {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
+ { XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
+ { XHC_PORTSC_PED, USB_PORT_STAT_ENABLE },
+ { XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
+ { XHC_PORTSC_RESET, USB_PORT_STAT_RESET }
};
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
- {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
- {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
- {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
- {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
+ { XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
+ { XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
+ { XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
+ { XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET }
};
-USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
- {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
- {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
- {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
- {XHC_PORTSC_PRC, EfiUsbPortResetChange}
+USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
+ { XHC_PORTSC_CSC, EfiUsbPortConnectChange },
+ { XHC_PORTSC_PEC, EfiUsbPortEnableChange },
+ { XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange },
+ { XHC_PORTSC_PRC, EfiUsbPortResetChange }
};
USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
- {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
- {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
- {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
- {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
+ { XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
+ { XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE },
+ { XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
+ { XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET }
};
USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
- {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
- {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
- {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
- {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
+ { XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
+ { XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
+ { XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
+ { XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET }
};
-USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
- {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
- {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
- {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
- {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
- {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
+USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
+ { XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange },
+ { XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange },
+ { XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange },
+ { XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange },
+ { XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange }
};
EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
@@ -67,7 +67,7 @@ EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
//
// Template for Xhci's Usb2 Host Controller Protocol Instance.
//
-EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
+EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
XhcGetCapability,
XhcReset,
XhcGetState,
@@ -114,12 +114,12 @@ XhcGetCapability (
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (XHC_TPL);
+ OldTpl = gBS->RaiseTPL (XHC_TPL);
Xhc = XHC_FROM_THIS (This);
*MaxSpeed = EFI_USB_SPEED_SUPER;
- *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
- *Is64BitCapable = (UINT8) Xhc->Support64BitDma;
+ *PortNumber = (UINT8)(Xhc->HcSParams1.Data.MaxPorts);
+ *Is64BitCapable = (UINT8)Xhc->Support64BitDma;
DEBUG ((DEBUG_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
gBS->RestoreTPL (OldTpl);
@@ -127,7 +127,6 @@ XhcGetCapability (
return EFI_SUCCESS;
}
-
/**
Provides software reset for the USB host controller.
@@ -168,51 +167,54 @@ XhcReset (
OldTpl = gBS->RaiseTPL (XHC_TPL);
switch (Attributes) {
- case EFI_USB_HC_RESET_GLOBAL:
- //
- // Flow through, same behavior as Host Controller Reset
- //
- case EFI_USB_HC_RESET_HOST_CONTROLLER:
- if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
- ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
- Status = EFI_SUCCESS;
- goto ON_EXIT;
- }
+ case EFI_USB_HC_RESET_GLOBAL:
//
- // Host Controller must be Halt when Reset it
+ // Flow through, same behavior as Host Controller Reset
//
- if (!XhcIsHalt (Xhc)) {
- Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
+ case EFI_USB_HC_RESET_HOST_CONTROLLER:
+ if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
+ ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0))
+ {
+ Status = EFI_SUCCESS;
+ goto ON_EXIT;
+ }
+
+ //
+ // Host Controller must be Halt when Reset it
+ //
+ if (!XhcIsHalt (Xhc)) {
+ Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
+
+ if (EFI_ERROR (Status)) {
+ Status = EFI_DEVICE_ERROR;
+ goto ON_EXIT;
+ }
+ }
+
+ Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
+ ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}
- }
-
- Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
- ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
- if (EFI_ERROR (Status)) {
- goto ON_EXIT;
- }
- //
- // Clean up the asynchronous transfers, currently only
- // interrupt supports asynchronous operation.
- //
- XhciDelAllAsyncIntTransfers (Xhc);
- XhcFreeSched (Xhc);
+ //
+ // Clean up the asynchronous transfers, currently only
+ // interrupt supports asynchronous operation.
+ //
+ XhciDelAllAsyncIntTransfers (Xhc);
+ XhcFreeSched (Xhc);
- XhcInitSched (Xhc);
- break;
+ XhcInitSched (Xhc);
+ break;
- case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
- case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
- Status = EFI_UNSUPPORTED;
- break;
+ case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
+ case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
+ Status = EFI_UNSUPPORTED;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -222,7 +224,6 @@ ON_EXIT:
return Status;
}
-
/**
Retrieve the current state of the USB host controller.
@@ -252,7 +253,7 @@ XhcGetState (
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
*State = EfiUsbHcStateHalt;
@@ -285,10 +286,10 @@ XhcSetState (
IN EFI_USB_HC_STATE State
)
{
- USB_XHCI_INSTANCE *Xhc;
- EFI_STATUS Status;
- EFI_USB_HC_STATE CurState;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ EFI_STATUS Status;
+ EFI_USB_HC_STATE CurState;
+ EFI_TPL OldTpl;
Status = XhcGetState (This, &CurState);
@@ -302,38 +303,38 @@ XhcSetState (
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
switch (State) {
- case EfiUsbHcStateHalt:
- Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
- break;
-
- case EfiUsbHcStateOperational:
- if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
- Status = EFI_DEVICE_ERROR;
+ case EfiUsbHcStateHalt:
+ Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
break;
- }
- //
- // Software must not write a one to this field unless the host controller
- // is in the Halted state. Doing so will yield undefined results.
- // refers to Spec[XHCI1.0-2.3.1]
- //
- if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
- Status = EFI_DEVICE_ERROR;
- break;
- }
+ case EfiUsbHcStateOperational:
+ if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
+ Status = EFI_DEVICE_ERROR;
+ break;
+ }
- Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
- break;
+ //
+ // Software must not write a one to this field unless the host controller
+ // is in the Halted state. Doing so will yield undefined results.
+ // refers to Spec[XHCI1.0-2.3.1]
+ //
+ if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
+ Status = EFI_DEVICE_ERROR;
+ break;
+ }
- case EfiUsbHcStateSuspend:
- Status = EFI_UNSUPPORTED;
- break;
+ Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ case EfiUsbHcStateSuspend:
+ Status = EFI_UNSUPPORTED;
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
DEBUG ((DEBUG_INFO, "XhcSetState: status %r\n", Status));
@@ -364,15 +365,15 @@ XhcGetRootHubPortStatus (
OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- USB_XHCI_INSTANCE *Xhc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- UINTN Index;
- UINTN MapSize;
- EFI_STATUS Status;
- USB_DEV_ROUTE ParentRouteChart;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ UINTN Index;
+ UINTN MapSize;
+ EFI_STATUS Status;
+ USB_DEV_ROUTE ParentRouteChart;
+ EFI_TPL OldTpl;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
@@ -380,8 +381,8 @@ XhcGetRootHubPortStatus (
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
- Status = EFI_SUCCESS;
+ Xhc = XHC_FROM_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = Xhc->HcSParams1.Data.MaxPorts;
@@ -390,7 +391,7 @@ XhcGetRootHubPortStatus (
goto ON_EXIT;
}
- Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
+ Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
PortStatus->PortStatus = 0;
PortStatus->PortChangeStatus = 0;
@@ -401,21 +402,21 @@ XhcGetRootHubPortStatus (
// bit 10~13 of the root port status register identifies the speed of the attached device.
//
switch ((State & XHC_PORTSC_PS) >> 10) {
- case 2:
- PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
- break;
+ case 2:
+ PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
+ break;
- case 3:
- PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
- break;
+ case 3:
+ PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
+ break;
- case 4:
- case 5:
- PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
- break;
+ case 4:
+ case 5:
+ PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
+ break;
- default:
- break;
+ default:
+ break;
}
//
@@ -425,9 +426,10 @@ XhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
+
//
// Bit5~8 reflects its current link state.
//
@@ -439,7 +441,7 @@ XhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -463,7 +465,6 @@ ON_EXIT:
return Status;
}
-
/**
Sets a feature for the specified root hub port.
@@ -484,12 +485,12 @@ XhcSetRootHubPortFeature (
IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_XHCI_INSTANCE *Xhc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (XHC_TPL);
@@ -503,71 +504,71 @@ XhcSetRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
+ Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
State = XhcReadOpReg (Xhc, Offset);
//
// Mask off the port status change bits, these bits are
// write clean bit
//
- State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
+ State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
- // A port may be disabled by software writing a '1' to this flag.
- //
- Status = EFI_SUCCESS;
- break;
-
- case EfiUsbPortSuspend:
- State |= XHC_PORTSC_LWS;
- XhcWriteOpReg (Xhc, Offset, State);
- State &= ~XHC_PORTSC_PLS;
- State |= (3 << 5) ;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
-
- case EfiUsbPortReset:
- DEBUG ((DEBUG_INFO, "XhcUsbPortReset!\n"));
- //
- // Make sure Host Controller not halt before reset it
- //
- if (XhcIsHalt (Xhc)) {
- Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
+ case EfiUsbPortEnable:
+ //
+ // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
+ // A port may be disabled by software writing a '1' to this flag.
+ //
+ Status = EFI_SUCCESS;
+ break;
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
- break;
+ case EfiUsbPortSuspend:
+ State |= XHC_PORTSC_LWS;
+ XhcWriteOpReg (Xhc, Offset, State);
+ State &= ~XHC_PORTSC_PLS;
+ State |= (3 << 5);
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
+
+ case EfiUsbPortReset:
+ DEBUG ((DEBUG_INFO, "XhcUsbPortReset!\n"));
+ //
+ // Make sure Host Controller not halt before reset it
+ //
+ if (XhcIsHalt (Xhc)) {
+ Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
+ break;
+ }
}
- }
- //
- // 4.3.1 Resetting a Root Hub Port
- // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
- //
- State |= XHC_PORTSC_RESET;
- XhcWriteOpReg (Xhc, Offset, State);
- XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
- break;
+ //
+ // 4.3.1 Resetting a Root Hub Port
+ // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
+ //
+ State |= XHC_PORTSC_RESET;
+ XhcWriteOpReg (Xhc, Offset, State);
+ XhcWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
+ break;
- case EfiUsbPortPower:
- //
- // Not supported, ignore the operation
- //
- Status = EFI_SUCCESS;
- break;
+ case EfiUsbPortPower:
+ //
+ // Not supported, ignore the operation
+ //
+ Status = EFI_SUCCESS;
+ break;
- case EfiUsbPortOwner:
- //
- // XHCI root hub port don't has the owner bit, ignore the operation
- //
- Status = EFI_SUCCESS;
- break;
+ case EfiUsbPortOwner:
+ //
+ // XHCI root hub port don't has the owner bit, ignore the operation
+ //
+ Status = EFI_SUCCESS;
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -577,7 +578,6 @@ ON_EXIT:
return Status;
}
-
/**
Clears a feature for the specified root hub port.
@@ -601,17 +601,17 @@ XhcClearRootHubPortFeature (
IN EFI_USB_PORT_FEATURE PortFeature
)
{
- USB_XHCI_INSTANCE *Xhc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
- Status = EFI_SUCCESS;
+ Xhc = XHC_FROM_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
@@ -627,82 +627,82 @@ XhcClearRootHubPortFeature (
// write clean bit
//
State = XhcReadOpReg (Xhc, Offset);
- State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
+ State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
- // A port may be disabled by software writing a '1' to this flag.
- //
- State |= XHC_PORTSC_PED;
- State &= ~XHC_PORTSC_RESET;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
-
- case EfiUsbPortSuspend:
- State |= XHC_PORTSC_LWS;
- XhcWriteOpReg (Xhc, Offset, State);
- State &= ~XHC_PORTSC_PLS;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
-
- case EfiUsbPortReset:
- //
- // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
- // Register bits indicate status when read, a clear bit may be set by
- // writing a '1'. Writing a '0' to RW1S bits has no effect.
- //
- break;
+ case EfiUsbPortEnable:
+ //
+ // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
+ // A port may be disabled by software writing a '1' to this flag.
+ //
+ State |= XHC_PORTSC_PED;
+ State &= ~XHC_PORTSC_RESET;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
- case EfiUsbPortOwner:
- //
- // XHCI root hub port don't has the owner bit, ignore the operation
- //
- break;
+ case EfiUsbPortSuspend:
+ State |= XHC_PORTSC_LWS;
+ XhcWriteOpReg (Xhc, Offset, State);
+ State &= ~XHC_PORTSC_PLS;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
- case EfiUsbPortConnectChange:
- //
- // Clear connect status change
- //
- State |= XHC_PORTSC_CSC;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
+ case EfiUsbPortReset:
+ //
+ // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
+ // Register bits indicate status when read, a clear bit may be set by
+ // writing a '1'. Writing a '0' to RW1S bits has no effect.
+ //
+ break;
- case EfiUsbPortEnableChange:
- //
- // Clear enable status change
- //
- State |= XHC_PORTSC_PEC;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ //
+ // XHCI root hub port don't has the owner bit, ignore the operation
+ //
+ break;
- case EfiUsbPortOverCurrentChange:
- //
- // Clear PortOverCurrent change
- //
- State |= XHC_PORTSC_OCC;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
+ case EfiUsbPortConnectChange:
+ //
+ // Clear connect status change
+ //
+ State |= XHC_PORTSC_CSC;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
- case EfiUsbPortResetChange:
- //
- // Clear Port Reset change
- //
- State |= XHC_PORTSC_PRC;
- XhcWriteOpReg (Xhc, Offset, State);
- break;
+ case EfiUsbPortEnableChange:
+ //
+ // Clear enable status change
+ //
+ State |= XHC_PORTSC_PEC;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
- case EfiUsbPortPower:
- case EfiUsbPortSuspendChange:
- //
- // Not supported or not related operation
- //
- break;
+ case EfiUsbPortOverCurrentChange:
+ //
+ // Clear PortOverCurrent change
+ //
+ State |= XHC_PORTSC_OCC;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
- break;
+ case EfiUsbPortResetChange:
+ //
+ // Clear Port Reset change
+ //
+ State |= XHC_PORTSC_PRC;
+ XhcWriteOpReg (Xhc, Offset, State);
+ break;
+
+ case EfiUsbPortPower:
+ case EfiUsbPortSuspendChange:
+ //
+ // Not supported or not related operation
+ //
+ break;
+
+ default:
+ Status = EFI_INVALID_PARAMETER;
+ break;
}
ON_EXIT:
@@ -737,22 +737,22 @@ ON_EXIT:
**/
EFI_STATUS
XhcTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout,
- OUT UINT32 *TransferResult
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *TransferResult
)
{
- EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
- URB *Urb;
+ EFI_STATUS Status;
+ EFI_STATUS RecoveryStatus;
+ URB *Urb;
ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
Urb = XhcCreateUrb (
@@ -780,7 +780,7 @@ XhcTransfer (
//
// The transfer timed out. Abort the transfer by dequeueing of the TD.
//
- RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
+ RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
if (RecoveryStatus == EFI_ALREADY_STARTED) {
//
// The URB is finished just before stopping endpoint.
@@ -789,8 +789,8 @@ XhcTransfer (
ASSERT (Urb->Result == EFI_USB_NOERROR);
Status = EFI_SUCCESS;
DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
- } else if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
+ } else if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
}
}
@@ -799,7 +799,7 @@ XhcTransfer (
if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
ASSERT (Status == EFI_DEVICE_ERROR);
- RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
+ RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
if (EFI_ERROR (RecoveryStatus)) {
DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
}
@@ -876,24 +876,28 @@ XhcControlTransfer (
if ((TransferDirection != EfiUsbDataIn) &&
(TransferDirection != EfiUsbDataOut) &&
- (TransferDirection != EfiUsbNoData)) {
+ (TransferDirection != EfiUsbNoData))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection == EfiUsbNoData) &&
- ((Data != NULL) || (*DataLength != 0))) {
+ ((Data != NULL) || (*DataLength != 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection != EfiUsbNoData) &&
- ((Data == NULL) || (*DataLength == 0))) {
+ ((Data == NULL) || (*DataLength == 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
(MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
(MaximumPacketLength != 512)
- ) {
+ )
+ {
return EFI_INVALID_PARAMETER;
}
@@ -907,7 +911,7 @@ XhcControlTransfer (
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
Status = EFI_DEVICE_ERROR;
*TransferResult = EFI_USB_ERR_SYSTEM;
@@ -931,7 +935,8 @@ XhcControlTransfer (
// According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
//
if ((Request->Request == USB_REQ_SET_ADDRESS) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
+ {
//
// Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
// This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
@@ -939,7 +944,8 @@ XhcControlTransfer (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
- (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
+ (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value))
+ {
Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
}
}
@@ -948,6 +954,7 @@ XhcControlTransfer (
Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}
+
//
// The actual device address has been assigned by XHCI during initializing the device slot.
// So we just need establish the mapping relationship between the device address requested from UsbBus
@@ -955,7 +962,7 @@ XhcControlTransfer (
// can find out the actual device address by it.
//
Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
goto ON_EXIT;
}
@@ -966,20 +973,20 @@ XhcControlTransfer (
// endpoint is bidirectional. XhcCreateUrb expects this
// combination of Ep addr and its direction.
//
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Status = XhcTransfer (
- Xhc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- MaximumPacketLength,
- XHC_CTRL_TRANSFER,
- Request,
- Data,
- DataLength,
- Timeout,
- TransferResult
- );
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
+ Status = XhcTransfer (
+ Xhc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ MaximumPacketLength,
+ XHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ DataLength,
+ Timeout,
+ TransferResult
+ );
if (EFI_ERROR (Status)) {
goto ON_EXIT;
@@ -992,28 +999,30 @@ XhcControlTransfer (
//
if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
- ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
+ ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE)))))
+ {
DescriptorType = (UINT8)(Request->Value >> 8);
if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
- ASSERT (Data != NULL);
+ ASSERT (Data != NULL);
+ //
+ // Store a copy of device scriptor as hub device need this info to configure endpoint.
+ //
+ CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
+ if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
//
- // Store a copy of device scriptor as hub device need this info to configure endpoint.
+ // If it's a usb3.0 device, then its max packet size is a 2^n.
//
- CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
- if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
- //
- // If it's a usb3.0 device, then its max packet size is a 2^n.
- //
- MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
- } else {
- MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
- }
- Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
- if (Xhc->HcCParams.Data.Csz == 0) {
- Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
- } else {
- Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
- }
+ MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
+ } else {
+ MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
+ }
+
+ Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
+ if (Xhc->HcCParams.Data.Csz == 0) {
+ Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
+ } else {
+ Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
+ }
} else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
ASSERT (Data != NULL);
if (*DataLength == ((UINT16 *)Data)[1]) {
@@ -1022,7 +1031,7 @@ XhcControlTransfer (
//
Index = (UINT8)Request->Value;
ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
- Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
+ Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool (*DataLength);
CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
//
// Default to use AlternateSetting 0 for all interfaces.
@@ -1030,7 +1039,8 @@ XhcControlTransfer (
Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
}
} else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
- (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
+ (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2))
+ {
ASSERT (Data != NULL);
HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
ASSERT (HubDesc->NumPorts <= 15);
@@ -1055,7 +1065,8 @@ XhcControlTransfer (
}
}
} else if ((Request->Request == USB_REQ_SET_CONFIG) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
+ {
//
// Hook Set_Config request from UsbBus as we need configure device endpoint.
//
@@ -1066,17 +1077,19 @@ XhcControlTransfer (
} else {
Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
}
+
break;
}
}
} else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE)))
+ {
//
// Hook Set_Interface request from UsbBus as we need configure interface setting.
// Request->Value indicates AlterlateSetting to set
// Request->Index indicates Interface to set
//
- if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
+ if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8)Request->Index] != (UINT8)Request->Value) {
if (Xhc->HcCParams.Data.Csz == 0) {
Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
} else {
@@ -1084,7 +1097,8 @@ XhcControlTransfer (
}
}
} else if ((Request->Request == USB_REQ_GET_STATUS) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)))
+ {
ASSERT (Data != NULL);
//
// Hook Get_Status request from UsbBus to keep track of the port status change.
@@ -1117,14 +1131,14 @@ XhcControlTransfer (
MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
- PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
+ PortStatus.PortStatus = (UINT16)(PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
}
}
MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
- PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
+ PortStatus.PortChangeStatus = (UINT16)(PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
}
}
@@ -1133,11 +1147,11 @@ XhcControlTransfer (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
- ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
- ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
- ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
- ClearPortRequest.Index = Request->Index;
- ClearPortRequest.Length = 0;
+ ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
+ ClearPortRequest.Request = (UINT8)USB_REQ_CLEAR_FEATURE;
+ ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
+ ClearPortRequest.Index = Request->Index;
+ ClearPortRequest.Length = 0;
XhcControlTransfer (
This,
@@ -1157,7 +1171,7 @@ XhcControlTransfer (
XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
- *(UINT32 *)Data = *(UINT32*)&PortStatus;
+ *(UINT32 *)Data = *(UINT32 *)&PortStatus;
}
ON_EXIT:
@@ -1170,7 +1184,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits bulk transfer to a bulk endpoint of a USB device.
@@ -1218,16 +1231,17 @@ XhcBulkTransfer (
OUT UINT32 *TransferResult
)
{
- USB_XHCI_INSTANCE *Xhc;
- UINT8 SlotId;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ UINT8 SlotId;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
//
// Validate the parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1238,13 +1252,14 @@ XhcBulkTransfer (
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
- ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
+ ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024)))
+ {
return EFI_INVALID_PARAMETER;
}
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -1284,6 +1299,7 @@ ON_EXIT:
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
}
+
gBS->RestoreTPL (OldTpl);
return Status;
@@ -1335,12 +1351,12 @@ XhcAsyncInterruptTransfer (
IN VOID *Context OPTIONAL
)
{
- USB_XHCI_INSTANCE *Xhc;
- URB *Urb;
- EFI_STATUS Status;
- UINT8 SlotId;
- UINT8 Index;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ URB *Urb;
+ EFI_STATUS Status;
+ UINT8 SlotId;
+ UINT8 Index;
+ EFI_TPL OldTpl;
//
// Validate parameters
@@ -1365,7 +1381,7 @@ XhcAsyncInterruptTransfer (
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
//
// Delete Async interrupt transfer request.
@@ -1433,7 +1449,6 @@ ON_EXIT:
return Status;
}
-
/**
Submits synchronous interrupt transfer to an interrupt endpoint
of a USB device.
@@ -1477,16 +1492,17 @@ XhcSyncInterruptTransfer (
OUT UINT32 *TransferResult
)
{
- USB_XHCI_INSTANCE *Xhc;
- UINT8 SlotId;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ UINT8 SlotId;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
//
// Validates parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -1496,13 +1512,14 @@ XhcSyncInterruptTransfer (
if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
+ ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072)))
+ {
return EFI_INVALID_PARAMETER;
}
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = XHC_FROM_THIS (This);
+ Xhc = XHC_FROM_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -1538,12 +1555,12 @@ ON_EXIT:
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
}
+
gBS->RestoreTPL (OldTpl);
return Status;
}
-
/**
Submits isochronous transfer to a target USB device.
@@ -1583,7 +1600,6 @@ XhcIsochronousTransfer (
return EFI_UNSUPPORTED;
}
-
/**
Submits Async isochronous transfer to a target USB device.
@@ -1639,8 +1655,8 @@ XhcAsyncIsochronousTransfer (
EFI_STATUS
EFIAPI
XhcDriverEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EfiLibInstallDriverBindingComponentName2 (
@@ -1653,7 +1669,6 @@ XhcDriverEntryPoint (
);
}
-
/**
Test to see if this driver supports ControllerHandle. Any
ControllerHandle that has Usb2HcProtocol installed will
@@ -1670,14 +1685,14 @@ XhcDriverEntryPoint (
EFI_STATUS
EFIAPI
XhcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- USB_CLASSC UsbClassCReg;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ USB_CLASSC UsbClassCReg;
//
// Test whether there is PCI IO Protocol attached on the controller handle.
@@ -1685,7 +1700,7 @@ XhcDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1713,7 +1728,8 @@ XhcDriverBindingSupported (
//
if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
(UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
- (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
+ (UsbClassCReg.ProgInterface != PCI_IF_XHCI))
+ {
Status = EFI_UNSUPPORTED;
}
@@ -1739,18 +1755,18 @@ ON_EXIT:
otherwise NULL.
**/
-USB_XHCI_INSTANCE*
+USB_XHCI_INSTANCE *
XhcCreateUsbHc (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
IN UINT64 OriginalPciAttributes
)
{
- USB_XHCI_INSTANCE *Xhc;
- EFI_STATUS Status;
- UINT32 PageSize;
- UINT16 ExtCapReg;
- UINT8 ReleaseNumber;
+ USB_XHCI_INSTANCE *Xhc;
+ EFI_STATUS Status;
+ UINT32 PageSize;
+ UINT16 ExtCapReg;
+ UINT8 ReleaseNumber;
Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
@@ -1797,12 +1813,12 @@ XhcCreateUsbHc (
// This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
// if bit 0 is Set, the xHC supports 4k byte page sizes.
//
- PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
- Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
+ PageSize = XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
+ Xhc->PageSize = 1 << (HighBitSet32 (PageSize) + 12);
- ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
- Xhc->ExtCapRegBase = ExtCapReg << 2;
- Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
+ ExtCapReg = (UINT16)(Xhc->HcCParams.Data.ExtCapReg);
+ Xhc->ExtCapRegBase = ExtCapReg << 2;
+ Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
@@ -1854,7 +1870,7 @@ XhcExitBootService (
USB_XHCI_INSTANCE *Xhc;
EFI_PCI_IO_PROTOCOL *PciIo;
- Xhc = (USB_XHCI_INSTANCE*) Context;
+ Xhc = (USB_XHCI_INSTANCE *)Context;
PciIo = Xhc->PciIo;
//
@@ -1874,11 +1890,11 @@ XhcExitBootService (
// Restore original PCI attributes
//
PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- Xhc->OriginalPciAttributes,
- NULL
- );
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ Xhc->OriginalPciAttributes,
+ NULL
+ );
}
/**
@@ -1897,17 +1913,17 @@ XhcExitBootService (
EFI_STATUS
EFIAPI
XhcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Supports;
- UINT64 OriginalPciAttributes;
- BOOLEAN PciAttributesSaved;
- USB_XHCI_INSTANCE *Xhc;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 Supports;
+ UINT64 OriginalPciAttributes;
+ BOOLEAN PciAttributesSaved;
+ USB_XHCI_INSTANCE *Xhc;
EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
//
@@ -1916,7 +1932,7 @@ XhcDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
+ (VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1930,14 +1946,14 @@ XhcDriverBindingStart (
// Open Device Path Protocol for on USB host controller
//
HcDevicePath = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID **) &HcDevicePath,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **)&HcDevicePath,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
PciAttributesSaved = FALSE;
//
@@ -1953,6 +1969,7 @@ XhcDriverBindingStart (
if (EFI_ERROR (Status)) {
goto CLOSE_PCIIO;
}
+
PciAttributesSaved = TRUE;
Status = PciIo->Attributes (
@@ -1963,12 +1980,12 @@ XhcDriverBindingStart (
);
if (!EFI_ERROR (Status)) {
Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
+ Status = PciIo->Attributes (
+ PciIo,
+ EfiPciIoAttributeOperationEnable,
+ Supports,
+ NULL
+ );
}
if (EFI_ERROR (Status)) {
@@ -2000,9 +2017,13 @@ XhcDriverBindingStart (
if (!EFI_ERROR (Status)) {
Xhc->Support64BitDma = TRUE;
} else {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
- __FUNCTION__, Controller, Status));
+ __FUNCTION__,
+ Controller,
+ Status
+ ));
}
}
@@ -2025,7 +2046,7 @@ XhcDriverBindingStart (
//
// Start the Host Controller
//
- XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
+ XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
//
// Start the asynchronous interrupt monitor
@@ -2096,11 +2117,11 @@ CLOSE_PCIIO:
// Restore original PCI attributes
//
PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- OriginalPciAttributes,
- NULL
- );
+ PciIo,
+ EfiPciIoAttributeOperationSet,
+ OriginalPciAttributes,
+ NULL
+ );
}
gBS->CloseProtocol (
@@ -2113,7 +2134,6 @@ CLOSE_PCIIO:
return Status;
}
-
/**
Stop this driver on ControllerHandle. Support stopping any child handles
created by this driver.
@@ -2130,10 +2150,10 @@ CLOSE_PCIIO:
EFI_STATUS
EFIAPI
XhcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -2150,7 +2170,7 @@ XhcDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -2185,9 +2205,11 @@ XhcDriverBindingStop (
//
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
- (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
+ (Xhc->UsbDevContext[Index + 1].SlotId == 0))
+ {
continue;
}
+
if (Xhc->HcCParams.Data.Csz == 0) {
XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
} else {
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 3285eb8798..5054d796b1 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -29,8 +29,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Pci.h>
-typedef struct _USB_XHCI_INSTANCE USB_XHCI_INSTANCE;
-typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
+typedef struct _USB_XHCI_INSTANCE USB_XHCI_INSTANCE;
+typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
#include "XhciReg.h"
#include "XhciSched.h"
@@ -40,62 +40,62 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
//
// The unit is microsecond, setting it as 1us.
//
-#define XHC_1_MICROSECOND (1)
+#define XHC_1_MICROSECOND (1)
//
// The unit is microsecond, setting it as 1ms.
//
-#define XHC_1_MILLISECOND (1000)
+#define XHC_1_MILLISECOND (1000)
//
// XHC generic timeout experience values.
// The unit is millisecond, setting it as 10s.
//
-#define XHC_GENERIC_TIMEOUT (10 * 1000)
+#define XHC_GENERIC_TIMEOUT (10 * 1000)
//
// XHC reset timeout experience values.
// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1000)
+#define XHC_RESET_TIMEOUT (1000)
//
// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.
// The unit is microsecond, setting it as 10ms.
//
-#define XHC_RESET_RECOVERY_DELAY (10 * 1000)
+#define XHC_RESET_RECOVERY_DELAY (10 * 1000)
//
// XHC async transfer timer interval, set by experience.
// The unit is 100us, takes 1ms as interval.
//
-#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
+#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
//
// XHC raises TPL to TPL_NOTIFY to serialize all its operations
// to protect shared data structures.
//
-#define XHC_TPL TPL_NOTIFY
+#define XHC_TPL TPL_NOTIFY
-#define CMD_RING_TRB_NUMBER 0x100
-#define TR_RING_TRB_NUMBER 0x100
-#define ERST_NUMBER 0x01
-#define EVENT_RING_TRB_NUMBER 0x200
+#define CMD_RING_TRB_NUMBER 0x100
+#define TR_RING_TRB_NUMBER 0x100
+#define ERST_NUMBER 0x01
+#define EVENT_RING_TRB_NUMBER 0x200
-#define CMD_INTER 0
-#define CTRL_INTER 1
-#define BULK_INTER 2
-#define INT_INTER 3
-#define INT_INTER_ASYNC 4
+#define CMD_INTER 0
+#define CTRL_INTER 1
+#define BULK_INTER 2
+#define INT_INTER 3
+#define INT_INTER_ASYNC 4
-#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
+#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
-#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
-#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
-#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
+#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
+#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define XHC_REG_BIT_IS_SET(Xhc, Offset, Bit) \
(XHC_BIT_IS_SET(XhcReadOpReg ((Xhc), (Offset)), (Bit)))
-#define XHCI_IS_DATAIN(EndpointAddr) XHC_BIT_IS_SET((EndpointAddr), 0x80)
+#define XHCI_IS_DATAIN(EndpointAddr) XHC_BIT_IS_SET((EndpointAddr), 0x80)
-#define XHCI_INSTANCE_SIG SIGNATURE_32 ('x', 'h', 'c', 'i')
-#define XHC_FROM_THIS(a) CR(a, USB_XHCI_INSTANCE, Usb2Hc, XHCI_INSTANCE_SIG)
+#define XHCI_INSTANCE_SIG SIGNATURE_32 ('x', 'h', 'c', 'i')
+#define XHC_FROM_THIS(a) CR(a, USB_XHCI_INSTANCE, Usb2Hc, XHCI_INSTANCE_SIG)
#define USB_DESC_TYPE_HUB 0x29
#define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a
@@ -113,19 +113,19 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
//
#pragma pack(1)
typedef struct {
- UINT8 ProgInterface;
- UINT8 SubClassCode;
- UINT8 BaseCode;
+ UINT8 ProgInterface;
+ UINT8 SubClassCode;
+ UINT8 BaseCode;
} USB_CLASSC;
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 NumPorts;
- UINT16 HubCharacter;
- UINT8 PwrOn2PwrGood;
- UINT8 HubContrCurrent;
- UINT8 Filler[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 NumPorts;
+ UINT16 HubCharacter;
+ UINT8 PwrOn2PwrGood;
+ UINT8 HubContrCurrent;
+ UINT8 Filler[16];
} EFI_USB_HUB_DESCRIPTOR;
#pragma pack()
@@ -133,23 +133,23 @@ struct _USB_DEV_CONTEXT {
//
// Whether this entry in UsbDevContext array is used or not.
//
- BOOLEAN Enabled;
+ BOOLEAN Enabled;
//
// The slot id assigned to the new device through XHCI's Enable_Slot cmd.
//
- UINT8 SlotId;
+ UINT8 SlotId;
//
// The route string presented an attached usb device.
//
- USB_DEV_ROUTE RouteString;
+ USB_DEV_ROUTE RouteString;
//
// The route string of parent device if it exists. Otherwise it's zero.
//
- USB_DEV_ROUTE ParentRouteString;
+ USB_DEV_ROUTE ParentRouteString;
//
// The actual device address assigned by XHCI through Address_Device command.
//
- UINT8 XhciDevAddr;
+ UINT8 XhciDevAddr;
//
// The requested device address from UsbBus driver through Set_Address standard usb request.
// As XHCI spec replaces this request with Address_Device command, we have to record the
@@ -158,23 +158,23 @@ struct _USB_DEV_CONTEXT {
// through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual
// device address and access the actual device.
//
- UINT8 BusDevAddr;
+ UINT8 BusDevAddr;
//
// The pointer to the input device context.
//
- VOID *InputContext;
+ VOID *InputContext;
//
// The pointer to the output device context.
//
- VOID *OutputContext;
+ VOID *OutputContext;
//
// The transfer queue for every endpoint.
//
- VOID *EndpointTransferRing[31];
+ VOID *EndpointTransferRing[31];
//
// The device descriptor which is stored to support XHCI's Evaluate_Context cmd.
//
- EFI_USB_DEVICE_DESCRIPTOR DevDesc;
+ EFI_USB_DEVICE_DESCRIPTOR DevDesc;
//
// As a usb device may include multiple configuration descriptors, we dynamically allocate an array
// to store them.
@@ -182,81 +182,80 @@ struct _USB_DEV_CONTEXT {
// such as Interface descriptor, Endpoint descriptor, and so on.
// These information is used to support XHCI's Config_Endpoint cmd.
//
- EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
+ EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
//
// A device has an active Configuration.
//
- UINT8 ActiveConfiguration;
+ UINT8 ActiveConfiguration;
//
// Every interface has an active AlternateSetting.
//
- UINT8 *ActiveAlternateSetting;
+ UINT8 *ActiveAlternateSetting;
};
struct _USB_XHCI_INSTANCE {
- UINT32 Signature;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 OriginalPciAttributes;
- USBHC_MEM_POOL *MemPool;
+ UINT32 Signature;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT64 OriginalPciAttributes;
+ USBHC_MEM_POOL *MemPool;
- EFI_USB2_HC_PROTOCOL Usb2Hc;
+ EFI_USB2_HC_PROTOCOL Usb2Hc;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
//
// ExitBootServicesEvent is used to set OS semaphore and
// stop the XHC DMA operation after exit boot service.
//
- EFI_EVENT ExitBootServiceEvent;
- EFI_EVENT PollTimer;
- LIST_ENTRY AsyncIntTransfers;
-
- UINT8 CapLength; ///< Capability Register Length
- XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
- XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
- XHC_HCCPARAMS HcCParams; ///< Capability Parameters
- UINT32 DBOff; ///< Doorbell Offset
- UINT32 RTSOff; ///< Runtime Register Space Offset
- UINT16 MaxInterrupt;
- UINT32 PageSize;
- UINT64 *ScratchBuf;
- VOID *ScratchMap;
- UINT32 MaxScratchpadBufs;
- UINT64 *ScratchEntry;
- UINTN *ScratchEntryMap;
- UINT32 ExtCapRegBase;
- UINT32 UsbLegSupOffset;
- UINT32 DebugCapSupOffset;
- UINT64 *DCBAA;
- VOID *DCBAAMap;
- UINT32 MaxSlotsEn;
- URB *PendingUrb;
+ EFI_EVENT ExitBootServiceEvent;
+ EFI_EVENT PollTimer;
+ LIST_ENTRY AsyncIntTransfers;
+
+ UINT8 CapLength; ///< Capability Register Length
+ XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
+ XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
+ XHC_HCCPARAMS HcCParams; ///< Capability Parameters
+ UINT32 DBOff; ///< Doorbell Offset
+ UINT32 RTSOff; ///< Runtime Register Space Offset
+ UINT16 MaxInterrupt;
+ UINT32 PageSize;
+ UINT64 *ScratchBuf;
+ VOID *ScratchMap;
+ UINT32 MaxScratchpadBufs;
+ UINT64 *ScratchEntry;
+ UINTN *ScratchEntryMap;
+ UINT32 ExtCapRegBase;
+ UINT32 UsbLegSupOffset;
+ UINT32 DebugCapSupOffset;
+ UINT64 *DCBAA;
+ VOID *DCBAAMap;
+ UINT32 MaxSlotsEn;
+ URB *PendingUrb;
//
// Cmd Transfer Ring
//
- TRANSFER_RING CmdRing;
+ TRANSFER_RING CmdRing;
//
// EventRing
//
- EVENT_RING EventRing;
+ EVENT_RING EventRing;
//
// Misc
//
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// Store device contexts managed by XHCI instance
// The array supports up to 255 devices, entry 0 is reserved and should not be used.
//
- USB_DEV_CONTEXT UsbDevContext[256];
+ USB_DEV_CONTEXT UsbDevContext[256];
- BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
+ BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
};
-
-extern EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gXhciComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gXhciComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2;
/**
Test to see if this driver supports ControllerHandle. Any
@@ -274,9 +273,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2;
EFI_STATUS
EFIAPI
XhcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -295,9 +294,9 @@ XhcDriverBindingSupported (
EFI_STATUS
EFIAPI
XhcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -316,10 +315,10 @@ XhcDriverBindingStart (
EFI_STATUS
EFIAPI
XhcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index 70102a7fcf..80be3311d4 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -21,18 +21,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT8
XhcReadCapReg8 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
)
{
- UINT8 Data;
- EFI_STATUS Status;
+ UINT8 Data;
+ EFI_STATUS Status;
Status = Xhc->PciIo->Mem.Read (
Xhc->PciIo,
EfiPciIoWidthUint8,
XHC_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
@@ -57,18 +57,18 @@ XhcReadCapReg8 (
**/
UINT32
XhcReadCapReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
Status = Xhc->PciIo->Mem.Read (
Xhc->PciIo,
EfiPciIoWidthUint32,
XHC_BAR_INDEX,
- (UINT64) Offset,
+ (UINT64)Offset,
1,
&Data
);
@@ -93,12 +93,12 @@ XhcReadCapReg (
**/
UINT32
XhcReadOpReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
ASSERT (Xhc->CapLength != 0);
@@ -129,12 +129,12 @@ XhcReadOpReg (
**/
VOID
XhcWriteOpReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Xhc->CapLength != 0);
@@ -152,10 +152,6 @@ XhcWriteOpReg (
}
}
-
-
-
-
/**
Write the data to the XHCI door bell register.
@@ -166,12 +162,12 @@ XhcWriteOpReg (
**/
VOID
XhcWriteDoorBellReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Xhc->DBOff != 0);
@@ -200,12 +196,12 @@ XhcWriteDoorBellReg (
**/
UINT32
XhcReadRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
ASSERT (Xhc->RTSOff != 0);
@@ -236,12 +232,12 @@ XhcReadRuntimeReg (
**/
VOID
XhcWriteRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Xhc->RTSOff != 0);
@@ -270,12 +266,12 @@ XhcWriteRuntimeReg (
**/
UINT32
XhcReadExtCapReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
ASSERT (Xhc->ExtCapRegBase != 0);
@@ -306,12 +302,12 @@ XhcReadExtCapReg (
**/
VOID
XhcWriteExtCapReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT (Xhc->ExtCapRegBase != 0);
@@ -329,7 +325,6 @@ XhcWriteExtCapReg (
}
}
-
/**
Set one bit of the runtime register while keeping other bits.
@@ -340,12 +335,12 @@ XhcWriteExtCapReg (
**/
VOID
XhcSetRuntimeRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcReadRuntimeReg (Xhc, Offset);
Data |= Bit;
@@ -362,12 +357,12 @@ XhcSetRuntimeRegBit (
**/
VOID
XhcClearRuntimeRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcReadRuntimeReg (Xhc, Offset);
Data &= ~Bit;
@@ -384,19 +379,18 @@ XhcClearRuntimeRegBit (
**/
VOID
XhcSetOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcReadOpReg (Xhc, Offset);
Data |= Bit;
XhcWriteOpReg (Xhc, Offset, Data);
}
-
/**
Clear one bit of the operational register while keeping other bits.
@@ -407,12 +401,12 @@ XhcSetOpRegBit (
**/
VOID
XhcClearOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcReadOpReg (Xhc, Offset);
Data &= ~Bit;
@@ -436,15 +430,15 @@ XhcClearOpRegBit (
**/
EFI_STATUS
XhcWaitOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
- EFI_EVENT TimeoutEvent;
+ EFI_STATUS Status;
+ EFI_EVENT TimeoutEvent;
TimeoutEvent = NULL;
@@ -460,15 +454,17 @@ XhcWaitOpRegBit (
&TimeoutEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto DONE;
}
- Status = gBS->SetTimer (TimeoutEvent,
- TimerRelative,
- EFI_TIMER_PERIOD_MILLISECONDS(Timeout));
+ Status = gBS->SetTimer (
+ TimeoutEvent,
+ TimerRelative,
+ EFI_TIMER_PERIOD_MILLISECONDS (Timeout)
+ );
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto DONE;
}
@@ -479,7 +475,7 @@ XhcWaitOpRegBit (
}
gBS->Stall (XHC_1_MICROSECOND);
- } while (EFI_ERROR(gBS->CheckEvent (TimeoutEvent)));
+ } while (EFI_ERROR (gBS->CheckEvent (TimeoutEvent)));
Status = EFI_TIMEOUT;
@@ -499,10 +495,10 @@ DONE:
**/
VOID
XhcSetBiosOwnership (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
- UINT32 Buffer;
+ UINT32 Buffer;
if (Xhc->UsbLegSupOffset == 0xFFFFFFFF) {
return;
@@ -523,10 +519,10 @@ XhcSetBiosOwnership (
**/
VOID
XhcClearBiosOwnership (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
- UINT32 Buffer;
+ UINT32 Buffer;
if (Xhc->UsbLegSupOffset == 0xFFFFFFFF) {
return;
@@ -550,13 +546,13 @@ XhcClearBiosOwnership (
**/
UINT32
XhcGetCapabilityAddr (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 CapId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 CapId
)
{
- UINT32 ExtCapOffset;
- UINT8 NextExtCapReg;
- UINT32 Data;
+ UINT32 ExtCapOffset;
+ UINT8 NextExtCapReg;
+ UINT32 Data;
ExtCapOffset = 0;
@@ -568,6 +564,7 @@ XhcGetCapabilityAddr (
if ((Data & 0xFF) == CapId) {
return ExtCapOffset;
}
+
//
// If not, then traverse all of the ext capability registers till finding out it.
//
@@ -589,13 +586,12 @@ XhcGetCapabilityAddr (
**/
BOOLEAN
XhcIsHalt (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT);
}
-
/**
Whether system error occurred.
@@ -607,7 +603,7 @@ XhcIsHalt (
**/
BOOLEAN
XhcIsSysError (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE);
@@ -627,11 +623,11 @@ XhcSetHsee (
IN USB_XHCI_INSTANCE *Xhc
)
{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT16 XhciCmd;
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 XhciCmd;
- PciIo = Xhc->PciIo;
+ PciIo = Xhc->PciIo;
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint16,
@@ -658,11 +654,11 @@ XhcSetHsee (
**/
EFI_STATUS
XhcResetHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EFI_SUCCESS;
@@ -679,7 +675,8 @@ XhcResetHC (
}
if ((Xhc->DebugCapSupOffset == 0xFFFFFFFF) || ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) != XHC_CAP_USB_DEBUG) ||
- ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) == 0)) {
+ ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) == 0))
+ {
XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET);
//
// Some XHCI host controllers require to have extra 1ms delay before accessing any MMIO register during reset.
@@ -701,7 +698,6 @@ XhcResetHC (
return Status;
}
-
/**
Halt the XHCI host controller.
@@ -714,18 +710,17 @@ XhcResetHC (
**/
EFI_STATUS
XhcHaltHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
XhcClearOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RUN);
Status = XhcWaitOpRegBit (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT, TRUE, Timeout);
return Status;
}
-
/**
Set the XHCI host controller to run.
@@ -738,11 +733,11 @@ XhcHaltHC (
**/
EFI_STATUS
XhcRunHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RUN);
Status = XhcWaitOpRegBit (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT, FALSE, Timeout);
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
index cc5c1bf09a..4950eed272 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
@@ -10,124 +10,124 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_XHCI_REG_H_
#define _EFI_XHCI_REG_H_
-#define PCI_IF_XHCI 0x30
+#define PCI_IF_XHCI 0x30
//
// PCI Configuration Registers
//
-#define XHC_BAR_INDEX 0x00
+#define XHC_BAR_INDEX 0x00
-#define XHC_PCI_BAR_OFFSET 0x10 // Memory Bar Register Offset
-#define XHC_PCI_BAR_MASK 0xFFFF // Memory Base Address Mask
+#define XHC_PCI_BAR_OFFSET 0x10 // Memory Bar Register Offset
+#define XHC_PCI_BAR_MASK 0xFFFF // Memory Base Address Mask
-#define XHC_PCI_SBRN_OFFSET 0x60 // Serial Bus Release Number Register Offset
+#define XHC_PCI_SBRN_OFFSET 0x60 // Serial Bus Release Number Register Offset
-#define USB_HUB_CLASS_CODE 0x09
-#define USB_HUB_SUBCLASS_CODE 0x00
+#define USB_HUB_CLASS_CODE 0x09
+#define USB_HUB_SUBCLASS_CODE 0x00
-#define XHC_CAP_USB_LEGACY 0x01
-#define XHC_CAP_USB_DEBUG 0x0A
+#define XHC_CAP_USB_LEGACY 0x01
+#define XHC_CAP_USB_DEBUG 0x0A
-//============================================//
+// ============================================//
// XHCI register offset //
-//============================================//
+// ============================================//
//
// Capability registers offset
//
-#define XHC_CAPLENGTH_OFFSET 0x00 // Capability register length offset
-#define XHC_HCIVERSION_OFFSET 0x02 // Interface Version Number 02-03h
-#define XHC_HCSPARAMS1_OFFSET 0x04 // Structural Parameters 1
-#define XHC_HCSPARAMS2_OFFSET 0x08 // Structural Parameters 2
-#define XHC_HCSPARAMS3_OFFSET 0x0c // Structural Parameters 3
-#define XHC_HCCPARAMS_OFFSET 0x10 // Capability Parameters
-#define XHC_DBOFF_OFFSET 0x14 // Doorbell Offset
-#define XHC_RTSOFF_OFFSET 0x18 // Runtime Register Space Offset
+#define XHC_CAPLENGTH_OFFSET 0x00 // Capability register length offset
+#define XHC_HCIVERSION_OFFSET 0x02 // Interface Version Number 02-03h
+#define XHC_HCSPARAMS1_OFFSET 0x04 // Structural Parameters 1
+#define XHC_HCSPARAMS2_OFFSET 0x08 // Structural Parameters 2
+#define XHC_HCSPARAMS3_OFFSET 0x0c // Structural Parameters 3
+#define XHC_HCCPARAMS_OFFSET 0x10 // Capability Parameters
+#define XHC_DBOFF_OFFSET 0x14 // Doorbell Offset
+#define XHC_RTSOFF_OFFSET 0x18 // Runtime Register Space Offset
//
// Operational registers offset
//
-#define XHC_USBCMD_OFFSET 0x0000 // USB Command Register Offset
-#define XHC_USBSTS_OFFSET 0x0004 // USB Status Register Offset
-#define XHC_PAGESIZE_OFFSET 0x0008 // USB Page Size Register Offset
-#define XHC_DNCTRL_OFFSET 0x0014 // Device Notification Control Register Offset
-#define XHC_CRCR_OFFSET 0x0018 // Command Ring Control Register Offset
-#define XHC_DCBAAP_OFFSET 0x0030 // Device Context Base Address Array Pointer Register Offset
-#define XHC_CONFIG_OFFSET 0x0038 // Configure Register Offset
-#define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset
+#define XHC_USBCMD_OFFSET 0x0000 // USB Command Register Offset
+#define XHC_USBSTS_OFFSET 0x0004 // USB Status Register Offset
+#define XHC_PAGESIZE_OFFSET 0x0008 // USB Page Size Register Offset
+#define XHC_DNCTRL_OFFSET 0x0014 // Device Notification Control Register Offset
+#define XHC_CRCR_OFFSET 0x0018 // Command Ring Control Register Offset
+#define XHC_DCBAAP_OFFSET 0x0030 // Device Context Base Address Array Pointer Register Offset
+#define XHC_CONFIG_OFFSET 0x0038 // Configure Register Offset
+#define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset
//
// Runtime registers offset
//
-#define XHC_MFINDEX_OFFSET 0x00 // Microframe Index Register Offset
-#define XHC_IMAN_OFFSET 0x20 // Interrupter X Management Register Offset
-#define XHC_IMOD_OFFSET 0x24 // Interrupter X Moderation Register Offset
-#define XHC_ERSTSZ_OFFSET 0x28 // Event Ring Segment Table Size Register Offset
-#define XHC_ERSTBA_OFFSET 0x30 // Event Ring Segment Table Base Address Register Offset
-#define XHC_ERDP_OFFSET 0x38 // Event Ring Dequeue Pointer Register Offset
+#define XHC_MFINDEX_OFFSET 0x00 // Microframe Index Register Offset
+#define XHC_IMAN_OFFSET 0x20 // Interrupter X Management Register Offset
+#define XHC_IMOD_OFFSET 0x24 // Interrupter X Moderation Register Offset
+#define XHC_ERSTSZ_OFFSET 0x28 // Event Ring Segment Table Size Register Offset
+#define XHC_ERSTBA_OFFSET 0x30 // Event Ring Segment Table Base Address Register Offset
+#define XHC_ERDP_OFFSET 0x38 // Event Ring Dequeue Pointer Register Offset
//
// Debug registers offset
//
-#define XHC_DC_DCCTRL 0x20
+#define XHC_DC_DCCTRL 0x20
-#define USBLEGSP_BIOS_SEMAPHORE BIT16 // HC BIOS Owned Semaphore
-#define USBLEGSP_OS_SEMAPHORE BIT24 // HC OS Owned Semaphore
+#define USBLEGSP_BIOS_SEMAPHORE BIT16 // HC BIOS Owned Semaphore
+#define USBLEGSP_OS_SEMAPHORE BIT24 // HC OS Owned Semaphore
#pragma pack (1)
typedef struct {
- UINT8 MaxSlots; // Number of Device Slots
- UINT16 MaxIntrs:11; // Number of Interrupters
- UINT16 Rsvd:5;
- UINT8 MaxPorts; // Number of Ports
+ UINT8 MaxSlots; // Number of Device Slots
+ UINT16 MaxIntrs : 11; // Number of Interrupters
+ UINT16 Rsvd : 5;
+ UINT8 MaxPorts; // Number of Ports
} HCSPARAMS1;
//
// Structural Parameters 1 Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCSPARAMS1 Data;
+ UINT32 Dword;
+ HCSPARAMS1 Data;
} XHC_HCSPARAMS1;
typedef struct {
- UINT32 Ist:4; // Isochronous Scheduling Threshold
- UINT32 Erst:4; // Event Ring Segment Table Max
- UINT32 Rsvd:13;
- UINT32 ScratchBufHi:5; // Max Scratchpad Buffers Hi
- UINT32 Spr:1; // Scratchpad Restore
- UINT32 ScratchBufLo:5; // Max Scratchpad Buffers Lo
+ UINT32 Ist : 4; // Isochronous Scheduling Threshold
+ UINT32 Erst : 4; // Event Ring Segment Table Max
+ UINT32 Rsvd : 13;
+ UINT32 ScratchBufHi : 5; // Max Scratchpad Buffers Hi
+ UINT32 Spr : 1; // Scratchpad Restore
+ UINT32 ScratchBufLo : 5; // Max Scratchpad Buffers Lo
} HCSPARAMS2;
//
// Structural Parameters 2 Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCSPARAMS2 Data;
+ UINT32 Dword;
+ HCSPARAMS2 Data;
} XHC_HCSPARAMS2;
typedef struct {
- UINT16 Ac64:1; // 64-bit Addressing Capability
- UINT16 Bnc:1; // BW Negotiation Capability
- UINT16 Csz:1; // Context Size
- UINT16 Ppc:1; // Port Power Control
- UINT16 Pind:1; // Port Indicators
- UINT16 Lhrc:1; // Light HC Reset Capability
- UINT16 Ltc:1; // Latency Tolerance Messaging Capability
- UINT16 Nss:1; // No Secondary SID Support
- UINT16 Pae:1; // Parse All Event Data
- UINT16 Rsvd:3;
- UINT16 MaxPsaSize:4; // Maximum Primary Stream Array Size
- UINT16 ExtCapReg; // xHCI Extended Capabilities Pointer
+ UINT16 Ac64 : 1; // 64-bit Addressing Capability
+ UINT16 Bnc : 1; // BW Negotiation Capability
+ UINT16 Csz : 1; // Context Size
+ UINT16 Ppc : 1; // Port Power Control
+ UINT16 Pind : 1; // Port Indicators
+ UINT16 Lhrc : 1; // Light HC Reset Capability
+ UINT16 Ltc : 1; // Latency Tolerance Messaging Capability
+ UINT16 Nss : 1; // No Secondary SID Support
+ UINT16 Pae : 1; // Parse All Event Data
+ UINT16 Rsvd : 3;
+ UINT16 MaxPsaSize : 4; // Maximum Primary Stream Array Size
+ UINT16 ExtCapReg; // xHCI Extended Capabilities Pointer
} HCCPARAMS;
//
// Capability Parameters Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCCPARAMS Data;
+ UINT32 Dword;
+ HCCPARAMS Data;
} XHC_HCCPARAMS;
#pragma pack ()
@@ -135,62 +135,62 @@ typedef union {
//
// Register Bit Definition
//
-#define XHC_USBCMD_RUN BIT0 // Run/Stop
-#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
-#define XHC_USBCMD_INTE BIT2 // Interrupter Enable
-#define XHC_USBCMD_HSEE BIT3 // Host System Error Enable
-
-#define XHC_USBSTS_HALT BIT0 // Host Controller Halted
-#define XHC_USBSTS_HSE BIT2 // Host System Error
-#define XHC_USBSTS_EINT BIT3 // Event Interrupt
-#define XHC_USBSTS_PCD BIT4 // Port Change Detect
-#define XHC_USBSTS_SSS BIT8 // Save State Status
-#define XHC_USBSTS_RSS BIT9 // Restore State Status
-#define XHC_USBSTS_SRE BIT10 // Save/Restore Error
-#define XHC_USBSTS_CNR BIT11 // Host Controller Not Ready
-#define XHC_USBSTS_HCE BIT12 // Host Controller Error
-
-#define XHC_PAGESIZE_MASK 0xFFFF // Page Size
-
-#define XHC_CRCR_RCS BIT0 // Ring Cycle State
-#define XHC_CRCR_CS BIT1 // Command Stop
-#define XHC_CRCR_CA BIT2 // Command Abort
-#define XHC_CRCR_CRR BIT3 // Command Ring Running
-
-#define XHC_CONFIG_MASK 0xFF // Command Ring Running
-
-#define XHC_PORTSC_CCS BIT0 // Current Connect Status
-#define XHC_PORTSC_PED BIT1 // Port Enabled/Disabled
-#define XHC_PORTSC_OCA BIT3 // Over-current Active
-#define XHC_PORTSC_RESET BIT4 // Port Reset
-#define XHC_PORTSC_PLS (BIT5|BIT6|BIT7|BIT8) // Port Link State
-#define XHC_PORTSC_PP BIT9 // Port Power
-#define XHC_PORTSC_PS (BIT10|BIT11|BIT12|BIT13) // Port Speed
-#define XHC_PORTSC_LWS BIT16 // Port Link State Write Strobe
-#define XHC_PORTSC_CSC BIT17 // Connect Status Change
-#define XHC_PORTSC_PEC BIT18 // Port Enabled/Disabled Change
-#define XHC_PORTSC_WRC BIT19 // Warm Port Reset Change
-#define XHC_PORTSC_OCC BIT20 // Over-Current Change
-#define XHC_PORTSC_PRC BIT21 // Port Reset Change
-#define XHC_PORTSC_PLC BIT22 // Port Link State Change
-#define XHC_PORTSC_CEC BIT23 // Port Config Error Change
-#define XHC_PORTSC_CAS BIT24 // Cold Attach Status
-
-#define XHC_HUB_PORTSC_CCS BIT0 // Hub's Current Connect Status
-#define XHC_HUB_PORTSC_PED BIT1 // Hub's Port Enabled/Disabled
-#define XHC_HUB_PORTSC_OCA BIT3 // Hub's Over-current Active
-#define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
-#define XHC_HUB_PORTSC_PP BIT9 // Hub's Port Power
-#define XHC_HUB_PORTSC_CSC BIT16 // Hub's Connect Status Change
-#define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
-#define XHC_HUB_PORTSC_OCC BIT19 // Hub's Over-Current Change
-#define XHC_HUB_PORTSC_PRC BIT20 // Hub's Port Reset Change
-#define XHC_HUB_PORTSC_BHRC BIT21 // Hub's Port Warm Reset Change
-#define XHC_IMAN_IP BIT0 // Interrupt Pending
-#define XHC_IMAN_IE BIT1 // Interrupt Enable
-
-#define XHC_IMODI_MASK 0x0000FFFF // Interrupt Moderation Interval
-#define XHC_IMODC_MASK 0xFFFF0000 // Interrupt Moderation Counter
+#define XHC_USBCMD_RUN BIT0 // Run/Stop
+#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
+#define XHC_USBCMD_INTE BIT2 // Interrupter Enable
+#define XHC_USBCMD_HSEE BIT3 // Host System Error Enable
+
+#define XHC_USBSTS_HALT BIT0 // Host Controller Halted
+#define XHC_USBSTS_HSE BIT2 // Host System Error
+#define XHC_USBSTS_EINT BIT3 // Event Interrupt
+#define XHC_USBSTS_PCD BIT4 // Port Change Detect
+#define XHC_USBSTS_SSS BIT8 // Save State Status
+#define XHC_USBSTS_RSS BIT9 // Restore State Status
+#define XHC_USBSTS_SRE BIT10 // Save/Restore Error
+#define XHC_USBSTS_CNR BIT11 // Host Controller Not Ready
+#define XHC_USBSTS_HCE BIT12 // Host Controller Error
+
+#define XHC_PAGESIZE_MASK 0xFFFF // Page Size
+
+#define XHC_CRCR_RCS BIT0 // Ring Cycle State
+#define XHC_CRCR_CS BIT1 // Command Stop
+#define XHC_CRCR_CA BIT2 // Command Abort
+#define XHC_CRCR_CRR BIT3 // Command Ring Running
+
+#define XHC_CONFIG_MASK 0xFF // Command Ring Running
+
+#define XHC_PORTSC_CCS BIT0 // Current Connect Status
+#define XHC_PORTSC_PED BIT1 // Port Enabled/Disabled
+#define XHC_PORTSC_OCA BIT3 // Over-current Active
+#define XHC_PORTSC_RESET BIT4 // Port Reset
+#define XHC_PORTSC_PLS (BIT5|BIT6|BIT7|BIT8) // Port Link State
+#define XHC_PORTSC_PP BIT9 // Port Power
+#define XHC_PORTSC_PS (BIT10|BIT11|BIT12|BIT13) // Port Speed
+#define XHC_PORTSC_LWS BIT16 // Port Link State Write Strobe
+#define XHC_PORTSC_CSC BIT17 // Connect Status Change
+#define XHC_PORTSC_PEC BIT18 // Port Enabled/Disabled Change
+#define XHC_PORTSC_WRC BIT19 // Warm Port Reset Change
+#define XHC_PORTSC_OCC BIT20 // Over-Current Change
+#define XHC_PORTSC_PRC BIT21 // Port Reset Change
+#define XHC_PORTSC_PLC BIT22 // Port Link State Change
+#define XHC_PORTSC_CEC BIT23 // Port Config Error Change
+#define XHC_PORTSC_CAS BIT24 // Cold Attach Status
+
+#define XHC_HUB_PORTSC_CCS BIT0 // Hub's Current Connect Status
+#define XHC_HUB_PORTSC_PED BIT1 // Hub's Port Enabled/Disabled
+#define XHC_HUB_PORTSC_OCA BIT3 // Hub's Over-current Active
+#define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
+#define XHC_HUB_PORTSC_PP BIT9 // Hub's Port Power
+#define XHC_HUB_PORTSC_CSC BIT16 // Hub's Connect Status Change
+#define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
+#define XHC_HUB_PORTSC_OCC BIT19 // Hub's Over-Current Change
+#define XHC_HUB_PORTSC_PRC BIT20 // Hub's Port Reset Change
+#define XHC_HUB_PORTSC_BHRC BIT21 // Hub's Port Warm Reset Change
+#define XHC_IMAN_IP BIT0 // Interrupt Pending
+#define XHC_IMAN_IE BIT1 // Interrupt Enable
+
+#define XHC_IMODI_MASK 0x0000FFFF // Interrupt Moderation Interval
+#define XHC_IMODC_MASK 0xFFFF0000 // Interrupt Moderation Counter
//
// Hub Class Feature Selector for Clear Port Feature Request
@@ -198,8 +198,8 @@ typedef union {
// For more details, Please refer to USB 3.0 Spec Table 10-7.
//
typedef enum {
- Usb3PortBHPortReset = 28,
- Usb3PortBHPortResetChange = 29
+ Usb3PortBHPortReset = 28,
+ Usb3PortBHPortResetChange = 29
} XHC_PORT_FEATURE;
//
@@ -207,16 +207,16 @@ typedef enum {
// UEFI's port states.
//
typedef struct {
- UINT32 HwState;
- UINT16 UefiState;
+ UINT32 HwState;
+ UINT16 UefiState;
} USB_PORT_STATE_MAP;
//
// Structure to map the hardware port states to feature selector for clear port feature request.
//
typedef struct {
- UINT32 HwState;
- UINT16 Selector;
+ UINT32 HwState;
+ UINT16 Selector;
} USB_CLEAR_PORT_MAP;
/**
@@ -231,8 +231,8 @@ typedef struct {
**/
UINT8
XhcReadCapReg8 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -247,8 +247,8 @@ XhcReadCapReg8 (
**/
UINT32
XhcReadCapReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -263,8 +263,8 @@ XhcReadCapReg (
**/
UINT32
XhcReadOpReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -277,12 +277,11 @@ XhcReadOpReg (
**/
VOID
XhcWriteOpReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
-
/**
Read XHCI runtime register.
@@ -294,8 +293,8 @@ XhcWriteOpReg (
**/
UINT32
XhcReadRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -308,12 +307,11 @@ XhcReadRuntimeReg (
**/
VOID
XhcWriteRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
-
/**
Write the data to the XHCI door bell register.
@@ -324,9 +322,9 @@ XhcWriteRuntimeReg (
**/
VOID
XhcWriteDoorBellReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -339,9 +337,9 @@ XhcWriteDoorBellReg (
**/
VOID
XhcSetOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -354,9 +352,9 @@ XhcSetOpRegBit (
**/
VOID
XhcClearOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -375,11 +373,11 @@ XhcClearOpRegBit (
**/
EFI_STATUS
XhcWaitOpRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
);
/**
@@ -393,8 +391,8 @@ XhcWaitOpRegBit (
**/
UINT32
XhcReadRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -407,9 +405,9 @@ XhcReadRuntimeReg (
**/
VOID
XhcWriteRuntimeReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -422,9 +420,9 @@ XhcWriteRuntimeReg (
**/
VOID
XhcSetRuntimeRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -437,9 +435,9 @@ XhcSetRuntimeRegBit (
**/
VOID
XhcClearRuntimeRegBit (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -453,8 +451,8 @@ XhcClearRuntimeRegBit (
**/
UINT32
XhcReadExtCapReg (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Offset
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Offset
);
/**
@@ -468,7 +466,7 @@ XhcReadExtCapReg (
**/
BOOLEAN
XhcIsHalt (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -482,7 +480,7 @@ XhcIsHalt (
**/
BOOLEAN
XhcIsSysError (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -497,8 +495,8 @@ XhcIsSysError (
**/
EFI_STATUS
XhcResetHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
);
/**
@@ -513,8 +511,8 @@ XhcResetHC (
**/
EFI_STATUS
XhcHaltHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
);
/**
@@ -529,8 +527,8 @@ XhcHaltHC (
**/
EFI_STATUS
XhcRunHC (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT32 Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT32 Timeout
);
/**
@@ -544,8 +542,8 @@ XhcRunHC (
**/
UINT32
XhcGetCapabilityAddr (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 CapId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 CapId
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 92f63c29fc..c2906e06fd 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -19,25 +19,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
@return Created URB or NULL.
**/
-URB*
+URB *
XhcCreateCmdTrb (
IN USB_XHCI_INSTANCE *Xhc,
IN TRB_TEMPLATE *CmdTrb
)
{
- URB *Urb;
+ URB *Urb;
Urb = AllocateZeroPool (sizeof (URB));
if (Urb == NULL) {
return NULL;
}
- Urb->Signature = XHC_URB_SIG;
+ Urb->Signature = XHC_URB_SIG;
- Urb->Ring = &Xhc->CmdRing;
+ Urb->Ring = &Xhc->CmdRing;
XhcSyncTrsRing (Xhc, Urb->Ring);
- Urb->TrbNum = 1;
- Urb->TrbStart = Urb->Ring->RingEnqueue;
+ Urb->TrbNum = 1;
+ Urb->TrbStart = Urb->Ring->RingEnqueue;
CopyMem (Urb->TrbStart, CmdTrb, sizeof (TRB_TEMPLATE));
Urb->TrbStart->CycleBit = Urb->Ring->RingPCS & BIT0;
Urb->TrbEnd = Urb->TrbStart;
@@ -63,14 +63,14 @@ XhcCreateCmdTrb (
EFI_STATUS
EFIAPI
XhcCmdTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN TRB_TEMPLATE *CmdTrb,
- IN UINTN Timeout,
- OUT TRB_TEMPLATE **EvtTrb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN TRB_TEMPLATE *CmdTrb,
+ IN UINTN Timeout,
+ OUT TRB_TEMPLATE **EvtTrb
)
{
- EFI_STATUS Status;
- URB *Urb;
+ EFI_STATUS Status;
+ URB *Urb;
//
// Validate the parameters
@@ -128,24 +128,24 @@ ON_EXIT:
@return Created URB or NULL
**/
-URB*
+URB *
XhcCreateUrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
)
{
- USB_ENDPOINT *Ep;
- EFI_STATUS Status;
- URB *Urb;
+ USB_ENDPOINT *Ep;
+ EFI_STATUS Status;
+ URB *Urb;
Urb = AllocateZeroPool (sizeof (URB));
if (Urb == NULL) {
@@ -189,8 +189,8 @@ XhcCreateUrb (
**/
VOID
XhcFreeUrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
if ((Xhc == NULL) || (Urb == NULL)) {
@@ -215,23 +215,23 @@ XhcFreeUrb (
**/
EFI_STATUS
XhcCreateTransferTrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- VOID *OutputContext;
- TRANSFER_RING *EPRing;
- UINT8 EPType;
- UINT8 SlotId;
- UINT8 Dci;
- TRB *TrbStart;
- UINTN TotalLen;
- UINTN Len;
- UINTN TrbNum;
- EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *Map;
- EFI_STATUS Status;
+ VOID *OutputContext;
+ TRANSFER_RING *EPRing;
+ UINT8 EPType;
+ UINT8 SlotId;
+ UINT8 Dci;
+ TRB *TrbStart;
+ UINTN TotalLen;
+ UINTN Len;
+ UINTN TrbNum;
+ EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *Map;
+ EFI_STATUS Status;
SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
@@ -244,37 +244,37 @@ XhcCreateTransferTrb (
Urb->Completed = 0;
Urb->Result = EFI_USB_NOERROR;
- Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
+ Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
- EPRing = (TRANSFER_RING *)(UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1];
- Urb->Ring = EPRing;
+ EPRing = (TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1];
+ Urb->Ring = EPRing;
OutputContext = Xhc->UsbDevContext[SlotId].OutputContext;
if (Xhc->HcCParams.Data.Csz == 0) {
- EPType = (UINT8) ((DEVICE_CONTEXT *)OutputContext)->EP[Dci-1].EPType;
+ EPType = (UINT8)((DEVICE_CONTEXT *)OutputContext)->EP[Dci-1].EPType;
} else {
- EPType = (UINT8) ((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType;
+ EPType = (UINT8)((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType;
}
//
// No need to remap.
//
if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) {
- if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) {
+ if (((UINT8)(Urb->Ep.Direction)) == EfiUsbDataIn) {
MapOp = EfiPciIoOperationBusMasterWrite;
} else {
MapOp = EfiPciIoOperationBusMasterRead;
}
- Len = Urb->DataLen;
- Status = Xhc->PciIo->Map (Xhc->PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
+ Len = Urb->DataLen;
+ Status = Xhc->PciIo->Map (Xhc->PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
DEBUG ((DEBUG_ERROR, "XhcCreateTransferTrb: Fail to map Urb->Data.\n"));
return EFI_OUT_OF_RESOURCES;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
}
//
@@ -287,7 +287,7 @@ XhcCreateTransferTrb (
//
// For control transfer, create SETUP_STAGE_TRB first.
//
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
TrbStart->TrbCtrSetup.bmRequestType = Urb->Request->RequestType;
TrbStart->TrbCtrSetup.bRequest = Urb->Request->Request;
TrbStart->TrbCtrSetup.wValue = Urb->Request->Value;
@@ -310,6 +310,7 @@ XhcCreateTransferTrb (
} else {
TrbStart->TrbCtrSetup.TRT = 0;
}
+
//
// Update the cycle bit
//
@@ -321,10 +322,10 @@ XhcCreateTransferTrb (
//
if (Urb->DataLen > 0) {
XhcSyncTrsRing (Xhc, EPRing);
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
- TrbStart->TrbCtrData.TRBPtrLo = XHC_LOW_32BIT(Urb->DataPhy);
- TrbStart->TrbCtrData.TRBPtrHi = XHC_HIGH_32BIT(Urb->DataPhy);
- TrbStart->TrbCtrData.Length = (UINT32) Urb->DataLen;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart->TrbCtrData.TRBPtrLo = XHC_LOW_32BIT (Urb->DataPhy);
+ TrbStart->TrbCtrData.TRBPtrHi = XHC_HIGH_32BIT (Urb->DataPhy);
+ TrbStart->TrbCtrData.Length = (UINT32)Urb->DataLen;
TrbStart->TrbCtrData.TDSize = 0;
TrbStart->TrbCtrData.IntTarget = 0;
TrbStart->TrbCtrData.ISP = 1;
@@ -339,18 +340,20 @@ XhcCreateTransferTrb (
} else {
TrbStart->TrbCtrData.DIR = 0;
}
+
//
// Update the cycle bit
//
TrbStart->TrbCtrData.CycleBit = EPRing->RingPCS & BIT0;
Urb->TrbNum++;
}
+
//
// For control transfer, create STATUS_STAGE_TRB.
// Get the pointer to next TRB for status stage use
//
XhcSyncTrsRing (Xhc, EPRing);
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
TrbStart->TrbCtrStatus.IntTarget = 0;
TrbStart->TrbCtrStatus.IOC = 1;
TrbStart->TrbCtrStatus.CH = 0;
@@ -362,6 +365,7 @@ XhcCreateTransferTrb (
} else {
TrbStart->TrbCtrStatus.DIR = 0;
}
+
//
// Update the cycle bit
//
@@ -387,10 +391,11 @@ XhcCreateTransferTrb (
} else {
Len = 0x10000;
}
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
- TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.Length = (UINT32) Len;
+
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.Length = (UINT32)Len;
TrbStart->TrbNormal.TDSize = 0;
TrbStart->TrbNormal.IntTarget = 0;
TrbStart->TrbNormal.ISP = 1;
@@ -422,10 +427,11 @@ XhcCreateTransferTrb (
} else {
Len = 0x10000;
}
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
- TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.Length = (UINT32) Len;
+
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.Length = (UINT32)Len;
TrbStart->TrbNormal.TDSize = 0;
TrbStart->TrbNormal.IntTarget = 0;
TrbStart->TrbNormal.ISP = 1;
@@ -446,7 +452,7 @@ XhcCreateTransferTrb (
break;
default:
- DEBUG ((DEBUG_INFO, "Not supported EPType 0x%x!\n",EPType));
+ DEBUG ((DEBUG_INFO, "Not supported EPType 0x%x!\n", EPType));
ASSERT (FALSE);
break;
}
@@ -454,7 +460,6 @@ XhcCreateTransferTrb (
return EFI_SUCCESS;
}
-
/**
Initialize the XHCI host controller for schedule.
@@ -463,7 +468,7 @@ XhcCreateTransferTrb (
**/
VOID
XhcInitSched (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
VOID *Dcbaa;
@@ -500,8 +505,8 @@ XhcInitSched (
// The Device Context Base Address Array shall contain MaxSlotsEn + 1 entries.
// Software shall set Device Context Base Address Array entries for unallocated Device Slots to '0'.
//
- Entries = (Xhc->MaxSlotsEn + 1) * sizeof(UINT64);
- Dcbaa = UsbHcAllocateMem (Xhc->MemPool, Entries);
+ Entries = (Xhc->MaxSlotsEn + 1) * sizeof (UINT64);
+ Dcbaa = UsbHcAllocateMem (Xhc->MemPool, Entries);
ASSERT (Dcbaa != NULL);
ZeroMem (Dcbaa, Entries);
@@ -529,14 +534,14 @@ XhcInitSched (
Xhc->ScratchEntry = ScratchEntry;
ScratchPhy = 0;
- Status = UsbHcAllocateAlignedPages (
- Xhc->PciIo,
- EFI_SIZE_TO_PAGES (MaxScratchpadBufs * sizeof (UINT64)),
- Xhc->PageSize,
- (VOID **) &ScratchBuf,
- &ScratchPhy,
- &Xhc->ScratchMap
- );
+ Status = UsbHcAllocateAlignedPages (
+ Xhc->PciIo,
+ EFI_SIZE_TO_PAGES (MaxScratchpadBufs * sizeof (UINT64)),
+ Xhc->PageSize,
+ (VOID **)&ScratchBuf,
+ &ScratchPhy,
+ &Xhc->ScratchMap
+ );
ASSERT_EFI_ERROR (Status);
ZeroMem (ScratchBuf, MaxScratchpadBufs * sizeof (UINT64));
@@ -547,14 +552,14 @@ XhcInitSched (
//
for (Index = 0; Index < MaxScratchpadBufs; Index++) {
ScratchEntryPhy = 0;
- Status = UsbHcAllocateAlignedPages (
- Xhc->PciIo,
- EFI_SIZE_TO_PAGES (Xhc->PageSize),
- Xhc->PageSize,
- (VOID **) &ScratchEntry[Index],
- &ScratchEntryPhy,
- (VOID **) &ScratchEntryMap[Index]
- );
+ Status = UsbHcAllocateAlignedPages (
+ Xhc->PciIo,
+ EFI_SIZE_TO_PAGES (Xhc->PageSize),
+ Xhc->PageSize,
+ (VOID **)&ScratchEntry[Index],
+ &ScratchEntryPhy,
+ (VOID **)&ScratchEntryMap[Index]
+ );
ASSERT_EFI_ERROR (Status);
ZeroMem ((VOID *)(UINTN)ScratchEntry[Index], Xhc->PageSize);
//
@@ -562,11 +567,12 @@ XhcInitSched (
//
*ScratchBuf++ = ScratchEntryPhy;
}
+
//
// The Scratchpad Buffer Array contains pointers to the Scratchpad Buffers. Entry 0 of the
// Device Context Base Address Array points to the Scratchpad Buffer Array.
//
- *(UINT64 *)Dcbaa = (UINT64)(UINTN) ScratchPhy;
+ *(UINT64 *)Dcbaa = (UINT64)(UINTN)ScratchPhy;
}
//
@@ -579,7 +585,7 @@ XhcInitSched (
// So divide it to two 32-bytes width register access.
//
DcbaaPhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Dcbaa, Entries);
- XhcWriteOpReg (Xhc, XHC_DCBAAP_OFFSET, XHC_LOW_32BIT(DcbaaPhy));
+ XhcWriteOpReg (Xhc, XHC_DCBAAP_OFFSET, XHC_LOW_32BIT (DcbaaPhy));
XhcWriteOpReg (Xhc, XHC_DCBAAP_OFFSET + 4, XHC_HIGH_32BIT (DcbaaPhy));
DEBUG ((DEBUG_INFO, "XhcInitSched:DCBAA=0x%x\n", (UINT64)(UINTN)Xhc->DCBAA));
@@ -596,15 +602,15 @@ XhcInitSched (
// Transfer Ring it checks for a Cycle bit transition. If a transition detected, the ring is empty.
// So we set RCS as inverted PCS init value to let Command Ring empty
//
- CmdRing = (UINT64)(UINTN)Xhc->CmdRing.RingSeg0;
- CmdRingPhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, (VOID *)(UINTN) CmdRing, sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER);
+ CmdRing = (UINT64)(UINTN)Xhc->CmdRing.RingSeg0;
+ CmdRingPhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, (VOID *)(UINTN)CmdRing, sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER);
ASSERT ((CmdRingPhy & 0x3F) == 0);
CmdRingPhy |= XHC_CRCR_RCS;
//
// Some 3rd party XHCI external cards don't support single 64-bytes width register access,
// So divide it to two 32-bytes width register access.
//
- XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET, XHC_LOW_32BIT(CmdRingPhy));
+ XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET, XHC_LOW_32BIT (CmdRingPhy));
XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET + 4, XHC_HIGH_32BIT (CmdRingPhy));
//
@@ -621,9 +627,13 @@ XhcInitSched (
// Allocate EventRing for Cmd, Ctrl, Bulk, Interrupt, AsynInterrupt transfer
//
CreateEventRing (Xhc, &Xhc->EventRing);
- DEBUG ((DEBUG_INFO, "XhcInitSched: Created CMD ring [%p~%p) EVENT ring [%p~%p)\n",
- Xhc->CmdRing.RingSeg0, (UINTN)Xhc->CmdRing.RingSeg0 + sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER,
- Xhc->EventRing.EventRingSeg0, (UINTN)Xhc->EventRing.EventRingSeg0 + sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER
+ DEBUG ((
+ DEBUG_INFO,
+ "XhcInitSched: Created CMD ring [%p~%p) EVENT ring [%p~%p)\n",
+ Xhc->CmdRing.RingSeg0,
+ (UINTN)Xhc->CmdRing.RingSeg0 + sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER,
+ Xhc->EventRing.EventRingSeg0,
+ (UINTN)Xhc->EventRing.EventRingSeg0 + sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER
));
}
@@ -644,19 +654,20 @@ XhcInitSched (
EFI_STATUS
EFIAPI
XhcRecoverHaltedEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- UINT8 Dci;
- UINT8 SlotId;
+ EFI_STATUS Status;
+ UINT8 Dci;
+ UINT8 SlotId;
Status = EFI_SUCCESS;
SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
+
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
@@ -665,8 +676,8 @@ XhcRecoverHaltedEndpoint (
//
// 1) Send Reset endpoint command to transit from halt to stop state
//
- Status = XhcResetEndpoint(Xhc, SlotId, Dci);
- if (EFI_ERROR(Status)) {
+ Status = XhcResetEndpoint (Xhc, SlotId, Dci);
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcRecoverHaltedEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
goto Done;
}
@@ -674,8 +685,8 @@ XhcRecoverHaltedEndpoint (
//
// 2)Set dequeue pointer
//
- Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
- if (EFI_ERROR(Status)) {
+ Status = XhcSetTrDequeuePointer (Xhc, SlotId, Dci, Urb);
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcRecoverHaltedEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
goto Done;
}
@@ -706,19 +717,20 @@ Done:
EFI_STATUS
EFIAPI
XhcDequeueTrbFromEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- UINT8 Dci;
- UINT8 SlotId;
+ EFI_STATUS Status;
+ UINT8 Dci;
+ UINT8 SlotId;
Status = EFI_SUCCESS;
SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
+
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
@@ -727,8 +739,8 @@ XhcDequeueTrbFromEndpoint (
//
// 1) Send Stop endpoint command to stop xHC from executing of the TDs on the endpoint
//
- Status = XhcStopEndpoint(Xhc, SlotId, Dci, Urb);
- if (EFI_ERROR(Status)) {
+ Status = XhcStopEndpoint (Xhc, SlotId, Dci, Urb);
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
goto Done;
}
@@ -736,7 +748,7 @@ XhcDequeueTrbFromEndpoint (
//
// 2)Set dequeue pointer
//
- if (Urb->Finished && Urb->Result == EFI_USB_NOERROR) {
+ if (Urb->Finished && (Urb->Result == EFI_USB_NOERROR)) {
//
// Return Already Started to indicate the pending URB is finished.
// This fixes BULK data loss when transfer is detected as timeout
@@ -745,7 +757,7 @@ XhcDequeueTrbFromEndpoint (
Status = EFI_ALREADY_STARTED;
DEBUG ((DEBUG_INFO, "XhcDequeueTrbFromEndpoint: Pending URB is finished: Length Actual/Expect = %d/%d!\n", Urb->Completed, Urb->DataLen));
} else {
- Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
+ Status = XhcSetTrDequeuePointer (Xhc, SlotId, Dci, Urb);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
goto Done;
@@ -770,8 +782,8 @@ Done:
**/
VOID
CreateEventRing (
- IN USB_XHCI_INSTANCE *Xhc,
- OUT EVENT_RING *EventRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ OUT EVENT_RING *EventRing
)
{
VOID *Buf;
@@ -783,15 +795,15 @@ CreateEventRing (
ASSERT (EventRing != NULL);
Size = sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER;
- Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
+ Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, Size);
EventRing->EventRingSeg0 = Buf;
EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
- EventRing->EventRingDequeue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
- EventRing->EventRingEnqueue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
+ EventRing->EventRingDequeue = (TRB_TEMPLATE *)EventRing->EventRingSeg0;
+ EventRing->EventRingEnqueue = (TRB_TEMPLATE *)EventRing->EventRingSeg0;
DequeuePhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, Size);
@@ -802,12 +814,12 @@ CreateEventRing (
EventRing->EventRingCCS = 1;
Size = sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER;
- Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
+ Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, Size);
- ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *) Buf;
+ ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *)Buf;
EventRing->ERSTBase = ERSTBase;
ERSTBase->PtrLo = XHC_LOW_32BIT (DequeuePhy);
ERSTBase->PtrHi = XHC_HIGH_32BIT (DequeuePhy);
@@ -832,12 +844,12 @@ CreateEventRing (
XhcWriteRuntimeReg (
Xhc,
XHC_ERDP_OFFSET,
- XHC_LOW_32BIT((UINT64)(UINTN)DequeuePhy)
+ XHC_LOW_32BIT ((UINT64)(UINTN)DequeuePhy)
);
XhcWriteRuntimeReg (
Xhc,
XHC_ERDP_OFFSET + 4,
- XHC_HIGH_32BIT((UINT64)(UINTN)DequeuePhy)
+ XHC_HIGH_32BIT ((UINT64)(UINTN)DequeuePhy)
);
//
// Program the Interrupter Event Ring Segment Table Base Address (ERSTBA) register(5.5.2.3.2)
@@ -848,12 +860,12 @@ CreateEventRing (
XhcWriteRuntimeReg (
Xhc,
XHC_ERSTBA_OFFSET,
- XHC_LOW_32BIT((UINT64)(UINTN)ERSTPhy)
+ XHC_LOW_32BIT ((UINT64)(UINTN)ERSTPhy)
);
XhcWriteRuntimeReg (
Xhc,
XHC_ERSTBA_OFFSET + 4,
- XHC_HIGH_32BIT((UINT64)(UINTN)ERSTPhy)
+ XHC_HIGH_32BIT ((UINT64)(UINTN)ERSTPhy)
);
//
// Need set IMAN IE bit to enble the ring interrupt
@@ -871,9 +883,9 @@ CreateEventRing (
**/
VOID
CreateTransferRing (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINTN TrbNum,
- OUT TRANSFER_RING *TransferRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINTN TrbNum,
+ OUT TRANSFER_RING *TransferRing
)
{
VOID *Buf;
@@ -882,28 +894,28 @@ CreateTransferRing (
Buf = UsbHcAllocateMem (Xhc->MemPool, sizeof (TRB_TEMPLATE) * TrbNum);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, sizeof (TRB_TEMPLATE) * TrbNum);
- TransferRing->RingSeg0 = Buf;
- TransferRing->TrbNumber = TrbNum;
- TransferRing->RingEnqueue = (TRB_TEMPLATE *) TransferRing->RingSeg0;
- TransferRing->RingDequeue = (TRB_TEMPLATE *) TransferRing->RingSeg0;
- TransferRing->RingPCS = 1;
+ TransferRing->RingSeg0 = Buf;
+ TransferRing->TrbNumber = TrbNum;
+ TransferRing->RingEnqueue = (TRB_TEMPLATE *)TransferRing->RingSeg0;
+ TransferRing->RingDequeue = (TRB_TEMPLATE *)TransferRing->RingSeg0;
+ TransferRing->RingPCS = 1;
//
// 4.9.2 Transfer Ring Management
// To form a ring (or circular queue) a Link TRB may be inserted at the end of a ring to
// point to the first TRB in the ring.
//
- EndTrb = (LINK_TRB *) ((UINTN)Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
+ EndTrb = (LINK_TRB *)((UINTN)Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
EndTrb->Type = TRB_TYPE_LINK;
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, sizeof (TRB_TEMPLATE) * TrbNum);
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, sizeof (TRB_TEMPLATE) * TrbNum);
EndTrb->PtrLo = XHC_LOW_32BIT (PhyAddr);
EndTrb->PtrHi = XHC_HIGH_32BIT (PhyAddr);
//
// Toggle Cycle (TC). When set to '1', the xHC shall toggle its interpretation of the Cycle bit.
//
- EndTrb->TC = 1;
+ EndTrb->TC = 1;
//
// Set Cycle bit as other TRB PCS init value
//
@@ -920,11 +932,11 @@ CreateTransferRing (
EFI_STATUS
EFIAPI
XhcFreeEventRing (
- IN USB_XHCI_INSTANCE *Xhc,
- IN EVENT_RING *EventRing
-)
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN EVENT_RING *EventRing
+ )
{
- if(EventRing->EventRingSeg0 == NULL) {
+ if (EventRing->EventRingSeg0 == NULL) {
return EFI_SUCCESS;
}
@@ -948,11 +960,11 @@ XhcFreeEventRing (
**/
VOID
XhcFreeSched (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
- UINT32 Index;
- UINT64 *ScratchEntry;
+ UINT32 Index;
+ UINT64 *ScratchEntry;
if (Xhc->ScratchBuf != NULL) {
ScratchEntry = Xhc->ScratchEntry;
@@ -960,8 +972,9 @@ XhcFreeSched (
//
// Free Scratchpad Buffers
//
- UsbHcFreeAlignedPages (Xhc->PciIo, (VOID*)(UINTN)ScratchEntry[Index], EFI_SIZE_TO_PAGES (Xhc->PageSize), (VOID *) Xhc->ScratchEntryMap[Index]);
+ UsbHcFreeAlignedPages (Xhc->PciIo, (VOID *)(UINTN)ScratchEntry[Index], EFI_SIZE_TO_PAGES (Xhc->PageSize), (VOID *)Xhc->ScratchEntryMap[Index]);
}
+
//
// Free Scratchpad Buffer Array
//
@@ -975,10 +988,10 @@ XhcFreeSched (
Xhc->CmdRing.RingSeg0 = NULL;
}
- XhcFreeEventRing (Xhc,&Xhc->EventRing);
+ XhcFreeEventRing (Xhc, &Xhc->EventRing);
if (Xhc->DCBAA != NULL) {
- UsbHcFreeMem (Xhc->MemPool, Xhc->DCBAA, (Xhc->MaxSlotsEn + 1) * sizeof(UINT64));
+ UsbHcFreeMem (Xhc->MemPool, Xhc->DCBAA, (Xhc->MaxSlotsEn + 1) * sizeof (UINT64));
Xhc->DCBAA = NULL;
}
@@ -1004,30 +1017,31 @@ XhcFreeSched (
**/
BOOLEAN
IsTransferRingTrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN TRB_TEMPLATE *Trb,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN TRB_TEMPLATE *Trb,
+ IN URB *Urb
)
{
- LINK_TRB *LinkTrb;
- TRB_TEMPLATE *CheckedTrb;
- UINTN Index;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ LINK_TRB *LinkTrb;
+ TRB_TEMPLATE *CheckedTrb;
+ UINTN Index;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
CheckedTrb = Urb->TrbStart;
for (Index = 0; Index < Urb->TrbNum; Index++) {
if (Trb == CheckedTrb) {
return TRUE;
}
+
CheckedTrb++;
//
// If the checked TRB is the link TRB at the end of the transfer ring,
// recircle it to the head of the ring.
//
if (CheckedTrb->Type == TRB_TYPE_LINK) {
- LinkTrb = (LINK_TRB *) CheckedTrb;
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(LinkTrb->PtrLo | LShiftU64 ((UINT64) LinkTrb->PtrHi, 32));
- CheckedTrb = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
+ LinkTrb = (LINK_TRB *)CheckedTrb;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(LinkTrb->PtrLo | LShiftU64 ((UINT64)LinkTrb->PtrHi, 32));
+ CheckedTrb = (TRB_TEMPLATE *)(UINTN)UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN)PhyAddr, sizeof (TRB_TEMPLATE));
ASSERT (CheckedTrb == Urb->Ring->RingSeg0);
}
}
@@ -1048,14 +1062,14 @@ IsTransferRingTrb (
**/
BOOLEAN
IsAsyncIntTrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN TRB_TEMPLATE *Trb,
- OUT URB **Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN TRB_TEMPLATE *Trb,
+ OUT URB **Urb
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- URB *CheckedUrb;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ URB *CheckedUrb;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
@@ -1068,7 +1082,6 @@ IsAsyncIntTrb (
return FALSE;
}
-
/**
Check the URB's execution result and update the URB's
result accordingly.
@@ -1081,21 +1094,21 @@ IsAsyncIntTrb (
**/
BOOLEAN
XhcCheckUrbResult (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- EVT_TRB_TRANSFER *EvtTrb;
- TRB_TEMPLATE *TRBPtr;
- UINTN Index;
- UINT8 TRBType;
- EFI_STATUS Status;
- URB *AsyncUrb;
- URB *CheckedUrb;
- UINT64 XhcDequeue;
- UINT32 High;
- UINT32 Low;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EVT_TRB_TRANSFER *EvtTrb;
+ TRB_TEMPLATE *TRBPtr;
+ UINTN Index;
+ UINT8 TRBType;
+ EFI_STATUS Status;
+ URB *AsyncUrb;
+ URB *CheckedUrb;
+ UINT64 XhcDequeue;
+ UINT32 High;
+ UINT32 Low;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT ((Xhc != NULL) && (Urb != NULL));
@@ -1136,8 +1149,8 @@ XhcCheckUrbResult (
//
// Need convert pci device address to host address
//
- PhyAddr = (EFI_PHYSICAL_ADDRESS)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
- TRBPtr = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64)EvtTrb->TRBPtrHi, 32));
+ TRBPtr = (TRB_TEMPLATE *)(UINTN)UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN)PhyAddr, sizeof (TRB_TEMPLATE));
//
// Update the status of URB including the pending URB, the URB that is currently checked,
@@ -1145,7 +1158,7 @@ XhcCheckUrbResult (
// This way is used to avoid that those completed async transfer events don't get
// handled in time and are flushed by newer coming events.
//
- if (Xhc->PendingUrb != NULL && IsTransferRingTrb (Xhc, TRBPtr, Xhc->PendingUrb)) {
+ if ((Xhc->PendingUrb != NULL) && IsTransferRingTrb (Xhc, TRBPtr, Xhc->PendingUrb)) {
CheckedUrb = Xhc->PendingUrb;
} else if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {
CheckedUrb = Urb;
@@ -1159,25 +1172,25 @@ XhcCheckUrbResult (
case TRB_COMPLETION_STALL_ERROR:
CheckedUrb->Result |= EFI_USB_ERR_STALL;
CheckedUrb->Finished = TRUE;
- DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: STALL_ERROR! Completecode = %x\n",EvtTrb->Completecode));
+ DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: STALL_ERROR! Completecode = %x\n", EvtTrb->Completecode));
goto EXIT;
case TRB_COMPLETION_BABBLE_ERROR:
CheckedUrb->Result |= EFI_USB_ERR_BABBLE;
CheckedUrb->Finished = TRUE;
- DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: BABBLE_ERROR! Completecode = %x\n",EvtTrb->Completecode));
+ DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: BABBLE_ERROR! Completecode = %x\n", EvtTrb->Completecode));
goto EXIT;
case TRB_COMPLETION_DATA_BUFFER_ERROR:
CheckedUrb->Result |= EFI_USB_ERR_BUFFER;
CheckedUrb->Finished = TRUE;
- DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: ERR_BUFFER! Completecode = %x\n",EvtTrb->Completecode));
+ DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: ERR_BUFFER! Completecode = %x\n", EvtTrb->Completecode));
goto EXIT;
case TRB_COMPLETION_USB_TRANSACTION_ERROR:
CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
CheckedUrb->Finished = TRUE;
- DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: TRANSACTION_ERROR! Completecode = %x\n",EvtTrb->Completecode));
+ DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: TRANSACTION_ERROR! Completecode = %x\n", EvtTrb->Completecode));
goto EXIT;
case TRB_COMPLETION_STOPPED:
@@ -1196,17 +1209,18 @@ XhcCheckUrbResult (
DEBUG ((DEBUG_VERBOSE, "XhcCheckUrbResult: short packet happens!\n"));
}
- TRBType = (UINT8) (TRBPtr->Type);
+ TRBType = (UINT8)(TRBPtr->Type);
if ((TRBType == TRB_TYPE_DATA_STAGE) ||
(TRBType == TRB_TYPE_NORMAL) ||
- (TRBType == TRB_TYPE_ISOCH)) {
- CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL*)TRBPtr)->Length - EvtTrb->Length);
+ (TRBType == TRB_TYPE_ISOCH))
+ {
+ CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL *)TRBPtr)->Length - EvtTrb->Length);
}
break;
default:
- DEBUG ((DEBUG_ERROR, "Transfer Default Error Occur! Completecode = 0x%x!\n",EvtTrb->Completecode));
+ DEBUG ((DEBUG_ERROR, "Transfer Default Error Occur! Completecode = 0x%x!\n", EvtTrb->Completecode));
CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
CheckedUrb->Finished = TRUE;
goto EXIT;
@@ -1237,9 +1251,9 @@ EXIT:
// Some 3rd party XHCI external cards don't support single 64-bytes width register access,
// So divide it to two 32-bytes width register access.
//
- Low = XhcReadRuntimeReg (Xhc, XHC_ERDP_OFFSET);
- High = XhcReadRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4);
- XhcDequeue = (UINT64)(LShiftU64((UINT64)High, 32) | Low);
+ Low = XhcReadRuntimeReg (Xhc, XHC_ERDP_OFFSET);
+ High = XhcReadRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4);
+ XhcDequeue = (UINT64)(LShiftU64 ((UINT64)High, 32) | Low);
PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->EventRing.EventRingDequeue, sizeof (TRB_TEMPLATE));
@@ -1255,7 +1269,6 @@ EXIT:
return Urb->Finished;
}
-
/**
Execute the transfer by polling the URB. This is a synchronous operation.
@@ -1272,18 +1285,18 @@ EXIT:
**/
EFI_STATUS
XhcExecTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN BOOLEAN CmdTransfer,
- IN URB *Urb,
- IN UINTN Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN BOOLEAN CmdTransfer,
+ IN URB *Urb,
+ IN UINTN Timeout
)
{
- EFI_STATUS Status;
- UINT8 SlotId;
- UINT8 Dci;
- BOOLEAN Finished;
- EFI_EVENT TimeoutEvent;
- BOOLEAN IndefiniteTimeout;
+ EFI_STATUS Status;
+ UINT8 SlotId;
+ UINT8 Dci;
+ BOOLEAN Finished;
+ EFI_EVENT TimeoutEvent;
+ BOOLEAN IndefiniteTimeout;
Status = EFI_SUCCESS;
Finished = FALSE;
@@ -1298,7 +1311,8 @@ XhcExecTransfer (
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
- Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
+
+ Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
ASSERT (Dci < 32);
}
@@ -1319,9 +1333,11 @@ XhcExecTransfer (
goto DONE;
}
- Status = gBS->SetTimer (TimeoutEvent,
- TimerRelative,
- EFI_TIMER_PERIOD_MILLISECONDS(Timeout));
+ Status = gBS->SetTimer (
+ TimeoutEvent,
+ TimerRelative,
+ EFI_TIMER_PERIOD_MILLISECONDS (Timeout)
+ );
if (EFI_ERROR (Status)) {
goto DONE;
@@ -1335,17 +1351,18 @@ RINGDOORBELL:
if (Finished) {
break;
}
+
gBS->Stall (XHC_1_MICROSECOND);
- } while (IndefiniteTimeout || EFI_ERROR(gBS->CheckEvent (TimeoutEvent)));
+ } while (IndefiniteTimeout || EFI_ERROR (gBS->CheckEvent (TimeoutEvent)));
DONE:
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
Urb->Result = EFI_USB_ERR_NOTEXECUTE;
} else if (!Finished) {
Urb->Result = EFI_USB_ERR_TIMEOUT;
Status = EFI_TIMEOUT;
} else if (Urb->Result != EFI_USB_NOERROR) {
- Status = EFI_DEVICE_ERROR;
+ Status = EFI_DEVICE_ERROR;
}
if (TimeoutEvent != NULL) {
@@ -1369,9 +1386,9 @@ DONE:
**/
EFI_STATUS
XhciDelAsyncIntTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpNum
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpNum
)
{
LIST_ENTRY *Entry;
@@ -1389,7 +1406,8 @@ XhciDelAsyncIntTransfer (
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
if ((Urb->Ep.BusAddr == BusAddr) &&
(Urb->Ep.EpAddr == EpNum) &&
- (Urb->Ep.Direction == Direction)) {
+ (Urb->Ep.Direction == Direction))
+ {
//
// Device doesn't finish the IntTransfer until real data comes
// So the TRB should be removed as well.
@@ -1417,13 +1435,13 @@ XhciDelAsyncIntTransfer (
**/
VOID
XhciDelAllAsyncIntTransfers (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- URB *Urb;
- EFI_STATUS Status;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ URB *Urb;
+ EFI_STATUS Status;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
@@ -1461,18 +1479,18 @@ XhciDelAllAsyncIntTransfers (
**/
URB *
XhciInsertAsyncIntTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
)
{
- VOID *Data;
- URB *Urb;
+ VOID *Data;
+ URB *Urb;
Data = AllocateZeroPool (DataLen);
if (Data == NULL) {
@@ -1517,17 +1535,18 @@ XhciInsertAsyncIntTransfer (
**/
VOID
XhcUpdateAsyncRequest (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (Urb->Result == EFI_USB_NOERROR) {
Status = XhcCreateTransferTrb (Xhc, Urb);
if (EFI_ERROR (Status)) {
return;
}
+
Status = RingIntTransferDoorBell (Xhc, Urb);
if (EFI_ERROR (Status)) {
return;
@@ -1548,16 +1567,16 @@ XhcUpdateAsyncRequest (
**/
EFI_STATUS
XhcFlushAsyncIntMap (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN Len;
- VOID *Map;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINTN Len;
+ VOID *Map;
PciIo = Xhc->PciIo;
Len = Urb->DataLen;
@@ -1582,8 +1601,8 @@ XhcFlushAsyncIntMap (
goto ON_ERROR;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
return EFI_SUCCESS;
ON_ERROR:
@@ -1600,22 +1619,22 @@ ON_ERROR:
VOID
EFIAPI
XhcMonitorAsyncRequests (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_XHCI_INSTANCE *Xhc;
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- UINT8 *ProcBuf;
- URB *Urb;
- UINT8 SlotId;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_XHCI_INSTANCE *Xhc;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ UINT8 *ProcBuf;
+ URB *Urb;
+ UINT8 SlotId;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (XHC_TPL);
- Xhc = (USB_XHCI_INSTANCE*) Context;
+ Xhc = (USB_XHCI_INSTANCE *)Context;
BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
@@ -1685,7 +1704,7 @@ XhcMonitorAsyncRequests (
// his callback. Some drivers may has a lower TPL restriction.
//
gBS->RestoreTPL (OldTpl);
- (Urb->Callback) (ProcBuf, Urb->Completed, Urb->Context, Urb->Result);
+ (Urb->Callback)(ProcBuf, Urb->Completed, Urb->Context, Urb->Result);
OldTpl = gBS->RaiseTPL (XHC_TPL);
}
@@ -1713,19 +1732,19 @@ XhcMonitorAsyncRequests (
EFI_STATUS
EFIAPI
XhcPollPortStatusChange (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT8 Port,
- IN EFI_USB_PORT_STATUS *PortState
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_STATUS *PortState
)
{
- EFI_STATUS Status;
- UINT8 Speed;
- UINT8 SlotId;
- UINT8 Retries;
- USB_DEV_ROUTE RouteChart;
+ EFI_STATUS Status;
+ UINT8 Speed;
+ UINT8 SlotId;
+ UINT8 Retries;
+ USB_DEV_ROUTE RouteChart;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
Retries = XHC_INIT_DEVICE_SLOT_RETRIES;
if ((PortState->PortChangeStatus & (USB_PORT_STAT_C_CONNECTION | USB_PORT_STAT_C_ENABLE | USB_PORT_STAT_C_OVERCURRENT | USB_PORT_STAT_C_RESET)) == 0) {
@@ -1737,13 +1756,14 @@ XhcPollPortStatusChange (
RouteChart.Route.RootPortNum = Port + 1;
RouteChart.Route.TierNum = 1;
} else {
- if(Port < 14) {
+ if (Port < 14) {
RouteChart.Route.RouteString = ParentRouteChart.Route.RouteString | (Port << (4 * (ParentRouteChart.Route.TierNum - 1)));
} else {
RouteChart.Route.RouteString = ParentRouteChart.Route.RouteString | (15 << (4 * (ParentRouteChart.Route.TierNum - 1)));
}
- RouteChart.Route.RootPortNum = ParentRouteChart.Route.RootPortNum;
- RouteChart.Route.TierNum = ParentRouteChart.Route.TierNum + 1;
+
+ RouteChart.Route.RootPortNum = ParentRouteChart.Route.RootPortNum;
+ RouteChart.Route.TierNum = ParentRouteChart.Route.TierNum + 1;
}
SlotId = XhcRouteStringToSlotId (Xhc, RouteChart);
@@ -1756,7 +1776,8 @@ XhcPollPortStatusChange (
}
if (((PortState->PortStatus & USB_PORT_STAT_ENABLE) != 0) &&
- ((PortState->PortStatus & USB_PORT_STAT_CONNECTION) != 0)) {
+ ((PortState->PortStatus & USB_PORT_STAT_CONNECTION) != 0))
+ {
//
// Has a device attached, Identify device speed after port is enabled.
//
@@ -1796,7 +1817,6 @@ XhcPollPortStatusChange (
return Status;
}
-
/**
Calculate the device context index by endpoint address and direction.
@@ -1808,19 +1828,20 @@ XhcPollPortStatusChange (
**/
UINT8
XhcEndpointToDci (
- IN UINT8 EpAddr,
- IN UINT8 Direction
+ IN UINT8 EpAddr,
+ IN UINT8 Direction
)
{
- UINT8 Index;
+ UINT8 Index;
if (EpAddr == 0) {
return 1;
} else {
- Index = (UINT8) (2 * EpAddr);
+ Index = (UINT8)(2 * EpAddr);
if (Direction == EfiUsbDataIn) {
Index += 1;
}
+
return Index;
}
}
@@ -1846,7 +1867,8 @@ XhcBusDevAddrToSlotId (
for (Index = 0; Index < 255; Index++) {
if (Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
- (Xhc->UsbDevContext[Index + 1].BusDevAddr == BusDevAddr)) {
+ (Xhc->UsbDevContext[Index + 1].BusDevAddr == BusDevAddr))
+ {
break;
}
}
@@ -1879,7 +1901,8 @@ XhcRouteStringToSlotId (
for (Index = 0; Index < 255; Index++) {
if (Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
- (Xhc->UsbDevContext[Index + 1].RouteString.Dword == RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].RouteString.Dword == RouteString.Dword))
+ {
break;
}
}
@@ -1903,12 +1926,12 @@ XhcRouteStringToSlotId (
EFI_STATUS
EFIAPI
XhcSyncEventRing (
- IN USB_XHCI_INSTANCE *Xhc,
- IN EVENT_RING *EvtRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN EVENT_RING *EvtRing
)
{
- UINTN Index;
- TRB_TEMPLATE *EvtTrb1;
+ UINTN Index;
+ TRB_TEMPLATE *EvtTrb1;
ASSERT (EvtRing != NULL);
@@ -1925,8 +1948,8 @@ XhcSyncEventRing (
EvtTrb1++;
- if ((UINTN)EvtTrb1 >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
- EvtTrb1 = EvtRing->EventRingSeg0;
+ if ((UINTN)EvtTrb1 >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
+ EvtTrb1 = EvtRing->EventRingSeg0;
EvtRing->EventRingCCS = (EvtRing->EventRingCCS) ? 0 : 1;
}
}
@@ -1952,12 +1975,12 @@ XhcSyncEventRing (
EFI_STATUS
EFIAPI
XhcSyncTrsRing (
- IN USB_XHCI_INSTANCE *Xhc,
- IN TRANSFER_RING *TrsRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN TRANSFER_RING *TrsRing
)
{
- UINTN Index;
- TRB_TEMPLATE *TrsTrb;
+ UINTN Index;
+ TRB_TEMPLATE *TrsTrb;
ASSERT (TrsRing != NULL);
//
@@ -1970,18 +1993,19 @@ XhcSyncTrsRing (
if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {
break;
}
+
TrsTrb++;
- if ((UINT8) TrsTrb->Type == TRB_TYPE_LINK) {
- ASSERT (((LINK_TRB*)TrsTrb)->TC != 0);
+ if ((UINT8)TrsTrb->Type == TRB_TYPE_LINK) {
+ ASSERT (((LINK_TRB *)TrsTrb)->TC != 0);
//
// set cycle bit in Link TRB as normal
//
- ((LINK_TRB*)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
+ ((LINK_TRB *)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
//
// Toggle PCS maintained by software
//
TrsRing->RingPCS = (TrsRing->RingPCS & BIT0) ? 0 : 1;
- TrsTrb = (TRB_TEMPLATE *) TrsRing->RingSeg0; // Use host address
+ TrsTrb = (TRB_TEMPLATE *)TrsRing->RingSeg0; // Use host address
}
}
@@ -2018,9 +2042,9 @@ XhcSyncTrsRing (
EFI_STATUS
EFIAPI
XhcCheckNewEvent (
- IN USB_XHCI_INSTANCE *Xhc,
- IN EVENT_RING *EvtRing,
- OUT TRB_TEMPLATE **NewEvtTrb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN EVENT_RING *EvtRing,
+ OUT TRB_TEMPLATE **NewEvtTrb
)
{
ASSERT (EvtRing != NULL);
@@ -2035,7 +2059,7 @@ XhcCheckNewEvent (
//
// If the dequeue pointer is beyond the ring, then roll-back it to the begining of the ring.
//
- if ((UINTN)EvtRing->EventRingDequeue >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
+ if ((UINTN)EvtRing->EventRingDequeue >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
EvtRing->EventRingDequeue = EvtRing->EventRingSeg0;
}
@@ -2055,9 +2079,9 @@ XhcCheckNewEvent (
EFI_STATUS
EFIAPI
XhcRingDoorBell (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
)
{
if (SlotId == 0) {
@@ -2080,12 +2104,12 @@ XhcRingDoorBell (
**/
EFI_STATUS
RingIntTransferDoorBell (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
)
{
- UINT8 SlotId;
- UINT8 Dci;
+ UINT8 SlotId;
+ UINT8 Dci;
SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
@@ -2108,11 +2132,11 @@ RingIntTransferDoorBell (
EFI_STATUS
EFIAPI
XhcInitializeDeviceSlot (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
)
{
EFI_STATUS Status;
@@ -2133,15 +2157,16 @@ XhcInitializeDeviceSlot (
CmdTrb.Type = TRB_TYPE_EN_SLOT;
Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrb,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrb,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcInitializeDeviceSlot: Enable Slot Failed, Status = %r\n", Status));
return Status;
}
+
ASSERT (EvtTrb->SlotId <= Xhc->MaxSlotsEn);
DEBUG ((DEBUG_INFO, "Enable Slot Successfully, The Slot ID = 0x%x\n", EvtTrb->SlotId));
SlotId = (UINT8)EvtTrb->SlotId;
@@ -2159,10 +2184,10 @@ XhcInitializeDeviceSlot (
//
InputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (INPUT_CONTEXT));
ASSERT (InputContext != NULL);
- ASSERT (((UINTN) InputContext & 0x3F) == 0);
+ ASSERT (((UINTN)InputContext & 0x3F) == 0);
ZeroMem (InputContext, sizeof (INPUT_CONTEXT));
- Xhc->UsbDevContext[SlotId].InputContext = (VOID *) InputContext;
+ Xhc->UsbDevContext[SlotId].InputContext = (VOID *)InputContext;
//
// 2) Initialize the Input Control Context (6.2.5.1) of the Input Context by setting the A0 and A1
@@ -2183,14 +2208,15 @@ XhcInitializeDeviceSlot (
//
// The device is behind of hub device.
//
- ParentSlotId = XhcRouteStringToSlotId(Xhc, ParentRouteChart);
+ ParentSlotId = XhcRouteStringToSlotId (Xhc, ParentRouteChart);
ASSERT (ParentSlotId != 0);
//
- //if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
+ // if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
//
ParentDeviceContext = (DEVICE_CONTEXT *)Xhc->UsbDevContext[ParentSlotId].OutputContext;
if ((ParentDeviceContext->Slot.TTPortNum == 0) &&
- (ParentDeviceContext->Slot.TTHubSlotId == 0)) {
+ (ParentDeviceContext->Slot.TTHubSlotId == 0))
+ {
if ((ParentDeviceContext->Slot.Speed == (EFI_USB_SPEED_HIGH + 1)) && (DeviceSpeed < EFI_USB_SPEED_HIGH)) {
//
// Full/Low device attached to High speed hub port that isolates the high speed signaling
@@ -2217,9 +2243,9 @@ XhcInitializeDeviceSlot (
//
// 4) Allocate and initialize the Transfer Ring for the Default Control Endpoint.
//
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[0] = EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
//
// 5) Initialize the Input default control Endpoint 0 Context (6.2.3).
//
@@ -2232,6 +2258,7 @@ XhcInitializeDeviceSlot (
} else {
InputContext->EP[0].MaxPacketSize = 8;
}
+
//
// Initial value of Average TRB Length for Control endpoints would be 8B, Interrupt endpoints
// 1KB, and Bulk and Isoch endpoints 3KB.
@@ -2259,7 +2286,7 @@ XhcInitializeDeviceSlot (
//
OutputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (DEVICE_CONTEXT));
ASSERT (OutputContext != NULL);
- ASSERT (((UINTN) OutputContext & 0x3F) == 0);
+ ASSERT (((UINTN)OutputContext & 0x3F) == 0);
ZeroMem (OutputContext, sizeof (DEVICE_CONTEXT));
Xhc->UsbDevContext[SlotId].OutputContext = OutputContext;
@@ -2271,7 +2298,7 @@ XhcInitializeDeviceSlot (
//
// Fill DCBAA with PCI device address
//
- Xhc->DCBAA[SlotId] = (UINT64) (UINTN) PhyAddr;
+ Xhc->DCBAA[SlotId] = (UINT64)(UINTN)PhyAddr;
//
// 8) Issue an Address Device Command for the Device Slot, where the command points to the Input
@@ -2282,20 +2309,20 @@ XhcInitializeDeviceSlot (
//
gBS->Stall (XHC_RESET_RECOVERY_DELAY);
ZeroMem (&CmdTrbAddr, sizeof (CmdTrbAddr));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT));
CmdTrbAddr.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbAddr.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbAddr.CycleBit = 1;
CmdTrbAddr.Type = TRB_TYPE_ADDRESS_DEV;
CmdTrbAddr.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbAddr,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbAddr,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (!EFI_ERROR (Status)) {
- DeviceAddress = (UINT8) ((DEVICE_CONTEXT *) OutputContext)->Slot.DeviceAddress;
+ DeviceAddress = (UINT8)((DEVICE_CONTEXT *)OutputContext)->Slot.DeviceAddress;
DEBUG ((DEBUG_INFO, " Address %d assigned successfully\n", DeviceAddress));
Xhc->UsbDevContext[SlotId].XhciDevAddr = DeviceAddress;
} else {
@@ -2321,11 +2348,11 @@ XhcInitializeDeviceSlot (
EFI_STATUS
EFIAPI
XhcInitializeDeviceSlot64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
)
{
EFI_STATUS Status;
@@ -2346,15 +2373,16 @@ XhcInitializeDeviceSlot64 (
CmdTrb.Type = TRB_TYPE_EN_SLOT;
Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrb,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrb,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcInitializeDeviceSlot64: Enable Slot Failed, Status = %r\n", Status));
return Status;
}
+
ASSERT (EvtTrb->SlotId <= Xhc->MaxSlotsEn);
DEBUG ((DEBUG_INFO, "Enable Slot Successfully, The Slot ID = 0x%x\n", EvtTrb->SlotId));
SlotId = (UINT8)EvtTrb->SlotId;
@@ -2372,10 +2400,10 @@ XhcInitializeDeviceSlot64 (
//
InputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (INPUT_CONTEXT_64));
ASSERT (InputContext != NULL);
- ASSERT (((UINTN) InputContext & 0x3F) == 0);
+ ASSERT (((UINTN)InputContext & 0x3F) == 0);
ZeroMem (InputContext, sizeof (INPUT_CONTEXT_64));
- Xhc->UsbDevContext[SlotId].InputContext = (VOID *) InputContext;
+ Xhc->UsbDevContext[SlotId].InputContext = (VOID *)InputContext;
//
// 2) Initialize the Input Control Context (6.2.5.1) of the Input Context by setting the A0 and A1
@@ -2396,14 +2424,15 @@ XhcInitializeDeviceSlot64 (
//
// The device is behind of hub device.
//
- ParentSlotId = XhcRouteStringToSlotId(Xhc, ParentRouteChart);
+ ParentSlotId = XhcRouteStringToSlotId (Xhc, ParentRouteChart);
ASSERT (ParentSlotId != 0);
//
- //if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
+ // if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
//
ParentDeviceContext = (DEVICE_CONTEXT_64 *)Xhc->UsbDevContext[ParentSlotId].OutputContext;
if ((ParentDeviceContext->Slot.TTPortNum == 0) &&
- (ParentDeviceContext->Slot.TTHubSlotId == 0)) {
+ (ParentDeviceContext->Slot.TTHubSlotId == 0))
+ {
if ((ParentDeviceContext->Slot.Speed == (EFI_USB_SPEED_HIGH + 1)) && (DeviceSpeed < EFI_USB_SPEED_HIGH)) {
//
// Full/Low device attached to High speed hub port that isolates the high speed signaling
@@ -2430,9 +2459,9 @@ XhcInitializeDeviceSlot64 (
//
// 4) Allocate and initialize the Transfer Ring for the Default Control Endpoint.
//
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[0] = EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
//
// 5) Initialize the Input default control Endpoint 0 Context (6.2.3).
//
@@ -2445,6 +2474,7 @@ XhcInitializeDeviceSlot64 (
} else {
InputContext->EP[0].MaxPacketSize = 8;
}
+
//
// Initial value of Average TRB Length for Control endpoints would be 8B, Interrupt endpoints
// 1KB, and Bulk and Isoch endpoints 3KB.
@@ -2472,7 +2502,7 @@ XhcInitializeDeviceSlot64 (
//
OutputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (DEVICE_CONTEXT_64));
ASSERT (OutputContext != NULL);
- ASSERT (((UINTN) OutputContext & 0x3F) == 0);
+ ASSERT (((UINTN)OutputContext & 0x3F) == 0);
ZeroMem (OutputContext, sizeof (DEVICE_CONTEXT_64));
Xhc->UsbDevContext[SlotId].OutputContext = OutputContext;
@@ -2484,7 +2514,7 @@ XhcInitializeDeviceSlot64 (
//
// Fill DCBAA with PCI device address
//
- Xhc->DCBAA[SlotId] = (UINT64) (UINTN) PhyAddr;
+ Xhc->DCBAA[SlotId] = (UINT64)(UINTN)PhyAddr;
//
// 8) Issue an Address Device Command for the Device Slot, where the command points to the Input
@@ -2495,20 +2525,20 @@ XhcInitializeDeviceSlot64 (
//
gBS->Stall (XHC_RESET_RECOVERY_DELAY);
ZeroMem (&CmdTrbAddr, sizeof (CmdTrbAddr));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbAddr.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbAddr.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbAddr.CycleBit = 1;
CmdTrbAddr.Type = TRB_TYPE_ADDRESS_DEV;
CmdTrbAddr.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbAddr,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbAddr,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (!EFI_ERROR (Status)) {
- DeviceAddress = (UINT8) ((DEVICE_CONTEXT_64 *) OutputContext)->Slot.DeviceAddress;
+ DeviceAddress = (UINT8)((DEVICE_CONTEXT_64 *)OutputContext)->Slot.DeviceAddress;
DEBUG ((DEBUG_INFO, " Address %d assigned successfully\n", DeviceAddress));
Xhc->UsbDevContext[SlotId].XhciDevAddr = DeviceAddress;
} else {
@@ -2519,7 +2549,6 @@ XhcInitializeDeviceSlot64 (
return Status;
}
-
/**
Disable the specified device slot.
@@ -2532,8 +2561,8 @@ XhcInitializeDeviceSlot64 (
EFI_STATUS
EFIAPI
XhcDisableSlotCmd (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId
)
{
EFI_STATUS Status;
@@ -2549,7 +2578,8 @@ XhcDisableSlotCmd (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
(Xhc->UsbDevContext[Index + 1].SlotId == 0) ||
- (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword))
+ {
continue;
}
@@ -2570,16 +2600,17 @@ XhcDisableSlotCmd (
CmdTrbDisSlot.CycleBit = 1;
CmdTrbDisSlot.Type = TRB_TYPE_DIS_SLOT;
CmdTrbDisSlot.SlotId = SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbDisSlot,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbDisSlot,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcDisableSlotCmd: Disable Slot Command Failed, Status = %r\n", Status));
return Status;
}
+
//
// Free the slot's device context entry
//
@@ -2594,6 +2625,7 @@ XhcDisableSlotCmd (
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] = NULL;
}
@@ -2616,6 +2648,7 @@ XhcDisableSlotCmd (
if (Xhc->UsbDevContext[SlotId].OutputContext != NULL) {
UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT));
}
+
//
// Doesn't zero the entry because XhcAsyncInterruptTransfer() may be invoked to remove the established
// asynchronous interrupt pipe after the device is disabled. It needs the device address mapping info to
@@ -2639,8 +2672,8 @@ XhcDisableSlotCmd (
EFI_STATUS
EFIAPI
XhcDisableSlotCmd64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId
)
{
EFI_STATUS Status;
@@ -2656,7 +2689,8 @@ XhcDisableSlotCmd64 (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
(Xhc->UsbDevContext[Index + 1].SlotId == 0) ||
- (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword))
+ {
continue;
}
@@ -2677,16 +2711,17 @@ XhcDisableSlotCmd64 (
CmdTrbDisSlot.CycleBit = 1;
CmdTrbDisSlot.Type = TRB_TYPE_DIS_SLOT;
CmdTrbDisSlot.SlotId = SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbDisSlot,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbDisSlot,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcDisableSlotCmd: Disable Slot Command Failed, Status = %r\n", Status));
return Status;
}
+
//
// Free the slot's device context entry
//
@@ -2701,6 +2736,7 @@ XhcDisableSlotCmd64 (
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] = NULL;
}
@@ -2721,8 +2757,9 @@ XhcDisableSlotCmd64 (
}
if (Xhc->UsbDevContext[SlotId].OutputContext != NULL) {
- UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT_64));
+ UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT_64));
}
+
//
// Doesn't zero the entry because XhcAsyncInterruptTransfer() may be invoked to remove the established
// asynchronous interrupt pipe after the device is disabled. It needs the device address mapping info to
@@ -2749,23 +2786,23 @@ XhcDisableSlotCmd64 (
UINT8
EFIAPI
XhcInitializeEndpointContext (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN INPUT_CONTEXT *InputContext,
- IN USB_INTERFACE_DESCRIPTOR *IfDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN INPUT_CONTEXT *InputContext,
+ IN USB_INTERFACE_DESCRIPTOR *IfDesc
)
{
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- UINT8 Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINT8 Interval;
- TRANSFER_RING *EndpointTransferRing;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ UINT8 Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINT8 Interval;
+ TRANSFER_RING *EndpointTransferRing;
MaxDci = 0;
@@ -2815,14 +2852,16 @@ XhcInitializeEndpointContext (
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
- DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created BULK ring [%p~%p)\n",
- EpDesc->EndpointAddress,
- EndpointTransferRing->RingSeg0,
- (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
- ));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((
+ DEBUG_INFO,
+ "Endpoint[%x]: Created BULK ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN)EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
@@ -2834,6 +2873,7 @@ XhcInitializeEndpointContext (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
+
//
// Get the bInterval from descriptor and init the the interval field of endpoint context.
// Refer to XHCI 1.1 spec section 6.2.3.6.
@@ -2862,6 +2902,7 @@ XhcInitializeEndpointContext (
InputContext->EP[Dci-1].CErr = 3;
InputContext->EP[Dci-1].EPType = ED_INTERRUPT_OUT;
}
+
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
InputContext->EP[Dci-1].MaxESITPayload = EpDesc->MaxPacketSize;
//
@@ -2873,7 +2914,7 @@ XhcInitializeEndpointContext (
// Calculate through the bInterval field of Endpoint descriptor.
//
ASSERT (Interval != 0);
- InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32((UINT32)Interval) + 3;
+ InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32 ((UINT32)Interval) + 3;
} else if ((DeviceSpeed == EFI_USB_SPEED_HIGH) || (DeviceSpeed == EFI_USB_SPEED_SUPER)) {
Interval = EpDesc->Interval;
ASSERT (Interval >= 1 && Interval <= 16);
@@ -2888,15 +2929,18 @@ XhcInitializeEndpointContext (
}
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
- DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created INT ring [%p~%p)\n",
- EpDesc->EndpointAddress,
- EndpointTransferRing->RingSeg0,
- (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
- ));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((
+ DEBUG_INFO,
+ "Endpoint[%x]: Created INT ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN)EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
+
break;
case USB_ENDPOINT_CONTROL:
@@ -2915,8 +2959,8 @@ XhcInitializeEndpointContext (
((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
- PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
- PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);
@@ -2941,23 +2985,23 @@ XhcInitializeEndpointContext (
UINT8
EFIAPI
XhcInitializeEndpointContext64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN INPUT_CONTEXT_64 *InputContext,
- IN USB_INTERFACE_DESCRIPTOR *IfDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN INPUT_CONTEXT_64 *InputContext,
+ IN USB_INTERFACE_DESCRIPTOR *IfDesc
)
{
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- UINT8 Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINT8 Interval;
- TRANSFER_RING *EndpointTransferRing;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ UINT8 Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINT8 Interval;
+ TRANSFER_RING *EndpointTransferRing;
MaxDci = 0;
@@ -3007,14 +3051,16 @@ XhcInitializeEndpointContext64 (
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
- DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created BULK ring [%p~%p)\n",
- EpDesc->EndpointAddress,
- EndpointTransferRing->RingSeg0,
- (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
- ));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((
+ DEBUG_INFO,
+ "Endpoint64[%x]: Created BULK ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN)EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
@@ -3026,6 +3072,7 @@ XhcInitializeEndpointContext64 (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
+
//
// Get the bInterval from descriptor and init the the interval field of endpoint context.
// Refer to XHCI 1.1 spec section 6.2.3.6.
@@ -3054,6 +3101,7 @@ XhcInitializeEndpointContext64 (
InputContext->EP[Dci-1].CErr = 3;
InputContext->EP[Dci-1].EPType = ED_INTERRUPT_OUT;
}
+
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
InputContext->EP[Dci-1].MaxESITPayload = EpDesc->MaxPacketSize;
//
@@ -3065,7 +3113,7 @@ XhcInitializeEndpointContext64 (
// Calculate through the bInterval field of Endpoint descriptor.
//
ASSERT (Interval != 0);
- InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32((UINT32)Interval) + 3;
+ InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32 ((UINT32)Interval) + 3;
} else if ((DeviceSpeed == EFI_USB_SPEED_HIGH) || (DeviceSpeed == EFI_USB_SPEED_SUPER)) {
Interval = EpDesc->Interval;
ASSERT (Interval >= 1 && Interval <= 16);
@@ -3080,15 +3128,18 @@ XhcInitializeEndpointContext64 (
}
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
- DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created INT ring [%p~%p)\n",
- EpDesc->EndpointAddress,
- EndpointTransferRing->RingSeg0,
- (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
- ));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ CreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((
+ DEBUG_INFO,
+ "Endpoint64[%x]: Created INT ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN)EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
+
break;
case USB_ENDPOINT_CONTROL:
@@ -3107,8 +3158,8 @@ XhcInitializeEndpointContext64 (
((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
- PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
- PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);
@@ -3132,23 +3183,24 @@ XhcInitializeEndpointContext64 (
EFI_STATUS
EFIAPI
XhcSetConfigCmd (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- UINT8 Index;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ UINT8 Index;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
INPUT_CONTEXT *InputContext;
DEVICE_CONTEXT *OutputContext;
EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+
//
// 4.6.6 Configure Endpoint
//
@@ -3186,7 +3238,7 @@ XhcSetConfigCmd (
// configure endpoint
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -3195,9 +3247,9 @@ XhcSetConfigCmd (
DEBUG ((DEBUG_INFO, "Configure Endpoint\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSetConfigCmd: Config Endpoint Failed, Status = %r\n", Status));
@@ -3222,23 +3274,24 @@ XhcSetConfigCmd (
EFI_STATUS
EFIAPI
XhcSetConfigCmd64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- UINT8 Index;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ UINT8 Index;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
INPUT_CONTEXT_64 *InputContext;
DEVICE_CONTEXT_64 *OutputContext;
EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+
//
// 4.6.6 Configure Endpoint
//
@@ -3276,7 +3329,7 @@ XhcSetConfigCmd64 (
// configure endpoint
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -3285,9 +3338,9 @@ XhcSetConfigCmd64 (
DEBUG ((DEBUG_INFO, "Configure Endpoint\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSetConfigCmd64: Config Endpoint Failed, Status = %r\n", Status));
@@ -3313,15 +3366,15 @@ XhcSetConfigCmd64 (
EFI_STATUS
EFIAPI
XhcStopEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *PendingUrb OPTIONAL
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *PendingUrb OPTIONAL
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- CMD_TRB_STOP_ENDPOINT CmdTrbStopED;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ CMD_TRB_STOP_ENDPOINT CmdTrbStopED;
DEBUG ((DEBUG_INFO, "XhcStopEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));
@@ -3356,13 +3409,13 @@ XhcStopEndpoint (
CmdTrbStopED.Type = TRB_TYPE_STOP_ENDPOINT;
CmdTrbStopED.EDID = Dci;
CmdTrbStopED.SlotId = SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbStopED,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbStopED,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcStopEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
}
@@ -3385,9 +3438,9 @@ XhcStopEndpoint (
EFI_STATUS
EFIAPI
XhcResetEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
)
{
EFI_STATUS Status;
@@ -3404,13 +3457,13 @@ XhcResetEndpoint (
CmdTrbResetED.Type = TRB_TYPE_RESET_ENDPOINT;
CmdTrbResetED.EDID = Dci;
CmdTrbResetED.SlotId = SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbResetED,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcResetEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
}
@@ -3433,10 +3486,10 @@ XhcResetEndpoint (
EFI_STATUS
EFIAPI
XhcSetTrDequeuePointer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *Urb
)
{
EFI_STATUS Status;
@@ -3450,20 +3503,20 @@ XhcSetTrDequeuePointer (
// Send stop endpoint command to transit Endpoint from running to stop state
//
ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
CmdSetTRDeq.PtrLo = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;
CmdSetTRDeq.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdSetTRDeq.CycleBit = 1;
CmdSetTRDeq.Type = TRB_TYPE_SET_TR_DEQUE;
CmdSetTRDeq.Endpoint = Dci;
CmdSetTRDeq.SlotId = SlotId;
- Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdSetTRDeq,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSetTrDequeuePointer: Set TR Dequeue Pointer Failed, Status = %r\n", Status));
}
@@ -3485,26 +3538,26 @@ XhcSetTrDequeuePointer (
EFI_STATUS
EFIAPI
XhcSetInterface (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
- IN EFI_USB_DEVICE_REQUEST *Request
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
+ IN EFI_USB_DEVICE_REQUEST *Request
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDescActive;
- USB_INTERFACE_DESCRIPTOR *IfDescSet;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- UINT8 Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *RingSeg;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDescActive;
+ USB_INTERFACE_DESCRIPTOR *IfDescSet;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ UINT8 Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *RingSeg;
CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
INPUT_CONTEXT *InputContext;
@@ -3533,18 +3586,18 @@ XhcSetInterface (
MaxDci = 0;
IfDescActive = NULL;
- IfDescSet = NULL;
+ IfDescSet = NULL;
IfDesc = (USB_INTERFACE_DESCRIPTOR *)(ConfigDesc + 1);
- while ((UINTN) IfDesc < ((UINTN) ConfigDesc + ConfigDesc->TotalLength)) {
+ while ((UINTN)IfDesc < ((UINTN)ConfigDesc + ConfigDesc->TotalLength)) {
if ((IfDesc->DescriptorType == USB_DESC_TYPE_INTERFACE) && (IfDesc->Length >= sizeof (USB_INTERFACE_DESCRIPTOR))) {
- if (IfDesc->InterfaceNumber == (UINT8) Request->Index) {
+ if (IfDesc->InterfaceNumber == (UINT8)Request->Index) {
if (IfDesc->AlternateSetting == Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[IfDesc->InterfaceNumber]) {
//
// Find out the active interface descriptor.
//
IfDescActive = IfDesc;
- } else if (IfDesc->AlternateSetting == (UINT8) Request->Value) {
+ } else if (IfDesc->AlternateSetting == (UINT8)Request->Value) {
//
// Find out the interface descriptor to set.
//
@@ -3552,6 +3605,7 @@ XhcSetInterface (
}
}
}
+
IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
@@ -3570,8 +3624,8 @@ XhcSetInterface (
//
if ((IfDescActive != NULL) && (IfDescSet != NULL)) {
- NumEp = IfDescActive->NumEndpoints;
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) (IfDescActive + 1);
+ NumEp = IfDescActive->NumEndpoints;
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)(IfDescActive + 1);
for (EpIndex = 0; EpIndex < NumEp; EpIndex++) {
while (EpDesc->DescriptorType != USB_DESC_TYPE_ENDPOINT) {
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
@@ -3582,14 +3636,15 @@ XhcSetInterface (
continue;
}
- EpAddr = (UINT8) (EpDesc->EndpointAddress & 0x0F);
- Direction = (UINT8) ((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
+ EpAddr = (UINT8)(EpDesc->EndpointAddress & 0x0F);
+ Direction = (UINT8)((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
Dci = XhcEndpointToDci (EpAddr, Direction);
ASSERT (Dci < 32);
if (Dci > MaxDci) {
MaxDci = Dci;
}
+
//
// XHCI 4.3.6 - Setting Alternate Interfaces
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.
@@ -3598,6 +3653,7 @@ XhcSetInterface (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// XHCI 4.3.6 - Setting Alternate Interfaces
// 2) Free Transfer Rings of all endpoints that will be affected by the Alternate Interface setting.
@@ -3607,6 +3663,7 @@ XhcSetInterface (
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci - 1]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci - 1] = NULL;
}
@@ -3646,7 +3703,7 @@ XhcSetInterface (
// 5) Issue and successfully complete a Configure Endpoint Command.
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -3655,9 +3712,9 @@ XhcSetInterface (
DEBUG ((DEBUG_INFO, "SetInterface: Configure Endpoint\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SetInterface: Config Endpoint Failed, Status = %r\n", Status));
@@ -3665,7 +3722,7 @@ XhcSetInterface (
//
// Update the active AlternateSetting.
//
- Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] = (UINT8) Request->Value;
+ Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8)Request->Index] = (UINT8)Request->Value;
}
}
@@ -3687,26 +3744,26 @@ XhcSetInterface (
EFI_STATUS
EFIAPI
XhcSetInterface64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
- IN EFI_USB_DEVICE_REQUEST *Request
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
+ IN EFI_USB_DEVICE_REQUEST *Request
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDescActive;
- USB_INTERFACE_DESCRIPTOR *IfDescSet;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- UINT8 Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *RingSeg;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDescActive;
+ USB_INTERFACE_DESCRIPTOR *IfDescSet;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ UINT8 Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *RingSeg;
CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
INPUT_CONTEXT_64 *InputContext;
@@ -3735,18 +3792,18 @@ XhcSetInterface64 (
MaxDci = 0;
IfDescActive = NULL;
- IfDescSet = NULL;
+ IfDescSet = NULL;
IfDesc = (USB_INTERFACE_DESCRIPTOR *)(ConfigDesc + 1);
- while ((UINTN) IfDesc < ((UINTN) ConfigDesc + ConfigDesc->TotalLength)) {
+ while ((UINTN)IfDesc < ((UINTN)ConfigDesc + ConfigDesc->TotalLength)) {
if ((IfDesc->DescriptorType == USB_DESC_TYPE_INTERFACE) && (IfDesc->Length >= sizeof (USB_INTERFACE_DESCRIPTOR))) {
- if (IfDesc->InterfaceNumber == (UINT8) Request->Index) {
+ if (IfDesc->InterfaceNumber == (UINT8)Request->Index) {
if (IfDesc->AlternateSetting == Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[IfDesc->InterfaceNumber]) {
//
// Find out the active interface descriptor.
//
IfDescActive = IfDesc;
- } else if (IfDesc->AlternateSetting == (UINT8) Request->Value) {
+ } else if (IfDesc->AlternateSetting == (UINT8)Request->Value) {
//
// Find out the interface descriptor to set.
//
@@ -3754,6 +3811,7 @@ XhcSetInterface64 (
}
}
}
+
IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
@@ -3772,8 +3830,8 @@ XhcSetInterface64 (
//
if ((IfDescActive != NULL) && (IfDescSet != NULL)) {
- NumEp = IfDescActive->NumEndpoints;
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) (IfDescActive + 1);
+ NumEp = IfDescActive->NumEndpoints;
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)(IfDescActive + 1);
for (EpIndex = 0; EpIndex < NumEp; EpIndex++) {
while (EpDesc->DescriptorType != USB_DESC_TYPE_ENDPOINT) {
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
@@ -3784,14 +3842,15 @@ XhcSetInterface64 (
continue;
}
- EpAddr = (UINT8) (EpDesc->EndpointAddress & 0x0F);
- Direction = (UINT8) ((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
+ EpAddr = (UINT8)(EpDesc->EndpointAddress & 0x0F);
+ Direction = (UINT8)((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
Dci = XhcEndpointToDci (EpAddr, Direction);
ASSERT (Dci < 32);
if (Dci > MaxDci) {
MaxDci = Dci;
}
+
//
// XHCI 4.3.6 - Setting Alternate Interfaces
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.
@@ -3800,6 +3859,7 @@ XhcSetInterface64 (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// XHCI 4.3.6 - Setting Alternate Interfaces
// 2) Free Transfer Rings of all endpoints that will be affected by the Alternate Interface setting.
@@ -3809,6 +3869,7 @@ XhcSetInterface64 (
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci - 1]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci - 1] = NULL;
}
@@ -3848,7 +3909,7 @@ XhcSetInterface64 (
// 5) Issue and successfully complete a Configure Endpoint Command.
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -3857,9 +3918,9 @@ XhcSetInterface64 (
DEBUG ((DEBUG_INFO, "SetInterface64: Configure Endpoint\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SetInterface64: Config Endpoint Failed, Status = %r\n", Status));
@@ -3867,7 +3928,7 @@ XhcSetInterface64 (
//
// Update the active AlternateSetting.
//
- Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] = (UINT8) Request->Value;
+ Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8)Request->Index] = (UINT8)Request->Value;
}
}
@@ -3887,9 +3948,9 @@ XhcSetInterface64 (
EFI_STATUS
EFIAPI
XhcEvaluateContext (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
)
{
EFI_STATUS Status;
@@ -3910,7 +3971,7 @@ XhcEvaluateContext (
InputContext->EP[0].MaxPacketSize = MaxPacketSize;
ZeroMem (&CmdTrbEvalu, sizeof (CmdTrbEvalu));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbEvalu.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbEvalu.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbEvalu.CycleBit = 1;
@@ -3919,13 +3980,14 @@ XhcEvaluateContext (
DEBUG ((DEBUG_INFO, "Evaluate context\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbEvalu,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbEvalu,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcEvaluateContext: Evaluate Context Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -3942,9 +4004,9 @@ XhcEvaluateContext (
EFI_STATUS
EFIAPI
XhcEvaluateContext64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
)
{
EFI_STATUS Status;
@@ -3965,7 +4027,7 @@ XhcEvaluateContext64 (
InputContext->EP[0].MaxPacketSize = MaxPacketSize;
ZeroMem (&CmdTrbEvalu, sizeof (CmdTrbEvalu));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbEvalu.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbEvalu.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbEvalu.CycleBit = 1;
@@ -3974,17 +4036,17 @@ XhcEvaluateContext64 (
DEBUG ((DEBUG_INFO, "Evaluate context\n"));
Status = XhcCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbEvalu,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbEvalu,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcEvaluateContext64: Evaluate Context Failed, Status = %r\n", Status));
}
+
return Status;
}
-
/**
Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
@@ -3999,11 +4061,11 @@ XhcEvaluateContext64 (
**/
EFI_STATUS
XhcConfigHubContext (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
)
{
EFI_STATUS Status;
@@ -4027,14 +4089,14 @@ XhcConfigHubContext (
//
// Copy the slot context from OutputContext to Input context
//
- CopyMem(&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT));
+ CopyMem (&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT));
InputContext->Slot.Hub = 1;
InputContext->Slot.PortNum = PortNum;
InputContext->Slot.TTT = TTT;
InputContext->Slot.MTT = MTT;
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -4042,14 +4104,15 @@ XhcConfigHubContext (
CmdTrbCfgEP.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
DEBUG ((DEBUG_INFO, "Configure Hub Slot Context\n"));
Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcConfigHubContext: Config Endpoint Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -4067,11 +4130,11 @@ XhcConfigHubContext (
**/
EFI_STATUS
XhcConfigHubContext64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
)
{
EFI_STATUS Status;
@@ -4095,14 +4158,14 @@ XhcConfigHubContext64 (
//
// Copy the slot context from OutputContext to Input context
//
- CopyMem(&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT_64));
+ CopyMem (&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT_64));
InputContext->Slot.Hub = 1;
InputContext->Slot.PortNum = PortNum;
InputContext->Slot.TTT = TTT;
InputContext->Slot.MTT = MTT;
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -4110,13 +4173,14 @@ XhcConfigHubContext64 (
CmdTrbCfgEP.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
DEBUG ((DEBUG_INFO, "Configure Hub Slot Context\n"));
Status = XhcCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcConfigHubContext64: Config Endpoint Failed, Status = %r\n", Status));
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
index 3f9cdb1c36..7c85f7993b 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
@@ -10,73 +10,73 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_XHCI_SCHED_H_
#define _EFI_XHCI_SCHED_H_
-#define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
-#define XHC_INIT_DEVICE_SLOT_RETRIES 1
+#define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
+#define XHC_INIT_DEVICE_SLOT_RETRIES 1
//
// Transfer types, used in URB to identify the transfer type
//
-#define XHC_CTRL_TRANSFER 0x01
-#define XHC_BULK_TRANSFER 0x02
-#define XHC_INT_TRANSFER_SYNC 0x04
-#define XHC_INT_TRANSFER_ASYNC 0x08
-#define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
+#define XHC_CTRL_TRANSFER 0x01
+#define XHC_BULK_TRANSFER 0x02
+#define XHC_INT_TRANSFER_SYNC 0x04
+#define XHC_INT_TRANSFER_ASYNC 0x08
+#define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
//
// 6.4.6 TRB Types
//
-#define TRB_TYPE_NORMAL 1
-#define TRB_TYPE_SETUP_STAGE 2
-#define TRB_TYPE_DATA_STAGE 3
-#define TRB_TYPE_STATUS_STAGE 4
-#define TRB_TYPE_ISOCH 5
-#define TRB_TYPE_LINK 6
-#define TRB_TYPE_EVENT_DATA 7
-#define TRB_TYPE_NO_OP 8
-#define TRB_TYPE_EN_SLOT 9
-#define TRB_TYPE_DIS_SLOT 10
-#define TRB_TYPE_ADDRESS_DEV 11
-#define TRB_TYPE_CON_ENDPOINT 12
-#define TRB_TYPE_EVALU_CONTXT 13
-#define TRB_TYPE_RESET_ENDPOINT 14
-#define TRB_TYPE_STOP_ENDPOINT 15
-#define TRB_TYPE_SET_TR_DEQUE 16
-#define TRB_TYPE_RESET_DEV 17
-#define TRB_TYPE_GET_PORT_BANW 21
-#define TRB_TYPE_FORCE_HEADER 22
-#define TRB_TYPE_NO_OP_COMMAND 23
-#define TRB_TYPE_TRANS_EVENT 32
-#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
-#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
-#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
-#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
-#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
+#define TRB_TYPE_NORMAL 1
+#define TRB_TYPE_SETUP_STAGE 2
+#define TRB_TYPE_DATA_STAGE 3
+#define TRB_TYPE_STATUS_STAGE 4
+#define TRB_TYPE_ISOCH 5
+#define TRB_TYPE_LINK 6
+#define TRB_TYPE_EVENT_DATA 7
+#define TRB_TYPE_NO_OP 8
+#define TRB_TYPE_EN_SLOT 9
+#define TRB_TYPE_DIS_SLOT 10
+#define TRB_TYPE_ADDRESS_DEV 11
+#define TRB_TYPE_CON_ENDPOINT 12
+#define TRB_TYPE_EVALU_CONTXT 13
+#define TRB_TYPE_RESET_ENDPOINT 14
+#define TRB_TYPE_STOP_ENDPOINT 15
+#define TRB_TYPE_SET_TR_DEQUE 16
+#define TRB_TYPE_RESET_DEV 17
+#define TRB_TYPE_GET_PORT_BANW 21
+#define TRB_TYPE_FORCE_HEADER 22
+#define TRB_TYPE_NO_OP_COMMAND 23
+#define TRB_TYPE_TRANS_EVENT 32
+#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
+#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
+#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
+#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
+#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
//
// Endpoint Type (EP Type).
//
-#define ED_NOT_VALID 0
-#define ED_ISOCH_OUT 1
-#define ED_BULK_OUT 2
-#define ED_INTERRUPT_OUT 3
-#define ED_CONTROL_BIDIR 4
-#define ED_ISOCH_IN 5
-#define ED_BULK_IN 6
-#define ED_INTERRUPT_IN 7
+#define ED_NOT_VALID 0
+#define ED_ISOCH_OUT 1
+#define ED_BULK_OUT 2
+#define ED_INTERRUPT_OUT 3
+#define ED_CONTROL_BIDIR 4
+#define ED_ISOCH_IN 5
+#define ED_BULK_IN 6
+#define ED_INTERRUPT_IN 7
//
// 6.4.5 TRB Completion Codes
//
-#define TRB_COMPLETION_INVALID 0
-#define TRB_COMPLETION_SUCCESS 1
-#define TRB_COMPLETION_DATA_BUFFER_ERROR 2
-#define TRB_COMPLETION_BABBLE_ERROR 3
-#define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
-#define TRB_COMPLETION_TRB_ERROR 5
-#define TRB_COMPLETION_STALL_ERROR 6
-#define TRB_COMPLETION_SHORT_PACKET 13
-#define TRB_COMPLETION_STOPPED 26
-#define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
+#define TRB_COMPLETION_INVALID 0
+#define TRB_COMPLETION_SUCCESS 1
+#define TRB_COMPLETION_DATA_BUFFER_ERROR 2
+#define TRB_COMPLETION_BABBLE_ERROR 3
+#define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
+#define TRB_COMPLETION_TRB_ERROR 5
+#define TRB_COMPLETION_STALL_ERROR 6
+#define TRB_COMPLETION_SHORT_PACKET 13
+#define TRB_COMPLETION_STOPPED 26
+#define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
//
// The topology string used to present usb device location
@@ -85,15 +85,15 @@ typedef struct _USB_DEV_TOPOLOGY {
//
// The tier concatenation of down stream port.
//
- UINT32 RouteString:20;
+ UINT32 RouteString : 20;
//
// The root port number of the chain.
//
- UINT32 RootPortNum:8;
+ UINT32 RootPortNum : 8;
//
// The Tier the device reside.
//
- UINT32 TierNum:4;
+ UINT32 TierNum : 4;
} USB_DEV_TOPOLOGY;
//
@@ -126,33 +126,33 @@ typedef struct _USB_ENDPOINT {
// TRB Template
//
typedef struct _TRB_TEMPLATE {
- UINT32 Parameter1;
+ UINT32 Parameter1;
- UINT32 Parameter2;
+ UINT32 Parameter2;
- UINT32 Status;
+ UINT32 Status;
- UINT32 CycleBit:1;
- UINT32 RsvdZ1:9;
- UINT32 Type:6;
- UINT32 Control:16;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ1 : 9;
+ UINT32 Type : 6;
+ UINT32 Control : 16;
} TRB_TEMPLATE;
typedef struct _TRANSFER_RING {
- VOID *RingSeg0;
- UINTN TrbNumber;
- TRB_TEMPLATE *RingEnqueue;
- TRB_TEMPLATE *RingDequeue;
- UINT32 RingPCS;
+ VOID *RingSeg0;
+ UINTN TrbNumber;
+ TRB_TEMPLATE *RingEnqueue;
+ TRB_TEMPLATE *RingDequeue;
+ UINT32 RingPCS;
} TRANSFER_RING;
typedef struct _EVENT_RING {
- VOID *ERSTBase;
- VOID *EventRingSeg0;
- UINTN TrbNumber;
- TRB_TEMPLATE *EventRingEnqueue;
- TRB_TEMPLATE *EventRingDequeue;
- UINT32 EventRingCCS;
+ VOID *ERSTBase;
+ VOID *EventRingSeg0;
+ UINTN TrbNumber;
+ TRB_TEMPLATE *EventRingEnqueue;
+ TRB_TEMPLATE *EventRingDequeue;
+ UINT32 EventRingCCS;
} EVENT_RING;
//
@@ -160,39 +160,39 @@ typedef struct _EVENT_RING {
// usb requests.
//
typedef struct _URB {
- UINT32 Signature;
- LIST_ENTRY UrbList;
+ UINT32 Signature;
+ LIST_ENTRY UrbList;
//
// Usb Device URB related information
//
- USB_ENDPOINT Ep;
- EFI_USB_DEVICE_REQUEST *Request;
- VOID *Data;
- UINTN DataLen;
- VOID *DataPhy;
- VOID *DataMap;
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
- VOID *Context;
+ USB_ENDPOINT Ep;
+ EFI_USB_DEVICE_REQUEST *Request;
+ VOID *Data;
+ UINTN DataLen;
+ VOID *DataPhy;
+ VOID *DataMap;
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
+ VOID *Context;
//
// Execute result
//
- UINT32 Result;
+ UINT32 Result;
//
// completed data length
//
- UINTN Completed;
+ UINTN Completed;
//
// Command/Tranfer Ring info
//
- TRANSFER_RING *Ring;
- TRB_TEMPLATE *TrbStart;
- TRB_TEMPLATE *TrbEnd;
- UINTN TrbNum;
- BOOLEAN StartDone;
- BOOLEAN EndDone;
- BOOLEAN Finished;
-
- TRB_TEMPLATE *EvtTrb;
+ TRANSFER_RING *Ring;
+ TRB_TEMPLATE *TrbStart;
+ TRB_TEMPLATE *TrbEnd;
+ UINTN TrbNum;
+ BOOLEAN StartDone;
+ BOOLEAN EndDone;
+ BOOLEAN Finished;
+
+ TRB_TEMPLATE *EvtTrb;
} URB;
//
@@ -203,11 +203,11 @@ typedef struct _URB {
// is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
//
typedef struct _EVENT_RING_SEG_TABLE_ENTRY {
- UINT32 PtrLo;
- UINT32 PtrHi;
- UINT32 RingTrbSize:16;
- UINT32 RsvdZ1:16;
- UINT32 RsvdZ2;
+ UINT32 PtrLo;
+ UINT32 PtrHi;
+ UINT32 RingTrbSize : 16;
+ UINT32 RsvdZ1 : 16;
+ UINT32 RsvdZ2;
} EVENT_RING_SEG_TABLE_ENTRY;
//
@@ -217,25 +217,25 @@ typedef struct _EVENT_RING_SEG_TABLE_ENTRY {
// Rings, and to define the Data stage information for Control Transfer Rings.
//
typedef struct _TRANSFER_TRB_NORMAL {
- UINT32 TRBPtrLo;
-
- UINT32 TRBPtrHi;
-
- UINT32 Length:17;
- UINT32 TDSize:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 ISP:1;
- UINT32 NS:1;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ1:2;
- UINT32 BEI:1;
- UINT32 Type:6;
- UINT32 RsvdZ2:16;
+ UINT32 TRBPtrLo;
+
+ UINT32 TRBPtrHi;
+
+ UINT32 Length : 17;
+ UINT32 TDSize : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 ISP : 1;
+ UINT32 NS : 1;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ1 : 2;
+ UINT32 BEI : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ2 : 16;
} TRANSFER_TRB_NORMAL;
//
@@ -243,25 +243,25 @@ typedef struct _TRANSFER_TRB_NORMAL {
// A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
//
typedef struct _TRANSFER_TRB_CONTROL_SETUP {
- UINT32 bmRequestType:8;
- UINT32 bRequest:8;
- UINT32 wValue:16;
-
- UINT32 wIndex:16;
- UINT32 wLength:16;
-
- UINT32 Length:17;
- UINT32 RsvdZ1:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:4;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ3:3;
- UINT32 Type:6;
- UINT32 TRT:2;
- UINT32 RsvdZ4:14;
+ UINT32 bmRequestType : 8;
+ UINT32 bRequest : 8;
+ UINT32 wValue : 16;
+
+ UINT32 wIndex : 16;
+ UINT32 wLength : 16;
+
+ UINT32 Length : 17;
+ UINT32 RsvdZ1 : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 4;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ3 : 3;
+ UINT32 Type : 6;
+ UINT32 TRT : 2;
+ UINT32 RsvdZ4 : 14;
} TRANSFER_TRB_CONTROL_SETUP;
//
@@ -269,25 +269,25 @@ typedef struct _TRANSFER_TRB_CONTROL_SETUP {
// A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
//
typedef struct _TRANSFER_TRB_CONTROL_DATA {
- UINT32 TRBPtrLo;
-
- UINT32 TRBPtrHi;
-
- UINT32 Length:17;
- UINT32 TDSize:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 ISP:1;
- UINT32 NS:1;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ1:3;
- UINT32 Type:6;
- UINT32 DIR:1;
- UINT32 RsvdZ2:15;
+ UINT32 TRBPtrLo;
+
+ UINT32 TRBPtrHi;
+
+ UINT32 Length : 17;
+ UINT32 TDSize : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 ISP : 1;
+ UINT32 NS : 1;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ1 : 3;
+ UINT32 Type : 6;
+ UINT32 DIR : 1;
+ UINT32 RsvdZ2 : 15;
} TRANSFER_TRB_CONTROL_DATA;
//
@@ -295,21 +295,21 @@ typedef struct _TRANSFER_TRB_CONTROL_DATA {
// A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
//
typedef struct _TRANSFER_TRB_CONTROL_STATUS {
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 RsvdZ3:22;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 RsvdZ4:2;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 RsvdZ5:4;
- UINT32 Type:6;
- UINT32 DIR:1;
- UINT32 RsvdZ6:15;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 RsvdZ3 : 22;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 RsvdZ4 : 2;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 RsvdZ5 : 4;
+ UINT32 Type : 6;
+ UINT32 DIR : 1;
+ UINT32 RsvdZ6 : 15;
} TRANSFER_TRB_CONTROL_STATUS;
//
@@ -318,21 +318,21 @@ typedef struct _TRANSFER_TRB_CONTROL_STATUS {
// for more information on the use and operation of Transfer Events.
//
typedef struct _EVT_TRB_TRANSFER {
- UINT32 TRBPtrLo;
+ UINT32 TRBPtrLo;
- UINT32 TRBPtrHi;
+ UINT32 TRBPtrHi;
- UINT32 Length:24;
- UINT32 Completecode:8;
+ UINT32 Length : 24;
+ UINT32 Completecode : 8;
- UINT32 CycleBit:1;
- UINT32 RsvdZ1:1;
- UINT32 ED:1;
- UINT32 RsvdZ2:7;
- UINT32 Type:6;
- UINT32 EndpointId:5;
- UINT32 RsvdZ3:3;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ1 : 1;
+ UINT32 ED : 1;
+ UINT32 RsvdZ2 : 7;
+ UINT32 Type : 6;
+ UINT32 EndpointId : 5;
+ UINT32 RsvdZ3 : 3;
+ UINT32 SlotId : 8;
} EVT_TRB_TRANSFER;
//
@@ -341,26 +341,26 @@ typedef struct _EVT_TRB_TRANSFER {
// Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
//
typedef struct _EVT_TRB_COMMAND_COMPLETION {
- UINT32 TRBPtrLo;
+ UINT32 TRBPtrLo;
- UINT32 TRBPtrHi;
+ UINT32 TRBPtrHi;
- UINT32 RsvdZ2:24;
- UINT32 Completecode:8;
+ UINT32 RsvdZ2 : 24;
+ UINT32 Completecode : 8;
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 VFID:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 VFID : 8;
+ UINT32 SlotId : 8;
} EVT_TRB_COMMAND_COMPLETION;
typedef union _TRB {
- TRB_TEMPLATE TrbTemplate;
- TRANSFER_TRB_NORMAL TrbNormal;
- TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup;
- TRANSFER_TRB_CONTROL_DATA TrbCtrData;
- TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus;
+ TRB_TEMPLATE TrbTemplate;
+ TRANSFER_TRB_NORMAL TrbNormal;
+ TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup;
+ TRANSFER_TRB_CONTROL_DATA TrbCtrData;
+ TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus;
} TRB;
//
@@ -369,14 +369,14 @@ typedef union _TRB {
// mechanisms offered by the xHCI.
//
typedef struct _CMD_TRB_NO_OP {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} CMD_TRB_NO_OP;
//
@@ -385,14 +385,14 @@ typedef struct _CMD_TRB_NO_OP {
// selected slot to the host in a Command Completion Event.
//
typedef struct _CMD_TRB_ENABLE_SLOT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} CMD_TRB_ENABLE_SLOT;
//
@@ -401,15 +401,15 @@ typedef struct _CMD_TRB_ENABLE_SLOT {
// internal xHC resources assigned to the slot.
//
typedef struct _CMD_TRB_DISABLE_SLOT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:8;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_DISABLE_SLOT;
//
@@ -419,18 +419,18 @@ typedef struct _CMD_TRB_DISABLE_SLOT {
// issue a SET_ADDRESS request to the USB device.
//
typedef struct _CMD_TRB_ADDRESS_DEVICE {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:8;
- UINT32 BSR:1;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 8;
+ UINT32 BSR : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_ADDRESS_DEVICE;
//
@@ -439,18 +439,18 @@ typedef struct _CMD_TRB_ADDRESS_DEVICE {
// endpoints selected by the command.
//
typedef struct _CMD_TRB_CONFIG_ENDPOINT {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:8;
- UINT32 DC:1;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 8;
+ UINT32 DC : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_CONFIG_ENDPOINT;
//
@@ -460,17 +460,17 @@ typedef struct _CMD_TRB_CONFIG_ENDPOINT {
// shall evaluate any changes
//
typedef struct _CMD_TRB_EVALUATE_CONTEXT {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:9;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_EVALUATE_CONTEXT;
//
@@ -478,17 +478,17 @@ typedef struct _CMD_TRB_EVALUATE_CONTEXT {
// The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
//
typedef struct _CMD_TRB_RESET_ENDPOINT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:8;
- UINT32 TSP:1;
- UINT32 Type:6;
- UINT32 EDID:5;
- UINT32 RsvdZ4:3;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 8;
+ UINT32 TSP : 1;
+ UINT32 Type : 6;
+ UINT32 EDID : 5;
+ UINT32 RsvdZ4 : 3;
+ UINT32 SlotId : 8;
} CMD_TRB_RESET_ENDPOINT;
//
@@ -497,17 +497,17 @@ typedef struct _CMD_TRB_RESET_ENDPOINT {
// Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
//
typedef struct _CMD_TRB_STOP_ENDPOINT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 EDID:5;
- UINT32 RsvdZ4:2;
- UINT32 SP:1;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 EDID : 5;
+ UINT32 RsvdZ4 : 2;
+ UINT32 SP : 1;
+ UINT32 SlotId : 8;
} CMD_TRB_STOP_ENDPOINT;
//
@@ -516,19 +516,19 @@ typedef struct _CMD_TRB_STOP_ENDPOINT {
// Pointer and DCS fields of an Endpoint or Stream Context.
//
typedef struct _CMD_SET_TR_DEQ_POINTER {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1:16;
- UINT32 StreamID:16;
+ UINT32 RsvdZ1 : 16;
+ UINT32 StreamID : 16;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:9;
- UINT32 Type:6;
- UINT32 Endpoint:5;
- UINT32 RsvdZ3:3;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 9;
+ UINT32 Type : 6;
+ UINT32 Endpoint : 5;
+ UINT32 RsvdZ3 : 3;
+ UINT32 SlotId : 8;
} CMD_SET_TR_DEQ_POINTER;
//
@@ -536,211 +536,207 @@ typedef struct _CMD_SET_TR_DEQ_POINTER {
// A Link TRB provides support for non-contiguous TRB Rings.
//
typedef struct _LINK_TRB {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1:22;
- UINT32 InterTarget:10;
+ UINT32 RsvdZ1 : 22;
+ UINT32 InterTarget : 10;
- UINT32 CycleBit:1;
- UINT32 TC:1;
- UINT32 RsvdZ2:2;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 RsvdZ3:4;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 CycleBit : 1;
+ UINT32 TC : 1;
+ UINT32 RsvdZ2 : 2;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 RsvdZ3 : 4;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} LINK_TRB;
//
// 6.2.2 Slot Context
//
typedef struct _SLOT_CONTEXT {
- UINT32 RouteString:20;
- UINT32 Speed:4;
- UINT32 RsvdZ1:1;
- UINT32 MTT:1;
- UINT32 Hub:1;
- UINT32 ContextEntries:5;
-
- UINT32 MaxExitLatency:16;
- UINT32 RootHubPortNum:8;
- UINT32 PortNum:8;
-
- UINT32 TTHubSlotId:8;
- UINT32 TTPortNum:8;
- UINT32 TTT:2;
- UINT32 RsvdZ2:4;
- UINT32 InterTarget:10;
-
- UINT32 DeviceAddress:8;
- UINT32 RsvdZ3:19;
- UINT32 SlotState:5;
-
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
+ UINT32 RouteString : 20;
+ UINT32 Speed : 4;
+ UINT32 RsvdZ1 : 1;
+ UINT32 MTT : 1;
+ UINT32 Hub : 1;
+ UINT32 ContextEntries : 5;
+
+ UINT32 MaxExitLatency : 16;
+ UINT32 RootHubPortNum : 8;
+ UINT32 PortNum : 8;
+
+ UINT32 TTHubSlotId : 8;
+ UINT32 TTPortNum : 8;
+ UINT32 TTT : 2;
+ UINT32 RsvdZ2 : 4;
+ UINT32 InterTarget : 10;
+
+ UINT32 DeviceAddress : 8;
+ UINT32 RsvdZ3 : 19;
+ UINT32 SlotState : 5;
+
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
} SLOT_CONTEXT;
typedef struct _SLOT_CONTEXT_64 {
- UINT32 RouteString:20;
- UINT32 Speed:4;
- UINT32 RsvdZ1:1;
- UINT32 MTT:1;
- UINT32 Hub:1;
- UINT32 ContextEntries:5;
-
- UINT32 MaxExitLatency:16;
- UINT32 RootHubPortNum:8;
- UINT32 PortNum:8;
-
- UINT32 TTHubSlotId:8;
- UINT32 TTPortNum:8;
- UINT32 TTT:2;
- UINT32 RsvdZ2:4;
- UINT32 InterTarget:10;
-
- UINT32 DeviceAddress:8;
- UINT32 RsvdZ3:19;
- UINT32 SlotState:5;
-
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
-
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
-
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
- UINT32 RsvdZ15;
-
+ UINT32 RouteString : 20;
+ UINT32 Speed : 4;
+ UINT32 RsvdZ1 : 1;
+ UINT32 MTT : 1;
+ UINT32 Hub : 1;
+ UINT32 ContextEntries : 5;
+
+ UINT32 MaxExitLatency : 16;
+ UINT32 RootHubPortNum : 8;
+ UINT32 PortNum : 8;
+
+ UINT32 TTHubSlotId : 8;
+ UINT32 TTPortNum : 8;
+ UINT32 TTT : 2;
+ UINT32 RsvdZ2 : 4;
+ UINT32 InterTarget : 10;
+
+ UINT32 DeviceAddress : 8;
+ UINT32 RsvdZ3 : 19;
+ UINT32 SlotState : 5;
+
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
+ UINT32 RsvdZ15;
} SLOT_CONTEXT_64;
-
//
// 6.2.3 Endpoint Context
//
typedef struct _ENDPOINT_CONTEXT {
- UINT32 EPState:3;
- UINT32 RsvdZ1:5;
- UINT32 Mult:2;
- UINT32 MaxPStreams:5;
- UINT32 LSA:1;
- UINT32 Interval:8;
- UINT32 RsvdZ2:8;
-
- UINT32 RsvdZ3:1;
- UINT32 CErr:2;
- UINT32 EPType:3;
- UINT32 RsvdZ4:1;
- UINT32 HID:1;
- UINT32 MaxBurstSize:8;
- UINT32 MaxPacketSize:16;
-
- UINT32 PtrLo;
-
- UINT32 PtrHi;
-
- UINT32 AverageTRBLength:16;
- UINT32 MaxESITPayload:16;
-
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
+ UINT32 EPState : 3;
+ UINT32 RsvdZ1 : 5;
+ UINT32 Mult : 2;
+ UINT32 MaxPStreams : 5;
+ UINT32 LSA : 1;
+ UINT32 Interval : 8;
+ UINT32 RsvdZ2 : 8;
+
+ UINT32 RsvdZ3 : 1;
+ UINT32 CErr : 2;
+ UINT32 EPType : 3;
+ UINT32 RsvdZ4 : 1;
+ UINT32 HID : 1;
+ UINT32 MaxBurstSize : 8;
+ UINT32 MaxPacketSize : 16;
+
+ UINT32 PtrLo;
+
+ UINT32 PtrHi;
+
+ UINT32 AverageTRBLength : 16;
+ UINT32 MaxESITPayload : 16;
+
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
} ENDPOINT_CONTEXT;
typedef struct _ENDPOINT_CONTEXT_64 {
- UINT32 EPState:3;
- UINT32 RsvdZ1:5;
- UINT32 Mult:2;
- UINT32 MaxPStreams:5;
- UINT32 LSA:1;
- UINT32 Interval:8;
- UINT32 RsvdZ2:8;
-
- UINT32 RsvdZ3:1;
- UINT32 CErr:2;
- UINT32 EPType:3;
- UINT32 RsvdZ4:1;
- UINT32 HID:1;
- UINT32 MaxBurstSize:8;
- UINT32 MaxPacketSize:16;
-
- UINT32 PtrLo;
-
- UINT32 PtrHi;
-
- UINT32 AverageTRBLength:16;
- UINT32 MaxESITPayload:16;
-
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
-
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
-
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
- UINT32 RsvdZ15;
-
+ UINT32 EPState : 3;
+ UINT32 RsvdZ1 : 5;
+ UINT32 Mult : 2;
+ UINT32 MaxPStreams : 5;
+ UINT32 LSA : 1;
+ UINT32 Interval : 8;
+ UINT32 RsvdZ2 : 8;
+
+ UINT32 RsvdZ3 : 1;
+ UINT32 CErr : 2;
+ UINT32 EPType : 3;
+ UINT32 RsvdZ4 : 1;
+ UINT32 HID : 1;
+ UINT32 MaxBurstSize : 8;
+ UINT32 MaxPacketSize : 16;
+
+ UINT32 PtrLo;
+
+ UINT32 PtrHi;
+
+ UINT32 AverageTRBLength : 16;
+ UINT32 MaxESITPayload : 16;
+
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
+ UINT32 RsvdZ15;
} ENDPOINT_CONTEXT_64;
-
//
// 6.2.5.1 Input Control Context
//
typedef struct _INPUT_CONTRL_CONTEXT {
- UINT32 Dword1;
- UINT32 Dword2;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
- UINT32 RsvdZ3;
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
+ UINT32 Dword1;
+ UINT32 Dword2;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+ UINT32 RsvdZ3;
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
} INPUT_CONTRL_CONTEXT;
typedef struct _INPUT_CONTRL_CONTEXT_64 {
- UINT32 Dword1;
- UINT32 Dword2;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
- UINT32 RsvdZ3;
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
+ UINT32 Dword1;
+ UINT32 Dword2;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+ UINT32 RsvdZ3;
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
} INPUT_CONTRL_CONTEXT_64;
//
// 6.2.1 Device Context
//
typedef struct _DEVICE_CONTEXT {
- SLOT_CONTEXT Slot;
- ENDPOINT_CONTEXT EP[31];
+ SLOT_CONTEXT Slot;
+ ENDPOINT_CONTEXT EP[31];
} DEVICE_CONTEXT;
typedef struct _DEVICE_CONTEXT_64 {
- SLOT_CONTEXT_64 Slot;
- ENDPOINT_CONTEXT_64 EP[31];
+ SLOT_CONTEXT_64 Slot;
+ ENDPOINT_CONTEXT_64 EP[31];
} DEVICE_CONTEXT_64;
//
@@ -753,12 +749,11 @@ typedef struct _INPUT_CONTEXT {
} INPUT_CONTEXT;
typedef struct _INPUT_CONTEXT_64 {
- INPUT_CONTRL_CONTEXT_64 InputControlContext;
- SLOT_CONTEXT_64 Slot;
- ENDPOINT_CONTEXT_64 EP[31];
+ INPUT_CONTRL_CONTEXT_64 InputControlContext;
+ SLOT_CONTEXT_64 Slot;
+ ENDPOINT_CONTEXT_64 EP[31];
} INPUT_CONTEXT_64;
-
/**
Initialize the XHCI host controller for schedule.
@@ -767,7 +762,7 @@ typedef struct _INPUT_CONTEXT_64 {
**/
VOID
XhcInitSched (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -778,7 +773,7 @@ XhcInitSched (
**/
VOID
XhcFreeSched (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -792,8 +787,8 @@ XhcFreeSched (
**/
EFI_STATUS
RingIntTransferDoorBell (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
);
/**
@@ -811,10 +806,10 @@ RingIntTransferDoorBell (
**/
EFI_STATUS
XhcExecTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN BOOLEAN CmdTransfer,
- IN URB *Urb,
- IN UINTN Timeout
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN BOOLEAN CmdTransfer,
+ IN URB *Urb,
+ IN UINTN Timeout
);
/**
@@ -831,9 +826,9 @@ XhcExecTransfer (
**/
EFI_STATUS
XhciDelAsyncIntTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpNum
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpNum
);
/**
@@ -844,7 +839,7 @@ XhciDelAsyncIntTransfer (
**/
VOID
XhciDelAllAsyncIntTransfers (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -865,14 +860,14 @@ XhciDelAllAsyncIntTransfers (
**/
URB *
XhciInsertAsyncIntTransfer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
);
/**
@@ -883,7 +878,7 @@ XhciInsertAsyncIntTransfer (
**/
VOID
XhcSetBiosOwnership (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -894,7 +889,7 @@ XhcSetBiosOwnership (
**/
VOID
XhcClearBiosOwnership (
- IN USB_XHCI_INSTANCE *Xhc
+ IN USB_XHCI_INSTANCE *Xhc
);
/**
@@ -924,8 +919,8 @@ XhcRouteStringToSlotId (
**/
UINT8
XhcEndpointToDci (
- IN UINT8 EpAddr,
- IN UINT8 Direction
+ IN UINT8 EpAddr,
+ IN UINT8 Direction
);
/**
@@ -941,9 +936,9 @@ XhcEndpointToDci (
EFI_STATUS
EFIAPI
XhcRingDoorBell (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
);
/**
@@ -956,8 +951,8 @@ XhcRingDoorBell (
VOID
EFIAPI
XhcMonitorAsyncRequests (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -975,10 +970,10 @@ XhcMonitorAsyncRequests (
EFI_STATUS
EFIAPI
XhcPollPortStatusChange (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT8 Port,
- IN EFI_USB_PORT_STATUS *PortState
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_STATUS *PortState
);
/**
@@ -995,14 +990,13 @@ XhcPollPortStatusChange (
**/
EFI_STATUS
XhcConfigHubContext (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
);
-
/**
Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
@@ -1017,14 +1011,13 @@ XhcConfigHubContext (
**/
EFI_STATUS
XhcConfigHubContext64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
);
-
/**
Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
@@ -1039,13 +1032,12 @@ XhcConfigHubContext64 (
EFI_STATUS
EFIAPI
XhcSetConfigCmd (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
);
-
/**
Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
@@ -1060,10 +1052,10 @@ XhcSetConfigCmd (
EFI_STATUS
EFIAPI
XhcSetConfigCmd64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
);
/**
@@ -1081,11 +1073,11 @@ XhcSetConfigCmd64 (
EFI_STATUS
EFIAPI
XhcSetInterface (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
- IN EFI_USB_DEVICE_REQUEST *Request
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
+ IN EFI_USB_DEVICE_REQUEST *Request
);
/**
@@ -1103,11 +1095,11 @@ XhcSetInterface (
EFI_STATUS
EFIAPI
XhcSetInterface64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
- IN EFI_USB_DEVICE_REQUEST *Request
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc,
+ IN EFI_USB_DEVICE_REQUEST *Request
);
/**
@@ -1141,11 +1133,11 @@ XhcBusDevAddrToSlotId (
EFI_STATUS
EFIAPI
XhcInitializeDeviceSlot (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
);
/**
@@ -1163,11 +1155,11 @@ XhcInitializeDeviceSlot (
EFI_STATUS
EFIAPI
XhcInitializeDeviceSlot64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
);
/**
@@ -1183,12 +1175,11 @@ XhcInitializeDeviceSlot64 (
EFI_STATUS
EFIAPI
XhcEvaluateContext (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
);
-
/**
Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
@@ -1202,12 +1193,11 @@ XhcEvaluateContext (
EFI_STATUS
EFIAPI
XhcEvaluateContext64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
);
-
/**
Disable the specified device slot.
@@ -1220,11 +1210,10 @@ XhcEvaluateContext64 (
EFI_STATUS
EFIAPI
XhcDisableSlotCmd (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId
);
-
/**
Disable the specified device slot.
@@ -1237,11 +1226,10 @@ XhcDisableSlotCmd (
EFI_STATUS
EFIAPI
XhcDisableSlotCmd64 (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId
);
-
/**
Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
@@ -1254,8 +1242,8 @@ XhcDisableSlotCmd64 (
EFI_STATUS
EFIAPI
XhcSyncTrsRing (
- IN USB_XHCI_INSTANCE *Xhc,
- TRANSFER_RING *TrsRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ TRANSFER_RING *TrsRing
);
/**
@@ -1270,8 +1258,8 @@ XhcSyncTrsRing (
EFI_STATUS
EFIAPI
XhcSyncEventRing (
- IN USB_XHCI_INSTANCE *Xhc,
- EVENT_RING *EvtRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ EVENT_RING *EvtRing
);
/**
@@ -1288,9 +1276,9 @@ XhcSyncEventRing (
EFI_STATUS
EFIAPI
XhcCheckNewEvent (
- IN USB_XHCI_INSTANCE *Xhc,
- IN EVENT_RING *EvtRing,
- OUT TRB_TEMPLATE **NewEvtTrb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN EVENT_RING *EvtRing,
+ OUT TRB_TEMPLATE **NewEvtTrb
);
/**
@@ -1303,9 +1291,9 @@ XhcCheckNewEvent (
**/
VOID
CreateTransferRing (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINTN TrbNum,
- OUT TRANSFER_RING *TransferRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINTN TrbNum,
+ OUT TRANSFER_RING *TransferRing
);
/**
@@ -1317,8 +1305,8 @@ CreateTransferRing (
**/
VOID
CreateEventRing (
- IN USB_XHCI_INSTANCE *Xhc,
- OUT EVENT_RING *EventRing
+ IN USB_XHCI_INSTANCE *Xhc,
+ OUT EVENT_RING *EventRing
);
/**
@@ -1338,8 +1326,8 @@ CreateEventRing (
EFI_STATUS
EFIAPI
XhcRecoverHaltedEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
);
/**
@@ -1358,8 +1346,8 @@ XhcRecoverHaltedEndpoint (
EFI_STATUS
EFIAPI
XhcDequeueTrbFromEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
);
/**
@@ -1377,10 +1365,10 @@ XhcDequeueTrbFromEndpoint (
EFI_STATUS
EFIAPI
XhcStopEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *PendingUrb OPTIONAL
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *PendingUrb OPTIONAL
);
/**
@@ -1397,9 +1385,9 @@ XhcStopEndpoint (
EFI_STATUS
EFIAPI
XhcResetEndpoint (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
);
/**
@@ -1418,10 +1406,10 @@ XhcResetEndpoint (
EFI_STATUS
EFIAPI
XhcSetTrDequeuePointer (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *Urb
);
/**
@@ -1442,19 +1430,19 @@ XhcSetTrDequeuePointer (
@return Created URB or NULL
**/
-URB*
+URB *
XhcCreateUrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
);
/**
@@ -1466,8 +1454,8 @@ XhcCreateUrb (
**/
VOID
XhcFreeUrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
);
/**
@@ -1481,8 +1469,8 @@ XhcFreeUrb (
**/
EFI_STATUS
XhcCreateTransferTrb (
- IN USB_XHCI_INSTANCE *Xhc,
- IN URB *Urb
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN URB *Urb
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c b/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c
index c4d93aea25..c8e49e1864 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/DmaMem.c
@@ -32,11 +32,11 @@ EDKII_IOMMU_PPI *mIoMmu;
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -81,9 +83,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,7 +101,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -109,6 +112,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -142,7 +146,7 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
if (mIoMmu != NULL) {
@@ -157,18 +161,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -186,10 +191,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -207,9 +214,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -221,6 +228,7 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -286,9 +294,10 @@ IoMmuAllocateAlignedBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Memory = *HostAddress;
- AlignedMemory = ((UINTN) Memory + AlignmentMask) & ~AlignmentMask;
- UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN) Memory);
+ AlignedMemory = ((UINTN)Memory + AlignmentMask) & ~AlignmentMask;
+ UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN)Memory);
if (UnalignedPages > 0) {
//
// Free first unaligned page(s).
@@ -296,11 +305,13 @@ IoMmuAllocateAlignedBuffer (
Status = mIoMmu->FreeBuffer (
mIoMmu,
UnalignedPages,
- Memory);
+ Memory
+ );
if (EFI_ERROR (Status)) {
return Status;
}
}
+
Memory = (VOID *)(UINTN)(AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
UnalignedPages = RealPages - Pages - UnalignedPages;
if (UnalignedPages > 0) {
@@ -310,24 +321,27 @@ IoMmuAllocateAlignedBuffer (
Status = mIoMmu->FreeBuffer (
mIoMmu,
UnalignedPages,
- Memory);
+ Memory
+ );
if (EFI_ERROR (Status)) {
return Status;
}
}
- *HostAddress = (VOID *) AlignedMemory;
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+
+ *HostAddress = (VOID *)AlignedMemory;
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -345,10 +359,12 @@ IoMmuAllocateAlignedBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(((UINTN) HostPhyAddress + AlignmentMask) & ~AlignmentMask);
- *DeviceAddress = ((UINTN) HostPhyAddress + AlignmentMask) & ~AlignmentMask;
- *Mapping = NULL;
+
+ *HostAddress = (VOID *)(((UINTN)HostPhyAddress + AlignmentMask) & ~AlignmentMask);
+ *DeviceAddress = ((UINTN)HostPhyAddress + AlignmentMask) & ~AlignmentMask;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -367,4 +383,3 @@ IoMmuInit (
(VOID **)&mIoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
index 01f4228537..c64b38fcfc 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
@@ -20,7 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USBHC_MEM_BLOCK *
UsbHcAllocMemBlock (
- IN UINTN Pages
+ IN UINTN Pages
)
{
USBHC_MEM_BLOCK *Block;
@@ -32,16 +32,17 @@ UsbHcAllocMemBlock (
EFI_PHYSICAL_ADDRESS TempPtr;
PageNumber = EFI_SIZE_TO_PAGES (sizeof (USBHC_MEM_BLOCK));
- Status = PeiServicesAllocatePages (
- EfiBootServicesData,
- PageNumber,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesData,
+ PageNumber,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID *) (UINTN) TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
+
+ ZeroMem ((VOID *)(UINTN)TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
//
// each bit in the bit array represents USBHC_MEM_UNIT
@@ -49,23 +50,24 @@ UsbHcAllocMemBlock (
//
ASSERT (USBHC_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (USBHC_MEM_BLOCK *) (UINTN) TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block = (USBHC_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
Block->BitsLen = Block->BufLen / (USBHC_MEM_UNIT * 8);
PageNumber = EFI_SIZE_TO_PAGES (Block->BitsLen);
- Status = PeiServicesAllocatePages (
- EfiBootServicesData,
- PageNumber,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesData,
+ PageNumber,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID *) (UINTN) TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
- Block->Bits = (UINT8 *) (UINTN) TempPtr;
+ ZeroMem ((VOID *)(UINTN)TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
+
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Pages,
@@ -76,12 +78,13 @@ UsbHcAllocMemBlock (
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID *) (UINTN) BufHost, EFI_PAGES_TO_SIZE (Pages));
- Block->BufHost = (UINT8 *) (UINTN) BufHost;
- Block->Buf = (UINT8 *) (UINTN) MappedAddr;
- Block->Mapping = Mapping;
- Block->Next = NULL;
+ ZeroMem ((VOID *)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
+
+ Block->BufHost = (UINT8 *)(UINTN)BufHost;
+ Block->Buf = (UINT8 *)(UINTN)MappedAddr;
+ Block->Mapping = Mapping;
+ Block->Next = NULL;
return Block;
}
@@ -95,8 +98,8 @@ UsbHcAllocMemBlock (
**/
VOID
UsbHcFreeMemBlock (
- IN USBHC_MEM_POOL *Pool,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_POOL *Pool,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -120,22 +123,22 @@ UsbHcFreeMemBlock (
**/
VOID *
UsbHcAllocMemFromBlock (
- IN USBHC_MEM_BLOCK *Block,
- IN UINTN Units
+ IN USBHC_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -154,9 +157,9 @@ UsbHcAllocMemFromBlock (
} else {
NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -167,13 +170,13 @@ UsbHcAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -192,9 +195,9 @@ UsbHcAllocMemFromBlock (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddrForHostAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
USBHC_MEM_BLOCK *Head;
@@ -215,7 +218,7 @@ UsbHcGetPciAddrForHostAddr (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
+ if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
@@ -224,8 +227,8 @@ UsbHcGetPciAddrForHostAddr (
//
// calculate the pci memory address for host memory address.
//
- Offset = (UINT8 *) Mem - Block->BufHost;
- PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) (Block->Buf + Offset);
+ Offset = (UINT8 *)Mem - Block->BufHost;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
}
@@ -241,9 +244,9 @@ UsbHcGetPciAddrForHostAddr (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetHostAddrForPciAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
USBHC_MEM_BLOCK *Head;
@@ -264,7 +267,7 @@ UsbHcGetHostAddrForPciAddr (
// scan the memory block list for the memory block that
// completely contains the allocated memory.
//
- if ((Block->Buf <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->Buf + Block->BufLen))) {
+ if ((Block->Buf <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->Buf + Block->BufLen))) {
break;
}
}
@@ -273,8 +276,8 @@ UsbHcGetHostAddrForPciAddr (
//
// calculate the host memory address for pci memory address.
//
- Offset = (UINT8 *) Mem - Block->Buf;
- HostAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) (Block->BufHost + Offset);
+ Offset = (UINT8 *)Mem - Block->Buf;
+ HostAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->BufHost + Offset);
return HostAddr;
}
@@ -287,8 +290,8 @@ UsbHcGetHostAddrForPciAddr (
**/
VOID
UsbHcInsertMemBlockToPool (
- IN USBHC_MEM_BLOCK *Head,
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Head,
+ IN USBHC_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -307,10 +310,10 @@ UsbHcInsertMemBlockToPool (
**/
BOOLEAN
UsbHcIsMemBlockEmpty (
- IN USBHC_MEM_BLOCK *Block
+ IN USBHC_MEM_BLOCK *Block
)
{
- UINTN Index;
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -321,8 +324,6 @@ UsbHcIsMemBlockEmpty (
return TRUE;
}
-
-
/**
Initialize the memory management pool for the host controller.
@@ -340,17 +341,18 @@ UsbHcInitMemPool (
EFI_PHYSICAL_ADDRESS TempPtr;
PageNumber = EFI_SIZE_TO_PAGES (sizeof (USBHC_MEM_POOL));
- Status = PeiServicesAllocatePages (
- EfiBootServicesData,
- PageNumber,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesData,
+ PageNumber,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID *) (UINTN) TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
- Pool = (USBHC_MEM_POOL *) ((UINTN) TempPtr);
+ ZeroMem ((VOID *)(UINTN)TempPtr, EFI_PAGES_TO_SIZE (PageNumber));
+
+ Pool = (USBHC_MEM_POOL *)((UINTN)TempPtr);
Pool->Head = UsbHcAllocMemBlock (USBHC_MEM_DEFAULT_PAGES);
if (Pool->Head == NULL) {
@@ -371,10 +373,10 @@ UsbHcInitMemPool (
**/
VOID
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
)
{
- USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -384,7 +386,7 @@ UsbHcFreeMemPool (
// first block.
//
for (Block = Pool->Head->Next; Block != NULL; Block = Pool->Head->Next) {
- //UsbHcUnlinkMemBlock (Pool->Head, Block);
+ // UsbHcUnlinkMemBlock (Pool->Head, Block);
UsbHcFreeMemBlock (Pool, Block);
}
@@ -403,16 +405,16 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- USBHC_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ USBHC_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = USBHC_MEM_ROUND (Size);
@@ -446,6 +448,7 @@ UsbHcAllocateMem (
} else {
Pages = USBHC_MEM_DEFAULT_PAGES;
}
+
NewBlock = UsbHcAllocMemBlock (Pages);
if (NewBlock == NULL) {
@@ -475,22 +478,22 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- USBHC_MEM_BLOCK *Head;
- USBHC_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ USBHC_MEM_BLOCK *Head;
+ USBHC_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -501,8 +504,8 @@ UsbHcFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->BufHost) / USBHC_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -510,7 +513,7 @@ UsbHcFreeMem (
for (Count = 0; Count < (AllocSize / USBHC_MEM_UNIT); Count++) {
ASSERT (USB_HC_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ USB_HC_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ USB_HC_BIT (Bit));
NEXT_BIT (Byte, Bit);
}
@@ -529,7 +532,7 @@ UsbHcFreeMem (
// Release the current memory block if it is empty and not the head
//
if ((Block != Head) && UsbHcIsMemBlockEmpty (Block)) {
- //UsbHcUnlinkMemBlock (Head, Block);
+ // UsbHcUnlinkMemBlock (Head, Block);
UsbHcFreeMemBlock (Pool, Block);
}
}
@@ -553,11 +556,11 @@ UsbHcFreeMem (
**/
EFI_STATUS
UsbHcAllocateAlignedPages (
- IN UINTN Pages,
- IN UINTN Alignment,
- OUT VOID **HostAddress,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN UINTN Pages,
+ IN UINTN Alignment,
+ OUT VOID **HostAddress,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -603,7 +606,7 @@ UsbHcAllocateAlignedPages (
}
}
- *HostAddress = Memory;
+ *HostAddress = Memory;
*DeviceAddress = DeviceMemory;
return EFI_SUCCESS;
@@ -619,13 +622,12 @@ UsbHcAllocateAlignedPages (
**/
VOID
UsbHcFreeAlignedPages (
- IN VOID *HostAddress,
- IN UINTN Pages,
- IN VOID *Mapping
+ IN VOID *HostAddress,
+ IN UINTN Pages,
+ IN VOID *Mapping
)
{
ASSERT (Pages != 0);
IoMmuFreeBuffer (Pages, HostAddress, Mapping);
}
-
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.h b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.h
index 5aa41397f3..2b4c8b19fc 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.h
+++ b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.h
@@ -12,29 +12,29 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Uefi.h>
-#define USBHC_MEM_DEFAULT_PAGES 16
+#define USBHC_MEM_DEFAULT_PAGES 16
typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
struct _USBHC_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- USBHC_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ USBHC_MEM_BLOCK *Next;
};
//
// Memory allocation unit, must be 2^n, n>4
//
-#define USBHC_MEM_UNIT 64
+#define USBHC_MEM_UNIT 64
-#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
-#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
+#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
+#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
-#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
+#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
#define USB_HC_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
@@ -57,9 +57,9 @@ struct _USBHC_MEM_BLOCK {
// data to be on the same 4G memory.
//
typedef struct _USBHC_MEM_POOL {
- BOOLEAN Check4G;
- UINT32 Which4G;
- USBHC_MEM_BLOCK *Head;
+ BOOLEAN Check4G;
+ UINT32 Which4G;
+ USBHC_MEM_BLOCK *Head;
} USBHC_MEM_POOL;
/**
@@ -74,9 +74,9 @@ typedef struct _USBHC_MEM_POOL {
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetPciAddrForHostAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -91,9 +91,9 @@ UsbHcGetPciAddrForHostAddr (
**/
EFI_PHYSICAL_ADDRESS
UsbHcGetHostAddrForPciAddr (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -115,11 +115,11 @@ UsbHcGetHostAddrForPciAddr (
**/
EFI_STATUS
UsbHcAllocateAlignedPages (
- IN UINTN Pages,
- IN UINTN Alignment,
- OUT VOID **HostAddress,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN UINTN Pages,
+ IN UINTN Alignment,
+ OUT VOID **HostAddress,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -132,9 +132,9 @@ UsbHcAllocateAlignedPages (
**/
VOID
UsbHcFreeAlignedPages (
- IN VOID *HostAddress,
- IN UINTN Pages,
- IN VOID *Mapping
+ IN VOID *HostAddress,
+ IN UINTN Pages,
+ IN VOID *Mapping
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
index 6bdf488413..301f376b04 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
@@ -15,48 +15,48 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// to the UEFI protocol's port state (change).
//
USB_PORT_STATE_MAP mUsbPortStateMap[] = {
- {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
- {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
- {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
- {XHC_PORTSC_PP, USB_PORT_STAT_POWER},
- {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
+ { XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
+ { XHC_PORTSC_PED, USB_PORT_STAT_ENABLE },
+ { XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
+ { XHC_PORTSC_PP, USB_PORT_STAT_POWER },
+ { XHC_PORTSC_RESET, USB_PORT_STAT_RESET }
};
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
- {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
- {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
- {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
- {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
+ { XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
+ { XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
+ { XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
+ { XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET }
};
-USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
- {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
- {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
- {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
- {XHC_PORTSC_PRC, EfiUsbPortResetChange}
+USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
+ { XHC_PORTSC_CSC, EfiUsbPortConnectChange },
+ { XHC_PORTSC_PEC, EfiUsbPortEnableChange },
+ { XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange },
+ { XHC_PORTSC_PRC, EfiUsbPortResetChange }
};
USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
- {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
- {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
- {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
- {XHC_HUB_PORTSC_PP, USB_PORT_STAT_POWER},
- {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
+ { XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
+ { XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE },
+ { XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
+ { XHC_HUB_PORTSC_PP, USB_PORT_STAT_POWER },
+ { XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET }
};
USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
- {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
- {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
- {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
- {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
+ { XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
+ { XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
+ { XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
+ { XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET }
};
-USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
- {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
- {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
- {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
- {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
- {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
+USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
+ { XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange },
+ { XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange },
+ { XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange },
+ { XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange },
+ { XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange }
};
/**
@@ -70,11 +70,11 @@ USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
**/
UINT32
XhcPeiReadOpReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (Xhc->CapLength != 0);
@@ -92,9 +92,9 @@ XhcPeiReadOpReg (
**/
VOID
XhcPeiWriteOpReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
ASSERT (Xhc->CapLength != 0);
@@ -112,12 +112,12 @@ XhcPeiWriteOpReg (
**/
VOID
XhcPeiSetOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcPeiReadOpReg (Xhc, Offset);
Data |= Bit;
@@ -134,12 +134,12 @@ XhcPeiSetOpRegBit (
**/
VOID
XhcPeiClearOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcPeiReadOpReg (Xhc, Offset);
Data &= ~Bit;
@@ -162,14 +162,14 @@ XhcPeiClearOpRegBit (
**/
EFI_STATUS
XhcPeiWaitOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
)
{
- UINT64 Index;
+ UINT64 Index;
for (Index = 0; Index < Timeout * XHC_1_MILLISECOND; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
@@ -193,19 +193,17 @@ XhcPeiWaitOpRegBit (
**/
UINT32
XhcPeiReadCapRegister (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
Data = MmioRead32 (Xhc->UsbHostControllerBaseAddress + Offset);
return Data;
}
-
-
/**
Write the data to the XHCI door bell register.
@@ -216,9 +214,9 @@ XhcPeiReadCapRegister (
**/
VOID
XhcPeiWriteDoorBellReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
ASSERT (Xhc->DBOff != 0);
@@ -237,11 +235,11 @@ XhcPeiWriteDoorBellReg (
**/
UINT32
XhcPeiReadRuntimeReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (Xhc->RTSOff != 0);
@@ -260,9 +258,9 @@ XhcPeiReadRuntimeReg (
**/
VOID
XhcPeiWriteRuntimeReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
ASSERT (Xhc->RTSOff != 0);
@@ -280,12 +278,12 @@ XhcPeiWriteRuntimeReg (
**/
VOID
XhcPeiSetRuntimeRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcPeiReadRuntimeReg (Xhc, Offset);
Data |= Bit;
@@ -302,12 +300,12 @@ XhcPeiSetRuntimeRegBit (
**/
VOID
XhcPeiClearRuntimeRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = XhcPeiReadRuntimeReg (Xhc, Offset);
Data &= ~Bit;
@@ -325,7 +323,7 @@ XhcPeiClearRuntimeRegBit (
**/
BOOLEAN
XhcPeiIsHalt (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
)
{
return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT);
@@ -342,7 +340,7 @@ XhcPeiIsHalt (
**/
BOOLEAN
XhcPeiIsSysError (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
)
{
return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE);
@@ -360,11 +358,11 @@ XhcPeiIsSysError (
**/
EFI_STATUS
XhcPeiResetHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Host can only be reset when it is halt. If not so, halt it
@@ -402,11 +400,11 @@ ON_EXIT:
**/
EFI_STATUS
XhcPeiHaltHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
XhcPeiClearOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RUN);
Status = XhcPeiWaitOpRegBit (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT, TRUE, Timeout);
@@ -426,11 +424,11 @@ XhcPeiHaltHC (
**/
EFI_STATUS
XhcPeiRunHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
XhcPeiSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RUN);
Status = XhcPeiWaitOpRegBit (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT, FALSE, Timeout);
@@ -467,37 +465,37 @@ XhcPeiRunHC (
EFI_STATUS
EFIAPI
XhcPeiControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN EFI_USB_DATA_DIRECTION TransferDirection,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN TimeOut,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
- PEI_XHC_DEV *Xhc;
- URB *Urb;
- UINT8 Endpoint;
- UINT8 Index;
- UINT8 DescriptorType;
- UINT8 SlotId;
- UINT8 TTT;
- UINT8 MTT;
- UINT32 MaxPacket0;
- EFI_USB_HUB_DESCRIPTOR *HubDesc;
- EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
- UINTN MapSize;
- EFI_USB_PORT_STATUS PortStatus;
- UINT32 State;
- EFI_USB_DEVICE_REQUEST ClearPortRequest;
- UINTN Len;
+ PEI_XHC_DEV *Xhc;
+ URB *Urb;
+ UINT8 Endpoint;
+ UINT8 Index;
+ UINT8 DescriptorType;
+ UINT8 SlotId;
+ UINT8 TTT;
+ UINT8 MTT;
+ UINT32 MaxPacket0;
+ EFI_USB_HUB_DESCRIPTOR *HubDesc;
+ EFI_STATUS Status;
+ EFI_STATUS RecoveryStatus;
+ UINTN MapSize;
+ EFI_USB_PORT_STATUS PortStatus;
+ UINT32 State;
+ EFI_USB_DEVICE_REQUEST ClearPortRequest;
+ UINTN Len;
//
// Validate parameters
@@ -508,24 +506,28 @@ XhcPeiControlTransfer (
if ((TransferDirection != EfiUsbDataIn) &&
(TransferDirection != EfiUsbDataOut) &&
- (TransferDirection != EfiUsbNoData)) {
+ (TransferDirection != EfiUsbNoData))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection == EfiUsbNoData) &&
- ((Data != NULL) || (*DataLength != 0))) {
+ ((Data != NULL) || (*DataLength != 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection != EfiUsbNoData) &&
- ((Data == NULL) || (*DataLength == 0))) {
+ ((Data == NULL) || (*DataLength == 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
(MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
(MaximumPacketLength != 512)
- ) {
+ )
+ {
return EFI_INVALID_PARAMETER;
}
@@ -537,7 +539,7 @@ XhcPeiControlTransfer (
return EFI_INVALID_PARAMETER;
}
- Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
+ Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
Status = EFI_DEVICE_ERROR;
*TransferResult = EFI_USB_ERR_SYSTEM;
@@ -561,7 +563,8 @@ XhcPeiControlTransfer (
// According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
//
if ((Request->Request == USB_REQ_SET_ADDRESS) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
+ {
//
// Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
// This way is used to clean the history to avoid using wrong device address afterwards.
@@ -569,7 +572,8 @@ XhcPeiControlTransfer (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
- (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8) Request->Value)) {
+ (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value))
+ {
Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
}
}
@@ -577,14 +581,15 @@ XhcPeiControlTransfer (
if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
goto ON_EXIT;
}
+
//
// The actual device address has been assigned by XHCI during initializing the device slot.
// So we just need establish the mapping relationship between the device address requested from UsbBus
// and the actual device address assigned by XHCI. The following invocations through EFI_USB2_HC_PROTOCOL interface
// can find out the actual device address by it.
//
- Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8) Request->Value;
- Status = EFI_SUCCESS;
+ Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
+ Status = EFI_SUCCESS;
goto ON_EXIT;
}
@@ -595,20 +600,20 @@ XhcPeiControlTransfer (
// endpoint is bidirectional. XhcPeiCreateUrb expects this
// combination of Ep addr and its direction.
//
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Urb = XhcPeiCreateUrb (
- Xhc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- MaximumPacketLength,
- XHC_CTRL_TRANSFER,
- Request,
- Data,
- *DataLength,
- NULL,
- NULL
- );
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
+ Urb = XhcPeiCreateUrb (
+ Xhc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ MaximumPacketLength,
+ XHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ *DataLength,
+ NULL,
+ NULL
+ );
if (Urb == NULL) {
DEBUG ((DEBUG_ERROR, "XhcPeiControlTransfer: failed to create URB"));
@@ -629,20 +634,22 @@ XhcPeiControlTransfer (
//
// The transfer timed out. Abort the transfer by dequeueing of the TD.
//
- RecoveryStatus = XhcPeiDequeueTrbFromEndpoint(Xhc, Urb);
- if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((DEBUG_ERROR, "XhcPeiControlTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
+ RecoveryStatus = XhcPeiDequeueTrbFromEndpoint (Xhc, Urb);
+ if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG ((DEBUG_ERROR, "XhcPeiControlTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
}
+
XhcPeiFreeUrb (Xhc, Urb);
goto ON_EXIT;
} else {
if (*TransferResult == EFI_USB_NOERROR) {
Status = EFI_SUCCESS;
} else if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
- RecoveryStatus = XhcPeiRecoverHaltedEndpoint(Xhc, Urb);
+ RecoveryStatus = XhcPeiRecoverHaltedEndpoint (Xhc, Urb);
if (EFI_ERROR (RecoveryStatus)) {
DEBUG ((DEBUG_ERROR, "XhcPeiControlTransfer: XhcPeiRecoverHaltedEndpoint failed\n"));
}
+
Status = EFI_DEVICE_ERROR;
XhcPeiFreeUrb (Xhc, Urb);
goto ON_EXIT;
@@ -651,6 +658,7 @@ XhcPeiControlTransfer (
goto ON_EXIT;
}
}
+
//
// Unmap data before consume.
//
@@ -663,8 +671,9 @@ XhcPeiControlTransfer (
//
if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
- ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
- DescriptorType = (UINT8) (Request->Value >> 8);
+ ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE)))))
+ {
+ DescriptorType = (UINT8)(Request->Value >> 8);
if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
ASSERT (Data != NULL);
//
@@ -679,11 +688,13 @@ XhcPeiControlTransfer (
} else {
MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
}
+
Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
if (Xhc->UsbDevContext[SlotId].ConfDesc == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ON_EXIT;
}
+
if (Xhc->HcCParams.Data.Csz == 0) {
Status = XhcPeiEvaluateContext (Xhc, SlotId, MaxPacket0);
} else {
@@ -691,28 +702,30 @@ XhcPeiControlTransfer (
}
} else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
ASSERT (Data != NULL);
- if (*DataLength == ((UINT16 *) Data)[1]) {
+ if (*DataLength == ((UINT16 *)Data)[1]) {
//
// Get configuration value from request, store the configuration descriptor for Configure_Endpoint cmd.
//
- Index = (UINT8) Request->Value;
+ Index = (UINT8)Request->Value;
ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool (*DataLength);
if (Xhc->UsbDevContext[SlotId].ConfDesc[Index] == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ON_EXIT;
}
+
CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
}
} else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
- (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
+ (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2))
+ {
ASSERT (Data != NULL);
- HubDesc = (EFI_USB_HUB_DESCRIPTOR *) Data;
+ HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
ASSERT (HubDesc->NumPorts <= 15);
//
// The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
//
- TTT = (UINT8) ((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
+ TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
//
// Don't support multi-TT feature for super speed hub now.
@@ -730,7 +743,8 @@ XhcPeiControlTransfer (
}
}
} else if ((Request->Request == USB_REQ_SET_CONFIG) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
+ {
//
// Hook Set_Config request from UsbBus as we need configure device endpoint.
//
@@ -741,16 +755,18 @@ XhcPeiControlTransfer (
} else {
Status = XhcPeiSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
}
+
break;
}
}
} else if ((Request->Request == USB_REQ_GET_STATUS) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
+ (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)))
+ {
ASSERT (Data != NULL);
//
// Hook Get_Status request from UsbBus to keep track of the port status change.
//
- State = *(UINT32 *) Data;
+ State = *(UINT32 *)Data;
PortStatus.PortStatus = 0;
PortStatus.PortChangeStatus = 0;
@@ -778,14 +794,14 @@ XhcPeiControlTransfer (
MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
- PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
+ PortStatus.PortStatus = (UINT16)(PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
}
}
MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
- PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
+ PortStatus.PortChangeStatus = (UINT16)(PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
}
}
@@ -794,11 +810,11 @@ XhcPeiControlTransfer (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
- ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
- ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
- ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
- ClearPortRequest.Index = Request->Index;
- ClearPortRequest.Length = 0;
+ ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
+ ClearPortRequest.Request = (UINT8)USB_REQ_CLEAR_FEATURE;
+ ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
+ ClearPortRequest.Index = Request->Index;
+ ClearPortRequest.Length = 0;
XhcPeiControlTransfer (
PeiServices,
@@ -819,7 +835,7 @@ XhcPeiControlTransfer (
XhcPeiPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
- *(UINT32 *) Data = *(UINT32 *) &PortStatus;
+ *(UINT32 *)Data = *(UINT32 *)&PortStatus;
}
ON_EXIT:
@@ -866,31 +882,32 @@ ON_EXIT:
EFI_STATUS
EFIAPI
XhcPeiBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 DeviceSpeed,
- IN UINTN MaximumPacketLength,
- IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
)
{
- PEI_XHC_DEV *Xhc;
- URB *Urb;
- UINT8 SlotId;
- EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
+ PEI_XHC_DEV *Xhc;
+ URB *Urb;
+ UINT8 SlotId;
+ EFI_STATUS Status;
+ EFI_STATUS RecoveryStatus;
//
// Validate the parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -901,11 +918,12 @@ XhcPeiBulkTransfer (
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 512)) ||
- ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength > 1024))) {
+ ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength > 1024)))
+ {
return EFI_INVALID_PARAMETER;
}
- Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
+ Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -956,18 +974,19 @@ XhcPeiBulkTransfer (
//
// The transfer timed out. Abort the transfer by dequeueing of the TD.
//
- RecoveryStatus = XhcPeiDequeueTrbFromEndpoint(Xhc, Urb);
- if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((DEBUG_ERROR, "XhcPeiBulkTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
+ RecoveryStatus = XhcPeiDequeueTrbFromEndpoint (Xhc, Urb);
+ if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG ((DEBUG_ERROR, "XhcPeiBulkTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
}
} else {
if (*TransferResult == EFI_USB_NOERROR) {
Status = EFI_SUCCESS;
} else if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
- RecoveryStatus = XhcPeiRecoverHaltedEndpoint(Xhc, Urb);
+ RecoveryStatus = XhcPeiRecoverHaltedEndpoint (Xhc, Urb);
if (EFI_ERROR (RecoveryStatus)) {
DEBUG ((DEBUG_ERROR, "XhcPeiBulkTransfer: XhcPeiRecoverHaltedEndpoint failed\n"));
}
+
Status = EFI_DEVICE_ERROR;
}
}
@@ -998,12 +1017,13 @@ ON_EXIT:
EFI_STATUS
EFIAPI
XhcPeiGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
)
{
- PEI_XHC_DEV *XhcDev;
+ PEI_XHC_DEV *XhcDev;
+
XhcDev = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
if (PortNumber == NULL) {
@@ -1033,18 +1053,18 @@ XhcPeiGetRootHubPortNumber (
EFI_STATUS
EFIAPI
XhcPeiClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_XHC_DEV *Xhc;
- UINT32 Offset;
- UINT32 State;
- EFI_STATUS Status;
+ PEI_XHC_DEV *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ EFI_STATUS Status;
- Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
+ Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
Status = EFI_SUCCESS;
if (PortNumber >= Xhc->HcSParams1.Data.MaxPorts) {
@@ -1052,15 +1072,15 @@ XhcPeiClearRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
- State = XhcPeiReadOpReg (Xhc, Offset);
+ Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
+ State = XhcPeiReadOpReg (Xhc, Offset);
DEBUG ((DEBUG_INFO, "XhcPeiClearRootHubPortFeature: Port: %x State: %x\n", PortNumber, State));
//
// Mask off the port status change bits, these bits are
// write clean bits
//
- State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
+ State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
switch (PortFeature) {
case EfiUsbPortEnable:
@@ -1096,6 +1116,7 @@ XhcPeiClearRootHubPortFeature (
State &= ~XHC_PORTSC_PP;
XhcPeiWriteOpReg (Xhc, Offset, State);
}
+
break;
case EfiUsbPortOwner:
@@ -1168,18 +1189,18 @@ ON_EXIT:
EFI_STATUS
EFIAPI
XhcPeiSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_XHC_DEV *Xhc;
- UINT32 Offset;
- UINT32 State;
- EFI_STATUS Status;
+ PEI_XHC_DEV *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ EFI_STATUS Status;
- Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
+ Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This);
Status = EFI_SUCCESS;
if (PortNumber >= Xhc->HcSParams1.Data.MaxPorts) {
@@ -1187,15 +1208,15 @@ XhcPeiSetRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
- State = XhcPeiReadOpReg (Xhc, Offset);
+ Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
+ State = XhcPeiReadOpReg (Xhc, Offset);
DEBUG ((DEBUG_INFO, "XhcPeiSetRootHubPortFeature: Port: %x State: %x\n", PortNumber, State));
//
// Mask off the port status change bits, these bits are
// write clean bits
//
- State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
+ State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
switch (PortFeature) {
case EfiUsbPortEnable:
@@ -1209,7 +1230,7 @@ XhcPeiSetRootHubPortFeature (
State |= XHC_PORTSC_LWS;
XhcPeiWriteOpReg (Xhc, Offset, State);
State &= ~XHC_PORTSC_PLS;
- State |= (3 << 5) ;
+ State |= (3 << 5);
XhcPeiWriteOpReg (Xhc, Offset, State);
break;
@@ -1232,7 +1253,7 @@ XhcPeiSetRootHubPortFeature (
//
State |= XHC_PORTSC_RESET;
XhcPeiWriteOpReg (Xhc, Offset, State);
- XhcPeiWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
+ XhcPeiWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
break;
case EfiUsbPortPower:
@@ -1243,6 +1264,7 @@ XhcPeiSetRootHubPortFeature (
State |= XHC_PORTSC_PP;
XhcPeiWriteOpReg (Xhc, Offset, State);
}
+
break;
case EfiUsbPortOwner:
@@ -1276,18 +1298,18 @@ ON_EXIT:
EFI_STATUS
EFIAPI
XhcPeiGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- PEI_XHC_DEV *Xhc;
- UINT32 Offset;
- UINT32 State;
- UINTN Index;
- UINTN MapSize;
- USB_DEV_ROUTE ParentRouteChart;
+ PEI_XHC_DEV *Xhc;
+ UINT32 Offset;
+ UINT32 State;
+ UINTN Index;
+ UINTN MapSize;
+ USB_DEV_ROUTE ParentRouteChart;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1302,11 +1324,11 @@ XhcPeiGetRootHubPortStatus (
//
// Clear port status.
//
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
- Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
- State = XhcPeiReadOpReg (Xhc, Offset);
+ Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
+ State = XhcPeiReadOpReg (Xhc, Offset);
DEBUG ((DEBUG_INFO, "XhcPeiGetRootHubPortStatus: Port: %x State: %x\n", PortNumber, State));
//
@@ -1338,9 +1360,10 @@ XhcPeiGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
+
//
// Bit5~8 reflects its current link state.
//
@@ -1352,7 +1375,7 @@ XhcPeiGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -1394,9 +1417,9 @@ XhcEndOfPei (
IN VOID *Ppi
)
{
- PEI_XHC_DEV *Xhc;
+ PEI_XHC_DEV *Xhc;
- Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY(NotifyDescriptor);
+ Xhc = PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);
XhcPeiHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
@@ -1415,19 +1438,19 @@ XhcEndOfPei (
EFI_STATUS
EFIAPI
XhcPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- PEI_USB_CONTROLLER_PPI *UsbControllerPpi;
- EFI_STATUS Status;
- UINT8 Index;
- UINTN ControllerType;
- UINTN BaseAddress;
- UINTN MemPages;
- PEI_XHC_DEV *XhcDev;
- EFI_PHYSICAL_ADDRESS TempPtr;
- UINT32 PageSize;
+ PEI_USB_CONTROLLER_PPI *UsbControllerPpi;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINTN ControllerType;
+ UINTN BaseAddress;
+ UINTN MemPages;
+ PEI_XHC_DEV *XhcDev;
+ EFI_PHYSICAL_ADDRESS TempPtr;
+ UINT32 PageSize;
//
// Shadow this PEIM to run from memory.
@@ -1440,7 +1463,7 @@ XhcPeimEntry (
&gPeiUsbControllerPpiGuid,
0,
NULL,
- (VOID **) &UsbControllerPpi
+ (VOID **)&UsbControllerPpi
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
@@ -1451,7 +1474,7 @@ XhcPeimEntry (
Index = 0;
while (TRUE) {
Status = UsbControllerPpi->GetUsbController (
- (EFI_PEI_SERVICES **) PeiServices,
+ (EFI_PEI_SERVICES **)PeiServices,
UsbControllerPpi,
Index,
&ControllerType,
@@ -1473,25 +1496,26 @@ XhcPeimEntry (
}
MemPages = EFI_SIZE_TO_PAGES (sizeof (PEI_XHC_DEV));
- Status = PeiServicesAllocatePages (
- EfiBootServicesData,
- MemPages,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesData,
+ MemPages,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID *) (UINTN) TempPtr, EFI_PAGES_TO_SIZE (MemPages));
- XhcDev = (PEI_XHC_DEV *) ((UINTN) TempPtr);
-
- XhcDev->Signature = USB_XHC_DEV_SIGNATURE;
- XhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
- XhcDev->CapLength = (UINT8) (XhcPeiReadCapRegister (XhcDev, XHC_CAPLENGTH_OFFSET) & 0x0FF);
- XhcDev->HcSParams1.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCSPARAMS1_OFFSET);
- XhcDev->HcSParams2.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCSPARAMS2_OFFSET);
- XhcDev->HcCParams.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCCPARAMS_OFFSET);
- XhcDev->DBOff = XhcPeiReadCapRegister (XhcDev, XHC_DBOFF_OFFSET);
- XhcDev->RTSOff = XhcPeiReadCapRegister (XhcDev, XHC_RTSOFF_OFFSET);
+
+ ZeroMem ((VOID *)(UINTN)TempPtr, EFI_PAGES_TO_SIZE (MemPages));
+ XhcDev = (PEI_XHC_DEV *)((UINTN)TempPtr);
+
+ XhcDev->Signature = USB_XHC_DEV_SIGNATURE;
+ XhcDev->UsbHostControllerBaseAddress = (UINT32)BaseAddress;
+ XhcDev->CapLength = (UINT8)(XhcPeiReadCapRegister (XhcDev, XHC_CAPLENGTH_OFFSET) & 0x0FF);
+ XhcDev->HcSParams1.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCSPARAMS1_OFFSET);
+ XhcDev->HcSParams2.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCSPARAMS2_OFFSET);
+ XhcDev->HcCParams.Dword = XhcPeiReadCapRegister (XhcDev, XHC_HCCPARAMS_OFFSET);
+ XhcDev->DBOff = XhcPeiReadCapRegister (XhcDev, XHC_DBOFF_OFFSET);
+ XhcDev->RTSOff = XhcPeiReadCapRegister (XhcDev, XHC_RTSOFF_OFFSET);
//
// This PageSize field defines the page size supported by the xHC implementation.
@@ -1528,19 +1552,19 @@ XhcPeimEntry (
//
MicroSecondDelay (XHC_ROOT_PORT_STATE_STABLE);
- XhcDev->Usb2HostControllerPpi.ControlTransfer = XhcPeiControlTransfer;
- XhcDev->Usb2HostControllerPpi.BulkTransfer = XhcPeiBulkTransfer;
- XhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = XhcPeiGetRootHubPortNumber;
- XhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = XhcPeiGetRootHubPortStatus;
- XhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = XhcPeiSetRootHubPortFeature;
- XhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = XhcPeiClearRootHubPortFeature;
+ XhcDev->Usb2HostControllerPpi.ControlTransfer = XhcPeiControlTransfer;
+ XhcDev->Usb2HostControllerPpi.BulkTransfer = XhcPeiBulkTransfer;
+ XhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = XhcPeiGetRootHubPortNumber;
+ XhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = XhcPeiGetRootHubPortStatus;
+ XhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = XhcPeiSetRootHubPortFeature;
+ XhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = XhcPeiClearRootHubPortFeature;
XhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- XhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
- XhcDev->PpiDescriptor.Ppi = &XhcDev->Usb2HostControllerPpi;
+ XhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
+ XhcDev->PpiDescriptor.Ppi = &XhcDev->Usb2HostControllerPpi;
- XhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- XhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
+ XhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ XhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
XhcDev->EndOfPeiNotifyList.Notify = XhcEndOfPei;
PeiServicesInstallPpi (&XhcDev->PpiDescriptor);
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
index 03a55f3eb6..0800b15c72 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
@@ -25,33 +25,33 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
-typedef struct _PEI_XHC_DEV PEI_XHC_DEV;
-typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
+typedef struct _PEI_XHC_DEV PEI_XHC_DEV;
+typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
#include "UsbHcMem.h"
#include "XhciReg.h"
#include "XhciSched.h"
-#define CMD_RING_TRB_NUMBER 0x100
-#define TR_RING_TRB_NUMBER 0x100
-#define ERST_NUMBER 0x01
-#define EVENT_RING_TRB_NUMBER 0x200
+#define CMD_RING_TRB_NUMBER 0x100
+#define TR_RING_TRB_NUMBER 0x100
+#define ERST_NUMBER 0x01
+#define EVENT_RING_TRB_NUMBER 0x200
-#define XHC_1_MICROSECOND 1
-#define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)
-#define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)
+#define XHC_1_MICROSECOND 1
+#define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)
+#define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)
//
// XHC reset timeout experience values.
// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1000)
+#define XHC_RESET_TIMEOUT (1000)
//
// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.
// The unit is microsecond, setting it as 10ms.
//
-#define XHC_RESET_RECOVERY_DELAY (10 * 1000)
+#define XHC_RESET_RECOVERY_DELAY (10 * 1000)
//
// Wait for root port state stable.
@@ -62,11 +62,11 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
// XHC generic timeout experience values.
// The unit is millisecond, setting it as 10s.
//
-#define XHC_GENERIC_TIMEOUT (10 * 1000)
+#define XHC_GENERIC_TIMEOUT (10 * 1000)
-#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
-#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
-#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
+#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
+#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \
(XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))
@@ -86,23 +86,23 @@ struct _USB_DEV_CONTEXT {
//
// Whether this entry in UsbDevContext array is used or not.
//
- BOOLEAN Enabled;
+ BOOLEAN Enabled;
//
// The slot id assigned to the new device through XHCI's Enable_Slot cmd.
//
- UINT8 SlotId;
+ UINT8 SlotId;
//
// The route string presented an attached usb device.
//
- USB_DEV_ROUTE RouteString;
+ USB_DEV_ROUTE RouteString;
//
// The route string of parent device if it exists. Otherwise it's zero.
//
- USB_DEV_ROUTE ParentRouteString;
+ USB_DEV_ROUTE ParentRouteString;
//
// The actual device address assigned by XHCI through Address_Device command.
//
- UINT8 XhciDevAddr;
+ UINT8 XhciDevAddr;
//
// The requested device address from UsbBus driver through Set_Address standard usb request.
// As XHCI spec replaces this request with Address_Device command, we have to record the
@@ -111,23 +111,23 @@ struct _USB_DEV_CONTEXT {
// through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual
// device address and access the actual device.
//
- UINT8 BusDevAddr;
+ UINT8 BusDevAddr;
//
// The pointer to the input device context.
//
- VOID *InputContext;
+ VOID *InputContext;
//
// The pointer to the output device context.
//
- VOID *OutputContext;
+ VOID *OutputContext;
//
// The transfer queue for every endpoint.
//
- VOID *EndpointTransferRing[31];
+ VOID *EndpointTransferRing[31];
//
// The device descriptor which is stored to support XHCI's Evaluate_Context cmd.
//
- EFI_USB_DEVICE_DESCRIPTOR DevDesc;
+ EFI_USB_DEVICE_DESCRIPTOR DevDesc;
//
// As a usb device may include multiple configuration descriptors, we dynamically allocate an array
// to store them.
@@ -135,59 +135,59 @@ struct _USB_DEV_CONTEXT {
// such as Interface descriptor, Endpoint descriptor, and so on.
// These information is used to support XHCI's Config_Endpoint cmd.
//
- EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
+ EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
};
-#define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')
+#define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')
struct _PEI_XHC_DEV {
- UINTN Signature;
- PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
- UINT32 UsbHostControllerBaseAddress;
- USBHC_MEM_POOL *MemPool;
+ UINTN Signature;
+ PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
+ UINT32 UsbHostControllerBaseAddress;
+ USBHC_MEM_POOL *MemPool;
//
// EndOfPei callback is used to stop the XHC DMA operation
// after exit PEI phase.
//
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
//
// XHCI configuration data
//
- UINT8 CapLength; ///< Capability Register Length
- XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
- XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
- XHC_HCCPARAMS HcCParams; ///< Capability Parameters
- UINT32 DBOff; ///< Doorbell Offset
- UINT32 RTSOff; ///< Runtime Register Space Offset
- UINT32 PageSize;
- UINT32 MaxScratchpadBufs;
- UINT64 *ScratchBuf;
- VOID *ScratchMap;
- UINT64 *ScratchEntry;
- UINTN *ScratchEntryMap;
- UINT64 *DCBAA;
- UINT32 MaxSlotsEn;
+ UINT8 CapLength; ///< Capability Register Length
+ XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
+ XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
+ XHC_HCCPARAMS HcCParams; ///< Capability Parameters
+ UINT32 DBOff; ///< Doorbell Offset
+ UINT32 RTSOff; ///< Runtime Register Space Offset
+ UINT32 PageSize;
+ UINT32 MaxScratchpadBufs;
+ UINT64 *ScratchBuf;
+ VOID *ScratchMap;
+ UINT64 *ScratchEntry;
+ UINTN *ScratchEntryMap;
+ UINT64 *DCBAA;
+ UINT32 MaxSlotsEn;
//
// Cmd Transfer Ring
//
- TRANSFER_RING CmdRing;
+ TRANSFER_RING CmdRing;
//
// EventRing
//
- EVENT_RING EventRing;
+ EVENT_RING EventRing;
//
// Store device contexts managed by XHCI device
// The array supports up to 255 devices, entry 0 is reserved and should not be used.
//
- USB_DEV_CONTEXT UsbDevContext[256];
+ USB_DEV_CONTEXT UsbDevContext[256];
};
-#define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)
-#define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_XHC_DEV, EndOfPeiNotifyList, USB_XHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_XHC_DEV, EndOfPeiNotifyList, USB_XHC_DEV_SIGNATURE)
/**
Initialize the memory management pool for the host controller.
@@ -209,7 +209,7 @@ UsbHcInitMemPool (
**/
VOID
UsbHcFreeMemPool (
- IN USBHC_MEM_POOL *Pool
+ IN USBHC_MEM_POOL *Pool
)
;
@@ -225,8 +225,8 @@ UsbHcFreeMemPool (
**/
VOID *
UsbHcAllocateMem (
- IN USBHC_MEM_POOL *Pool,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN UINTN Size
)
;
@@ -240,13 +240,12 @@ UsbHcAllocateMem (
**/
VOID
UsbHcFreeMem (
- IN USBHC_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN USBHC_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
;
-
/**
Initialize IOMMU.
**/
@@ -276,11 +275,11 @@ IoMmuInit (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -294,7 +293,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -337,9 +336,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h
index e98b451a96..bfbb608526 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciReg.h
@@ -13,153 +13,152 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Capability registers offset
//
-#define XHC_CAPLENGTH_OFFSET 0x00 // Capability register length offset
-#define XHC_HCIVERSION_OFFSET 0x02 // Interface Version Number 02-03h
-#define XHC_HCSPARAMS1_OFFSET 0x04 // Structural Parameters 1
-#define XHC_HCSPARAMS2_OFFSET 0x08 // Structural Parameters 2
-#define XHC_HCSPARAMS3_OFFSET 0x0c // Structural Parameters 3
-#define XHC_HCCPARAMS_OFFSET 0x10 // Capability Parameters
-#define XHC_DBOFF_OFFSET 0x14 // Doorbell Offset
-#define XHC_RTSOFF_OFFSET 0x18 // Runtime Register Space Offset
+#define XHC_CAPLENGTH_OFFSET 0x00 // Capability register length offset
+#define XHC_HCIVERSION_OFFSET 0x02 // Interface Version Number 02-03h
+#define XHC_HCSPARAMS1_OFFSET 0x04 // Structural Parameters 1
+#define XHC_HCSPARAMS2_OFFSET 0x08 // Structural Parameters 2
+#define XHC_HCSPARAMS3_OFFSET 0x0c // Structural Parameters 3
+#define XHC_HCCPARAMS_OFFSET 0x10 // Capability Parameters
+#define XHC_DBOFF_OFFSET 0x14 // Doorbell Offset
+#define XHC_RTSOFF_OFFSET 0x18 // Runtime Register Space Offset
//
// Operational registers offset
//
-#define XHC_USBCMD_OFFSET 0x0000 // USB Command Register Offset
-#define XHC_USBSTS_OFFSET 0x0004 // USB Status Register Offset
-#define XHC_PAGESIZE_OFFSET 0x0008 // USB Page Size Register Offset
-#define XHC_DNCTRL_OFFSET 0x0014 // Device Notification Control Register Offset
-#define XHC_CRCR_OFFSET 0x0018 // Command Ring Control Register Offset
-#define XHC_DCBAAP_OFFSET 0x0030 // Device Context Base Address Array Pointer Register Offset
-#define XHC_CONFIG_OFFSET 0x0038 // Configure Register Offset
-#define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset
+#define XHC_USBCMD_OFFSET 0x0000 // USB Command Register Offset
+#define XHC_USBSTS_OFFSET 0x0004 // USB Status Register Offset
+#define XHC_PAGESIZE_OFFSET 0x0008 // USB Page Size Register Offset
+#define XHC_DNCTRL_OFFSET 0x0014 // Device Notification Control Register Offset
+#define XHC_CRCR_OFFSET 0x0018 // Command Ring Control Register Offset
+#define XHC_DCBAAP_OFFSET 0x0030 // Device Context Base Address Array Pointer Register Offset
+#define XHC_CONFIG_OFFSET 0x0038 // Configure Register Offset
+#define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset
//
// Runtime registers offset
//
-#define XHC_MFINDEX_OFFSET 0x00 // Microframe Index Register Offset
-#define XHC_IMAN_OFFSET 0x20 // Interrupter X Management Register Offset
-#define XHC_IMOD_OFFSET 0x24 // Interrupter X Moderation Register Offset
-#define XHC_ERSTSZ_OFFSET 0x28 // Event Ring Segment Table Size Register Offset
-#define XHC_ERSTBA_OFFSET 0x30 // Event Ring Segment Table Base Address Register Offset
-#define XHC_ERDP_OFFSET 0x38 // Event Ring Dequeue Pointer Register Offset
+#define XHC_MFINDEX_OFFSET 0x00 // Microframe Index Register Offset
+#define XHC_IMAN_OFFSET 0x20 // Interrupter X Management Register Offset
+#define XHC_IMOD_OFFSET 0x24 // Interrupter X Moderation Register Offset
+#define XHC_ERSTSZ_OFFSET 0x28 // Event Ring Segment Table Size Register Offset
+#define XHC_ERSTBA_OFFSET 0x30 // Event Ring Segment Table Base Address Register Offset
+#define XHC_ERDP_OFFSET 0x38 // Event Ring Dequeue Pointer Register Offset
//
// Register Bit Definition
//
-#define XHC_USBCMD_RUN BIT0 // Run/Stop
-#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
-#define XHC_USBCMD_INTE BIT2 // Interrupter Enable
-#define XHC_USBCMD_HSEE BIT3 // Host System Error Enable
-
-#define XHC_USBSTS_HALT BIT0 // Host Controller Halted
-#define XHC_USBSTS_HSE BIT2 // Host System Error
-#define XHC_USBSTS_EINT BIT3 // Event Interrupt
-#define XHC_USBSTS_PCD BIT4 // Port Change Detect
-#define XHC_USBSTS_SSS BIT8 // Save State Status
-#define XHC_USBSTS_RSS BIT9 // Restore State Status
-#define XHC_USBSTS_SRE BIT10 // Save/Restore Error
-#define XHC_USBSTS_CNR BIT11 // Host Controller Not Ready
-#define XHC_USBSTS_HCE BIT12 // Host Controller Error
-
-#define XHC_PAGESIZE_MASK 0xFFFF // Page Size
-
-#define XHC_CRCR_RCS BIT0 // Ring Cycle State
-#define XHC_CRCR_CS BIT1 // Command Stop
-#define XHC_CRCR_CA BIT2 // Command Abort
-#define XHC_CRCR_CRR BIT3 // Command Ring Running
-
-#define XHC_CONFIG_MASK 0xFF // Max Device Slots Enabled
-
-#define XHC_PORTSC_CCS BIT0 // Current Connect Status
-#define XHC_PORTSC_PED BIT1 // Port Enabled/Disabled
-#define XHC_PORTSC_OCA BIT3 // Over-current Active
-#define XHC_PORTSC_RESET BIT4 // Port Reset
-#define XHC_PORTSC_PLS (BIT5|BIT6|BIT7|BIT8) // Port Link State
-#define XHC_PORTSC_PP BIT9 // Port Power
-#define XHC_PORTSC_PS (BIT10|BIT11|BIT12|BIT13) // Port Speed
-#define XHC_PORTSC_LWS BIT16 // Port Link State Write Strobe
-#define XHC_PORTSC_CSC BIT17 // Connect Status Change
-#define XHC_PORTSC_PEC BIT18 // Port Enabled/Disabled Change
-#define XHC_PORTSC_WRC BIT19 // Warm Port Reset Change
-#define XHC_PORTSC_OCC BIT20 // Over-Current Change
-#define XHC_PORTSC_PRC BIT21 // Port Reset Change
-#define XHC_PORTSC_PLC BIT22 // Port Link State Change
-#define XHC_PORTSC_CEC BIT23 // Port Config Error Change
-#define XHC_PORTSC_CAS BIT24 // Cold Attach Status
-
-#define XHC_HUB_PORTSC_CCS BIT0 // Hub's Current Connect Status
-#define XHC_HUB_PORTSC_PED BIT1 // Hub's Port Enabled/Disabled
-#define XHC_HUB_PORTSC_OCA BIT3 // Hub's Over-current Active
-#define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
-#define XHC_HUB_PORTSC_PP BIT9 // Hub's Port Power
-#define XHC_HUB_PORTSC_CSC BIT16 // Hub's Connect Status Change
-#define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
-#define XHC_HUB_PORTSC_OCC BIT19 // Hub's Over-Current Change
-#define XHC_HUB_PORTSC_PRC BIT20 // Hub's Port Reset Change
-#define XHC_HUB_PORTSC_BHRC BIT21 // Hub's Port Warm Reset Change
-
-#define XHC_IMAN_IP BIT0 // Interrupt Pending
-#define XHC_IMAN_IE BIT1 // Interrupt Enable
-
-#define XHC_IMODI_MASK 0x0000FFFF // Interrupt Moderation Interval
-#define XHC_IMODC_MASK 0xFFFF0000 // Interrupt Moderation Counter
-
+#define XHC_USBCMD_RUN BIT0 // Run/Stop
+#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
+#define XHC_USBCMD_INTE BIT2 // Interrupter Enable
+#define XHC_USBCMD_HSEE BIT3 // Host System Error Enable
+
+#define XHC_USBSTS_HALT BIT0 // Host Controller Halted
+#define XHC_USBSTS_HSE BIT2 // Host System Error
+#define XHC_USBSTS_EINT BIT3 // Event Interrupt
+#define XHC_USBSTS_PCD BIT4 // Port Change Detect
+#define XHC_USBSTS_SSS BIT8 // Save State Status
+#define XHC_USBSTS_RSS BIT9 // Restore State Status
+#define XHC_USBSTS_SRE BIT10 // Save/Restore Error
+#define XHC_USBSTS_CNR BIT11 // Host Controller Not Ready
+#define XHC_USBSTS_HCE BIT12 // Host Controller Error
+
+#define XHC_PAGESIZE_MASK 0xFFFF // Page Size
+
+#define XHC_CRCR_RCS BIT0 // Ring Cycle State
+#define XHC_CRCR_CS BIT1 // Command Stop
+#define XHC_CRCR_CA BIT2 // Command Abort
+#define XHC_CRCR_CRR BIT3 // Command Ring Running
+
+#define XHC_CONFIG_MASK 0xFF // Max Device Slots Enabled
+
+#define XHC_PORTSC_CCS BIT0 // Current Connect Status
+#define XHC_PORTSC_PED BIT1 // Port Enabled/Disabled
+#define XHC_PORTSC_OCA BIT3 // Over-current Active
+#define XHC_PORTSC_RESET BIT4 // Port Reset
+#define XHC_PORTSC_PLS (BIT5|BIT6|BIT7|BIT8) // Port Link State
+#define XHC_PORTSC_PP BIT9 // Port Power
+#define XHC_PORTSC_PS (BIT10|BIT11|BIT12|BIT13) // Port Speed
+#define XHC_PORTSC_LWS BIT16 // Port Link State Write Strobe
+#define XHC_PORTSC_CSC BIT17 // Connect Status Change
+#define XHC_PORTSC_PEC BIT18 // Port Enabled/Disabled Change
+#define XHC_PORTSC_WRC BIT19 // Warm Port Reset Change
+#define XHC_PORTSC_OCC BIT20 // Over-Current Change
+#define XHC_PORTSC_PRC BIT21 // Port Reset Change
+#define XHC_PORTSC_PLC BIT22 // Port Link State Change
+#define XHC_PORTSC_CEC BIT23 // Port Config Error Change
+#define XHC_PORTSC_CAS BIT24 // Cold Attach Status
+
+#define XHC_HUB_PORTSC_CCS BIT0 // Hub's Current Connect Status
+#define XHC_HUB_PORTSC_PED BIT1 // Hub's Port Enabled/Disabled
+#define XHC_HUB_PORTSC_OCA BIT3 // Hub's Over-current Active
+#define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
+#define XHC_HUB_PORTSC_PP BIT9 // Hub's Port Power
+#define XHC_HUB_PORTSC_CSC BIT16 // Hub's Connect Status Change
+#define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
+#define XHC_HUB_PORTSC_OCC BIT19 // Hub's Over-Current Change
+#define XHC_HUB_PORTSC_PRC BIT20 // Hub's Port Reset Change
+#define XHC_HUB_PORTSC_BHRC BIT21 // Hub's Port Warm Reset Change
+
+#define XHC_IMAN_IP BIT0 // Interrupt Pending
+#define XHC_IMAN_IE BIT1 // Interrupt Enable
+
+#define XHC_IMODI_MASK 0x0000FFFF // Interrupt Moderation Interval
+#define XHC_IMODC_MASK 0xFFFF0000 // Interrupt Moderation Counter
#pragma pack (1)
typedef struct {
- UINT8 MaxSlots; // Number of Device Slots
- UINT16 MaxIntrs:11; // Number of Interrupters
- UINT16 Rsvd:5;
- UINT8 MaxPorts; // Number of Ports
+ UINT8 MaxSlots; // Number of Device Slots
+ UINT16 MaxIntrs : 11; // Number of Interrupters
+ UINT16 Rsvd : 5;
+ UINT8 MaxPorts; // Number of Ports
} HCSPARAMS1;
//
// Structural Parameters 1 Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCSPARAMS1 Data;
+ UINT32 Dword;
+ HCSPARAMS1 Data;
} XHC_HCSPARAMS1;
typedef struct {
- UINT32 Ist:4; // Isochronous Scheduling Threshold
- UINT32 Erst:4; // Event Ring Segment Table Max
- UINT32 Rsvd:13;
- UINT32 ScratchBufHi:5; // Max Scratchpad Buffers Hi
- UINT32 Spr:1; // Scratchpad Restore
- UINT32 ScratchBufLo:5; // Max Scratchpad Buffers Lo
+ UINT32 Ist : 4; // Isochronous Scheduling Threshold
+ UINT32 Erst : 4; // Event Ring Segment Table Max
+ UINT32 Rsvd : 13;
+ UINT32 ScratchBufHi : 5; // Max Scratchpad Buffers Hi
+ UINT32 Spr : 1; // Scratchpad Restore
+ UINT32 ScratchBufLo : 5; // Max Scratchpad Buffers Lo
} HCSPARAMS2;
//
// Structural Parameters 2 Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCSPARAMS2 Data;
+ UINT32 Dword;
+ HCSPARAMS2 Data;
} XHC_HCSPARAMS2;
typedef struct {
- UINT16 Ac64:1; // 64-bit Addressing Capability
- UINT16 Bnc:1; // BW Negotiation Capability
- UINT16 Csz:1; // Context Size
- UINT16 Ppc:1; // Port Power Control
- UINT16 Pind:1; // Port Indicators
- UINT16 Lhrc:1; // Light HC Reset Capability
- UINT16 Ltc:1; // Latency Tolerance Messaging Capability
- UINT16 Nss:1; // No Secondary SID Support
- UINT16 Pae:1; // Parse All Event Data
- UINT16 Rsvd:3;
- UINT16 MaxPsaSize:4; // Maximum Primary Stream Array Size
- UINT16 ExtCapReg; // xHCI Extended Capabilities Pointer
+ UINT16 Ac64 : 1; // 64-bit Addressing Capability
+ UINT16 Bnc : 1; // BW Negotiation Capability
+ UINT16 Csz : 1; // Context Size
+ UINT16 Ppc : 1; // Port Power Control
+ UINT16 Pind : 1; // Port Indicators
+ UINT16 Lhrc : 1; // Light HC Reset Capability
+ UINT16 Ltc : 1; // Latency Tolerance Messaging Capability
+ UINT16 Nss : 1; // No Secondary SID Support
+ UINT16 Pae : 1; // Parse All Event Data
+ UINT16 Rsvd : 3;
+ UINT16 MaxPsaSize : 4; // Maximum Primary Stream Array Size
+ UINT16 ExtCapReg; // xHCI Extended Capabilities Pointer
} HCCPARAMS;
//
// Capability Parameters Register Bitmap Definition
//
typedef union {
- UINT32 Dword;
- HCCPARAMS Data;
+ UINT32 Dword;
+ HCCPARAMS Data;
} XHC_HCCPARAMS;
#pragma pack ()
@@ -169,19 +168,19 @@ typedef union {
//
#pragma pack(1)
typedef struct {
- UINT8 Pi;
- UINT8 SubClassCode;
- UINT8 BaseCode;
+ UINT8 Pi;
+ UINT8 SubClassCode;
+ UINT8 BaseCode;
} USB_CLASSC;
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 NumPorts;
- UINT16 HubCharacter;
- UINT8 PwrOn2PwrGood;
- UINT8 HubContrCurrent;
- UINT8 Filler[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 NumPorts;
+ UINT16 HubCharacter;
+ UINT8 PwrOn2PwrGood;
+ UINT8 HubContrCurrent;
+ UINT8 Filler[16];
} EFI_USB_HUB_DESCRIPTOR;
#pragma pack()
@@ -191,8 +190,8 @@ typedef struct {
// For more details, Please refer to USB 3.0 Spec Table 10-7.
//
typedef enum {
- Usb3PortBHPortReset = 28,
- Usb3PortBHPortResetChange = 29
+ Usb3PortBHPortReset = 28,
+ Usb3PortBHPortResetChange = 29
} XHC_PORT_FEATURE;
//
@@ -200,16 +199,16 @@ typedef enum {
// UEFI's port states.
//
typedef struct {
- UINT32 HwState;
- UINT16 UefiState;
+ UINT32 HwState;
+ UINT16 UefiState;
} USB_PORT_STATE_MAP;
//
// Structure to map the hardware port states to feature selector for clear port feature request.
//
typedef struct {
- UINT32 HwState;
- UINT16 Selector;
+ UINT32 HwState;
+ UINT16 Selector;
} USB_CLEAR_PORT_MAP;
/**
@@ -223,8 +222,8 @@ typedef struct {
**/
UINT32
XhcPeiReadOpReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset
);
/**
@@ -237,9 +236,9 @@ XhcPeiReadOpReg (
**/
VOID
XhcPeiWriteOpReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -252,9 +251,9 @@ XhcPeiWriteOpReg (
**/
VOID
XhcPeiSetOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -267,9 +266,9 @@ XhcPeiSetOpRegBit (
**/
VOID
XhcPeiClearOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -288,14 +287,13 @@ XhcPeiClearOpRegBit (
**/
EFI_STATUS
XhcPeiWaitOpRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
);
-
/**
Write the data to the XHCI door bell register.
@@ -306,9 +304,9 @@ XhcPeiWaitOpRegBit (
**/
VOID
XhcPeiWriteDoorBellReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -322,8 +320,8 @@ XhcPeiWriteDoorBellReg (
**/
UINT32
XhcPeiReadRuntimeReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset
);
/**
@@ -336,9 +334,9 @@ XhcPeiReadRuntimeReg (
**/
VOID
XhcPeiWriteRuntimeReg (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Data
);
/**
@@ -351,9 +349,9 @@ XhcPeiWriteRuntimeReg (
**/
VOID
XhcPeiSetRuntimeRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -366,9 +364,9 @@ XhcPeiSetRuntimeRegBit (
**/
VOID
XhcPeiClearRuntimeRegBit (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
);
/**
@@ -382,7 +380,7 @@ XhcPeiClearRuntimeRegBit (
**/
BOOLEAN
XhcPeiIsHalt (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
);
/**
@@ -396,7 +394,7 @@ XhcPeiIsHalt (
**/
BOOLEAN
XhcPeiIsSysError (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
);
/**
@@ -411,8 +409,8 @@ XhcPeiIsSysError (
**/
EFI_STATUS
XhcPeiResetHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
);
/**
@@ -427,8 +425,8 @@ XhcPeiResetHC (
**/
EFI_STATUS
XhcPeiHaltHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
);
/**
@@ -443,8 +441,8 @@ XhcPeiHaltHC (
**/
EFI_STATUS
XhcPeiRunHC (
- IN PEI_XHC_DEV *Xhc,
- IN UINT32 Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT32 Timeout
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
index 1fc06aaa61..cc597a4371 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
@@ -19,25 +19,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
@return Created URB or NULL.
**/
-URB*
+URB *
XhcPeiCreateCmdTrb (
- IN PEI_XHC_DEV *Xhc,
- IN TRB_TEMPLATE *CmdTrb
+ IN PEI_XHC_DEV *Xhc,
+ IN TRB_TEMPLATE *CmdTrb
)
{
- URB *Urb;
+ URB *Urb;
Urb = AllocateZeroPool (sizeof (URB));
if (Urb == NULL) {
return NULL;
}
- Urb->Signature = XHC_URB_SIG;
+ Urb->Signature = XHC_URB_SIG;
- Urb->Ring = &Xhc->CmdRing;
+ Urb->Ring = &Xhc->CmdRing;
XhcPeiSyncTrsRing (Xhc, Urb->Ring);
- Urb->TrbNum = 1;
- Urb->TrbStart = Urb->Ring->RingEnqueue;
+ Urb->TrbNum = 1;
+ Urb->TrbStart = Urb->Ring->RingEnqueue;
CopyMem (Urb->TrbStart, CmdTrb, sizeof (TRB_TEMPLATE));
Urb->TrbStart->CycleBit = Urb->Ring->RingPCS & BIT0;
Urb->TrbEnd = Urb->TrbStart;
@@ -62,14 +62,14 @@ XhcPeiCreateCmdTrb (
**/
EFI_STATUS
XhcPeiCmdTransfer (
- IN PEI_XHC_DEV *Xhc,
- IN TRB_TEMPLATE *CmdTrb,
- IN UINTN Timeout,
- OUT TRB_TEMPLATE **EvtTrb
+ IN PEI_XHC_DEV *Xhc,
+ IN TRB_TEMPLATE *CmdTrb,
+ IN UINTN Timeout,
+ OUT TRB_TEMPLATE **EvtTrb
)
{
- EFI_STATUS Status;
- URB *Urb;
+ EFI_STATUS Status;
+ URB *Urb;
//
// Validate the parameters
@@ -126,24 +126,24 @@ ON_EXIT:
@return Created URB or NULL
**/
-URB*
+URB *
XhcPeiCreateUrb (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 BusAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 BusAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
)
{
- USB_ENDPOINT *Ep;
- EFI_STATUS Status;
- URB *Urb;
+ USB_ENDPOINT *Ep;
+ EFI_STATUS Status;
+ URB *Urb;
Urb = AllocateZeroPool (sizeof (URB));
if (Urb == NULL) {
@@ -154,7 +154,7 @@ XhcPeiCreateUrb (
Ep = &Urb->Ep;
Ep->BusAddr = BusAddr;
- Ep->EpAddr = (UINT8) (EpAddr & 0x0F);
+ Ep->EpAddr = (UINT8)(EpAddr & 0x0F);
Ep->Direction = ((EpAddr & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut;
Ep->DevSpeed = DevSpeed;
Ep->MaxPacket = MaxPacket;
@@ -185,8 +185,8 @@ XhcPeiCreateUrb (
**/
VOID
XhcPeiFreeUrb (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
)
{
if ((Xhc == NULL) || (Urb == NULL)) {
@@ -209,23 +209,23 @@ XhcPeiFreeUrb (
**/
EFI_STATUS
XhcPeiCreateTransferTrb (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
)
{
- VOID *OutputContext;
- TRANSFER_RING *EPRing;
- UINT8 EPType;
- UINT8 SlotId;
- UINT8 Dci;
- TRB *TrbStart;
- UINTN TotalLen;
- UINTN Len;
- UINTN TrbNum;
- EDKII_IOMMU_OPERATION MapOp;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *Map;
- EFI_STATUS Status;
+ VOID *OutputContext;
+ TRANSFER_RING *EPRing;
+ UINT8 EPType;
+ UINT8 SlotId;
+ UINT8 Dci;
+ TRB *TrbStart;
+ UINTN TotalLen;
+ UINTN Len;
+ UINTN TrbNum;
+ EDKII_IOMMU_OPERATION MapOp;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *Map;
+ EFI_STATUS Status;
SlotId = XhcPeiBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
@@ -238,27 +238,27 @@ XhcPeiCreateTransferTrb (
Urb->Completed = 0;
Urb->Result = EFI_USB_NOERROR;
- Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
- EPRing = (TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1];
- Urb->Ring = EPRing;
+ Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
+ EPRing = (TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1];
+ Urb->Ring = EPRing;
OutputContext = Xhc->UsbDevContext[SlotId].OutputContext;
if (Xhc->HcCParams.Data.Csz == 0) {
- EPType = (UINT8) ((DEVICE_CONTEXT *)OutputContext)->EP[Dci-1].EPType;
+ EPType = (UINT8)((DEVICE_CONTEXT *)OutputContext)->EP[Dci-1].EPType;
} else {
- EPType = (UINT8) ((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType;
+ EPType = (UINT8)((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType;
}
//
// No need to remap.
//
if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) {
- if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) {
+ if (((UINT8)(Urb->Ep.Direction)) == EfiUsbDataIn) {
MapOp = EdkiiIoMmuOperationBusMasterWrite;
} else {
MapOp = EdkiiIoMmuOperationBusMasterRead;
}
- Len = Urb->DataLen;
+ Len = Urb->DataLen;
Status = IoMmuMap (MapOp, Urb->Data, &Len, &PhyAddr, &Map);
if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
@@ -266,8 +266,8 @@ XhcPeiCreateTransferTrb (
return EFI_OUT_OF_RESOURCES;
}
- Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
- Urb->DataMap = Map;
+ Urb->DataPhy = (VOID *)((UINTN)PhyAddr);
+ Urb->DataMap = Map;
}
//
@@ -280,7 +280,7 @@ XhcPeiCreateTransferTrb (
//
// For control transfer, create SETUP_STAGE_TRB first.
//
- TrbStart = (TRB *) (UINTN) EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
TrbStart->TrbCtrSetup.bmRequestType = Urb->Request->RequestType;
TrbStart->TrbCtrSetup.bRequest = Urb->Request->Request;
TrbStart->TrbCtrSetup.wValue = Urb->Request->Value;
@@ -303,6 +303,7 @@ XhcPeiCreateTransferTrb (
} else {
TrbStart->TrbCtrSetup.TRT = 0;
}
+
//
// Update the cycle bit
//
@@ -314,10 +315,10 @@ XhcPeiCreateTransferTrb (
//
if (Urb->DataLen > 0) {
XhcPeiSyncTrsRing (Xhc, EPRing);
- TrbStart = (TRB *) (UINTN) EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
TrbStart->TrbCtrData.TRBPtrLo = XHC_LOW_32BIT (Urb->DataPhy);
TrbStart->TrbCtrData.TRBPtrHi = XHC_HIGH_32BIT (Urb->DataPhy);
- TrbStart->TrbCtrData.Length = (UINT32) Urb->DataLen;
+ TrbStart->TrbCtrData.Length = (UINT32)Urb->DataLen;
TrbStart->TrbCtrData.TDSize = 0;
TrbStart->TrbCtrData.IntTarget = 0;
TrbStart->TrbCtrData.ISP = 1;
@@ -332,18 +333,20 @@ XhcPeiCreateTransferTrb (
} else {
TrbStart->TrbCtrData.DIR = 0;
}
+
//
// Update the cycle bit
//
TrbStart->TrbCtrData.CycleBit = EPRing->RingPCS & BIT0;
Urb->TrbNum++;
}
+
//
// For control transfer, create STATUS_STAGE_TRB.
// Get the pointer to next TRB for status stage use
//
XhcPeiSyncTrsRing (Xhc, EPRing);
- TrbStart = (TRB *) (UINTN) EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
TrbStart->TrbCtrStatus.IntTarget = 0;
TrbStart->TrbCtrStatus.IOC = 1;
TrbStart->TrbCtrStatus.CH = 0;
@@ -355,6 +358,7 @@ XhcPeiCreateTransferTrb (
} else {
TrbStart->TrbCtrStatus.DIR = 0;
}
+
//
// Update the cycle bit
//
@@ -364,7 +368,7 @@ XhcPeiCreateTransferTrb (
//
XhcPeiSyncTrsRing (Xhc, EPRing);
Urb->TrbNum++;
- Urb->TrbEnd = (TRB_TEMPLATE *) (UINTN) TrbStart;
+ Urb->TrbEnd = (TRB_TEMPLATE *)(UINTN)TrbStart;
break;
@@ -373,17 +377,18 @@ XhcPeiCreateTransferTrb (
TotalLen = 0;
Len = 0;
TrbNum = 0;
- TrbStart = (TRB *) (UINTN) EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
while (TotalLen < Urb->DataLen) {
if ((TotalLen + 0x10000) >= Urb->DataLen) {
Len = Urb->DataLen - TotalLen;
} else {
Len = 0x10000;
}
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
- TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.Length = (UINT32) Len;
+
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.Length = (UINT32)Len;
TrbStart->TrbNormal.TDSize = 0;
TrbStart->TrbNormal.IntTarget = 0;
TrbStart->TrbNormal.ISP = 1;
@@ -408,17 +413,18 @@ XhcPeiCreateTransferTrb (
TotalLen = 0;
Len = 0;
TrbNum = 0;
- TrbStart = (TRB *) (UINTN) EPRing->RingEnqueue;
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
while (TotalLen < Urb->DataLen) {
if ((TotalLen + 0x10000) >= Urb->DataLen) {
Len = Urb->DataLen - TotalLen;
} else {
Len = 0x10000;
}
- TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
- TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT((UINT8 *) Urb->DataPhy + TotalLen);
- TrbStart->TrbNormal.Length = (UINT32) Len;
+
+ TrbStart = (TRB *)(UINTN)EPRing->RingEnqueue;
+ TrbStart->TrbNormal.TRBPtrLo = XHC_LOW_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT ((UINT8 *)Urb->DataPhy + TotalLen);
+ TrbStart->TrbNormal.Length = (UINT32)Len;
TrbStart->TrbNormal.TDSize = 0;
TrbStart->TrbNormal.IntTarget = 0;
TrbStart->TrbNormal.ISP = 1;
@@ -439,7 +445,7 @@ XhcPeiCreateTransferTrb (
break;
default:
- DEBUG ((DEBUG_INFO, "Not supported EPType 0x%x!\n",EPType));
+ DEBUG ((DEBUG_INFO, "Not supported EPType 0x%x!\n", EPType));
ASSERT (FALSE);
break;
}
@@ -463,20 +469,21 @@ XhcPeiCreateTransferTrb (
**/
EFI_STATUS
XhcPeiRecoverHaltedEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- UINT8 Dci;
- UINT8 SlotId;
+ EFI_STATUS Status;
+ UINT8 Dci;
+ UINT8 SlotId;
Status = EFI_SUCCESS;
SlotId = XhcPeiBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
- Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8) (Urb->Ep.Direction));
+
+ Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
DEBUG ((DEBUG_INFO, "XhcPeiRecoverHaltedEndpoint: Recovery Halted Slot = %x, Dci = %x\n", SlotId, Dci));
@@ -484,7 +491,7 @@ XhcPeiRecoverHaltedEndpoint (
// 1) Send Reset endpoint command to transit from halt to stop state
//
Status = XhcPeiResetEndpoint (Xhc, SlotId, Dci);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiRecoverHaltedEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
goto Done;
}
@@ -493,7 +500,7 @@ XhcPeiRecoverHaltedEndpoint (
// 2) Set dequeue pointer
//
Status = XhcPeiSetTrDequeuePointer (Xhc, SlotId, Dci, Urb);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiRecoverHaltedEndpoint: Set Dequeue Pointer Failed, Status = %r\n", Status));
goto Done;
}
@@ -522,20 +529,21 @@ Done:
**/
EFI_STATUS
XhcPeiDequeueTrbFromEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
)
{
- EFI_STATUS Status;
- UINT8 Dci;
- UINT8 SlotId;
+ EFI_STATUS Status;
+ UINT8 Dci;
+ UINT8 SlotId;
Status = EFI_SUCCESS;
SlotId = XhcPeiBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
- Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8) (Urb->Ep.Direction));
+
+ Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
DEBUG ((DEBUG_INFO, "XhcPeiDequeueTrbFromEndpoint: Stop Slot = %x, Dci = %x\n", SlotId, Dci));
@@ -543,7 +551,7 @@ XhcPeiDequeueTrbFromEndpoint (
// 1) Send Stop endpoint command to stop endpoint.
//
Status = XhcPeiStopEndpoint (Xhc, SlotId, Dci);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
goto Done;
}
@@ -552,7 +560,7 @@ XhcPeiDequeueTrbFromEndpoint (
// 2) Set dequeue pointer
//
Status = XhcPeiSetTrDequeuePointer (Xhc, SlotId, Dci, Urb);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiDequeueTrbFromEndpoint: Set Dequeue Pointer Failed, Status = %r\n", Status));
goto Done;
}
@@ -578,8 +586,8 @@ Done:
**/
BOOLEAN
XhcPeiIsTransferRingTrb (
- IN TRB_TEMPLATE *Trb,
- IN URB *Urb
+ IN TRB_TEMPLATE *Trb,
+ IN URB *Urb
)
{
TRB_TEMPLATE *CheckedTrb;
@@ -593,6 +601,7 @@ XhcPeiIsTransferRingTrb (
if (Trb == CheckedTrb) {
return TRUE;
}
+
CheckedTrb++;
}
@@ -611,20 +620,20 @@ XhcPeiIsTransferRingTrb (
**/
BOOLEAN
XhcPeiCheckUrbResult (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
)
{
- EVT_TRB_TRANSFER *EvtTrb;
- TRB_TEMPLATE *TRBPtr;
- UINTN Index;
- UINT8 TRBType;
- EFI_STATUS Status;
- URB *CheckedUrb;
- UINT64 XhcDequeue;
- UINT32 High;
- UINT32 Low;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EVT_TRB_TRANSFER *EvtTrb;
+ TRB_TEMPLATE *TRBPtr;
+ UINTN Index;
+ UINT8 TRBType;
+ EFI_STATUS Status;
+ URB *CheckedUrb;
+ UINT64 XhcDequeue;
+ UINT32 High;
+ UINT32 Low;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT ((Xhc != NULL) && (Urb != NULL));
@@ -646,7 +655,7 @@ XhcPeiCheckUrbResult (
//
XhcPeiSyncEventRing (Xhc, &Xhc->EventRing);
for (Index = 0; Index < Xhc->EventRing.TrbNumber; Index++) {
- Status = XhcPeiCheckNewEvent (Xhc, &Xhc->EventRing, ((TRB_TEMPLATE **) &EvtTrb));
+ Status = XhcPeiCheckNewEvent (Xhc, &Xhc->EventRing, ((TRB_TEMPLATE **)&EvtTrb));
if (Status == EFI_NOT_READY) {
//
// All new events are handled, return directly.
@@ -664,8 +673,8 @@ XhcPeiCheckUrbResult (
//
// Need convert pci device address to host address
//
- PhyAddr = (EFI_PHYSICAL_ADDRESS) (EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
- TRBPtr = (TRB_TEMPLATE *) (UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *) (UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64)EvtTrb->TRBPtrHi, 32));
+ TRBPtr = (TRB_TEMPLATE *)(UINTN)UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN)PhyAddr, sizeof (TRB_TEMPLATE));
//
// Update the status of Urb according to the finished event regardless of whether
@@ -710,11 +719,12 @@ XhcPeiCheckUrbResult (
DEBUG ((DEBUG_VERBOSE, "XhcPeiCheckUrbResult: short packet happens!\n"));
}
- TRBType = (UINT8) (TRBPtr->Type);
+ TRBType = (UINT8)(TRBPtr->Type);
if ((TRBType == TRB_TYPE_DATA_STAGE) ||
(TRBType == TRB_TYPE_NORMAL) ||
- (TRBType == TRB_TYPE_ISOCH)) {
- CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL*)TRBPtr)->Length - EvtTrb->Length);
+ (TRBType == TRB_TYPE_ISOCH))
+ {
+ CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL *)TRBPtr)->Length - EvtTrb->Length);
}
break;
@@ -739,7 +749,7 @@ XhcPeiCheckUrbResult (
if (CheckedUrb->StartDone && CheckedUrb->EndDone) {
CheckedUrb->Finished = TRUE;
- CheckedUrb->EvtTrb = (TRB_TEMPLATE *) EvtTrb;
+ CheckedUrb->EvtTrb = (TRB_TEMPLATE *)EvtTrb;
}
}
@@ -751,9 +761,9 @@ EXIT:
// Some 3rd party XHCI external cards don't support single 64-bytes width register access,
// So divide it to two 32-bytes width register access.
//
- Low = XhcPeiReadRuntimeReg (Xhc, XHC_ERDP_OFFSET);
- High = XhcPeiReadRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4);
- XhcDequeue = (UINT64) (LShiftU64((UINT64) High, 32) | Low);
+ Low = XhcPeiReadRuntimeReg (Xhc, XHC_ERDP_OFFSET);
+ High = XhcPeiReadRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4);
+ XhcDequeue = (UINT64)(LShiftU64 ((UINT64)High, 32) | Low);
PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->EventRing.EventRingDequeue, sizeof (TRB_TEMPLATE));
@@ -784,18 +794,18 @@ EXIT:
**/
EFI_STATUS
XhcPeiExecTransfer (
- IN PEI_XHC_DEV *Xhc,
- IN BOOLEAN CmdTransfer,
- IN URB *Urb,
- IN UINTN Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN BOOLEAN CmdTransfer,
+ IN URB *Urb,
+ IN UINTN Timeout
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINT64 Loop;
- UINT8 SlotId;
- UINT8 Dci;
- BOOLEAN Finished;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT64 Loop;
+ UINT8 SlotId;
+ UINT8 Dci;
+ BOOLEAN Finished;
if (CmdTransfer) {
SlotId = 0;
@@ -805,7 +815,8 @@ XhcPeiExecTransfer (
if (SlotId == 0) {
return EFI_DEVICE_ERROR;
}
- Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
+
+ Dci = XhcPeiEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
}
Status = EFI_SUCCESS;
@@ -821,6 +832,7 @@ XhcPeiExecTransfer (
if (Finished) {
break;
}
+
MicroSecondDelay (XHC_1_MICROSECOND);
}
@@ -828,7 +840,7 @@ XhcPeiExecTransfer (
Urb->Result = EFI_USB_ERR_TIMEOUT;
Status = EFI_TIMEOUT;
} else if (Urb->Result != EFI_USB_NOERROR) {
- Status = EFI_DEVICE_ERROR;
+ Status = EFI_DEVICE_ERROR;
}
return Status;
@@ -848,16 +860,16 @@ XhcPeiExecTransfer (
**/
EFI_STATUS
XhcPeiPollPortStatusChange (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT8 Port,
- IN EFI_USB_PORT_STATUS *PortState
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_STATUS *PortState
)
{
- EFI_STATUS Status;
- UINT8 Speed;
- UINT8 SlotId;
- USB_DEV_ROUTE RouteChart;
+ EFI_STATUS Status;
+ UINT8 Speed;
+ UINT8 SlotId;
+ USB_DEV_ROUTE RouteChart;
DEBUG ((DEBUG_INFO, "XhcPeiPollPortStatusChange: PortChangeStatus: %x PortStatus: %x\n", PortState->PortChangeStatus, PortState->PortStatus));
@@ -872,13 +884,14 @@ XhcPeiPollPortStatusChange (
RouteChart.Route.RootPortNum = Port + 1;
RouteChart.Route.TierNum = 1;
} else {
- if(Port < 14) {
+ if (Port < 14) {
RouteChart.Route.RouteString = ParentRouteChart.Route.RouteString | (Port << (4 * (ParentRouteChart.Route.TierNum - 1)));
} else {
RouteChart.Route.RouteString = ParentRouteChart.Route.RouteString | (15 << (4 * (ParentRouteChart.Route.TierNum - 1)));
}
- RouteChart.Route.RootPortNum = ParentRouteChart.Route.RootPortNum;
- RouteChart.Route.TierNum = ParentRouteChart.Route.TierNum + 1;
+
+ RouteChart.Route.RootPortNum = ParentRouteChart.Route.RootPortNum;
+ RouteChart.Route.TierNum = ParentRouteChart.Route.TierNum + 1;
}
SlotId = XhcPeiRouteStringToSlotId (Xhc, RouteChart);
@@ -891,7 +904,8 @@ XhcPeiPollPortStatusChange (
}
if (((PortState->PortStatus & USB_PORT_STAT_ENABLE) != 0) &&
- ((PortState->PortStatus & USB_PORT_STAT_CONNECTION) != 0)) {
+ ((PortState->PortStatus & USB_PORT_STAT_CONNECTION) != 0))
+ {
//
// Has a device attached, Identify device speed after port is enabled.
//
@@ -903,6 +917,7 @@ XhcPeiPollPortStatusChange (
} else if ((PortState->PortStatus & USB_PORT_STAT_SUPER_SPEED) != 0) {
Speed = EFI_USB_SPEED_SUPER;
}
+
//
// Execute Enable_Slot cmd for attached device, initialize device context and assign device address.
//
@@ -930,21 +945,22 @@ XhcPeiPollPortStatusChange (
**/
UINT8
XhcPeiEndpointToDci (
- IN UINT8 EpAddr,
- IN EFI_USB_DATA_DIRECTION Direction
+ IN UINT8 EpAddr,
+ IN EFI_USB_DATA_DIRECTION Direction
)
{
- UINT8 Index;
+ UINT8 Index;
ASSERT (EpAddr <= 15);
if (EpAddr == 0) {
return 1;
} else {
- Index = (UINT8) (2 * EpAddr);
+ Index = (UINT8)(2 * EpAddr);
if (Direction == EfiUsbDataIn) {
Index += 1;
}
+
return Index;
}
}
@@ -960,16 +976,17 @@ XhcPeiEndpointToDci (
**/
UINT8
XhcPeiBusDevAddrToSlotId (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 BusDevAddr
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 BusDevAddr
)
{
- UINT8 Index;
+ UINT8 Index;
for (Index = 0; Index < 255; Index++) {
if (Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
- (Xhc->UsbDevContext[Index + 1].BusDevAddr == BusDevAddr)) {
+ (Xhc->UsbDevContext[Index + 1].BusDevAddr == BusDevAddr))
+ {
break;
}
}
@@ -992,16 +1009,17 @@ XhcPeiBusDevAddrToSlotId (
**/
UINT8
XhcPeiRouteStringToSlotId (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE RouteString
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE RouteString
)
{
- UINT8 Index;
+ UINT8 Index;
for (Index = 0; Index < 255; Index++) {
if (Xhc->UsbDevContext[Index + 1].Enabled &&
(Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
- (Xhc->UsbDevContext[Index + 1].RouteString.Dword == RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].RouteString.Dword == RouteString.Dword))
+ {
break;
}
}
@@ -1023,9 +1041,9 @@ XhcPeiRouteStringToSlotId (
**/
VOID
XhcPeiRingDoorBell (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
)
{
if (SlotId == 0) {
@@ -1050,25 +1068,25 @@ XhcPeiRingDoorBell (
**/
EFI_STATUS
XhcPeiInitializeDeviceSlot (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT *InputContext;
- DEVICE_CONTEXT *OutputContext;
- TRANSFER_RING *EndpointTransferRing;
- CMD_TRB_ADDRESS_DEVICE CmdTrbAddr;
- UINT8 DeviceAddress;
- CMD_TRB_ENABLE_SLOT CmdTrb;
- UINT8 SlotId;
- UINT8 ParentSlotId;
- DEVICE_CONTEXT *ParentDeviceContext;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT *InputContext;
+ DEVICE_CONTEXT *OutputContext;
+ TRANSFER_RING *EndpointTransferRing;
+ CMD_TRB_ADDRESS_DEVICE CmdTrbAddr;
+ UINT8 DeviceAddress;
+ CMD_TRB_ENABLE_SLOT CmdTrb;
+ UINT8 SlotId;
+ UINT8 ParentSlotId;
+ DEVICE_CONTEXT *ParentDeviceContext;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ZeroMem (&CmdTrb, sizeof (CMD_TRB_ENABLE_SLOT));
CmdTrb.CycleBit = 1;
@@ -1076,17 +1094,18 @@ XhcPeiInitializeDeviceSlot (
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrb,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrb,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiInitializeDeviceSlot: Enable Slot Failed, Status = %r\n", Status));
return Status;
}
+
ASSERT (EvtTrb->SlotId <= Xhc->MaxSlotsEn);
DEBUG ((DEBUG_INFO, "XhcPeiInitializeDeviceSlot: Enable Slot Successfully, The Slot ID = 0x%x\n", EvtTrb->SlotId));
- SlotId = (UINT8) EvtTrb->SlotId;
+ SlotId = (UINT8)EvtTrb->SlotId;
ASSERT (SlotId != 0);
ZeroMem (&Xhc->UsbDevContext[SlotId], sizeof (USB_DEV_CONTEXT));
@@ -1101,10 +1120,10 @@ XhcPeiInitializeDeviceSlot (
//
InputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (INPUT_CONTEXT));
ASSERT (InputContext != NULL);
- ASSERT (((UINTN) InputContext & 0x3F) == 0);
+ ASSERT (((UINTN)InputContext & 0x3F) == 0);
ZeroMem (InputContext, sizeof (INPUT_CONTEXT));
- Xhc->UsbDevContext[SlotId].InputContext = (VOID *) InputContext;
+ Xhc->UsbDevContext[SlotId].InputContext = (VOID *)InputContext;
//
// 2) Initialize the Input Control Context (6.2.5.1) of the Input Context by setting the A0 and A1
@@ -1130,9 +1149,10 @@ XhcPeiInitializeDeviceSlot (
//
// If the Full/Low device attached to a High Speed Hub, init the TTPortNum and TTHubSlotId field of slot context
//
- ParentDeviceContext = (DEVICE_CONTEXT *) Xhc->UsbDevContext[ParentSlotId].OutputContext;
+ ParentDeviceContext = (DEVICE_CONTEXT *)Xhc->UsbDevContext[ParentSlotId].OutputContext;
if ((ParentDeviceContext->Slot.TTPortNum == 0) &&
- (ParentDeviceContext->Slot.TTHubSlotId == 0)) {
+ (ParentDeviceContext->Slot.TTHubSlotId == 0))
+ {
if ((ParentDeviceContext->Slot.Speed == (EFI_USB_SPEED_HIGH + 1)) && (DeviceSpeed < EFI_USB_SPEED_HIGH)) {
//
// Full/Low device attached to High speed hub port that isolates the high speed signaling
@@ -1159,9 +1179,9 @@ XhcPeiInitializeDeviceSlot (
//
// 4) Allocate and initialize the Transfer Ring for the Default Control Endpoint.
//
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[0] = EndpointTransferRing;
- XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
//
// 5) Initialize the Input default control Endpoint 0 Context (6.2.3).
//
@@ -1174,6 +1194,7 @@ XhcPeiInitializeDeviceSlot (
} else {
InputContext->EP[0].MaxPacketSize = 8;
}
+
//
// Initial value of Average TRB Length for Control endpoints would be 8B, Interrupt endpoints
// 1KB, and Bulk and Isoch endpoints 3KB.
@@ -1190,7 +1211,7 @@ XhcPeiInitializeDeviceSlot (
//
PhyAddr = UsbHcGetPciAddrForHostAddr (
Xhc->MemPool,
- ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[0])->RingSeg0,
+ ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
InputContext->EP[0].PtrLo = XHC_LOW_32BIT (PhyAddr) | BIT0;
@@ -1201,7 +1222,7 @@ XhcPeiInitializeDeviceSlot (
//
OutputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (DEVICE_CONTEXT));
ASSERT (OutputContext != NULL);
- ASSERT (((UINTN) OutputContext & 0x3F) == 0);
+ ASSERT (((UINTN)OutputContext & 0x3F) == 0);
ZeroMem (OutputContext, sizeof (DEVICE_CONTEXT));
Xhc->UsbDevContext[SlotId].OutputContext = OutputContext;
@@ -1213,7 +1234,7 @@ XhcPeiInitializeDeviceSlot (
//
// Fill DCBAA with PCI device address
//
- Xhc->DCBAA[SlotId] = (UINT64) (UINTN) PhyAddr;
+ Xhc->DCBAA[SlotId] = (UINT64)(UINTN)PhyAddr;
//
// 8) Issue an Address Device Command for the Device Slot, where the command points to the Input
@@ -1224,20 +1245,20 @@ XhcPeiInitializeDeviceSlot (
//
MicroSecondDelay (XHC_RESET_RECOVERY_DELAY);
ZeroMem (&CmdTrbAddr, sizeof (CmdTrbAddr));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT));
CmdTrbAddr.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbAddr.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbAddr.CycleBit = 1;
CmdTrbAddr.Type = TRB_TYPE_ADDRESS_DEV;
CmdTrbAddr.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbAddr,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbAddr,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (!EFI_ERROR (Status)) {
- DeviceAddress = (UINT8) OutputContext->Slot.DeviceAddress;
+ DeviceAddress = (UINT8)OutputContext->Slot.DeviceAddress;
DEBUG ((DEBUG_INFO, "XhcPeiInitializeDeviceSlot: Address %d assigned successfully\n", DeviceAddress));
Xhc->UsbDevContext[SlotId].XhciDevAddr = DeviceAddress;
}
@@ -1261,25 +1282,25 @@ XhcPeiInitializeDeviceSlot (
**/
EFI_STATUS
XhcPeiInitializeDeviceSlot64 (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT_64 *InputContext;
- DEVICE_CONTEXT_64 *OutputContext;
- TRANSFER_RING *EndpointTransferRing;
- CMD_TRB_ADDRESS_DEVICE CmdTrbAddr;
- UINT8 DeviceAddress;
- CMD_TRB_ENABLE_SLOT CmdTrb;
- UINT8 SlotId;
- UINT8 ParentSlotId;
- DEVICE_CONTEXT_64 *ParentDeviceContext;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT_64 *InputContext;
+ DEVICE_CONTEXT_64 *OutputContext;
+ TRANSFER_RING *EndpointTransferRing;
+ CMD_TRB_ADDRESS_DEVICE CmdTrbAddr;
+ UINT8 DeviceAddress;
+ CMD_TRB_ENABLE_SLOT CmdTrb;
+ UINT8 SlotId;
+ UINT8 ParentSlotId;
+ DEVICE_CONTEXT_64 *ParentDeviceContext;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ZeroMem (&CmdTrb, sizeof (CMD_TRB_ENABLE_SLOT));
CmdTrb.CycleBit = 1;
@@ -1287,14 +1308,15 @@ XhcPeiInitializeDeviceSlot64 (
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrb,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrb,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiInitializeDeviceSlot64: Enable Slot Failed, Status = %r\n", Status));
return Status;
}
+
ASSERT (EvtTrb->SlotId <= Xhc->MaxSlotsEn);
DEBUG ((DEBUG_INFO, "XhcPeiInitializeDeviceSlot64: Enable Slot Successfully, The Slot ID = 0x%x\n", EvtTrb->SlotId));
SlotId = (UINT8)EvtTrb->SlotId;
@@ -1312,10 +1334,10 @@ XhcPeiInitializeDeviceSlot64 (
//
InputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (INPUT_CONTEXT_64));
ASSERT (InputContext != NULL);
- ASSERT (((UINTN) InputContext & 0x3F) == 0);
+ ASSERT (((UINTN)InputContext & 0x3F) == 0);
ZeroMem (InputContext, sizeof (INPUT_CONTEXT_64));
- Xhc->UsbDevContext[SlotId].InputContext = (VOID *) InputContext;
+ Xhc->UsbDevContext[SlotId].InputContext = (VOID *)InputContext;
//
// 2) Initialize the Input Control Context (6.2.5.1) of the Input Context by setting the A0 and A1
@@ -1339,11 +1361,12 @@ XhcPeiInitializeDeviceSlot64 (
ParentSlotId = XhcPeiRouteStringToSlotId (Xhc, ParentRouteChart);
ASSERT (ParentSlotId != 0);
//
- //if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
+ // if the Full/Low device attached to a High Speed Hub, Init the TTPortNum and TTHubSlotId field of slot context
//
- ParentDeviceContext = (DEVICE_CONTEXT_64 *) Xhc->UsbDevContext[ParentSlotId].OutputContext;
+ ParentDeviceContext = (DEVICE_CONTEXT_64 *)Xhc->UsbDevContext[ParentSlotId].OutputContext;
if ((ParentDeviceContext->Slot.TTPortNum == 0) &&
- (ParentDeviceContext->Slot.TTHubSlotId == 0)) {
+ (ParentDeviceContext->Slot.TTHubSlotId == 0))
+ {
if ((ParentDeviceContext->Slot.Speed == (EFI_USB_SPEED_HIGH + 1)) && (DeviceSpeed < EFI_USB_SPEED_HIGH)) {
//
// Full/Low device attached to High speed hub port that isolates the high speed signaling
@@ -1370,9 +1393,9 @@ XhcPeiInitializeDeviceSlot64 (
//
// 4) Allocate and initialize the Transfer Ring for the Default Control Endpoint.
//
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[0] = EndpointTransferRing;
- XhcPeiCreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0]);
//
// 5) Initialize the Input default control Endpoint 0 Context (6.2.3).
//
@@ -1385,6 +1408,7 @@ XhcPeiInitializeDeviceSlot64 (
} else {
InputContext->EP[0].MaxPacketSize = 8;
}
+
//
// Initial value of Average TRB Length for Control endpoints would be 8B, Interrupt endpoints
// 1KB, and Bulk and Isoch endpoints 3KB.
@@ -1401,7 +1425,7 @@ XhcPeiInitializeDeviceSlot64 (
//
PhyAddr = UsbHcGetPciAddrForHostAddr (
Xhc->MemPool,
- ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[0])->RingSeg0,
+ ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[0])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
InputContext->EP[0].PtrLo = XHC_LOW_32BIT (PhyAddr) | BIT0;
@@ -1412,7 +1436,7 @@ XhcPeiInitializeDeviceSlot64 (
//
OutputContext = UsbHcAllocateMem (Xhc->MemPool, sizeof (DEVICE_CONTEXT_64));
ASSERT (OutputContext != NULL);
- ASSERT (((UINTN) OutputContext & 0x3F) == 0);
+ ASSERT (((UINTN)OutputContext & 0x3F) == 0);
ZeroMem (OutputContext, sizeof (DEVICE_CONTEXT_64));
Xhc->UsbDevContext[SlotId].OutputContext = OutputContext;
@@ -1424,7 +1448,7 @@ XhcPeiInitializeDeviceSlot64 (
//
// Fill DCBAA with PCI device address
//
- Xhc->DCBAA[SlotId] = (UINT64) (UINTN) PhyAddr;
+ Xhc->DCBAA[SlotId] = (UINT64)(UINTN)PhyAddr;
//
// 8) Issue an Address Device Command for the Device Slot, where the command points to the Input
@@ -1435,20 +1459,20 @@ XhcPeiInitializeDeviceSlot64 (
//
MicroSecondDelay (XHC_RESET_RECOVERY_DELAY);
ZeroMem (&CmdTrbAddr, sizeof (CmdTrbAddr));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->UsbDevContext[SlotId].InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbAddr.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbAddr.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbAddr.CycleBit = 1;
CmdTrbAddr.Type = TRB_TYPE_ADDRESS_DEV;
CmdTrbAddr.SlotId = Xhc->UsbDevContext[SlotId].SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbAddr,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbAddr,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (!EFI_ERROR (Status)) {
- DeviceAddress = (UINT8) OutputContext->Slot.DeviceAddress;
+ DeviceAddress = (UINT8)OutputContext->Slot.DeviceAddress;
DEBUG ((DEBUG_INFO, "XhcPeiInitializeDeviceSlot64: Address %d assigned successfully\n", DeviceAddress));
Xhc->UsbDevContext[SlotId].XhciDevAddr = DeviceAddress;
}
@@ -1457,7 +1481,6 @@ XhcPeiInitializeDeviceSlot64 (
return Status;
}
-
/**
Disable the specified device slot.
@@ -1469,8 +1492,8 @@ XhcPeiInitializeDeviceSlot64 (
**/
EFI_STATUS
XhcPeiDisableSlotCmd (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId
)
{
EFI_STATUS Status;
@@ -1486,7 +1509,8 @@ XhcPeiDisableSlotCmd (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
(Xhc->UsbDevContext[Index + 1].SlotId == 0) ||
- (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword))
+ {
continue;
}
@@ -1507,16 +1531,17 @@ XhcPeiDisableSlotCmd (
CmdTrbDisSlot.CycleBit = 1;
CmdTrbDisSlot.Type = TRB_TYPE_DIS_SLOT;
CmdTrbDisSlot.SlotId = SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbDisSlot,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbDisSlot,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiDisableSlotCmd: Disable Slot Command Failed, Status = %r\n", Status));
return Status;
}
+
//
// Free the slot's device context entry
//
@@ -1527,10 +1552,11 @@ XhcPeiDisableSlotCmd (
//
for (Index = 0; Index < 31; Index++) {
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] != NULL) {
- RingSeg = ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index])->RingSeg0;
+ RingSeg = ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index])->RingSeg0;
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] = NULL;
}
@@ -1549,6 +1575,7 @@ XhcPeiDisableSlotCmd (
if (Xhc->UsbDevContext[SlotId].OutputContext != NULL) {
UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT));
}
+
//
// Doesn't zero the entry because XhcAsyncInterruptTransfer() may be invoked to remove the established
// asynchronous interrupt pipe after the device is disabled. It needs the device address mapping info to
@@ -1572,8 +1599,8 @@ XhcPeiDisableSlotCmd (
**/
EFI_STATUS
XhcPeiDisableSlotCmd64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId
)
{
EFI_STATUS Status;
@@ -1589,7 +1616,8 @@ XhcPeiDisableSlotCmd64 (
for (Index = 0; Index < 255; Index++) {
if (!Xhc->UsbDevContext[Index + 1].Enabled ||
(Xhc->UsbDevContext[Index + 1].SlotId == 0) ||
- (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword)) {
+ (Xhc->UsbDevContext[Index + 1].ParentRouteString.Dword != Xhc->UsbDevContext[SlotId].RouteString.Dword))
+ {
continue;
}
@@ -1610,16 +1638,17 @@ XhcPeiDisableSlotCmd64 (
CmdTrbDisSlot.CycleBit = 1;
CmdTrbDisSlot.Type = TRB_TYPE_DIS_SLOT;
CmdTrbDisSlot.SlotId = SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbDisSlot,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbDisSlot,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiDisableSlotCmd64: Disable Slot Command Failed, Status = %r\n", Status));
return Status;
}
+
//
// Free the slot's device context entry
//
@@ -1630,10 +1659,11 @@ XhcPeiDisableSlotCmd64 (
//
for (Index = 0; Index < 31; Index++) {
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] != NULL) {
- RingSeg = ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index])->RingSeg0;
+ RingSeg = ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index])->RingSeg0;
if (RingSeg != NULL) {
UsbHcFreeMem (Xhc->MemPool, RingSeg, sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER);
}
+
FreePool (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index]);
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Index] = NULL;
}
@@ -1650,8 +1680,9 @@ XhcPeiDisableSlotCmd64 (
}
if (Xhc->UsbDevContext[SlotId].OutputContext != NULL) {
- UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT_64));
+ UsbHcFreeMem (Xhc->MemPool, Xhc->UsbDevContext[SlotId].OutputContext, sizeof (DEVICE_CONTEXT_64));
}
+
//
// Doesn't zero the entry because XhcAsyncInterruptTransfer() may be invoked to remove the established
// asynchronous interrupt pipe after the device is disabled. It needs the device address mapping info to
@@ -1677,30 +1708,31 @@ XhcPeiDisableSlotCmd64 (
**/
EFI_STATUS
XhcPeiSetConfigCmd (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINT8 Index;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- EFI_USB_DATA_DIRECTION Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINT8 Interval;
-
- TRANSFER_RING *EndpointTransferRing;
- CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
- INPUT_CONTEXT *InputContext;
- DEVICE_CONTEXT *OutputContext;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINT8 Index;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ EFI_USB_DATA_DIRECTION Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINT8 Interval;
+
+ TRANSFER_RING *EndpointTransferRing;
+ CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
+ INPUT_CONTEXT *InputContext;
+ DEVICE_CONTEXT *OutputContext;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+
//
// 4.6.6 Configure Endpoint
//
@@ -1713,22 +1745,22 @@ XhcPeiSetConfigCmd (
MaxDci = 0;
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) (ConfigDesc + 1);
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)(ConfigDesc + 1);
for (Index = 0; Index < ConfigDesc->NumInterfaces; Index++) {
while ((IfDesc->DescriptorType != USB_DESC_TYPE_INTERFACE) || (IfDesc->AlternateSetting != 0)) {
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) ((UINTN) IfDesc + IfDesc->Length);
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
NumEp = IfDesc->NumEndpoints;
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) (IfDesc + 1);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)(IfDesc + 1);
for (EpIndex = 0; EpIndex < NumEp; EpIndex++) {
while (EpDesc->DescriptorType != USB_DESC_TYPE_ENDPOINT) {
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) ((UINTN) EpDesc + EpDesc->Length);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
}
- EpAddr = (UINT8) (EpDesc->EndpointAddress & 0x0F);
- Direction = (UINT8) ((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
+ EpAddr = (UINT8)(EpDesc->EndpointAddress & 0x0F);
+ Direction = (UINT8)((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
Dci = XhcPeiEndpointToDci (EpAddr, Direction);
if (Dci > MaxDci) {
@@ -1759,9 +1791,9 @@ XhcPeiSetConfigCmd (
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
}
break;
@@ -1773,6 +1805,7 @@ XhcPeiSetConfigCmd (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
+
//
// Get the bInterval from descriptor and init the the interval field of endpoint context.
// Refer to XHCI 1.1 spec section 6.2.3.6.
@@ -1801,6 +1834,7 @@ XhcPeiSetConfigCmd (
InputContext->EP[Dci-1].CErr = 3;
InputContext->EP[Dci-1].EPType = ED_INTERRUPT_OUT;
}
+
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
InputContext->EP[Dci-1].MaxESITPayload = EpDesc->MaxPacketSize;
//
@@ -1812,7 +1846,7 @@ XhcPeiSetConfigCmd (
// Calculate through the bInterval field of Endpoint descriptor.
//
ASSERT (Interval != 0);
- InputContext->EP[Dci-1].Interval = (UINT32) HighBitSet32 ((UINT32) Interval) + 3;
+ InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32 ((UINT32)Interval) + 3;
} else if ((DeviceSpeed == EFI_USB_SPEED_HIGH) || (DeviceSpeed == EFI_USB_SPEED_SUPER)) {
Interval = EpDesc->Interval;
ASSERT (Interval >= 1 && Interval <= 16);
@@ -1823,10 +1857,11 @@ XhcPeiSetConfigCmd (
}
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
}
+
break;
case USB_ENDPOINT_CONTROL:
@@ -1842,17 +1877,18 @@ XhcPeiSetConfigCmd (
PhyAddr = UsbHcGetPciAddrForHostAddr (
Xhc->MemPool,
- ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
+ ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
- PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
- PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) ((UINTN) EpDesc + EpDesc->Length);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
}
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) ((UINTN) IfDesc + IfDesc->Length);
+
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
InputContext->InputControlContext.Dword2 |= BIT0;
@@ -1861,7 +1897,7 @@ XhcPeiSetConfigCmd (
// configure endpoint
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -1870,13 +1906,14 @@ XhcPeiSetConfigCmd (
DEBUG ((DEBUG_INFO, "XhcSetConfigCmd: Configure Endpoint\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSetConfigCmd: Config Endpoint Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -1893,30 +1930,31 @@ XhcPeiSetConfigCmd (
**/
EFI_STATUS
XhcPeiSetConfigCmd64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
)
{
- EFI_STATUS Status;
- USB_INTERFACE_DESCRIPTOR *IfDesc;
- USB_ENDPOINT_DESCRIPTOR *EpDesc;
- UINT8 Index;
- UINTN NumEp;
- UINTN EpIndex;
- UINT8 EpAddr;
- EFI_USB_DATA_DIRECTION Direction;
- UINT8 Dci;
- UINT8 MaxDci;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- UINT8 Interval;
-
- TRANSFER_RING *EndpointTransferRing;
- CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
- INPUT_CONTEXT_64 *InputContext;
- DEVICE_CONTEXT_64 *OutputContext;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ EFI_STATUS Status;
+ USB_INTERFACE_DESCRIPTOR *IfDesc;
+ USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ UINT8 Index;
+ UINTN NumEp;
+ UINTN EpIndex;
+ UINT8 EpAddr;
+ EFI_USB_DATA_DIRECTION Direction;
+ UINT8 Dci;
+ UINT8 MaxDci;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ UINT8 Interval;
+
+ TRANSFER_RING *EndpointTransferRing;
+ CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
+ INPUT_CONTEXT_64 *InputContext;
+ DEVICE_CONTEXT_64 *OutputContext;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+
//
// 4.6.6 Configure Endpoint
//
@@ -1929,22 +1967,22 @@ XhcPeiSetConfigCmd64 (
MaxDci = 0;
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) (ConfigDesc + 1);
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)(ConfigDesc + 1);
for (Index = 0; Index < ConfigDesc->NumInterfaces; Index++) {
while ((IfDesc->DescriptorType != USB_DESC_TYPE_INTERFACE) || (IfDesc->AlternateSetting != 0)) {
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) ((UINTN) IfDesc + IfDesc->Length);
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
NumEp = IfDesc->NumEndpoints;
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) (IfDesc + 1);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)(IfDesc + 1);
for (EpIndex = 0; EpIndex < NumEp; EpIndex++) {
while (EpDesc->DescriptorType != USB_DESC_TYPE_ENDPOINT) {
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) ((UINTN) EpDesc + EpDesc->Length);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
}
- EpAddr = (UINT8) (EpDesc->EndpointAddress & 0x0F);
- Direction = (UINT8) ((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
+ EpAddr = (UINT8)(EpDesc->EndpointAddress & 0x0F);
+ Direction = (UINT8)((EpDesc->EndpointAddress & 0x80) ? EfiUsbDataIn : EfiUsbDataOut);
Dci = XhcPeiEndpointToDci (EpAddr, Direction);
ASSERT (Dci < 32);
@@ -1976,9 +2014,9 @@ XhcPeiSetConfigCmd64 (
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
}
break;
@@ -1990,6 +2028,7 @@ XhcPeiSetConfigCmd64 (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
+
//
// Get the bInterval from descriptor and init the the interval field of endpoint context.
// Refer to XHCI 1.1 spec section 6.2.3.6.
@@ -2018,6 +2057,7 @@ XhcPeiSetConfigCmd64 (
InputContext->EP[Dci-1].CErr = 3;
InputContext->EP[Dci-1].EPType = ED_INTERRUPT_OUT;
}
+
InputContext->EP[Dci-1].AverageTRBLength = 0x1000;
InputContext->EP[Dci-1].MaxESITPayload = EpDesc->MaxPacketSize;
//
@@ -2029,7 +2069,7 @@ XhcPeiSetConfigCmd64 (
// Calculate through the bInterval field of Endpoint descriptor.
//
ASSERT (Interval != 0);
- InputContext->EP[Dci-1].Interval = (UINT32) HighBitSet32( (UINT32) Interval) + 3;
+ InputContext->EP[Dci-1].Interval = (UINT32)HighBitSet32 ((UINT32)Interval) + 3;
} else if ((DeviceSpeed == EFI_USB_SPEED_HIGH) || (DeviceSpeed == EFI_USB_SPEED_SUPER)) {
Interval = EpDesc->Interval;
ASSERT (Interval >= 1 && Interval <= 16);
@@ -2040,10 +2080,11 @@ XhcPeiSetConfigCmd64 (
}
if (Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] == NULL) {
- EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
- Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
- XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ EndpointTransferRing = AllocateZeroPool (sizeof (TRANSFER_RING));
+ Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *)EndpointTransferRing;
+ XhcPeiCreateTransferRing (Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
}
+
break;
case USB_ENDPOINT_CONTROL:
@@ -2059,19 +2100,20 @@ XhcPeiSetConfigCmd64 (
PhyAddr = UsbHcGetPciAddrForHostAddr (
Xhc->MemPool,
- ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
+ ((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
- PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *)(UINTN)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);
- EpDesc = (USB_ENDPOINT_DESCRIPTOR *) ((UINTN)EpDesc + EpDesc->Length);
+ EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
}
- IfDesc = (USB_INTERFACE_DESCRIPTOR *) ((UINTN)IfDesc + IfDesc->Length);
+
+ IfDesc = (USB_INTERFACE_DESCRIPTOR *)((UINTN)IfDesc + IfDesc->Length);
}
InputContext->InputControlContext.Dword2 |= BIT0;
@@ -2080,7 +2122,7 @@ XhcPeiSetConfigCmd64 (
// configure endpoint
//
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -2089,9 +2131,9 @@ XhcPeiSetConfigCmd64 (
DEBUG ((DEBUG_INFO, "XhcSetConfigCmd64: Configure Endpoint\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcSetConfigCmd64: Config Endpoint Failed, Status = %r\n", Status));
@@ -2100,7 +2142,6 @@ XhcPeiSetConfigCmd64 (
return Status;
}
-
/**
Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
@@ -2113,16 +2154,16 @@ XhcPeiSetConfigCmd64 (
**/
EFI_STATUS
XhcPeiEvaluateContext (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
)
{
- EFI_STATUS Status;
- CMD_TRB_EVALUATE_CONTEXT CmdTrbEvalu;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT *InputContext;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ CMD_TRB_EVALUATE_CONTEXT CmdTrbEvalu;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT *InputContext;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT (Xhc->UsbDevContext[SlotId].SlotId != 0);
@@ -2136,7 +2177,7 @@ XhcPeiEvaluateContext (
InputContext->EP[0].MaxPacketSize = MaxPacketSize;
ZeroMem (&CmdTrbEvalu, sizeof (CmdTrbEvalu));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbEvalu.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbEvalu.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbEvalu.CycleBit = 1;
@@ -2145,13 +2186,14 @@ XhcPeiEvaluateContext (
DEBUG ((DEBUG_INFO, "XhcEvaluateContext: Evaluate context\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbEvalu,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbEvalu,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcEvaluateContext: Evaluate Context Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -2167,16 +2209,16 @@ XhcPeiEvaluateContext (
**/
EFI_STATUS
XhcPeiEvaluateContext64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
)
{
- EFI_STATUS Status;
- CMD_TRB_EVALUATE_CONTEXT CmdTrbEvalu;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT_64 *InputContext;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ CMD_TRB_EVALUATE_CONTEXT CmdTrbEvalu;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT_64 *InputContext;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT (Xhc->UsbDevContext[SlotId].SlotId != 0);
@@ -2190,7 +2232,7 @@ XhcPeiEvaluateContext64 (
InputContext->EP[0].MaxPacketSize = MaxPacketSize;
ZeroMem (&CmdTrbEvalu, sizeof (CmdTrbEvalu));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbEvalu.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbEvalu.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbEvalu.CycleBit = 1;
@@ -2199,13 +2241,14 @@ XhcPeiEvaluateContext64 (
DEBUG ((DEBUG_INFO, "XhcEvaluateContext64: Evaluate context 64\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbEvalu,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbEvalu,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcEvaluateContext64: Evaluate Context Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -2223,19 +2266,19 @@ XhcPeiEvaluateContext64 (
**/
EFI_STATUS
XhcPeiConfigHubContext (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT *InputContext;
- DEVICE_CONTEXT *OutputContext;
- CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT *InputContext;
+ DEVICE_CONTEXT *OutputContext;
+ CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT (Xhc->UsbDevContext[SlotId].SlotId != 0);
InputContext = Xhc->UsbDevContext[SlotId].InputContext;
@@ -2251,14 +2294,14 @@ XhcPeiConfigHubContext (
//
// Copy the slot context from OutputContext to Input context
//
- CopyMem(&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT));
+ CopyMem (&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT));
InputContext->Slot.Hub = 1;
InputContext->Slot.PortNum = PortNum;
InputContext->Slot.TTT = TTT;
InputContext->Slot.MTT = MTT;
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -2267,13 +2310,14 @@ XhcPeiConfigHubContext (
DEBUG ((DEBUG_INFO, "Configure Hub Slot Context\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcConfigHubContext: Config Endpoint Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -2291,19 +2335,19 @@ XhcPeiConfigHubContext (
**/
EFI_STATUS
XhcPeiConfigHubContext64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- INPUT_CONTEXT_64 *InputContext;
- DEVICE_CONTEXT_64 *OutputContext;
- CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
- EFI_PHYSICAL_ADDRESS PhyAddr;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ INPUT_CONTEXT_64 *InputContext;
+ DEVICE_CONTEXT_64 *OutputContext;
+ CMD_TRB_CONFIG_ENDPOINT CmdTrbCfgEP;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
ASSERT (Xhc->UsbDevContext[SlotId].SlotId != 0);
InputContext = Xhc->UsbDevContext[SlotId].InputContext;
@@ -2319,14 +2363,14 @@ XhcPeiConfigHubContext64 (
//
// Copy the slot context from OutputContext to Input context
//
- CopyMem(&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT_64));
+ CopyMem (&(InputContext->Slot), &(OutputContext->Slot), sizeof (SLOT_CONTEXT_64));
InputContext->Slot.Hub = 1;
InputContext->Slot.PortNum = PortNum;
InputContext->Slot.TTT = TTT;
InputContext->Slot.MTT = MTT;
ZeroMem (&CmdTrbCfgEP, sizeof (CmdTrbCfgEP));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, InputContext, sizeof (INPUT_CONTEXT_64));
CmdTrbCfgEP.PtrLo = XHC_LOW_32BIT (PhyAddr);
CmdTrbCfgEP.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdTrbCfgEP.CycleBit = 1;
@@ -2335,13 +2379,14 @@ XhcPeiConfigHubContext64 (
DEBUG ((DEBUG_INFO, "Configure Hub Slot Context 64\n"));
Status = XhcPeiCmdTransfer (
Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbCfgEP,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbCfgEP,
XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcConfigHubContext64: Config Endpoint Failed, Status = %r\n", Status));
}
+
return Status;
}
@@ -2359,14 +2404,14 @@ XhcPeiConfigHubContext64 (
EFI_STATUS
EFIAPI
XhcPeiStopEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
)
{
- EFI_STATUS Status;
- EVT_TRB_COMMAND_COMPLETION *EvtTrb;
- CMD_TRB_STOP_ENDPOINT CmdTrbStopED;
+ EFI_STATUS Status;
+ EVT_TRB_COMMAND_COMPLETION *EvtTrb;
+ CMD_TRB_STOP_ENDPOINT CmdTrbStopED;
DEBUG ((DEBUG_INFO, "XhcPeiStopEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));
@@ -2378,13 +2423,13 @@ XhcPeiStopEndpoint (
CmdTrbStopED.Type = TRB_TYPE_STOP_ENDPOINT;
CmdTrbStopED.EDID = Dci;
CmdTrbStopED.SlotId = SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbStopED,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbStopED,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiStopEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
}
@@ -2405,9 +2450,9 @@ XhcPeiStopEndpoint (
EFI_STATUS
EFIAPI
XhcPeiResetEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
)
{
EFI_STATUS Status;
@@ -2424,13 +2469,13 @@ XhcPeiResetEndpoint (
CmdTrbResetED.Type = TRB_TYPE_RESET_ENDPOINT;
CmdTrbResetED.EDID = Dci;
CmdTrbResetED.SlotId = SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdTrbResetED,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiResetEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
}
@@ -2453,10 +2498,10 @@ XhcPeiResetEndpoint (
EFI_STATUS
EFIAPI
XhcPeiSetTrDequeuePointer (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *Urb
)
{
EFI_STATUS Status;
@@ -2470,20 +2515,20 @@ XhcPeiSetTrDequeuePointer (
// Send stop endpoint command to transit Endpoint from running to stop state
//
ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
CmdSetTRDeq.PtrLo = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;
CmdSetTRDeq.PtrHi = XHC_HIGH_32BIT (PhyAddr);
CmdSetTRDeq.CycleBit = 1;
CmdSetTRDeq.Type = TRB_TYPE_SET_TR_DEQUE;
CmdSetTRDeq.Endpoint = Dci;
CmdSetTRDeq.SlotId = SlotId;
- Status = XhcPeiCmdTransfer (
- Xhc,
- (TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,
- XHC_GENERIC_TIMEOUT,
- (TRB_TEMPLATE **) (UINTN) &EvtTrb
- );
- if (EFI_ERROR(Status)) {
+ Status = XhcPeiCmdTransfer (
+ Xhc,
+ (TRB_TEMPLATE *)(UINTN)&CmdSetTRDeq,
+ XHC_GENERIC_TIMEOUT,
+ (TRB_TEMPLATE **)(UINTN)&EvtTrb
+ );
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "XhcPeiSetTrDequeuePointer: Set TR Dequeue Pointer Failed, Status = %r\n", Status));
}
@@ -2503,9 +2548,9 @@ XhcPeiSetTrDequeuePointer (
**/
EFI_STATUS
XhcPeiCheckNewEvent (
- IN PEI_XHC_DEV *Xhc,
- IN EVENT_RING *EvtRing,
- OUT TRB_TEMPLATE **NewEvtTrb
+ IN PEI_XHC_DEV *Xhc,
+ IN EVENT_RING *EvtRing,
+ OUT TRB_TEMPLATE **NewEvtTrb
)
{
ASSERT (EvtRing != NULL);
@@ -2520,7 +2565,7 @@ XhcPeiCheckNewEvent (
//
// If the dequeue pointer is beyond the ring, then roll-back it to the begining of the ring.
//
- if ((UINTN) EvtRing->EventRingDequeue >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
+ if ((UINTN)EvtRing->EventRingDequeue >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
EvtRing->EventRingDequeue = EvtRing->EventRingSeg0;
}
@@ -2538,12 +2583,12 @@ XhcPeiCheckNewEvent (
**/
EFI_STATUS
XhcPeiSyncEventRing (
- IN PEI_XHC_DEV *Xhc,
- IN EVENT_RING *EvtRing
+ IN PEI_XHC_DEV *Xhc,
+ IN EVENT_RING *EvtRing
)
{
- UINTN Index;
- TRB_TEMPLATE *EvtTrb;
+ UINTN Index;
+ TRB_TEMPLATE *EvtTrb;
ASSERT (EvtRing != NULL);
@@ -2560,8 +2605,8 @@ XhcPeiSyncEventRing (
EvtTrb++;
- if ((UINTN) EvtTrb >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
- EvtTrb = EvtRing->EventRingSeg0;
+ if ((UINTN)EvtTrb >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
+ EvtTrb = EvtRing->EventRingSeg0;
EvtRing->EventRingCCS = (EvtRing->EventRingCCS) ? 0 : 1;
}
}
@@ -2584,11 +2629,11 @@ XhcPeiSyncEventRing (
**/
VOID
XhcPeiFreeEventRing (
- IN PEI_XHC_DEV *Xhc,
- IN EVENT_RING *EventRing
+ IN PEI_XHC_DEV *Xhc,
+ IN EVENT_RING *EventRing
)
{
- if(EventRing->EventRingSeg0 == NULL) {
+ if (EventRing->EventRingSeg0 == NULL) {
return;
}
@@ -2612,30 +2657,30 @@ XhcPeiFreeEventRing (
**/
VOID
XhcPeiCreateEventRing (
- IN PEI_XHC_DEV *Xhc,
- OUT EVENT_RING *EventRing
+ IN PEI_XHC_DEV *Xhc,
+ OUT EVENT_RING *EventRing
)
{
- VOID *Buf;
- EVENT_RING_SEG_TABLE_ENTRY *ERSTBase;
- UINTN Size;
- EFI_PHYSICAL_ADDRESS ERSTPhy;
- EFI_PHYSICAL_ADDRESS DequeuePhy;
+ VOID *Buf;
+ EVENT_RING_SEG_TABLE_ENTRY *ERSTBase;
+ UINTN Size;
+ EFI_PHYSICAL_ADDRESS ERSTPhy;
+ EFI_PHYSICAL_ADDRESS DequeuePhy;
ASSERT (EventRing != NULL);
Size = sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER;
- Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
+ Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, Size);
DequeuePhy = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, Size);
- EventRing->EventRingSeg0 = Buf;
- EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
- EventRing->EventRingDequeue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
- EventRing->EventRingEnqueue = (TRB_TEMPLATE *) EventRing->EventRingSeg0;
+ EventRing->EventRingSeg0 = Buf;
+ EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
+ EventRing->EventRingDequeue = (TRB_TEMPLATE *)EventRing->EventRingSeg0;
+ EventRing->EventRingEnqueue = (TRB_TEMPLATE *)EventRing->EventRingSeg0;
//
// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
@@ -2644,12 +2689,12 @@ XhcPeiCreateEventRing (
EventRing->EventRingCCS = 1;
Size = sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER;
- Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
+ Buf = UsbHcAllocateMem (Xhc->MemPool, Size);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, Size);
- ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *) Buf;
+ ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *)Buf;
EventRing->ERSTBase = ERSTBase;
ERSTBase->PtrLo = XHC_LOW_32BIT (DequeuePhy);
ERSTBase->PtrHi = XHC_HIGH_32BIT (DequeuePhy);
@@ -2674,12 +2719,12 @@ XhcPeiCreateEventRing (
XhcPeiWriteRuntimeReg (
Xhc,
XHC_ERDP_OFFSET,
- XHC_LOW_32BIT ((UINT64) (UINTN) DequeuePhy)
+ XHC_LOW_32BIT ((UINT64)(UINTN)DequeuePhy)
);
XhcPeiWriteRuntimeReg (
Xhc,
XHC_ERDP_OFFSET + 4,
- XHC_HIGH_32BIT ((UINT64) (UINTN) DequeuePhy)
+ XHC_HIGH_32BIT ((UINT64)(UINTN)DequeuePhy)
);
//
// Program the Interrupter Event Ring Segment Table Base Address (ERSTBA) register (5.5.2.3.2)
@@ -2690,12 +2735,12 @@ XhcPeiCreateEventRing (
XhcPeiWriteRuntimeReg (
Xhc,
XHC_ERSTBA_OFFSET,
- XHC_LOW_32BIT ((UINT64) (UINTN) ERSTPhy)
+ XHC_LOW_32BIT ((UINT64)(UINTN)ERSTPhy)
);
XhcPeiWriteRuntimeReg (
Xhc,
XHC_ERSTBA_OFFSET + 4,
- XHC_HIGH_32BIT ((UINT64) (UINTN) ERSTPhy)
+ XHC_HIGH_32BIT ((UINT64)(UINTN)ERSTPhy)
);
//
// Need set IMAN IE bit to enable the ring interrupt
@@ -2718,8 +2763,8 @@ XhcPeiSyncTrsRing (
IN TRANSFER_RING *TrsRing
)
{
- UINTN Index;
- TRB_TEMPLATE *TrsTrb;
+ UINTN Index;
+ TRB_TEMPLATE *TrsTrb;
ASSERT (TrsRing != NULL);
//
@@ -2732,18 +2777,19 @@ XhcPeiSyncTrsRing (
if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {
break;
}
+
TrsTrb++;
- if ((UINT8) TrsTrb->Type == TRB_TYPE_LINK) {
- ASSERT (((LINK_TRB *) TrsTrb)->TC != 0);
+ if ((UINT8)TrsTrb->Type == TRB_TYPE_LINK) {
+ ASSERT (((LINK_TRB *)TrsTrb)->TC != 0);
//
// set cycle bit in Link TRB as normal
//
- ((LINK_TRB*)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
+ ((LINK_TRB *)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
//
// Toggle PCS maintained by software
//
TrsRing->RingPCS = (TrsRing->RingPCS & BIT0) ? 0 : 1;
- TrsTrb = (TRB_TEMPLATE *) TrsRing->RingSeg0; // Use host address
+ TrsTrb = (TRB_TEMPLATE *)TrsRing->RingSeg0; // Use host address
}
}
@@ -2776,9 +2822,9 @@ XhcPeiSyncTrsRing (
**/
VOID
XhcPeiCreateTransferRing (
- IN PEI_XHC_DEV *Xhc,
- IN UINTN TrbNum,
- OUT TRANSFER_RING *TransferRing
+ IN PEI_XHC_DEV *Xhc,
+ IN UINTN TrbNum,
+ OUT TRANSFER_RING *TransferRing
)
{
VOID *Buf;
@@ -2787,28 +2833,28 @@ XhcPeiCreateTransferRing (
Buf = UsbHcAllocateMem (Xhc->MemPool, sizeof (TRB_TEMPLATE) * TrbNum);
ASSERT (Buf != NULL);
- ASSERT (((UINTN) Buf & 0x3F) == 0);
+ ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, sizeof (TRB_TEMPLATE) * TrbNum);
- TransferRing->RingSeg0 = Buf;
- TransferRing->TrbNumber = TrbNum;
- TransferRing->RingEnqueue = (TRB_TEMPLATE *) TransferRing->RingSeg0;
- TransferRing->RingDequeue = (TRB_TEMPLATE *) TransferRing->RingSeg0;
- TransferRing->RingPCS = 1;
+ TransferRing->RingSeg0 = Buf;
+ TransferRing->TrbNumber = TrbNum;
+ TransferRing->RingEnqueue = (TRB_TEMPLATE *)TransferRing->RingSeg0;
+ TransferRing->RingDequeue = (TRB_TEMPLATE *)TransferRing->RingSeg0;
+ TransferRing->RingPCS = 1;
//
// 4.9.2 Transfer Ring Management
// To form a ring (or circular queue) a Link TRB may be inserted at the end of a ring to
// point to the first TRB in the ring.
//
- EndTrb = (LINK_TRB *) ((UINTN) Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
+ EndTrb = (LINK_TRB *)((UINTN)Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
EndTrb->Type = TRB_TYPE_LINK;
- PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, sizeof (TRB_TEMPLATE) * TrbNum);
+ PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, sizeof (TRB_TEMPLATE) * TrbNum);
EndTrb->PtrLo = XHC_LOW_32BIT (PhyAddr);
EndTrb->PtrHi = XHC_HIGH_32BIT (PhyAddr);
//
// Toggle Cycle (TC). When set to '1', the xHC shall toggle its interpretation of the Cycle bit.
//
- EndTrb->TC = 1;
+ EndTrb->TC = 1;
//
// Set Cycle bit as other TRB PCS init value
//
@@ -2823,7 +2869,7 @@ XhcPeiCreateTransferRing (
**/
VOID
XhcPeiInitSched (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
)
{
VOID *Dcbaa;
@@ -2859,7 +2905,7 @@ XhcPeiInitSched (
// The Device Context Base Address Array shall contain MaxSlotsEn + 1 entries.
// Software shall set Device Context Base Address Array entries for unallocated Device Slots to '0'.
//
- Size = (Xhc->MaxSlotsEn + 1) * sizeof (UINT64);
+ Size = (Xhc->MaxSlotsEn + 1) * sizeof (UINT64);
Dcbaa = UsbHcAllocateMem (Xhc->MemPool, Size);
ASSERT (Dcbaa != NULL);
@@ -2887,13 +2933,13 @@ XhcPeiInitSched (
Xhc->ScratchEntry = ScratchEntry;
ScratchPhy = 0;
- Status = UsbHcAllocateAlignedPages (
- EFI_SIZE_TO_PAGES (MaxScratchpadBufs * sizeof (UINT64)),
- Xhc->PageSize,
- (VOID **) &ScratchBuf,
- &ScratchPhy,
- &Xhc->ScratchMap
- );
+ Status = UsbHcAllocateAlignedPages (
+ EFI_SIZE_TO_PAGES (MaxScratchpadBufs * sizeof (UINT64)),
+ Xhc->PageSize,
+ (VOID **)&ScratchBuf,
+ &ScratchPhy,
+ &Xhc->ScratchMap
+ );
ASSERT_EFI_ERROR (Status);
ZeroMem (ScratchBuf, MaxScratchpadBufs * sizeof (UINT64));
@@ -2904,32 +2950,33 @@ XhcPeiInitSched (
//
for (Index = 0; Index < MaxScratchpadBufs; Index++) {
ScratchEntryPhy = 0;
- Status = UsbHcAllocateAlignedPages (
- EFI_SIZE_TO_PAGES (Xhc->PageSize),
- Xhc->PageSize,
- (VOID **) &ScratchEntry[Index],
- &ScratchEntryPhy,
- (VOID **) &ScratchEntryMap[Index]
- );
+ Status = UsbHcAllocateAlignedPages (
+ EFI_SIZE_TO_PAGES (Xhc->PageSize),
+ Xhc->PageSize,
+ (VOID **)&ScratchEntry[Index],
+ &ScratchEntryPhy,
+ (VOID **)&ScratchEntryMap[Index]
+ );
ASSERT_EFI_ERROR (Status);
- ZeroMem ((VOID *) (UINTN) ScratchEntry[Index], Xhc->PageSize);
+ ZeroMem ((VOID *)(UINTN)ScratchEntry[Index], Xhc->PageSize);
//
// Fill with the PCI device address
//
*ScratchBuf++ = ScratchEntryPhy;
}
+
//
// The Scratchpad Buffer Array contains pointers to the Scratchpad Buffers. Entry 0 of the
// Device Context Base Address Array points to the Scratchpad Buffer Array.
//
- *(UINT64 *) Dcbaa = (UINT64) (UINTN) ScratchPhy;
+ *(UINT64 *)Dcbaa = (UINT64)(UINTN)ScratchPhy;
}
//
// Program the Device Context Base Address Array Pointer (DCBAAP) register (5.4.6) with
// a 64-bit address pointing to where the Device Context Base Address Array is located.
//
- Xhc->DCBAA = (UINT64 *) (UINTN) Dcbaa;
+ Xhc->DCBAA = (UINT64 *)(UINTN)Dcbaa;
//
// Some 3rd party XHCI external cards don't support single 64-bytes width register access,
// So divide it to two 32-bytes width register access.
@@ -2989,11 +3036,11 @@ XhcPeiInitSched (
**/
VOID
XhcPeiFreeSched (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
)
{
- UINT32 Index;
- UINT64 *ScratchEntry;
+ UINT32 Index;
+ UINT64 *ScratchEntry;
if (Xhc->ScratchBuf != NULL) {
ScratchEntry = Xhc->ScratchEntry;
@@ -3001,8 +3048,9 @@ XhcPeiFreeSched (
//
// Free Scratchpad Buffers
//
- UsbHcFreeAlignedPages ((VOID*) (UINTN) ScratchEntry[Index], EFI_SIZE_TO_PAGES (Xhc->PageSize), (VOID *) Xhc->ScratchEntryMap[Index]);
+ UsbHcFreeAlignedPages ((VOID *)(UINTN)ScratchEntry[Index], EFI_SIZE_TO_PAGES (Xhc->PageSize), (VOID *)Xhc->ScratchEntryMap[Index]);
}
+
//
// Free Scratchpad Buffer Array
//
@@ -3016,7 +3064,7 @@ XhcPeiFreeSched (
Xhc->CmdRing.RingSeg0 = NULL;
}
- XhcPeiFreeEventRing (Xhc,&Xhc->EventRing);
+ XhcPeiFreeEventRing (Xhc, &Xhc->EventRing);
if (Xhc->DCBAA != NULL) {
UsbHcFreeMem (Xhc->MemPool, Xhc->DCBAA, (Xhc->MaxSlotsEn + 1) * sizeof (UINT64));
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.h
index badc57a51b..bbe6232797 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.h
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.h
@@ -13,62 +13,62 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Transfer types, used in URB to identify the transfer type
//
-#define XHC_CTRL_TRANSFER 0x01
-#define XHC_BULK_TRANSFER 0x02
+#define XHC_CTRL_TRANSFER 0x01
+#define XHC_BULK_TRANSFER 0x02
//
// 6.4.6 TRB Types
//
-#define TRB_TYPE_NORMAL 1
-#define TRB_TYPE_SETUP_STAGE 2
-#define TRB_TYPE_DATA_STAGE 3
-#define TRB_TYPE_STATUS_STAGE 4
-#define TRB_TYPE_ISOCH 5
-#define TRB_TYPE_LINK 6
-#define TRB_TYPE_EVENT_DATA 7
-#define TRB_TYPE_NO_OP 8
-#define TRB_TYPE_EN_SLOT 9
-#define TRB_TYPE_DIS_SLOT 10
-#define TRB_TYPE_ADDRESS_DEV 11
-#define TRB_TYPE_CON_ENDPOINT 12
-#define TRB_TYPE_EVALU_CONTXT 13
-#define TRB_TYPE_RESET_ENDPOINT 14
-#define TRB_TYPE_STOP_ENDPOINT 15
-#define TRB_TYPE_SET_TR_DEQUE 16
-#define TRB_TYPE_RESET_DEV 17
-#define TRB_TYPE_GET_PORT_BANW 21
-#define TRB_TYPE_FORCE_HEADER 22
-#define TRB_TYPE_NO_OP_COMMAND 23
-#define TRB_TYPE_TRANS_EVENT 32
-#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
-#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
-#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
-#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
-#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
+#define TRB_TYPE_NORMAL 1
+#define TRB_TYPE_SETUP_STAGE 2
+#define TRB_TYPE_DATA_STAGE 3
+#define TRB_TYPE_STATUS_STAGE 4
+#define TRB_TYPE_ISOCH 5
+#define TRB_TYPE_LINK 6
+#define TRB_TYPE_EVENT_DATA 7
+#define TRB_TYPE_NO_OP 8
+#define TRB_TYPE_EN_SLOT 9
+#define TRB_TYPE_DIS_SLOT 10
+#define TRB_TYPE_ADDRESS_DEV 11
+#define TRB_TYPE_CON_ENDPOINT 12
+#define TRB_TYPE_EVALU_CONTXT 13
+#define TRB_TYPE_RESET_ENDPOINT 14
+#define TRB_TYPE_STOP_ENDPOINT 15
+#define TRB_TYPE_SET_TR_DEQUE 16
+#define TRB_TYPE_RESET_DEV 17
+#define TRB_TYPE_GET_PORT_BANW 21
+#define TRB_TYPE_FORCE_HEADER 22
+#define TRB_TYPE_NO_OP_COMMAND 23
+#define TRB_TYPE_TRANS_EVENT 32
+#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
+#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
+#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
+#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
+#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
//
// Endpoint Type (EP Type).
//
-#define ED_NOT_VALID 0
-#define ED_ISOCH_OUT 1
-#define ED_BULK_OUT 2
-#define ED_INTERRUPT_OUT 3
-#define ED_CONTROL_BIDIR 4
-#define ED_ISOCH_IN 5
-#define ED_BULK_IN 6
-#define ED_INTERRUPT_IN 7
+#define ED_NOT_VALID 0
+#define ED_ISOCH_OUT 1
+#define ED_BULK_OUT 2
+#define ED_INTERRUPT_OUT 3
+#define ED_CONTROL_BIDIR 4
+#define ED_ISOCH_IN 5
+#define ED_BULK_IN 6
+#define ED_INTERRUPT_IN 7
//
// 6.4.5 TRB Completion Codes
//
-#define TRB_COMPLETION_INVALID 0
-#define TRB_COMPLETION_SUCCESS 1
-#define TRB_COMPLETION_DATA_BUFFER_ERROR 2
-#define TRB_COMPLETION_BABBLE_ERROR 3
-#define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
-#define TRB_COMPLETION_TRB_ERROR 5
-#define TRB_COMPLETION_STALL_ERROR 6
-#define TRB_COMPLETION_SHORT_PACKET 13
+#define TRB_COMPLETION_INVALID 0
+#define TRB_COMPLETION_SUCCESS 1
+#define TRB_COMPLETION_DATA_BUFFER_ERROR 2
+#define TRB_COMPLETION_BABBLE_ERROR 3
+#define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
+#define TRB_COMPLETION_TRB_ERROR 5
+#define TRB_COMPLETION_STALL_ERROR 6
+#define TRB_COMPLETION_SHORT_PACKET 13
//
// The topology string used to present usb device location
@@ -77,23 +77,23 @@ typedef struct _USB_DEV_TOPOLOGY {
//
// The tier concatenation of down stream port.
//
- UINT32 RouteString:20;
+ UINT32 RouteString : 20;
//
// The root port number of the chain.
//
- UINT32 RootPortNum:8;
+ UINT32 RootPortNum : 8;
//
// The Tier the device reside.
//
- UINT32 TierNum:4;
+ UINT32 TierNum : 4;
} USB_DEV_TOPOLOGY;
//
// USB Device's RouteChart
//
typedef union _USB_DEV_ROUTE {
- UINT32 Dword;
- USB_DEV_TOPOLOGY Route;
+ UINT32 Dword;
+ USB_DEV_TOPOLOGY Route;
} USB_DEV_ROUTE;
//
@@ -118,74 +118,74 @@ typedef struct _USB_ENDPOINT {
// TRB Template
//
typedef struct _TRB_TEMPLATE {
- UINT32 Parameter1;
+ UINT32 Parameter1;
- UINT32 Parameter2;
+ UINT32 Parameter2;
- UINT32 Status;
+ UINT32 Status;
- UINT32 CycleBit:1;
- UINT32 RsvdZ1:9;
- UINT32 Type:6;
- UINT32 Control:16;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ1 : 9;
+ UINT32 Type : 6;
+ UINT32 Control : 16;
} TRB_TEMPLATE;
typedef struct _TRANSFER_RING {
- VOID *RingSeg0;
- UINTN TrbNumber;
- TRB_TEMPLATE *RingEnqueue;
- TRB_TEMPLATE *RingDequeue;
- UINT32 RingPCS;
+ VOID *RingSeg0;
+ UINTN TrbNumber;
+ TRB_TEMPLATE *RingEnqueue;
+ TRB_TEMPLATE *RingDequeue;
+ UINT32 RingPCS;
} TRANSFER_RING;
typedef struct _EVENT_RING {
- VOID *ERSTBase;
- VOID *EventRingSeg0;
- UINTN TrbNumber;
- TRB_TEMPLATE *EventRingEnqueue;
- TRB_TEMPLATE *EventRingDequeue;
- UINT32 EventRingCCS;
+ VOID *ERSTBase;
+ VOID *EventRingSeg0;
+ UINTN TrbNumber;
+ TRB_TEMPLATE *EventRingEnqueue;
+ TRB_TEMPLATE *EventRingDequeue;
+ UINT32 EventRingCCS;
} EVENT_RING;
-#define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
+#define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
//
// URB (Usb Request Block) contains information for all kinds of
// usb requests.
//
typedef struct _URB {
- UINT32 Signature;
+ UINT32 Signature;
//
// Usb Device URB related information
//
- USB_ENDPOINT Ep;
- EFI_USB_DEVICE_REQUEST *Request;
- VOID *Data;
- UINTN DataLen;
- VOID *DataPhy;
- VOID *DataMap;
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
- VOID *Context;
+ USB_ENDPOINT Ep;
+ EFI_USB_DEVICE_REQUEST *Request;
+ VOID *Data;
+ UINTN DataLen;
+ VOID *DataPhy;
+ VOID *DataMap;
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
+ VOID *Context;
//
// Execute result
//
- UINT32 Result;
+ UINT32 Result;
//
// completed data length
//
- UINTN Completed;
+ UINTN Completed;
//
// Command/Tranfer Ring info
//
- TRANSFER_RING *Ring;
- TRB_TEMPLATE *TrbStart;
- TRB_TEMPLATE *TrbEnd;
- UINTN TrbNum;
- BOOLEAN StartDone;
- BOOLEAN EndDone;
- BOOLEAN Finished;
-
- TRB_TEMPLATE *EvtTrb;
+ TRANSFER_RING *Ring;
+ TRB_TEMPLATE *TrbStart;
+ TRB_TEMPLATE *TrbEnd;
+ UINTN TrbNum;
+ BOOLEAN StartDone;
+ BOOLEAN EndDone;
+ BOOLEAN Finished;
+
+ TRB_TEMPLATE *EvtTrb;
} URB;
//
@@ -196,11 +196,11 @@ typedef struct _URB {
// is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
//
typedef struct _EVENT_RING_SEG_TABLE_ENTRY {
- UINT32 PtrLo;
- UINT32 PtrHi;
- UINT32 RingTrbSize:16;
- UINT32 RsvdZ1:16;
- UINT32 RsvdZ2;
+ UINT32 PtrLo;
+ UINT32 PtrHi;
+ UINT32 RingTrbSize : 16;
+ UINT32 RsvdZ1 : 16;
+ UINT32 RsvdZ2;
} EVENT_RING_SEG_TABLE_ENTRY;
//
@@ -210,25 +210,25 @@ typedef struct _EVENT_RING_SEG_TABLE_ENTRY {
// Rings, and to define the Data stage information for Control Transfer Rings.
//
typedef struct _TRANSFER_TRB_NORMAL {
- UINT32 TRBPtrLo;
-
- UINT32 TRBPtrHi;
-
- UINT32 Length:17;
- UINT32 TDSize:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 ISP:1;
- UINT32 NS:1;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ1:2;
- UINT32 BEI:1;
- UINT32 Type:6;
- UINT32 RsvdZ2:16;
+ UINT32 TRBPtrLo;
+
+ UINT32 TRBPtrHi;
+
+ UINT32 Length : 17;
+ UINT32 TDSize : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 ISP : 1;
+ UINT32 NS : 1;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ1 : 2;
+ UINT32 BEI : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ2 : 16;
} TRANSFER_TRB_NORMAL;
//
@@ -236,25 +236,25 @@ typedef struct _TRANSFER_TRB_NORMAL {
// A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
//
typedef struct _TRANSFER_TRB_CONTROL_SETUP {
- UINT32 bmRequestType:8;
- UINT32 bRequest:8;
- UINT32 wValue:16;
-
- UINT32 wIndex:16;
- UINT32 wLength:16;
-
- UINT32 Length:17;
- UINT32 RsvdZ1:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:4;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ3:3;
- UINT32 Type:6;
- UINT32 TRT:2;
- UINT32 RsvdZ4:14;
+ UINT32 bmRequestType : 8;
+ UINT32 bRequest : 8;
+ UINT32 wValue : 16;
+
+ UINT32 wIndex : 16;
+ UINT32 wLength : 16;
+
+ UINT32 Length : 17;
+ UINT32 RsvdZ1 : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 4;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ3 : 3;
+ UINT32 Type : 6;
+ UINT32 TRT : 2;
+ UINT32 RsvdZ4 : 14;
} TRANSFER_TRB_CONTROL_SETUP;
//
@@ -262,25 +262,25 @@ typedef struct _TRANSFER_TRB_CONTROL_SETUP {
// A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
//
typedef struct _TRANSFER_TRB_CONTROL_DATA {
- UINT32 TRBPtrLo;
-
- UINT32 TRBPtrHi;
-
- UINT32 Length:17;
- UINT32 TDSize:5;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 ISP:1;
- UINT32 NS:1;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 IDT:1;
- UINT32 RsvdZ1:3;
- UINT32 Type:6;
- UINT32 DIR:1;
- UINT32 RsvdZ2:15;
+ UINT32 TRBPtrLo;
+
+ UINT32 TRBPtrHi;
+
+ UINT32 Length : 17;
+ UINT32 TDSize : 5;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 ISP : 1;
+ UINT32 NS : 1;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 IDT : 1;
+ UINT32 RsvdZ1 : 3;
+ UINT32 Type : 6;
+ UINT32 DIR : 1;
+ UINT32 RsvdZ2 : 15;
} TRANSFER_TRB_CONTROL_DATA;
//
@@ -288,21 +288,21 @@ typedef struct _TRANSFER_TRB_CONTROL_DATA {
// A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
//
typedef struct _TRANSFER_TRB_CONTROL_STATUS {
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 RsvdZ3:22;
- UINT32 IntTarget:10;
-
- UINT32 CycleBit:1;
- UINT32 ENT:1;
- UINT32 RsvdZ4:2;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 RsvdZ5:4;
- UINT32 Type:6;
- UINT32 DIR:1;
- UINT32 RsvdZ6:15;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 RsvdZ3 : 22;
+ UINT32 IntTarget : 10;
+
+ UINT32 CycleBit : 1;
+ UINT32 ENT : 1;
+ UINT32 RsvdZ4 : 2;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 RsvdZ5 : 4;
+ UINT32 Type : 6;
+ UINT32 DIR : 1;
+ UINT32 RsvdZ6 : 15;
} TRANSFER_TRB_CONTROL_STATUS;
//
@@ -311,21 +311,21 @@ typedef struct _TRANSFER_TRB_CONTROL_STATUS {
// for more information on the use and operation of Transfer Events.
//
typedef struct _EVT_TRB_TRANSFER {
- UINT32 TRBPtrLo;
+ UINT32 TRBPtrLo;
- UINT32 TRBPtrHi;
+ UINT32 TRBPtrHi;
- UINT32 Length:24;
- UINT32 Completecode:8;
+ UINT32 Length : 24;
+ UINT32 Completecode : 8;
- UINT32 CycleBit:1;
- UINT32 RsvdZ1:1;
- UINT32 ED:1;
- UINT32 RsvdZ2:7;
- UINT32 Type:6;
- UINT32 EndpointId:5;
- UINT32 RsvdZ3:3;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ1 : 1;
+ UINT32 ED : 1;
+ UINT32 RsvdZ2 : 7;
+ UINT32 Type : 6;
+ UINT32 EndpointId : 5;
+ UINT32 RsvdZ3 : 3;
+ UINT32 SlotId : 8;
} EVT_TRB_TRANSFER;
//
@@ -334,26 +334,26 @@ typedef struct _EVT_TRB_TRANSFER {
// Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
//
typedef struct _EVT_TRB_COMMAND_COMPLETION {
- UINT32 TRBPtrLo;
+ UINT32 TRBPtrLo;
- UINT32 TRBPtrHi;
+ UINT32 TRBPtrHi;
- UINT32 RsvdZ2:24;
- UINT32 Completecode:8;
+ UINT32 RsvdZ2 : 24;
+ UINT32 Completecode : 8;
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 VFID:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 VFID : 8;
+ UINT32 SlotId : 8;
} EVT_TRB_COMMAND_COMPLETION;
typedef union _TRB {
- TRB_TEMPLATE TrbTemplate;
- TRANSFER_TRB_NORMAL TrbNormal;
- TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup;
- TRANSFER_TRB_CONTROL_DATA TrbCtrData;
- TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus;
+ TRB_TEMPLATE TrbTemplate;
+ TRANSFER_TRB_NORMAL TrbNormal;
+ TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup;
+ TRANSFER_TRB_CONTROL_DATA TrbCtrData;
+ TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus;
} TRB;
//
@@ -362,14 +362,14 @@ typedef union _TRB {
// mechanisms offered by the xHCI.
//
typedef struct _CMD_TRB_NO_OP {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} CMD_TRB_NO_OP;
//
@@ -378,14 +378,14 @@ typedef struct _CMD_TRB_NO_OP {
// selected slot to the host in a Command Completion Event.
//
typedef struct _CMD_TRB_ENABLE_SLOT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} CMD_TRB_ENABLE_SLOT;
//
@@ -394,15 +394,15 @@ typedef struct _CMD_TRB_ENABLE_SLOT {
// internal xHC resources assigned to the slot.
//
typedef struct _CMD_TRB_DISABLE_SLOT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 RsvdZ4:8;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_DISABLE_SLOT;
//
@@ -412,18 +412,18 @@ typedef struct _CMD_TRB_DISABLE_SLOT {
// issue a SET_ADDRESS request to the USB device.
//
typedef struct _CMD_TRB_ADDRESS_DEVICE {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:8;
- UINT32 BSR:1;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 8;
+ UINT32 BSR : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_ADDRESS_DEVICE;
//
@@ -432,18 +432,18 @@ typedef struct _CMD_TRB_ADDRESS_DEVICE {
// endpoints selected by the command.
//
typedef struct _CMD_TRB_CONFIG_ENDPOINT {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:8;
- UINT32 DC:1;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 8;
+ UINT32 DC : 1;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_CONFIG_ENDPOINT;
//
@@ -453,17 +453,17 @@ typedef struct _CMD_TRB_CONFIG_ENDPOINT {
// shall evaluate any changes
//
typedef struct _CMD_TRB_EVALUATE_CONTEXT {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1;
+ UINT32 RsvdZ1;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:9;
- UINT32 Type:6;
- UINT32 RsvdZ3:8;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 9;
+ UINT32 Type : 6;
+ UINT32 RsvdZ3 : 8;
+ UINT32 SlotId : 8;
} CMD_TRB_EVALUATE_CONTEXT;
//
@@ -471,17 +471,17 @@ typedef struct _CMD_TRB_EVALUATE_CONTEXT {
// The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
//
typedef struct _CMD_TRB_RESET_ENDPOINT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:8;
- UINT32 TSP:1;
- UINT32 Type:6;
- UINT32 EDID:5;
- UINT32 RsvdZ4:3;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 8;
+ UINT32 TSP : 1;
+ UINT32 Type : 6;
+ UINT32 EDID : 5;
+ UINT32 RsvdZ4 : 3;
+ UINT32 SlotId : 8;
} CMD_TRB_RESET_ENDPOINT;
//
@@ -490,17 +490,17 @@ typedef struct _CMD_TRB_RESET_ENDPOINT {
// Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
//
typedef struct _CMD_TRB_STOP_ENDPOINT {
- UINT32 RsvdZ0;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
-
- UINT32 CycleBit:1;
- UINT32 RsvdZ3:9;
- UINT32 Type:6;
- UINT32 EDID:5;
- UINT32 RsvdZ4:2;
- UINT32 SP:1;
- UINT32 SlotId:8;
+ UINT32 RsvdZ0;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ3 : 9;
+ UINT32 Type : 6;
+ UINT32 EDID : 5;
+ UINT32 RsvdZ4 : 2;
+ UINT32 SP : 1;
+ UINT32 SlotId : 8;
} CMD_TRB_STOP_ENDPOINT;
//
@@ -509,19 +509,19 @@ typedef struct _CMD_TRB_STOP_ENDPOINT {
// Pointer and DCS fields of an Endpoint or Stream Context.
//
typedef struct _CMD_SET_TR_DEQ_POINTER {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1:16;
- UINT32 StreamID:16;
+ UINT32 RsvdZ1 : 16;
+ UINT32 StreamID : 16;
- UINT32 CycleBit:1;
- UINT32 RsvdZ2:9;
- UINT32 Type:6;
- UINT32 Endpoint:5;
- UINT32 RsvdZ3:3;
- UINT32 SlotId:8;
+ UINT32 CycleBit : 1;
+ UINT32 RsvdZ2 : 9;
+ UINT32 Type : 6;
+ UINT32 Endpoint : 5;
+ UINT32 RsvdZ3 : 3;
+ UINT32 SlotId : 8;
} CMD_SET_TR_DEQ_POINTER;
//
@@ -529,226 +529,222 @@ typedef struct _CMD_SET_TR_DEQ_POINTER {
// A Link TRB provides support for non-contiguous TRB Rings.
//
typedef struct _LINK_TRB {
- UINT32 PtrLo;
+ UINT32 PtrLo;
- UINT32 PtrHi;
+ UINT32 PtrHi;
- UINT32 RsvdZ1:22;
- UINT32 InterTarget:10;
+ UINT32 RsvdZ1 : 22;
+ UINT32 InterTarget : 10;
- UINT32 CycleBit:1;
- UINT32 TC:1;
- UINT32 RsvdZ2:2;
- UINT32 CH:1;
- UINT32 IOC:1;
- UINT32 RsvdZ3:4;
- UINT32 Type:6;
- UINT32 RsvdZ4:16;
+ UINT32 CycleBit : 1;
+ UINT32 TC : 1;
+ UINT32 RsvdZ2 : 2;
+ UINT32 CH : 1;
+ UINT32 IOC : 1;
+ UINT32 RsvdZ3 : 4;
+ UINT32 Type : 6;
+ UINT32 RsvdZ4 : 16;
} LINK_TRB;
//
// 6.2.2 Slot Context
//
typedef struct _SLOT_CONTEXT {
- UINT32 RouteString:20;
- UINT32 Speed:4;
- UINT32 RsvdZ1:1;
- UINT32 MTT:1;
- UINT32 Hub:1;
- UINT32 ContextEntries:5;
-
- UINT32 MaxExitLatency:16;
- UINT32 RootHubPortNum:8;
- UINT32 PortNum:8;
-
- UINT32 TTHubSlotId:8;
- UINT32 TTPortNum:8;
- UINT32 TTT:2;
- UINT32 RsvdZ2:4;
- UINT32 InterTarget:10;
-
- UINT32 DeviceAddress:8;
- UINT32 RsvdZ3:19;
- UINT32 SlotState:5;
-
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
+ UINT32 RouteString : 20;
+ UINT32 Speed : 4;
+ UINT32 RsvdZ1 : 1;
+ UINT32 MTT : 1;
+ UINT32 Hub : 1;
+ UINT32 ContextEntries : 5;
+
+ UINT32 MaxExitLatency : 16;
+ UINT32 RootHubPortNum : 8;
+ UINT32 PortNum : 8;
+
+ UINT32 TTHubSlotId : 8;
+ UINT32 TTPortNum : 8;
+ UINT32 TTT : 2;
+ UINT32 RsvdZ2 : 4;
+ UINT32 InterTarget : 10;
+
+ UINT32 DeviceAddress : 8;
+ UINT32 RsvdZ3 : 19;
+ UINT32 SlotState : 5;
+
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
} SLOT_CONTEXT;
typedef struct _SLOT_CONTEXT_64 {
- UINT32 RouteString:20;
- UINT32 Speed:4;
- UINT32 RsvdZ1:1;
- UINT32 MTT:1;
- UINT32 Hub:1;
- UINT32 ContextEntries:5;
-
- UINT32 MaxExitLatency:16;
- UINT32 RootHubPortNum:8;
- UINT32 PortNum:8;
-
- UINT32 TTHubSlotId:8;
- UINT32 TTPortNum:8;
- UINT32 TTT:2;
- UINT32 RsvdZ2:4;
- UINT32 InterTarget:10;
-
- UINT32 DeviceAddress:8;
- UINT32 RsvdZ3:19;
- UINT32 SlotState:5;
-
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
-
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
-
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
- UINT32 RsvdZ15;
-
+ UINT32 RouteString : 20;
+ UINT32 Speed : 4;
+ UINT32 RsvdZ1 : 1;
+ UINT32 MTT : 1;
+ UINT32 Hub : 1;
+ UINT32 ContextEntries : 5;
+
+ UINT32 MaxExitLatency : 16;
+ UINT32 RootHubPortNum : 8;
+ UINT32 PortNum : 8;
+
+ UINT32 TTHubSlotId : 8;
+ UINT32 TTPortNum : 8;
+ UINT32 TTT : 2;
+ UINT32 RsvdZ2 : 4;
+ UINT32 InterTarget : 10;
+
+ UINT32 DeviceAddress : 8;
+ UINT32 RsvdZ3 : 19;
+ UINT32 SlotState : 5;
+
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
+ UINT32 RsvdZ15;
} SLOT_CONTEXT_64;
-
//
// 6.2.3 Endpoint Context
//
typedef struct _ENDPOINT_CONTEXT {
- UINT32 EPState:3;
- UINT32 RsvdZ1:5;
- UINT32 Mult:2;
- UINT32 MaxPStreams:5;
- UINT32 LSA:1;
- UINT32 Interval:8;
- UINT32 RsvdZ2:8;
-
- UINT32 RsvdZ3:1;
- UINT32 CErr:2;
- UINT32 EPType:3;
- UINT32 RsvdZ4:1;
- UINT32 HID:1;
- UINT32 MaxBurstSize:8;
- UINT32 MaxPacketSize:16;
-
- UINT32 PtrLo;
-
- UINT32 PtrHi;
-
- UINT32 AverageTRBLength:16;
- UINT32 MaxESITPayload:16;
-
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
+ UINT32 EPState : 3;
+ UINT32 RsvdZ1 : 5;
+ UINT32 Mult : 2;
+ UINT32 MaxPStreams : 5;
+ UINT32 LSA : 1;
+ UINT32 Interval : 8;
+ UINT32 RsvdZ2 : 8;
+
+ UINT32 RsvdZ3 : 1;
+ UINT32 CErr : 2;
+ UINT32 EPType : 3;
+ UINT32 RsvdZ4 : 1;
+ UINT32 HID : 1;
+ UINT32 MaxBurstSize : 8;
+ UINT32 MaxPacketSize : 16;
+
+ UINT32 PtrLo;
+
+ UINT32 PtrHi;
+
+ UINT32 AverageTRBLength : 16;
+ UINT32 MaxESITPayload : 16;
+
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
} ENDPOINT_CONTEXT;
typedef struct _ENDPOINT_CONTEXT_64 {
- UINT32 EPState:3;
- UINT32 RsvdZ1:5;
- UINT32 Mult:2;
- UINT32 MaxPStreams:5;
- UINT32 LSA:1;
- UINT32 Interval:8;
- UINT32 RsvdZ2:8;
-
- UINT32 RsvdZ3:1;
- UINT32 CErr:2;
- UINT32 EPType:3;
- UINT32 RsvdZ4:1;
- UINT32 HID:1;
- UINT32 MaxBurstSize:8;
- UINT32 MaxPacketSize:16;
-
- UINT32 PtrLo;
-
- UINT32 PtrHi;
-
- UINT32 AverageTRBLength:16;
- UINT32 MaxESITPayload:16;
-
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
-
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
-
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
- UINT32 RsvdZ15;
-
+ UINT32 EPState : 3;
+ UINT32 RsvdZ1 : 5;
+ UINT32 Mult : 2;
+ UINT32 MaxPStreams : 5;
+ UINT32 LSA : 1;
+ UINT32 Interval : 8;
+ UINT32 RsvdZ2 : 8;
+
+ UINT32 RsvdZ3 : 1;
+ UINT32 CErr : 2;
+ UINT32 EPType : 3;
+ UINT32 RsvdZ4 : 1;
+ UINT32 HID : 1;
+ UINT32 MaxBurstSize : 8;
+ UINT32 MaxPacketSize : 16;
+
+ UINT32 PtrLo;
+
+ UINT32 PtrHi;
+
+ UINT32 AverageTRBLength : 16;
+ UINT32 MaxESITPayload : 16;
+
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
+ UINT32 RsvdZ15;
} ENDPOINT_CONTEXT_64;
-
//
// 6.2.5.1 Input Control Context
//
typedef struct _INPUT_CONTRL_CONTEXT {
- UINT32 Dword1;
- UINT32 Dword2;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
- UINT32 RsvdZ3;
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
+ UINT32 Dword1;
+ UINT32 Dword2;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+ UINT32 RsvdZ3;
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
} INPUT_CONTRL_CONTEXT;
typedef struct _INPUT_CONTRL_CONTEXT_64 {
- UINT32 Dword1;
- UINT32 Dword2;
- UINT32 RsvdZ1;
- UINT32 RsvdZ2;
- UINT32 RsvdZ3;
- UINT32 RsvdZ4;
- UINT32 RsvdZ5;
- UINT32 RsvdZ6;
- UINT32 RsvdZ7;
- UINT32 RsvdZ8;
- UINT32 RsvdZ9;
- UINT32 RsvdZ10;
- UINT32 RsvdZ11;
- UINT32 RsvdZ12;
- UINT32 RsvdZ13;
- UINT32 RsvdZ14;
+ UINT32 Dword1;
+ UINT32 Dword2;
+ UINT32 RsvdZ1;
+ UINT32 RsvdZ2;
+ UINT32 RsvdZ3;
+ UINT32 RsvdZ4;
+ UINT32 RsvdZ5;
+ UINT32 RsvdZ6;
+ UINT32 RsvdZ7;
+ UINT32 RsvdZ8;
+ UINT32 RsvdZ9;
+ UINT32 RsvdZ10;
+ UINT32 RsvdZ11;
+ UINT32 RsvdZ12;
+ UINT32 RsvdZ13;
+ UINT32 RsvdZ14;
} INPUT_CONTRL_CONTEXT_64;
//
// 6.2.1 Device Context
//
typedef struct _DEVICE_CONTEXT {
- SLOT_CONTEXT Slot;
- ENDPOINT_CONTEXT EP[31];
+ SLOT_CONTEXT Slot;
+ ENDPOINT_CONTEXT EP[31];
} DEVICE_CONTEXT;
typedef struct _DEVICE_CONTEXT_64 {
- SLOT_CONTEXT_64 Slot;
- ENDPOINT_CONTEXT_64 EP[31];
+ SLOT_CONTEXT_64 Slot;
+ ENDPOINT_CONTEXT_64 EP[31];
} DEVICE_CONTEXT_64;
//
// 6.2.5 Input Context
//
typedef struct _INPUT_CONTEXT {
- INPUT_CONTRL_CONTEXT InputControlContext;
- SLOT_CONTEXT Slot;
- ENDPOINT_CONTEXT EP[31];
+ INPUT_CONTRL_CONTEXT InputControlContext;
+ SLOT_CONTEXT Slot;
+ ENDPOINT_CONTEXT EP[31];
} INPUT_CONTEXT;
typedef struct _INPUT_CONTEXT_64 {
- INPUT_CONTRL_CONTEXT_64 InputControlContext;
- SLOT_CONTEXT_64 Slot;
- ENDPOINT_CONTEXT_64 EP[31];
+ INPUT_CONTRL_CONTEXT_64 InputControlContext;
+ SLOT_CONTEXT_64 Slot;
+ ENDPOINT_CONTEXT_64 EP[31];
} INPUT_CONTEXT_64;
/**
@@ -766,10 +762,10 @@ typedef struct _INPUT_CONTEXT_64 {
**/
EFI_STATUS
XhcPeiExecTransfer (
- IN PEI_XHC_DEV *Xhc,
- IN BOOLEAN CmdTransfer,
- IN URB *Urb,
- IN UINTN Timeout
+ IN PEI_XHC_DEV *Xhc,
+ IN BOOLEAN CmdTransfer,
+ IN URB *Urb,
+ IN UINTN Timeout
);
/**
@@ -783,8 +779,8 @@ XhcPeiExecTransfer (
**/
UINT8
XhcPeiBusDevAddrToSlotId (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 BusDevAddr
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 BusDevAddr
);
/**
@@ -798,8 +794,8 @@ XhcPeiBusDevAddrToSlotId (
**/
UINT8
XhcPeiRouteStringToSlotId (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE RouteString
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE RouteString
);
/**
@@ -813,8 +809,8 @@ XhcPeiRouteStringToSlotId (
**/
UINT8
XhcPeiEndpointToDci (
- IN UINT8 EpAddr,
- IN EFI_USB_DATA_DIRECTION Direction
+ IN UINT8 EpAddr,
+ IN EFI_USB_DATA_DIRECTION Direction
);
/**
@@ -827,9 +823,9 @@ XhcPeiEndpointToDci (
**/
VOID
XhcPeiRingDoorBell (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
);
/**
@@ -846,10 +842,10 @@ XhcPeiRingDoorBell (
**/
EFI_STATUS
XhcPeiPollPortStatusChange (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT8 Port,
- IN EFI_USB_PORT_STATUS *PortState
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_STATUS *PortState
);
/**
@@ -866,11 +862,11 @@ XhcPeiPollPortStatusChange (
**/
EFI_STATUS
XhcPeiConfigHubContext (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
);
/**
@@ -887,11 +883,11 @@ XhcPeiConfigHubContext (
**/
EFI_STATUS
XhcPeiConfigHubContext64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 PortNum,
- IN UINT8 TTT,
- IN UINT8 MTT
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 PortNum,
+ IN UINT8 TTT,
+ IN UINT8 MTT
);
/**
@@ -907,10 +903,10 @@ XhcPeiConfigHubContext64 (
**/
EFI_STATUS
XhcPeiSetConfigCmd (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
);
/**
@@ -926,10 +922,10 @@ XhcPeiSetConfigCmd (
**/
EFI_STATUS
XhcPeiSetConfigCmd64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 DeviceSpeed,
- IN USB_CONFIG_DESCRIPTOR *ConfigDesc
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 DeviceSpeed,
+ IN USB_CONFIG_DESCRIPTOR *ConfigDesc
);
/**
@@ -946,9 +942,9 @@ XhcPeiSetConfigCmd64 (
EFI_STATUS
EFIAPI
XhcPeiStopEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
);
/**
@@ -965,9 +961,9 @@ XhcPeiStopEndpoint (
EFI_STATUS
EFIAPI
XhcPeiResetEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci
);
/**
@@ -986,10 +982,10 @@ XhcPeiResetEndpoint (
EFI_STATUS
EFIAPI
XhcPeiSetTrDequeuePointer (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT8 Dci,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT8 Dci,
+ IN URB *Urb
);
/**
@@ -1007,11 +1003,11 @@ XhcPeiSetTrDequeuePointer (
**/
EFI_STATUS
XhcPeiInitializeDeviceSlot (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
);
/**
@@ -1029,11 +1025,11 @@ XhcPeiInitializeDeviceSlot (
**/
EFI_STATUS
XhcPeiInitializeDeviceSlot64 (
- IN PEI_XHC_DEV *Xhc,
- IN USB_DEV_ROUTE ParentRouteChart,
- IN UINT16 ParentPort,
- IN USB_DEV_ROUTE RouteChart,
- IN UINT8 DeviceSpeed
+ IN PEI_XHC_DEV *Xhc,
+ IN USB_DEV_ROUTE ParentRouteChart,
+ IN UINT16 ParentPort,
+ IN USB_DEV_ROUTE RouteChart,
+ IN UINT8 DeviceSpeed
);
/**
@@ -1048,9 +1044,9 @@ XhcPeiInitializeDeviceSlot64 (
**/
EFI_STATUS
XhcPeiEvaluateContext (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
);
/**
@@ -1065,9 +1061,9 @@ XhcPeiEvaluateContext (
**/
EFI_STATUS
XhcPeiEvaluateContext64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId,
- IN UINT32 MaxPacketSize
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId,
+ IN UINT32 MaxPacketSize
);
/**
@@ -1081,8 +1077,8 @@ XhcPeiEvaluateContext64 (
**/
EFI_STATUS
XhcPeiDisableSlotCmd (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId
);
/**
@@ -1096,8 +1092,8 @@ XhcPeiDisableSlotCmd (
**/
EFI_STATUS
XhcPeiDisableSlotCmd64 (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 SlotId
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 SlotId
);
/**
@@ -1116,8 +1112,8 @@ XhcPeiDisableSlotCmd64 (
**/
EFI_STATUS
XhcPeiRecoverHaltedEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
);
/**
@@ -1135,8 +1131,8 @@ XhcPeiRecoverHaltedEndpoint (
**/
EFI_STATUS
XhcPeiDequeueTrbFromEndpoint (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
);
/**
@@ -1157,19 +1153,19 @@ XhcPeiDequeueTrbFromEndpoint (
@return Created URB or NULL
**/
-URB*
+URB *
XhcPeiCreateUrb (
- IN PEI_XHC_DEV *Xhc,
- IN UINT8 DevAddr,
- IN UINT8 EpAddr,
- IN UINT8 DevSpeed,
- IN UINTN MaxPacket,
- IN UINTN Type,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN VOID *Data,
- IN UINTN DataLen,
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
- IN VOID *Context
+ IN PEI_XHC_DEV *Xhc,
+ IN UINT8 DevAddr,
+ IN UINT8 EpAddr,
+ IN UINT8 DevSpeed,
+ IN UINTN MaxPacket,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN VOID *Data,
+ IN UINTN DataLen,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
+ IN VOID *Context
);
/**
@@ -1181,8 +1177,8 @@ XhcPeiCreateUrb (
**/
VOID
XhcPeiFreeUrb (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
);
/**
@@ -1196,8 +1192,8 @@ XhcPeiFreeUrb (
**/
EFI_STATUS
XhcPeiCreateTransferTrb (
- IN PEI_XHC_DEV *Xhc,
- IN URB *Urb
+ IN PEI_XHC_DEV *Xhc,
+ IN URB *Urb
);
/**
@@ -1225,9 +1221,9 @@ XhcPeiSyncTrsRing (
**/
VOID
XhcPeiCreateTransferRing (
- IN PEI_XHC_DEV *Xhc,
- IN UINTN TrbNum,
- OUT TRANSFER_RING *TransferRing
+ IN PEI_XHC_DEV *Xhc,
+ IN UINTN TrbNum,
+ OUT TRANSFER_RING *TransferRing
);
/**
@@ -1243,9 +1239,9 @@ XhcPeiCreateTransferRing (
**/
EFI_STATUS
XhcPeiCheckNewEvent (
- IN PEI_XHC_DEV *Xhc,
- IN EVENT_RING *EvtRing,
- OUT TRB_TEMPLATE **NewEvtTrb
+ IN PEI_XHC_DEV *Xhc,
+ IN EVENT_RING *EvtRing,
+ OUT TRB_TEMPLATE **NewEvtTrb
);
/**
@@ -1259,8 +1255,8 @@ XhcPeiCheckNewEvent (
**/
EFI_STATUS
XhcPeiSyncEventRing (
- IN PEI_XHC_DEV *Xhc,
- IN EVENT_RING *EvtRing
+ IN PEI_XHC_DEV *Xhc,
+ IN EVENT_RING *EvtRing
);
/**
@@ -1272,8 +1268,8 @@ XhcPeiSyncEventRing (
**/
VOID
XhcPeiCreateEventRing (
- IN PEI_XHC_DEV *Xhc,
- OUT EVENT_RING *EventRing
+ IN PEI_XHC_DEV *Xhc,
+ OUT EVENT_RING *EventRing
);
/**
@@ -1284,7 +1280,7 @@ XhcPeiCreateEventRing (
**/
VOID
XhcPeiInitSched (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
);
/**
@@ -1295,7 +1291,7 @@ XhcPeiInitSched (
**/
VOID
XhcPeiFreeSched (
- IN PEI_XHC_DEV *Xhc
+ IN PEI_XHC_DEV *Xhc
);
#endif
diff --git a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ComponentName.c b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ComponentName.c
index e56eefee3a..9ff4542471 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ComponentName.c
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "ScsiBus.h"
//
@@ -21,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gScsiBusComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gScsiBusComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) ScsiBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) ScsiBusComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gScsiBusComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)ScsiBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)ScsiBusComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mScsiBusDriverNameTable[] = {
- { "eng;en", (CHAR16 *) L"SCSI Bus Driver" },
- { NULL , NULL }
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mScsiBusDriverNameTable[] = {
+ { "eng;en", (CHAR16 *)L"SCSI Bus Driver" },
+ { NULL, NULL }
};
/**
@@ -160,11 +158,11 @@ ScsiBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
ScsiBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
diff --git a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.c b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.c
index 27b554ad3e..9ea69ee740 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.c
+++ b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.c
@@ -7,11 +7,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "ScsiBus.h"
-
-EFI_DRIVER_BINDING_PROTOCOL gSCSIBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gSCSIBusDriverBinding = {
SCSIBusDriverBindingSupported,
SCSIBusDriverBindingStart,
SCSIBusDriverBindingStop,
@@ -80,8 +78,8 @@ NotifyFunction (
**/
VOID *
AllocateAlignedBuffer (
- IN SCSI_IO_DEV *ScsiIoDevice,
- IN UINTN BufferSize
+ IN SCSI_IO_DEV *ScsiIoDevice,
+ IN UINTN BufferSize
)
{
return AllocateAlignedPages (EFI_SIZE_TO_PAGES (BufferSize), ScsiIoDevice->ScsiIo.IoAlign);
@@ -99,8 +97,8 @@ AllocateAlignedBuffer (
**/
VOID
FreeAlignedBuffer (
- IN VOID *Buffer,
- IN UINTN BufferSize
+ IN VOID *Buffer,
+ IN UINTN BufferSize
)
{
if (Buffer != NULL) {
@@ -120,12 +118,12 @@ FreeAlignedBuffer (
**/
EFI_STATUS
EFIAPI
-InitializeScsiBus(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeScsiBus (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -143,7 +141,6 @@ InitializeScsiBus(
return Status;
}
-
/**
Test to see if this driver supports ControllerHandle.
@@ -171,12 +168,12 @@ SCSIBusDriverBindingSupported (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_SCSI_PASS_THRU_PROTOCOL *PassThru;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtPassThru;
- UINT64 Lun;
- UINT8 *TargetId;
- SCSI_TARGET_ID ScsiTargetId;
+ EFI_STATUS Status;
+ EFI_SCSI_PASS_THRU_PROTOCOL *PassThru;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtPassThru;
+ UINT64 Lun;
+ UINT8 *TargetId;
+ SCSI_TARGET_ID ScsiTargetId;
TargetId = &ScsiTargetId.ScsiId.ExtScsi[0];
SetMem (TargetId, TARGET_MAX_BYTES, 0xFF);
@@ -197,7 +194,7 @@ SCSIBusDriverBindingSupported (
if (Status == EFI_ALREADY_STARTED) {
return EFI_SUCCESS;
- } else if (!EFI_ERROR(Status)) {
+ } else if (!EFI_ERROR (Status)) {
//
// Check if RemainingDevicePath is NULL or the End of Device Path Node,
// if yes, return EFI_SUCCESS.
@@ -227,7 +224,7 @@ SCSIBusDriverBindingSupported (
This->DriverBindingHandle,
Controller
);
- if (!EFI_ERROR(Status)) {
+ if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
}
@@ -271,7 +268,6 @@ SCSIBusDriverBindingSupported (
return Status;
}
-
/**
Start this driver on ControllerHandle.
@@ -299,20 +295,20 @@ SCSIBusDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- UINT64 Lun;
- UINT8 *TargetId;
- BOOLEAN ScanOtherPuns;
- BOOLEAN FromFirstTarget;
- BOOLEAN ExtScsiSupport;
- EFI_STATUS Status;
- EFI_STATUS DevicePathStatus;
- EFI_STATUS PassThruStatus;
- SCSI_BUS_DEVICE *ScsiBusDev;
- SCSI_TARGET_ID ScsiTargetId;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_SCSI_PASS_THRU_PROTOCOL *ScsiInterface;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiInterface;
- EFI_SCSI_BUS_PROTOCOL *BusIdentify;
+ UINT64 Lun;
+ UINT8 *TargetId;
+ BOOLEAN ScanOtherPuns;
+ BOOLEAN FromFirstTarget;
+ BOOLEAN ExtScsiSupport;
+ EFI_STATUS Status;
+ EFI_STATUS DevicePathStatus;
+ EFI_STATUS PassThruStatus;
+ SCSI_BUS_DEVICE *ScsiBusDev;
+ SCSI_TARGET_ID ScsiTargetId;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_SCSI_PASS_THRU_PROTOCOL *ScsiInterface;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiInterface;
+ EFI_SCSI_BUS_PROTOCOL *BusIdentify;
TargetId = NULL;
ScanOtherPuns = TRUE;
@@ -326,7 +322,7 @@ SCSIBusDriverBindingStart (
DevicePathStatus = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -352,7 +348,7 @@ SCSIBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiExtScsiPassThruProtocolGuid,
- (VOID **) &ExtScsiInterface,
+ (VOID **)&ExtScsiInterface,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -360,11 +356,11 @@ SCSIBusDriverBindingStart (
//
// Fail to open UEFI ExtendPassThru Protocol, then try to open EFI PassThru Protocol instead.
//
- if (EFI_ERROR(Status) && (Status != EFI_ALREADY_STARTED)) {
+ if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
Status = gBS->OpenProtocol (
Controller,
&gEfiScsiPassThruProtocolGuid,
- (VOID **) &ScsiInterface,
+ (VOID **)&ScsiInterface,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -373,7 +369,7 @@ SCSIBusDriverBindingStart (
// Fail to open EFI PassThru Protocol, Close the DevicePathProtocol if it is opened by this time.
//
if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {
- if (!EFI_ERROR(DevicePathStatus)) {
+ if (!EFI_ERROR (DevicePathStatus)) {
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
@@ -381,6 +377,7 @@ SCSIBusDriverBindingStart (
Controller
);
}
+
return Status;
}
} else {
@@ -393,7 +390,7 @@ SCSIBusDriverBindingStart (
PassThruStatus = gBS->OpenProtocol (
Controller,
&gEfiScsiPassThruProtocolGuid,
- (VOID **) &ScsiInterface,
+ (VOID **)&ScsiInterface,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -406,18 +403,19 @@ SCSIBusDriverBindingStart (
// on this handle for this time. Then construct Host controller private data.
//
ScsiBusDev = NULL;
- ScsiBusDev = AllocateZeroPool(sizeof(SCSI_BUS_DEVICE));
+ ScsiBusDev = AllocateZeroPool (sizeof (SCSI_BUS_DEVICE));
if (ScsiBusDev == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- ScsiBusDev->Signature = SCSI_BUS_DEVICE_SIGNATURE;
- ScsiBusDev->ExtScsiSupport = ExtScsiSupport;
- ScsiBusDev->DevicePath = ParentDevicePath;
+
+ ScsiBusDev->Signature = SCSI_BUS_DEVICE_SIGNATURE;
+ ScsiBusDev->ExtScsiSupport = ExtScsiSupport;
+ ScsiBusDev->DevicePath = ParentDevicePath;
if (ScsiBusDev->ExtScsiSupport) {
ScsiBusDev->ExtScsiInterface = ExtScsiInterface;
} else {
- ScsiBusDev->ScsiInterface = ScsiInterface;
+ ScsiBusDev->ScsiInterface = ScsiInterface;
}
//
@@ -442,7 +440,7 @@ SCSIBusDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &BusIdentify,
+ (VOID **)&BusIdentify,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -451,6 +449,7 @@ SCSIBusDriverBindingStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
ScsiBusDev = SCSI_BUS_CONTROLLER_DEVICE_FROM_THIS (BusIdentify);
}
@@ -463,7 +462,7 @@ SCSIBusDriverBindingStart (
ParentDevicePath
);
- Lun = 0;
+ Lun = 0;
if (RemainingDevicePath == NULL) {
//
// If RemainingDevicePath is NULL,
@@ -492,7 +491,7 @@ SCSIBusDriverBindingStart (
ScanOtherPuns = FALSE;
}
- while(ScanOtherPuns) {
+ while (ScanOtherPuns) {
if (FromFirstTarget) {
//
// Remaining Device Path is NULL, scan all the possible Puns in the
@@ -503,6 +502,7 @@ SCSIBusDriverBindingStart (
} else {
Status = ScsiBusDev->ScsiInterface->GetNextDevice (ScsiBusDev->ScsiInterface, &ScsiTargetId.ScsiId.Scsi, &Lun);
}
+
if (EFI_ERROR (Status)) {
//
// no legal Pun and Lun found any more
@@ -512,6 +512,7 @@ SCSIBusDriverBindingStart (
} else {
ScanOtherPuns = FALSE;
}
+
//
// Avoid creating handle for the host adapter.
//
@@ -524,12 +525,14 @@ SCSIBusDriverBindingStart (
continue;
}
}
+
//
// Scan for the scsi device, if it attaches to the scsi bus,
// then create handle and install scsi i/o protocol.
//
Status = ScsiScanCreateDevice (This, Controller, &ScsiTargetId, Lun, ScsiBusDev);
}
+
return EFI_SUCCESS;
ErrorExit:
@@ -561,6 +564,7 @@ ErrorExit:
Controller
);
}
+
return Status;
}
@@ -586,20 +590,20 @@ ErrorExit:
EFI_STATUS
EFIAPI
SCSIBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- BOOLEAN AllChildrenStopped;
- UINTN Index;
- EFI_SCSI_IO_PROTOCOL *ScsiIo;
- SCSI_IO_DEV *ScsiIoDevice;
- VOID *ScsiPassThru;
- EFI_SCSI_BUS_PROTOCOL *Scsidentifier;
- SCSI_BUS_DEVICE *ScsiBusDev;
+ EFI_STATUS Status;
+ BOOLEAN AllChildrenStopped;
+ UINTN Index;
+ EFI_SCSI_IO_PROTOCOL *ScsiIo;
+ SCSI_IO_DEV *ScsiIoDevice;
+ VOID *ScsiPassThru;
+ EFI_SCSI_BUS_PROTOCOL *Scsidentifier;
+ SCSI_BUS_DEVICE *ScsiBusDev;
if (NumberOfChildren == 0) {
//
@@ -608,7 +612,7 @@ SCSIBusDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &Scsidentifier,
+ (VOID **)&Scsidentifier,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -675,11 +679,10 @@ SCSIBusDriverBindingStop (
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiScsiIoProtocolGuid,
- (VOID **) &ScsiIo,
+ (VOID **)&ScsiIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -700,7 +703,6 @@ SCSIBusDriverBindingStop (
This->DriverBindingHandle,
ChildHandleBuffer[Index]
);
-
} else {
Status = gBS->CloseProtocol (
Controller,
@@ -751,7 +753,6 @@ SCSIBusDriverBindingStop (
return EFI_SUCCESS;
}
-
/**
Retrieves the device type information of the SCSI Controller.
@@ -766,22 +767,21 @@ SCSIBusDriverBindingStop (
EFI_STATUS
EFIAPI
ScsiGetDeviceType (
- IN EFI_SCSI_IO_PROTOCOL *This,
- OUT UINT8 *DeviceType
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ OUT UINT8 *DeviceType
)
{
- SCSI_IO_DEV *ScsiIoDevice;
+ SCSI_IO_DEV *ScsiIoDevice;
if (DeviceType == NULL) {
return EFI_INVALID_PARAMETER;
}
- ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
- *DeviceType = ScsiIoDevice->ScsiDeviceType;
+ ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
+ *DeviceType = ScsiIoDevice->ScsiDeviceType;
return EFI_SUCCESS;
}
-
/**
Retrieves the device location in the SCSI channel.
@@ -798,22 +798,22 @@ ScsiGetDeviceType (
EFI_STATUS
EFIAPI
ScsiGetDeviceLocation (
- IN EFI_SCSI_IO_PROTOCOL *This,
- IN OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ OUT UINT64 *Lun
)
{
- SCSI_IO_DEV *ScsiIoDevice;
+ SCSI_IO_DEV *ScsiIoDevice;
- if (Target == NULL || Lun == NULL) {
+ if ((Target == NULL) || (Lun == NULL)) {
return EFI_INVALID_PARAMETER;
}
ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
- CopyMem (*Target,&ScsiIoDevice->Pun, TARGET_MAX_BYTES);
+ CopyMem (*Target, &ScsiIoDevice->Pun, TARGET_MAX_BYTES);
- *Lun = ScsiIoDevice->Lun;
+ *Lun = ScsiIoDevice->Lun;
return EFI_SUCCESS;
}
@@ -833,10 +833,10 @@ ScsiGetDeviceLocation (
EFI_STATUS
EFIAPI
ScsiResetBus (
- IN EFI_SCSI_IO_PROTOCOL *This
+ IN EFI_SCSI_IO_PROTOCOL *This
)
{
- SCSI_IO_DEV *ScsiIoDevice;
+ SCSI_IO_DEV *ScsiIoDevice;
ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
@@ -849,14 +849,13 @@ ScsiResetBus (
ScsiIoDevice->ScsiBusDeviceData->DevicePath
);
- if (ScsiIoDevice->ExtScsiSupport){
+ if (ScsiIoDevice->ExtScsiSupport) {
return ScsiIoDevice->ExtScsiPassThru->ResetChannel (ScsiIoDevice->ExtScsiPassThru);
} else {
return ScsiIoDevice->ScsiPassThru->ResetChannel (ScsiIoDevice->ScsiPassThru);
}
}
-
/**
Resets the SCSI Controller that the device handle specifies.
@@ -871,7 +870,7 @@ ScsiResetBus (
EFI_STATUS
EFIAPI
ScsiResetDevice (
- IN EFI_SCSI_IO_PROTOCOL *This
+ IN EFI_SCSI_IO_PROTOCOL *This
)
{
SCSI_IO_DEV *ScsiIoDevice;
@@ -888,25 +887,23 @@ ScsiResetDevice (
ScsiIoDevice->ScsiBusDeviceData->DevicePath
);
- CopyMem (Target,&ScsiIoDevice->Pun, TARGET_MAX_BYTES);
-
+ CopyMem (Target, &ScsiIoDevice->Pun, TARGET_MAX_BYTES);
if (ScsiIoDevice->ExtScsiSupport) {
return ScsiIoDevice->ExtScsiPassThru->ResetTargetLun (
- ScsiIoDevice->ExtScsiPassThru,
- Target,
- ScsiIoDevice->Lun
- );
+ ScsiIoDevice->ExtScsiPassThru,
+ Target,
+ ScsiIoDevice->Lun
+ );
} else {
return ScsiIoDevice->ScsiPassThru->ResetTarget (
- ScsiIoDevice->ScsiPassThru,
- ScsiIoDevice->Pun.ScsiId.Scsi,
- ScsiIoDevice->Lun
- );
+ ScsiIoDevice->ScsiPassThru,
+ ScsiIoDevice->Pun.ScsiId.Scsi,
+ ScsiIoDevice->Lun
+ );
}
}
-
/**
Sends a SCSI Request Packet to the SCSI Controller for execution.
@@ -957,9 +954,9 @@ ScsiResetDevice (
EFI_STATUS
EFIAPI
ScsiExecuteSCSICommand (
- IN EFI_SCSI_IO_PROTOCOL *This,
- IN OUT EFI_SCSI_IO_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ IN OUT EFI_SCSI_IO_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
SCSI_IO_DEV *ScsiIoDevice;
@@ -975,11 +972,11 @@ ScsiExecuteSCSICommand (
return EFI_INVALID_PARAMETER;
}
- ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
- CopyMem (Target,&ScsiIoDevice->Pun, TARGET_MAX_BYTES);
+ ScsiIoDevice = SCSI_IO_DEV_FROM_THIS (This);
+ CopyMem (Target, &ScsiIoDevice->Pun, TARGET_MAX_BYTES);
if (ScsiIoDevice->ExtScsiSupport) {
- ExtRequestPacket = (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *) Packet;
+ ExtRequestPacket = (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *)Packet;
if (((ScsiIoDevice->ExtScsiPassThru->Mode->Attributes & EFI_SCSI_PASS_THRU_ATTRIBUTES_NONBLOCKIO) != 0) && (Event != NULL)) {
Status = ScsiIoDevice->ExtScsiPassThru->PassThru (
@@ -1001,7 +998,7 @@ ScsiExecuteSCSICommand (
ExtRequestPacket,
NULL
);
- if ((!EFI_ERROR(Status)) && (Event != NULL)) {
+ if ((!EFI_ERROR (Status)) && (Event != NULL)) {
//
// Signal Event to tell caller to pick up the SCSI IO packet if the
// PassThru() succeeds.
@@ -1010,8 +1007,7 @@ ScsiExecuteSCSICommand (
}
}
} else {
-
- mWorkingBuffer = AllocatePool (sizeof(EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET));
+ mWorkingBuffer = AllocatePool (sizeof (EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET));
if (mWorkingBuffer == NULL) {
return EFI_DEVICE_ERROR;
@@ -1020,67 +1016,66 @@ ScsiExecuteSCSICommand (
//
// Convert package into EFI1.0, EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET.
//
- Status = ScsiioToPassThruPacket(Packet, (EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET*)mWorkingBuffer);
- if (EFI_ERROR(Status)) {
- FreePool(mWorkingBuffer);
+ Status = ScsiioToPassThruPacket (Packet, (EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *)mWorkingBuffer);
+ if (EFI_ERROR (Status)) {
+ FreePool (mWorkingBuffer);
return Status;
}
if (((ScsiIoDevice->ScsiPassThru->Mode->Attributes & EFI_SCSI_PASS_THRU_ATTRIBUTES_NONBLOCKIO) != 0) && (Event != NULL)) {
- EventData.Data1 = (VOID*)Packet;
+ EventData.Data1 = (VOID *)Packet;
EventData.Data2 = Event;
//
// Create Event
//
Status = gBS->CreateEvent (
- EVT_NOTIFY_SIGNAL,
- TPL_NOTIFY,
- NotifyFunction,
- &EventData,
- &PacketEvent
- );
- if (EFI_ERROR(Status)) {
- FreePool(mWorkingBuffer);
+ EVT_NOTIFY_SIGNAL,
+ TPL_NOTIFY,
+ NotifyFunction,
+ &EventData,
+ &PacketEvent
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (mWorkingBuffer);
return Status;
}
Status = ScsiIoDevice->ScsiPassThru->PassThru (
- ScsiIoDevice->ScsiPassThru,
- ScsiIoDevice->Pun.ScsiId.Scsi,
- ScsiIoDevice->Lun,
- mWorkingBuffer,
- PacketEvent
- );
+ ScsiIoDevice->ScsiPassThru,
+ ScsiIoDevice->Pun.ScsiId.Scsi,
+ ScsiIoDevice->Lun,
+ mWorkingBuffer,
+ PacketEvent
+ );
- if (EFI_ERROR(Status)) {
- FreePool(mWorkingBuffer);
- gBS->CloseEvent(PacketEvent);
+ if (EFI_ERROR (Status)) {
+ FreePool (mWorkingBuffer);
+ gBS->CloseEvent (PacketEvent);
return Status;
}
-
} else {
//
// If there's no event or SCSI Device doesn't support NON-BLOCKING, just convert
// EFI1.0 PassThru packet back to UEFI2.0 SCSI IO Packet.
//
Status = ScsiIoDevice->ScsiPassThru->PassThru (
- ScsiIoDevice->ScsiPassThru,
- ScsiIoDevice->Pun.ScsiId.Scsi,
- ScsiIoDevice->Lun,
- mWorkingBuffer,
- NULL
- );
- if (EFI_ERROR(Status)) {
- FreePool(mWorkingBuffer);
+ ScsiIoDevice->ScsiPassThru,
+ ScsiIoDevice->Pun.ScsiId.Scsi,
+ ScsiIoDevice->Lun,
+ mWorkingBuffer,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (mWorkingBuffer);
return Status;
}
- PassThruToScsiioPacket((EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET*)mWorkingBuffer,Packet);
+ PassThruToScsiioPacket ((EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *)mWorkingBuffer, Packet);
//
// After converting EFI1.0 PassThru Packet back to UEFI2.0 SCSI IO Packet,
// free mWorkingBuffer.
//
- FreePool(mWorkingBuffer);
+ FreePool (mWorkingBuffer);
//
// Signal Event to tell caller to pick up the SCSI IO Packet.
@@ -1090,10 +1085,10 @@ ScsiExecuteSCSICommand (
}
}
}
+
return Status;
}
-
/**
Scan SCSI Bus to discover the device, and attach ScsiIoProtocol to it.
@@ -1111,11 +1106,11 @@ ScsiExecuteSCSICommand (
EFI_STATUS
EFIAPI
ScsiScanCreateDevice (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN SCSI_TARGET_ID *TargetId,
- IN UINT64 Lun,
- IN OUT SCSI_BUS_DEVICE *ScsiBusDev
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN SCSI_TARGET_ID *TargetId,
+ IN UINT64 Lun,
+ IN OUT SCSI_BUS_DEVICE *ScsiBusDev
)
{
EFI_STATUS Status;
@@ -1123,7 +1118,7 @@ ScsiScanCreateDevice (
EFI_DEVICE_PATH_PROTOCOL *ScsiDevicePath;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
- EFI_HANDLE DeviceHandle;
+ EFI_HANDLE DeviceHandle;
DevicePath = NULL;
RemainingDevicePath = NULL;
@@ -1133,7 +1128,7 @@ ScsiScanCreateDevice (
//
// Build Device Path
//
- if (ScsiBusDev->ExtScsiSupport){
+ if (ScsiBusDev->ExtScsiSupport) {
Status = ScsiBusDev->ExtScsiInterface->BuildDevicePath (
ScsiBusDev->ExtScsiInterface,
&TargetId->ScsiId.ExtScsi[0],
@@ -1149,7 +1144,7 @@ ScsiScanCreateDevice (
);
}
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -1163,10 +1158,10 @@ ScsiScanCreateDevice (
goto ErrorExit;
}
- DeviceHandle = NULL;
+ DeviceHandle = NULL;
RemainingDevicePath = DevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
- if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd(RemainingDevicePath)) {
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
+ if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd (RemainingDevicePath)) {
//
// The device has been started, directly return to fast boot.
//
@@ -1180,20 +1175,19 @@ ScsiScanCreateDevice (
goto ErrorExit;
}
- ScsiIoDevice->Signature = SCSI_IO_DEV_SIGNATURE;
- ScsiIoDevice->ScsiBusDeviceData = ScsiBusDev;
- CopyMem(&ScsiIoDevice->Pun, TargetId, TARGET_MAX_BYTES);
- ScsiIoDevice->Lun = Lun;
+ ScsiIoDevice->Signature = SCSI_IO_DEV_SIGNATURE;
+ ScsiIoDevice->ScsiBusDeviceData = ScsiBusDev;
+ CopyMem (&ScsiIoDevice->Pun, TargetId, TARGET_MAX_BYTES);
+ ScsiIoDevice->Lun = Lun;
if (ScsiBusDev->ExtScsiSupport) {
- ScsiIoDevice->ExtScsiPassThru = ScsiBusDev->ExtScsiInterface;
- ScsiIoDevice->ExtScsiSupport = TRUE;
- ScsiIoDevice->ScsiIo.IoAlign = ScsiIoDevice->ExtScsiPassThru->Mode->IoAlign;
-
+ ScsiIoDevice->ExtScsiPassThru = ScsiBusDev->ExtScsiInterface;
+ ScsiIoDevice->ExtScsiSupport = TRUE;
+ ScsiIoDevice->ScsiIo.IoAlign = ScsiIoDevice->ExtScsiPassThru->Mode->IoAlign;
} else {
- ScsiIoDevice->ScsiPassThru = ScsiBusDev->ScsiInterface;
- ScsiIoDevice->ExtScsiSupport = FALSE;
- ScsiIoDevice->ScsiIo.IoAlign = ScsiIoDevice->ScsiPassThru->Mode->IoAlign;
+ ScsiIoDevice->ScsiPassThru = ScsiBusDev->ScsiInterface;
+ ScsiIoDevice->ExtScsiSupport = FALSE;
+ ScsiIoDevice->ScsiIo.IoAlign = ScsiIoDevice->ScsiPassThru->Mode->IoAlign;
}
ScsiIoDevice->ScsiIo.GetDeviceType = ScsiGetDeviceType;
@@ -1233,22 +1227,23 @@ ScsiScanCreateDevice (
gBS->OpenProtocol (
Controller,
&gEfiExtScsiPassThruProtocolGuid,
- (VOID **) &(ScsiBusDev->ExtScsiInterface),
+ (VOID **)&(ScsiBusDev->ExtScsiInterface),
This->DriverBindingHandle,
ScsiIoDevice->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
);
- } else {
+ } else {
gBS->OpenProtocol (
Controller,
&gEfiScsiPassThruProtocolGuid,
- (VOID **) &(ScsiBusDev->ScsiInterface),
+ (VOID **)&(ScsiBusDev->ScsiInterface),
This->DriverBindingHandle,
ScsiIoDevice->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
);
- }
+ }
}
+
return EFI_SUCCESS;
ErrorExit:
@@ -1271,7 +1266,6 @@ ErrorExit:
return Status;
}
-
/**
Discovery SCSI Device
@@ -1283,19 +1277,19 @@ ErrorExit:
**/
BOOLEAN
DiscoverScsiDevice (
- IN OUT SCSI_IO_DEV *ScsiIoDevice
+ IN OUT SCSI_IO_DEV *ScsiIoDevice
)
{
- EFI_STATUS Status;
- UINT32 InquiryDataLength;
- UINT8 SenseDataLength;
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
- EFI_SCSI_INQUIRY_DATA *InquiryData;
- EFI_SCSI_SENSE_DATA *SenseData;
- UINT8 MaxRetry;
- UINT8 Index;
- BOOLEAN ScsiDeviceFound;
+ EFI_STATUS Status;
+ UINT32 InquiryDataLength;
+ UINT8 SenseDataLength;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ EFI_SCSI_INQUIRY_DATA *InquiryData;
+ EFI_SCSI_SENSE_DATA *SenseData;
+ UINT8 MaxRetry;
+ UINT8 Index;
+ BOOLEAN ScsiDeviceFound;
HostAdapterStatus = 0;
TargetStatus = 0;
@@ -1327,29 +1321,33 @@ DiscoverScsiDevice (
MaxRetry = 2;
for (Index = 0; Index < MaxRetry; Index++) {
Status = ScsiInquiryCommand (
- &ScsiIoDevice->ScsiIo,
- SCSI_BUS_TIMEOUT,
- SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- (VOID *) InquiryData,
- &InquiryDataLength,
- FALSE
- );
+ &ScsiIoDevice->ScsiIo,
+ SCSI_BUS_TIMEOUT,
+ SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ (VOID *)InquiryData,
+ &InquiryDataLength,
+ FALSE
+ );
if (!EFI_ERROR (Status)) {
if ((HostAdapterStatus == EFI_SCSI_IO_STATUS_HOST_ADAPTER_OK) &&
(TargetStatus == EFI_SCSI_IO_STATUS_TARGET_CHECK_CONDITION) &&
(SenseData->Error_Code == 0x70) &&
- (SenseData->Sense_Key == EFI_SCSI_SK_ILLEGAL_REQUEST)) {
+ (SenseData->Sense_Key == EFI_SCSI_SK_ILLEGAL_REQUEST))
+ {
ScsiDeviceFound = FALSE;
goto Done;
}
+
break;
}
+
if ((Status == EFI_BAD_BUFFER_SIZE) ||
(Status == EFI_INVALID_PARAMETER) ||
- (Status == EFI_UNSUPPORTED)) {
+ (Status == EFI_UNSUPPORTED))
+ {
ScsiDeviceFound = FALSE;
goto Done;
}
@@ -1369,7 +1367,8 @@ DiscoverScsiDevice (
}
if ((InquiryData->Peripheral_Type >= EFI_SCSI_TYPE_RESERVED_LOW) &&
- (InquiryData->Peripheral_Type <= EFI_SCSI_TYPE_RESERVED_HIGH)) {
+ (InquiryData->Peripheral_Type <= EFI_SCSI_TYPE_RESERVED_HIGH))
+ {
ScsiDeviceFound = FALSE;
goto Done;
}
@@ -1385,7 +1384,7 @@ DiscoverScsiDevice (
//
// ANSI-approved version
//
- ScsiIoDevice->ScsiVersion = (UINT8) (InquiryData->Version & 0x07);
+ ScsiIoDevice->ScsiVersion = (UINT8)(InquiryData->Version & 0x07);
}
ScsiDeviceFound = TRUE;
@@ -1397,7 +1396,6 @@ Done:
return ScsiDeviceFound;
}
-
/**
Convert EFI_SCSI_IO_SCSI_REQUEST_PACKET packet to EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET packet.
@@ -1413,7 +1411,7 @@ ScsiioToPassThruPacket (
)
{
//
- //EFI 1.10 doesn't support Bi-Direction Command.
+ // EFI 1.10 doesn't support Bi-Direction Command.
//
if (Packet->DataDirection == EFI_SCSI_IO_DATA_DIRECTION_BIDIRECTIONAL) {
return EFI_UNSUPPORTED;
@@ -1431,16 +1429,16 @@ ScsiioToPassThruPacket (
CommandPacket->SenseDataLength = Packet->SenseDataLength;
if (Packet->DataDirection == EFI_SCSI_IO_DATA_DIRECTION_READ) {
- CommandPacket->DataBuffer = Packet->InDataBuffer;
+ CommandPacket->DataBuffer = Packet->InDataBuffer;
CommandPacket->TransferLength = Packet->InTransferLength;
} else if (Packet->DataDirection == EFI_SCSI_IO_DATA_DIRECTION_WRITE) {
- CommandPacket->DataBuffer = Packet->OutDataBuffer;
+ CommandPacket->DataBuffer = Packet->OutDataBuffer;
CommandPacket->TransferLength = Packet->OutTransferLength;
}
+
return EFI_SUCCESS;
}
-
/**
Convert EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET packet to EFI_SCSI_IO_SCSI_REQUEST_PACKET packet.
@@ -1465,10 +1463,10 @@ PassThruToScsiioPacket (
Packet->SenseDataLength = ScsiPacket->SenseDataLength;
if (ScsiPacket->DataDirection == EFI_SCSI_IO_DATA_DIRECTION_READ) {
- Packet->InDataBuffer = ScsiPacket->DataBuffer;
+ Packet->InDataBuffer = ScsiPacket->DataBuffer;
Packet->InTransferLength = ScsiPacket->TransferLength;
} else if (Packet->DataDirection == EFI_SCSI_IO_DATA_DIRECTION_WRITE) {
- Packet->OutDataBuffer = ScsiPacket->DataBuffer;
+ Packet->OutDataBuffer = ScsiPacket->DataBuffer;
Packet->OutTransferLength = ScsiPacket->TransferLength;
}
@@ -1490,31 +1488,30 @@ NotifyFunction (
IN VOID *Context
)
{
- EFI_SCSI_IO_SCSI_REQUEST_PACKET *Packet;
- EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *ScsiPacket;
- EFI_EVENT CallerEvent;
- SCSI_EVENT_DATA *PassData;
+ EFI_SCSI_IO_SCSI_REQUEST_PACKET *Packet;
+ EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *ScsiPacket;
+ EFI_EVENT CallerEvent;
+ SCSI_EVENT_DATA *PassData;
- PassData = (SCSI_EVENT_DATA*)Context;
- Packet = (EFI_SCSI_IO_SCSI_REQUEST_PACKET *)PassData->Data1;
- ScsiPacket = (EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET*)mWorkingBuffer;
+ PassData = (SCSI_EVENT_DATA *)Context;
+ Packet = (EFI_SCSI_IO_SCSI_REQUEST_PACKET *)PassData->Data1;
+ ScsiPacket = (EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *)mWorkingBuffer;
//
// Convert EFI1.0 PassThru packet to UEFI2.0 SCSI IO Packet.
//
- PassThruToScsiioPacket(ScsiPacket, Packet);
+ PassThruToScsiioPacket (ScsiPacket, Packet);
//
// After converting EFI1.0 PassThru Packet back to UEFI2.0 SCSI IO Packet,
// free mWorkingBuffer.
//
- gBS->FreePool(mWorkingBuffer);
+ gBS->FreePool (mWorkingBuffer);
//
// Signal Event to tell caller to pick up UEFI2.0 SCSI IO Packet.
//
CallerEvent = PassData->Data2;
- gBS->CloseEvent(Event);
- gBS->SignalEvent(CallerEvent);
+ gBS->CloseEvent (Event);
+ gBS->SignalEvent (CallerEvent);
}
-
diff --git a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.h b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.h
index 97581866b6..68c5c02a91 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.h
+++ b/MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBus.h
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SCSI_BUS_H_
#define _SCSI_BUS_H_
-
#include <Uefi.h>
#include <Protocol/ScsiPassThru.h>
@@ -31,22 +30,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Scsi.h>
-#define SCSI_IO_DEV_SIGNATURE SIGNATURE_32 ('s', 'c', 'i', 'o')
+#define SCSI_IO_DEV_SIGNATURE SIGNATURE_32 ('s', 'c', 'i', 'o')
typedef union {
- UINT32 Scsi;
- UINT8 ExtScsi[4];
+ UINT32 Scsi;
+ UINT8 ExtScsi[4];
} SCSI_ID;
typedef struct _SCSI_TARGET_ID {
- SCSI_ID ScsiId;
- UINT8 ExtScsiId[12];
-}SCSI_TARGET_ID;
-
+ SCSI_ID ScsiId;
+ UINT8 ExtScsiId[12];
+} SCSI_TARGET_ID;
typedef struct {
- VOID *Data1;
- VOID *Data2;
+ VOID *Data1;
+ VOID *Data2;
} SCSI_EVENT_DATA;
//
@@ -57,7 +55,7 @@ typedef struct {
//
// SCSI Bus Timeout Experience Value
//
-#define SCSI_BUS_TIMEOUT EFI_TIMER_PERIOD_SECONDS (3)
+#define SCSI_BUS_TIMEOUT EFI_TIMER_PERIOD_SECONDS (3)
//
// The ScsiBusProtocol is just used to locate ScsiBusDev
@@ -67,16 +65,16 @@ typedef struct {
// gEfiCallerIdGuid will be used as its protocol guid.
//
typedef struct _EFI_SCSI_BUS_PROTOCOL {
- UINT64 Reserved;
+ UINT64 Reserved;
} EFI_SCSI_BUS_PROTOCOL;
typedef struct _SCSI_BUS_DEVICE {
- UINTN Signature;
- EFI_SCSI_BUS_PROTOCOL BusIdentify;
- BOOLEAN ExtScsiSupport;
- EFI_SCSI_PASS_THRU_PROTOCOL *ScsiInterface;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiInterface;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN Signature;
+ EFI_SCSI_BUS_PROTOCOL BusIdentify;
+ BOOLEAN ExtScsiSupport;
+ EFI_SCSI_PASS_THRU_PROTOCOL *ScsiInterface;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiInterface;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
} SCSI_BUS_DEVICE;
#define SCSI_BUS_CONTROLLER_DEVICE_FROM_THIS(a) CR (a, SCSI_BUS_DEVICE, BusIdentify, SCSI_BUS_DEVICE_SIGNATURE)
@@ -182,15 +180,16 @@ SCSIBusDriverBindingStart (
EFI_STATUS
EFIAPI
SCSIBusDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -309,11 +308,11 @@ ScsiBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
ScsiBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -330,8 +329,8 @@ ScsiBusComponentNameGetControllerName (
EFI_STATUS
EFIAPI
ScsiGetDeviceType (
- IN EFI_SCSI_IO_PROTOCOL *This,
- OUT UINT8 *DeviceType
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ OUT UINT8 *DeviceType
);
/**
@@ -350,9 +349,9 @@ ScsiGetDeviceType (
EFI_STATUS
EFIAPI
ScsiGetDeviceLocation (
- IN EFI_SCSI_IO_PROTOCOL *This,
- IN OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ OUT UINT64 *Lun
);
/**
@@ -370,7 +369,7 @@ ScsiGetDeviceLocation (
EFI_STATUS
EFIAPI
ScsiResetBus (
- IN EFI_SCSI_IO_PROTOCOL *This
+ IN EFI_SCSI_IO_PROTOCOL *This
);
/**
@@ -387,7 +386,7 @@ ScsiResetBus (
EFI_STATUS
EFIAPI
ScsiResetDevice (
- IN EFI_SCSI_IO_PROTOCOL *This
+ IN EFI_SCSI_IO_PROTOCOL *This
);
/**
@@ -462,11 +461,11 @@ ScsiExecuteSCSICommand (
EFI_STATUS
EFIAPI
ScsiScanCreateDevice (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN SCSI_TARGET_ID *TargetId,
- IN UINT64 Lun,
- IN OUT SCSI_BUS_DEVICE *ScsiBusDev
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN SCSI_TARGET_ID *TargetId,
+ IN UINT64 Lun,
+ IN OUT SCSI_BUS_DEVICE *ScsiBusDev
);
/**
@@ -480,7 +479,7 @@ ScsiScanCreateDevice (
**/
BOOLEAN
DiscoverScsiDevice (
- IN OUT SCSI_IO_DEV *ScsiIoDevice
+ IN OUT SCSI_IO_DEV *ScsiIoDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ComponentName.c b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ComponentName.c
index b193de9ed9..212d26bf88 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ComponentName.c
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "ScsiDisk.h"
//
@@ -21,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gScsiDiskComponentNam
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gScsiDiskComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) ScsiDiskComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) ScsiDiskComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gScsiDiskComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)ScsiDiskComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)ScsiDiskComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mScsiDiskDriverNameTable[] = {
- { "eng;en", (CHAR16 *) L"Scsi Disk Driver" },
- { NULL , NULL }
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mScsiDiskDriverNameTable[] = {
+ { "eng;en", (CHAR16 *)L"Scsi Disk Driver" },
+ { NULL, NULL }
};
/**
@@ -160,16 +158,16 @@ ScsiDiskComponentNameGetDriverName (
EFI_STATUS
EFIAPI
ScsiDiskComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- SCSI_DISK_DEV *ScsiDiskDevice;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ EFI_STATUS Status;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -189,13 +187,14 @@ ScsiDiskComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
gScsiDiskDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,5 +213,4 @@ ScsiDiskComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gScsiDiskComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
index b35d92fcd7..98e84b4ea8 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
+++ b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
@@ -6,10 +6,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "ScsiDisk.h"
-EFI_DRIVER_BINDING_PROTOCOL gScsiDiskDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gScsiDiskDriverBinding = {
ScsiDiskDriverBindingSupported,
ScsiDiskDriverBindingStart,
ScsiDiskDriverBindingStop,
@@ -18,7 +17,7 @@ EFI_DRIVER_BINDING_PROTOCOL gScsiDiskDriverBinding = {
NULL
};
-EFI_DISK_INFO_PROTOCOL gScsiDiskInfoProtocolTemplate = {
+EFI_DISK_INFO_PROTOCOL gScsiDiskInfoProtocolTemplate = {
EFI_DISK_INFO_SCSI_INTERFACE_GUID,
ScsiDiskInfoInquiry,
ScsiDiskInfoIdentify,
@@ -40,8 +39,8 @@ EFI_DISK_INFO_PROTOCOL gScsiDiskInfoProtocolTemplate = {
**/
VOID *
AllocateAlignedBuffer (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINTN BufferSize
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINTN BufferSize
)
{
return AllocateAlignedPages (EFI_SIZE_TO_PAGES (BufferSize), ScsiDiskDevice->ScsiIo->IoAlign);
@@ -59,8 +58,8 @@ AllocateAlignedBuffer (
**/
VOID
FreeAlignedBuffer (
- IN VOID *Buffer,
- IN UINTN BufferSize
+ IN VOID *Buffer,
+ IN UINTN BufferSize
)
{
if (Buffer != NULL) {
@@ -82,12 +81,12 @@ FreeAlignedBuffer (
**/
EFI_STATUS
EFIAPI
-InitializeScsiDisk(
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+InitializeScsiDisk (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
@@ -102,7 +101,6 @@ InitializeScsiDisk(
);
ASSERT_EFI_ERROR (Status);
-
return Status;
}
@@ -140,7 +138,7 @@ ScsiDiskDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiScsiIoProtocolGuid,
- (VOID **) &ScsiIo,
+ (VOID **)&ScsiIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -153,7 +151,8 @@ ScsiDiskDriverBindingSupported (
if (!EFI_ERROR (Status)) {
if ((DeviceType == EFI_SCSI_TYPE_DISK) ||
(DeviceType == EFI_SCSI_TYPE_CDROM) ||
- (DeviceType == EFI_SCSI_TYPE_WLUN)) {
+ (DeviceType == EFI_SCSI_TYPE_WLUN))
+ {
Status = EFI_SUCCESS;
} else {
Status = EFI_UNSUPPORTED;
@@ -169,7 +168,6 @@ ScsiDiskDriverBindingSupported (
return Status;
}
-
/**
Start this driver on ControllerHandle.
@@ -208,7 +206,7 @@ ScsiDiskDriverBindingStart (
MustReadCapacity = TRUE;
- ScsiDiskDevice = (SCSI_DISK_DEV *) AllocateZeroPool (sizeof (SCSI_DISK_DEV));
+ ScsiDiskDevice = (SCSI_DISK_DEV *)AllocateZeroPool (sizeof (SCSI_DISK_DEV));
if (ScsiDiskDevice == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -216,7 +214,7 @@ ScsiDiskDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiScsiIoProtocolGuid,
- (VOID **) &ScsiIo,
+ (VOID **)&ScsiIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -252,35 +250,36 @@ ScsiDiskDriverBindingStart (
ScsiIo->GetDeviceType (ScsiIo, &(ScsiDiskDevice->DeviceType));
switch (ScsiDiskDevice->DeviceType) {
- case EFI_SCSI_TYPE_DISK:
- ScsiDiskDevice->BlkIo.Media->BlockSize = 0x200;
- MustReadCapacity = TRUE;
- break;
+ case EFI_SCSI_TYPE_DISK:
+ ScsiDiskDevice->BlkIo.Media->BlockSize = 0x200;
+ MustReadCapacity = TRUE;
+ break;
- case EFI_SCSI_TYPE_CDROM:
- ScsiDiskDevice->BlkIo.Media->BlockSize = 0x800;
- ScsiDiskDevice->BlkIo.Media->ReadOnly = TRUE;
- MustReadCapacity = FALSE;
- break;
+ case EFI_SCSI_TYPE_CDROM:
+ ScsiDiskDevice->BlkIo.Media->BlockSize = 0x800;
+ ScsiDiskDevice->BlkIo.Media->ReadOnly = TRUE;
+ MustReadCapacity = FALSE;
+ break;
- case EFI_SCSI_TYPE_WLUN:
- MustReadCapacity = FALSE;
- break;
+ case EFI_SCSI_TYPE_WLUN:
+ MustReadCapacity = FALSE;
+ break;
}
+
//
// The Sense Data Array's initial size is 6
//
ScsiDiskDevice->SenseDataNumber = 6;
- ScsiDiskDevice->SenseData = (EFI_SCSI_SENSE_DATA *) AllocateZeroPool (
- sizeof (EFI_SCSI_SENSE_DATA) * ScsiDiskDevice->SenseDataNumber
- );
+ ScsiDiskDevice->SenseData = (EFI_SCSI_SENSE_DATA *)AllocateZeroPool (
+ sizeof (EFI_SCSI_SENSE_DATA) * ScsiDiskDevice->SenseDataNumber
+ );
if (ScsiDiskDevice->SenseData == NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiScsiIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiScsiIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
FreePool (ScsiDiskDevice);
return EFI_OUT_OF_RESOURCES;
}
@@ -307,6 +306,7 @@ ScsiDiskDriverBindingStart (
return EFI_DEVICE_ERROR;
}
}
+
//
// The second parameter "TRUE" means must
// retrieve media capacity
@@ -341,6 +341,7 @@ ScsiDiskDriverBindingStart (
DEBUG ((DEBUG_ERROR, "ScsiDisk: Failed to install the Erase Block Protocol! Status = %r\n", Status));
}
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, Controller)) {
Status = gBS->InstallProtocolInterface (
&Controller,
@@ -352,6 +353,7 @@ ScsiDiskDriverBindingStart (
DEBUG ((DEBUG_ERROR, "ScsiDisk: Failed to install the Storage Security Command Protocol! Status = %r\n", Status));
}
}
+
ScsiDiskDevice->ControllerNameTable = NULL;
AddUnicodeString2 (
"eng",
@@ -381,10 +383,8 @@ ScsiDiskDriverBindingStart (
Controller
);
return Status;
-
}
-
/**
Stop this driver on ControllerHandle.
@@ -407,21 +407,21 @@ ScsiDiskDriverBindingStart (
EFI_STATUS
EFIAPI
ScsiDiskDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
)
{
- EFI_BLOCK_IO_PROTOCOL *BlkIo;
- EFI_ERASE_BLOCK_PROTOCOL *EraseBlock;
- SCSI_DISK_DEV *ScsiDiskDevice;
- EFI_STATUS Status;
+ EFI_BLOCK_IO_PROTOCOL *BlkIo;
+ EFI_ERASE_BLOCK_PROTOCOL *EraseBlock;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_STATUS Status;
Status = gBS->OpenProtocol (
Controller,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlkIo,
+ (VOID **)&BlkIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -435,7 +435,8 @@ ScsiDiskDriverBindingStop (
//
// Wait for the BlockIo2 requests queue to become empty
//
- while (!IsListEmpty (&ScsiDiskDevice->AsyncTaskQueue));
+ while (!IsListEmpty (&ScsiDiskDevice->AsyncTaskQueue)) {
+ }
//
// If Erase Block Protocol is installed, then uninstall this protocol.
@@ -443,7 +444,7 @@ ScsiDiskDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiEraseBlockProtocolGuid,
- (VOID **) &EraseBlock,
+ (VOID **)&EraseBlock,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -482,6 +483,7 @@ ScsiDiskDriverBindingStop (
return EFI_SUCCESS;
}
+
//
// errors met
//
@@ -504,19 +506,19 @@ ScsiDiskDriverBindingStop (
EFI_STATUS
EFIAPI
ScsiDiskReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_TPL OldTpl;
- SCSI_DISK_DEV *ScsiDiskDevice;
- EFI_STATUS Status;
+ EFI_TPL OldTpl;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_STATUS Status;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO (This);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO (This);
- Status = ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
+ Status = ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
if (EFI_ERROR (Status)) {
if (Status == EFI_UNSUPPORTED) {
@@ -563,11 +565,11 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -583,8 +585,7 @@ ScsiDiskReadBlocks (
ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO (This);
Media = ScsiDiskDevice->BlkIo.Media;
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
-
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -593,11 +594,11 @@ ScsiDiskReadBlocks (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -612,33 +613,37 @@ ScsiDiskReadBlocks (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
+
//
// Get the intrinsic block size
//
- BlockSize = Media->BlockSize;
+ BlockSize = Media->BlockSize;
if (BlockSize == 0) {
Status = EFI_DEVICE_ERROR;
goto Done;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if (!(Media->MediaPresent)) {
Status = EFI_NO_MEDIA;
@@ -675,7 +680,7 @@ ScsiDiskReadBlocks (
goto Done;
}
- if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
+ if ((Media->IoAlign > 1) && (((UINTN)Buffer & (Media->IoAlign - 1)) != 0)) {
Status = EFI_INVALID_PARAMETER;
goto Done;
}
@@ -712,11 +717,11 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -732,8 +737,7 @@ ScsiDiskWriteBlocks (
ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO (This);
Media = ScsiDiskDevice->BlkIo.Media;
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
-
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -742,11 +746,11 @@ ScsiDiskWriteBlocks (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -761,33 +765,37 @@ ScsiDiskWriteBlocks (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
+
//
// Get the intrinsic block size
//
- BlockSize = Media->BlockSize;
+ BlockSize = Media->BlockSize;
if (BlockSize == 0) {
Status = EFI_DEVICE_ERROR;
goto Done;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if (!(Media->MediaPresent)) {
Status = EFI_NO_MEDIA;
@@ -829,10 +837,11 @@ ScsiDiskWriteBlocks (
goto Done;
}
- if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
+ if ((Media->IoAlign > 1) && (((UINTN)Buffer & (Media->IoAlign - 1)) != 0)) {
Status = EFI_INVALID_PARAMETER;
goto Done;
}
+
//
// if all the parameters are valid, then perform read sectors command
// to transfer data from device to host.
@@ -857,7 +866,7 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
)
{
//
@@ -866,7 +875,6 @@ ScsiDiskFlushBlocks (
return EFI_SUCCESS;
}
-
/**
Reset SCSI Disk.
@@ -886,15 +894,15 @@ ScsiDiskResetEx (
IN BOOLEAN ExtendedVerification
)
{
- EFI_TPL OldTpl;
- SCSI_DISK_DEV *ScsiDiskDevice;
- EFI_STATUS Status;
+ EFI_TPL OldTpl;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_STATUS Status;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO2 (This);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO2 (This);
- Status = ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
+ Status = ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
if (EFI_ERROR (Status)) {
if (Status == EFI_UNSUPPORTED) {
@@ -950,12 +958,12 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -971,8 +979,7 @@ ScsiDiskReadBlocksEx (
ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO2 (This);
Media = ScsiDiskDevice->BlkIo.Media;
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
-
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -981,11 +988,11 @@ ScsiDiskReadBlocksEx (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -1000,33 +1007,37 @@ ScsiDiskReadBlocksEx (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
+
//
// Get the intrinsic block size
//
- BlockSize = Media->BlockSize;
+ BlockSize = Media->BlockSize;
if (BlockSize == 0) {
Status = EFI_DEVICE_ERROR;
goto Done;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if (!(Media->MediaPresent)) {
Status = EFI_NO_MEDIA;
@@ -1068,7 +1079,7 @@ ScsiDiskReadBlocksEx (
goto Done;
}
- if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
+ if ((Media->IoAlign > 1) && (((UINTN)Buffer & (Media->IoAlign - 1)) != 0)) {
Status = EFI_INVALID_PARAMETER;
goto Done;
}
@@ -1079,13 +1090,13 @@ ScsiDiskReadBlocksEx (
//
if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
- Status = ScsiDiskAsyncReadSectors (
- ScsiDiskDevice,
- Buffer,
- Lba,
- NumberOfBlocks,
- Token
- );
+ Status = ScsiDiskAsyncReadSectors (
+ ScsiDiskDevice,
+ Buffer,
+ Lba,
+ NumberOfBlocks,
+ Token
+ );
} else {
Status = ScsiDiskReadSectors (
ScsiDiskDevice,
@@ -1126,12 +1137,12 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -1147,8 +1158,7 @@ ScsiDiskWriteBlocksEx (
ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO2 (This);
Media = ScsiDiskDevice->BlkIo.Media;
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
-
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -1157,11 +1167,11 @@ ScsiDiskWriteBlocksEx (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -1176,33 +1186,37 @@ ScsiDiskWriteBlocksEx (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
+
//
// Get the intrinsic block size
//
- BlockSize = Media->BlockSize;
+ BlockSize = Media->BlockSize;
if (BlockSize == 0) {
Status = EFI_DEVICE_ERROR;
goto Done;
}
- NumberOfBlocks = BufferSize / BlockSize;
+ NumberOfBlocks = BufferSize / BlockSize;
if (!(Media->MediaPresent)) {
Status = EFI_NO_MEDIA;
@@ -1249,7 +1263,7 @@ ScsiDiskWriteBlocksEx (
goto Done;
}
- if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
+ if ((Media->IoAlign > 1) && (((UINTN)Buffer & (Media->IoAlign - 1)) != 0)) {
Status = EFI_INVALID_PARAMETER;
goto Done;
}
@@ -1260,13 +1274,13 @@ ScsiDiskWriteBlocksEx (
//
if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
- Status = ScsiDiskAsyncWriteSectors (
- ScsiDiskDevice,
- Buffer,
- Lba,
- NumberOfBlocks,
- Token
- );
+ Status = ScsiDiskAsyncWriteSectors (
+ ScsiDiskDevice,
+ Buffer,
+ Lba,
+ NumberOfBlocks,
+ Token
+ );
} else {
Status = ScsiDiskWriteSectors (
ScsiDiskDevice,
@@ -1313,8 +1327,7 @@ ScsiDiskFlushBlocksEx (
ScsiDiskDevice = SCSI_DISK_DEV_FROM_BLKIO2 (This);
Media = ScsiDiskDevice->BlkIo.Media;
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
-
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -1323,11 +1336,11 @@ ScsiDiskFlushBlocksEx (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -1342,19 +1355,22 @@ ScsiDiskFlushBlocksEx (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
@@ -1372,7 +1388,8 @@ ScsiDiskFlushBlocksEx (
//
// Wait for the BlockIo2 requests queue to become empty
//
- while (!IsListEmpty (&ScsiDiskDevice->AsyncTaskQueue));
+ while (!IsListEmpty (&ScsiDiskDevice->AsyncTaskQueue)) {
+ }
Status = EFI_SUCCESS;
@@ -1389,7 +1406,6 @@ Done:
return Status;
}
-
/**
Internal helper notify function which process the result of an asynchronous
SCSI UNMAP Command and signal the event passed from EraseBlocks.
@@ -1412,13 +1428,13 @@ ScsiDiskAsyncUnmapNotify (
gBS->CloseEvent (Event);
- EraseBlkReq = (SCSI_ERASEBLK_REQUEST *) Context;
+ EraseBlkReq = (SCSI_ERASEBLK_REQUEST *)Context;
CommandPacket = &EraseBlkReq->CommandPacket;
Token = EraseBlkReq->Token;
Token->TransactionStatus = EFI_SUCCESS;
Status = CheckHostAdapterStatus (CommandPacket->HostAdapterStatus);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ScsiDiskAsyncUnmapNotify: Host adapter indicating error status 0x%x.\n",
@@ -1430,7 +1446,7 @@ ScsiDiskAsyncUnmapNotify (
}
Status = CheckTargetStatus (CommandPacket->TargetStatus);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ScsiDiskAsyncUnmapNotify: Target indicating error status 0x%x.\n",
@@ -1465,10 +1481,10 @@ Done:
**/
EFI_STATUS
ScsiDiskUnmap (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Lba,
- IN UINTN Blocks,
- IN EFI_ERASE_BLOCK_TOKEN *Token OPTIONAL
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Lba,
+ IN UINTN Blocks,
+ IN EFI_ERASE_BLOCK_TOKEN *Token OPTIONAL
)
{
EFI_SCSI_IO_PROTOCOL *ScsiIo;
@@ -1494,7 +1510,7 @@ ScsiDiskUnmap (
AsyncUnmapEvent = NULL;
ReturnStatus = EFI_SUCCESS;
- if (Blocks / (UINTN) MaxLbaCnt > MaxBlkDespCnt) {
+ if (Blocks / (UINTN)MaxLbaCnt > MaxBlkDespCnt) {
ReturnStatus = EFI_DEVICE_ERROR;
goto Done;
}
@@ -1511,10 +1527,10 @@ ScsiDiskUnmap (
goto Done;
}
- BlkDespCnt = (UINT32) ((Blocks - 1) / MaxLbaCnt + 1);
- UnmapParamListLen = (UINT16) (sizeof (EFI_SCSI_DISK_UNMAP_PARAM_LIST_HEADER)
- + BlkDespCnt * sizeof (EFI_SCSI_DISK_UNMAP_BLOCK_DESP));
- UnmapParamList = AllocateZeroPool (UnmapParamListLen);
+ BlkDespCnt = (UINT32)((Blocks - 1) / MaxLbaCnt + 1);
+ UnmapParamListLen = (UINT16)(sizeof (EFI_SCSI_DISK_UNMAP_PARAM_LIST_HEADER)
+ + BlkDespCnt * sizeof (EFI_SCSI_DISK_UNMAP_BLOCK_DESP));
+ UnmapParamList = AllocateZeroPool (UnmapParamListLen);
if (UnmapParamList == NULL) {
ReturnStatus = EFI_DEVICE_ERROR;
goto Done;
@@ -1528,12 +1544,12 @@ ScsiDiskUnmap (
if (Blocks > MaxLbaCnt) {
*(UINT64 *)(&BlkDespPtr->Lba) = SwapBytes64 (Lba);
*(UINT32 *)(&BlkDespPtr->BlockNum) = SwapBytes32 (MaxLbaCnt);
- Blocks -= MaxLbaCnt;
- Lba += MaxLbaCnt;
+ Blocks -= MaxLbaCnt;
+ Lba += MaxLbaCnt;
} else {
*(UINT64 *)(&BlkDespPtr->Lba) = SwapBytes64 (Lba);
- *(UINT32 *)(&BlkDespPtr->BlockNum) = SwapBytes32 ((UINT32) Blocks);
- Blocks = 0;
+ *(UINT32 *)(&BlkDespPtr->BlockNum) = SwapBytes32 ((UINT32)Blocks);
+ Blocks = 0;
}
BlkDespPtr++;
@@ -1563,7 +1579,7 @@ ScsiDiskUnmap (
EraseBlkReq,
&AsyncUnmapEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
ReturnStatus = EFI_DEVICE_ERROR;
goto Done;
}
@@ -1579,7 +1595,7 @@ ScsiDiskUnmap (
CommandPacket,
AsyncUnmapEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
ReturnStatus = EFI_DEVICE_ERROR;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
@@ -1602,7 +1618,7 @@ ScsiDiskUnmap (
CommandPacket,
NULL
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
ReturnStatus = EFI_DEVICE_ERROR;
goto Done;
}
@@ -1612,7 +1628,7 @@ ScsiDiskUnmap (
// Only blocking UNMAP request will reach here.
//
Status = CheckHostAdapterStatus (CommandPacket->HostAdapterStatus);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ScsiDiskUnmap: Host adapter indicating error status 0x%x.\n",
@@ -1624,7 +1640,7 @@ ScsiDiskUnmap (
}
Status = CheckTargetStatus (CommandPacket->TargetStatus);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ScsiDiskUnmap: Target indicating error status 0x%x.\n",
@@ -1640,6 +1656,7 @@ Done:
if (EraseBlkReq->CommandPacket.Cdb != NULL) {
FreePool (EraseBlkReq->CommandPacket.Cdb);
}
+
FreePool (EraseBlkReq);
}
@@ -1684,11 +1701,11 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -1703,7 +1720,7 @@ ScsiDiskEraseBlocks (
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
ScsiDiskDevice = SCSI_DISK_DEV_FROM_ERASEBLK (This);
- if (!IS_DEVICE_FIXED(ScsiDiskDevice)) {
+ if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
if (EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
@@ -1712,11 +1729,11 @@ ScsiDiskEraseBlocks (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -1731,18 +1748,21 @@ ScsiDiskEraseBlocks (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
Status = EFI_MEDIA_CHANGED;
goto Done;
}
}
+
//
// Get the intrinsic block size
//
@@ -1768,6 +1788,7 @@ ScsiDiskEraseBlocks (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
Status = EFI_SUCCESS;
goto Done;
}
@@ -1862,14 +1883,14 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId OPTIONAL,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId OPTIONAL,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -1883,14 +1904,14 @@ ScsiDiskReceiveData (
VOID *AlignedBuffer;
BOOLEAN AlignedBufferAllocated;
- AlignedBuffer = NULL;
- MediaChange = FALSE;
- AlignedBufferAllocated = FALSE;
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_STORSEC (This);
- Media = ScsiDiskDevice->BlkIo.Media;
+ AlignedBuffer = NULL;
+ MediaChange = FALSE;
+ AlignedBufferAllocated = FALSE;
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_STORSEC (This);
+ Media = ScsiDiskDevice->BlkIo.Media;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
@@ -1901,11 +1922,11 @@ ScsiDiskReceiveData (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -1920,19 +1941,22 @@ ScsiDiskReceiveData (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
@@ -1962,6 +1986,7 @@ ScsiDiskReceiveData (
Status = EFI_OUT_OF_RESOURCES;
goto Done;
}
+
ZeroMem (AlignedBuffer, PayloadBufferSize);
AlignedBufferAllocated = TRUE;
} else {
@@ -1970,19 +1995,19 @@ ScsiDiskReceiveData (
}
Status = ScsiSecurityProtocolInCommand (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- SecurityProtocolId,
- SecurityProtocolSpecificData,
- FALSE,
- PayloadBufferSize,
- AlignedBuffer,
- PayloadTransferSize
- );
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ SecurityProtocolId,
+ SecurityProtocolSpecificData,
+ FALSE,
+ PayloadBufferSize,
+ AlignedBuffer,
+ PayloadTransferSize
+ );
if (EFI_ERROR (Status)) {
goto Done;
}
@@ -2011,6 +2036,7 @@ Done:
ZeroMem (AlignedBuffer, PayloadBufferSize);
FreeAlignedBuffer (AlignedBuffer, PayloadBufferSize);
}
+
gBS->RestoreTPL (OldTpl);
return Status;
}
@@ -2073,13 +2099,13 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskSendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId OPTIONAL,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId OPTIONAL,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer
)
{
SCSI_DISK_DEV *ScsiDiskDevice;
@@ -2093,14 +2119,14 @@ ScsiDiskSendData (
VOID *AlignedBuffer;
BOOLEAN AlignedBufferAllocated;
- AlignedBuffer = NULL;
- MediaChange = FALSE;
- AlignedBufferAllocated = FALSE;
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_STORSEC (This);
- Media = ScsiDiskDevice->BlkIo.Media;
+ AlignedBuffer = NULL;
+ MediaChange = FALSE;
+ AlignedBufferAllocated = FALSE;
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_STORSEC (This);
+ Media = ScsiDiskDevice->BlkIo.Media;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
if (!IS_DEVICE_FIXED (ScsiDiskDevice)) {
Status = ScsiDiskDetectMedia (ScsiDiskDevice, FALSE, &MediaChange);
@@ -2111,11 +2137,11 @@ ScsiDiskSendData (
if (MediaChange) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiBlockIoProtocolGuid,
- &ScsiDiskDevice->BlkIo,
- &ScsiDiskDevice->BlkIo
- );
+ ScsiDiskDevice->Handle,
+ &gEfiBlockIoProtocolGuid,
+ &ScsiDiskDevice->BlkIo,
+ &ScsiDiskDevice->BlkIo
+ );
gBS->ReinstallProtocolInterface (
ScsiDiskDevice->Handle,
&gEfiBlockIo2ProtocolGuid,
@@ -2130,19 +2156,22 @@ ScsiDiskSendData (
&ScsiDiskDevice->EraseBlock
);
}
+
if (DetermineInstallStorageSecurity (ScsiDiskDevice, ScsiDiskDevice->Handle)) {
gBS->ReinstallProtocolInterface (
- ScsiDiskDevice->Handle,
- &gEfiStorageSecurityCommandProtocolGuid,
- &ScsiDiskDevice->StorageSecurity,
- &ScsiDiskDevice->StorageSecurity
- );
+ ScsiDiskDevice->Handle,
+ &gEfiStorageSecurityCommandProtocolGuid,
+ &ScsiDiskDevice->StorageSecurity,
+ &ScsiDiskDevice->StorageSecurity
+ );
}
+
if (Media->MediaPresent) {
Status = EFI_MEDIA_CHANGED;
} else {
Status = EFI_NO_MEDIA;
}
+
goto Done;
}
}
@@ -2177,6 +2206,7 @@ ScsiDiskSendData (
Status = EFI_OUT_OF_RESOURCES;
goto Done;
}
+
CopyMem (AlignedBuffer, PayloadBuffer, PayloadBufferSize);
AlignedBufferAllocated = TRUE;
} else {
@@ -2185,18 +2215,18 @@ ScsiDiskSendData (
}
Status = ScsiSecurityProtocolOutCommand (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- SecurityProtocolId,
- SecurityProtocolSpecificData,
- FALSE,
- PayloadBufferSize,
- AlignedBuffer
- );
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ SecurityProtocolId,
+ SecurityProtocolSpecificData,
+ FALSE,
+ PayloadBufferSize,
+ AlignedBuffer
+ );
if (EFI_ERROR (Status)) {
goto Done;
}
@@ -2216,11 +2246,11 @@ Done:
ZeroMem (AlignedBuffer, PayloadBufferSize);
FreeAlignedBuffer (AlignedBuffer, PayloadBufferSize);
}
+
gBS->RestoreTPL (OldTpl);
return Status;
}
-
/**
Detect Device and read out capacity ,if error occurs, parse the sense key.
@@ -2234,31 +2264,31 @@ Done:
**/
EFI_STATUS
ScsiDiskDetectMedia (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN BOOLEAN MustReadCapacity,
- OUT BOOLEAN *MediaChange
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN BOOLEAN MustReadCapacity,
+ OUT BOOLEAN *MediaChange
)
{
- EFI_STATUS Status;
- EFI_SCSI_SENSE_DATA *SenseData;
- UINTN NumberOfSenseKeys;
- BOOLEAN NeedRetry;
- BOOLEAN NeedReadCapacity;
- UINT8 Retry;
- UINT8 MaxRetry;
- EFI_BLOCK_IO_MEDIA OldMedia;
- UINTN Action;
- EFI_EVENT TimeoutEvt;
-
- Status = EFI_SUCCESS;
- SenseData = NULL;
- NumberOfSenseKeys = 0;
- Retry = 0;
- MaxRetry = 3;
- Action = ACTION_NO_ACTION;
- NeedReadCapacity = FALSE;
- *MediaChange = FALSE;
- TimeoutEvt = NULL;
+ EFI_STATUS Status;
+ EFI_SCSI_SENSE_DATA *SenseData;
+ UINTN NumberOfSenseKeys;
+ BOOLEAN NeedRetry;
+ BOOLEAN NeedReadCapacity;
+ UINT8 Retry;
+ UINT8 MaxRetry;
+ EFI_BLOCK_IO_MEDIA OldMedia;
+ UINTN Action;
+ EFI_EVENT TimeoutEvt;
+
+ Status = EFI_SUCCESS;
+ SenseData = NULL;
+ NumberOfSenseKeys = 0;
+ Retry = 0;
+ MaxRetry = 3;
+ Action = ACTION_NO_ACTION;
+ NeedReadCapacity = FALSE;
+ *MediaChange = FALSE;
+ TimeoutEvt = NULL;
CopyMem (&OldMedia, ScsiDiskDevice->BlkIo.Media, sizeof (OldMedia));
@@ -2273,7 +2303,7 @@ ScsiDiskDetectMedia (
return Status;
}
- Status = gBS->SetTimer (TimeoutEvt, TimerRelative, EFI_TIMER_PERIOD_SECONDS(120));
+ Status = gBS->SetTimer (TimeoutEvt, TimerRelative, EFI_TIMER_PERIOD_SECONDS (120));
if (EFI_ERROR (Status)) {
goto EXIT;
}
@@ -2285,11 +2315,11 @@ ScsiDiskDetectMedia (
//
while (EFI_ERROR (gBS->CheckEvent (TimeoutEvt))) {
Status = ScsiDiskTestUnitReady (
- ScsiDiskDevice,
- &NeedRetry,
- &SenseData,
- &NumberOfSenseKeys
- );
+ ScsiDiskDevice,
+ &NeedRetry,
+ &SenseData,
+ &NumberOfSenseKeys
+ );
if (!EFI_ERROR (Status)) {
Status = DetectMediaParsingSenseKeys (
ScsiDiskDevice,
@@ -2328,8 +2358,8 @@ ScsiDiskDetectMedia (
// READ_CAPACITY command is not supported by any of the UFS WLUNs.
//
if (ScsiDiskDevice->DeviceType == EFI_SCSI_TYPE_WLUN) {
- NeedReadCapacity = FALSE;
- MustReadCapacity = FALSE;
+ NeedReadCapacity = FALSE;
+ MustReadCapacity = FALSE;
ScsiDiskDevice->BlkIo.Media->MediaPresent = TRUE;
}
@@ -2391,17 +2421,17 @@ ScsiDiskDetectMedia (
}
if (ScsiDiskDevice->BlkIo.Media->ReadOnly != OldMedia.ReadOnly) {
- *MediaChange = TRUE;
+ *MediaChange = TRUE;
ScsiDiskDevice->BlkIo.Media->MediaId += 1;
}
if (ScsiDiskDevice->BlkIo.Media->BlockSize != OldMedia.BlockSize) {
- *MediaChange = TRUE;
+ *MediaChange = TRUE;
ScsiDiskDevice->BlkIo.Media->MediaId += 1;
}
if (ScsiDiskDevice->BlkIo.Media->LastBlock != OldMedia.LastBlock) {
- *MediaChange = TRUE;
+ *MediaChange = TRUE;
ScsiDiskDevice->BlkIo.Media->MediaId += 1;
}
@@ -2425,10 +2455,10 @@ EXIT:
if (TimeoutEvt != NULL) {
gBS->CloseEvent (TimeoutEvt);
}
+
return Status;
}
-
/**
Send out Inquiry command to Device.
@@ -2441,40 +2471,40 @@ EXIT:
**/
EFI_STATUS
ScsiDiskInquiryDevice (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry
)
{
- UINT32 InquiryDataLength;
- UINT8 SenseDataLength;
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
- EFI_SCSI_SENSE_DATA *SenseDataArray;
- UINTN NumberOfSenseKeys;
- EFI_STATUS Status;
- UINT8 MaxRetry;
- UINT8 Index;
- EFI_SCSI_SUPPORTED_VPD_PAGES_VPD_PAGE *SupportedVpdPages;
- EFI_SCSI_BLOCK_LIMITS_VPD_PAGE *BlockLimits;
- UINTN PageLength;
+ UINT32 InquiryDataLength;
+ UINT8 SenseDataLength;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ EFI_SCSI_SENSE_DATA *SenseDataArray;
+ UINTN NumberOfSenseKeys;
+ EFI_STATUS Status;
+ UINT8 MaxRetry;
+ UINT8 Index;
+ EFI_SCSI_SUPPORTED_VPD_PAGES_VPD_PAGE *SupportedVpdPages;
+ EFI_SCSI_BLOCK_LIMITS_VPD_PAGE *BlockLimits;
+ UINTN PageLength;
InquiryDataLength = sizeof (EFI_SCSI_INQUIRY_DATA);
SenseDataLength = 0;
Status = ScsiInquiryCommand (
- ScsiDiskDevice->ScsiIo,
- SCSI_DISK_TIMEOUT,
- NULL,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- (VOID *) &(ScsiDiskDevice->InquiryData),
- &InquiryDataLength,
- FALSE
- );
- //
- // no need to check HostAdapterStatus and TargetStatus
- //
+ ScsiDiskDevice->ScsiIo,
+ SCSI_DISK_TIMEOUT,
+ NULL,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ (VOID *)&(ScsiDiskDevice->InquiryData),
+ &InquiryDataLength,
+ FALSE
+ );
+ //
+ // no need to check HostAdapterStatus and TargetStatus
+ //
if ((Status == EFI_SUCCESS) || (Status == EFI_WARN_BUFFER_TOO_SMALL)) {
ParseInquiryData (ScsiDiskDevice);
@@ -2487,41 +2517,49 @@ ScsiDiskInquiryDevice (
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
ZeroMem (SupportedVpdPages, sizeof (EFI_SCSI_SUPPORTED_VPD_PAGES_VPD_PAGE));
InquiryDataLength = sizeof (EFI_SCSI_SUPPORTED_VPD_PAGES_VPD_PAGE);
SenseDataLength = 0;
- Status = ScsiInquiryCommandEx (
- ScsiDiskDevice->ScsiIo,
- SCSI_DISK_TIMEOUT,
- NULL,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- (VOID *) SupportedVpdPages,
- &InquiryDataLength,
- TRUE,
- EFI_SCSI_PAGE_CODE_SUPPORTED_VPD
- );
+ Status = ScsiInquiryCommandEx (
+ ScsiDiskDevice->ScsiIo,
+ SCSI_DISK_TIMEOUT,
+ NULL,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ (VOID *)SupportedVpdPages,
+ &InquiryDataLength,
+ TRUE,
+ EFI_SCSI_PAGE_CODE_SUPPORTED_VPD
+ );
if (!EFI_ERROR (Status)) {
PageLength = (SupportedVpdPages->PageLength2 << 8)
- | SupportedVpdPages->PageLength1;
+ | SupportedVpdPages->PageLength1;
//
// Sanity checks for coping with broken devices
//
if (PageLength > sizeof SupportedVpdPages->SupportedVpdPageList) {
- DEBUG ((DEBUG_WARN,
+ DEBUG ((
+ DEBUG_WARN,
"%a: invalid PageLength (%u) in Supported VPD Pages page\n",
- __FUNCTION__, (UINT32)PageLength));
+ __FUNCTION__,
+ (UINT32)PageLength
+ ));
PageLength = 0;
}
if ((PageLength > 0) &&
(SupportedVpdPages->SupportedVpdPageList[0] !=
- EFI_SCSI_PAGE_CODE_SUPPORTED_VPD)) {
- DEBUG ((DEBUG_WARN,
+ EFI_SCSI_PAGE_CODE_SUPPORTED_VPD))
+ {
+ DEBUG ((
+ DEBUG_WARN,
"%a: Supported VPD Pages page doesn't start with code 0x%02x\n",
- __FUNCTION__, EFI_SCSI_PAGE_CODE_SUPPORTED_VPD));
+ __FUNCTION__,
+ EFI_SCSI_PAGE_CODE_SUPPORTED_VPD
+ ));
PageLength = 0;
}
@@ -2534,11 +2572,15 @@ ScsiDiskInquiryDevice (
//
if ((Index > 0) &&
(SupportedVpdPages->SupportedVpdPageList[Index] <=
- SupportedVpdPages->SupportedVpdPageList[Index - 1])) {
- DEBUG ((DEBUG_WARN,
+ SupportedVpdPages->SupportedVpdPageList[Index - 1]))
+ {
+ DEBUG ((
+ DEBUG_WARN,
"%a: non-ascending code in Supported VPD Pages page @ %u\n",
- __FUNCTION__, Index));
- Index = 0;
+ __FUNCTION__,
+ Index
+ ));
+ Index = 0;
PageLength = 0;
break;
}
@@ -2558,25 +2600,26 @@ ScsiDiskInquiryDevice (
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
ZeroMem (BlockLimits, sizeof (EFI_SCSI_BLOCK_LIMITS_VPD_PAGE));
InquiryDataLength = sizeof (EFI_SCSI_BLOCK_LIMITS_VPD_PAGE);
SenseDataLength = 0;
- Status = ScsiInquiryCommandEx (
- ScsiDiskDevice->ScsiIo,
- SCSI_DISK_TIMEOUT,
- NULL,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- (VOID *) BlockLimits,
- &InquiryDataLength,
- TRUE,
- EFI_SCSI_PAGE_CODE_BLOCK_LIMITS_VPD
- );
+ Status = ScsiInquiryCommandEx (
+ ScsiDiskDevice->ScsiIo,
+ SCSI_DISK_TIMEOUT,
+ NULL,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ (VOID *)BlockLimits,
+ &InquiryDataLength,
+ TRUE,
+ EFI_SCSI_PAGE_CODE_BLOCK_LIMITS_VPD
+ );
if (!EFI_ERROR (Status)) {
ScsiDiskDevice->BlkIo.Media->OptimalTransferLengthGranularity =
(BlockLimits->OptimalTransferLengthGranularity2 << 8) |
- BlockLimits->OptimalTransferLengthGranularity1;
+ BlockLimits->OptimalTransferLengthGranularity1;
ScsiDiskDevice->UnmapInfo.MaxLbaCnt =
(BlockLimits->MaximumUnmapLbaCount4 << 24) |
@@ -2622,15 +2665,14 @@ ScsiDiskInquiryDevice (
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
-
} else if (Status == EFI_NOT_READY) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if ((Status == EFI_INVALID_PARAMETER) || (Status == EFI_UNSUPPORTED)) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// go ahead to check HostAdapterStatus and TargetStatus
// (EFI_TIMEOUT, EFI_DEVICE_ERROR)
@@ -2641,9 +2683,9 @@ ScsiDiskInquiryDevice (
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
} else if (Status == EFI_DEVICE_ERROR) {
- //
- // reset the scsi channel
- //
+ //
+ // reset the scsi channel
+ //
ScsiDiskDevice->ScsiIo->ResetBus (ScsiDiskDevice->ScsiIo);
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
@@ -2657,7 +2699,6 @@ ScsiDiskInquiryDevice (
ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if (Status == EFI_DEVICE_ERROR) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
@@ -2671,12 +2712,12 @@ ScsiDiskInquiryDevice (
MaxRetry = 3;
for (Index = 0; Index < MaxRetry; Index++) {
Status = ScsiDiskRequestSenseKeys (
- ScsiDiskDevice,
- NeedRetry,
- &SenseDataArray,
- &NumberOfSenseKeys,
- TRUE
- );
+ ScsiDiskDevice,
+ NeedRetry,
+ &SenseDataArray,
+ &NumberOfSenseKeys,
+ TRUE
+ );
if (!EFI_ERROR (Status)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
@@ -2686,6 +2727,7 @@ ScsiDiskInquiryDevice (
return EFI_DEVICE_ERROR;
}
}
+
//
// ScsiDiskRequestSenseKeys() failed after several rounds of retry.
// set *NeedRetry = FALSE to avoid the outside caller try again.
@@ -2712,10 +2754,10 @@ ScsiDiskInquiryDevice (
**/
EFI_STATUS
ScsiDiskTestUnitReady (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys
)
{
EFI_STATUS Status;
@@ -2725,31 +2767,31 @@ ScsiDiskTestUnitReady (
UINT8 Index;
UINT8 MaxRetry;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
- *NumberOfSenseKeys = 0;
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ *NumberOfSenseKeys = 0;
//
// Parameter 3 and 4: do not require sense data, retrieve it when needed.
//
Status = ScsiTestUnitReadyCommand (
- ScsiDiskDevice->ScsiIo,
- SCSI_DISK_TIMEOUT,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus
- );
+ ScsiDiskDevice->ScsiIo,
+ SCSI_DISK_TIMEOUT,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus
+ );
//
// no need to check HostAdapterStatus and TargetStatus
//
if (Status == EFI_NOT_READY) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if ((Status == EFI_INVALID_PARAMETER) || (Status == EFI_UNSUPPORTED)) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// go ahead to check HostAdapterStatus and TargetStatus(in case of EFI_DEVICE_ERROR)
//
@@ -2758,7 +2800,6 @@ ScsiDiskTestUnitReady (
if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if (Status == EFI_DEVICE_ERROR) {
//
// reset the scsi channel
@@ -2776,7 +2817,6 @@ ScsiDiskTestUnitReady (
ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if (Status == EFI_DEVICE_ERROR) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
@@ -2791,12 +2831,12 @@ ScsiDiskTestUnitReady (
MaxRetry = 3;
for (Index = 0; Index < MaxRetry; Index++) {
Status = ScsiDiskRequestSenseKeys (
- ScsiDiskDevice,
- NeedRetry,
- SenseDataArray,
- NumberOfSenseKeys,
- FALSE
- );
+ ScsiDiskDevice,
+ NeedRetry,
+ SenseDataArray,
+ NumberOfSenseKeys,
+ FALSE
+ );
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
@@ -2805,6 +2845,7 @@ ScsiDiskTestUnitReady (
return EFI_DEVICE_ERROR;
}
}
+
//
// ScsiDiskRequestSenseKeys() failed after several rounds of retry.
// set *NeedRetry = FALSE to avoid the outside caller try again.
@@ -2827,13 +2868,13 @@ ScsiDiskTestUnitReady (
**/
EFI_STATUS
DetectMediaParsingSenseKeys (
- OUT SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN NumberOfSenseKeys,
- OUT UINTN *Action
+ OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN NumberOfSenseKeys,
+ OUT UINTN *Action
)
{
- BOOLEAN RetryLater;
+ BOOLEAN RetryLater;
//
// Default is to read capacity, unless..
@@ -2844,6 +2885,7 @@ DetectMediaParsingSenseKeys (
if (ScsiDiskDevice->BlkIo.Media->MediaPresent == TRUE) {
*Action = ACTION_NO_ACTION;
}
+
return EFI_SUCCESS;
}
@@ -2854,13 +2896,14 @@ DetectMediaParsingSenseKeys (
if (ScsiDiskDevice->BlkIo.Media->MediaPresent == TRUE) {
*Action = ACTION_NO_ACTION;
}
+
return EFI_SUCCESS;
}
if (ScsiDiskIsNoMedia (SenseData, NumberOfSenseKeys)) {
ScsiDiskDevice->BlkIo.Media->MediaPresent = FALSE;
ScsiDiskDevice->BlkIo.Media->LastBlock = 0;
- *Action = ACTION_NO_ACTION;
+ *Action = ACTION_NO_ACTION;
DEBUG ((DEBUG_VERBOSE, "ScsiDisk: ScsiDiskIsNoMedia\n"));
return EFI_SUCCESS;
}
@@ -2895,6 +2938,7 @@ DetectMediaParsingSenseKeys (
DEBUG ((DEBUG_VERBOSE, "ScsiDisk: ScsiDiskDriveNotReady!\n"));
return EFI_SUCCESS;
}
+
*Action = ACTION_NO_ACTION;
return EFI_DEVICE_ERROR;
}
@@ -2904,7 +2948,6 @@ DetectMediaParsingSenseKeys (
return EFI_SUCCESS;
}
-
/**
Send read capacity command to device and get the device parameter.
@@ -2919,29 +2962,30 @@ DetectMediaParsingSenseKeys (
**/
EFI_STATUS
ScsiDiskReadCapacity (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys
)
{
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
- EFI_STATUS CommandStatus;
- EFI_STATUS Status;
- UINT8 Index;
- UINT8 MaxRetry;
- UINT8 SenseDataLength;
- UINT32 DataLength10;
- UINT32 DataLength16;
- EFI_SCSI_DISK_CAPACITY_DATA *CapacityData10;
- EFI_SCSI_DISK_CAPACITY_DATA16 *CapacityData16;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ EFI_STATUS CommandStatus;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINT8 MaxRetry;
+ UINT8 SenseDataLength;
+ UINT32 DataLength10;
+ UINT32 DataLength16;
+ EFI_SCSI_DISK_CAPACITY_DATA *CapacityData10;
+ EFI_SCSI_DISK_CAPACITY_DATA16 *CapacityData16;
CapacityData10 = AllocateAlignedBuffer (ScsiDiskDevice, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
if (CapacityData10 == NULL) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
CapacityData16 = AllocateAlignedBuffer (ScsiDiskDevice, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
if (CapacityData16 == NULL) {
FreeAlignedBuffer (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
@@ -2949,14 +2993,14 @@ ScsiDiskReadCapacity (
return EFI_DEVICE_ERROR;
}
- SenseDataLength = 0;
- DataLength10 = sizeof (EFI_SCSI_DISK_CAPACITY_DATA);
- DataLength16 = sizeof (EFI_SCSI_DISK_CAPACITY_DATA16);
+ SenseDataLength = 0;
+ DataLength10 = sizeof (EFI_SCSI_DISK_CAPACITY_DATA);
+ DataLength16 = sizeof (EFI_SCSI_DISK_CAPACITY_DATA16);
ZeroMem (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
ZeroMem (CapacityData16, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
- *NumberOfSenseKeys = 0;
- *NeedRetry = FALSE;
+ *NumberOfSenseKeys = 0;
+ *NeedRetry = FALSE;
//
// submit Read Capacity(10) Command. If it returns capacity of FFFFFFFFh,
@@ -2969,14 +3013,15 @@ ScsiDiskReadCapacity (
&SenseDataLength,
&HostAdapterStatus,
&TargetStatus,
- (VOID *) CapacityData10,
+ (VOID *)CapacityData10,
&DataLength10,
FALSE
);
ScsiDiskDevice->Cdb16Byte = FALSE;
if ((!EFI_ERROR (CommandStatus)) && (CapacityData10->LastLba3 == 0xff) && (CapacityData10->LastLba2 == 0xff) &&
- (CapacityData10->LastLba1 == 0xff) && (CapacityData10->LastLba0 == 0xff)) {
+ (CapacityData10->LastLba1 == 0xff) && (CapacityData10->LastLba0 == 0xff))
+ {
//
// use Read Capacity (16), Read (16) and Write (16) next when hard disk size > 2TB
//
@@ -2992,44 +3037,43 @@ ScsiDiskReadCapacity (
&SenseDataLength,
&HostAdapterStatus,
&TargetStatus,
- (VOID *) CapacityData16,
+ (VOID *)CapacityData16,
&DataLength16,
FALSE
);
}
- //
- // no need to check HostAdapterStatus and TargetStatus
- //
- if (CommandStatus == EFI_SUCCESS) {
- GetMediaInfo (ScsiDiskDevice, CapacityData10, CapacityData16);
- FreeAlignedBuffer (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
- FreeAlignedBuffer (CapacityData16, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
- return EFI_SUCCESS;
- }
-
- FreeAlignedBuffer (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
- FreeAlignedBuffer (CapacityData16, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
-
- if (CommandStatus == EFI_NOT_READY) {
- *NeedRetry = TRUE;
- return EFI_DEVICE_ERROR;
- } else if ((CommandStatus == EFI_INVALID_PARAMETER) || (CommandStatus == EFI_UNSUPPORTED)) {
- *NeedRetry = FALSE;
- return EFI_DEVICE_ERROR;
- }
-
- //
- // go ahead to check HostAdapterStatus and TargetStatus
- // (EFI_TIMEOUT, EFI_DEVICE_ERROR, EFI_WARN_BUFFER_TOO_SMALL)
- //
-
- Status = CheckHostAdapterStatus (HostAdapterStatus);
- if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) {
- *NeedRetry = TRUE;
- return EFI_DEVICE_ERROR;
-
- } else if (Status == EFI_DEVICE_ERROR) {
+ //
+ // no need to check HostAdapterStatus and TargetStatus
+ //
+ if (CommandStatus == EFI_SUCCESS) {
+ GetMediaInfo (ScsiDiskDevice, CapacityData10, CapacityData16);
+ FreeAlignedBuffer (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
+ FreeAlignedBuffer (CapacityData16, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
+ return EFI_SUCCESS;
+ }
+
+ FreeAlignedBuffer (CapacityData10, sizeof (EFI_SCSI_DISK_CAPACITY_DATA));
+ FreeAlignedBuffer (CapacityData16, sizeof (EFI_SCSI_DISK_CAPACITY_DATA16));
+
+ if (CommandStatus == EFI_NOT_READY) {
+ *NeedRetry = TRUE;
+ return EFI_DEVICE_ERROR;
+ } else if ((CommandStatus == EFI_INVALID_PARAMETER) || (CommandStatus == EFI_UNSUPPORTED)) {
+ *NeedRetry = FALSE;
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // go ahead to check HostAdapterStatus and TargetStatus
+ // (EFI_TIMEOUT, EFI_DEVICE_ERROR, EFI_WARN_BUFFER_TOO_SMALL)
+ //
+
+ Status = CheckHostAdapterStatus (HostAdapterStatus);
+ if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) {
+ *NeedRetry = TRUE;
+ return EFI_DEVICE_ERROR;
+ } else if (Status == EFI_DEVICE_ERROR) {
//
// reset the scsi channel
//
@@ -3046,7 +3090,6 @@ ScsiDiskReadCapacity (
ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
-
} else if (Status == EFI_DEVICE_ERROR) {
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
@@ -3059,14 +3102,13 @@ ScsiDiskReadCapacity (
//
MaxRetry = 3;
for (Index = 0; Index < MaxRetry; Index++) {
-
Status = ScsiDiskRequestSenseKeys (
- ScsiDiskDevice,
- NeedRetry,
- SenseDataArray,
- NumberOfSenseKeys,
- TRUE
- );
+ ScsiDiskDevice,
+ NeedRetry,
+ SenseDataArray,
+ NumberOfSenseKeys,
+ TRUE
+ );
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
@@ -3075,6 +3117,7 @@ ScsiDiskReadCapacity (
return EFI_DEVICE_ERROR;
}
}
+
//
// ScsiDiskRequestSenseKeys() failed after several rounds of retry.
// set *NeedRetry = FALSE to avoid the outside caller try again.
@@ -3096,35 +3139,34 @@ ScsiDiskReadCapacity (
**/
EFI_STATUS
CheckHostAdapterStatus (
- IN UINT8 HostAdapterStatus
+ IN UINT8 HostAdapterStatus
)
{
switch (HostAdapterStatus) {
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OK:
- return EFI_SUCCESS;
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OK:
+ return EFI_SUCCESS;
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_SELECTION_TIMEOUT:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT_COMMAND:
- return EFI_TIMEOUT;
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_SELECTION_TIMEOUT:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT_COMMAND:
+ return EFI_TIMEOUT;
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_MESSAGE_REJECT:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PARITY_ERROR:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_REQUEST_SENSE_FAILED:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_RESET:
- return EFI_NOT_READY;
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_MESSAGE_REJECT:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PARITY_ERROR:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_REQUEST_SENSE_FAILED:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_RESET:
+ return EFI_NOT_READY;
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_FREE:
- case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PHASE_ERROR:
- return EFI_DEVICE_ERROR;
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_FREE:
+ case EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PHASE_ERROR:
+ return EFI_DEVICE_ERROR;
- default:
- return EFI_SUCCESS;
+ default:
+ return EFI_SUCCESS;
}
}
-
/**
Check the target status and re-interpret it in EFI_STATUS.
@@ -3137,30 +3179,29 @@ CheckHostAdapterStatus (
**/
EFI_STATUS
CheckTargetStatus (
- IN UINT8 TargetStatus
+ IN UINT8 TargetStatus
)
{
switch (TargetStatus) {
- case EFI_EXT_SCSI_STATUS_TARGET_GOOD:
- case EFI_EXT_SCSI_STATUS_TARGET_CHECK_CONDITION:
- case EFI_EXT_SCSI_STATUS_TARGET_CONDITION_MET:
- return EFI_SUCCESS;
+ case EFI_EXT_SCSI_STATUS_TARGET_GOOD:
+ case EFI_EXT_SCSI_STATUS_TARGET_CHECK_CONDITION:
+ case EFI_EXT_SCSI_STATUS_TARGET_CONDITION_MET:
+ return EFI_SUCCESS;
- case EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE:
- case EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE_CONDITION_MET:
- case EFI_EXT_SCSI_STATUS_TARGET_BUSY:
- case EFI_EXT_SCSI_STATUS_TARGET_TASK_SET_FULL:
- return EFI_NOT_READY;
+ case EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE:
+ case EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE_CONDITION_MET:
+ case EFI_EXT_SCSI_STATUS_TARGET_BUSY:
+ case EFI_EXT_SCSI_STATUS_TARGET_TASK_SET_FULL:
+ return EFI_NOT_READY;
- case EFI_EXT_SCSI_STATUS_TARGET_RESERVATION_CONFLICT:
- return EFI_DEVICE_ERROR;
+ case EFI_EXT_SCSI_STATUS_TARGET_RESERVATION_CONFLICT:
+ return EFI_DEVICE_ERROR;
- default:
- return EFI_SUCCESS;
+ default:
+ return EFI_SUCCESS;
}
}
-
/**
Retrieve all sense keys from the device.
@@ -3180,33 +3221,33 @@ CheckTargetStatus (
**/
EFI_STATUS
ScsiDiskRequestSenseKeys (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys,
- IN BOOLEAN AskResetIfError
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys,
+ IN BOOLEAN AskResetIfError
)
{
- EFI_SCSI_SENSE_DATA *PtrSenseData;
- UINT8 SenseDataLength;
- BOOLEAN SenseReq;
- EFI_STATUS Status;
- EFI_STATUS FallStatus;
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
+ EFI_SCSI_SENSE_DATA *PtrSenseData;
+ UINT8 SenseDataLength;
+ BOOLEAN SenseReq;
+ EFI_STATUS Status;
+ EFI_STATUS FallStatus;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
FallStatus = EFI_SUCCESS;
- SenseDataLength = (UINT8) sizeof (EFI_SCSI_SENSE_DATA);
+ SenseDataLength = (UINT8)sizeof (EFI_SCSI_SENSE_DATA);
ZeroMem (
ScsiDiskDevice->SenseData,
sizeof (EFI_SCSI_SENSE_DATA) * (ScsiDiskDevice->SenseDataNumber)
);
- *NumberOfSenseKeys = 0;
- *SenseDataArray = ScsiDiskDevice->SenseData;
- Status = EFI_SUCCESS;
- PtrSenseData = AllocateAlignedBuffer (ScsiDiskDevice, sizeof (EFI_SCSI_SENSE_DATA));
+ *NumberOfSenseKeys = 0;
+ *SenseDataArray = ScsiDiskDevice->SenseData;
+ Status = EFI_SUCCESS;
+ PtrSenseData = AllocateAlignedBuffer (ScsiDiskDevice, sizeof (EFI_SCSI_SENSE_DATA));
if (PtrSenseData == NULL) {
return EFI_DEVICE_ERROR;
}
@@ -3214,36 +3255,33 @@ ScsiDiskRequestSenseKeys (
for (SenseReq = TRUE; SenseReq;) {
ZeroMem (PtrSenseData, sizeof (EFI_SCSI_SENSE_DATA));
Status = ScsiRequestSenseCommand (
- ScsiDiskDevice->ScsiIo,
- SCSI_DISK_TIMEOUT,
- PtrSenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus
- );
- if ((Status == EFI_SUCCESS) || (Status == EFI_WARN_BUFFER_TOO_SMALL)) {
- FallStatus = EFI_SUCCESS;
-
- } else if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) {
- *NeedRetry = TRUE;
- FallStatus = EFI_DEVICE_ERROR;
-
- } else if ((Status == EFI_INVALID_PARAMETER) || (Status == EFI_UNSUPPORTED)) {
- *NeedRetry = FALSE;
- FallStatus = EFI_DEVICE_ERROR;
-
- } else if (Status == EFI_DEVICE_ERROR) {
- if (AskResetIfError) {
- ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
- }
+ ScsiDiskDevice->ScsiIo,
+ SCSI_DISK_TIMEOUT,
+ PtrSenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus
+ );
+ if ((Status == EFI_SUCCESS) || (Status == EFI_WARN_BUFFER_TOO_SMALL)) {
+ FallStatus = EFI_SUCCESS;
+ } else if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) {
+ *NeedRetry = TRUE;
+ FallStatus = EFI_DEVICE_ERROR;
+ } else if ((Status == EFI_INVALID_PARAMETER) || (Status == EFI_UNSUPPORTED)) {
+ *NeedRetry = FALSE;
+ FallStatus = EFI_DEVICE_ERROR;
+ } else if (Status == EFI_DEVICE_ERROR) {
+ if (AskResetIfError) {
+ ScsiDiskDevice->ScsiIo->ResetDevice (ScsiDiskDevice->ScsiIo);
+ }
- FallStatus = EFI_DEVICE_ERROR;
+ FallStatus = EFI_DEVICE_ERROR;
}
if (EFI_ERROR (FallStatus)) {
if (*NumberOfSenseKeys != 0) {
*NeedRetry = FALSE;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
goto EXIT;
} else {
Status = EFI_DEVICE_ERROR;
@@ -3259,7 +3297,8 @@ ScsiDiskRequestSenseKeys (
// skip the loop.
//
if ((PtrSenseData->Sense_Key == EFI_SCSI_SK_NO_SENSE) ||
- (*NumberOfSenseKeys == ScsiDiskDevice->SenseDataNumber)) {
+ (*NumberOfSenseKeys == ScsiDiskDevice->SenseDataNumber))
+ {
SenseReq = FALSE;
}
}
@@ -3269,7 +3308,6 @@ EXIT:
return Status;
}
-
/**
Get information from media read capacity command.
@@ -3285,25 +3323,25 @@ GetMediaInfo (
IN EFI_SCSI_DISK_CAPACITY_DATA16 *Capacity16
)
{
- UINT8 *Ptr;
+ UINT8 *Ptr;
if (!ScsiDiskDevice->Cdb16Byte) {
- ScsiDiskDevice->BlkIo.Media->LastBlock = ((UINT32) Capacity10->LastLba3 << 24) |
- (Capacity10->LastLba2 << 16) |
- (Capacity10->LastLba1 << 8) |
- Capacity10->LastLba0;
+ ScsiDiskDevice->BlkIo.Media->LastBlock = ((UINT32)Capacity10->LastLba3 << 24) |
+ (Capacity10->LastLba2 << 16) |
+ (Capacity10->LastLba1 << 8) |
+ Capacity10->LastLba0;
ScsiDiskDevice->BlkIo.Media->BlockSize = (Capacity10->BlockSize3 << 24) |
(Capacity10->BlockSize2 << 16) |
(Capacity10->BlockSize1 << 8) |
- Capacity10->BlockSize0;
- ScsiDiskDevice->BlkIo.Media->LowestAlignedLba = 0;
- ScsiDiskDevice->BlkIo.Media->LogicalBlocksPerPhysicalBlock = 0;
+ Capacity10->BlockSize0;
+ ScsiDiskDevice->BlkIo.Media->LowestAlignedLba = 0;
+ ScsiDiskDevice->BlkIo.Media->LogicalBlocksPerPhysicalBlock = 0;
if (!ScsiDiskDevice->BlockLimitsVpdSupported) {
- ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32) ScsiDiskDevice->BlkIo.Media->LastBlock;
+ ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32)ScsiDiskDevice->BlkIo.Media->LastBlock;
}
} else {
- Ptr = (UINT8*)&ScsiDiskDevice->BlkIo.Media->LastBlock;
+ Ptr = (UINT8 *)&ScsiDiskDevice->BlkIo.Media->LastBlock;
*Ptr++ = Capacity16->LastLba0;
*Ptr++ = Capacity16->LastLba1;
*Ptr++ = Capacity16->LastLba2;
@@ -3316,16 +3354,16 @@ GetMediaInfo (
ScsiDiskDevice->BlkIo.Media->BlockSize = (Capacity16->BlockSize3 << 24) |
(Capacity16->BlockSize2 << 16) |
(Capacity16->BlockSize1 << 8) |
- Capacity16->BlockSize0;
+ Capacity16->BlockSize0;
ScsiDiskDevice->BlkIo.Media->LowestAlignedLba = (Capacity16->LowestAlignLogic2 << 8) |
- Capacity16->LowestAlignLogic1;
- ScsiDiskDevice->BlkIo.Media->LogicalBlocksPerPhysicalBlock = (1 << Capacity16->LogicPerPhysical);
+ Capacity16->LowestAlignLogic1;
+ ScsiDiskDevice->BlkIo.Media->LogicalBlocksPerPhysicalBlock = (1 << Capacity16->LogicPerPhysical);
if (!ScsiDiskDevice->BlockLimitsVpdSupported) {
- if (ScsiDiskDevice->BlkIo.Media->LastBlock > (UINT32) -1) {
- ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32) -1;
+ if (ScsiDiskDevice->BlkIo.Media->LastBlock > (UINT32)-1) {
+ ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32)-1;
} else {
- ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32) ScsiDiskDevice->BlkIo.Media->LastBlock;
+ ScsiDiskDevice->UnmapInfo.MaxLbaCnt = (UINT32)ScsiDiskDevice->BlkIo.Media->LastBlock;
}
}
}
@@ -3341,11 +3379,11 @@ GetMediaInfo (
**/
VOID
ParseInquiryData (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice
)
{
- ScsiDiskDevice->FixedDevice = (BOOLEAN) ((ScsiDiskDevice->InquiryData.Rmb == 1) ? 0 : 1);
- ScsiDiskDevice->BlkIoMedia.RemovableMedia = (BOOLEAN) (!ScsiDiskDevice->FixedDevice);
+ ScsiDiskDevice->FixedDevice = (BOOLEAN)((ScsiDiskDevice->InquiryData.Rmb == 1) ? 0 : 1);
+ ScsiDiskDevice->BlkIoMedia.RemovableMedia = (BOOLEAN)(!ScsiDiskDevice->FixedDevice);
}
/**
@@ -3362,48 +3400,47 @@ ParseInquiryData (
**/
EFI_STATUS
ScsiDiskReadSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks
)
{
- UINTN BlocksRemaining;
- UINT8 *PtrBuffer;
- UINT32 BlockSize;
- UINT32 ByteCount;
- UINT32 MaxBlock;
- UINT32 SectorCount;
- UINT32 NextSectorCount;
- UINT64 Timeout;
- EFI_STATUS Status;
- UINT8 Index;
- UINT8 MaxRetry;
- BOOLEAN NeedRetry;
+ UINTN BlocksRemaining;
+ UINT8 *PtrBuffer;
+ UINT32 BlockSize;
+ UINT32 ByteCount;
+ UINT32 MaxBlock;
+ UINT32 SectorCount;
+ UINT32 NextSectorCount;
+ UINT64 Timeout;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINT8 MaxRetry;
+ BOOLEAN NeedRetry;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
- BlocksRemaining = NumberOfBlocks;
- BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
+ BlocksRemaining = NumberOfBlocks;
+ BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
//
// limit the data bytes that can be transferred by one Read(10) or Read(16) Command
//
if (!ScsiDiskDevice->Cdb16Byte) {
- MaxBlock = 0xFFFF;
+ MaxBlock = 0xFFFF;
} else {
- MaxBlock = 0xFFFFFFFF;
+ MaxBlock = 0xFFFFFFFF;
}
PtrBuffer = Buffer;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
if (!ScsiDiskDevice->Cdb16Byte) {
- SectorCount = (UINT16) BlocksRemaining;
+ SectorCount = (UINT16)BlocksRemaining;
} else {
- SectorCount = (UINT32) BlocksRemaining;
+ SectorCount = (UINT32)BlocksRemaining;
}
} else {
SectorCount = MaxBlock;
@@ -3442,31 +3479,32 @@ ScsiDiskReadSectors (
// to follow ATA spec in which it mentioned that the device may take up to 30s to respond
// commands in the Standby/Idle mode.
//
- Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
+ Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
- MaxRetry = 2;
+ MaxRetry = 2;
for (Index = 0; Index < MaxRetry; Index++) {
if (!ScsiDiskDevice->Cdb16Byte) {
Status = ScsiDiskRead10 (
- ScsiDiskDevice,
- &NeedRetry,
- Timeout,
- PtrBuffer,
- &ByteCount,
- (UINT32) Lba,
- SectorCount
- );
+ ScsiDiskDevice,
+ &NeedRetry,
+ Timeout,
+ PtrBuffer,
+ &ByteCount,
+ (UINT32)Lba,
+ SectorCount
+ );
} else {
Status = ScsiDiskRead16 (
- ScsiDiskDevice,
- &NeedRetry,
- Timeout,
- PtrBuffer,
- &ByteCount,
- Lba,
- SectorCount
- );
+ ScsiDiskDevice,
+ &NeedRetry,
+ Timeout,
+ PtrBuffer,
+ &ByteCount,
+ Lba,
+ SectorCount
+ );
}
+
if (!EFI_ERROR (Status)) {
break;
}
@@ -3505,8 +3543,8 @@ ScsiDiskReadSectors (
//
SectorCount = ByteCount / BlockSize;
- Lba += SectorCount;
- PtrBuffer = PtrBuffer + SectorCount * BlockSize;
+ Lba += SectorCount;
+ PtrBuffer = PtrBuffer + SectorCount * BlockSize;
BlocksRemaining -= SectorCount;
}
@@ -3527,48 +3565,47 @@ ScsiDiskReadSectors (
**/
EFI_STATUS
ScsiDiskWriteSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks
)
{
- UINTN BlocksRemaining;
- UINT8 *PtrBuffer;
- UINT32 BlockSize;
- UINT32 ByteCount;
- UINT32 MaxBlock;
- UINT32 SectorCount;
- UINT32 NextSectorCount;
- UINT64 Timeout;
- EFI_STATUS Status;
- UINT8 Index;
- UINT8 MaxRetry;
- BOOLEAN NeedRetry;
+ UINTN BlocksRemaining;
+ UINT8 *PtrBuffer;
+ UINT32 BlockSize;
+ UINT32 ByteCount;
+ UINT32 MaxBlock;
+ UINT32 SectorCount;
+ UINT32 NextSectorCount;
+ UINT64 Timeout;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINT8 MaxRetry;
+ BOOLEAN NeedRetry;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
- BlocksRemaining = NumberOfBlocks;
- BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
+ BlocksRemaining = NumberOfBlocks;
+ BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
//
// limit the data bytes that can be transferred by one Read(10) or Read(16) Command
//
if (!ScsiDiskDevice->Cdb16Byte) {
- MaxBlock = 0xFFFF;
+ MaxBlock = 0xFFFF;
} else {
- MaxBlock = 0xFFFFFFFF;
+ MaxBlock = 0xFFFFFFFF;
}
PtrBuffer = Buffer;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
if (!ScsiDiskDevice->Cdb16Byte) {
- SectorCount = (UINT16) BlocksRemaining;
+ SectorCount = (UINT16)BlocksRemaining;
} else {
- SectorCount = (UINT32) BlocksRemaining;
+ SectorCount = (UINT32)BlocksRemaining;
}
} else {
SectorCount = MaxBlock;
@@ -3607,30 +3644,31 @@ ScsiDiskWriteSectors (
// to follow ATA spec in which it mentioned that the device may take up to 30s to respond
// commands in the Standby/Idle mode.
//
- Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
- MaxRetry = 2;
+ Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
+ MaxRetry = 2;
for (Index = 0; Index < MaxRetry; Index++) {
if (!ScsiDiskDevice->Cdb16Byte) {
Status = ScsiDiskWrite10 (
- ScsiDiskDevice,
- &NeedRetry,
- Timeout,
- PtrBuffer,
- &ByteCount,
- (UINT32) Lba,
- SectorCount
- );
+ ScsiDiskDevice,
+ &NeedRetry,
+ Timeout,
+ PtrBuffer,
+ &ByteCount,
+ (UINT32)Lba,
+ SectorCount
+ );
} else {
Status = ScsiDiskWrite16 (
- ScsiDiskDevice,
- &NeedRetry,
- Timeout,
- PtrBuffer,
- &ByteCount,
- Lba,
- SectorCount
- );
- }
+ ScsiDiskDevice,
+ &NeedRetry,
+ Timeout,
+ PtrBuffer,
+ &ByteCount,
+ Lba,
+ SectorCount
+ );
+ }
+
if (!EFI_ERROR (Status)) {
break;
}
@@ -3663,13 +3701,14 @@ ScsiDiskWriteSectors (
if ((Index == MaxRetry) && (Status != EFI_SUCCESS)) {
return EFI_DEVICE_ERROR;
}
+
//
// actual transferred sectors
//
SectorCount = ByteCount / BlockSize;
- Lba += SectorCount;
- PtrBuffer = PtrBuffer + SectorCount * BlockSize;
+ Lba += SectorCount;
+ PtrBuffer = PtrBuffer + SectorCount * BlockSize;
BlocksRemaining -= SectorCount;
}
@@ -3693,23 +3732,23 @@ ScsiDiskWriteSectors (
**/
EFI_STATUS
ScsiDiskAsyncReadSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- UINTN BlocksRemaining;
- UINT8 *PtrBuffer;
- UINT32 BlockSize;
- UINT32 ByteCount;
- UINT32 MaxBlock;
- UINT32 SectorCount;
- UINT64 Timeout;
- SCSI_BLKIO2_REQUEST *BlkIo2Req;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ UINTN BlocksRemaining;
+ UINT8 *PtrBuffer;
+ UINT32 BlockSize;
+ UINT32 ByteCount;
+ UINT32 MaxBlock;
+ UINT32 SectorCount;
+ UINT64 Timeout;
+ SCSI_BLKIO2_REQUEST *BlkIo2Req;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
if ((Token == NULL) || (Token->Event == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -3720,7 +3759,7 @@ ScsiDiskAsyncReadSectors (
return EFI_OUT_OF_RESOURCES;
}
- BlkIo2Req->Token = Token;
+ BlkIo2Req->Token = Token;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&ScsiDiskDevice->AsyncTaskQueue, &BlkIo2Req->Link);
@@ -3728,30 +3767,29 @@ ScsiDiskAsyncReadSectors (
InitializeListHead (&BlkIo2Req->ScsiRWQueue);
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
- BlocksRemaining = NumberOfBlocks;
- BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
+ BlocksRemaining = NumberOfBlocks;
+ BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
//
// Limit the data bytes that can be transferred by one Read(10) or Read(16)
// Command
//
if (!ScsiDiskDevice->Cdb16Byte) {
- MaxBlock = 0xFFFF;
+ MaxBlock = 0xFFFF;
} else {
- MaxBlock = 0xFFFFFFFF;
+ MaxBlock = 0xFFFFFFFF;
}
PtrBuffer = Buffer;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
if (!ScsiDiskDevice->Cdb16Byte) {
- SectorCount = (UINT16) BlocksRemaining;
+ SectorCount = (UINT16)BlocksRemaining;
} else {
- SectorCount = (UINT32) BlocksRemaining;
+ SectorCount = (UINT32)BlocksRemaining;
}
} else {
SectorCount = MaxBlock;
@@ -3791,7 +3829,7 @@ ScsiDiskAsyncReadSectors (
// 30s is added to follow ATA spec in which it mentioned that the device
// may take up to 30s to respond commands in the Standby/Idle mode.
//
- Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
+ Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
if (!ScsiDiskDevice->Cdb16Byte) {
Status = ScsiDiskAsyncRead10 (
@@ -3800,7 +3838,7 @@ ScsiDiskAsyncReadSectors (
0,
PtrBuffer,
ByteCount,
- (UINT32) Lba,
+ (UINT32)Lba,
SectorCount,
BlkIo2Req,
Token
@@ -3818,6 +3856,7 @@ ScsiDiskAsyncReadSectors (
Token
);
}
+
if (EFI_ERROR (Status)) {
//
// Some devices will return EFI_DEVICE_ERROR or EFI_TIMEOUT when the data
@@ -3868,8 +3907,8 @@ ScsiDiskAsyncReadSectors (
//
SectorCount = ByteCount / BlockSize;
- Lba += SectorCount;
- PtrBuffer = PtrBuffer + SectorCount * BlockSize;
+ Lba += SectorCount;
+ PtrBuffer = PtrBuffer + SectorCount * BlockSize;
BlocksRemaining -= SectorCount;
}
@@ -3887,6 +3926,7 @@ Done:
gBS->SignalEvent (Token->Event);
}
+
gBS->RestoreTPL (OldTpl);
}
@@ -3910,23 +3950,23 @@ Done:
**/
EFI_STATUS
ScsiDiskAsyncWriteSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- UINTN BlocksRemaining;
- UINT8 *PtrBuffer;
- UINT32 BlockSize;
- UINT32 ByteCount;
- UINT32 MaxBlock;
- UINT32 SectorCount;
- UINT64 Timeout;
- SCSI_BLKIO2_REQUEST *BlkIo2Req;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ UINTN BlocksRemaining;
+ UINT8 *PtrBuffer;
+ UINT32 BlockSize;
+ UINT32 ByteCount;
+ UINT32 MaxBlock;
+ UINT32 SectorCount;
+ UINT64 Timeout;
+ SCSI_BLKIO2_REQUEST *BlkIo2Req;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
if ((Token == NULL) || (Token->Event == NULL)) {
return EFI_INVALID_PARAMETER;
@@ -3937,7 +3977,7 @@ ScsiDiskAsyncWriteSectors (
return EFI_OUT_OF_RESOURCES;
}
- BlkIo2Req->Token = Token;
+ BlkIo2Req->Token = Token;
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&ScsiDiskDevice->AsyncTaskQueue, &BlkIo2Req->Link);
@@ -3945,30 +3985,29 @@ ScsiDiskAsyncWriteSectors (
InitializeListHead (&BlkIo2Req->ScsiRWQueue);
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
- BlocksRemaining = NumberOfBlocks;
- BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
+ BlocksRemaining = NumberOfBlocks;
+ BlockSize = ScsiDiskDevice->BlkIo.Media->BlockSize;
//
// Limit the data bytes that can be transferred by one Read(10) or Read(16)
// Command
//
if (!ScsiDiskDevice->Cdb16Byte) {
- MaxBlock = 0xFFFF;
+ MaxBlock = 0xFFFF;
} else {
- MaxBlock = 0xFFFFFFFF;
+ MaxBlock = 0xFFFFFFFF;
}
PtrBuffer = Buffer;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
if (!ScsiDiskDevice->Cdb16Byte) {
- SectorCount = (UINT16) BlocksRemaining;
+ SectorCount = (UINT16)BlocksRemaining;
} else {
- SectorCount = (UINT32) BlocksRemaining;
+ SectorCount = (UINT32)BlocksRemaining;
}
} else {
SectorCount = MaxBlock;
@@ -4008,7 +4047,7 @@ ScsiDiskAsyncWriteSectors (
// 30s is added to follow ATA spec in which it mentioned that the device
// may take up to 30s to respond commands in the Standby/Idle mode.
//
- Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
+ Timeout = EFI_TIMER_PERIOD_SECONDS (ByteCount / 2100000 + 31);
if (!ScsiDiskDevice->Cdb16Byte) {
Status = ScsiDiskAsyncWrite10 (
@@ -4017,7 +4056,7 @@ ScsiDiskAsyncWriteSectors (
0,
PtrBuffer,
ByteCount,
- (UINT32) Lba,
+ (UINT32)Lba,
SectorCount,
BlkIo2Req,
Token
@@ -4035,6 +4074,7 @@ ScsiDiskAsyncWriteSectors (
Token
);
}
+
if (EFI_ERROR (Status)) {
//
// Some devices will return EFI_DEVICE_ERROR or EFI_TIMEOUT when the data
@@ -4085,8 +4125,8 @@ ScsiDiskAsyncWriteSectors (
//
SectorCount = ByteCount / BlockSize;
- Lba += SectorCount;
- PtrBuffer = PtrBuffer + SectorCount * BlockSize;
+ Lba += SectorCount;
+ PtrBuffer = PtrBuffer + SectorCount * BlockSize;
BlocksRemaining -= SectorCount;
}
@@ -4104,13 +4144,13 @@ Done:
gBS->SignalEvent (Token->Event);
}
+
gBS->RestoreTPL (OldTpl);
}
return Status;
}
-
/**
Submit Read(10) command.
@@ -4126,13 +4166,13 @@ Done:
**/
EFI_STATUS
ScsiDiskRead10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- OUT UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ OUT UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount
)
{
UINT8 SenseDataLength;
@@ -4151,23 +4191,23 @@ ScsiDiskRead10 (
// try again till the operation succeeds or fails with one sector transfer length.
//
BackOff:
- *NeedRetry = FALSE;
- Action = ACTION_NO_ACTION;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
- ReturnStatus = ScsiRead10Command (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- DataBuffer,
- DataLength,
- StartLba,
- SectorCount
- );
+ *NeedRetry = FALSE;
+ Action = ACTION_NO_ACTION;
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ ReturnStatus = ScsiRead10Command (
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ DataBuffer,
+ DataLength,
+ StartLba,
+ SectorCount
+ );
- if (ReturnStatus == EFI_NOT_READY || ReturnStatus == EFI_BAD_BUFFER_SIZE) {
+ if ((ReturnStatus == EFI_NOT_READY) || (ReturnStatus == EFI_BAD_BUFFER_SIZE)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
} else if ((ReturnStatus == EFI_INVALID_PARAMETER) || (ReturnStatus == EFI_UNSUPPORTED)) {
@@ -4219,11 +4259,12 @@ BackOff:
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// Try again with half length if the sense data shows we need to retry.
//
SectorCount >>= 1;
- *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
+ *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
goto BackOff;
} else {
*NeedRetry = FALSE;
@@ -4234,7 +4275,6 @@ BackOff:
return ReturnStatus;
}
-
/**
Submit Write(10) Command.
@@ -4251,13 +4291,13 @@ BackOff:
**/
EFI_STATUS
ScsiDiskWrite10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- IN UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ IN UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount
)
{
EFI_STATUS Status;
@@ -4276,22 +4316,22 @@ ScsiDiskWrite10 (
// try again till the operation succeeds or fails with one sector transfer length.
//
BackOff:
- *NeedRetry = FALSE;
- Action = ACTION_NO_ACTION;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
- ReturnStatus = ScsiWrite10Command (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- DataBuffer,
- DataLength,
- StartLba,
- SectorCount
- );
- if (ReturnStatus == EFI_NOT_READY || ReturnStatus == EFI_BAD_BUFFER_SIZE) {
+ *NeedRetry = FALSE;
+ Action = ACTION_NO_ACTION;
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ ReturnStatus = ScsiWrite10Command (
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ DataBuffer,
+ DataLength,
+ StartLba,
+ SectorCount
+ );
+ if ((ReturnStatus == EFI_NOT_READY) || (ReturnStatus == EFI_BAD_BUFFER_SIZE)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
} else if ((ReturnStatus == EFI_INVALID_PARAMETER) || (ReturnStatus == EFI_UNSUPPORTED)) {
@@ -4343,11 +4383,12 @@ BackOff:
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// Try again with half length if the sense data shows we need to retry.
//
SectorCount >>= 1;
- *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
+ *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
goto BackOff;
} else {
*NeedRetry = FALSE;
@@ -4358,7 +4399,6 @@ BackOff:
return ReturnStatus;
}
-
/**
Submit Read(16) command.
@@ -4374,13 +4414,13 @@ BackOff:
**/
EFI_STATUS
ScsiDiskRead16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- OUT UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ OUT UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount
)
{
UINT8 SenseDataLength;
@@ -4399,22 +4439,22 @@ ScsiDiskRead16 (
// try again till the operation succeeds or fails with one sector transfer length.
//
BackOff:
- *NeedRetry = FALSE;
- Action = ACTION_NO_ACTION;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
- ReturnStatus = ScsiRead16Command (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- DataBuffer,
- DataLength,
- StartLba,
- SectorCount
- );
- if (ReturnStatus == EFI_NOT_READY || ReturnStatus == EFI_BAD_BUFFER_SIZE) {
+ *NeedRetry = FALSE;
+ Action = ACTION_NO_ACTION;
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ ReturnStatus = ScsiRead16Command (
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ DataBuffer,
+ DataLength,
+ StartLba,
+ SectorCount
+ );
+ if ((ReturnStatus == EFI_NOT_READY) || (ReturnStatus == EFI_BAD_BUFFER_SIZE)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
} else if ((ReturnStatus == EFI_INVALID_PARAMETER) || (ReturnStatus == EFI_UNSUPPORTED)) {
@@ -4466,11 +4506,12 @@ BackOff:
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// Try again with half length if the sense data shows we need to retry.
//
SectorCount >>= 1;
- *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
+ *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
goto BackOff;
} else {
*NeedRetry = FALSE;
@@ -4481,7 +4522,6 @@ BackOff:
return ReturnStatus;
}
-
/**
Submit Write(16) Command.
@@ -4498,13 +4538,13 @@ BackOff:
**/
EFI_STATUS
ScsiDiskWrite16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- IN UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ IN UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount
)
{
EFI_STATUS Status;
@@ -4523,22 +4563,22 @@ ScsiDiskWrite16 (
// try again till the operation succeeds or fails with one sector transfer length.
//
BackOff:
- *NeedRetry = FALSE;
- Action = ACTION_NO_ACTION;
- SenseDataLength = (UINT8) (ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
- ReturnStatus = ScsiWrite16Command (
- ScsiDiskDevice->ScsiIo,
- Timeout,
- ScsiDiskDevice->SenseData,
- &SenseDataLength,
- &HostAdapterStatus,
- &TargetStatus,
- DataBuffer,
- DataLength,
- StartLba,
- SectorCount
- );
- if (ReturnStatus == EFI_NOT_READY || ReturnStatus == EFI_BAD_BUFFER_SIZE) {
+ *NeedRetry = FALSE;
+ Action = ACTION_NO_ACTION;
+ SenseDataLength = (UINT8)(ScsiDiskDevice->SenseDataNumber * sizeof (EFI_SCSI_SENSE_DATA));
+ ReturnStatus = ScsiWrite16Command (
+ ScsiDiskDevice->ScsiIo,
+ Timeout,
+ ScsiDiskDevice->SenseData,
+ &SenseDataLength,
+ &HostAdapterStatus,
+ &TargetStatus,
+ DataBuffer,
+ DataLength,
+ StartLba,
+ SectorCount
+ );
+ if ((ReturnStatus == EFI_NOT_READY) || (ReturnStatus == EFI_BAD_BUFFER_SIZE)) {
*NeedRetry = TRUE;
return EFI_DEVICE_ERROR;
} else if ((ReturnStatus == EFI_INVALID_PARAMETER) || (ReturnStatus == EFI_UNSUPPORTED)) {
@@ -4590,11 +4630,12 @@ BackOff:
*NeedRetry = FALSE;
return EFI_DEVICE_ERROR;
}
+
//
// Try again with half length if the sense data shows we need to retry.
//
SectorCount >>= 1;
- *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
+ *DataLength = SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
goto BackOff;
} else {
*NeedRetry = FALSE;
@@ -4605,7 +4646,6 @@ BackOff:
return ReturnStatus;
}
-
/**
Internal helper notify function in which determine whether retry of a SCSI
Read/Write command is needed and signal the event passed from Block I/O(2) if
@@ -4622,23 +4662,23 @@ ScsiDiskNotify (
IN VOID *Context
)
{
- EFI_STATUS Status;
- SCSI_ASYNC_RW_REQUEST *Request;
- SCSI_DISK_DEV *ScsiDiskDevice;
- EFI_BLOCK_IO2_TOKEN *Token;
- UINTN Action;
- UINT32 OldDataLength;
- UINT32 OldSectorCount;
- UINT8 MaxRetry;
+ EFI_STATUS Status;
+ SCSI_ASYNC_RW_REQUEST *Request;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ UINTN Action;
+ UINT32 OldDataLength;
+ UINT32 OldSectorCount;
+ UINT8 MaxRetry;
gBS->CloseEvent (Event);
- Request = (SCSI_ASYNC_RW_REQUEST *) Context;
- ScsiDiskDevice = Request->ScsiDiskDevice;
- Token = Request->BlkIo2Req->Token;
- OldDataLength = Request->DataLength;
- OldSectorCount = Request->SectorCount;
- MaxRetry = 2;
+ Request = (SCSI_ASYNC_RW_REQUEST *)Context;
+ ScsiDiskDevice = Request->ScsiDiskDevice;
+ Token = Request->BlkIo2Req->Token;
+ OldDataLength = Request->DataLength;
+ OldSectorCount = Request->SectorCount;
+ MaxRetry = 2;
//
// If previous sub-tasks already fails, no need to process this sub-task.
@@ -4710,13 +4750,14 @@ ScsiDiskNotify (
Token->TransactionStatus = EFI_DEVICE_ERROR;
goto Exit;
}
+
//
// Try again with two half length request if the sense data shows we need
// to retry.
//
Request->SectorCount >>= 1;
- Request->DataLength = Request->SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
- Request->TimesRetry = 0;
+ Request->DataLength = Request->SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize;
+ Request->TimesRetry = 0;
goto Retry;
} else {
@@ -4742,7 +4783,7 @@ Retry:
Request->TimesRetry,
Request->InBuffer,
Request->DataLength,
- (UINT32) Request->StartLba,
+ (UINT32)Request->StartLba,
Request->SectorCount,
Request->BlkIo2Req,
Token
@@ -4776,7 +4817,7 @@ Retry:
0,
Request->InBuffer + Request->SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize,
OldDataLength - Request->DataLength,
- (UINT32) Request->StartLba + Request->SectorCount,
+ (UINT32)Request->StartLba + Request->SectorCount,
OldSectorCount - Request->SectorCount,
Request->BlkIo2Req,
Token
@@ -4794,6 +4835,7 @@ Retry:
Token
);
}
+
if (EFI_ERROR (Status)) {
Token->TransactionStatus = EFI_DEVICE_ERROR;
goto Exit;
@@ -4810,7 +4852,7 @@ Retry:
Request->TimesRetry,
Request->OutBuffer,
Request->DataLength,
- (UINT32) Request->StartLba,
+ (UINT32)Request->StartLba,
Request->SectorCount,
Request->BlkIo2Req,
Token
@@ -4844,7 +4886,7 @@ Retry:
0,
Request->OutBuffer + Request->SectorCount * ScsiDiskDevice->BlkIo.Media->BlockSize,
OldDataLength - Request->DataLength,
- (UINT32) Request->StartLba + Request->SectorCount,
+ (UINT32)Request->StartLba + Request->SectorCount,
OldSectorCount - Request->SectorCount,
Request->BlkIo2Req,
Token
@@ -4862,6 +4904,7 @@ Retry:
Token
);
}
+
if (EFI_ERROR (Status)) {
Token->TransactionStatus = EFI_DEVICE_ERROR;
goto Exit;
@@ -4872,7 +4915,8 @@ Retry:
Exit:
RemoveEntryList (&Request->Link);
if ((IsListEmpty (&Request->BlkIo2Req->ScsiRWQueue)) &&
- (Request->BlkIo2Req->LastScsiRW)) {
+ (Request->BlkIo2Req->LastScsiRW))
+ {
//
// The last SCSI R/W command of a BlockIo2 request completes
//
@@ -4885,7 +4929,6 @@ Exit:
FreePool (Request);
}
-
/**
Submit Async Read(10) command.
@@ -4908,21 +4951,21 @@ Exit:
**/
EFI_STATUS
ScsiDiskAsyncRead10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- OUT UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ OUT UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- SCSI_ASYNC_RW_REQUEST *Request;
- EFI_EVENT AsyncIoEvent;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ SCSI_ASYNC_RW_REQUEST *Request;
+ EFI_EVENT AsyncIoEvent;
+ EFI_TPL OldTpl;
AsyncIoEvent = NULL;
@@ -4935,21 +4978,21 @@ ScsiDiskAsyncRead10 (
InsertTailList (&BlkIo2Req->ScsiRWQueue, &Request->Link);
gBS->RestoreTPL (OldTpl);
- Request->SenseDataLength = (UINT8) (6 * sizeof (EFI_SCSI_SENSE_DATA));
+ Request->SenseDataLength = (UINT8)(6 * sizeof (EFI_SCSI_SENSE_DATA));
Request->SenseData = AllocateZeroPool (Request->SenseDataLength);
if (Request->SenseData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- Request->ScsiDiskDevice = ScsiDiskDevice;
- Request->Timeout = Timeout;
- Request->TimesRetry = TimesRetry;
- Request->InBuffer = DataBuffer;
- Request->DataLength = DataLength;
- Request->StartLba = StartLba;
- Request->SectorCount = SectorCount;
- Request->BlkIo2Req = BlkIo2Req;
+ Request->ScsiDiskDevice = ScsiDiskDevice;
+ Request->Timeout = Timeout;
+ Request->TimesRetry = TimesRetry;
+ Request->InBuffer = DataBuffer;
+ Request->DataLength = DataLength;
+ Request->StartLba = StartLba;
+ Request->SectorCount = SectorCount;
+ Request->BlkIo2Req = BlkIo2Req;
//
// Create Event
@@ -4961,7 +5004,7 @@ ScsiDiskAsyncRead10 (
Request,
&AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -4974,11 +5017,11 @@ ScsiDiskAsyncRead10 (
&Request->TargetStatus,
Request->InBuffer,
&Request->DataLength,
- (UINT32) Request->StartLba,
+ (UINT32)Request->StartLba,
Request->SectorCount,
AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5004,7 +5047,6 @@ ErrorExit:
return Status;
}
-
/**
Submit Async Write(10) command.
@@ -5027,21 +5069,21 @@ ErrorExit:
**/
EFI_STATUS
ScsiDiskAsyncWrite10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- IN UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ IN UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- SCSI_ASYNC_RW_REQUEST *Request;
- EFI_EVENT AsyncIoEvent;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ SCSI_ASYNC_RW_REQUEST *Request;
+ EFI_EVENT AsyncIoEvent;
+ EFI_TPL OldTpl;
AsyncIoEvent = NULL;
@@ -5054,21 +5096,21 @@ ScsiDiskAsyncWrite10 (
InsertTailList (&BlkIo2Req->ScsiRWQueue, &Request->Link);
gBS->RestoreTPL (OldTpl);
- Request->SenseDataLength = (UINT8) (6 * sizeof (EFI_SCSI_SENSE_DATA));
+ Request->SenseDataLength = (UINT8)(6 * sizeof (EFI_SCSI_SENSE_DATA));
Request->SenseData = AllocateZeroPool (Request->SenseDataLength);
if (Request->SenseData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- Request->ScsiDiskDevice = ScsiDiskDevice;
- Request->Timeout = Timeout;
- Request->TimesRetry = TimesRetry;
- Request->OutBuffer = DataBuffer;
- Request->DataLength = DataLength;
- Request->StartLba = StartLba;
- Request->SectorCount = SectorCount;
- Request->BlkIo2Req = BlkIo2Req;
+ Request->ScsiDiskDevice = ScsiDiskDevice;
+ Request->Timeout = Timeout;
+ Request->TimesRetry = TimesRetry;
+ Request->OutBuffer = DataBuffer;
+ Request->DataLength = DataLength;
+ Request->StartLba = StartLba;
+ Request->SectorCount = SectorCount;
+ Request->BlkIo2Req = BlkIo2Req;
//
// Create Event
@@ -5080,7 +5122,7 @@ ScsiDiskAsyncWrite10 (
Request,
&AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5093,11 +5135,11 @@ ScsiDiskAsyncWrite10 (
&Request->TargetStatus,
Request->OutBuffer,
&Request->DataLength,
- (UINT32) Request->StartLba,
+ (UINT32)Request->StartLba,
Request->SectorCount,
AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5123,7 +5165,6 @@ ErrorExit:
return Status;
}
-
/**
Submit Async Read(16) command.
@@ -5146,21 +5187,21 @@ ErrorExit:
**/
EFI_STATUS
ScsiDiskAsyncRead16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- OUT UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ OUT UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- SCSI_ASYNC_RW_REQUEST *Request;
- EFI_EVENT AsyncIoEvent;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ SCSI_ASYNC_RW_REQUEST *Request;
+ EFI_EVENT AsyncIoEvent;
+ EFI_TPL OldTpl;
AsyncIoEvent = NULL;
@@ -5173,21 +5214,21 @@ ScsiDiskAsyncRead16 (
InsertTailList (&BlkIo2Req->ScsiRWQueue, &Request->Link);
gBS->RestoreTPL (OldTpl);
- Request->SenseDataLength = (UINT8) (6 * sizeof (EFI_SCSI_SENSE_DATA));
+ Request->SenseDataLength = (UINT8)(6 * sizeof (EFI_SCSI_SENSE_DATA));
Request->SenseData = AllocateZeroPool (Request->SenseDataLength);
if (Request->SenseData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- Request->ScsiDiskDevice = ScsiDiskDevice;
- Request->Timeout = Timeout;
- Request->TimesRetry = TimesRetry;
- Request->InBuffer = DataBuffer;
- Request->DataLength = DataLength;
- Request->StartLba = StartLba;
- Request->SectorCount = SectorCount;
- Request->BlkIo2Req = BlkIo2Req;
+ Request->ScsiDiskDevice = ScsiDiskDevice;
+ Request->Timeout = Timeout;
+ Request->TimesRetry = TimesRetry;
+ Request->InBuffer = DataBuffer;
+ Request->DataLength = DataLength;
+ Request->StartLba = StartLba;
+ Request->SectorCount = SectorCount;
+ Request->BlkIo2Req = BlkIo2Req;
//
// Create Event
@@ -5199,7 +5240,7 @@ ScsiDiskAsyncRead16 (
Request,
&AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5216,7 +5257,7 @@ ScsiDiskAsyncRead16 (
Request->SectorCount,
AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5242,7 +5283,6 @@ ErrorExit:
return Status;
}
-
/**
Submit Async Write(16) command.
@@ -5265,21 +5305,21 @@ ErrorExit:
**/
EFI_STATUS
ScsiDiskAsyncWrite16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- IN UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ IN UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- SCSI_ASYNC_RW_REQUEST *Request;
- EFI_EVENT AsyncIoEvent;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ SCSI_ASYNC_RW_REQUEST *Request;
+ EFI_EVENT AsyncIoEvent;
+ EFI_TPL OldTpl;
AsyncIoEvent = NULL;
@@ -5292,21 +5332,21 @@ ScsiDiskAsyncWrite16 (
InsertTailList (&BlkIo2Req->ScsiRWQueue, &Request->Link);
gBS->RestoreTPL (OldTpl);
- Request->SenseDataLength = (UINT8) (6 * sizeof (EFI_SCSI_SENSE_DATA));
+ Request->SenseDataLength = (UINT8)(6 * sizeof (EFI_SCSI_SENSE_DATA));
Request->SenseData = AllocateZeroPool (Request->SenseDataLength);
if (Request->SenseData == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto ErrorExit;
}
- Request->ScsiDiskDevice = ScsiDiskDevice;
- Request->Timeout = Timeout;
- Request->TimesRetry = TimesRetry;
- Request->OutBuffer = DataBuffer;
- Request->DataLength = DataLength;
- Request->StartLba = StartLba;
- Request->SectorCount = SectorCount;
- Request->BlkIo2Req = BlkIo2Req;
+ Request->ScsiDiskDevice = ScsiDiskDevice;
+ Request->Timeout = Timeout;
+ Request->TimesRetry = TimesRetry;
+ Request->OutBuffer = DataBuffer;
+ Request->DataLength = DataLength;
+ Request->StartLba = StartLba;
+ Request->SectorCount = SectorCount;
+ Request->BlkIo2Req = BlkIo2Req;
//
// Create Event
@@ -5318,7 +5358,7 @@ ScsiDiskAsyncWrite16 (
Request,
&AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5335,7 +5375,7 @@ ScsiDiskAsyncWrite16 (
Request->SectorCount,
AsyncIoEvent
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -5361,7 +5401,6 @@ ErrorExit:
return Status;
}
-
/**
Check sense key to find if media presents.
@@ -5373,13 +5412,13 @@ ErrorExit:
**/
BOOLEAN
ScsiDiskIsNoMedia (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsNoMedia;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsNoMedia;
IsNoMedia = FALSE;
SensePtr = SenseData;
@@ -5390,16 +5429,17 @@ ScsiDiskIsNoMedia (
// Additional Sense Code is ASC_NO_MEDIA (0x3A)
//
if ((SensePtr->Sense_Key == EFI_SCSI_SK_NOT_READY) &&
- (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_NO_MEDIA)) {
+ (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_NO_MEDIA))
+ {
IsNoMedia = TRUE;
}
+
SensePtr++;
}
return IsNoMedia;
}
-
/**
Parse sense key.
@@ -5412,70 +5452,68 @@ ScsiDiskIsNoMedia (
**/
BOOLEAN
ScsiDiskIsMediaError (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsError;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsError;
- IsError = FALSE;
- SensePtr = SenseData;
+ IsError = FALSE;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->Sense_Key) {
+ case EFI_SCSI_SK_MEDIUM_ERROR:
+ //
+ // Sense Key is EFI_SCSI_SK_MEDIUM_ERROR (0x3)
+ //
+ switch (SensePtr->Addnl_Sense_Code) {
+ //
+ // fall through
+ //
+ case EFI_SCSI_ASC_MEDIA_ERR1:
- case EFI_SCSI_SK_MEDIUM_ERROR:
- //
- // Sense Key is EFI_SCSI_SK_MEDIUM_ERROR (0x3)
- //
- switch (SensePtr->Addnl_Sense_Code) {
+ //
+ // fall through
+ //
+ case EFI_SCSI_ASC_MEDIA_ERR2:
- //
- // fall through
- //
- case EFI_SCSI_ASC_MEDIA_ERR1:
+ //
+ // fall through
+ //
+ case EFI_SCSI_ASC_MEDIA_ERR3:
+ case EFI_SCSI_ASC_MEDIA_ERR4:
+ IsError = TRUE;
+ break;
- //
- // fall through
- //
- case EFI_SCSI_ASC_MEDIA_ERR2:
+ default:
+ break;
+ }
- //
- // fall through
- //
- case EFI_SCSI_ASC_MEDIA_ERR3:
- case EFI_SCSI_ASC_MEDIA_ERR4:
- IsError = TRUE;
break;
- default:
- break;
- }
+ case EFI_SCSI_SK_NOT_READY:
+ //
+ // Sense Key is EFI_SCSI_SK_NOT_READY (0x2)
+ //
+ switch (SensePtr->Addnl_Sense_Code) {
+ //
+ // Additional Sense Code is ASC_MEDIA_UPSIDE_DOWN (0x6)
+ //
+ case EFI_SCSI_ASC_MEDIA_UPSIDE_DOWN:
+ IsError = TRUE;
+ break;
- break;
+ default:
+ break;
+ }
- case EFI_SCSI_SK_NOT_READY:
- //
- // Sense Key is EFI_SCSI_SK_NOT_READY (0x2)
- //
- switch (SensePtr->Addnl_Sense_Code) {
- //
- // Additional Sense Code is ASC_MEDIA_UPSIDE_DOWN (0x6)
- //
- case EFI_SCSI_ASC_MEDIA_UPSIDE_DOWN:
- IsError = TRUE;
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
@@ -5484,7 +5522,6 @@ ScsiDiskIsMediaError (
return IsError;
}
-
/**
Check sense key to find if hardware error happens.
@@ -5497,19 +5534,18 @@ ScsiDiskIsMediaError (
**/
BOOLEAN
ScsiDiskIsHardwareError (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsError;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsError;
- IsError = FALSE;
- SensePtr = SenseData;
+ IsError = FALSE;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
//
// Sense Key is EFI_SCSI_SK_HARDWARE_ERROR (0x4)
//
@@ -5523,7 +5559,6 @@ ScsiDiskIsHardwareError (
return IsError;
}
-
/**
Check sense key to find if media has changed.
@@ -5535,16 +5570,16 @@ ScsiDiskIsHardwareError (
**/
BOOLEAN
ScsiDiskIsMediaChange (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsMediaChanged;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsMediaChanged;
- IsMediaChanged = FALSE;
- SensePtr = SenseData;
+ IsMediaChanged = FALSE;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
//
@@ -5552,7 +5587,8 @@ ScsiDiskIsMediaChange (
// Additional sense code is EFI_SCSI_ASC_MEDIA_CHANGE (0x28)
//
if ((SensePtr->Sense_Key == EFI_SCSI_SK_UNIT_ATTENTION) &&
- (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_CHANGE)) {
+ (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_CHANGE))
+ {
IsMediaChanged = TRUE;
}
@@ -5574,25 +5610,25 @@ ScsiDiskIsMediaChange (
**/
BOOLEAN
ScsiDiskIsResetBefore (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsResetBefore;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsResetBefore;
IsResetBefore = FALSE;
SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
//
// Sense Key is EFI_SCSI_SK_UNIT_ATTENTION (0x6)
// Additional Sense Code is EFI_SCSI_ASC_RESET (0x29)
//
if ((SensePtr->Sense_Key == EFI_SCSI_SK_UNIT_ATTENTION) &&
- (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_RESET)) {
+ (SensePtr->Addnl_Sense_Code == EFI_SCSI_ASC_RESET))
+ {
IsResetBefore = TRUE;
}
@@ -5615,56 +5651,56 @@ ScsiDiskIsResetBefore (
**/
BOOLEAN
ScsiDiskIsDriveReady (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts,
- OUT BOOLEAN *RetryLater
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts,
+ OUT BOOLEAN *RetryLater
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN IsReady;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN IsReady;
IsReady = TRUE;
*RetryLater = FALSE;
SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->Sense_Key) {
-
- case EFI_SCSI_SK_NOT_READY:
- //
- // Sense Key is EFI_SCSI_SK_NOT_READY (0x2)
- //
- switch (SensePtr->Addnl_Sense_Code) {
- case EFI_SCSI_ASC_NOT_READY:
+ case EFI_SCSI_SK_NOT_READY:
//
- // Additional Sense Code is EFI_SCSI_ASC_NOT_READY (0x4)
+ // Sense Key is EFI_SCSI_SK_NOT_READY (0x2)
//
- switch (SensePtr->Addnl_Sense_Code_Qualifier) {
- case EFI_SCSI_ASCQ_IN_PROGRESS:
- //
- // Additional Sense Code Qualifier is
- // EFI_SCSI_ASCQ_IN_PROGRESS (0x1)
- //
- IsReady = FALSE;
- *RetryLater = TRUE;
- break;
+ switch (SensePtr->Addnl_Sense_Code) {
+ case EFI_SCSI_ASC_NOT_READY:
+ //
+ // Additional Sense Code is EFI_SCSI_ASC_NOT_READY (0x4)
+ //
+ switch (SensePtr->Addnl_Sense_Code_Qualifier) {
+ case EFI_SCSI_ASCQ_IN_PROGRESS:
+ //
+ // Additional Sense Code Qualifier is
+ // EFI_SCSI_ASCQ_IN_PROGRESS (0x1)
+ //
+ IsReady = FALSE;
+ *RetryLater = TRUE;
+ break;
+
+ default:
+ IsReady = FALSE;
+ *RetryLater = FALSE;
+ break;
+ }
- default:
- IsReady = FALSE;
- *RetryLater = FALSE;
- break;
+ break;
+
+ default:
+ break;
}
+
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
@@ -5685,13 +5721,13 @@ ScsiDiskIsDriveReady (
**/
BOOLEAN
ScsiDiskHaveSenseKey (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
- EFI_SCSI_SENSE_DATA *SensePtr;
- UINTN Index;
- BOOLEAN HaveSenseKey;
+ EFI_SCSI_SENSE_DATA *SensePtr;
+ UINTN Index;
+ BOOLEAN HaveSenseKey;
if (SenseCounts == 0) {
HaveSenseKey = FALSE;
@@ -5702,12 +5738,12 @@ ScsiDiskHaveSenseKey (
SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
//
// Sense Key is SK_NO_SENSE (0x0)
//
if ((SensePtr->Sense_Key == EFI_SCSI_SK_NO_SENSE) &&
- (Index == 0)) {
+ (Index == 0))
+ {
HaveSenseKey = FALSE;
}
@@ -5725,11 +5761,11 @@ ScsiDiskHaveSenseKey (
**/
VOID
ReleaseScsiDiskDeviceResources (
- IN SCSI_DISK_DEV *ScsiDiskDevice
+ IN SCSI_DISK_DEV *ScsiDiskDevice
)
{
if (ScsiDiskDevice == NULL) {
- return ;
+ return;
}
if (ScsiDiskDevice->SenseData != NULL) {
@@ -5759,11 +5795,11 @@ ReleaseScsiDiskDeviceResources (
**/
BOOLEAN
DetermineInstallBlockIo (
- IN EFI_HANDLE ChildHandle
+ IN EFI_HANDLE ChildHandle
)
{
- EFI_SCSI_PASS_THRU_PROTOCOL *ScsiPassThru;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiPassThru;
+ EFI_SCSI_PASS_THRU_PROTOCOL *ScsiPassThru;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiPassThru;
//
// Firstly, check if ExtScsiPassThru Protocol parent handle exists. If existence,
@@ -5805,15 +5841,15 @@ DetermineInstallBlockIo (
VOID *
EFIAPI
GetParentProtocol (
- IN EFI_GUID *ProtocolGuid,
- IN EFI_HANDLE ChildHandle
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_HANDLE ChildHandle
)
{
- UINTN Index;
- UINTN HandleCount;
- VOID *Interface;
- EFI_STATUS Status;
- EFI_HANDLE *HandleBuffer;
+ UINTN Index;
+ UINTN HandleCount;
+ VOID *Interface;
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
//
// Retrieve the list of all handles from the handle database
@@ -5860,20 +5896,20 @@ GetParentProtocol (
**/
BOOLEAN
DetermineInstallEraseBlock (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
)
{
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
- EFI_STATUS CommandStatus;
- EFI_STATUS Status;
- BOOLEAN UfsDevice;
- BOOLEAN RetVal;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
- UINT8 SenseDataLength;
- UINT32 DataLength16;
- EFI_SCSI_DISK_CAPACITY_DATA16 *CapacityData16;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ EFI_STATUS CommandStatus;
+ EFI_STATUS Status;
+ BOOLEAN UfsDevice;
+ BOOLEAN RetVal;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
+ UINT8 SenseDataLength;
+ UINT32 DataLength16;
+ EFI_SCSI_DISK_CAPACITY_DATA16 *CapacityData16;
UfsDevice = FALSE;
RetVal = TRUE;
@@ -5890,7 +5926,7 @@ DetermineInstallEraseBlock (
Status = gBS->HandleProtocol (
ChildHandle,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePathNode
+ (VOID **)&DevicePathNode
);
//
// Device Path protocol must be installed on the device handle.
@@ -5902,13 +5938,15 @@ DetermineInstallEraseBlock (
// For now, only support Erase Block Protocol on UFS devices.
//
if ((DevicePathNode->Type == MESSAGING_DEVICE_PATH) &&
- (DevicePathNode->SubType == MSG_UFS_DP)) {
+ (DevicePathNode->SubType == MSG_UFS_DP))
+ {
UfsDevice = TRUE;
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
+
if (!UfsDevice) {
RetVal = FALSE;
goto Done;
@@ -5934,7 +5972,7 @@ DetermineInstallEraseBlock (
&SenseDataLength,
&HostAdapterStatus,
&TargetStatus,
- (VOID *) CapacityData16,
+ (VOID *)CapacityData16,
&DataLength16,
FALSE
);
@@ -5946,7 +5984,8 @@ DetermineInstallEraseBlock (
// Bits TPE and TPRZ should both be set to enable the erase feature on UFS.
//
if (((CapacityData16->LowestAlignLogic2 & BIT7) == 0) ||
- ((CapacityData16->LowestAlignLogic2 & BIT6) == 0)) {
+ ((CapacityData16->LowestAlignLogic2 & BIT6) == 0))
+ {
DEBUG ((
DEBUG_VERBOSE,
"ScsiDisk EraseBlock: Either TPE or TPRZ is not set: 0x%x.\n",
@@ -5971,7 +6010,8 @@ DetermineInstallEraseBlock (
// Check whether the UFS device server implements the UNMAP command.
//
if ((ScsiDiskDevice->UnmapInfo.MaxLbaCnt == 0) ||
- (ScsiDiskDevice->UnmapInfo.MaxBlkDespCnt == 0)) {
+ (ScsiDiskDevice->UnmapInfo.MaxBlkDespCnt == 0))
+ {
DEBUG ((
DEBUG_VERBOSE,
"ScsiDisk EraseBlock: The device server does not implement the UNMAP command.\n"
@@ -6001,22 +6041,22 @@ Done:
**/
BOOLEAN
DetermineInstallStorageSecurity (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
)
{
- EFI_STATUS Status;
- UFS_DEVICE_PATH *UfsDevice;
- BOOLEAN RetVal;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
+ EFI_STATUS Status;
+ UFS_DEVICE_PATH *UfsDevice;
+ BOOLEAN RetVal;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
- UfsDevice = NULL;
- RetVal = TRUE;
+ UfsDevice = NULL;
+ RetVal = TRUE;
Status = gBS->HandleProtocol (
ChildHandle,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePathNode
+ (VOID **)&DevicePathNode
);
//
// Device Path protocol must be installed on the device handle.
@@ -6028,13 +6068,15 @@ DetermineInstallStorageSecurity (
// For now, only support Storage Security Command Protocol on UFS devices.
//
if ((DevicePathNode->Type == MESSAGING_DEVICE_PATH) &&
- (DevicePathNode->SubType == MSG_UFS_DP)) {
- UfsDevice = (UFS_DEVICE_PATH *) DevicePathNode;
+ (DevicePathNode->SubType == MSG_UFS_DP))
+ {
+ UfsDevice = (UFS_DEVICE_PATH *)DevicePathNode;
break;
}
DevicePathNode = NextDevicePathNode (DevicePathNode);
}
+
if (UfsDevice == NULL) {
RetVal = FALSE;
goto Done;
@@ -6067,26 +6109,26 @@ Done:
EFI_STATUS
EFIAPI
ScsiDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
)
{
- EFI_STATUS Status;
- SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_STATUS Status;
+ SCSI_DISK_DEV *ScsiDiskDevice;
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
Status = EFI_BUFFER_TOO_SMALL;
if (*InquiryDataSize >= sizeof (ScsiDiskDevice->InquiryData)) {
Status = EFI_SUCCESS;
CopyMem (InquiryData, &ScsiDiskDevice->InquiryData, sizeof (ScsiDiskDevice->InquiryData));
}
+
*InquiryDataSize = sizeof (ScsiDiskDevice->InquiryData);
return Status;
}
-
/**
Provides identify information for the controller type.
@@ -6108,13 +6150,13 @@ ScsiDiskInfoInquiry (
EFI_STATUS
EFIAPI
ScsiDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
)
{
- EFI_STATUS Status;
- SCSI_DISK_DEV *ScsiDiskDevice;
+ EFI_STATUS Status;
+ SCSI_DISK_DEV *ScsiDiskDevice;
if (CompareGuid (&This->Interface, &gEfiDiskInfoScsiInterfaceGuid) || CompareGuid (&This->Interface, &gEfiDiskInfoUfsInterfaceGuid)) {
//
@@ -6123,13 +6165,14 @@ ScsiDiskInfoIdentify (
return EFI_NOT_FOUND;
}
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
Status = EFI_BUFFER_TOO_SMALL;
if (*IdentifyDataSize >= sizeof (ScsiDiskDevice->IdentifyData)) {
Status = EFI_SUCCESS;
CopyMem (IdentifyData, &ScsiDiskDevice->IdentifyData, sizeof (ScsiDiskDevice->IdentifyData));
}
+
*IdentifyDataSize = sizeof (ScsiDiskDevice->IdentifyData);
return Status;
}
@@ -6154,16 +6197,15 @@ ScsiDiskInfoIdentify (
EFI_STATUS
EFIAPI
ScsiDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
)
{
return EFI_NOT_FOUND;
}
-
/**
This function is used by the IDE bus driver to get controller information.
@@ -6178,12 +6220,12 @@ ScsiDiskInfoSenseData (
EFI_STATUS
EFIAPI
ScsiDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
)
{
- SCSI_DISK_DEV *ScsiDiskDevice;
+ SCSI_DISK_DEV *ScsiDiskDevice;
if (CompareGuid (&This->Interface, &gEfiDiskInfoScsiInterfaceGuid) || CompareGuid (&This->Interface, &gEfiDiskInfoUfsInterfaceGuid)) {
//
@@ -6192,14 +6234,13 @@ ScsiDiskInfoWhichIde (
return EFI_UNSUPPORTED;
}
- ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
- *IdeChannel = ScsiDiskDevice->Channel;
- *IdeDevice = ScsiDiskDevice->Device;
+ ScsiDiskDevice = SCSI_DISK_DEV_FROM_DISKINFO (This);
+ *IdeChannel = ScsiDiskDevice->Channel;
+ *IdeDevice = ScsiDiskDevice->Device;
return EFI_SUCCESS;
}
-
/**
Issues ATA IDENTIFY DEVICE command to identify ATAPI device.
@@ -6215,11 +6256,11 @@ ScsiDiskInfoWhichIde (
**/
EFI_STATUS
AtapiIdentifyDevice (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice
)
{
- EFI_SCSI_IO_SCSI_REQUEST_PACKET CommandPacket;
- UINT8 Cdb[6];
+ EFI_SCSI_IO_SCSI_REQUEST_PACKET CommandPacket;
+ UINT8 Cdb[6];
//
// Initialize SCSI REQUEST_PACKET and 6-byte Cdb
@@ -6227,17 +6268,16 @@ AtapiIdentifyDevice (
ZeroMem (&CommandPacket, sizeof (CommandPacket));
ZeroMem (Cdb, sizeof (Cdb));
- Cdb[0] = ATA_CMD_IDENTIFY_DEVICE;
- CommandPacket.Timeout = SCSI_DISK_TIMEOUT;
- CommandPacket.Cdb = Cdb;
- CommandPacket.CdbLength = (UINT8) sizeof (Cdb);
- CommandPacket.InDataBuffer = &ScsiDiskDevice->IdentifyData;
+ Cdb[0] = ATA_CMD_IDENTIFY_DEVICE;
+ CommandPacket.Timeout = SCSI_DISK_TIMEOUT;
+ CommandPacket.Cdb = Cdb;
+ CommandPacket.CdbLength = (UINT8)sizeof (Cdb);
+ CommandPacket.InDataBuffer = &ScsiDiskDevice->IdentifyData;
CommandPacket.InTransferLength = sizeof (ScsiDiskDevice->IdentifyData);
return ScsiDiskDevice->ScsiIo->ExecuteScsiCommand (ScsiDiskDevice->ScsiIo, &CommandPacket, NULL);
}
-
/**
Initialize the installation of DiskInfo protocol.
@@ -6252,8 +6292,8 @@ AtapiIdentifyDevice (
**/
VOID
InitializeInstallDiskInfo (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
)
{
EFI_STATUS Status;
@@ -6263,7 +6303,7 @@ InitializeInstallDiskInfo (
SATA_DEVICE_PATH *SataDevicePath;
UINTN IdentifyRetry;
- Status = gBS->HandleProtocol (ChildHandle, &gEfiDevicePathProtocolGuid, (VOID **) &DevicePathNode);
+ Status = gBS->HandleProtocol (ChildHandle, &gEfiDevicePathProtocolGuid, (VOID **)&DevicePathNode);
//
// Device Path protocol must be installed on the device handle.
//
@@ -6278,9 +6318,9 @@ InitializeInstallDiskInfo (
if ((DevicePathType (DevicePathNode) == HARDWARE_DEVICE_PATH) &&
(DevicePathSubType (DevicePathNode) == HW_PCI_DP) &&
(DevicePathType (ChildDevicePathNode) == MESSAGING_DEVICE_PATH) &&
- ((DevicePathSubType (ChildDevicePathNode) == MSG_ATAPI_DP) ||
- (DevicePathSubType (ChildDevicePathNode) == MSG_SATA_DP))) {
-
+ ((DevicePathSubType (ChildDevicePathNode) == MSG_ATAPI_DP) ||
+ (DevicePathSubType (ChildDevicePathNode) == MSG_SATA_DP)))
+ {
IdentifyRetry = 3;
do {
//
@@ -6289,13 +6329,13 @@ InitializeInstallDiskInfo (
//
Status = AtapiIdentifyDevice (ScsiDiskDevice);
if (!EFI_ERROR (Status)) {
- if (DevicePathSubType(ChildDevicePathNode) == MSG_ATAPI_DP) {
+ if (DevicePathSubType (ChildDevicePathNode) == MSG_ATAPI_DP) {
//
// We find the valid ATAPI device path
//
- AtapiDevicePath = (ATAPI_DEVICE_PATH *) ChildDevicePathNode;
+ AtapiDevicePath = (ATAPI_DEVICE_PATH *)ChildDevicePathNode;
ScsiDiskDevice->Channel = AtapiDevicePath->PrimarySecondary;
- ScsiDiskDevice->Device = AtapiDevicePath->SlaveMaster;
+ ScsiDiskDevice->Device = AtapiDevicePath->SlaveMaster;
//
// Update the DiskInfo.Interface to IDE interface GUID for the physical ATAPI device.
//
@@ -6304,22 +6344,25 @@ InitializeInstallDiskInfo (
//
// We find the valid SATA device path
//
- SataDevicePath = (SATA_DEVICE_PATH *) ChildDevicePathNode;
+ SataDevicePath = (SATA_DEVICE_PATH *)ChildDevicePathNode;
ScsiDiskDevice->Channel = SataDevicePath->HBAPortNumber;
- ScsiDiskDevice->Device = SataDevicePath->PortMultiplierPortNumber;
+ ScsiDiskDevice->Device = SataDevicePath->PortMultiplierPortNumber;
//
// Update the DiskInfo.Interface to AHCI interface GUID for the physical AHCI device.
//
CopyGuid (&ScsiDiskDevice->DiskInfo.Interface, &gEfiDiskInfoAhciInterfaceGuid);
}
+
return;
}
} while (--IdentifyRetry > 0);
} else if ((DevicePathType (ChildDevicePathNode) == MESSAGING_DEVICE_PATH) &&
- (DevicePathSubType (ChildDevicePathNode) == MSG_UFS_DP)) {
+ (DevicePathSubType (ChildDevicePathNode) == MSG_UFS_DP))
+ {
CopyGuid (&ScsiDiskDevice->DiskInfo.Interface, &gEfiDiskInfoUfsInterfaceGuid);
break;
}
+
DevicePathNode = ChildDevicePathNode;
}
diff --git a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.h b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.h
index ed9bbd6f8b..d54282df5f 100644
--- a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.h
+++ b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.h
@@ -9,10 +9,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SCSI_DISK_H_
#define _SCSI_DISK_H_
-
#include <Uefi.h>
-
#include <Protocol/ScsiIo.h>
#include <Protocol/ComponentName.h>
#include <Protocol/BlockIo.h>
@@ -24,7 +22,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/DiskInfo.h>
#include <Protocol/StorageSecurityCommand.h>
-
#include <Library/DebugLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/UefiLib.h>
@@ -37,74 +34,74 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Scsi.h>
#include <IndustryStandard/Atapi.h>
-#define IS_DEVICE_FIXED(a) (a)->FixedDevice ? 1 : 0
+#define IS_DEVICE_FIXED(a) (a)->FixedDevice ? 1 : 0
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
-#define UFS_WLUN_RPMB 0xC4
+#define UFS_WLUN_RPMB 0xC4
typedef struct {
- UINT32 MaxLbaCnt;
- UINT32 MaxBlkDespCnt;
- UINT32 GranularityAlignment;
+ UINT32 MaxLbaCnt;
+ UINT32 MaxBlkDespCnt;
+ UINT32 GranularityAlignment;
} SCSI_UNMAP_PARAM_INFO;
-#define SCSI_DISK_DEV_SIGNATURE SIGNATURE_32 ('s', 'c', 'd', 'k')
+#define SCSI_DISK_DEV_SIGNATURE SIGNATURE_32 ('s', 'c', 'd', 'k')
typedef struct {
- UINT32 Signature;
+ UINT32 Signature;
- EFI_HANDLE Handle;
+ EFI_HANDLE Handle;
- EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
- EFI_BLOCK_IO_PROTOCOL BlkIo;
- EFI_BLOCK_IO2_PROTOCOL BlkIo2;
- EFI_BLOCK_IO_MEDIA BlkIoMedia;
- EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
- EFI_SCSI_IO_PROTOCOL *ScsiIo;
- UINT8 DeviceType;
- BOOLEAN FixedDevice;
- UINT16 Reserved;
+ EFI_BLOCK_IO_PROTOCOL BlkIo;
+ EFI_BLOCK_IO2_PROTOCOL BlkIo2;
+ EFI_BLOCK_IO_MEDIA BlkIoMedia;
+ EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
+ EFI_SCSI_IO_PROTOCOL *ScsiIo;
+ UINT8 DeviceType;
+ BOOLEAN FixedDevice;
+ UINT16 Reserved;
- EFI_SCSI_SENSE_DATA *SenseData;
- UINTN SenseDataNumber;
- EFI_SCSI_INQUIRY_DATA InquiryData;
+ EFI_SCSI_SENSE_DATA *SenseData;
+ UINTN SenseDataNumber;
+ EFI_SCSI_INQUIRY_DATA InquiryData;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
- EFI_DISK_INFO_PROTOCOL DiskInfo;
+ EFI_DISK_INFO_PROTOCOL DiskInfo;
//
// The following fields are only valid for ATAPI/SATA device
//
- UINT32 Channel;
- UINT32 Device;
- ATAPI_IDENTIFY_DATA IdentifyData;
+ UINT32 Channel;
+ UINT32 Device;
+ ATAPI_IDENTIFY_DATA IdentifyData;
//
// Scsi UNMAP command parameters information
//
- SCSI_UNMAP_PARAM_INFO UnmapInfo;
- BOOLEAN BlockLimitsVpdSupported;
+ SCSI_UNMAP_PARAM_INFO UnmapInfo;
+ BOOLEAN BlockLimitsVpdSupported;
//
// The flag indicates if 16-byte command can be used
//
- BOOLEAN Cdb16Byte;
+ BOOLEAN Cdb16Byte;
//
// The queue for asynchronous task requests
//
- LIST_ENTRY AsyncTaskQueue;
+ LIST_ENTRY AsyncTaskQueue;
} SCSI_DISK_DEV;
-#define SCSI_DISK_DEV_FROM_BLKIO(a) CR (a, SCSI_DISK_DEV, BlkIo, SCSI_DISK_DEV_SIGNATURE)
-#define SCSI_DISK_DEV_FROM_BLKIO2(a) CR (a, SCSI_DISK_DEV, BlkIo2, SCSI_DISK_DEV_SIGNATURE)
+#define SCSI_DISK_DEV_FROM_BLKIO(a) CR (a, SCSI_DISK_DEV, BlkIo, SCSI_DISK_DEV_SIGNATURE)
+#define SCSI_DISK_DEV_FROM_BLKIO2(a) CR (a, SCSI_DISK_DEV, BlkIo2, SCSI_DISK_DEV_SIGNATURE)
#define SCSI_DISK_DEV_FROM_ERASEBLK(a) CR (a, SCSI_DISK_DEV, EraseBlock, SCSI_DISK_DEV_SIGNATURE)
-#define SCSI_DISK_DEV_FROM_STORSEC(a) CR (a, SCSI_DISK_DEV, StorageSecurity, SCSI_DISK_DEV_SIGNATURE)
+#define SCSI_DISK_DEV_FROM_STORSEC(a) CR (a, SCSI_DISK_DEV, StorageSecurity, SCSI_DISK_DEV_SIGNATURE)
-#define SCSI_DISK_DEV_FROM_DISKINFO(a) CR (a, SCSI_DISK_DEV, DiskInfo, SCSI_DISK_DEV_SIGNATURE)
+#define SCSI_DISK_DEV_FROM_DISKINFO(a) CR (a, SCSI_DISK_DEV, DiskInfo, SCSI_DISK_DEV_SIGNATURE)
//
// Asynchronous I/O request
@@ -113,55 +110,55 @@ typedef struct {
// Private data structure for a BlockIo2 request
//
typedef struct {
- EFI_BLOCK_IO2_TOKEN *Token;
+ EFI_BLOCK_IO2_TOKEN *Token;
//
// The flag indicates if the last Scsi Read/Write sub-task for a BlockIo2
// request is sent to device
//
- BOOLEAN LastScsiRW;
+ BOOLEAN LastScsiRW;
//
// The queue for Scsi Read/Write sub-tasks of a BlockIo2 request
//
- LIST_ENTRY ScsiRWQueue;
+ LIST_ENTRY ScsiRWQueue;
- LIST_ENTRY Link;
+ LIST_ENTRY Link;
} SCSI_BLKIO2_REQUEST;
//
// Private data structure for a SCSI Read/Write request
//
typedef struct {
- SCSI_DISK_DEV *ScsiDiskDevice;
- UINT64 Timeout;
- EFI_SCSI_SENSE_DATA *SenseData;
- UINT8 SenseDataLength;
- UINT8 HostAdapterStatus;
- UINT8 TargetStatus;
- UINT8 *InBuffer;
- UINT8 *OutBuffer;
- UINT32 DataLength;
- UINT64 StartLba;
- UINT32 SectorCount;
- UINT8 TimesRetry;
+ SCSI_DISK_DEV *ScsiDiskDevice;
+ UINT64 Timeout;
+ EFI_SCSI_SENSE_DATA *SenseData;
+ UINT8 SenseDataLength;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ UINT8 *InBuffer;
+ UINT8 *OutBuffer;
+ UINT32 DataLength;
+ UINT64 StartLba;
+ UINT32 SectorCount;
+ UINT8 TimesRetry;
//
// The BlockIo2 request this SCSI command belongs to
//
- SCSI_BLKIO2_REQUEST *BlkIo2Req;
+ SCSI_BLKIO2_REQUEST *BlkIo2Req;
- LIST_ENTRY Link;
+ LIST_ENTRY Link;
} SCSI_ASYNC_RW_REQUEST;
//
// Private data structure for an EraseBlock request
//
typedef struct {
- EFI_ERASE_BLOCK_TOKEN *Token;
+ EFI_ERASE_BLOCK_TOKEN *Token;
- EFI_SCSI_IO_SCSI_REQUEST_PACKET CommandPacket;
+ EFI_SCSI_IO_SCSI_REQUEST_PACKET CommandPacket;
- LIST_ENTRY Link;
+ LIST_ENTRY Link;
} SCSI_ERASEBLK_REQUEST;
//
@@ -173,14 +170,14 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gScsiDiskComponentName2;
//
// action code used in detect media process
//
-#define ACTION_NO_ACTION 0x00
-#define ACTION_READ_CAPACITY 0x01
-#define ACTION_RETRY_COMMAND_LATER 0x02
-#define ACTION_RETRY_WITH_BACKOFF_ALGO 0x03
+#define ACTION_NO_ACTION 0x00
+#define ACTION_READ_CAPACITY 0x01
+#define ACTION_RETRY_COMMAND_LATER 0x02
+#define ACTION_RETRY_WITH_BACKOFF_ALGO 0x03
-#define SCSI_COMMAND_VERSION_1 0x01
-#define SCSI_COMMAND_VERSION_2 0x02
-#define SCSI_COMMAND_VERSION_3 0x03
+#define SCSI_COMMAND_VERSION_1 0x01
+#define SCSI_COMMAND_VERSION_2 0x02
+#define SCSI_COMMAND_VERSION_3 0x03
//
// SCSI Disk Timeout Experience Value
@@ -189,7 +186,7 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gScsiDiskComponentName2;
// value is updated to 30s to follow ATA/ATAPI spec in which the device may take up to 30s
// to respond command.
//
-#define SCSI_DISK_TIMEOUT EFI_TIMER_PERIOD_SECONDS (30)
+#define SCSI_DISK_TIMEOUT EFI_TIMER_PERIOD_SECONDS (30)
/**
Test to see if this driver supports ControllerHandle.
@@ -267,15 +264,16 @@ ScsiDiskDriverBindingStart (
EFI_STATUS
EFIAPI
ScsiDiskDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -323,7 +321,6 @@ ScsiDiskComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -395,11 +392,11 @@ ScsiDiskComponentNameGetDriverName (
EFI_STATUS
EFIAPI
ScsiDiskComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -418,11 +415,10 @@ ScsiDiskComponentNameGetControllerName (
EFI_STATUS
EFIAPI
ScsiDiskReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
-
/**
The function is to Read Block from SCSI Disk.
@@ -443,14 +439,13 @@ ScsiDiskReset (
EFI_STATUS
EFIAPI
ScsiDiskReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
-
/**
The function is to Write Block to SCSI Disk.
@@ -472,14 +467,13 @@ ScsiDiskReadBlocks (
EFI_STATUS
EFIAPI
ScsiDiskWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
-
/**
Flush Block to Disk.
@@ -493,10 +487,9 @@ ScsiDiskWriteBlocks (
EFI_STATUS
EFIAPI
ScsiDiskFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
);
-
/**
Reset SCSI Disk.
@@ -545,12 +538,12 @@ ScsiDiskResetEx (
EFI_STATUS
EFIAPI
ScsiDiskReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -579,12 +572,12 @@ ScsiDiskReadBlocksEx (
EFI_STATUS
EFIAPI
ScsiDiskWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -638,14 +631,13 @@ ScsiDiskFlushBlocksEx (
EFI_STATUS
EFIAPI
ScsiDiskEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
);
-
/**
Send a security protocol command to a device that receives data and/or the result
of one or more commands sent by SendData.
@@ -713,14 +705,14 @@ ScsiDiskEraseBlocks (
EFI_STATUS
EFIAPI
ScsiDiskReceiveData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId OPTIONAL,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId OPTIONAL,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
);
/**
@@ -781,16 +773,15 @@ ScsiDiskReceiveData (
EFI_STATUS
EFIAPI
ScsiDiskSendData (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId OPTIONAL,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId OPTIONAL,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer
);
-
/**
Provides inquiry information for the controller type.
@@ -810,12 +801,11 @@ ScsiDiskSendData (
EFI_STATUS
EFIAPI
ScsiDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
);
-
/**
Provides identify information for the controller type.
@@ -837,12 +827,11 @@ ScsiDiskInfoInquiry (
EFI_STATUS
EFIAPI
ScsiDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
);
-
/**
Provides sense data information for the controller type.
@@ -863,10 +852,10 @@ ScsiDiskInfoIdentify (
EFI_STATUS
EFIAPI
ScsiDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
);
/**
@@ -883,12 +872,11 @@ ScsiDiskInfoSenseData (
EFI_STATUS
EFIAPI
ScsiDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
);
-
/**
Detect Device and read out capacity ,if error occurs, parse the sense key.
@@ -902,9 +890,9 @@ ScsiDiskInfoWhichIde (
**/
EFI_STATUS
ScsiDiskDetectMedia (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN BOOLEAN MustReadCapacity,
- OUT BOOLEAN *MediaChange
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN BOOLEAN MustReadCapacity,
+ OUT BOOLEAN *MediaChange
);
/**
@@ -925,13 +913,12 @@ ScsiDiskDetectMedia (
**/
EFI_STATUS
ScsiDiskTestUnitReady (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys
);
-
/**
Parsing Sense Keys which got from request sense command.
@@ -946,13 +933,12 @@ ScsiDiskTestUnitReady (
**/
EFI_STATUS
DetectMediaParsingSenseKeys (
- OUT SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN NumberOfSenseKeys,
- OUT UINTN *Action
+ OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN NumberOfSenseKeys,
+ OUT UINTN *Action
);
-
/**
Send read capacity command to device and get the device parameter.
@@ -967,10 +953,10 @@ DetectMediaParsingSenseKeys (
**/
EFI_STATUS
ScsiDiskReadCapacity (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys
);
/**
@@ -986,10 +972,9 @@ ScsiDiskReadCapacity (
**/
EFI_STATUS
CheckHostAdapterStatus (
- IN UINT8 HostAdapterStatus
+ IN UINT8 HostAdapterStatus
);
-
/**
Check the target status and re-interpret it in EFI_STATUS.
@@ -1002,7 +987,7 @@ CheckHostAdapterStatus (
**/
EFI_STATUS
CheckTargetStatus (
- IN UINT8 TargetStatus
+ IN UINT8 TargetStatus
);
/**
@@ -1024,11 +1009,11 @@ CheckTargetStatus (
**/
EFI_STATUS
ScsiDiskRequestSenseKeys (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
- OUT UINTN *NumberOfSenseKeys,
- IN BOOLEAN AskResetIfError
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ OUT EFI_SCSI_SENSE_DATA **SenseDataArray,
+ OUT UINTN *NumberOfSenseKeys,
+ IN BOOLEAN AskResetIfError
);
/**
@@ -1043,8 +1028,8 @@ ScsiDiskRequestSenseKeys (
**/
EFI_STATUS
ScsiDiskInquiryDevice (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry
);
/**
@@ -1055,7 +1040,7 @@ ScsiDiskInquiryDevice (
**/
VOID
ParseInquiryData (
- IN OUT SCSI_DISK_DEV *ScsiDiskDevice
+ IN OUT SCSI_DISK_DEV *ScsiDiskDevice
);
/**
@@ -1072,10 +1057,10 @@ ParseInquiryData (
**/
EFI_STATUS
ScsiDiskReadSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks
);
/**
@@ -1092,10 +1077,10 @@ ScsiDiskReadSectors (
**/
EFI_STATUS
ScsiDiskWriteSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks
);
/**
@@ -1115,11 +1100,11 @@ ScsiDiskWriteSectors (
**/
EFI_STATUS
ScsiDiskAsyncReadSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1139,11 +1124,11 @@ ScsiDiskAsyncReadSectors (
**/
EFI_STATUS
ScsiDiskAsyncWriteSectors (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN VOID *Buffer,
- IN EFI_LBA Lba,
- IN UINTN NumberOfBlocks,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN VOID *Buffer,
+ IN EFI_LBA Lba,
+ IN UINTN NumberOfBlocks,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1161,13 +1146,13 @@ ScsiDiskAsyncWriteSectors (
**/
EFI_STATUS
ScsiDiskRead10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- OUT UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ OUT UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount
);
/**
@@ -1186,13 +1171,13 @@ ScsiDiskRead10 (
**/
EFI_STATUS
ScsiDiskWrite10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- IN UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ IN UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount
);
/**
@@ -1210,13 +1195,13 @@ ScsiDiskWrite10 (
**/
EFI_STATUS
ScsiDiskRead16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- OUT UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ OUT UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount
);
/**
@@ -1235,13 +1220,13 @@ ScsiDiskRead16 (
**/
EFI_STATUS
ScsiDiskWrite16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- OUT BOOLEAN *NeedRetry,
- IN UINT64 Timeout,
- IN UINT8 *DataBuffer,
- IN OUT UINT32 *DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ OUT BOOLEAN *NeedRetry,
+ IN UINT64 Timeout,
+ IN UINT8 *DataBuffer,
+ IN OUT UINT32 *DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount
);
/**
@@ -1266,15 +1251,15 @@ ScsiDiskWrite16 (
**/
EFI_STATUS
ScsiDiskAsyncRead10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- OUT UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ OUT UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1299,15 +1284,15 @@ ScsiDiskAsyncRead10 (
**/
EFI_STATUS
ScsiDiskAsyncWrite10 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- IN UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT32 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ IN UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT32 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1332,15 +1317,15 @@ ScsiDiskAsyncWrite10 (
**/
EFI_STATUS
ScsiDiskAsyncRead16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- OUT UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ OUT UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1365,15 +1350,15 @@ ScsiDiskAsyncRead16 (
**/
EFI_STATUS
ScsiDiskAsyncWrite16 (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN UINT64 Timeout,
- IN UINT8 TimesRetry,
- IN UINT8 *DataBuffer,
- IN UINT32 DataLength,
- IN UINT64 StartLba,
- IN UINT32 SectorCount,
- IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
- IN EFI_BLOCK_IO2_TOKEN *Token
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN UINT64 Timeout,
+ IN UINT8 TimesRetry,
+ IN UINT8 *DataBuffer,
+ IN UINT32 DataLength,
+ IN UINT64 StartLba,
+ IN UINT32 SectorCount,
+ IN OUT SCSI_BLKIO2_REQUEST *BlkIo2Req,
+ IN EFI_BLOCK_IO2_TOKEN *Token
);
/**
@@ -1401,8 +1386,8 @@ GetMediaInfo (
**/
BOOLEAN
ScsiDiskIsNoMedia (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1417,8 +1402,8 @@ ScsiDiskIsNoMedia (
**/
BOOLEAN
ScsiDiskIsMediaError (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1433,8 +1418,8 @@ ScsiDiskIsMediaError (
**/
BOOLEAN
ScsiDiskIsHardwareError (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1448,8 +1433,8 @@ ScsiDiskIsHardwareError (
**/
BOOLEAN
ScsiDiskIsMediaChange (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1464,8 +1449,8 @@ ScsiDiskIsMediaChange (
**/
BOOLEAN
ScsiDiskIsResetBefore (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1481,9 +1466,9 @@ ScsiDiskIsResetBefore (
**/
BOOLEAN
ScsiDiskIsDriveReady (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts,
- OUT BOOLEAN *RetryLater
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts,
+ OUT BOOLEAN *RetryLater
);
/**
@@ -1498,8 +1483,8 @@ ScsiDiskIsDriveReady (
**/
BOOLEAN
ScsiDiskHaveSenseKey (
- IN EFI_SCSI_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -1510,7 +1495,7 @@ ScsiDiskHaveSenseKey (
**/
VOID
ReleaseScsiDiskDeviceResources (
- IN SCSI_DISK_DEV *ScsiDiskDevice
+ IN SCSI_DISK_DEV *ScsiDiskDevice
);
/**
@@ -1525,7 +1510,7 @@ ReleaseScsiDiskDeviceResources (
**/
BOOLEAN
DetermineInstallBlockIo (
- IN EFI_HANDLE ChildHandle
+ IN EFI_HANDLE ChildHandle
);
/**
@@ -1542,8 +1527,8 @@ DetermineInstallBlockIo (
**/
VOID
InitializeInstallDiskInfo (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
);
/**
@@ -1561,8 +1546,8 @@ InitializeInstallDiskInfo (
VOID *
EFIAPI
GetParentProtocol (
- IN EFI_GUID *ProtocolGuid,
- IN EFI_HANDLE ChildHandle
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_HANDLE ChildHandle
);
/**
@@ -1577,8 +1562,8 @@ GetParentProtocol (
**/
BOOLEAN
DetermineInstallEraseBlock (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
);
/**
@@ -1593,8 +1578,8 @@ DetermineInstallEraseBlock (
**/
BOOLEAN
DetermineInstallStorageSecurity (
- IN SCSI_DISK_DEV *ScsiDiskDevice,
- IN EFI_HANDLE ChildHandle
+ IN SCSI_DISK_DEV *ScsiDiskDevice,
+ IN EFI_HANDLE ChildHandle
);
#endif
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c
index 2d8bfa1b00..df2f18024e 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c
@@ -32,11 +32,11 @@ EDKII_IOMMU_PPI *mIoMmu;
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -81,9 +83,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,7 +101,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -109,6 +112,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -142,7 +146,7 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
if (mIoMmu != NULL) {
@@ -157,18 +161,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -186,10 +191,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -207,9 +214,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -221,6 +228,7 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -239,4 +247,3 @@ IoMmuInit (
(VOID **)&mIoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c
index bf4498df55..a87eb2092f 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c
@@ -10,7 +10,7 @@
//
// Template for EMMC HC Slot Data.
//
-EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
+EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
EMMC_PEIM_SLOT_SIG, // Signature
{ // Media
{
@@ -97,7 +97,7 @@ EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
0,
},
{ // ExtCsd
- {0},
+ { 0 },
},
TRUE, // SectorAddressing
NULL // Private
@@ -106,7 +106,7 @@ EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
//
// Template for EMMC HC Private Data.
//
-EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = {
+EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = {
EMMC_PEIM_SIG, // Signature
NULL, // Pool
{ // BlkIoPpi
@@ -158,6 +158,7 @@ EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = {
0, // SlotNum
0 // TotalBlkIoDevices
};
+
/**
Gets the count of block I/O devices that one specific block driver detects.
@@ -185,9 +186,9 @@ EmmcBlockIoPeimGetDeviceNo (
OUT UINTN *NumberBlockDevices
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
}
@@ -242,11 +243,11 @@ EmmcBlockIoPeimGetMediaInfo (
OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- BOOLEAN Found;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ BOOLEAN Found;
Found = FALSE;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
@@ -259,12 +260,13 @@ EmmcBlockIoPeimGetMediaInfo (
MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -323,17 +325,17 @@ EmmcBlockIoPeimReadBlocks (
OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- UINTN NumberOfBlocks;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- UINT8 PartitionConfig;
- UINTN Remaining;
- UINT32 MaxBlock;
- BOOLEAN Found;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ UINTN NumberOfBlocks;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ UINT8 PartitionConfig;
+ UINTN Remaining;
+ UINT32 MaxBlock;
+ BOOLEAN Found;
Status = EFI_SUCCESS;
Found = FALSE;
@@ -358,12 +360,13 @@ EmmcBlockIoPeimReadBlocks (
MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -385,20 +388,22 @@ EmmcBlockIoPeimReadBlocks (
//
PartitionConfig = Private->Slot[SlotNum].ExtCsd.PartitionConfig;
if ((PartitionConfig & 0x7) != Private->Slot[SlotNum].PartitionType[MediaNum]) {
- PartitionConfig &= (UINT8)~0x7;
+ PartitionConfig &= (UINT8) ~0x7;
PartitionConfig |= Private->Slot[SlotNum].PartitionType[MediaNum];
- Status = EmmcPeimSwitch (
- &Private->Slot[SlotNum],
- 0x3,
- OFFSET_OF (EMMC_EXT_CSD, PartitionConfig),
- PartitionConfig,
- 0x0
- );
+ Status = EmmcPeimSwitch (
+ &Private->Slot[SlotNum],
+ 0x3,
+ OFFSET_OF (EMMC_EXT_CSD, PartitionConfig),
+ PartitionConfig,
+ 0x0
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
Private->Slot[SlotNum].ExtCsd.PartitionConfig = PartitionConfig;
}
+
//
// Start to execute data transfer. The max block number in single cmd is 65535 blocks.
//
@@ -418,15 +423,16 @@ EmmcBlockIoPeimReadBlocks (
}
BufferSize = NumberOfBlocks * BlockSize;
- Status = EmmcPeimRwMultiBlocks (&Private->Slot[SlotNum], StartLBA, BlockSize, Buffer, BufferSize, TRUE);
+ Status = EmmcPeimRwMultiBlocks (&Private->Slot[SlotNum], StartLBA, BlockSize, Buffer, BufferSize, TRUE);
if (EFI_ERROR (Status)) {
return Status;
}
StartLBA += NumberOfBlocks;
- Buffer = (UINT8*)Buffer + BufferSize;
+ Buffer = (UINT8 *)Buffer + BufferSize;
Remaining -= NumberOfBlocks;
}
+
return Status;
}
@@ -452,14 +458,14 @@ EmmcBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
@@ -509,29 +515,29 @@ EmmcBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- BOOLEAN Found;
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ BOOLEAN Found;
Found = FALSE;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
- Status = EmmcBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ Status = EmmcBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -540,12 +546,13 @@ EmmcBlockIoPeimGetMediaInfo2 (
MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -592,28 +599,28 @@ EmmcBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
-
- Status = EFI_SUCCESS;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
-
- Status = EmmcBlockIoPeimReadBlocks (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- StartLBA,
- BufferSize,
- Buffer
- );
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+
+ Status = EFI_SUCCESS;
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+
+ Status = EmmcBlockIoPeimReadBlocks (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ StartLBA,
+ BufferSize,
+ Buffer
+ );
return Status;
}
@@ -636,7 +643,7 @@ EmmcBlockIoPeimEndOfPei (
IN VOID *Ppi
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -660,26 +667,26 @@ EmmcBlockIoPeimEndOfPei (
EFI_STATUS
EFIAPI
InitializeEmmcBlockIoPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
- UINT32 Index;
- UINT32 PartitionIndex;
- UINTN *MmioBase;
- UINT8 BarNum;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Controller;
- UINT64 Capacity;
- EMMC_EXT_CSD *ExtCsd;
- EMMC_HC_SLOT_CAP Capability;
- EMMC_PEIM_HC_SLOT *Slot;
- UINT32 SecCount;
- UINT32 GpSizeMult;
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
+ UINT32 Index;
+ UINT32 PartitionIndex;
+ UINTN *MmioBase;
+ UINT8 BarNum;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Controller;
+ UINT64 Capacity;
+ EMMC_EXT_CSD *ExtCsd;
+ EMMC_HC_SLOT_CAP Capability;
+ EMMC_PEIM_HC_SLOT *Slot;
+ UINT32 SecCount;
+ UINT32 GpSizeMult;
//
// Shadow this PEIM to run from memory
@@ -695,7 +702,7 @@ InitializeEmmcBlockIoPeim (
&gEdkiiPeiSdMmcHostControllerPpiGuid,
0,
NULL,
- (VOID **) &SdMmcHcPpi
+ (VOID **)&SdMmcHcPpi
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -724,8 +731,9 @@ InitializeEmmcBlockIoPeim (
Status = EFI_OUT_OF_RESOURCES;
break;
}
- Private->BlkIoPpiList.Ppi = (VOID*)&Private->BlkIoPpi;
- Private->BlkIo2PpiList.Ppi = (VOID*)&Private->BlkIo2Ppi;
+
+ Private->BlkIoPpiList.Ppi = (VOID *)&Private->BlkIoPpi;
+ Private->BlkIo2PpiList.Ppi = (VOID *)&Private->BlkIo2Ppi;
//
// Initialize the memory pool which will be used in all transactions.
//
@@ -740,6 +748,7 @@ InitializeEmmcBlockIoPeim (
if (EFI_ERROR (Status)) {
continue;
}
+
if (Capability.SlotType != 0x1) {
DEBUG ((DEBUG_INFO, "The slot at 0x%x is not embedded slot type\n", MmioBase[Index]));
Status = EFI_UNSUPPORTED;
@@ -750,10 +759,12 @@ InitializeEmmcBlockIoPeim (
if (EFI_ERROR (Status)) {
continue;
}
+
Status = EmmcPeimHcCardDetect (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
}
+
Status = EmmcPeimHcInitHost (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
@@ -777,6 +788,7 @@ InitializeEmmcBlockIoPeim (
Status = EFI_UNSUPPORTED;
continue;
}
+
if ((ExtCsd->PartitioningSupport & BIT0) != BIT0) {
DEBUG ((DEBUG_ERROR, "The EMMC device doesn't support Partition Feature!!!\n"));
Status = EFI_UNSUPPORTED;
@@ -786,7 +798,7 @@ InitializeEmmcBlockIoPeim (
for (PartitionIndex = 0; PartitionIndex < EMMC_PEIM_MAX_PARTITIONS; PartitionIndex++) {
switch (PartitionIndex) {
case EmmcPartitionUserData:
- SecCount = *(UINT32*)&ExtCsd->SecCount;
+ SecCount = *(UINT32 *)&ExtCsd->SecCount;
Capacity = MultU64x32 ((UINT64)SecCount, 0x200);
break;
case EmmcPartitionBoot1:
@@ -798,19 +810,19 @@ InitializeEmmcBlockIoPeim (
break;
case EmmcPartitionGP1:
GpSizeMult = (ExtCsd->GpSizeMult[0] | (ExtCsd->GpSizeMult[1] << 8) | (ExtCsd->GpSizeMult[2] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP2:
GpSizeMult = (ExtCsd->GpSizeMult[3] | (ExtCsd->GpSizeMult[4] << 8) | (ExtCsd->GpSizeMult[5] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP3:
GpSizeMult = (ExtCsd->GpSizeMult[6] | (ExtCsd->GpSizeMult[7] << 8) | (ExtCsd->GpSizeMult[8] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP4:
GpSizeMult = (ExtCsd->GpSizeMult[9] | (ExtCsd->GpSizeMult[10] << 8) | (ExtCsd->GpSizeMult[11] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
default:
ASSERT (FALSE);
@@ -820,13 +832,15 @@ InitializeEmmcBlockIoPeim (
MediaNum = Slot->MediaNum;
if (Capacity != 0) {
Slot->Media[MediaNum].LastBlock = DivU64x32 (Capacity, Slot->Media[MediaNum].BlockSize) - 1;
- Slot->PartitionType[MediaNum] = PartitionIndex;
+ Slot->PartitionType[MediaNum] = PartitionIndex;
Private->TotalBlkIoDevices++;
Slot->MediaNum++;
}
}
+
Private->SlotNum++;
}
+
Controller++;
if (!EFI_ERROR (Status)) {
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h
index 774274e484..f8108c3082 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h
@@ -26,31 +26,31 @@
#include <IndustryStandard/Emmc.h>
-typedef struct _EMMC_PEIM_HC_PRIVATE_DATA EMMC_PEIM_HC_PRIVATE_DATA;
-typedef struct _EMMC_PEIM_HC_SLOT EMMC_PEIM_HC_SLOT;
-typedef struct _EMMC_TRB EMMC_TRB;
+typedef struct _EMMC_PEIM_HC_PRIVATE_DATA EMMC_PEIM_HC_PRIVATE_DATA;
+typedef struct _EMMC_PEIM_HC_SLOT EMMC_PEIM_HC_SLOT;
+typedef struct _EMMC_TRB EMMC_TRB;
#include "EmmcHci.h"
#include "EmmcHcMem.h"
-#define EMMC_PEIM_SIG SIGNATURE_32 ('E', 'M', 'C', 'P')
-#define EMMC_PEIM_SLOT_SIG SIGNATURE_32 ('E', 'M', 'C', 'S')
+#define EMMC_PEIM_SIG SIGNATURE_32 ('E', 'M', 'C', 'P')
+#define EMMC_PEIM_SLOT_SIG SIGNATURE_32 ('E', 'M', 'C', 'S')
-#define EMMC_PEIM_MAX_SLOTS 6
-#define EMMC_PEIM_MAX_PARTITIONS 8
+#define EMMC_PEIM_MAX_SLOTS 6
+#define EMMC_PEIM_MAX_PARTITIONS 8
struct _EMMC_PEIM_HC_SLOT {
- UINT32 Signature;
- EFI_PEI_BLOCK_IO2_MEDIA Media[EMMC_PEIM_MAX_PARTITIONS];
- UINT8 MediaNum;
- EMMC_PARTITION_TYPE PartitionType[EMMC_PEIM_MAX_PARTITIONS];
-
- UINTN EmmcHcBase;
- EMMC_HC_SLOT_CAP Capability;
- EMMC_CSD Csd;
- EMMC_EXT_CSD ExtCsd;
- BOOLEAN SectorAddressing;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT32 Signature;
+ EFI_PEI_BLOCK_IO2_MEDIA Media[EMMC_PEIM_MAX_PARTITIONS];
+ UINT8 MediaNum;
+ EMMC_PARTITION_TYPE PartitionType[EMMC_PEIM_MAX_PARTITIONS];
+
+ UINTN EmmcHcBase;
+ EMMC_HC_SLOT_CAP Capability;
+ EMMC_CSD Csd;
+ EMMC_EXT_CSD ExtCsd;
+ BOOLEAN SectorAddressing;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
};
struct _EMMC_PEIM_HC_PRIVATE_DATA {
@@ -71,27 +71,27 @@ struct _EMMC_PEIM_HC_PRIVATE_DATA {
UINT8 TotalBlkIoDevices;
};
-#define EMMC_TIMEOUT MultU64x32((UINT64)(3), 1000000)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIoPpi, EMMC_PEIM_SIG)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, EMMC_PEIM_SIG)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, EMMC_PEIM_SIG)
+#define EMMC_TIMEOUT MultU64x32((UINT64)(3), 1000000)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIoPpi, EMMC_PEIM_SIG)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, EMMC_PEIM_SIG)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, EMMC_PEIM_SIG)
struct _EMMC_TRB {
- EMMC_PEIM_HC_SLOT *Slot;
- UINT16 BlockSize;
+ EMMC_PEIM_HC_SLOT *Slot;
+ UINT16 BlockSize;
- EMMC_COMMAND_PACKET *Packet;
- VOID *Data;
- UINT32 DataLen;
- BOOLEAN Read;
- EFI_PHYSICAL_ADDRESS DataPhy;
- VOID *DataMap;
- EMMC_HC_TRANSFER_MODE Mode;
+ EMMC_COMMAND_PACKET *Packet;
+ VOID *Data;
+ UINT32 DataLen;
+ BOOLEAN Read;
+ EFI_PHYSICAL_ADDRESS DataPhy;
+ VOID *DataMap;
+ EMMC_HC_TRANSFER_MODE Mode;
- UINT64 Timeout;
+ UINT64 Timeout;
- EMMC_HC_ADMA_DESC_LINE *AdmaDesc;
- UINTN AdmaDescSize;
+ EMMC_HC_ADMA_DESC_LINE *AdmaDesc;
+ UINTN AdmaDescSize;
};
/**
@@ -238,9 +238,9 @@ EmmcBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -287,10 +287,10 @@ EmmcBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -330,12 +330,12 @@ EmmcBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
EmmcBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -349,7 +349,7 @@ EmmcBlockIoPeimReadBlocks2 (
**/
EFI_STATUS
EmmcPeimInitMemPool (
- IN EMMC_PEIM_HC_PRIVATE_DATA *Private
+ IN EMMC_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -363,7 +363,7 @@ EmmcPeimInitMemPool (
**/
EFI_STATUS
EmmcPeimFreeMemPool (
- IN EMMC_PEIM_MEM_POOL *Pool
+ IN EMMC_PEIM_MEM_POOL *Pool
);
/**
@@ -378,8 +378,8 @@ EmmcPeimFreeMemPool (
**/
VOID *
EmmcPeimAllocateMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
);
/**
@@ -392,9 +392,9 @@ EmmcPeimAllocateMem (
**/
VOID
EmmcPeimFreeMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -426,11 +426,11 @@ IoMmuInit (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -444,7 +444,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -487,9 +487,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c
index 19a0afcb6d..6778254b61 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c
@@ -18,25 +18,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EMMC_PEIM_MEM_BLOCK *
EmmcPeimAllocMemBlock (
- IN UINTN Pages
+ IN UINTN Pages
)
{
- EMMC_PEIM_MEM_BLOCK *Block;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- EFI_STATUS Status;
- VOID *TempPtr;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Block = NULL;
- Status = PeiServicesAllocatePool (sizeof(EMMC_PEIM_MEM_BLOCK), &TempPtr);
+ Status = PeiServicesAllocatePool (sizeof (EMMC_PEIM_MEM_BLOCK), &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof(EMMC_PEIM_MEM_BLOCK));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_BLOCK));
//
// each bit in the bit array represents EMMC_PEIM_MEM_UNIT
@@ -44,18 +44,18 @@ EmmcPeimAllocMemBlock (
//
ASSERT (EMMC_PEIM_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (EMMC_PEIM_MEM_BLOCK*)(UINTN)TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (EMMC_PEIM_MEM_UNIT * 8);
+ Block = (EMMC_PEIM_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (EMMC_PEIM_MEM_UNIT * 8);
Status = PeiServicesAllocatePool (Block->BitsLen, &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, Block->BitsLen);
+ ZeroMem ((VOID *)(UINTN)TempPtr, Block->BitsLen);
- Block->Bits = (UINT8*)(UINTN)TempPtr;
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Pages,
@@ -67,10 +67,10 @@ EmmcPeimAllocMemBlock (
return NULL;
}
- ZeroMem ((VOID*)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
+ ZeroMem ((VOID *)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
- Block->BufHost = (UINT8 *) (UINTN) BufHost;
- Block->Buf = (UINT8 *) (UINTN) MappedAddr;
+ Block->BufHost = (UINT8 *)(UINTN)BufHost;
+ Block->Buf = (UINT8 *)(UINTN)MappedAddr;
Block->Mapping = Mapping;
Block->Next = NULL;
@@ -86,8 +86,8 @@ EmmcPeimAllocMemBlock (
**/
VOID
EmmcPeimFreeMemBlock (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -107,22 +107,22 @@ EmmcPeimFreeMemBlock (
**/
VOID *
EmmcPeimAllocMemFromBlock (
- IN EMMC_PEIM_MEM_BLOCK *Block,
- IN UINTN Units
+ IN EMMC_PEIM_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -138,13 +138,12 @@ EmmcPeimAllocMemFromBlock (
}
EMMC_PEIM_NEXT_BIT (Byte, Bit);
-
} else {
EMMC_PEIM_NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -155,13 +154,13 @@ EmmcPeimAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!EMMC_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) EMMC_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)EMMC_PEIM_MEM_BIT (Bit));
EMMC_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -177,8 +176,8 @@ EmmcPeimAllocMemFromBlock (
**/
VOID
EmmcPeimInsertMemBlockToPool (
- IN EMMC_PEIM_MEM_BLOCK *Head,
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_BLOCK *Head,
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -197,11 +196,10 @@ EmmcPeimInsertMemBlockToPool (
**/
BOOLEAN
EmmcPeimIsMemBlockEmpty (
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
- UINTN Index;
-
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -212,8 +210,6 @@ EmmcPeimIsMemBlockEmpty (
return TRUE;
}
-
-
/**
Initialize the memory management pool for the host controller.
@@ -228,9 +224,9 @@ EmmcPeimInitMemPool (
IN EMMC_PEIM_HC_PRIVATE_DATA *Private
)
{
- EMMC_PEIM_MEM_POOL *Pool;
- EFI_STATUS Status;
- VOID *TempPtr;
+ EMMC_PEIM_MEM_POOL *Pool;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Pool = NULL;
@@ -240,7 +236,7 @@ EmmcPeimInitMemPool (
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_POOL));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_POOL));
Pool = (EMMC_PEIM_MEM_POOL *)((UINTN)TempPtr);
@@ -265,10 +261,10 @@ EmmcPeimInitMemPool (
**/
EFI_STATUS
EmmcPeimFreeMemPool (
- IN EMMC_PEIM_MEM_POOL *Pool
+ IN EMMC_PEIM_MEM_POOL *Pool
)
{
- EMMC_PEIM_MEM_BLOCK *Block;
+ EMMC_PEIM_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -296,16 +292,16 @@ EmmcPeimFreeMemPool (
**/
VOID *
EmmcPeimAllocateMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- EMMC_PEIM_MEM_BLOCK *Head;
- EMMC_PEIM_MEM_BLOCK *Block;
- EMMC_PEIM_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ EMMC_PEIM_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = EMMC_PEIM_MEM_ROUND (Size);
@@ -368,22 +364,22 @@ EmmcPeimAllocateMem (
**/
VOID
EmmcPeimFreeMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- EMMC_PEIM_MEM_BLOCK *Head;
- EMMC_PEIM_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = EMMC_PEIM_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -394,8 +390,8 @@ EmmcPeimFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -403,7 +399,7 @@ EmmcPeimFreeMem (
for (Count = 0; Count < (AllocSize / EMMC_PEIM_MEM_UNIT); Count++) {
ASSERT (EMMC_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ EMMC_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ EMMC_PEIM_MEM_BIT (Bit));
EMMC_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -425,5 +421,5 @@ EmmcPeimFreeMem (
EmmcPeimFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h
index 255ad345d1..d3b6ec545a 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h
@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EMMC_PEIM_MEM_H_
#define _EMMC_PEIM_MEM_H_
-#define EMMC_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
+#define EMMC_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
#define EMMC_PEIM_MEM_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & EMMC_PEIM_MEM_BIT(Bit)) == EMMC_PEIM_MEM_BIT(Bit)))
@@ -17,28 +17,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _EMMC_PEIM_MEM_BLOCK EMMC_PEIM_MEM_BLOCK;
struct _EMMC_PEIM_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- EMMC_PEIM_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ EMMC_PEIM_MEM_BLOCK *Next;
};
typedef struct _EMMC_PEIM_MEM_POOL {
- EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Head;
} EMMC_PEIM_MEM_POOL;
//
// Memory allocation unit, note that the value must meet EMMC spec alignment requirement.
//
-#define EMMC_PEIM_MEM_UNIT 128
+#define EMMC_PEIM_MEM_UNIT 128
#define EMMC_PEIM_MEM_UNIT_MASK (EMMC_PEIM_MEM_UNIT - 1)
#define EMMC_PEIM_MEM_DEFAULT_PAGES 16
-#define EMMC_PEIM_MEM_ROUND(Len) (((Len) + EMMC_PEIM_MEM_UNIT_MASK) & (~EMMC_PEIM_MEM_UNIT_MASK))
+#define EMMC_PEIM_MEM_ROUND(Len) (((Len) + EMMC_PEIM_MEM_UNIT_MASK) & (~EMMC_PEIM_MEM_UNIT_MASK))
//
// Advance the byte and bit to the next bit, adjust byte accordingly.
@@ -53,4 +53,3 @@ typedef struct _EMMC_PEIM_MEM_POOL {
} while (0)
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c
index d7f9e107c4..bafd71e9b5 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c
@@ -28,13 +28,13 @@
EFI_STATUS
EFIAPI
EmmcPeimHcRwMmio (
- IN UINTN Address,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
+ IN UINTN Address,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
)
{
- if ((Address == 0) || (Data == NULL)) {
+ if ((Address == 0) || (Data == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -45,31 +45,35 @@ EmmcPeimHcRwMmio (
switch (Count) {
case 1:
if (Read) {
- *(UINT8*)Data = MmioRead8 (Address);
+ *(UINT8 *)Data = MmioRead8 (Address);
} else {
- MmioWrite8 (Address, *(UINT8*)Data);
+ MmioWrite8 (Address, *(UINT8 *)Data);
}
+
break;
case 2:
if (Read) {
- *(UINT16*)Data = MmioRead16 (Address);
+ *(UINT16 *)Data = MmioRead16 (Address);
} else {
- MmioWrite16 (Address, *(UINT16*)Data);
+ MmioWrite16 (Address, *(UINT16 *)Data);
}
+
break;
case 4:
if (Read) {
- *(UINT32*)Data = MmioRead32 (Address);
+ *(UINT32 *)Data = MmioRead32 (Address);
} else {
- MmioWrite32 (Address, *(UINT32*)Data);
+ MmioWrite32 (Address, *(UINT32 *)Data);
}
+
break;
case 8:
if (Read) {
- *(UINT64*)Data = MmioRead64 (Address);
+ *(UINT64 *)Data = MmioRead64 (Address);
} else {
- MmioWrite64 (Address, *(UINT64*)Data);
+ MmioWrite64 (Address, *(UINT64 *)Data);
}
+
break;
default:
ASSERT (FALSE);
@@ -98,14 +102,14 @@ EmmcPeimHcRwMmio (
EFI_STATUS
EFIAPI
EmmcPeimHcOrMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *OrData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *OrData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 Or;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 Or;
Status = EmmcPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -113,13 +117,13 @@ EmmcPeimHcOrMmio (
}
if (Count == 1) {
- Or = *(UINT8*) OrData;
+ Or = *(UINT8 *)OrData;
} else if (Count == 2) {
- Or = *(UINT16*) OrData;
+ Or = *(UINT16 *)OrData;
} else if (Count == 4) {
- Or = *(UINT32*) OrData;
+ Or = *(UINT32 *)OrData;
} else if (Count == 8) {
- Or = *(UINT64*) OrData;
+ Or = *(UINT64 *)OrData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -149,14 +153,14 @@ EmmcPeimHcOrMmio (
EFI_STATUS
EFIAPI
EmmcPeimHcAndMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *AndData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *AndData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 And;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 And;
Status = EmmcPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -164,13 +168,13 @@ EmmcPeimHcAndMmio (
}
if (Count == 1) {
- And = *(UINT8*) AndData;
+ And = *(UINT8 *)AndData;
} else if (Count == 2) {
- And = *(UINT16*) AndData;
+ And = *(UINT16 *)AndData;
} else if (Count == 4) {
- And = *(UINT32*) AndData;
+ And = *(UINT32 *)AndData;
} else if (Count == 8) {
- And = *(UINT64*) AndData;
+ And = *(UINT64 *)AndData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -198,14 +202,14 @@ EmmcPeimHcAndMmio (
EFI_STATUS
EFIAPI
EmmcPeimHcCheckMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue
)
{
- EFI_STATUS Status;
- UINT64 Value;
+ EFI_STATUS Status;
+ UINT64 Value;
//
// Access PCI MMIO space to see if the value is the tested one.
@@ -245,15 +249,15 @@ EmmcPeimHcCheckMmioSet (
EFI_STATUS
EFIAPI
EmmcPeimHcWaitMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -294,11 +298,11 @@ EmmcPeimHcWaitMmioSet (
**/
EFI_STATUS
EmmcPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 SwReset;
+ EFI_STATUS Status;
+ UINT8 SwReset;
SwReset = 0xFF;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
@@ -319,6 +323,7 @@ EmmcPeimHcReset (
DEBUG ((DEBUG_INFO, "EmmcPeimHcReset: reset done with %r\n", Status));
return Status;
}
+
//
// Enable all interrupt after reset all.
//
@@ -339,25 +344,26 @@ EmmcPeimHcReset (
**/
EFI_STATUS
EmmcPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 IntStatus;
+ EFI_STATUS Status;
+ UINT16 IntStatus;
//
// Enable all bits in Error Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Enable all bits in Normal Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
return Status;
}
@@ -374,12 +380,12 @@ EmmcPeimHcEnableInterrupt (
**/
EFI_STATUS
EmmcPeimHcGetCapability (
- IN UINTN Bar,
- OUT EMMC_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT EMMC_HC_SLOT_CAP *Capability
)
{
- EFI_STATUS Status;
- UINT64 Cap;
+ EFI_STATUS Status;
+ UINT64 Cap;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CAP, TRUE, sizeof (Cap), &Cap);
if (EFI_ERROR (Status)) {
@@ -406,12 +412,12 @@ EmmcPeimHcGetCapability (
**/
EFI_STATUS
EmmcPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 Data;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ UINT16 Data;
+ UINT32 PresentState;
//
// Check Normal Interrupt Status Register
@@ -460,12 +466,12 @@ EmmcPeimHcCardDetect (
**/
EFI_STATUS
EmmcPeimHcStopClock (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT32 PresentState;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT32 PresentState;
+ UINT16 ClockCtrl;
//
// Ensure no SD transactions are occurring on the SD Bus by
@@ -486,8 +492,8 @@ EmmcPeimHcStopClock (
//
// Set SD Clock Enable in the Clock Control register to 0
//
- ClockCtrl = (UINT16)~BIT2;
- Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ ClockCtrl = (UINT16) ~BIT2;
+ Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -506,18 +512,18 @@ EmmcPeimHcStopClock (
**/
EFI_STATUS
EmmcPeimHcClockSupply (
- IN UINTN Bar,
- IN UINT64 ClockFreq
+ IN UINTN Bar,
+ IN UINT64 ClockFreq
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT32 BaseClkFreq;
- UINT32 SettingFreq;
- UINT32 Divisor;
- UINT32 Remainder;
- UINT16 ControllerVer;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT32 BaseClkFreq;
+ UINT32 SettingFreq;
+ UINT32 Divisor;
+ UINT32 Remainder;
+ UINT16 ControllerVer;
+ UINT16 ClockCtrl;
//
// Calculate a divisor for SD clock frequency
@@ -526,6 +532,7 @@ EmmcPeimHcClockSupply (
if (EFI_ERROR (Status)) {
return Status;
}
+
ASSERT (Capability.BaseClkFreq != 0);
BaseClkFreq = Capability.BaseClkFreq;
@@ -551,8 +558,9 @@ EmmcPeimHcClockSupply (
if ((ClockFreq == SettingFreq) && (Remainder == 0)) {
break;
}
+
if ((ClockFreq == SettingFreq) && (Remainder != 0)) {
- SettingFreq ++;
+ SettingFreq++;
}
}
@@ -562,6 +570,7 @@ EmmcPeimHcClockSupply (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
//
@@ -575,6 +584,7 @@ EmmcPeimHcClockSupply (
if (((Divisor - 1) & Divisor) != 0) {
Divisor = 1 << (HighBitSet32 (Divisor) + 1);
}
+
ASSERT (Divisor <= 0x80);
ClockCtrl = (Divisor & 0xFF) << 8;
} else {
@@ -594,7 +604,7 @@ EmmcPeimHcClockSupply (
// Supply clock frequency with specified divisor
//
ClockCtrl |= BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
return Status;
@@ -618,7 +628,7 @@ EmmcPeimHcClockSupply (
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -637,17 +647,17 @@ EmmcPeimHcClockSupply (
**/
EFI_STATUS
EmmcPeimHcPowerControl (
- IN UINTN Bar,
- IN UINT8 PowerCtrl
+ IN UINTN Bar,
+ IN UINT8 PowerCtrl
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Clr SD Bus Power
//
- PowerCtrl &= (UINT8)~BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl &= (UINT8) ~BIT0;
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -656,7 +666,7 @@ EmmcPeimHcPowerControl (
// Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
//
PowerCtrl |= BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
return Status;
}
@@ -675,32 +685,34 @@ EmmcPeimHcPowerControl (
**/
EFI_STATUS
EmmcPeimHcSetBusWidth (
- IN UINTN Bar,
- IN UINT16 BusWidth
+ IN UINTN Bar,
+ IN UINT16 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (BusWidth == 1) {
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);
- Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 = (UINT8) ~(BIT5 | BIT1);
+ Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 4) {
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl1 |= BIT1;
- HostCtrl1 &= (UINT8)~BIT5;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 &= (UINT8) ~BIT5;
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 8) {
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl1 &= (UINT8)~BIT1;
+
+ HostCtrl1 &= (UINT8) ~BIT1;
HostCtrl1 |= BIT5;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else {
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
@@ -720,12 +732,12 @@ EmmcPeimHcSetBusWidth (
**/
EFI_STATUS
EmmcPeimHcInitClockFreq (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT32 InitFreq;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT32 InitFreq;
//
// Calculate a divisor for SD clock frequency
@@ -741,11 +753,12 @@ EmmcPeimHcInitClockFreq (
//
return EFI_UNSUPPORTED;
}
+
//
// Supply 400KHz clock frequency at initialization phase.
//
InitFreq = 400;
- Status = EmmcPeimHcClockSupply (Bar, InitFreq);
+ Status = EmmcPeimHcClockSupply (Bar, InitFreq);
return Status;
}
@@ -762,13 +775,13 @@ EmmcPeimHcInitClockFreq (
**/
EFI_STATUS
EmmcPeimHcInitPowerVoltage (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT8 MaxVoltage;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT8 MaxVoltage;
+ UINT8 HostCtrl2;
//
// Get the support voltage of the Host Controller
@@ -777,6 +790,7 @@ EmmcPeimHcInitPowerVoltage (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Calculate supported maximum voltage according to SD Bus Voltage Select
//
@@ -796,10 +810,11 @@ EmmcPeimHcInitPowerVoltage (
//
MaxVoltage = 0x0A;
HostCtrl2 = BIT3;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
MicroSecondDelay (5000);
} else {
ASSERT (FALSE);
@@ -827,11 +842,11 @@ EmmcPeimHcInitPowerVoltage (
**/
EFI_STATUS
EmmcPeimHcInitTimeoutCtrl (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 Timeout;
+ EFI_STATUS Status;
+ UINT8 Timeout;
Timeout = 0x0E;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);
@@ -851,10 +866,10 @@ EmmcPeimHcInitTimeoutCtrl (
**/
EFI_STATUS
EmmcPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EmmcPeimHcInitClockFreq (Bar);
if (EFI_ERROR (Status)) {
@@ -882,18 +897,18 @@ EmmcPeimHcInitHost (
**/
EFI_STATUS
EmmcPeimHcLedOnOff (
- IN UINTN Bar,
- IN BOOLEAN On
+ IN UINTN Bar,
+ IN BOOLEAN On
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (On) {
HostCtrl1 = BIT0;
Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else {
- HostCtrl1 = (UINT8)~BIT0;
+ HostCtrl1 = (UINT8) ~BIT0;
Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
}
@@ -913,15 +928,15 @@ EmmcPeimHcLedOnOff (
**/
EFI_STATUS
BuildAdmaDescTable (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
)
{
- EFI_PHYSICAL_ADDRESS Data;
- UINT64 DataLen;
- UINT64 Entries;
- UINT32 Index;
- UINT64 Remaining;
- UINT32 Address;
+ EFI_PHYSICAL_ADDRESS Data;
+ UINT64 DataLen;
+ UINT64 Entries;
+ UINT32 Index;
+ UINT64 Remaining;
+ UINT32 Address;
Data = Trb->DataPhy;
DataLen = Trb->DataLen;
@@ -931,6 +946,7 @@ BuildAdmaDescTable (
if ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)) {
return EFI_INVALID_PARAMETER;
}
+
//
// Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)
// for 32-bit address descriptor table.
@@ -951,14 +967,14 @@ BuildAdmaDescTable (
Address = (UINT32)Data;
for (Index = 0; Index < Entries; Index++) {
if (Remaining <= ADMA_MAX_DATA_PER_LINE) {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = (UINT16)Remaining;
Trb->AdmaDesc[Index].Address = Address;
break;
} else {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = 0;
Trb->AdmaDesc[Index].Address = Address;
}
@@ -985,15 +1001,15 @@ BuildAdmaDescTable (
**/
EMMC_TRB *
EmmcPeimCreateTrb (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EMMC_COMMAND_PACKET *Packet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EMMC_COMMAND_PACKET *Packet
)
{
- EMMC_TRB *Trb;
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
+ EMMC_TRB *Trb;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
//
// Calculate a divisor for SD clock frequency
@@ -1043,7 +1059,7 @@ EmmcPeimCreateTrb (
if (Trb->DataLen != 0) {
MapLength = Trb->DataLen;
- Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
+ Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
if (EFI_ERROR (Status) || (MapLength != Trb->DataLen)) {
DEBUG ((DEBUG_ERROR, "EmmcPeimCreateTrb: Fail to map data buffer.\n"));
@@ -1055,7 +1071,7 @@ EmmcPeimCreateTrb (
Trb->Mode = EmmcNoData;
} else if (Capability.Adma2 != 0) {
Trb->Mode = EmmcAdmaMode;
- Status = BuildAdmaDescTable (Trb);
+ Status = BuildAdmaDescTable (Trb);
if (EFI_ERROR (Status)) {
goto Error;
}
@@ -1065,6 +1081,7 @@ EmmcPeimCreateTrb (
Trb->Mode = EmmcPioMode;
}
}
+
return Trb;
Error:
@@ -1080,7 +1097,7 @@ Error:
**/
VOID
EmmcPeimFreeTrb (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
)
{
if ((Trb != NULL) && (Trb->DataMap != NULL)) {
@@ -1094,6 +1111,7 @@ EmmcPeimFreeTrb (
if (Trb != NULL) {
FreePool (Trb);
}
+
return;
}
@@ -1110,19 +1128,20 @@ EmmcPeimFreeTrb (
**/
EFI_STATUS
EmmcPeimCheckTrbEnv (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT32 PresentState;
Packet = Trb->Packet;
if ((Packet->EmmcCmdBlk->CommandType == EmmcCommandTypeAdtc) ||
(Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR1b) ||
- (Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR5b)) {
+ (Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR5b))
+ {
//
// Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
// the Present State register to be 0
@@ -1159,14 +1178,14 @@ EmmcPeimCheckTrbEnv (
**/
EFI_STATUS
EmmcPeimWaitTrbEnv (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
//
// Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
@@ -1187,6 +1206,7 @@ EmmcPeimWaitTrbEnv (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1210,21 +1230,21 @@ EmmcPeimWaitTrbEnv (
**/
EFI_STATUS
EmmcPeimExecTrb (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT16 Cmd;
- UINT16 IntStatus;
- UINT32 Argument;
- UINT16 BlkCount;
- UINT16 BlkSize;
- UINT16 TransMode;
- UINT8 HostCtrl1;
- UINT32 SdmaAddr;
- UINT64 AdmaAddr;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT16 Cmd;
+ UINT16 IntStatus;
+ UINT32 Argument;
+ UINT16 BlkCount;
+ UINT16 BlkSize;
+ UINT16 TransMode;
+ UINT8 HostCtrl1;
+ UINT32 SdmaAddr;
+ UINT64 AdmaAddr;
Packet = Trb->Packet;
//
@@ -1235,6 +1255,7 @@ EmmcPeimExecTrb (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Clear all bits in Normal Interrupt Status Register
//
@@ -1243,12 +1264,13 @@ EmmcPeimExecTrb (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set Host Control 1 register DMA Select field
//
if (Trb->Mode == EmmcAdmaMode) {
HostCtrl1 = BIT4;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1295,7 +1317,7 @@ EmmcPeimExecTrb (
BlkCount = (UINT16)(Trb->DataLen / Trb->BlockSize);
}
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1311,9 +1333,11 @@ EmmcPeimExecTrb (
if (Trb->Mode != EmmcPioMode) {
TransMode |= BIT0;
}
+
if (Trb->Read) {
TransMode |= BIT4;
}
+
if (BlkCount > 1) {
TransMode |= BIT5 | BIT1;
}
@@ -1324,10 +1348,11 @@ EmmcPeimExecTrb (
return Status;
}
- Cmd = (UINT16)LShiftU64(Packet->EmmcCmdBlk->CommandIndex, 8);
+ Cmd = (UINT16)LShiftU64 (Packet->EmmcCmdBlk->CommandIndex, 8);
if (Packet->EmmcCmdBlk->CommandType == EmmcCommandTypeAdtc) {
Cmd |= BIT5;
}
+
//
// Convert ResponseType to value
//
@@ -1341,7 +1366,7 @@ EmmcPeimExecTrb (
break;
case EmmcResponceTypeR2:
Cmd |= (BIT0 | BIT3);
- break;
+ break;
case EmmcResponceTypeR3:
case EmmcResponceTypeR4:
Cmd |= BIT1;
@@ -1355,6 +1380,7 @@ EmmcPeimExecTrb (
break;
}
}
+
//
// Execute cmd
//
@@ -1375,18 +1401,18 @@ EmmcPeimExecTrb (
**/
EFI_STATUS
EmmcPeimCheckTrbResult (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT16 IntStatus;
- UINT32 Response[4];
- UINT32 SdmaAddr;
- UINT8 Index;
- UINT8 SwReset;
- UINT32 PioLength;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT16 IntStatus;
+ UINT32 Response[4];
+ UINT32 SdmaAddr;
+ UINT8 Index;
+ UINT8 SwReset;
+ UINT32 PioLength;
SwReset = 0;
Packet = Trb->Packet;
@@ -1402,6 +1428,7 @@ EmmcPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Check Transfer Complete bit is set or not.
//
@@ -1430,6 +1457,7 @@ EmmcPeimCheckTrbResult (
goto Done;
}
+
//
// Check if there is a error happened during cmd execution.
// If yes, then do error recovery procedure to follow SD Host Controller
@@ -1449,6 +1477,7 @@ EmmcPeimCheckTrbResult (
if ((IntStatus & 0x0F) != 0) {
SwReset |= BIT1;
}
+
if ((IntStatus & 0xF0) != 0) {
SwReset |= BIT2;
}
@@ -1462,6 +1491,7 @@ EmmcPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
Status = EmmcPeimHcWaitMmioSet (
Bar + EMMC_HC_SW_RST,
sizeof (SwReset),
@@ -1476,6 +1506,7 @@ EmmcPeimCheckTrbResult (
Status = EFI_DEVICE_ERROR;
goto Done;
}
+
//
// Check if DMA interrupt is signalled for the SDMA transfer.
//
@@ -1493,6 +1524,7 @@ EmmcPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Update SDMA Address register.
//
@@ -1506,12 +1538,14 @@ EmmcPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
Trb->DataPhy = (UINT32)(UINTN)SdmaAddr;
}
if ((Packet->EmmcCmdBlk->CommandType != EmmcCommandTypeAdtc) &&
(Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR1b) &&
- (Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR5b)) {
+ (Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR5b))
+ {
if ((IntStatus & BIT0) == BIT0) {
Status = EFI_SUCCESS;
goto Done;
@@ -1534,8 +1568,9 @@ EmmcPeimCheckTrbResult (
// Read data out from Buffer Port register
//
for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) {
- EmmcPeimHcRwMmio (Bar + EMMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength);
+ EmmcPeimHcRwMmio (Bar + EMMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8 *)Trb->Data + PioLength);
}
+
Status = EFI_SUCCESS;
goto Done;
}
@@ -1560,6 +1595,7 @@ Done:
return Status;
}
}
+
CopyMem (Packet->EmmcStatusBlk, Response, sizeof (Response));
}
}
@@ -1583,14 +1619,14 @@ Done:
**/
EFI_STATUS
EmmcPeimWaitTrbResult (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
Packet = Trb->Packet;
//
@@ -1611,6 +1647,7 @@ EmmcPeimWaitTrbResult (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1655,12 +1692,12 @@ EmmcPeimWaitTrbResult (
EFI_STATUS
EFIAPI
EmmcPeimExecCmd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN OUT EMMC_COMMAND_PACKET *Packet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN OUT EMMC_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
- EMMC_TRB *Trb;
+ EFI_STATUS Status;
+ EMMC_TRB *Trb;
if (Packet == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1718,13 +1755,13 @@ Done:
**/
EFI_STATUS
EmmcPeimReset (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1732,11 +1769,11 @@ EmmcPeimReset (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBc;
- EmmcCmdBlk.ResponseType = 0;
+ EmmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBc;
+ EmmcCmdBlk.ResponseType = 0;
EmmcCmdBlk.CommandArgument = 0;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1759,14 +1796,14 @@ EmmcPeimReset (
**/
EFI_STATUS
EmmcPeimGetOcr (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN OUT UINT32 *Argument
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN OUT UINT32 *Argument
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1774,11 +1811,11 @@ EmmcPeimGetOcr (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR3;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR3;
EmmcCmdBlk.CommandArgument = *Argument;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1806,13 +1843,13 @@ EmmcPeimGetOcr (
**/
EFI_STATUS
EmmcPeimGetAllCid (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1820,11 +1857,11 @@ EmmcPeimGetAllCid (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
+ EmmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
EmmcCmdBlk.CommandArgument = 0;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1847,14 +1884,14 @@ EmmcPeimGetAllCid (
**/
EFI_STATUS
EmmcPeimSetRca (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1862,11 +1899,11 @@ EmmcPeimSetRca (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1892,15 +1929,15 @@ EmmcPeimSetRca (
**/
EFI_STATUS
EmmcPeimGetCsd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- OUT EMMC_CSD *Csd
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ OUT EMMC_CSD *Csd
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1908,11 +1945,11 @@ EmmcPeimGetCsd (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1920,7 +1957,7 @@ EmmcPeimGetCsd (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &EmmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &EmmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
}
return Status;
@@ -1940,14 +1977,14 @@ EmmcPeimGetCsd (
**/
EFI_STATUS
EmmcPeimSelect (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1955,11 +1992,11 @@ EmmcPeimSelect (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1981,14 +2018,14 @@ EmmcPeimSelect (
**/
EFI_STATUS
EmmcPeimGetExtCsd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- OUT EMMC_EXT_CSD *ExtCsd
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ OUT EMMC_EXT_CSD *ExtCsd
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1996,11 +2033,11 @@ EmmcPeimGetExtCsd (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = 0x00000000;
Packet.InDataBuffer = ExtCsd;
@@ -2028,17 +2065,17 @@ EmmcPeimGetExtCsd (
**/
EFI_STATUS
EmmcPeimSwitch (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 Access,
+ IN UINT8 Index,
+ IN UINT8 Value,
+ IN UINT8 CmdSet
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2046,11 +2083,11 @@ EmmcPeimSwitch (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SWITCH;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1b;
+ EmmcCmdBlk.CommandIndex = EMMC_SWITCH;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1b;
EmmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2073,15 +2110,15 @@ EmmcPeimSwitch (
**/
EFI_STATUS
EmmcPeimSendStatus (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- OUT UINT32 *DevStatus
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ OUT UINT32 *DevStatus
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2089,11 +2126,11 @@ EmmcPeimSendStatus (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2119,14 +2156,14 @@ EmmcPeimSendStatus (
**/
EFI_STATUS
EmmcPeimSetBlkCount (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT16 BlockCount
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT16 BlockCount
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2136,9 +2173,9 @@ EmmcPeimSetBlkCount (
Packet.EmmcStatusBlk = &EmmcStatusBlk;
Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = BlockCount;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2165,18 +2202,18 @@ EmmcPeimSetBlkCount (
**/
EFI_STATUS
EmmcPeimRwMultiBlocks (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2191,7 +2228,7 @@ EmmcPeimRwMultiBlocks (
// transfer speed (2.4MB/s).
// Refer to eMMC 5.0 spec section 6.9.1 for details.
//
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;
if (IsRead) {
Packet.InDataBuffer = Buffer;
@@ -2237,15 +2274,15 @@ EmmcPeimRwMultiBlocks (
**/
EFI_STATUS
EmmcPeimSendTuningBlk (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 BusWidth
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[128];
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 TuningBlock[128];
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2253,11 +2290,11 @@ EmmcPeimSendTuningBlk (
Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = 0;
Packet.InDataBuffer = TuningBlock;
@@ -2290,22 +2327,23 @@ EmmcPeimSendTuningBlk (
**/
EFI_STATUS
EmmcPeimTuningClkForHs200 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 Retry;
//
// Notify the host that the sampling clock tuning procedure starts.
//
HostCtrl2 = BIT6;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
//
@@ -2334,11 +2372,12 @@ EmmcPeimTuningClkForHs200 (
//
// Abort the tuning procedure and reset the tuning circuit.
//
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
return EFI_DEVICE_ERROR;
}
@@ -2360,18 +2399,18 @@ EmmcPeimTuningClkForHs200 (
**/
EFI_STATUS
EmmcPeimSwitchBusWidth (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN BOOLEAN IsDdr,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
+ UINT32 DevStatus;
//
// Write Byte, the Value field is written into the byte pointed by Index.
@@ -2400,6 +2439,7 @@ EmmcPeimSwitchBusWidth (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
@@ -2429,18 +2469,18 @@ EmmcPeimSwitchBusWidth (
**/
EFI_STATUS
EmmcPeimSwitchClockFreq (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT8 HsTiming,
- IN UINT32 ClockFreq
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT8 HsTiming,
+ IN UINT32 ClockFreq
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
+ UINT32 DevStatus;
//
// Write Byte, the Value field is written into the byte pointed by Index.
@@ -2459,12 +2499,14 @@ EmmcPeimSwitchClockFreq (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
if ((DevStatus & BIT7) != 0) {
return EFI_DEVICE_ERROR;
}
+
//
// Convert the clock freq unit from MHz to KHz.
//
@@ -2492,36 +2534,38 @@ EmmcPeimSwitchClockFreq (
**/
EFI_STATUS
EmmcPeimSwitchToHighSpeed (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq,
+ IN BOOLEAN IsDdr,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl1;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl1;
+ UINT8 HostCtrl2;
Status = EmmcPeimSwitchBusWidth (Slot, Rca, IsDdr, BusWidth);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to High Speed timing
//
HostCtrl1 = BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
if (IsDdr) {
HostCtrl2 = BIT2;
} else if (ClockFreq == 52) {
@@ -2529,13 +2573,14 @@ EmmcPeimSwitchToHighSpeed (
} else {
HostCtrl2 = 0;
}
+
Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
HsTiming = 1;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
return Status;
}
@@ -2557,16 +2602,16 @@ EmmcPeimSwitchToHighSpeed (
**/
EFI_STATUS
EmmcPeimSwitchToHS200 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl2;
+ UINT16 ClockCtrl;
if ((BusWidth != 4) && (BusWidth != 8)) {
return EFI_INVALID_PARAMETER;
@@ -2576,6 +2621,7 @@ EmmcPeimSwitchToHS200 (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to HS200/SDR104 timing
//
@@ -2587,13 +2633,14 @@ EmmcPeimSwitchToHS200 (
return Status;
}
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl2 = BIT0 | BIT1;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2611,14 +2658,15 @@ EmmcPeimSwitchToHS200 (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
HsTiming = 2;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2644,27 +2692,29 @@ EmmcPeimSwitchToHS200 (
**/
EFI_STATUS
EmmcPeimSwitchToHS400 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl2;
Status = EmmcPeimSwitchToHS200 (Slot, Rca, ClockFreq, 8);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to High Speed timing and set the clock frequency to a value less than 52MHz.
//
HsTiming = 1;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, 52);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, 52);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// HS400 mode must use 8 data lines.
//
@@ -2672,22 +2722,24 @@ EmmcPeimSwitchToHS400 (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to HS400 timing
//
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl2 = BIT0 | BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
HsTiming = 3;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
return Status;
}
@@ -2707,16 +2759,16 @@ EmmcPeimSwitchToHS400 (
**/
EFI_STATUS
EmmcPeimSetBusMode (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT8 HsTiming;
- BOOLEAN IsDdr;
- UINT32 ClockFreq;
- UINT8 BusWidth;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT8 HsTiming;
+ BOOLEAN IsDdr;
+ UINT32 ClockFreq;
+ UINT8 BusWidth;
Status = EmmcPeimGetCsd (Slot, Rca, &Slot->Csd);
if (EFI_ERROR (Status)) {
@@ -2751,6 +2803,7 @@ EmmcPeimSetBusMode (
} else {
BusWidth = 4;
}
+
//
// Get Device_Type from EXT_CSD register.
//
@@ -2759,6 +2812,7 @@ EmmcPeimSetBusMode (
DEBUG ((DEBUG_ERROR, "EmmcPeimSetBusMode: EmmcPeimGetExtCsd fails with %r\n", Status));
return Status;
}
+
//
// Calculate supported bus speed/bus width/clock frequency.
//
@@ -2782,6 +2836,7 @@ EmmcPeimSetBusMode (
IsDdr = FALSE;
ClockFreq = 26;
}
+
//
// Check if both of the device and the host controller support HS400 DDR mode.
//
@@ -2802,7 +2857,7 @@ EmmcPeimSetBusMode (
return EFI_SUCCESS;
}
- DEBUG ((DEBUG_INFO, "HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE":"FALSE"));
+ DEBUG ((DEBUG_INFO, "HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE" : "FALSE"));
if (HsTiming == 3) {
//
@@ -2837,13 +2892,13 @@ EmmcPeimSetBusMode (
**/
EFI_STATUS
EmmcPeimIdentification (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EFI_STATUS Status;
- UINT32 Ocr;
- UINT32 Rca;
- UINTN Retry;
+ EFI_STATUS Status;
+ UINT32 Ocr;
+ UINT32 Rca;
+ UINTN Retry;
Status = EmmcPeimReset (Slot);
if (EFI_ERROR (Status)) {
@@ -2864,6 +2919,7 @@ EmmcPeimIdentification (
DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimGetOcr fails too many times\n"));
return EFI_DEVICE_ERROR;
}
+
MicroSecondDelay (10 * 1000);
} while ((Ocr & BIT31) == 0);
@@ -2872,6 +2928,7 @@ EmmcPeimIdentification (
DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimGetAllCid fails with %r\n", Status));
return Status;
}
+
//
// Don't support multiple devices on the slot, that is
// shared bus slot feature.
@@ -2882,6 +2939,7 @@ EmmcPeimIdentification (
DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimSetRca fails with %r\n", Status));
return Status;
}
+
//
// Enter Data Tranfer Mode.
//
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h
index 4e3e51d144..6c6108b028 100644
--- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h
+++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h
@@ -61,9 +61,9 @@ typedef enum {
//
// The maximum data length of each descriptor line
//
-#define ADMA_MAX_DATA_PER_LINE 0x10000
-#define EMMC_SDMA_BOUNDARY 512 * 1024
-#define EMMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
+#define ADMA_MAX_DATA_PER_LINE 0x10000
+#define EMMC_SDMA_BOUNDARY 512 * 1024
+#define EMMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
typedef enum {
EmmcCommandTypeBc, // Broadcast commands, no response
@@ -85,76 +85,76 @@ typedef enum {
} EMMC_RESPONSE_TYPE;
typedef struct _EMMC_COMMAND_BLOCK {
- UINT16 CommandIndex;
- UINT32 CommandArgument;
- UINT32 CommandType; // One of the EMMC_COMMAND_TYPE values
- UINT32 ResponseType; // One of the EMMC_RESPONSE_TYPE values
+ UINT16 CommandIndex;
+ UINT32 CommandArgument;
+ UINT32 CommandType; // One of the EMMC_COMMAND_TYPE values
+ UINT32 ResponseType; // One of the EMMC_RESPONSE_TYPE values
} EMMC_COMMAND_BLOCK;
typedef struct _EMMC_STATUS_BLOCK {
- UINT32 Resp0;
- UINT32 Resp1;
- UINT32 Resp2;
- UINT32 Resp3;
+ UINT32 Resp0;
+ UINT32 Resp1;
+ UINT32 Resp2;
+ UINT32 Resp3;
} EMMC_STATUS_BLOCK;
typedef struct _EMMC_COMMAND_PACKET {
- UINT64 Timeout;
- EMMC_COMMAND_BLOCK *EmmcCmdBlk;
- EMMC_STATUS_BLOCK *EmmcStatusBlk;
- VOID *InDataBuffer;
- VOID *OutDataBuffer;
- UINT32 InTransferLength;
- UINT32 OutTransferLength;
+ UINT64 Timeout;
+ EMMC_COMMAND_BLOCK *EmmcCmdBlk;
+ EMMC_STATUS_BLOCK *EmmcStatusBlk;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
} EMMC_COMMAND_PACKET;
#pragma pack(1)
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 Reserved1:10;
- UINT32 Length:16;
- UINT32 Address;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 Reserved1 : 10;
+ UINT32 Length : 16;
+ UINT32 Address;
} EMMC_HC_ADMA_DESC_LINE;
typedef struct {
- UINT32 TimeoutFreq:6; // bit 0:5
- UINT32 Reserved:1; // bit 6
- UINT32 TimeoutUnit:1; // bit 7
- UINT32 BaseClkFreq:8; // bit 8:15
- UINT32 MaxBlkLen:2; // bit 16:17
- UINT32 BusWidth8:1; // bit 18
- UINT32 Adma2:1; // bit 19
- UINT32 Reserved2:1; // bit 20
- UINT32 HighSpeed:1; // bit 21
- UINT32 Sdma:1; // bit 22
- UINT32 SuspRes:1; // bit 23
- UINT32 Voltage33:1; // bit 24
- UINT32 Voltage30:1; // bit 25
- UINT32 Voltage18:1; // bit 26
- UINT32 Reserved3:1; // bit 27
- UINT32 SysBus64:1; // bit 28
- UINT32 AsyncInt:1; // bit 29
- UINT32 SlotType:2; // bit 30:31
- UINT32 Sdr50:1; // bit 32
- UINT32 Sdr104:1; // bit 33
- UINT32 Ddr50:1; // bit 34
- UINT32 Reserved4:1; // bit 35
- UINT32 DriverTypeA:1; // bit 36
- UINT32 DriverTypeC:1; // bit 37
- UINT32 DriverTypeD:1; // bit 38
- UINT32 DriverType4:1; // bit 39
- UINT32 TimerCount:4; // bit 40:43
- UINT32 Reserved5:1; // bit 44
- UINT32 TuningSDR50:1; // bit 45
- UINT32 RetuningMod:2; // bit 46:47
- UINT32 ClkMultiplier:8; // bit 48:55
- UINT32 Reserved6:7; // bit 56:62
- UINT32 Hs400:1; // bit 63
+ UINT32 TimeoutFreq : 6; // bit 0:5
+ UINT32 Reserved : 1; // bit 6
+ UINT32 TimeoutUnit : 1; // bit 7
+ UINT32 BaseClkFreq : 8; // bit 8:15
+ UINT32 MaxBlkLen : 2; // bit 16:17
+ UINT32 BusWidth8 : 1; // bit 18
+ UINT32 Adma2 : 1; // bit 19
+ UINT32 Reserved2 : 1; // bit 20
+ UINT32 HighSpeed : 1; // bit 21
+ UINT32 Sdma : 1; // bit 22
+ UINT32 SuspRes : 1; // bit 23
+ UINT32 Voltage33 : 1; // bit 24
+ UINT32 Voltage30 : 1; // bit 25
+ UINT32 Voltage18 : 1; // bit 26
+ UINT32 Reserved3 : 1; // bit 27
+ UINT32 SysBus64 : 1; // bit 28
+ UINT32 AsyncInt : 1; // bit 29
+ UINT32 SlotType : 2; // bit 30:31
+ UINT32 Sdr50 : 1; // bit 32
+ UINT32 Sdr104 : 1; // bit 33
+ UINT32 Ddr50 : 1; // bit 34
+ UINT32 Reserved4 : 1; // bit 35
+ UINT32 DriverTypeA : 1; // bit 36
+ UINT32 DriverTypeC : 1; // bit 37
+ UINT32 DriverTypeD : 1; // bit 38
+ UINT32 DriverType4 : 1; // bit 39
+ UINT32 TimerCount : 4; // bit 40:43
+ UINT32 Reserved5 : 1; // bit 44
+ UINT32 TuningSDR50 : 1; // bit 45
+ UINT32 RetuningMod : 2; // bit 46:47
+ UINT32 ClkMultiplier : 8; // bit 48:55
+ UINT32 Reserved6 : 7; // bit 56:62
+ UINT32 Hs400 : 1; // bit 63
} EMMC_HC_SLOT_CAP;
#pragma pack()
@@ -170,7 +170,7 @@ typedef struct {
**/
EFI_STATUS
EmmcPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -185,7 +185,7 @@ EmmcPeimHcReset (
**/
EFI_STATUS
EmmcPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -200,8 +200,8 @@ EmmcPeimHcEnableInterrupt (
**/
EFI_STATUS
EmmcPeimHcGetCapability (
- IN UINTN Bar,
- OUT EMMC_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT EMMC_HC_SLOT_CAP *Capability
);
/**
@@ -219,7 +219,7 @@ EmmcPeimHcGetCapability (
**/
EFI_STATUS
EmmcPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -234,7 +234,7 @@ EmmcPeimHcCardDetect (
**/
EFI_STATUS
EmmcPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -255,11 +255,11 @@ EmmcPeimHcInitHost (
**/
EFI_STATUS
EmmcPeimSwitch (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 Access,
+ IN UINT8 Index,
+ IN UINT8 Value,
+ IN UINT8 CmdSet
);
/**
@@ -277,8 +277,8 @@ EmmcPeimSwitch (
**/
EFI_STATUS
EmmcPeimSetBlkCount (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT16 BlockCount
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT16 BlockCount
);
/**
@@ -300,12 +300,12 @@ EmmcPeimSetBlkCount (
**/
EFI_STATUS
EmmcPeimRwMultiBlocks (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
);
/**
@@ -321,7 +321,7 @@ EmmcPeimRwMultiBlocks (
**/
EFI_STATUS
EmmcPeimIdentification (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
);
/**
@@ -332,8 +332,7 @@ EmmcPeimIdentification (
**/
VOID
EmmcPeimFreeTrb (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
);
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/ComponentName.c b/MdeModulePkg/Bus/Sd/EmmcDxe/ComponentName.c
index 6a4d18d4d6..b66bbff824 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/ComponentName.c
@@ -11,17 +11,17 @@
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEmmcDxeDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEmmcDxeDriverNameTable[] = {
{ "eng;en", L"Edkii Emmc Device Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
// Controller name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEmmcDxeControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mEmmcDxeControllerNameTable[] = {
{ "eng;en", L"Edkii Emmc Host Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
@@ -36,9 +36,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gEmmcDxeComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEmmcDxeComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) EmmcDxeComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) EmmcDxeComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gEmmcDxeComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)EmmcDxeComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)EmmcDxeComponentNameGetControllerName,
"en"
};
@@ -96,7 +96,6 @@ EmmcDxeComponentNameGetDriverName (
DriverName,
(BOOLEAN)(This == &gEmmcDxeComponentName)
);
-
}
/**
@@ -170,11 +169,11 @@ EmmcDxeComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EmmcDxeComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -205,13 +204,14 @@ EmmcDxeComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the child context
//
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
gEmmcDxeDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -220,8 +220,8 @@ EmmcDxeComponentNameGetControllerName (
return EFI_UNSUPPORTED;
}
- Partition = EMMC_PARTITION_DATA_FROM_BLKIO (BlockIo);
- Device = Partition->Device;
+ Partition = EMMC_PARTITION_DATA_FROM_BLKIO (BlockIo);
+ Device = Partition->Device;
ControllerNameTable = Device->ControllerNameTable;
}
@@ -233,4 +233,3 @@ EmmcDxeComponentNameGetControllerName (
(BOOLEAN)(This == &gEmmcDxeComponentName)
);
}
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c
index 63d77a22fe..39b7c7ce6e 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c
@@ -19,24 +19,28 @@
VOID
EFIAPI
AsyncIoCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EMMC_REQUEST *Request;
- EFI_STATUS Status;
+ EMMC_REQUEST *Request;
+ EFI_STATUS Status;
Status = gBS->CloseEvent (Event);
if (EFI_ERROR (Status)) {
return;
}
- Request = (EMMC_REQUEST *) Context;
+ Request = (EMMC_REQUEST *)Context;
DEBUG_CODE_BEGIN ();
- DEBUG ((DEBUG_INFO, "Emmc Async Request: CmdIndex[%d] Arg[%08x] %r\n",
- Request->SdMmcCmdBlk.CommandIndex, Request->SdMmcCmdBlk.CommandArgument,
- Request->Packet.TransactionStatus));
+ DEBUG ((
+ DEBUG_INFO,
+ "Emmc Async Request: CmdIndex[%d] Arg[%08x] %r\n",
+ Request->SdMmcCmdBlk.CommandIndex,
+ Request->SdMmcCmdBlk.CommandArgument,
+ Request->Packet.TransactionStatus
+ ));
DEBUG_CODE_END ();
if (EFI_ERROR (Request->Packet.TransactionStatus)) {
@@ -65,15 +69,15 @@ AsyncIoCallback (
**/
EFI_STATUS
EmmcSelect (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
PassThru = Device->Private->PassThru;
@@ -84,9 +88,9 @@ EmmcSelect (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -108,16 +112,16 @@ EmmcSelect (
**/
EFI_STATUS
EmmcSendStatus (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT UINT32 *DevStatus
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
PassThru = Device->Private->PassThru;
@@ -128,9 +132,9 @@ EmmcSendStatus (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -155,16 +159,16 @@ EmmcSendStatus (
**/
EFI_STATUS
EmmcGetCsd (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT EMMC_CSD *Csd
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT EMMC_CSD *Csd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
PassThru = Device->Private->PassThru;
@@ -177,9 +181,9 @@ EmmcGetCsd (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -187,7 +191,7 @@ EmmcGetCsd (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
}
return Status;
@@ -207,16 +211,16 @@ EmmcGetCsd (
**/
EFI_STATUS
EmmcGetCid (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT EMMC_CID *Cid
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT EMMC_CID *Cid
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
PassThru = Device->Private->PassThru;
@@ -229,9 +233,9 @@ EmmcGetCid (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_CID;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_CID;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -239,7 +243,7 @@ EmmcGetCid (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Cid) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CID) - 1);
+ CopyMem (((UINT8 *)Cid) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CID) - 1);
}
return Status;
@@ -258,15 +262,15 @@ EmmcGetCid (
**/
EFI_STATUS
EmmcGetExtCsd (
- IN EMMC_DEVICE *Device,
- OUT EMMC_EXT_CSD *ExtCsd
+ IN EMMC_DEVICE *Device,
+ OUT EMMC_EXT_CSD *ExtCsd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
PassThru = Device->Private->PassThru;
@@ -278,12 +282,12 @@ EmmcGetExtCsd (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = 0x00000000;
- Packet.InDataBuffer = ExtCsd;
- Packet.InTransferLength = sizeof (EMMC_EXT_CSD);
+ Packet.InDataBuffer = ExtCsd;
+ Packet.InTransferLength = sizeof (EMMC_EXT_CSD);
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -307,19 +311,19 @@ EmmcGetExtCsd (
**/
EFI_STATUS
EmmcSetExtCsd (
- IN EMMC_PARTITION *Partition,
- IN UINT8 Offset,
- IN UINT8 Value,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN UINT8 Offset,
+ IN UINT8 Value,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *SetExtCsdReq;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT32 CommandArgument;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *SetExtCsdReq;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ UINT32 CommandArgument;
+ EFI_TPL OldTpl;
SetExtCsdReq = NULL;
@@ -333,7 +337,7 @@ EmmcSetExtCsd (
}
SetExtCsdReq->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &SetExtCsdReq->Link);
gBS->RestoreTPL (OldTpl);
SetExtCsdReq->Packet.SdMmcCmdBlk = &SetExtCsdReq->SdMmcCmdBlk;
@@ -346,7 +350,7 @@ EmmcSetExtCsd (
//
// Write the Value to the field specified by Offset.
//
- CommandArgument = (Value << 8) | (Offset << 16) | BIT24 | BIT25;
+ CommandArgument = (Value << 8) | (Offset << 16) | BIT24 | BIT25;
SetExtCsdReq->SdMmcCmdBlk.CommandArgument = CommandArgument;
SetExtCsdReq->IsEnd = IsEnd;
@@ -382,6 +386,7 @@ Error:
if (SetExtCsdReq->Event != NULL) {
gBS->CloseEvent (SetExtCsdReq->Event);
}
+
FreePool (SetExtCsdReq);
}
} else {
@@ -415,17 +420,17 @@ Error:
**/
EFI_STATUS
EmmcSetBlkCount (
- IN EMMC_PARTITION *Partition,
- IN UINT16 BlockNum,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN UINT16 BlockNum,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *SetBlkCntReq;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *SetBlkCntReq;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_TPL OldTpl;
SetBlkCntReq = NULL;
@@ -439,16 +444,16 @@ EmmcSetBlkCount (
}
SetBlkCntReq->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &SetBlkCntReq->Link);
gBS->RestoreTPL (OldTpl);
SetBlkCntReq->Packet.SdMmcCmdBlk = &SetBlkCntReq->SdMmcCmdBlk;
SetBlkCntReq->Packet.SdMmcStatusBlk = &SetBlkCntReq->SdMmcStatusBlk;
SetBlkCntReq->Packet.Timeout = EMMC_GENERIC_TIMEOUT;
- SetBlkCntReq->SdMmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
- SetBlkCntReq->SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SetBlkCntReq->SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SetBlkCntReq->SdMmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
+ SetBlkCntReq->SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SetBlkCntReq->SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SetBlkCntReq->SdMmcCmdBlk.CommandArgument = BlockNum;
SetBlkCntReq->IsEnd = IsEnd;
@@ -484,6 +489,7 @@ Error:
if (SetBlkCntReq->Event != NULL) {
gBS->CloseEvent (SetBlkCntReq->Event);
}
+
FreePool (SetBlkCntReq);
}
} else {
@@ -527,22 +533,22 @@ Error:
**/
EFI_STATUS
EmmcProtocolInOut (
- IN EMMC_PARTITION *Partition,
- IN UINT8 SecurityProtocol,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- IN BOOLEAN IsRead,
- IN UINT64 Timeout,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN UINT8 SecurityProtocol,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ IN BOOLEAN IsRead,
+ IN UINT64 Timeout,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *ProtocolReq;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *ProtocolReq;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_TPL OldTpl;
ProtocolReq = NULL;
@@ -556,7 +562,7 @@ EmmcProtocolInOut (
}
ProtocolReq->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &ProtocolReq->Link);
gBS->RestoreTPL (OldTpl);
ProtocolReq->Packet.SdMmcCmdBlk = &ProtocolReq->SdMmcCmdBlk;
@@ -617,6 +623,7 @@ Error:
if (ProtocolReq->Event != NULL) {
gBS->CloseEvent (ProtocolReq->Event);
}
+
FreePool (ProtocolReq);
}
} else {
@@ -655,20 +662,20 @@ Error:
**/
EFI_STATUS
EmmcRwMultiBlocks (
- IN EMMC_PARTITION *Partition,
- IN EFI_LBA Lba,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN EFI_LBA Lba,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *RwMultiBlkReq;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *RwMultiBlkReq;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_TPL OldTpl;
RwMultiBlkReq = NULL;
@@ -682,7 +689,7 @@ EmmcRwMultiBlocks (
}
RwMultiBlkReq->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &RwMultiBlkReq->Link);
gBS->RestoreTPL (OldTpl);
RwMultiBlkReq->Packet.SdMmcCmdBlk = &RwMultiBlkReq->SdMmcCmdBlk;
@@ -751,6 +758,7 @@ Error:
if (RwMultiBlkReq->Event != NULL) {
gBS->CloseEvent (RwMultiBlkReq->Event);
}
+
FreePool (RwMultiBlkReq);
}
} else {
@@ -793,25 +801,25 @@ Error:
**/
EFI_STATUS
EmmcReadWrite (
- IN EMMC_PARTITION *Partition,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+ IN EMMC_PARTITION *Partition,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN BlockNum;
- UINTN IoAlign;
- UINT8 PartitionConfig;
- UINTN Remaining;
- UINT32 MaxBlock;
- BOOLEAN LastRw;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN BlockNum;
+ UINTN IoAlign;
+ UINT8 PartitionConfig;
+ UINTN Remaining;
+ UINT32 MaxBlock;
+ BOOLEAN LastRw;
Status = EFI_SUCCESS;
Device = Partition->Device;
@@ -838,6 +846,7 @@ EmmcReadWrite (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -846,32 +855,35 @@ EmmcReadWrite (
return EFI_BAD_BUFFER_SIZE;
}
- BlockNum = BufferSize / BlockSize;
+ BlockNum = BufferSize / BlockSize;
if ((Lba + BlockNum - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
}
+
//
// Check if needs to switch partition access.
//
PartitionConfig = Device->ExtCsd.PartitionConfig;
if ((PartitionConfig & 0x7) != Partition->PartitionType) {
- PartitionConfig &= (UINT8)~0x7;
+ PartitionConfig &= (UINT8) ~0x7;
PartitionConfig |= Partition->PartitionType;
- Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, Token, FALSE);
+ Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
+
Device->ExtCsd.PartitionConfig = PartitionConfig;
}
+
//
// Start to execute data transfer. The max block number in single cmd is 65535 blocks.
//
@@ -885,23 +897,31 @@ EmmcReadWrite (
} else {
BlockNum = MaxBlock;
}
+
Status = EmmcSetBlkCount (Partition, (UINT16)BlockNum, Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
BufferSize = BlockNum * BlockSize;
- Status = EmmcRwMultiBlocks (Partition, Lba, Buffer, BufferSize, IsRead, Token, LastRw);
+ Status = EmmcRwMultiBlocks (Partition, Lba, Buffer, BufferSize, IsRead, Token, LastRw);
if (EFI_ERROR (Status)) {
return Status;
}
- DEBUG ((DEBUG_BLKIO,
- "Emmc%a(): Part %d Lba 0x%x BlkNo 0x%x Event %p with %r\n",
- IsRead ? "Read " : "Write", Partition->PartitionType, Lba, BlockNum,
- (Token != NULL) ? Token->Event : NULL, Status));
- Lba += BlockNum;
- Buffer = (UINT8*)Buffer + BufferSize;
+ DEBUG ((
+ DEBUG_BLKIO,
+ "Emmc%a(): Part %d Lba 0x%x BlkNo 0x%x Event %p with %r\n",
+ IsRead ? "Read " : "Write",
+ Partition->PartitionType,
+ Lba,
+ BlockNum,
+ (Token != NULL) ? Token->Event : NULL,
+ Status
+ ));
+
+ Lba += BlockNum;
+ Buffer = (UINT8 *)Buffer + BufferSize;
Remaining -= BlockNum;
}
@@ -922,13 +942,13 @@ EmmcReadWrite (
EFI_STATUS
EFIAPI
EmmcReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO (This);
@@ -967,11 +987,11 @@ EmmcReadBlocks (
IN UINT32 MediaId,
IN EFI_LBA Lba,
IN UINTN BufferSize,
- OUT VOID *Buffer
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO (This);
@@ -1002,15 +1022,15 @@ EmmcReadBlocks (
EFI_STATUS
EFIAPI
EmmcWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO (This);
@@ -1031,7 +1051,7 @@ EmmcWriteBlocks (
EFI_STATUS
EFIAPI
EmmcFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
)
{
//
@@ -1058,18 +1078,19 @@ EmmcResetEx (
IN BOOLEAN ExtendedVerification
)
{
- EMMC_PARTITION *Partition;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- EMMC_REQUEST *Request;
- EFI_TPL OldTpl;
+ EMMC_PARTITION *Partition;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ EMMC_REQUEST *Request;
+ EFI_TPL OldTpl;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO2 (This);
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
for (Link = GetFirstNode (&Partition->Queue);
!IsNull (&Partition->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Partition->Queue, Link);
RemoveEntryList (Link);
@@ -1084,6 +1105,7 @@ EmmcResetEx (
FreePool (Request);
}
+
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
@@ -1118,16 +1140,16 @@ EmmcResetEx (
EFI_STATUS
EFIAPI
EmmcReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO2 (This);
@@ -1160,16 +1182,16 @@ EmmcReadBlocksEx (
EFI_STATUS
EFIAPI
EmmcWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
Partition = EMMC_PARTITION_DATA_FROM_BLKIO2 (This);
@@ -1198,7 +1220,7 @@ EmmcFlushBlocksEx (
//
// Signal event and return directly.
//
- if (Token != NULL && Token->Event != NULL) {
+ if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
@@ -1282,27 +1304,27 @@ EmmcFlushBlocksEx (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolInOut (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize,
- IN BOOLEAN IsRead
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize,
+ IN BOOLEAN IsRead
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
- EMMC_DEVICE *Device;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN BlockNum;
- UINTN IoAlign;
- UINTN Remaining;
- UINT32 MaxBlock;
- UINT8 PartitionConfig;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
+ EMMC_DEVICE *Device;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN BlockNum;
+ UINTN IoAlign;
+ UINTN Remaining;
+ UINT32 MaxBlock;
+ UINT8 PartitionConfig;
Status = EFI_SUCCESS;
Partition = EMMC_PARTITION_DATA_FROM_SSP (This);
@@ -1330,10 +1352,10 @@ EmmcSecurityProtocolInOut (
return EFI_BAD_BUFFER_SIZE;
}
- BlockNum = PayloadBufferSize / BlockSize;
+ BlockNum = PayloadBufferSize / BlockSize;
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) PayloadBuffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)PayloadBuffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1341,21 +1363,24 @@ EmmcSecurityProtocolInOut (
// Security protocol interface is synchronous transfer.
// Waiting for async I/O list to be empty before any operation.
//
- while (!IsListEmpty (&Partition->Queue));
+ while (!IsListEmpty (&Partition->Queue)) {
+ }
//
// Check if needs to switch partition access.
//
PartitionConfig = Device->ExtCsd.PartitionConfig;
if ((PartitionConfig & 0x7) != Partition->PartitionType) {
- PartitionConfig &= (UINT8)~0x7;
+ PartitionConfig &= (UINT8) ~0x7;
PartitionConfig |= Partition->PartitionType;
- Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, NULL, FALSE);
+ Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, NULL, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
+
Device->ExtCsd.PartitionConfig = PartitionConfig;
}
+
//
// Start to execute data transfer. The max block number in single cmd is 65535 blocks.
//
@@ -1375,12 +1400,12 @@ EmmcSecurityProtocolInOut (
}
PayloadBufferSize = BlockNum * BlockSize;
- Status = EmmcProtocolInOut (Partition, SecurityProtocolId, SecurityProtocolSpecificData, PayloadBufferSize, PayloadBuffer, IsRead, Timeout, NULL, FALSE);
+ Status = EmmcProtocolInOut (Partition, SecurityProtocolId, SecurityProtocolSpecificData, PayloadBufferSize, PayloadBuffer, IsRead, Timeout, NULL, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
- PayloadBuffer = (UINT8*)PayloadBuffer + PayloadBufferSize;
+ PayloadBuffer = (UINT8 *)PayloadBuffer + PayloadBufferSize;
Remaining -= BlockNum;
if (PayloadTransferSize != NULL) {
*PayloadTransferSize += PayloadBufferSize;
@@ -1465,19 +1490,19 @@ EmmcSecurityProtocolInOut (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolIn (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- if ((PayloadTransferSize == NULL) && PayloadBufferSize != 0) {
+ if ((PayloadTransferSize == NULL) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -1560,16 +1585,16 @@ EmmcSecurityProtocolIn (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolOut (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EmmcSecurityProtocolInOut (
This,
@@ -1602,17 +1627,17 @@ EmmcSecurityProtocolOut (
**/
EFI_STATUS
EmmcEraseBlockStart (
- IN EMMC_PARTITION *Partition,
- IN EFI_LBA StartLba,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN EFI_LBA StartLba,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *EraseBlockStart;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *EraseBlockStart;
+ EFI_TPL OldTpl;
EraseBlockStart = NULL;
@@ -1626,7 +1651,7 @@ EmmcEraseBlockStart (
}
EraseBlockStart->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &EraseBlockStart->Link);
gBS->RestoreTPL (OldTpl);
EraseBlockStart->Packet.SdMmcCmdBlk = &EraseBlockStart->SdMmcCmdBlk;
@@ -1676,6 +1701,7 @@ Error:
if (EraseBlockStart->Event != NULL) {
gBS->CloseEvent (EraseBlockStart->Event);
}
+
FreePool (EraseBlockStart);
}
} else {
@@ -1709,17 +1735,17 @@ Error:
**/
EFI_STATUS
EmmcEraseBlockEnd (
- IN EMMC_PARTITION *Partition,
- IN EFI_LBA EndLba,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN EFI_LBA EndLba,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *EraseBlockEnd;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *EraseBlockEnd;
+ EFI_TPL OldTpl;
EraseBlockEnd = NULL;
@@ -1733,7 +1759,7 @@ EmmcEraseBlockEnd (
}
EraseBlockEnd->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &EraseBlockEnd->Link);
gBS->RestoreTPL (OldTpl);
EraseBlockEnd->Packet.SdMmcCmdBlk = &EraseBlockEnd->SdMmcCmdBlk;
@@ -1783,6 +1809,7 @@ Error:
if (EraseBlockEnd->Event != NULL) {
gBS->CloseEvent (EraseBlockEnd->Event);
}
+
FreePool (EraseBlockEnd);
}
} else {
@@ -1815,16 +1842,16 @@ Error:
**/
EFI_STATUS
EmmcEraseBlock (
- IN EMMC_PARTITION *Partition,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN EMMC_PARTITION *Partition,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EMMC_DEVICE *Device;
- EMMC_REQUEST *EraseBlock;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EMMC_DEVICE *Device;
+ EMMC_REQUEST *EraseBlock;
+ EFI_TPL OldTpl;
EraseBlock = NULL;
@@ -1838,7 +1865,7 @@ EmmcEraseBlock (
}
EraseBlock->Signature = EMMC_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Partition->Queue, &EraseBlock->Link);
gBS->RestoreTPL (OldTpl);
EraseBlock->Packet.SdMmcCmdBlk = &EraseBlock->SdMmcCmdBlk;
@@ -1890,6 +1917,7 @@ Error:
if (EraseBlock->Event != NULL) {
gBS->CloseEvent (EraseBlock->Event);
}
+
FreePool (EraseBlock);
}
} else {
@@ -1922,14 +1950,14 @@ Error:
**/
EFI_STATUS
EmmcWriteZeros (
- IN EMMC_PARTITION *Partition,
- IN EFI_LBA StartLba,
- IN UINTN Size
+ IN EMMC_PARTITION *Partition,
+ IN EFI_LBA StartLba,
+ IN UINTN Size
)
{
- EFI_STATUS Status;
- UINT8 *Buffer;
- UINT32 MediaId;
+ EFI_STATUS Status;
+ UINT8 *Buffer;
+ UINT32 MediaId;
Buffer = AllocateZeroPool (Size);
if (Buffer == NULL) {
@@ -1974,27 +2002,27 @@ EmmcWriteZeros (
EFI_STATUS
EFIAPI
EmmcEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN BlockNum;
- EFI_LBA FirstLba;
- EFI_LBA LastLba;
- EFI_LBA StartGroupLba;
- EFI_LBA EndGroupLba;
- UINT32 EraseGroupSize;
- UINT32 Remainder;
- UINTN WriteZeroSize;
- UINT8 PartitionConfig;
- EMMC_PARTITION *Partition;
- EMMC_DEVICE *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN BlockNum;
+ EFI_LBA FirstLba;
+ EFI_LBA LastLba;
+ EFI_LBA StartGroupLba;
+ EFI_LBA EndGroupLba;
+ UINT32 EraseGroupSize;
+ UINT32 Remainder;
+ UINTN WriteZeroSize;
+ UINT8 PartitionConfig;
+ EMMC_PARTITION *Partition;
+ EMMC_DEVICE *Device;
Status = EFI_SUCCESS;
Partition = EMMC_PARTITION_DATA_FROM_ERASEBLK (This);
@@ -2017,7 +2045,7 @@ EmmcEraseBlocks (
return EFI_INVALID_PARAMETER;
}
- BlockNum = Size / BlockSize;
+ BlockNum = Size / BlockSize;
if ((Lba + BlockNum - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
@@ -2034,12 +2062,13 @@ EmmcEraseBlocks (
//
PartitionConfig = Device->ExtCsd.PartitionConfig;
if ((PartitionConfig & 0x7) != Partition->PartitionType) {
- PartitionConfig &= (UINT8)~0x7;
+ PartitionConfig &= (UINT8) ~0x7;
PartitionConfig |= Partition->PartitionType;
- Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, (EFI_BLOCK_IO2_TOKEN*)Token, FALSE);
+ Status = EmmcSetExtCsd (Partition, OFFSET_OF (EMMC_EXT_CSD, PartitionConfig), PartitionConfig, (EFI_BLOCK_IO2_TOKEN *)Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
+
Device->ExtCsd.PartitionConfig = PartitionConfig;
}
@@ -2079,6 +2108,7 @@ EmmcEraseBlocks (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -2089,7 +2119,7 @@ EmmcEraseBlocks (
//
if (StartGroupLba > FirstLba) {
WriteZeroSize = (UINTN)(StartGroupLba - FirstLba) * BlockSize;
- Status = EmmcWriteZeros (Partition, FirstLba, WriteZeroSize);
+ Status = EmmcWriteZeros (Partition, FirstLba, WriteZeroSize);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2102,7 +2132,7 @@ EmmcEraseBlocks (
//
if (EndGroupLba <= LastLba) {
WriteZeroSize = (UINTN)(LastLba + 1 - EndGroupLba) * BlockSize;
- Status = EmmcWriteZeros (Partition, EndGroupLba, WriteZeroSize);
+ Status = EmmcWriteZeros (Partition, EndGroupLba, WriteZeroSize);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2125,6 +2155,7 @@ EmmcEraseBlocks (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -2132,17 +2163,17 @@ EmmcEraseBlocks (
LastLba = EndGroupLba - 1;
}
- Status = EmmcEraseBlockStart (Partition, FirstLba, (EFI_BLOCK_IO2_TOKEN*)Token, FALSE);
+ Status = EmmcEraseBlockStart (Partition, FirstLba, (EFI_BLOCK_IO2_TOKEN *)Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
- Status = EmmcEraseBlockEnd (Partition, LastLba, (EFI_BLOCK_IO2_TOKEN*)Token, FALSE);
+ Status = EmmcEraseBlockEnd (Partition, LastLba, (EFI_BLOCK_IO2_TOKEN *)Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
- Status = EmmcEraseBlock (Partition, (EFI_BLOCK_IO2_TOKEN*)Token, TRUE);
+ Status = EmmcEraseBlock (Partition, (EFI_BLOCK_IO2_TOKEN *)Token, TRUE);
if (EFI_ERROR (Status)) {
return Status;
}
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.h b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.h
index 62e70ae912..2568f0359d 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.h
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.h
@@ -26,8 +26,8 @@
EFI_STATUS
EFIAPI
EmmcReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -56,7 +56,7 @@ EmmcReadBlocks (
IN UINT32 MediaId,
IN EFI_LBA Lba,
IN UINTN BufferSize,
- OUT VOID *Buffer
+ OUT VOID *Buffer
);
/**
@@ -82,11 +82,11 @@ EmmcReadBlocks (
EFI_STATUS
EFIAPI
EmmcWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -102,7 +102,7 @@ EmmcWriteBlocks (
EFI_STATUS
EFIAPI
EmmcFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
);
/**
@@ -152,12 +152,12 @@ EmmcResetEx (
EFI_STATUS
EFIAPI
EmmcReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -185,12 +185,12 @@ EmmcReadBlocksEx (
EFI_STATUS
EFIAPI
EmmcWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -287,15 +287,15 @@ EmmcFlushBlocksEx (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolInOut (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize,
- IN BOOLEAN IsRead
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize,
+ IN BOOLEAN IsRead
);
/**
@@ -373,14 +373,14 @@ EmmcSecurityProtocolInOut (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolIn (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- OUT VOID *PayloadBuffer,
- OUT UINTN *PayloadTransferSize
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ OUT VOID *PayloadBuffer,
+ OUT UINTN *PayloadTransferSize
);
/**
@@ -447,13 +447,13 @@ EmmcSecurityProtocolIn (
EFI_STATUS
EFIAPI
EmmcSecurityProtocolOut (
- IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 Timeout,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN PayloadBufferSize,
- IN VOID *PayloadBuffer
+ IN EFI_STORAGE_SECURITY_COMMAND_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Timeout,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN PayloadBufferSize,
+ IN VOID *PayloadBuffer
);
/**
@@ -486,12 +486,11 @@ EmmcSecurityProtocolOut (
EFI_STATUS
EFIAPI
EmmcEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
);
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDiskInfo.c b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDiskInfo.c
index e9e31aa2c1..1f3ab05db9 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDiskInfo.c
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDiskInfo.c
@@ -32,9 +32,9 @@ EmmcDiskInfoInquiry (
IN OUT UINT32 *InquiryDataSize
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
- EMMC_DEVICE *Device;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
+ EMMC_DEVICE *Device;
Partition = EMMC_PARTITION_DATA_FROM_DISKINFO (This);
Device = Partition->Device;
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.c b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.c
index 8dca9a6ee1..c780c396e1 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.c
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.c
@@ -14,7 +14,7 @@
//
// EmmcDxe Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gEmmcDxeDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gEmmcDxeDriverBinding = {
EmmcDxeDriverBindingSupported,
EmmcDxeDriverBindingStart,
EmmcDxeDriverBindingStop,
@@ -26,7 +26,7 @@ EFI_DRIVER_BINDING_PROTOCOL gEmmcDxeDriverBinding = {
//
// Template for Emmc Partitions.
//
-EMMC_PARTITION mEmmcPartitionTemplate = {
+EMMC_PARTITION mEmmcPartitionTemplate = {
EMMC_PARTITION_SIGNATURE, // Signature
FALSE, // Enable
EmmcPartitionUnknown, // PartitionType
@@ -93,39 +93,39 @@ DumpCsd (
IN EMMC_CSD *Csd
)
{
- DEBUG((DEBUG_INFO, "== Dump Emmc Csd Register==\n"));
- DEBUG((DEBUG_INFO, " CSD structure 0x%x\n", Csd->CsdStructure));
- DEBUG((DEBUG_INFO, " System specification version 0x%x\n", Csd->SpecVers));
- DEBUG((DEBUG_INFO, " Data read access-time 1 0x%x\n", Csd->Taac));
- DEBUG((DEBUG_INFO, " Data read access-time 2 0x%x\n", Csd->Nsac));
- DEBUG((DEBUG_INFO, " Max. bus clock frequency 0x%x\n", Csd->TranSpeed));
- DEBUG((DEBUG_INFO, " Device command classes 0x%x\n", Csd->Ccc));
- DEBUG((DEBUG_INFO, " Max. read data block length 0x%x\n", Csd->ReadBlLen));
- DEBUG((DEBUG_INFO, " Partial blocks for read allowed 0x%x\n", Csd->ReadBlPartial));
- DEBUG((DEBUG_INFO, " Write block misalignment 0x%x\n", Csd->WriteBlkMisalign));
- DEBUG((DEBUG_INFO, " Read block misalignment 0x%x\n", Csd->ReadBlkMisalign));
- DEBUG((DEBUG_INFO, " DSR implemented 0x%x\n", Csd->DsrImp));
- DEBUG((DEBUG_INFO, " Device size 0x%x\n", Csd->CSizeLow | (Csd->CSizeHigh << 2)));
- DEBUG((DEBUG_INFO, " Max. read current @ VDD min 0x%x\n", Csd->VddRCurrMin));
- DEBUG((DEBUG_INFO, " Max. read current @ VDD max 0x%x\n", Csd->VddRCurrMax));
- DEBUG((DEBUG_INFO, " Max. write current @ VDD min 0x%x\n", Csd->VddWCurrMin));
- DEBUG((DEBUG_INFO, " Max. write current @ VDD max 0x%x\n", Csd->VddWCurrMax));
- DEBUG((DEBUG_INFO, " Device size multiplier 0x%x\n", Csd->CSizeMult));
- DEBUG((DEBUG_INFO, " Erase group size 0x%x\n", Csd->EraseGrpSize));
- DEBUG((DEBUG_INFO, " Erase group size multiplier 0x%x\n", Csd->EraseGrpMult));
- DEBUG((DEBUG_INFO, " Write protect group size 0x%x\n", Csd->WpGrpSize));
- DEBUG((DEBUG_INFO, " Write protect group enable 0x%x\n", Csd->WpGrpEnable));
- DEBUG((DEBUG_INFO, " Manufacturer default ECC 0x%x\n", Csd->DefaultEcc));
- DEBUG((DEBUG_INFO, " Write speed factor 0x%x\n", Csd->R2WFactor));
- DEBUG((DEBUG_INFO, " Max. write data block length 0x%x\n", Csd->WriteBlLen));
- DEBUG((DEBUG_INFO, " Partial blocks for write allowed 0x%x\n", Csd->WriteBlPartial));
- DEBUG((DEBUG_INFO, " Content protection application 0x%x\n", Csd->ContentProtApp));
- DEBUG((DEBUG_INFO, " File format group 0x%x\n", Csd->FileFormatGrp));
- DEBUG((DEBUG_INFO, " Copy flag (OTP) 0x%x\n", Csd->Copy));
- DEBUG((DEBUG_INFO, " Permanent write protection 0x%x\n", Csd->PermWriteProtect));
- DEBUG((DEBUG_INFO, " Temporary write protection 0x%x\n", Csd->TmpWriteProtect));
- DEBUG((DEBUG_INFO, " File format 0x%x\n", Csd->FileFormat));
- DEBUG((DEBUG_INFO, " ECC code 0x%x\n", Csd->Ecc));
+ DEBUG ((DEBUG_INFO, "== Dump Emmc Csd Register==\n"));
+ DEBUG ((DEBUG_INFO, " CSD structure 0x%x\n", Csd->CsdStructure));
+ DEBUG ((DEBUG_INFO, " System specification version 0x%x\n", Csd->SpecVers));
+ DEBUG ((DEBUG_INFO, " Data read access-time 1 0x%x\n", Csd->Taac));
+ DEBUG ((DEBUG_INFO, " Data read access-time 2 0x%x\n", Csd->Nsac));
+ DEBUG ((DEBUG_INFO, " Max. bus clock frequency 0x%x\n", Csd->TranSpeed));
+ DEBUG ((DEBUG_INFO, " Device command classes 0x%x\n", Csd->Ccc));
+ DEBUG ((DEBUG_INFO, " Max. read data block length 0x%x\n", Csd->ReadBlLen));
+ DEBUG ((DEBUG_INFO, " Partial blocks for read allowed 0x%x\n", Csd->ReadBlPartial));
+ DEBUG ((DEBUG_INFO, " Write block misalignment 0x%x\n", Csd->WriteBlkMisalign));
+ DEBUG ((DEBUG_INFO, " Read block misalignment 0x%x\n", Csd->ReadBlkMisalign));
+ DEBUG ((DEBUG_INFO, " DSR implemented 0x%x\n", Csd->DsrImp));
+ DEBUG ((DEBUG_INFO, " Device size 0x%x\n", Csd->CSizeLow | (Csd->CSizeHigh << 2)));
+ DEBUG ((DEBUG_INFO, " Max. read current @ VDD min 0x%x\n", Csd->VddRCurrMin));
+ DEBUG ((DEBUG_INFO, " Max. read current @ VDD max 0x%x\n", Csd->VddRCurrMax));
+ DEBUG ((DEBUG_INFO, " Max. write current @ VDD min 0x%x\n", Csd->VddWCurrMin));
+ DEBUG ((DEBUG_INFO, " Max. write current @ VDD max 0x%x\n", Csd->VddWCurrMax));
+ DEBUG ((DEBUG_INFO, " Device size multiplier 0x%x\n", Csd->CSizeMult));
+ DEBUG ((DEBUG_INFO, " Erase group size 0x%x\n", Csd->EraseGrpSize));
+ DEBUG ((DEBUG_INFO, " Erase group size multiplier 0x%x\n", Csd->EraseGrpMult));
+ DEBUG ((DEBUG_INFO, " Write protect group size 0x%x\n", Csd->WpGrpSize));
+ DEBUG ((DEBUG_INFO, " Write protect group enable 0x%x\n", Csd->WpGrpEnable));
+ DEBUG ((DEBUG_INFO, " Manufacturer default ECC 0x%x\n", Csd->DefaultEcc));
+ DEBUG ((DEBUG_INFO, " Write speed factor 0x%x\n", Csd->R2WFactor));
+ DEBUG ((DEBUG_INFO, " Max. write data block length 0x%x\n", Csd->WriteBlLen));
+ DEBUG ((DEBUG_INFO, " Partial blocks for write allowed 0x%x\n", Csd->WriteBlPartial));
+ DEBUG ((DEBUG_INFO, " Content protection application 0x%x\n", Csd->ContentProtApp));
+ DEBUG ((DEBUG_INFO, " File format group 0x%x\n", Csd->FileFormatGrp));
+ DEBUG ((DEBUG_INFO, " Copy flag (OTP) 0x%x\n", Csd->Copy));
+ DEBUG ((DEBUG_INFO, " Permanent write protection 0x%x\n", Csd->PermWriteProtect));
+ DEBUG ((DEBUG_INFO, " Temporary write protection 0x%x\n", Csd->TmpWriteProtect));
+ DEBUG ((DEBUG_INFO, " File format 0x%x\n", Csd->FileFormat));
+ DEBUG ((DEBUG_INFO, " ECC code 0x%x\n", Csd->Ecc));
return EFI_SUCCESS;
}
@@ -142,68 +142,98 @@ DumpExtCsd (
IN EMMC_EXT_CSD *ExtCsd
)
{
- DEBUG((DEBUG_INFO, "==Dump Emmc ExtCsd Register==\n"));
- DEBUG((DEBUG_INFO, " Supported Command Sets 0x%x\n", ExtCsd->CmdSet));
- DEBUG((DEBUG_INFO, " HPI features 0x%x\n", ExtCsd->HpiFeatures));
- DEBUG((DEBUG_INFO, " Background operations support 0x%x\n", ExtCsd->BkOpsSupport));
- DEBUG((DEBUG_INFO, " Background operations status 0x%x\n", ExtCsd->BkopsStatus));
- DEBUG((DEBUG_INFO, " Number of correctly programmed sectors 0x%x\n", *((UINT32*)&ExtCsd->CorrectlyPrgSectorsNum[0])));
- DEBUG((DEBUG_INFO, " Initialization time after partitioning 0x%x\n", ExtCsd->IniTimeoutAp));
- DEBUG((DEBUG_INFO, " TRIM Multiplier 0x%x\n", ExtCsd->TrimMult));
- DEBUG((DEBUG_INFO, " Secure Feature support 0x%x\n", ExtCsd->SecFeatureSupport));
- DEBUG((DEBUG_INFO, " Secure Erase Multiplier 0x%x\n", ExtCsd->SecEraseMult));
- DEBUG((DEBUG_INFO, " Secure TRIM Multiplier 0x%x\n", ExtCsd->SecTrimMult));
- DEBUG((DEBUG_INFO, " Boot information 0x%x\n", ExtCsd->BootInfo));
- DEBUG((DEBUG_INFO, " Boot partition size 0x%x\n", ExtCsd->BootSizeMult));
- DEBUG((DEBUG_INFO, " Access size 0x%x\n", ExtCsd->AccSize));
- DEBUG((DEBUG_INFO, " High-capacity erase unit size 0x%x\n", ExtCsd->HcEraseGrpSize));
- DEBUG((DEBUG_INFO, " High-capacity erase timeout 0x%x\n", ExtCsd->EraseTimeoutMult));
- DEBUG((DEBUG_INFO, " Reliable write sector count 0x%x\n", ExtCsd->RelWrSecC));
- DEBUG((DEBUG_INFO, " High-capacity write protect group size 0x%x\n", ExtCsd->HcWpGrpSize));
- DEBUG((DEBUG_INFO, " Sleep/awake timeout 0x%x\n", ExtCsd->SATimeout));
- DEBUG((DEBUG_INFO, " Sector Count 0x%x\n", *((UINT32*)&ExtCsd->SecCount[0])));
- DEBUG((DEBUG_INFO, " Partition switching timing 0x%x\n", ExtCsd->PartitionSwitchTime));
- DEBUG((DEBUG_INFO, " Out-of-interrupt busy timing 0x%x\n", ExtCsd->OutOfInterruptTime));
- DEBUG((DEBUG_INFO, " I/O Driver Strength 0x%x\n", ExtCsd->DriverStrength));
- DEBUG((DEBUG_INFO, " Device type 0x%x\n", ExtCsd->DeviceType));
- DEBUG((DEBUG_INFO, " CSD STRUCTURE 0x%x\n", ExtCsd->CsdStructure));
- DEBUG((DEBUG_INFO, " Extended CSD revision 0x%x\n", ExtCsd->ExtCsdRev));
- DEBUG((DEBUG_INFO, " Command set 0x%x\n", ExtCsd->CmdSet));
- DEBUG((DEBUG_INFO, " Command set revision 0x%x\n", ExtCsd->CmdSetRev));
- DEBUG((DEBUG_INFO, " Power class 0x%x\n", ExtCsd->PowerClass));
- DEBUG((DEBUG_INFO, " High-speed interface timing 0x%x\n", ExtCsd->HsTiming));
- DEBUG((DEBUG_INFO, " Bus width mode 0x%x\n", ExtCsd->BusWidth));
- DEBUG((DEBUG_INFO, " Erased memory content 0x%x\n", ExtCsd->ErasedMemCont));
- DEBUG((DEBUG_INFO, " Partition configuration 0x%x\n", ExtCsd->PartitionConfig));
- DEBUG((DEBUG_INFO, " Boot config protection 0x%x\n", ExtCsd->BootConfigProt));
- DEBUG((DEBUG_INFO, " Boot bus Conditions 0x%x\n", ExtCsd->BootBusConditions));
- DEBUG((DEBUG_INFO, " High-density erase group definition 0x%x\n", ExtCsd->EraseGroupDef));
- DEBUG((DEBUG_INFO, " Boot write protection status register 0x%x\n", ExtCsd->BootWpStatus));
- DEBUG((DEBUG_INFO, " Boot area write protection register 0x%x\n", ExtCsd->BootWp));
- DEBUG((DEBUG_INFO, " User area write protection register 0x%x\n", ExtCsd->UserWp));
- DEBUG((DEBUG_INFO, " FW configuration 0x%x\n", ExtCsd->FwConfig));
- DEBUG((DEBUG_INFO, " RPMB Size 0x%x\n", ExtCsd->RpmbSizeMult));
- DEBUG((DEBUG_INFO, " H/W reset function 0x%x\n", ExtCsd->RstFunction));
- DEBUG((DEBUG_INFO, " Partitioning Support 0x%x\n", ExtCsd->PartitioningSupport));
- DEBUG((DEBUG_INFO, " Max Enhanced Area Size 0x%02x%02x%02x\n", \
- ExtCsd->MaxEnhSizeMult[2], ExtCsd->MaxEnhSizeMult[1], ExtCsd->MaxEnhSizeMult[0]));
- DEBUG((DEBUG_INFO, " Partitions attribute 0x%x\n", ExtCsd->PartitionsAttribute));
- DEBUG((DEBUG_INFO, " Partitioning Setting 0x%x\n", ExtCsd->PartitionSettingCompleted));
- DEBUG((DEBUG_INFO, " General Purpose Partition 1 Size 0x%02x%02x%02x\n", \
- ExtCsd->GpSizeMult[2], ExtCsd->GpSizeMult[1], ExtCsd->GpSizeMult[0]));
- DEBUG((DEBUG_INFO, " General Purpose Partition 2 Size 0x%02x%02x%02x\n", \
- ExtCsd->GpSizeMult[5], ExtCsd->GpSizeMult[4], ExtCsd->GpSizeMult[3]));
- DEBUG((DEBUG_INFO, " General Purpose Partition 3 Size 0x%02x%02x%02x\n", \
- ExtCsd->GpSizeMult[8], ExtCsd->GpSizeMult[7], ExtCsd->GpSizeMult[6]));
- DEBUG((DEBUG_INFO, " General Purpose Partition 4 Size 0x%02x%02x%02x\n", \
- ExtCsd->GpSizeMult[11], ExtCsd->GpSizeMult[10], ExtCsd->GpSizeMult[9]));
- DEBUG((DEBUG_INFO, " Enhanced User Data Area Size 0x%02x%02x%02x\n", \
- ExtCsd->EnhSizeMult[2], ExtCsd->EnhSizeMult[1], ExtCsd->EnhSizeMult[0]));
- DEBUG((DEBUG_INFO, " Enhanced User Data Start Address 0x%x\n", *((UINT32*)&ExtCsd->EnhStartAddr[0])));
- DEBUG((DEBUG_INFO, " Bad Block Management mode 0x%x\n", ExtCsd->SecBadBlkMgmnt));
- DEBUG((DEBUG_INFO, " Native sector size 0x%x\n", ExtCsd->NativeSectorSize));
- DEBUG((DEBUG_INFO, " Sector size emulation 0x%x\n", ExtCsd->UseNativeSector));
- DEBUG((DEBUG_INFO, " Sector size 0x%x\n", ExtCsd->DataSectorSize));
+ DEBUG ((DEBUG_INFO, "==Dump Emmc ExtCsd Register==\n"));
+ DEBUG ((DEBUG_INFO, " Supported Command Sets 0x%x\n", ExtCsd->CmdSet));
+ DEBUG ((DEBUG_INFO, " HPI features 0x%x\n", ExtCsd->HpiFeatures));
+ DEBUG ((DEBUG_INFO, " Background operations support 0x%x\n", ExtCsd->BkOpsSupport));
+ DEBUG ((DEBUG_INFO, " Background operations status 0x%x\n", ExtCsd->BkopsStatus));
+ DEBUG ((DEBUG_INFO, " Number of correctly programmed sectors 0x%x\n", *((UINT32 *)&ExtCsd->CorrectlyPrgSectorsNum[0])));
+ DEBUG ((DEBUG_INFO, " Initialization time after partitioning 0x%x\n", ExtCsd->IniTimeoutAp));
+ DEBUG ((DEBUG_INFO, " TRIM Multiplier 0x%x\n", ExtCsd->TrimMult));
+ DEBUG ((DEBUG_INFO, " Secure Feature support 0x%x\n", ExtCsd->SecFeatureSupport));
+ DEBUG ((DEBUG_INFO, " Secure Erase Multiplier 0x%x\n", ExtCsd->SecEraseMult));
+ DEBUG ((DEBUG_INFO, " Secure TRIM Multiplier 0x%x\n", ExtCsd->SecTrimMult));
+ DEBUG ((DEBUG_INFO, " Boot information 0x%x\n", ExtCsd->BootInfo));
+ DEBUG ((DEBUG_INFO, " Boot partition size 0x%x\n", ExtCsd->BootSizeMult));
+ DEBUG ((DEBUG_INFO, " Access size 0x%x\n", ExtCsd->AccSize));
+ DEBUG ((DEBUG_INFO, " High-capacity erase unit size 0x%x\n", ExtCsd->HcEraseGrpSize));
+ DEBUG ((DEBUG_INFO, " High-capacity erase timeout 0x%x\n", ExtCsd->EraseTimeoutMult));
+ DEBUG ((DEBUG_INFO, " Reliable write sector count 0x%x\n", ExtCsd->RelWrSecC));
+ DEBUG ((DEBUG_INFO, " High-capacity write protect group size 0x%x\n", ExtCsd->HcWpGrpSize));
+ DEBUG ((DEBUG_INFO, " Sleep/awake timeout 0x%x\n", ExtCsd->SATimeout));
+ DEBUG ((DEBUG_INFO, " Sector Count 0x%x\n", *((UINT32 *)&ExtCsd->SecCount[0])));
+ DEBUG ((DEBUG_INFO, " Partition switching timing 0x%x\n", ExtCsd->PartitionSwitchTime));
+ DEBUG ((DEBUG_INFO, " Out-of-interrupt busy timing 0x%x\n", ExtCsd->OutOfInterruptTime));
+ DEBUG ((DEBUG_INFO, " I/O Driver Strength 0x%x\n", ExtCsd->DriverStrength));
+ DEBUG ((DEBUG_INFO, " Device type 0x%x\n", ExtCsd->DeviceType));
+ DEBUG ((DEBUG_INFO, " CSD STRUCTURE 0x%x\n", ExtCsd->CsdStructure));
+ DEBUG ((DEBUG_INFO, " Extended CSD revision 0x%x\n", ExtCsd->ExtCsdRev));
+ DEBUG ((DEBUG_INFO, " Command set 0x%x\n", ExtCsd->CmdSet));
+ DEBUG ((DEBUG_INFO, " Command set revision 0x%x\n", ExtCsd->CmdSetRev));
+ DEBUG ((DEBUG_INFO, " Power class 0x%x\n", ExtCsd->PowerClass));
+ DEBUG ((DEBUG_INFO, " High-speed interface timing 0x%x\n", ExtCsd->HsTiming));
+ DEBUG ((DEBUG_INFO, " Bus width mode 0x%x\n", ExtCsd->BusWidth));
+ DEBUG ((DEBUG_INFO, " Erased memory content 0x%x\n", ExtCsd->ErasedMemCont));
+ DEBUG ((DEBUG_INFO, " Partition configuration 0x%x\n", ExtCsd->PartitionConfig));
+ DEBUG ((DEBUG_INFO, " Boot config protection 0x%x\n", ExtCsd->BootConfigProt));
+ DEBUG ((DEBUG_INFO, " Boot bus Conditions 0x%x\n", ExtCsd->BootBusConditions));
+ DEBUG ((DEBUG_INFO, " High-density erase group definition 0x%x\n", ExtCsd->EraseGroupDef));
+ DEBUG ((DEBUG_INFO, " Boot write protection status register 0x%x\n", ExtCsd->BootWpStatus));
+ DEBUG ((DEBUG_INFO, " Boot area write protection register 0x%x\n", ExtCsd->BootWp));
+ DEBUG ((DEBUG_INFO, " User area write protection register 0x%x\n", ExtCsd->UserWp));
+ DEBUG ((DEBUG_INFO, " FW configuration 0x%x\n", ExtCsd->FwConfig));
+ DEBUG ((DEBUG_INFO, " RPMB Size 0x%x\n", ExtCsd->RpmbSizeMult));
+ DEBUG ((DEBUG_INFO, " H/W reset function 0x%x\n", ExtCsd->RstFunction));
+ DEBUG ((DEBUG_INFO, " Partitioning Support 0x%x\n", ExtCsd->PartitioningSupport));
+ DEBUG ((
+ DEBUG_INFO,
+ " Max Enhanced Area Size 0x%02x%02x%02x\n", \
+ ExtCsd->MaxEnhSizeMult[2],
+ ExtCsd->MaxEnhSizeMult[1],
+ ExtCsd->MaxEnhSizeMult[0]
+ ));
+ DEBUG ((DEBUG_INFO, " Partitions attribute 0x%x\n", ExtCsd->PartitionsAttribute));
+ DEBUG ((DEBUG_INFO, " Partitioning Setting 0x%x\n", ExtCsd->PartitionSettingCompleted));
+ DEBUG ((
+ DEBUG_INFO,
+ " General Purpose Partition 1 Size 0x%02x%02x%02x\n", \
+ ExtCsd->GpSizeMult[2],
+ ExtCsd->GpSizeMult[1],
+ ExtCsd->GpSizeMult[0]
+ ));
+ DEBUG ((
+ DEBUG_INFO,
+ " General Purpose Partition 2 Size 0x%02x%02x%02x\n", \
+ ExtCsd->GpSizeMult[5],
+ ExtCsd->GpSizeMult[4],
+ ExtCsd->GpSizeMult[3]
+ ));
+ DEBUG ((
+ DEBUG_INFO,
+ " General Purpose Partition 3 Size 0x%02x%02x%02x\n", \
+ ExtCsd->GpSizeMult[8],
+ ExtCsd->GpSizeMult[7],
+ ExtCsd->GpSizeMult[6]
+ ));
+ DEBUG ((
+ DEBUG_INFO,
+ " General Purpose Partition 4 Size 0x%02x%02x%02x\n", \
+ ExtCsd->GpSizeMult[11],
+ ExtCsd->GpSizeMult[10],
+ ExtCsd->GpSizeMult[9]
+ ));
+ DEBUG ((
+ DEBUG_INFO,
+ " Enhanced User Data Area Size 0x%02x%02x%02x\n", \
+ ExtCsd->EnhSizeMult[2],
+ ExtCsd->EnhSizeMult[1],
+ ExtCsd->EnhSizeMult[0]
+ ));
+ DEBUG ((DEBUG_INFO, " Enhanced User Data Start Address 0x%x\n", *((UINT32 *)&ExtCsd->EnhStartAddr[0])));
+ DEBUG ((DEBUG_INFO, " Bad Block Management mode 0x%x\n", ExtCsd->SecBadBlkMgmnt));
+ DEBUG ((DEBUG_INFO, " Native sector size 0x%x\n", ExtCsd->NativeSectorSize));
+ DEBUG ((DEBUG_INFO, " Sector size emulation 0x%x\n", ExtCsd->UseNativeSector));
+ DEBUG ((DEBUG_INFO, " Sector size 0x%x\n", ExtCsd->DataSectorSize));
return EFI_SUCCESS;
}
@@ -219,8 +249,8 @@ DumpExtCsd (
**/
EFI_STATUS
GetEmmcModelName (
- IN OUT EMMC_DEVICE *Device,
- IN EMMC_CID *Cid
+ IN OUT EMMC_DEVICE *Device,
+ IN EMMC_CID *Cid
)
{
CHAR8 String[EMMC_MODEL_NAME_MAX_LEN];
@@ -248,27 +278,28 @@ GetEmmcModelName (
**/
EFI_STATUS
DiscoverAllPartitions (
- IN EMMC_DEVICE *Device
+ IN EMMC_DEVICE *Device
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
- EMMC_CSD *Csd;
- EMMC_CID *Cid;
- EMMC_EXT_CSD *ExtCsd;
- UINT8 Slot;
- UINT64 Capacity;
- UINT32 DevStatus;
- UINT8 Index;
- UINT32 SecCount;
- UINT32 GpSizeMult;
-
- Slot = Device->Slot;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
+ EMMC_CSD *Csd;
+ EMMC_CID *Cid;
+ EMMC_EXT_CSD *ExtCsd;
+ UINT8 Slot;
+ UINT64 Capacity;
+ UINT32 DevStatus;
+ UINT8 Index;
+ UINT32 SecCount;
+ UINT32 GpSizeMult;
+
+ Slot = Device->Slot;
Status = EmmcSendStatus (Device, Slot + 1, &DevStatus);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Deselect the device to force it enter stby mode before getting CSD
// register content.
@@ -287,6 +318,7 @@ DiscoverAllPartitions (
if (EFI_ERROR (Status)) {
return Status;
}
+
DumpCsd (Csd);
if ((Csd->CSizeLow | Csd->CSizeHigh << 2) == 0xFFF) {
@@ -311,6 +343,7 @@ DiscoverAllPartitions (
if (EFI_ERROR (Status)) {
return Status;
}
+
DumpExtCsd (ExtCsd);
if (ExtCsd->ExtCsdRev < 5) {
@@ -326,22 +359,22 @@ DiscoverAllPartitions (
for (Index = 0; Index < EMMC_MAX_PARTITIONS; Index++) {
Partition = &Device->Partition[Index];
CopyMem (Partition, &mEmmcPartitionTemplate, sizeof (EMMC_PARTITION));
- Partition->Device = Device;
+ Partition->Device = Device;
InitializeListHead (&Partition->Queue);
- Partition->BlockIo.Media = &Partition->BlockMedia;
- Partition->BlockIo2.Media = &Partition->BlockMedia;
- Partition->PartitionType = Index;
- Partition->BlockMedia.IoAlign = Device->Private->PassThru->IoAlign;
- Partition->BlockMedia.BlockSize = 0x200;
- Partition->BlockMedia.LastBlock = 0x00;
- Partition->BlockMedia.RemovableMedia = FALSE;
+ Partition->BlockIo.Media = &Partition->BlockMedia;
+ Partition->BlockIo2.Media = &Partition->BlockMedia;
+ Partition->PartitionType = Index;
+ Partition->BlockMedia.IoAlign = Device->Private->PassThru->IoAlign;
+ Partition->BlockMedia.BlockSize = 0x200;
+ Partition->BlockMedia.LastBlock = 0x00;
+ Partition->BlockMedia.RemovableMedia = FALSE;
Partition->BlockMedia.MediaPresent = TRUE;
Partition->BlockMedia.LogicalPartition = FALSE;
switch (Index) {
case EmmcPartitionUserData:
- SecCount = *(UINT32*)&ExtCsd->SecCount;
- Capacity = MultU64x32 ((UINT64) SecCount, 0x200);
+ SecCount = *(UINT32 *)&ExtCsd->SecCount;
+ Capacity = MultU64x32 ((UINT64)SecCount, 0x200);
break;
case EmmcPartitionBoot1:
case EmmcPartitionBoot2:
@@ -352,19 +385,19 @@ DiscoverAllPartitions (
break;
case EmmcPartitionGP1:
GpSizeMult = (UINT32)(ExtCsd->GpSizeMult[0] | (ExtCsd->GpSizeMult[1] << 8) | (ExtCsd->GpSizeMult[2] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP2:
GpSizeMult = (UINT32)(ExtCsd->GpSizeMult[3] | (ExtCsd->GpSizeMult[4] << 8) | (ExtCsd->GpSizeMult[5] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP3:
GpSizeMult = (UINT32)(ExtCsd->GpSizeMult[6] | (ExtCsd->GpSizeMult[7] << 8) | (ExtCsd->GpSizeMult[8] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP4:
GpSizeMult = (UINT32)(ExtCsd->GpSizeMult[9] | (ExtCsd->GpSizeMult[10] << 8) | (ExtCsd->GpSizeMult[11] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
default:
ASSERT (FALSE);
@@ -372,7 +405,7 @@ DiscoverAllPartitions (
}
if (Capacity != 0) {
- Partition->Enable = TRUE;
+ Partition->Enable = TRUE;
Partition->BlockMedia.LastBlock = DivU64x32 (Capacity, Partition->BlockMedia.BlockSize) - 1;
}
@@ -402,17 +435,17 @@ DiscoverAllPartitions (
**/
EFI_STATUS
InstallProtocolOnPartition (
- IN EMMC_DEVICE *Device,
- IN UINT8 Index
+ IN EMMC_DEVICE *Device,
+ IN UINT8 Index
)
{
- EFI_STATUS Status;
- EMMC_PARTITION *Partition;
- CONTROLLER_DEVICE_PATH ControlNode;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
- EFI_HANDLE DeviceHandle;
+ EFI_STATUS Status;
+ EMMC_PARTITION *Partition;
+ CONTROLLER_DEVICE_PATH ControlNode;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
+ EFI_HANDLE DeviceHandle;
//
// Build device path
@@ -424,21 +457,21 @@ InstallProtocolOnPartition (
SetDevicePathNodeLength (&ControlNode.Header, sizeof (CONTROLLER_DEVICE_PATH));
ControlNode.ControllerNumber = Index;
- DevicePath = AppendDevicePathNode (ParentDevicePath, (EFI_DEVICE_PATH_PROTOCOL*)&ControlNode);
+ DevicePath = AppendDevicePathNode (ParentDevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&ControlNode);
if (DevicePath == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Error;
}
- DeviceHandle = NULL;
+ DeviceHandle = NULL;
RemainingDevicePath = DevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
- if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd(RemainingDevicePath)) {
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
+ if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd (RemainingDevicePath)) {
Status = EFI_ALREADY_STARTED;
goto Error;
}
- Partition = &Device->Partition[Index];
+ Partition = &Device->Partition[Index];
Partition->DevicePath = DevicePath;
if (Partition->Enable) {
//
@@ -464,9 +497,10 @@ InstallProtocolOnPartition (
}
if (((Partition->PartitionType == EmmcPartitionUserData) ||
- (Partition->PartitionType == EmmcPartitionBoot1) ||
- (Partition->PartitionType == EmmcPartitionBoot2)) &&
- ((Device->Csd.Ccc & BIT10) != 0)) {
+ (Partition->PartitionType == EmmcPartitionBoot1) ||
+ (Partition->PartitionType == EmmcPartitionBoot2)) &&
+ ((Device->Csd.Ccc & BIT10) != 0))
+ {
Status = gBS->InstallProtocolInterface (
&Partition->Handle,
&gEfiStorageSecurityCommandProtocolGuid,
@@ -495,13 +529,12 @@ InstallProtocolOnPartition (
gBS->OpenProtocol (
Device->Private->Controller,
&gEfiSdMmcPassThruProtocolGuid,
- (VOID **) &(Device->Private->PassThru),
+ (VOID **)&(Device->Private->PassThru),
Device->Private->DriverBindingHandle,
Partition->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
);
}
-
} else {
Status = EFI_INVALID_PARAMETER;
}
@@ -532,27 +565,27 @@ Error:
EFI_STATUS
EFIAPI
DiscoverEmmcDevice (
- IN EMMC_DRIVER_PRIVATE_DATA *Private,
- IN UINT8 Slot,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EMMC_DRIVER_PRIVATE_DATA *Private,
+ IN UINT8 Slot,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EMMC_DEVICE *Device;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *RemainingEmmcDevPath;
- EFI_DEV_PATH *Node;
- EFI_HANDLE DeviceHandle;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT8 Index;
+ EFI_STATUS Status;
+ EMMC_DEVICE *Device;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *RemainingEmmcDevPath;
+ EFI_DEV_PATH *Node;
+ EFI_HANDLE DeviceHandle;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ UINT8 Index;
Device = NULL;
DevicePath = NULL;
NewDevicePath = NULL;
RemainingDevicePath = NULL;
- PassThru = Private->PassThru;
- Device = &Private->Device[Slot];
+ PassThru = Private->PassThru;
+ Device = &Private->Device[Slot];
//
// Build Device Path to check if the EMMC device present at the slot.
@@ -562,7 +595,7 @@ DiscoverEmmcDevice (
Slot,
&DevicePath
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -582,7 +615,7 @@ DiscoverEmmcDevice (
DeviceHandle = NULL;
RemainingEmmcDevPath = NewDevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingEmmcDevPath, &DeviceHandle);
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingEmmcDevPath, &DeviceHandle);
//
// The device path to the EMMC device doesn't exist. It means the corresponding device private data hasn't been initialized.
//
@@ -594,7 +627,7 @@ DiscoverEmmcDevice (
// Expose user area in the Sd memory card to upper layer.
//
Status = DiscoverAllPartitions (Device);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
FreePool (NewDevicePath);
goto Error;
}
@@ -605,7 +638,7 @@ DiscoverEmmcDevice (
EFI_NATIVE_INTERFACE,
Device->DevicePath
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
FreePool (NewDevicePath);
goto Error;
}
@@ -639,10 +672,11 @@ DiscoverEmmcDevice (
//
// Enumerate the specified partition
//
- Node = (EFI_DEV_PATH *) RemainingDevicePath;
+ Node = (EFI_DEV_PATH *)RemainingDevicePath;
if ((DevicePathType (&Node->DevPath) != HARDWARE_DEVICE_PATH) ||
(DevicePathSubType (&Node->DevPath) != HW_CONTROLLER_DP) ||
- (DevicePathNodeLength (&Node->DevPath) != sizeof (CONTROLLER_DEVICE_PATH))) {
+ (DevicePathNodeLength (&Node->DevPath) != sizeof (CONTROLLER_DEVICE_PATH)))
+ {
Status = EFI_INVALID_PARAMETER;
goto Error;
}
@@ -707,15 +741,15 @@ Error:
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT8 Slot;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ UINT8 Slot;
//
// Test EFI_SD_MMC_PASS_THRU_PROTOCOL on the controller handle.
@@ -723,7 +757,7 @@ EmmcDxeDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiSdMmcPassThruProtocolGuid,
- (VOID**) &PassThru,
+ (VOID **)&PassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -772,7 +806,7 @@ EmmcDxeDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -818,27 +852,27 @@ EmmcDxeDriverBindingSupported (
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EMMC_DRIVER_PRIVATE_DATA *Private;
- UINT8 Slot;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EMMC_DRIVER_PRIVATE_DATA *Private;
+ UINT8 Slot;
Private = NULL;
PassThru = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- (VOID **) &PassThru,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ (VOID **)&PassThru,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if ((EFI_ERROR (Status)) && (Status != EFI_ALREADY_STARTED)) {
return Status;
}
@@ -856,7 +890,7 @@ EmmcDxeDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -880,7 +914,7 @@ EmmcDxeDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &Private,
+ (VOID **)&Private,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -933,6 +967,7 @@ Error:
FreePool (Private);
}
}
+
return Status;
}
@@ -965,10 +1000,10 @@ Error:
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -991,7 +1026,7 @@ EmmcDxeDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &Private,
+ (VOID **)&Private,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1005,7 +1040,7 @@ EmmcDxeDriverBindingStop (
Status = gBS->OpenProtocol (
Device->Handle,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1013,6 +1048,7 @@ EmmcDxeDriverBindingStop (
if (EFI_ERROR (Status)) {
continue;
}
+
ASSERT (DevicePath == Device->DevicePath);
gBS->UninstallProtocolInterface (
Device->Handle,
@@ -1023,16 +1059,16 @@ EmmcDxeDriverBindingStop (
}
gBS->UninstallProtocolInterface (
- Controller,
- &gEfiCallerIdGuid,
- Private
- );
+ Controller,
+ &gEfiCallerIdGuid,
+ Private
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
FreePool (Private);
return EFI_SUCCESS;
@@ -1044,7 +1080,7 @@ EmmcDxeDriverBindingStop (
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1053,7 +1089,7 @@ EmmcDxeDriverBindingStop (
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiBlockIo2ProtocolGuid,
- (VOID **) &BlockIo2,
+ (VOID **)&BlockIo2,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1073,7 +1109,8 @@ EmmcDxeDriverBindingStop (
for (Link = GetFirstNode (&Partition->Queue);
!IsNull (&Partition->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Partition->Queue, Link);
RemoveEntryList (Link);
@@ -1132,7 +1169,7 @@ EmmcDxeDriverBindingStop (
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiStorageSecurityCommandProtocolGuid,
- (VOID **) &StorageSecurity,
+ (VOID **)&StorageSecurity,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1146,13 +1183,13 @@ EmmcDxeDriverBindingStop (
);
if (EFI_ERROR (Status)) {
gBS->OpenProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- (VOID **) &Partition->Device->Private->PassThru,
- This->DriverBindingHandle,
- ChildHandleBuffer[Index],
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ (VOID **)&Partition->Device->Private->PassThru,
+ This->DriverBindingHandle,
+ ChildHandleBuffer[Index],
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
AllChildrenStopped = FALSE;
continue;
}
@@ -1181,11 +1218,11 @@ EmmcDxeDriverBindingStop (
EFI_STATUS
EFIAPI
InitializeEmmcDxe (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.h b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.h
index 5ecce41dee..a83d4ec1df 100644
--- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.h
+++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.h
@@ -40,11 +40,11 @@
//
// Global Variables
//
-extern EFI_DRIVER_BINDING_PROTOCOL gEmmcDxeDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gEmmcDxeComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gEmmcDxeComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gEmmcDxeDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gEmmcDxeComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gEmmcDxeComponentName2;
-#define EMMC_PARTITION_SIGNATURE SIGNATURE_32 ('E', 'm', 'm', 'P')
+#define EMMC_PARTITION_SIGNATURE SIGNATURE_32 ('E', 'm', 'm', 'P')
#define EMMC_PARTITION_DATA_FROM_BLKIO(a) \
CR(a, EMMC_PARTITION, BlockIo, EMMC_PARTITION_SIGNATURE)
@@ -64,72 +64,72 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gEmmcDxeComponentName2;
//
// Take 2.5 seconds as generic time out value, 1 microsecond as unit.
//
-#define EMMC_GENERIC_TIMEOUT 2500 * 1000
+#define EMMC_GENERIC_TIMEOUT 2500 * 1000
-#define EMMC_REQUEST_SIGNATURE SIGNATURE_32 ('E', 'm', 'R', 'e')
+#define EMMC_REQUEST_SIGNATURE SIGNATURE_32 ('E', 'm', 'R', 'e')
-typedef struct _EMMC_DEVICE EMMC_DEVICE;
-typedef struct _EMMC_DRIVER_PRIVATE_DATA EMMC_DRIVER_PRIVATE_DATA;
+typedef struct _EMMC_DEVICE EMMC_DEVICE;
+typedef struct _EMMC_DRIVER_PRIVATE_DATA EMMC_DRIVER_PRIVATE_DATA;
//
// Asynchronous I/O request.
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ LIST_ENTRY Link;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- BOOLEAN IsEnd;
+ BOOLEAN IsEnd;
- EFI_BLOCK_IO2_TOKEN *Token;
- EFI_EVENT Event;
+ EFI_BLOCK_IO2_TOKEN *Token;
+ EFI_EVENT Event;
} EMMC_REQUEST;
#define EMMC_REQUEST_FROM_LINK(a) \
CR(a, EMMC_REQUEST, Link, EMMC_REQUEST_SIGNATURE)
typedef struct {
- UINT32 Signature;
- BOOLEAN Enable;
- EMMC_PARTITION_TYPE PartitionType;
- EFI_HANDLE Handle;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_BLOCK_IO_PROTOCOL BlockIo;
- EFI_BLOCK_IO2_PROTOCOL BlockIo2;
- EFI_BLOCK_IO_MEDIA BlockMedia;
- EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
- EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
- EFI_DISK_INFO_PROTOCOL DiskInfo;
-
- LIST_ENTRY Queue;
-
- EMMC_DEVICE *Device;
+ UINT32 Signature;
+ BOOLEAN Enable;
+ EMMC_PARTITION_TYPE PartitionType;
+ EFI_HANDLE Handle;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_BLOCK_IO_PROTOCOL BlockIo;
+ EFI_BLOCK_IO2_PROTOCOL BlockIo2;
+ EFI_BLOCK_IO_MEDIA BlockMedia;
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;
+ EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
+ EFI_DISK_INFO_PROTOCOL DiskInfo;
+
+ LIST_ENTRY Queue;
+
+ EMMC_DEVICE *Device;
} EMMC_PARTITION;
//
// Up to 6 slots per EMMC PCI host controller
//
-#define EMMC_MAX_DEVICES 6
+#define EMMC_MAX_DEVICES 6
//
// Up to 8 partitions per EMMC device.
//
-#define EMMC_MAX_PARTITIONS 8
-#define EMMC_MODEL_NAME_MAX_LEN 32
+#define EMMC_MAX_PARTITIONS 8
+#define EMMC_MODEL_NAME_MAX_LEN 32
struct _EMMC_DEVICE {
- EFI_HANDLE Handle;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINT8 Slot;
- BOOLEAN SectorAddressing;
-
- EMMC_PARTITION Partition[EMMC_MAX_PARTITIONS];
- EMMC_CSD Csd;
- EMMC_CID Cid;
- EMMC_EXT_CSD ExtCsd;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ EFI_HANDLE Handle;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT8 Slot;
+ BOOLEAN SectorAddressing;
+
+ EMMC_PARTITION Partition[EMMC_MAX_PARTITIONS];
+ EMMC_CSD Csd;
+ EMMC_CID Cid;
+ EMMC_EXT_CSD ExtCsd;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// The model name consists of three fields in CID register
// 1) OEM/Application ID (2 bytes)
@@ -137,21 +137,21 @@ struct _EMMC_DEVICE {
// 3) Product Serial Number (4 bytes)
// The delimiters of these fields are whitespace.
//
- CHAR16 ModelName[EMMC_MODEL_NAME_MAX_LEN];
- EMMC_DRIVER_PRIVATE_DATA *Private;
-} ;
+ CHAR16 ModelName[EMMC_MODEL_NAME_MAX_LEN];
+ EMMC_DRIVER_PRIVATE_DATA *Private;
+};
//
// EMMC DXE driver private data structure
//
struct _EMMC_DRIVER_PRIVATE_DATA {
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_HANDLE Controller;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_HANDLE DriverBindingHandle;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_HANDLE Controller;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_HANDLE DriverBindingHandle;
- EMMC_DEVICE Device[EMMC_MAX_DEVICES];
-} ;
+ EMMC_DEVICE Device[EMMC_MAX_DEVICES];
+};
/**
Tests to see if this driver supports a given controller. If a child device is provided,
@@ -198,9 +198,9 @@ struct _EMMC_DRIVER_PRIVATE_DATA {
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -241,9 +241,9 @@ EmmcDxeDriverBindingSupported (
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -275,10 +275,10 @@ EmmcDxeDriverBindingStart (
EFI_STATUS
EFIAPI
EmmcDxeDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -399,11 +399,11 @@ EmmcDxeComponentNameGetDriverName (
EFI_STATUS
EFIAPI
EmmcDxeComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -419,8 +419,8 @@ EmmcDxeComponentNameGetControllerName (
**/
EFI_STATUS
EmmcSelect (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca
);
/**
@@ -437,9 +437,9 @@ EmmcSelect (
**/
EFI_STATUS
EmmcSendStatus (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT UINT32 *DevStatus
);
/**
@@ -456,9 +456,9 @@ EmmcSendStatus (
**/
EFI_STATUS
EmmcGetCsd (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT EMMC_CSD *Csd
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT EMMC_CSD *Csd
);
/**
@@ -475,9 +475,9 @@ EmmcGetCsd (
**/
EFI_STATUS
EmmcGetCid (
- IN EMMC_DEVICE *Device,
- IN UINT16 Rca,
- OUT EMMC_CID *Cid
+ IN EMMC_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT EMMC_CID *Cid
);
/**
@@ -493,9 +493,8 @@ EmmcGetCid (
**/
EFI_STATUS
EmmcGetExtCsd (
- IN EMMC_DEVICE *Device,
- OUT EMMC_EXT_CSD *ExtCsd
+ IN EMMC_DEVICE *Device,
+ OUT EMMC_EXT_CSD *ExtCsd
);
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/DmaMem.c b/MdeModulePkg/Bus/Sd/SdBlockIoPei/DmaMem.c
index 63ad6ce46a..3954e2a5d1 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/DmaMem.c
@@ -32,11 +32,11 @@ EDKII_IOMMU_PPI *mIoMmu;
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -81,9 +83,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,7 +101,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -109,6 +112,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -142,7 +146,7 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
if (mIoMmu != NULL) {
@@ -157,18 +161,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -186,10 +191,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -207,9 +214,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -221,6 +228,7 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -239,4 +247,3 @@ IoMmuInit (
(VOID **)&mIoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.c b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.c
index ddcd68bef7..06058e9ea0 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.c
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.c
@@ -10,7 +10,7 @@
//
// Template for SD HC Slot Data.
//
-SD_PEIM_HC_SLOT gSdHcSlotTemplate = {
+SD_PEIM_HC_SLOT gSdHcSlotTemplate = {
SD_PEIM_SLOT_SIG, // Signature
{ // Media
MSG_SD_DP,
@@ -34,7 +34,7 @@ SD_PEIM_HC_SLOT gSdHcSlotTemplate = {
//
// Template for SD HC Private Data.
//
-SD_PEIM_HC_PRIVATE_DATA gSdHcPrivateTemplate = {
+SD_PEIM_HC_PRIVATE_DATA gSdHcPrivateTemplate = {
SD_PEIM_SIG, // Signature
NULL, // Pool
{ // BlkIoPpi
@@ -86,6 +86,7 @@ SD_PEIM_HC_PRIVATE_DATA gSdHcPrivateTemplate = {
0, // SlotNum
0 // TotalBlkIoDevices
};
+
/**
Gets the count of block I/O devices that one specific block driver detects.
@@ -113,9 +114,9 @@ SdBlockIoPeimGetDeviceNo (
OUT UINTN *NumberBlockDevices
)
{
- SD_PEIM_HC_PRIVATE_DATA *Private;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
+ Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
}
@@ -170,9 +171,9 @@ SdBlockIoPeimGetMediaInfo (
OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- SD_PEIM_HC_PRIVATE_DATA *Private;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
+ Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
if ((DeviceIndex == 0) || (DeviceIndex > Private->TotalBlkIoDevices) || (DeviceIndex > SD_PEIM_MAX_SLOTS)) {
return EFI_INVALID_PARAMETER;
@@ -231,12 +232,12 @@ SdBlockIoPeimReadBlocks (
OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- UINTN NumberOfBlocks;
- SD_PEIM_HC_PRIVATE_DATA *Private;
- UINTN Remaining;
- UINT32 MaxBlock;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ UINTN NumberOfBlocks;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
+ UINTN Remaining;
+ UINT32 MaxBlock;
Status = EFI_SUCCESS;
Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
@@ -286,14 +287,16 @@ SdBlockIoPeimReadBlocks (
} else {
Status = SdPeimRwSingleBlock (&Private->Slot[DeviceIndex - 1], StartLBA, BlockSize, Buffer, BufferSize, TRUE);
}
+
if (EFI_ERROR (Status)) {
return Status;
}
StartLBA += NumberOfBlocks;
- Buffer = (UINT8*)Buffer + BufferSize;
+ Buffer = (UINT8 *)Buffer + BufferSize;
Remaining -= NumberOfBlocks;
}
+
return Status;
}
@@ -319,14 +322,14 @@ SdBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
SdBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
- SD_PEIM_HC_PRIVATE_DATA *Private;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+ Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
@@ -376,24 +379,24 @@ SdBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
SdBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- SD_PEIM_HC_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
+ EFI_STATUS Status;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
- Status = SdBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ Status = SdBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -439,28 +442,28 @@ SdBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
SdBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- SD_PEIM_HC_PRIVATE_DATA *Private;
-
- Status = EFI_SUCCESS;
- Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
-
- Status = SdBlockIoPeimReadBlocks (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- StartLBA,
- BufferSize,
- Buffer
- );
+ EFI_STATUS Status;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
+
+ Status = EFI_SUCCESS;
+ Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+
+ Status = SdBlockIoPeimReadBlocks (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ StartLBA,
+ BufferSize,
+ Buffer
+ );
return Status;
}
@@ -483,7 +486,7 @@ SdBlockIoPeimEndOfPei (
IN VOID *Ppi
)
{
- SD_PEIM_HC_PRIVATE_DATA *Private;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
Private = GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -507,26 +510,26 @@ SdBlockIoPeimEndOfPei (
EFI_STATUS
EFIAPI
InitializeSdBlockIoPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- SD_PEIM_HC_PRIVATE_DATA *Private;
- EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
- UINT32 Index;
- UINTN *MmioBase;
- UINT8 BarNum;
- UINT8 SlotNum;
- UINT8 Controller;
- UINT64 Capacity;
- SD_HC_SLOT_CAP Capability;
- SD_PEIM_HC_SLOT *Slot;
- SD_CSD *Csd;
- SD_CSD2 *Csd2;
- UINT32 CSize;
- UINT32 CSizeMul;
- UINT32 ReadBlLen;
+ EFI_STATUS Status;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
+ EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
+ UINT32 Index;
+ UINTN *MmioBase;
+ UINT8 BarNum;
+ UINT8 SlotNum;
+ UINT8 Controller;
+ UINT64 Capacity;
+ SD_HC_SLOT_CAP Capability;
+ SD_PEIM_HC_SLOT *Slot;
+ SD_CSD *Csd;
+ SD_CSD2 *Csd2;
+ UINT32 CSize;
+ UINT32 CSizeMul;
+ UINT32 ReadBlLen;
//
// Shadow this PEIM to run from memory
@@ -542,7 +545,7 @@ InitializeSdBlockIoPeim (
&gEdkiiPeiSdMmcHostControllerPpiGuid,
0,
NULL,
- (VOID **) &SdMmcHcPpi
+ (VOID **)&SdMmcHcPpi
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -571,8 +574,9 @@ InitializeSdBlockIoPeim (
Status = EFI_OUT_OF_RESOURCES;
break;
}
- Private->BlkIoPpiList.Ppi = (VOID*)&Private->BlkIoPpi;
- Private->BlkIo2PpiList.Ppi = (VOID*)&Private->BlkIo2Ppi;
+
+ Private->BlkIoPpiList.Ppi = (VOID *)&Private->BlkIoPpi;
+ Private->BlkIo2PpiList.Ppi = (VOID *)&Private->BlkIo2Ppi;
//
// Initialize the memory pool which will be used in all transactions.
//
@@ -587,6 +591,7 @@ InitializeSdBlockIoPeim (
if (EFI_ERROR (Status)) {
continue;
}
+
if (Capability.SlotType != 0x1) {
DEBUG ((DEBUG_INFO, "The slot at 0x%x is not embedded slot type\n", MmioBase[Index]));
Status = EFI_UNSUPPORTED;
@@ -597,10 +602,12 @@ InitializeSdBlockIoPeim (
if (EFI_ERROR (Status)) {
continue;
}
+
Status = SdPeimHcCardDetect (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
}
+
Status = SdPeimHcInitHost (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
@@ -621,15 +628,15 @@ InitializeSdBlockIoPeim (
Csd = &Slot->Csd;
if (Csd->CsdStructure == 0) {
Slot->SectorAddressing = FALSE;
- CSize = (Csd->CSizeHigh << 2 | Csd->CSizeLow) + 1;
- CSizeMul = (1 << (Csd->CSizeMul + 2));
- ReadBlLen = (1 << (Csd->ReadBlLen));
- Capacity = MultU64x32 (MultU64x32 ((UINT64)CSize, CSizeMul), ReadBlLen);
+ CSize = (Csd->CSizeHigh << 2 | Csd->CSizeLow) + 1;
+ CSizeMul = (1 << (Csd->CSizeMul + 2));
+ ReadBlLen = (1 << (Csd->ReadBlLen));
+ Capacity = MultU64x32 (MultU64x32 ((UINT64)CSize, CSizeMul), ReadBlLen);
} else {
Slot->SectorAddressing = TRUE;
- Csd2 = (SD_CSD2*)(VOID*)Csd;
- CSize = (Csd2->CSizeHigh << 16 | Csd2->CSizeLow) + 1;
- Capacity = MultU64x32 ((UINT64)CSize, SIZE_512KB);
+ Csd2 = (SD_CSD2 *)(VOID *)Csd;
+ CSize = (Csd2->CSizeHigh << 16 | Csd2->CSizeLow) + 1;
+ Capacity = MultU64x32 ((UINT64)CSize, SIZE_512KB);
}
Slot->Media.LastBlock = DivU64x32 (Capacity, Slot->Media.BlockSize) - 1;
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.h b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.h
index 7fd6dba92e..2261d8c798 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.h
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.h
@@ -26,27 +26,27 @@
#include <IndustryStandard/Sd.h>
-typedef struct _SD_PEIM_HC_PRIVATE_DATA SD_PEIM_HC_PRIVATE_DATA;
-typedef struct _SD_PEIM_HC_SLOT SD_PEIM_HC_SLOT;
-typedef struct _SD_TRB SD_TRB;
+typedef struct _SD_PEIM_HC_PRIVATE_DATA SD_PEIM_HC_PRIVATE_DATA;
+typedef struct _SD_PEIM_HC_SLOT SD_PEIM_HC_SLOT;
+typedef struct _SD_TRB SD_TRB;
#include "SdHci.h"
#include "SdHcMem.h"
-#define SD_PEIM_SIG SIGNATURE_32 ('S', 'D', 'C', 'P')
-#define SD_PEIM_SLOT_SIG SIGNATURE_32 ('S', 'D', 'C', 'S')
+#define SD_PEIM_SIG SIGNATURE_32 ('S', 'D', 'C', 'P')
+#define SD_PEIM_SLOT_SIG SIGNATURE_32 ('S', 'D', 'C', 'S')
-#define SD_PEIM_MAX_SLOTS 6
+#define SD_PEIM_MAX_SLOTS 6
struct _SD_PEIM_HC_SLOT {
- UINT32 Signature;
- EFI_PEI_BLOCK_IO2_MEDIA Media;
-
- UINTN SdHcBase;
- SD_HC_SLOT_CAP Capability;
- SD_CSD Csd;
- BOOLEAN SectorAddressing;
- SD_PEIM_HC_PRIVATE_DATA *Private;
+ UINT32 Signature;
+ EFI_PEI_BLOCK_IO2_MEDIA Media;
+
+ UINTN SdHcBase;
+ SD_HC_SLOT_CAP Capability;
+ SD_CSD Csd;
+ BOOLEAN SectorAddressing;
+ SD_PEIM_HC_PRIVATE_DATA *Private;
};
struct _SD_PEIM_HC_PRIVATE_DATA {
@@ -67,27 +67,27 @@ struct _SD_PEIM_HC_PRIVATE_DATA {
UINT8 TotalBlkIoDevices;
};
-#define SD_TIMEOUT MultU64x32((UINT64)(3), 1000000)
-#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, BlkIoPpi, SD_PEIM_SIG)
-#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, SD_PEIM_SIG)
-#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, SD_PEIM_SIG)
+#define SD_TIMEOUT MultU64x32((UINT64)(3), 1000000)
+#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, BlkIoPpi, SD_PEIM_SIG)
+#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, SD_PEIM_SIG)
+#define GET_SD_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, SD_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, SD_PEIM_SIG)
struct _SD_TRB {
- SD_PEIM_HC_SLOT *Slot;
- UINT16 BlockSize;
+ SD_PEIM_HC_SLOT *Slot;
+ UINT16 BlockSize;
- SD_COMMAND_PACKET *Packet;
- VOID *Data;
- UINT32 DataLen;
- BOOLEAN Read;
- EFI_PHYSICAL_ADDRESS DataPhy;
- VOID *DataMap;
- SD_HC_TRANSFER_MODE Mode;
+ SD_COMMAND_PACKET *Packet;
+ VOID *Data;
+ UINT32 DataLen;
+ BOOLEAN Read;
+ EFI_PHYSICAL_ADDRESS DataPhy;
+ VOID *DataMap;
+ SD_HC_TRANSFER_MODE Mode;
- UINT64 Timeout;
+ UINT64 Timeout;
- SD_HC_ADMA_DESC_LINE *AdmaDesc;
- UINTN AdmaDescSize;
+ SD_HC_ADMA_DESC_LINE *AdmaDesc;
+ UINTN AdmaDescSize;
};
/**
@@ -234,9 +234,9 @@ SdBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
SdBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -283,10 +283,10 @@ SdBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
SdBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -326,12 +326,12 @@ SdBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
SdBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -345,7 +345,7 @@ SdBlockIoPeimReadBlocks2 (
**/
EFI_STATUS
SdPeimInitMemPool (
- IN SD_PEIM_HC_PRIVATE_DATA *Private
+ IN SD_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -359,7 +359,7 @@ SdPeimInitMemPool (
**/
EFI_STATUS
SdPeimFreeMemPool (
- IN SD_PEIM_MEM_POOL *Pool
+ IN SD_PEIM_MEM_POOL *Pool
);
/**
@@ -374,8 +374,8 @@ SdPeimFreeMemPool (
**/
VOID *
SdPeimAllocateMem (
- IN SD_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN SD_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
);
/**
@@ -388,9 +388,9 @@ SdPeimAllocateMem (
**/
VOID
SdPeimFreeMem (
- IN SD_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN SD_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -422,11 +422,11 @@ IoMmuInit (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -440,7 +440,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -483,9 +483,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.c b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.c
index fb043c19ff..27aec1fbf3 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.c
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.c
@@ -18,25 +18,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
SD_PEIM_MEM_BLOCK *
SdPeimAllocMemBlock (
- IN UINTN Pages
+ IN UINTN Pages
)
{
- SD_PEIM_MEM_BLOCK *Block;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- EFI_STATUS Status;
- VOID *TempPtr;
+ SD_PEIM_MEM_BLOCK *Block;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Block = NULL;
- Status = PeiServicesAllocatePool (sizeof(SD_PEIM_MEM_BLOCK), &TempPtr);
+ Status = PeiServicesAllocatePool (sizeof (SD_PEIM_MEM_BLOCK), &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof(SD_PEIM_MEM_BLOCK));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (SD_PEIM_MEM_BLOCK));
//
// each bit in the bit array represents SD_PEIM_MEM_UNIT
@@ -44,18 +44,18 @@ SdPeimAllocMemBlock (
//
ASSERT (SD_PEIM_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (SD_PEIM_MEM_BLOCK*)(UINTN)TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (SD_PEIM_MEM_UNIT * 8);
+ Block = (SD_PEIM_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (SD_PEIM_MEM_UNIT * 8);
Status = PeiServicesAllocatePool (Block->BitsLen, &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, Block->BitsLen);
+ ZeroMem ((VOID *)(UINTN)TempPtr, Block->BitsLen);
- Block->Bits = (UINT8*)(UINTN)TempPtr;
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Pages,
@@ -67,10 +67,10 @@ SdPeimAllocMemBlock (
return NULL;
}
- ZeroMem ((VOID*)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
+ ZeroMem ((VOID *)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
- Block->BufHost = (UINT8 *) (UINTN) BufHost;
- Block->Buf = (UINT8 *) (UINTN) MappedAddr;
+ Block->BufHost = (UINT8 *)(UINTN)BufHost;
+ Block->Buf = (UINT8 *)(UINTN)MappedAddr;
Block->Mapping = Mapping;
Block->Next = NULL;
@@ -86,8 +86,8 @@ SdPeimAllocMemBlock (
**/
VOID
SdPeimFreeMemBlock (
- IN SD_PEIM_MEM_POOL *Pool,
- IN SD_PEIM_MEM_BLOCK *Block
+ IN SD_PEIM_MEM_POOL *Pool,
+ IN SD_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -107,22 +107,22 @@ SdPeimFreeMemBlock (
**/
VOID *
SdPeimAllocMemFromBlock (
- IN SD_PEIM_MEM_BLOCK *Block,
- IN UINTN Units
+ IN SD_PEIM_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -138,13 +138,12 @@ SdPeimAllocMemFromBlock (
}
SD_PEIM_NEXT_BIT (Byte, Bit);
-
} else {
SD_PEIM_NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -155,13 +154,13 @@ SdPeimAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!SD_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) SD_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)SD_PEIM_MEM_BIT (Bit));
SD_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -177,8 +176,8 @@ SdPeimAllocMemFromBlock (
**/
VOID
SdPeimInsertMemBlockToPool (
- IN SD_PEIM_MEM_BLOCK *Head,
- IN SD_PEIM_MEM_BLOCK *Block
+ IN SD_PEIM_MEM_BLOCK *Head,
+ IN SD_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -197,11 +196,10 @@ SdPeimInsertMemBlockToPool (
**/
BOOLEAN
SdPeimIsMemBlockEmpty (
- IN SD_PEIM_MEM_BLOCK *Block
+ IN SD_PEIM_MEM_BLOCK *Block
)
{
- UINTN Index;
-
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -212,8 +210,6 @@ SdPeimIsMemBlockEmpty (
return TRUE;
}
-
-
/**
Initialize the memory management pool for the host controller.
@@ -228,9 +224,9 @@ SdPeimInitMemPool (
IN SD_PEIM_HC_PRIVATE_DATA *Private
)
{
- SD_PEIM_MEM_POOL *Pool;
- EFI_STATUS Status;
- VOID *TempPtr;
+ SD_PEIM_MEM_POOL *Pool;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Pool = NULL;
@@ -240,7 +236,7 @@ SdPeimInitMemPool (
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof (SD_PEIM_MEM_POOL));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (SD_PEIM_MEM_POOL));
Pool = (SD_PEIM_MEM_POOL *)((UINTN)TempPtr);
@@ -265,10 +261,10 @@ SdPeimInitMemPool (
**/
EFI_STATUS
SdPeimFreeMemPool (
- IN SD_PEIM_MEM_POOL *Pool
+ IN SD_PEIM_MEM_POOL *Pool
)
{
- SD_PEIM_MEM_BLOCK *Block;
+ SD_PEIM_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -296,16 +292,16 @@ SdPeimFreeMemPool (
**/
VOID *
SdPeimAllocateMem (
- IN SD_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN SD_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- SD_PEIM_MEM_BLOCK *Head;
- SD_PEIM_MEM_BLOCK *Block;
- SD_PEIM_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ SD_PEIM_MEM_BLOCK *Head;
+ SD_PEIM_MEM_BLOCK *Block;
+ SD_PEIM_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = SD_PEIM_MEM_ROUND (Size);
@@ -368,22 +364,22 @@ SdPeimAllocateMem (
**/
VOID
SdPeimFreeMem (
- IN SD_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN SD_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- SD_PEIM_MEM_BLOCK *Head;
- SD_PEIM_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ SD_PEIM_MEM_BLOCK *Head;
+ SD_PEIM_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = SD_PEIM_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -394,8 +390,8 @@ SdPeimFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / SD_PEIM_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / SD_PEIM_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / SD_PEIM_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / SD_PEIM_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -403,7 +399,7 @@ SdPeimFreeMem (
for (Count = 0; Count < (AllocSize / SD_PEIM_MEM_UNIT); Count++) {
ASSERT (SD_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ SD_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ SD_PEIM_MEM_BIT (Bit));
SD_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -425,5 +421,5 @@ SdPeimFreeMem (
SdPeimFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.h b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.h
index c6bda2d1e0..70620a5f81 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.h
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHcMem.h
@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SD_PEIM_MEM_H_
#define _SD_PEIM_MEM_H_
-#define SD_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
+#define SD_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
#define SD_PEIM_MEM_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & SD_PEIM_MEM_BIT(Bit)) == SD_PEIM_MEM_BIT(Bit)))
@@ -17,28 +17,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _SD_PEIM_MEM_BLOCK SD_PEIM_MEM_BLOCK;
struct _SD_PEIM_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- SD_PEIM_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ SD_PEIM_MEM_BLOCK *Next;
};
typedef struct _SD_PEIM_MEM_POOL {
- SD_PEIM_MEM_BLOCK *Head;
+ SD_PEIM_MEM_BLOCK *Head;
} SD_PEIM_MEM_POOL;
//
// Memory allocation unit, note that the value must meet SD spec alignment requirement.
//
-#define SD_PEIM_MEM_UNIT 128
+#define SD_PEIM_MEM_UNIT 128
#define SD_PEIM_MEM_UNIT_MASK (SD_PEIM_MEM_UNIT - 1)
#define SD_PEIM_MEM_DEFAULT_PAGES 16
-#define SD_PEIM_MEM_ROUND(Len) (((Len) + SD_PEIM_MEM_UNIT_MASK) & (~SD_PEIM_MEM_UNIT_MASK))
+#define SD_PEIM_MEM_ROUND(Len) (((Len) + SD_PEIM_MEM_UNIT_MASK) & (~SD_PEIM_MEM_UNIT_MASK))
//
// Advance the byte and bit to the next bit, adjust byte accordingly.
@@ -53,4 +53,3 @@ typedef struct _SD_PEIM_MEM_POOL {
} while (0)
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
index 7c8b548b9e..774cae35f2 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
@@ -28,13 +28,13 @@
EFI_STATUS
EFIAPI
SdPeimHcRwMmio (
- IN UINTN Address,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
+ IN UINTN Address,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
)
{
- if ((Address == 0) || (Data == NULL)) {
+ if ((Address == 0) || (Data == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -45,31 +45,35 @@ SdPeimHcRwMmio (
switch (Count) {
case 1:
if (Read) {
- *(UINT8*)Data = MmioRead8 (Address);
+ *(UINT8 *)Data = MmioRead8 (Address);
} else {
- MmioWrite8 (Address, *(UINT8*)Data);
+ MmioWrite8 (Address, *(UINT8 *)Data);
}
+
break;
case 2:
if (Read) {
- *(UINT16*)Data = MmioRead16 (Address);
+ *(UINT16 *)Data = MmioRead16 (Address);
} else {
- MmioWrite16 (Address, *(UINT16*)Data);
+ MmioWrite16 (Address, *(UINT16 *)Data);
}
+
break;
case 4:
if (Read) {
- *(UINT32*)Data = MmioRead32 (Address);
+ *(UINT32 *)Data = MmioRead32 (Address);
} else {
- MmioWrite32 (Address, *(UINT32*)Data);
+ MmioWrite32 (Address, *(UINT32 *)Data);
}
+
break;
case 8:
if (Read) {
- *(UINT64*)Data = MmioRead64 (Address);
+ *(UINT64 *)Data = MmioRead64 (Address);
} else {
- MmioWrite64 (Address, *(UINT64*)Data);
+ MmioWrite64 (Address, *(UINT64 *)Data);
}
+
break;
default:
ASSERT (FALSE);
@@ -98,14 +102,14 @@ SdPeimHcRwMmio (
EFI_STATUS
EFIAPI
SdPeimHcOrMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *OrData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *OrData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 Or;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 Or;
Status = SdPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -113,13 +117,13 @@ SdPeimHcOrMmio (
}
if (Count == 1) {
- Or = *(UINT8*) OrData;
+ Or = *(UINT8 *)OrData;
} else if (Count == 2) {
- Or = *(UINT16*) OrData;
+ Or = *(UINT16 *)OrData;
} else if (Count == 4) {
- Or = *(UINT32*) OrData;
+ Or = *(UINT32 *)OrData;
} else if (Count == 8) {
- Or = *(UINT64*) OrData;
+ Or = *(UINT64 *)OrData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -149,14 +153,14 @@ SdPeimHcOrMmio (
EFI_STATUS
EFIAPI
SdPeimHcAndMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *AndData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *AndData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 And;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 And;
Status = SdPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -164,13 +168,13 @@ SdPeimHcAndMmio (
}
if (Count == 1) {
- And = *(UINT8*) AndData;
+ And = *(UINT8 *)AndData;
} else if (Count == 2) {
- And = *(UINT16*) AndData;
+ And = *(UINT16 *)AndData;
} else if (Count == 4) {
- And = *(UINT32*) AndData;
+ And = *(UINT32 *)AndData;
} else if (Count == 8) {
- And = *(UINT64*) AndData;
+ And = *(UINT64 *)AndData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -198,14 +202,14 @@ SdPeimHcAndMmio (
EFI_STATUS
EFIAPI
SdPeimHcCheckMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue
)
{
- EFI_STATUS Status;
- UINT64 Value;
+ EFI_STATUS Status;
+ UINT64 Value;
//
// Access PCI MMIO space to see if the value is the tested one.
@@ -245,15 +249,15 @@ SdPeimHcCheckMmioSet (
EFI_STATUS
EFIAPI
SdPeimHcWaitMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -294,11 +298,11 @@ SdPeimHcWaitMmioSet (
**/
EFI_STATUS
SdPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 SwReset;
+ EFI_STATUS Status;
+ UINT8 SwReset;
SwReset = 0xFF;
Status = SdPeimHcRwMmio (Bar + SD_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
@@ -319,6 +323,7 @@ SdPeimHcReset (
DEBUG ((DEBUG_INFO, "SdPeimHcReset: reset done with %r\n", Status));
return Status;
}
+
//
// Enable all interrupt after reset all.
//
@@ -339,25 +344,26 @@ SdPeimHcReset (
**/
EFI_STATUS
SdPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 IntStatus;
+ EFI_STATUS Status;
+ UINT16 IntStatus;
//
// Enable all bits in Error Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = SdPeimHcRwMmio (Bar + SD_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = SdPeimHcRwMmio (Bar + SD_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Enable all bits in Normal Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = SdPeimHcRwMmio (Bar + SD_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = SdPeimHcRwMmio (Bar + SD_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
return Status;
}
@@ -374,12 +380,12 @@ SdPeimHcEnableInterrupt (
**/
EFI_STATUS
SdPeimHcGetCapability (
- IN UINTN Bar,
- OUT SD_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT SD_HC_SLOT_CAP *Capability
)
{
- EFI_STATUS Status;
- UINT64 Cap;
+ EFI_STATUS Status;
+ UINT64 Cap;
Status = SdPeimHcRwMmio (Bar + SD_HC_CAP, TRUE, sizeof (Cap), &Cap);
if (EFI_ERROR (Status)) {
@@ -406,12 +412,12 @@ SdPeimHcGetCapability (
**/
EFI_STATUS
SdPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 Data;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ UINT16 Data;
+ UINT32 PresentState;
//
// Check Normal Interrupt Status Register
@@ -460,12 +466,12 @@ SdPeimHcCardDetect (
**/
EFI_STATUS
SdPeimHcStopClock (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT32 PresentState;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT32 PresentState;
+ UINT16 ClockCtrl;
//
// Ensure no SD transactions are occurring on the SD Bus by
@@ -486,8 +492,8 @@ SdPeimHcStopClock (
//
// Set SD Clock Enable in the Clock Control register to 0
//
- ClockCtrl = (UINT16)~BIT2;
- Status = SdPeimHcAndMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ ClockCtrl = (UINT16) ~BIT2;
+ Status = SdPeimHcAndMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -506,18 +512,18 @@ SdPeimHcStopClock (
**/
EFI_STATUS
SdPeimHcClockSupply (
- IN UINTN Bar,
- IN UINT64 ClockFreq
+ IN UINTN Bar,
+ IN UINT64 ClockFreq
)
{
- EFI_STATUS Status;
- SD_HC_SLOT_CAP Capability;
- UINT32 BaseClkFreq;
- UINT32 SettingFreq;
- UINT32 Divisor;
- UINT32 Remainder;
- UINT16 ControllerVer;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ SD_HC_SLOT_CAP Capability;
+ UINT32 BaseClkFreq;
+ UINT32 SettingFreq;
+ UINT32 Divisor;
+ UINT32 Remainder;
+ UINT16 ControllerVer;
+ UINT16 ClockCtrl;
//
// Calculate a divisor for SD clock frequency
@@ -526,6 +532,7 @@ SdPeimHcClockSupply (
if (EFI_ERROR (Status)) {
return Status;
}
+
ASSERT (Capability.BaseClkFreq != 0);
BaseClkFreq = Capability.BaseClkFreq;
@@ -551,8 +558,9 @@ SdPeimHcClockSupply (
if ((ClockFreq == SettingFreq) && (Remainder == 0)) {
break;
}
+
if ((ClockFreq == SettingFreq) && (Remainder != 0)) {
- SettingFreq ++;
+ SettingFreq++;
}
}
@@ -562,6 +570,7 @@ SdPeimHcClockSupply (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
//
@@ -575,6 +584,7 @@ SdPeimHcClockSupply (
if (((Divisor - 1) & Divisor) != 0) {
Divisor = 1 << (HighBitSet32 (Divisor) + 1);
}
+
ASSERT (Divisor <= 0x80);
ClockCtrl = (Divisor & 0xFF) << 8;
} else {
@@ -594,7 +604,7 @@ SdPeimHcClockSupply (
// Supply clock frequency with specified divisor
//
ClockCtrl |= BIT0;
- Status = SdPeimHcRwMmio (Bar + SD_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
+ Status = SdPeimHcRwMmio (Bar + SD_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
return Status;
@@ -618,7 +628,7 @@ SdPeimHcClockSupply (
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
- Status = SdPeimHcOrMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = SdPeimHcOrMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -637,17 +647,17 @@ SdPeimHcClockSupply (
**/
EFI_STATUS
SdPeimHcPowerControl (
- IN UINTN Bar,
- IN UINT8 PowerCtrl
+ IN UINTN Bar,
+ IN UINT8 PowerCtrl
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Clr SD Bus Power
//
- PowerCtrl &= (UINT8)~BIT0;
- Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl &= (UINT8) ~BIT0;
+ Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -656,7 +666,7 @@ SdPeimHcPowerControl (
// Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
//
PowerCtrl |= BIT0;
- Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
return Status;
}
@@ -675,32 +685,34 @@ SdPeimHcPowerControl (
**/
EFI_STATUS
SdPeimHcSetBusWidth (
- IN UINTN Bar,
- IN UINT16 BusWidth
+ IN UINTN Bar,
+ IN UINT16 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (BusWidth == 1) {
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);
- Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 = (UINT8) ~(BIT5 | BIT1);
+ Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 4) {
Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl1 |= BIT1;
- HostCtrl1 &= (UINT8)~BIT5;
- Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 &= (UINT8) ~BIT5;
+ Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 8) {
Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl1 &= (UINT8)~BIT1;
+
+ HostCtrl1 &= (UINT8) ~BIT1;
HostCtrl1 |= BIT5;
- Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else {
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
@@ -720,12 +732,12 @@ SdPeimHcSetBusWidth (
**/
EFI_STATUS
SdPeimHcInitClockFreq (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- SD_HC_SLOT_CAP Capability;
- UINT32 InitFreq;
+ EFI_STATUS Status;
+ SD_HC_SLOT_CAP Capability;
+ UINT32 InitFreq;
//
// Calculate a divisor for SD clock frequency
@@ -741,11 +753,12 @@ SdPeimHcInitClockFreq (
//
return EFI_UNSUPPORTED;
}
+
//
// Supply 400KHz clock frequency at initialization phase.
//
InitFreq = 400;
- Status = SdPeimHcClockSupply (Bar, InitFreq);
+ Status = SdPeimHcClockSupply (Bar, InitFreq);
return Status;
}
@@ -762,13 +775,13 @@ SdPeimHcInitClockFreq (
**/
EFI_STATUS
SdPeimHcInitPowerVoltage (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- SD_HC_SLOT_CAP Capability;
- UINT8 MaxVoltage;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ SD_HC_SLOT_CAP Capability;
+ UINT8 MaxVoltage;
+ UINT8 HostCtrl2;
//
// Get the support voltage of the Host Controller
@@ -777,6 +790,7 @@ SdPeimHcInitPowerVoltage (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Calculate supported maximum voltage according to SD Bus Voltage Select
//
@@ -796,10 +810,11 @@ SdPeimHcInitPowerVoltage (
//
MaxVoltage = 0x0A;
HostCtrl2 = BIT3;
- Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
MicroSecondDelay (5000);
} else {
ASSERT (FALSE);
@@ -827,11 +842,11 @@ SdPeimHcInitPowerVoltage (
**/
EFI_STATUS
SdPeimHcInitTimeoutCtrl (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 Timeout;
+ EFI_STATUS Status;
+ UINT8 Timeout;
Timeout = 0x0E;
Status = SdPeimHcRwMmio (Bar + SD_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);
@@ -851,10 +866,10 @@ SdPeimHcInitTimeoutCtrl (
**/
EFI_STATUS
SdPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = SdPeimHcInitClockFreq (Bar);
if (EFI_ERROR (Status)) {
@@ -882,18 +897,18 @@ SdPeimHcInitHost (
**/
EFI_STATUS
SdPeimHcLedOnOff (
- IN UINTN Bar,
- IN BOOLEAN On
+ IN UINTN Bar,
+ IN BOOLEAN On
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (On) {
HostCtrl1 = BIT0;
Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else {
- HostCtrl1 = (UINT8)~BIT0;
+ HostCtrl1 = (UINT8) ~BIT0;
Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
}
@@ -913,15 +928,15 @@ SdPeimHcLedOnOff (
**/
EFI_STATUS
BuildAdmaDescTable (
- IN SD_TRB *Trb
+ IN SD_TRB *Trb
)
{
- EFI_PHYSICAL_ADDRESS Data;
- UINT64 DataLen;
- UINT64 Entries;
- UINT32 Index;
- UINT64 Remaining;
- UINT32 Address;
+ EFI_PHYSICAL_ADDRESS Data;
+ UINT64 DataLen;
+ UINT64 Entries;
+ UINT32 Index;
+ UINT64 Remaining;
+ UINT32 Address;
Data = Trb->DataPhy;
DataLen = Trb->DataLen;
@@ -931,6 +946,7 @@ BuildAdmaDescTable (
if ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)) {
return EFI_INVALID_PARAMETER;
}
+
//
// Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)
// for 32-bit address descriptor table.
@@ -951,14 +967,14 @@ BuildAdmaDescTable (
Address = (UINT32)Data;
for (Index = 0; Index < Entries; Index++) {
if (Remaining <= ADMA_MAX_DATA_PER_LINE) {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = (UINT16)Remaining;
Trb->AdmaDesc[Index].Address = Address;
break;
} else {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = 0;
Trb->AdmaDesc[Index].Address = Address;
}
@@ -985,15 +1001,15 @@ BuildAdmaDescTable (
**/
SD_TRB *
SdPeimCreateTrb (
- IN SD_PEIM_HC_SLOT *Slot,
- IN SD_COMMAND_PACKET *Packet
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN SD_COMMAND_PACKET *Packet
)
{
- SD_TRB *Trb;
- EFI_STATUS Status;
- SD_HC_SLOT_CAP Capability;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
+ SD_TRB *Trb;
+ EFI_STATUS Status;
+ SD_HC_SLOT_CAP Capability;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
//
// Calculate a divisor for SD clock frequency
@@ -1043,7 +1059,7 @@ SdPeimCreateTrb (
if (Trb->DataLen != 0) {
MapLength = Trb->DataLen;
- Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
+ Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
if (EFI_ERROR (Status) || (MapLength != Trb->DataLen)) {
DEBUG ((DEBUG_ERROR, "SdPeimCreateTrb: Fail to map data buffer.\n"));
@@ -1055,7 +1071,7 @@ SdPeimCreateTrb (
Trb->Mode = SdNoData;
} else if (Capability.Adma2 != 0) {
Trb->Mode = SdAdmaMode;
- Status = BuildAdmaDescTable (Trb);
+ Status = BuildAdmaDescTable (Trb);
if (EFI_ERROR (Status)) {
goto Error;
}
@@ -1065,6 +1081,7 @@ SdPeimCreateTrb (
Trb->Mode = SdPioMode;
}
}
+
return Trb;
Error:
@@ -1080,7 +1097,7 @@ Error:
**/
VOID
SdPeimFreeTrb (
- IN SD_TRB *Trb
+ IN SD_TRB *Trb
)
{
if ((Trb != NULL) && (Trb->DataMap != NULL)) {
@@ -1094,6 +1111,7 @@ SdPeimFreeTrb (
if (Trb != NULL) {
FreePool (Trb);
}
+
return;
}
@@ -1110,19 +1128,20 @@ SdPeimFreeTrb (
**/
EFI_STATUS
SdPeimCheckTrbEnv (
- IN UINTN Bar,
- IN SD_TRB *Trb
+ IN UINTN Bar,
+ IN SD_TRB *Trb
)
{
- EFI_STATUS Status;
- SD_COMMAND_PACKET *Packet;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ SD_COMMAND_PACKET *Packet;
+ UINT32 PresentState;
Packet = Trb->Packet;
if ((Packet->SdCmdBlk->CommandType == SdCommandTypeAdtc) ||
(Packet->SdCmdBlk->ResponseType == SdResponseTypeR1b) ||
- (Packet->SdCmdBlk->ResponseType == SdResponseTypeR5b)) {
+ (Packet->SdCmdBlk->ResponseType == SdResponseTypeR5b))
+ {
//
// Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
// the Present State register to be 0
@@ -1159,14 +1178,14 @@ SdPeimCheckTrbEnv (
**/
EFI_STATUS
SdPeimWaitTrbEnv (
- IN UINTN Bar,
- IN SD_TRB *Trb
+ IN UINTN Bar,
+ IN SD_TRB *Trb
)
{
- EFI_STATUS Status;
- SD_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ SD_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
//
// Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
@@ -1187,6 +1206,7 @@ SdPeimWaitTrbEnv (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1210,21 +1230,21 @@ SdPeimWaitTrbEnv (
**/
EFI_STATUS
SdPeimExecTrb (
- IN UINTN Bar,
- IN SD_TRB *Trb
+ IN UINTN Bar,
+ IN SD_TRB *Trb
)
{
- EFI_STATUS Status;
- SD_COMMAND_PACKET *Packet;
- UINT16 Cmd;
- UINT16 IntStatus;
- UINT32 Argument;
- UINT16 BlkCount;
- UINT16 BlkSize;
- UINT16 TransMode;
- UINT8 HostCtrl1;
- UINT32 SdmaAddr;
- UINT64 AdmaAddr;
+ EFI_STATUS Status;
+ SD_COMMAND_PACKET *Packet;
+ UINT16 Cmd;
+ UINT16 IntStatus;
+ UINT32 Argument;
+ UINT16 BlkCount;
+ UINT16 BlkSize;
+ UINT16 TransMode;
+ UINT8 HostCtrl1;
+ UINT32 SdmaAddr;
+ UINT64 AdmaAddr;
Packet = Trb->Packet;
//
@@ -1235,6 +1255,7 @@ SdPeimExecTrb (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Clear all bits in Normal Interrupt Status Register
//
@@ -1243,12 +1264,13 @@ SdPeimExecTrb (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set Host Control 1 register DMA Select field
//
if (Trb->Mode == SdAdmaMode) {
HostCtrl1 = BIT4;
- Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1294,7 +1316,8 @@ SdPeimExecTrb (
//
BlkCount = (UINT16)(Trb->DataLen / Trb->BlockSize);
}
- Status = SdPeimHcRwMmio (Bar + SD_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
+
+ Status = SdPeimHcRwMmio (Bar + SD_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1310,12 +1333,15 @@ SdPeimExecTrb (
if (Trb->Mode != SdPioMode) {
TransMode |= BIT0;
}
+
if (Trb->Read) {
TransMode |= BIT4;
}
+
if (BlkCount > 1) {
TransMode |= BIT5 | BIT1;
}
+
//
// SD memory card needs to use AUTO CMD12 feature.
//
@@ -1329,10 +1355,11 @@ SdPeimExecTrb (
return Status;
}
- Cmd = (UINT16)LShiftU64(Packet->SdCmdBlk->CommandIndex, 8);
+ Cmd = (UINT16)LShiftU64 (Packet->SdCmdBlk->CommandIndex, 8);
if (Packet->SdCmdBlk->CommandType == SdCommandTypeAdtc) {
Cmd |= BIT5;
}
+
//
// Convert ResponseType to value
//
@@ -1346,7 +1373,7 @@ SdPeimExecTrb (
break;
case SdResponseTypeR2:
Cmd |= (BIT0 | BIT3);
- break;
+ break;
case SdResponseTypeR3:
case SdResponseTypeR4:
Cmd |= BIT1;
@@ -1360,6 +1387,7 @@ SdPeimExecTrb (
break;
}
}
+
//
// Execute cmd
//
@@ -1380,18 +1408,18 @@ SdPeimExecTrb (
**/
EFI_STATUS
SdPeimCheckTrbResult (
- IN UINTN Bar,
- IN SD_TRB *Trb
+ IN UINTN Bar,
+ IN SD_TRB *Trb
)
{
- EFI_STATUS Status;
- SD_COMMAND_PACKET *Packet;
- UINT16 IntStatus;
- UINT32 Response[4];
- UINT32 SdmaAddr;
- UINT8 Index;
- UINT8 SwReset;
- UINT32 PioLength;
+ EFI_STATUS Status;
+ SD_COMMAND_PACKET *Packet;
+ UINT16 IntStatus;
+ UINT32 Response[4];
+ UINT32 SdmaAddr;
+ UINT8 Index;
+ UINT8 SwReset;
+ UINT32 PioLength;
SwReset = 0;
Packet = Trb->Packet;
@@ -1407,6 +1435,7 @@ SdPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Check Transfer Complete bit is set or not.
//
@@ -1435,6 +1464,7 @@ SdPeimCheckTrbResult (
goto Done;
}
+
//
// Check if there is a error happened during cmd execution.
// If yes, then do error recovery procedure to follow SD Host Controller
@@ -1454,6 +1484,7 @@ SdPeimCheckTrbResult (
if ((IntStatus & 0x0F) != 0) {
SwReset |= BIT1;
}
+
if ((IntStatus & 0xF0) != 0) {
SwReset |= BIT2;
}
@@ -1467,6 +1498,7 @@ SdPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
Status = SdPeimHcWaitMmioSet (
Bar + SD_HC_SW_RST,
sizeof (SwReset),
@@ -1481,6 +1513,7 @@ SdPeimCheckTrbResult (
Status = EFI_DEVICE_ERROR;
goto Done;
}
+
//
// Check if DMA interrupt is signalled for the SDMA transfer.
//
@@ -1498,6 +1531,7 @@ SdPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Update SDMA Address register.
//
@@ -1511,12 +1545,14 @@ SdPeimCheckTrbResult (
if (EFI_ERROR (Status)) {
goto Done;
}
+
Trb->DataPhy = (UINT32)(UINTN)SdmaAddr;
}
if ((Packet->SdCmdBlk->CommandType != SdCommandTypeAdtc) &&
(Packet->SdCmdBlk->ResponseType != SdResponseTypeR1b) &&
- (Packet->SdCmdBlk->ResponseType != SdResponseTypeR5b)) {
+ (Packet->SdCmdBlk->ResponseType != SdResponseTypeR5b))
+ {
if ((IntStatus & BIT0) == BIT0) {
Status = EFI_SUCCESS;
goto Done;
@@ -1539,8 +1575,9 @@ SdPeimCheckTrbResult (
// Read data out from Buffer Port register
//
for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) {
- SdPeimHcRwMmio (Bar + SD_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength);
+ SdPeimHcRwMmio (Bar + SD_HC_BUF_DAT_PORT, TRUE, 4, (UINT8 *)Trb->Data + PioLength);
}
+
Status = EFI_SUCCESS;
goto Done;
}
@@ -1565,6 +1602,7 @@ Done:
return Status;
}
}
+
CopyMem (Packet->SdStatusBlk, Response, sizeof (Response));
}
}
@@ -1588,14 +1626,14 @@ Done:
**/
EFI_STATUS
SdPeimWaitTrbResult (
- IN UINTN Bar,
- IN SD_TRB *Trb
+ IN UINTN Bar,
+ IN SD_TRB *Trb
)
{
- EFI_STATUS Status;
- SD_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ SD_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
Packet = Trb->Packet;
//
@@ -1616,6 +1654,7 @@ SdPeimWaitTrbResult (
if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1660,12 +1699,12 @@ SdPeimWaitTrbResult (
EFI_STATUS
EFIAPI
SdPeimExecCmd (
- IN SD_PEIM_HC_SLOT *Slot,
- IN OUT SD_COMMAND_PACKET *Packet
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN OUT SD_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
- SD_TRB *Trb;
+ EFI_STATUS Status;
+ SD_TRB *Trb;
if (Packet == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1722,13 +1761,13 @@ Done:
**/
EFI_STATUS
SdPeimReset (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1738,9 +1777,9 @@ SdPeimReset (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_GO_IDLE_STATE;
- SdCmdBlk.CommandType = SdCommandTypeBc;
- SdCmdBlk.ResponseType = 0;
+ SdCmdBlk.CommandIndex = SD_GO_IDLE_STATE;
+ SdCmdBlk.CommandType = SdCommandTypeBc;
+ SdCmdBlk.ResponseType = 0;
SdCmdBlk.CommandArgument = 0;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -1764,15 +1803,15 @@ SdPeimReset (
**/
EFI_STATUS
SdPeimVoltageCheck (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT8 SupplyVoltage,
- IN UINT8 CheckPattern
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT8 SupplyVoltage,
+ IN UINT8 CheckPattern
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1782,9 +1821,9 @@ SdPeimVoltageCheck (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_SEND_IF_COND;
- SdCmdBlk.CommandType = SdCommandTypeBcr;
- SdCmdBlk.ResponseType = SdResponseTypeR7;
+ SdCmdBlk.CommandIndex = SD_SEND_IF_COND;
+ SdCmdBlk.CommandType = SdCommandTypeBcr;
+ SdCmdBlk.ResponseType = SdResponseTypeR7;
SdCmdBlk.CommandArgument = (SupplyVoltage << 8) | CheckPattern;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -1812,16 +1851,16 @@ SdPeimVoltageCheck (
**/
EFI_STATUS
SdioSendOpCond (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT32 VoltageWindow,
- IN BOOLEAN S18r
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT32 VoltageWindow,
+ IN BOOLEAN S18r
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 Switch;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1864,22 +1903,22 @@ SdioSendOpCond (
**/
EFI_STATUS
SdPeimSendOpCond (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- IN UINT32 VoltageWindow,
- IN BOOLEAN S18r,
- IN BOOLEAN Xpc,
- IN BOOLEAN Hcs,
- OUT UINT32 *Ocr
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ IN UINT32 VoltageWindow,
+ IN BOOLEAN S18r,
+ IN BOOLEAN Xpc,
+ IN BOOLEAN Hcs,
+ OUT UINT32 *Ocr
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
- UINT32 MaxPower;
- UINT32 HostCapacity;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 Switch;
+ UINT32 MaxPower;
+ UINT32 HostCapacity;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1889,9 +1928,9 @@ SdPeimSendOpCond (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_APP_CMD;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR1;
+ SdCmdBlk.CommandIndex = SD_APP_CMD;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1;
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -1903,9 +1942,9 @@ SdPeimSendOpCond (
SdCmdBlk.CommandType = SdCommandTypeBcr;
SdCmdBlk.ResponseType = SdResponseTypeR3;
- Switch = S18r ? BIT24 : 0;
- MaxPower = Xpc ? BIT28 : 0;
- HostCapacity = Hcs ? BIT30 : 0;
+ Switch = S18r ? BIT24 : 0;
+ MaxPower = Xpc ? BIT28 : 0;
+ HostCapacity = Hcs ? BIT30 : 0;
SdCmdBlk.CommandArgument = (VoltageWindow & 0xFFFFFF) | Switch | MaxPower | HostCapacity;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -1933,13 +1972,13 @@ SdPeimSendOpCond (
**/
EFI_STATUS
SdPeimAllSendCid (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1947,11 +1986,11 @@ SdPeimAllSendCid (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_ALL_SEND_CID;
- SdCmdBlk.CommandType = SdCommandTypeBcr;
- SdCmdBlk.ResponseType = SdResponseTypeR2;
+ SdCmdBlk.CommandIndex = SD_ALL_SEND_CID;
+ SdCmdBlk.CommandType = SdCommandTypeBcr;
+ SdCmdBlk.ResponseType = SdResponseTypeR2;
SdCmdBlk.CommandArgument = 0;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -1974,14 +2013,14 @@ SdPeimAllSendCid (
**/
EFI_STATUS
SdPeimSetRca (
- IN SD_PEIM_HC_SLOT *Slot,
- OUT UINT16 *Rca
+ IN SD_PEIM_HC_SLOT *Slot,
+ OUT UINT16 *Rca
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -1989,7 +2028,7 @@ SdPeimSetRca (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
SdCmdBlk.CommandIndex = SD_SET_RELATIVE_ADDR;
SdCmdBlk.CommandType = SdCommandTypeBcr;
@@ -2021,15 +2060,15 @@ SdPeimSetRca (
**/
EFI_STATUS
SdPeimGetCsd (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- OUT SD_CSD *Csd
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ OUT SD_CSD *Csd
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2037,11 +2076,11 @@ SdPeimGetCsd (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_SEND_CSD;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR2;
+ SdCmdBlk.CommandIndex = SD_SEND_CSD;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR2;
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2049,7 +2088,7 @@ SdPeimGetCsd (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &SdStatusBlk.Resp0, sizeof (SD_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &SdStatusBlk.Resp0, sizeof (SD_CSD) - 1);
}
return Status;
@@ -2069,14 +2108,14 @@ SdPeimGetCsd (
**/
EFI_STATUS
SdPeimSelect (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2084,11 +2123,11 @@ SdPeimSelect (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_SELECT_DESELECT_CARD;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR1b;
+ SdCmdBlk.CommandIndex = SD_SELECT_DESELECT_CARD;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1b;
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2109,13 +2148,13 @@ SdPeimSelect (
**/
EFI_STATUS
SdPeimVoltageSwitch (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2123,11 +2162,11 @@ SdPeimVoltageSwitch (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR1;
+ SdCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1;
SdCmdBlk.CommandArgument = 0;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2150,16 +2189,16 @@ SdPeimVoltageSwitch (
**/
EFI_STATUS
SdPeimSetBusWidth (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ IN UINT8 BusWidth
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 Value;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 Value;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2169,9 +2208,9 @@ SdPeimSetBusWidth (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_APP_CMD;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR1;
+ SdCmdBlk.CommandIndex = SD_APP_CMD;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1;
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2190,6 +2229,7 @@ SdPeimSetBusWidth (
} else {
return EFI_INVALID_PARAMETER;
}
+
SdCmdBlk.CommandArgument = Value & 0x3;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2216,20 +2256,20 @@ SdPeimSetBusWidth (
**/
EFI_STATUS
SdPeimSwitch (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT8 AccessMode,
- IN UINT8 CommandSystem,
- IN UINT8 DriveStrength,
- IN UINT8 PowerLimit,
- IN BOOLEAN Mode,
- OUT UINT8 *SwitchResp
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT8 AccessMode,
+ IN UINT8 CommandSystem,
+ IN UINT8 DriveStrength,
+ IN UINT8 PowerLimit,
+ IN BOOLEAN Mode,
+ OUT UINT8 *SwitchResp
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 ModeValue;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT32 ModeValue;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2237,13 +2277,13 @@ SdPeimSwitch (
Packet.SdCmdBlk = &SdCmdBlk;
Packet.SdStatusBlk = &SdStatusBlk;
- Packet.Timeout = SD_TIMEOUT;
+ Packet.Timeout = SD_TIMEOUT;
SdCmdBlk.CommandIndex = SD_SWITCH_FUNC;
SdCmdBlk.CommandType = SdCommandTypeAdtc;
SdCmdBlk.ResponseType = SdResponseTypeR1;
- ModeValue = Mode ? BIT31 : 0;
+ ModeValue = Mode ? BIT31 : 0;
SdCmdBlk.CommandArgument = (AccessMode & 0xF) | ((PowerLimit & 0xF) << 4) | \
((DriveStrength & 0xF) << 8) | ((DriveStrength & 0xF) << 12) | \
ModeValue;
@@ -2270,15 +2310,15 @@ SdPeimSwitch (
**/
EFI_STATUS
SdPeimSendStatus (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ OUT UINT32 *DevStatus
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2288,9 +2328,9 @@ SdPeimSendStatus (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_SEND_STATUS;
- SdCmdBlk.CommandType = SdCommandTypeAc;
- SdCmdBlk.ResponseType = SdResponseTypeR1;
+ SdCmdBlk.CommandIndex = SD_SEND_STATUS;
+ SdCmdBlk.CommandType = SdCommandTypeAc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1;
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = SdPeimExecCmd (Slot, &Packet);
@@ -2320,18 +2360,18 @@ SdPeimSendStatus (
**/
EFI_STATUS
SdPeimRwSingleBlock (
- IN SD_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2345,7 +2385,7 @@ SdPeimRwSingleBlock (
// Taking 2MB/s as divisor is because it's the lowest
// transfer speed of class 2.
//
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;
if (IsRead) {
Packet.InDataBuffer = Buffer;
@@ -2393,18 +2433,18 @@ SdPeimRwSingleBlock (
**/
EFI_STATUS
SdPeimRwMultiBlocks (
- IN SD_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2418,7 +2458,7 @@ SdPeimRwMultiBlocks (
// Taking 2MB/s as divisor is because it's the lowest
// transfer speed of class 2.
//
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;
if (IsRead) {
Packet.InDataBuffer = Buffer;
@@ -2463,14 +2503,14 @@ SdPeimRwMultiBlocks (
**/
EFI_STATUS
SdPeimSendTuningBlk (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- SD_COMMAND_BLOCK SdCmdBlk;
- SD_STATUS_BLOCK SdStatusBlk;
- SD_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[64];
+ SD_COMMAND_BLOCK SdCmdBlk;
+ SD_STATUS_BLOCK SdStatusBlk;
+ SD_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 TuningBlock[64];
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));
@@ -2480,9 +2520,9 @@ SdPeimSendTuningBlk (
Packet.SdStatusBlk = &SdStatusBlk;
Packet.Timeout = SD_TIMEOUT;
- SdCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;
- SdCmdBlk.CommandType = SdCommandTypeAdtc;
- SdCmdBlk.ResponseType = SdResponseTypeR1;
+ SdCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;
+ SdCmdBlk.CommandType = SdCommandTypeAdtc;
+ SdCmdBlk.ResponseType = SdResponseTypeR1;
SdCmdBlk.CommandArgument = 0;
Packet.InDataBuffer = TuningBlock;
@@ -2510,21 +2550,22 @@ SdPeimSendTuningBlk (
**/
EFI_STATUS
SdPeimTuningClock (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 Retry;
//
// Notify the host that the sampling clock tuning procedure starts.
//
HostCtrl2 = BIT6;
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
//
@@ -2553,11 +2594,12 @@ SdPeimTuningClock (
//
// Abort the tuning procedure and reset the tuning circuit.
//
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
return EFI_DEVICE_ERROR;
}
@@ -2577,13 +2619,13 @@ SdPeimTuningClock (
**/
EFI_STATUS
SdPeimSwitchBusWidth (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT32 DevStatus;
Status = SdPeimSetBusWidth (Slot, Rca, BusWidth);
if (EFI_ERROR (Status)) {
@@ -2594,6 +2636,7 @@ SdPeimSwitchBusWidth (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
@@ -2622,19 +2665,19 @@ SdPeimSwitchBusWidth (
**/
EFI_STATUS
SdPeimSetBusMode (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT16 Rca,
- IN BOOLEAN S18a
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT16 Rca,
+ IN BOOLEAN S18a
)
{
- EFI_STATUS Status;
- SD_HC_SLOT_CAP Capability;
- UINT32 ClockFreq;
- UINT8 BusWidth;
- UINT8 AccessMode;
- UINT8 HostCtrl1;
- UINT8 HostCtrl2;
- UINT8 SwitchResp[64];
+ EFI_STATUS Status;
+ SD_HC_SLOT_CAP Capability;
+ UINT32 ClockFreq;
+ UINT8 BusWidth;
+ UINT8 AccessMode;
+ UINT8 HostCtrl1;
+ UINT8 HostCtrl2;
+ UINT8 SwitchResp[64];
Status = SdPeimGetCsd (Slot, Rca, &Slot->Csd);
if (EFI_ERROR (Status)) {
@@ -2654,7 +2697,7 @@ SdPeimSetBusMode (
}
BusWidth = 4;
- Status = SdPeimSwitchBusWidth (Slot, Rca, BusWidth);
+ Status = SdPeimSwitchBusWidth (Slot, Rca, BusWidth);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSwitchBusWidth fails with %r\n", Status));
return Status;
@@ -2668,24 +2711,25 @@ SdPeimSetBusMode (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Calculate supported bus speed/bus width/clock frequency by host and device capability.
//
ClockFreq = 0;
if (S18a && (Capability.Sdr104 != 0) && ((SwitchResp[13] & BIT3) != 0)) {
- ClockFreq = 208;
+ ClockFreq = 208;
AccessMode = 3;
} else if (S18a && (Capability.Sdr50 != 0) && ((SwitchResp[13] & BIT2) != 0)) {
- ClockFreq = 100;
+ ClockFreq = 100;
AccessMode = 2;
} else if (S18a && (Capability.Ddr50 != 0) && ((SwitchResp[13] & BIT4) != 0)) {
- ClockFreq = 50;
+ ClockFreq = 50;
AccessMode = 4;
} else if ((SwitchResp[13] & BIT1) != 0) {
- ClockFreq = 50;
+ ClockFreq = 50;
AccessMode = 1;
} else {
- ClockFreq = 25;
+ ClockFreq = 25;
AccessMode = 0;
}
@@ -2701,24 +2745,26 @@ SdPeimSetBusMode (
DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSwitch to AccessMode %d ClockFreq %d BusWidth %d fails! The Switch response is 0x%1x\n", AccessMode, ClockFreq, BusWidth, SwitchResp[16] & 0xF));
return EFI_DEVICE_ERROR;
}
+
//
// Set to High Speed timing
//
if (AccessMode == 1) {
HostCtrl1 = BIT2;
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
}
- HostCtrl2 = (UINT8)~0x7;
- Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl2 = AccessMode;
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2755,22 +2801,23 @@ SdPeimSetBusMode (
**/
EFI_STATUS
SdPeimIdentification (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
)
{
- EFI_STATUS Status;
- UINT32 Ocr;
- UINT16 Rca;
- BOOLEAN Xpc;
- BOOLEAN S18r;
- UINT64 MaxCurrent;
- UINT64 Current;
- UINT16 ControllerVer;
- UINT8 PowerCtrl;
- UINT32 PresentState;
- UINT8 HostCtrl2;
- SD_HC_SLOT_CAP Capability;
- UINTN Retry;
+ EFI_STATUS Status;
+ UINT32 Ocr;
+ UINT16 Rca;
+ BOOLEAN Xpc;
+ BOOLEAN S18r;
+ UINT64 MaxCurrent;
+ UINT64 Current;
+ UINT16 ControllerVer;
+ UINT8 PowerCtrl;
+ UINT32 PresentState;
+ UINT8 HostCtrl2;
+ SD_HC_SLOT_CAP Capability;
+ UINTN Retry;
+
//
// 1. Send Cmd0 to the device
//
@@ -2779,6 +2826,7 @@ SdPeimIdentification (
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing Cmd0 fails with %r\n", Status));
return Status;
}
+
//
// 2. Send Cmd8 to the device
//
@@ -2787,6 +2835,7 @@ SdPeimIdentification (
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing Cmd8 fails with %r\n", Status));
return Status;
}
+
//
// 3. Send SDIO Cmd5 to the device to the SDIO device OCR register.
//
@@ -2795,6 +2844,7 @@ SdPeimIdentification (
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Found SDIO device, ignore it as we don't support\n"));
return EFI_DEVICE_ERROR;
}
+
//
// 4. Send Acmd41 with voltage window 0 to the device
//
@@ -2853,6 +2903,7 @@ SdPeimIdentification (
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
+
//
// 5. Repeatly send Acmd41 with supply voltage window to the device.
// Note here we only support the cards complied with SD physical
@@ -2871,6 +2922,7 @@ SdPeimIdentification (
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SdPeimSendOpCond fails too many times\n"));
return EFI_DEVICE_ERROR;
}
+
MicroSecondDelay (10 * 1000);
} while ((Ocr & BIT31) == 0);
@@ -2879,10 +2931,11 @@ SdPeimIdentification (
// (One of support bits is set to 1: SDR50, SDR104 or DDR50 in the
// Capabilities register), switch its voltage to 1.8V.
//
- if ((Capability.Sdr50 != 0 ||
- Capability.Sdr104 != 0 ||
- Capability.Ddr50 != 0) &&
- ((Ocr & BIT24) != 0)) {
+ if (((Capability.Sdr50 != 0) ||
+ (Capability.Sdr104 != 0) ||
+ (Capability.Ddr50 != 0)) &&
+ ((Ocr & BIT24) != 0))
+ {
Status = SdPeimVoltageSwitch (Slot);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimVoltageSwitch fails with %r\n", Status));
@@ -2901,7 +2954,8 @@ SdPeimIdentification (
Status = EFI_DEVICE_ERROR;
goto Error;
}
- HostCtrl2 = BIT3;
+
+ HostCtrl2 = BIT3;
SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
MicroSecondDelay (5000);
@@ -2924,6 +2978,7 @@ SdPeimIdentification (
goto Error;
}
}
+
DEBUG ((DEBUG_INFO, "SdPeimIdentification: Switch to 1.8v signal voltage success\n"));
}
@@ -2938,6 +2993,7 @@ SdPeimIdentification (
DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimSetRca fails with %r\n", Status));
return Status;
}
+
//
// Enter Data Tranfer Mode.
//
@@ -2951,7 +3007,7 @@ Error:
//
// Set SD Bus Power = 0
//
- PowerCtrl = (UINT8)~BIT0;
- Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl = (UINT8) ~BIT0;
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);
return EFI_DEVICE_ERROR;
}
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h
index c31297521c..5619e2e473 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h
@@ -61,9 +61,9 @@ typedef enum {
//
// The maximum data length of each descriptor line
//
-#define ADMA_MAX_DATA_PER_LINE 0x10000
-#define SD_SDMA_BOUNDARY 512 * 1024
-#define SD_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
+#define ADMA_MAX_DATA_PER_LINE 0x10000
+#define SD_SDMA_BOUNDARY 512 * 1024
+#define SD_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
typedef enum {
SdCommandTypeBc, // Broadcast commands, no response
@@ -85,76 +85,76 @@ typedef enum {
} SD_RESPONSE_TYPE;
typedef struct _SD_COMMAND_BLOCK {
- UINT16 CommandIndex;
- UINT32 CommandArgument;
- UINT32 CommandType; // One of the SD_COMMAND_TYPE values
- UINT32 ResponseType; // One of the SD_RESPONSE_TYPE values
+ UINT16 CommandIndex;
+ UINT32 CommandArgument;
+ UINT32 CommandType; // One of the SD_COMMAND_TYPE values
+ UINT32 ResponseType; // One of the SD_RESPONSE_TYPE values
} SD_COMMAND_BLOCK;
typedef struct _SD_STATUS_BLOCK {
- UINT32 Resp0;
- UINT32 Resp1;
- UINT32 Resp2;
- UINT32 Resp3;
+ UINT32 Resp0;
+ UINT32 Resp1;
+ UINT32 Resp2;
+ UINT32 Resp3;
} SD_STATUS_BLOCK;
typedef struct _SD_COMMAND_PACKET {
- UINT64 Timeout;
- SD_COMMAND_BLOCK *SdCmdBlk;
- SD_STATUS_BLOCK *SdStatusBlk;
- VOID *InDataBuffer;
- VOID *OutDataBuffer;
- UINT32 InTransferLength;
- UINT32 OutTransferLength;
+ UINT64 Timeout;
+ SD_COMMAND_BLOCK *SdCmdBlk;
+ SD_STATUS_BLOCK *SdStatusBlk;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
} SD_COMMAND_PACKET;
#pragma pack(1)
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 Reserved1:10;
- UINT32 Length:16;
- UINT32 Address;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 Reserved1 : 10;
+ UINT32 Length : 16;
+ UINT32 Address;
} SD_HC_ADMA_DESC_LINE;
typedef struct {
- UINT32 TimeoutFreq:6; // bit 0:5
- UINT32 Reserved:1; // bit 6
- UINT32 TimeoutUnit:1; // bit 7
- UINT32 BaseClkFreq:8; // bit 8:15
- UINT32 MaxBlkLen:2; // bit 16:17
- UINT32 BusWidth8:1; // bit 18
- UINT32 Adma2:1; // bit 19
- UINT32 Reserved2:1; // bit 20
- UINT32 HighSpeed:1; // bit 21
- UINT32 Sdma:1; // bit 22
- UINT32 SuspRes:1; // bit 23
- UINT32 Voltage33:1; // bit 24
- UINT32 Voltage30:1; // bit 25
- UINT32 Voltage18:1; // bit 26
- UINT32 Reserved3:1; // bit 27
- UINT32 SysBus64:1; // bit 28
- UINT32 AsyncInt:1; // bit 29
- UINT32 SlotType:2; // bit 30:31
- UINT32 Sdr50:1; // bit 32
- UINT32 Sdr104:1; // bit 33
- UINT32 Ddr50:1; // bit 34
- UINT32 Reserved4:1; // bit 35
- UINT32 DriverTypeA:1; // bit 36
- UINT32 DriverTypeC:1; // bit 37
- UINT32 DriverTypeD:1; // bit 38
- UINT32 DriverType4:1; // bit 39
- UINT32 TimerCount:4; // bit 40:43
- UINT32 Reserved5:1; // bit 44
- UINT32 TuningSDR50:1; // bit 45
- UINT32 RetuningMod:2; // bit 46:47
- UINT32 ClkMultiplier:8; // bit 48:55
- UINT32 Reserved6:7; // bit 56:62
- UINT32 Hs400:1; // bit 63
+ UINT32 TimeoutFreq : 6; // bit 0:5
+ UINT32 Reserved : 1; // bit 6
+ UINT32 TimeoutUnit : 1; // bit 7
+ UINT32 BaseClkFreq : 8; // bit 8:15
+ UINT32 MaxBlkLen : 2; // bit 16:17
+ UINT32 BusWidth8 : 1; // bit 18
+ UINT32 Adma2 : 1; // bit 19
+ UINT32 Reserved2 : 1; // bit 20
+ UINT32 HighSpeed : 1; // bit 21
+ UINT32 Sdma : 1; // bit 22
+ UINT32 SuspRes : 1; // bit 23
+ UINT32 Voltage33 : 1; // bit 24
+ UINT32 Voltage30 : 1; // bit 25
+ UINT32 Voltage18 : 1; // bit 26
+ UINT32 Reserved3 : 1; // bit 27
+ UINT32 SysBus64 : 1; // bit 28
+ UINT32 AsyncInt : 1; // bit 29
+ UINT32 SlotType : 2; // bit 30:31
+ UINT32 Sdr50 : 1; // bit 32
+ UINT32 Sdr104 : 1; // bit 33
+ UINT32 Ddr50 : 1; // bit 34
+ UINT32 Reserved4 : 1; // bit 35
+ UINT32 DriverTypeA : 1; // bit 36
+ UINT32 DriverTypeC : 1; // bit 37
+ UINT32 DriverTypeD : 1; // bit 38
+ UINT32 DriverType4 : 1; // bit 39
+ UINT32 TimerCount : 4; // bit 40:43
+ UINT32 Reserved5 : 1; // bit 44
+ UINT32 TuningSDR50 : 1; // bit 45
+ UINT32 RetuningMod : 2; // bit 46:47
+ UINT32 ClkMultiplier : 8; // bit 48:55
+ UINT32 Reserved6 : 7; // bit 56:62
+ UINT32 Hs400 : 1; // bit 63
} SD_HC_SLOT_CAP;
#pragma pack()
@@ -170,7 +170,7 @@ typedef struct {
**/
EFI_STATUS
SdPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -185,7 +185,7 @@ SdPeimHcReset (
**/
EFI_STATUS
SdPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -200,8 +200,8 @@ SdPeimHcEnableInterrupt (
**/
EFI_STATUS
SdPeimHcGetCapability (
- IN UINTN Bar,
- OUT SD_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT SD_HC_SLOT_CAP *Capability
);
/**
@@ -219,7 +219,7 @@ SdPeimHcGetCapability (
**/
EFI_STATUS
SdPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -234,7 +234,7 @@ SdPeimHcCardDetect (
**/
EFI_STATUS
SdPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -256,13 +256,13 @@ SdPeimHcInitHost (
**/
EFI_STATUS
SdPeimSwitch (
- IN SD_PEIM_HC_SLOT *Slot,
- IN UINT8 AccessMode,
- IN UINT8 CommandSystem,
- IN UINT8 DriveStrength,
- IN UINT8 PowerLimit,
- IN BOOLEAN Mode,
- OUT UINT8 *SwitchResp
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN UINT8 AccessMode,
+ IN UINT8 CommandSystem,
+ IN UINT8 DriveStrength,
+ IN UINT8 PowerLimit,
+ IN BOOLEAN Mode,
+ OUT UINT8 *SwitchResp
);
/**
@@ -284,12 +284,12 @@ SdPeimSwitch (
**/
EFI_STATUS
SdPeimRwSingleBlock (
- IN SD_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
);
/**
@@ -311,12 +311,12 @@ SdPeimRwSingleBlock (
**/
EFI_STATUS
SdPeimRwMultiBlocks (
- IN SD_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN SD_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
);
/**
@@ -332,7 +332,7 @@ SdPeimRwMultiBlocks (
**/
EFI_STATUS
SdPeimIdentification (
- IN SD_PEIM_HC_SLOT *Slot
+ IN SD_PEIM_HC_SLOT *Slot
);
/**
@@ -343,8 +343,7 @@ SdPeimIdentification (
**/
VOID
SdPeimFreeTrb (
- IN SD_TRB *Trb
+ IN SD_TRB *Trb
);
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/ComponentName.c b/MdeModulePkg/Bus/Sd/SdDxe/ComponentName.c
index acd29d72cf..405a3d3ffe 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Sd/SdDxe/ComponentName.c
@@ -11,17 +11,17 @@
//
// Driver name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdDxeDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdDxeDriverNameTable[] = {
{ "eng;en", L"Edkii Sd Memory Card Device Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
// Controller name table
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdDxeControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdDxeControllerNameTable[] = {
{ "eng;en", L"Edkii Sd Host Controller" },
- { NULL , NULL }
+ { NULL, NULL }
};
//
@@ -36,9 +36,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSdDxeComponentName =
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSdDxeComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SdDxeComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SdDxeComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSdDxeComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SdDxeComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SdDxeComponentNameGetControllerName,
"en"
};
@@ -96,7 +96,6 @@ SdDxeComponentNameGetDriverName (
DriverName,
(BOOLEAN)(This == &gSdDxeComponentName)
);
-
}
/**
@@ -170,11 +169,11 @@ SdDxeComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SdDxeComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -204,13 +203,14 @@ SdDxeComponentNameGetControllerName (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Get the child context
//
Status = gBS->OpenProtocol (
ChildHandle,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
gSdDxeDriverBinding.DriverBindingHandle,
ChildHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -219,7 +219,7 @@ SdDxeComponentNameGetControllerName (
return EFI_UNSUPPORTED;
}
- Device = SD_DEVICE_DATA_FROM_BLKIO (BlockIo);
+ Device = SD_DEVICE_DATA_FROM_BLKIO (BlockIo);
ControllerNameTable = Device->ControllerNameTable;
}
@@ -231,4 +231,3 @@ SdDxeComponentNameGetControllerName (
(BOOLEAN)(This == &gSdDxeComponentName)
);
}
-
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.c b/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.c
index 5a041d3618..45df48ff72 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.c
+++ b/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.c
@@ -19,20 +19,24 @@
VOID
EFIAPI
AsyncIoCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- SD_REQUEST *Request;
+ SD_REQUEST *Request;
gBS->CloseEvent (Event);
- Request = (SD_REQUEST *) Context;
+ Request = (SD_REQUEST *)Context;
DEBUG_CODE_BEGIN ();
- DEBUG ((DEBUG_INFO, "Sd Async Request: CmdIndex[%d] Arg[%08x] %r\n",
- Request->SdMmcCmdBlk.CommandIndex, Request->SdMmcCmdBlk.CommandArgument,
- Request->Packet.TransactionStatus));
+ DEBUG ((
+ DEBUG_INFO,
+ "Sd Async Request: CmdIndex[%d] Arg[%08x] %r\n",
+ Request->SdMmcCmdBlk.CommandIndex,
+ Request->SdMmcCmdBlk.CommandArgument,
+ Request->Packet.TransactionStatus
+ ));
DEBUG_CODE_END ();
if (EFI_ERROR (Request->Packet.TransactionStatus)) {
@@ -61,8 +65,8 @@ AsyncIoCallback (
**/
EFI_STATUS
SdSetRca (
- IN SD_DEVICE *Device,
- OUT UINT16 *Rca
+ IN SD_DEVICE *Device,
+ OUT UINT16 *Rca
)
{
EFI_STATUS Status;
@@ -106,8 +110,8 @@ SdSetRca (
**/
EFI_STATUS
SdSelect (
- IN SD_DEVICE *Device,
- IN UINT16 Rca
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca
)
{
EFI_STATUS Status;
@@ -130,6 +134,7 @@ SdSelect (
if (Rca != 0) {
SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
}
+
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -151,9 +156,9 @@ SdSelect (
**/
EFI_STATUS
SdSendStatus (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT UINT32 *DevStatus
)
{
EFI_STATUS Status;
@@ -171,15 +176,16 @@ SdSendStatus (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_STATUS;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
if (!EFI_ERROR (Status)) {
CopyMem (DevStatus, &SdMmcStatusBlk.Resp0, sizeof (UINT32));
}
+
return Status;
}
@@ -197,9 +203,9 @@ SdSendStatus (
**/
EFI_STATUS
SdGetCsd (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT SD_CSD *Csd
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT SD_CSD *Csd
)
{
EFI_STATUS Status;
@@ -219,9 +225,9 @@ SdGetCsd (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_CSD;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -230,7 +236,7 @@ SdGetCsd (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (SD_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (SD_CSD) - 1);
}
return Status;
@@ -250,9 +256,9 @@ SdGetCsd (
**/
EFI_STATUS
SdGetCid (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT SD_CID *Cid
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT SD_CID *Cid
)
{
EFI_STATUS Status;
@@ -272,9 +278,9 @@ SdGetCid (
Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
Packet.Timeout = SD_GENERIC_TIMEOUT;
- SdMmcCmdBlk.CommandIndex = SD_SEND_CID;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
+ SdMmcCmdBlk.CommandIndex = SD_SEND_CID;
+ SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
+ SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL);
@@ -283,7 +289,7 @@ SdGetCid (
//
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Cid) + 1, &SdMmcStatusBlk.Resp0, sizeof (SD_CID) - 1);
+ CopyMem (((UINT8 *)Cid) + 1, &SdMmcStatusBlk.Resp0, sizeof (SD_CID) - 1);
}
return Status;
@@ -310,19 +316,19 @@ SdGetCid (
**/
EFI_STATUS
SdRwSingleBlock (
- IN SD_DEVICE *Device,
- IN EFI_LBA Lba,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN SD_DEVICE *Device,
+ IN EFI_LBA Lba,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_REQUEST *RwSingleBlkReq;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ SD_REQUEST *RwSingleBlkReq;
+ EFI_TPL OldTpl;
RwSingleBlkReq = NULL;
PassThru = Device->Private->PassThru;
@@ -334,7 +340,7 @@ SdRwSingleBlock (
}
RwSingleBlkReq->Signature = SD_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Device->Queue, &RwSingleBlkReq->Link);
gBS->RestoreTPL (OldTpl);
RwSingleBlkReq->Packet.SdMmcCmdBlk = &RwSingleBlkReq->SdMmcCmdBlk;
@@ -403,6 +409,7 @@ Error:
if (RwSingleBlkReq->Event != NULL) {
gBS->CloseEvent (RwSingleBlkReq->Event);
}
+
FreePool (RwSingleBlkReq);
}
} else {
@@ -441,19 +448,19 @@ Error:
**/
EFI_STATUS
SdRwMultiBlocks (
- IN SD_DEVICE *Device,
- IN EFI_LBA Lba,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN SD_DEVICE *Device,
+ IN EFI_LBA Lba,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- SD_REQUEST *RwMultiBlkReq;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ SD_REQUEST *RwMultiBlkReq;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_TPL OldTpl;
RwMultiBlkReq = NULL;
@@ -466,7 +473,7 @@ SdRwMultiBlocks (
}
RwMultiBlkReq->Signature = SD_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Device->Queue, &RwMultiBlkReq->Link);
gBS->RestoreTPL (OldTpl);
RwMultiBlkReq->Packet.SdMmcCmdBlk = &RwMultiBlkReq->SdMmcCmdBlk;
@@ -535,6 +542,7 @@ Error:
if (RwMultiBlkReq->Event != NULL) {
gBS->CloseEvent (RwMultiBlkReq->Event);
}
+
FreePool (RwMultiBlkReq);
}
} else {
@@ -577,23 +585,23 @@ Error:
**/
EFI_STATUS
SdReadWrite (
- IN SD_DEVICE *Device,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token
+ IN SD_DEVICE *Device,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN BlockNum;
- UINTN IoAlign;
- UINTN Remaining;
- UINT32 MaxBlock;
- BOOLEAN LastRw;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN BlockNum;
+ UINTN IoAlign;
+ UINTN Remaining;
+ UINT32 MaxBlock;
+ BOOLEAN LastRw;
Status = EFI_SUCCESS;
Media = &Device->BlockMedia;
@@ -619,6 +627,7 @@ SdReadWrite (
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
+
return EFI_SUCCESS;
}
@@ -627,13 +636,13 @@ SdReadWrite (
return EFI_BAD_BUFFER_SIZE;
}
- BlockNum = BufferSize / BlockSize;
+ BlockNum = BufferSize / BlockSize;
if ((Lba + BlockNum - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
IoAlign = Media->IoAlign;
- if (IoAlign > 0 && (((UINTN) Buffer & (IoAlign - 1)) != 0)) {
+ if ((IoAlign > 0) && (((UINTN)Buffer & (IoAlign - 1)) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -661,14 +670,22 @@ SdReadWrite (
} else {
Status = SdRwMultiBlocks (Device, Lba, Buffer, BufferSize, IsRead, Token, LastRw);
}
+
if (EFI_ERROR (Status)) {
return Status;
}
- DEBUG ((DEBUG_BLKIO, "Sd%a(): Lba 0x%x BlkNo 0x%x Event %p with %r\n",
- IsRead ? "Read" : "Write", Lba, BlockNum,
- (Token != NULL) ? Token->Event : NULL, Status));
- Lba += BlockNum;
- Buffer = (UINT8*)Buffer + BufferSize;
+
+ DEBUG ((
+ DEBUG_BLKIO,
+ "Sd%a(): Lba 0x%x BlkNo 0x%x Event %p with %r\n",
+ IsRead ? "Read" : "Write",
+ Lba,
+ BlockNum,
+ (Token != NULL) ? Token->Event : NULL,
+ Status
+ ));
+ Lba += BlockNum;
+ Buffer = (UINT8 *)Buffer + BufferSize;
Remaining -= BlockNum;
}
@@ -689,13 +706,13 @@ SdReadWrite (
EFI_STATUS
EFIAPI
SdReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
Device = SD_DEVICE_DATA_FROM_BLKIO (This);
@@ -734,11 +751,11 @@ SdReadBlocks (
IN UINT32 MediaId,
IN EFI_LBA Lba,
IN UINTN BufferSize,
- OUT VOID *Buffer
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
Device = SD_DEVICE_DATA_FROM_BLKIO (This);
@@ -769,15 +786,15 @@ SdReadBlocks (
EFI_STATUS
EFIAPI
SdWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
Device = SD_DEVICE_DATA_FROM_BLKIO (This);
@@ -798,7 +815,7 @@ SdWriteBlocks (
EFI_STATUS
EFIAPI
SdFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
)
{
//
@@ -825,18 +842,19 @@ SdResetEx (
IN BOOLEAN ExtendedVerification
)
{
- SD_DEVICE *Device;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_REQUEST *Request;
- EFI_TPL OldTpl;
+ SD_DEVICE *Device;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ SD_REQUEST *Request;
+ EFI_TPL OldTpl;
Device = SD_DEVICE_DATA_FROM_BLKIO2 (This);
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
for (Link = GetFirstNode (&Device->Queue);
!IsNull (&Device->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Device->Queue, Link);
RemoveEntryList (Link);
@@ -851,6 +869,7 @@ SdResetEx (
FreePool (Request);
}
+
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
@@ -885,16 +904,16 @@ SdResetEx (
EFI_STATUS
EFIAPI
SdReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
Device = SD_DEVICE_DATA_FROM_BLKIO2 (This);
@@ -927,16 +946,16 @@ SdReadBlocksEx (
EFI_STATUS
EFIAPI
SdWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
Device = SD_DEVICE_DATA_FROM_BLKIO2 (This);
@@ -965,7 +984,7 @@ SdFlushBlocksEx (
//
// Signal event and return directly.
//
- if (Token != NULL && Token->Event != NULL) {
+ if ((Token != NULL) && (Token->Event != NULL)) {
Token->TransactionStatus = EFI_SUCCESS;
gBS->SignalEvent (Token->Event);
}
@@ -989,16 +1008,16 @@ SdFlushBlocksEx (
**/
EFI_STATUS
SdEraseBlockStart (
- IN SD_DEVICE *Device,
- IN EFI_LBA StartLba,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN SD_DEVICE *Device,
+ IN EFI_LBA StartLba,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_REQUEST *EraseBlockStart;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ SD_REQUEST *EraseBlockStart;
+ EFI_TPL OldTpl;
EraseBlockStart = NULL;
PassThru = Device->Private->PassThru;
@@ -1010,7 +1029,7 @@ SdEraseBlockStart (
}
EraseBlockStart->Signature = SD_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Device->Queue, &EraseBlockStart->Link);
gBS->RestoreTPL (OldTpl);
EraseBlockStart->Packet.SdMmcCmdBlk = &EraseBlockStart->SdMmcCmdBlk;
@@ -1060,6 +1079,7 @@ Error:
if (EraseBlockStart->Event != NULL) {
gBS->CloseEvent (EraseBlockStart->Event);
}
+
FreePool (EraseBlockStart);
}
} else {
@@ -1093,16 +1113,16 @@ Error:
**/
EFI_STATUS
SdEraseBlockEnd (
- IN SD_DEVICE *Device,
- IN EFI_LBA EndLba,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN SD_DEVICE *Device,
+ IN EFI_LBA EndLba,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_REQUEST *EraseBlockEnd;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ SD_REQUEST *EraseBlockEnd;
+ EFI_TPL OldTpl;
EraseBlockEnd = NULL;
PassThru = Device->Private->PassThru;
@@ -1114,7 +1134,7 @@ SdEraseBlockEnd (
}
EraseBlockEnd->Signature = SD_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Device->Queue, &EraseBlockEnd->Link);
gBS->RestoreTPL (OldTpl);
EraseBlockEnd->Packet.SdMmcCmdBlk = &EraseBlockEnd->SdMmcCmdBlk;
@@ -1164,6 +1184,7 @@ Error:
if (EraseBlockEnd->Event != NULL) {
gBS->CloseEvent (EraseBlockEnd->Event);
}
+
FreePool (EraseBlockEnd);
}
} else {
@@ -1196,15 +1217,15 @@ Error:
**/
EFI_STATUS
SdEraseBlock (
- IN SD_DEVICE *Device,
- IN EFI_BLOCK_IO2_TOKEN *Token,
- IN BOOLEAN IsEnd
+ IN SD_DEVICE *Device,
+ IN EFI_BLOCK_IO2_TOKEN *Token,
+ IN BOOLEAN IsEnd
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_REQUEST *EraseBlock;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ SD_REQUEST *EraseBlock;
+ EFI_TPL OldTpl;
EraseBlock = NULL;
PassThru = Device->Private->PassThru;
@@ -1216,7 +1237,7 @@ SdEraseBlock (
}
EraseBlock->Signature = SD_REQUEST_SIGNATURE;
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
InsertTailList (&Device->Queue, &EraseBlock->Link);
gBS->RestoreTPL (OldTpl);
EraseBlock->Packet.SdMmcCmdBlk = &EraseBlock->SdMmcCmdBlk;
@@ -1260,6 +1281,7 @@ Error:
if (EraseBlock->Event != NULL) {
gBS->CloseEvent (EraseBlock->Event);
}
+
FreePool (EraseBlock);
}
} else {
@@ -1307,19 +1329,19 @@ Error:
EFI_STATUS
EFIAPI
SdEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
)
{
- EFI_STATUS Status;
- EFI_BLOCK_IO_MEDIA *Media;
- UINTN BlockSize;
- UINTN BlockNum;
- EFI_LBA LastLba;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINTN BlockSize;
+ UINTN BlockNum;
+ EFI_LBA LastLba;
+ SD_DEVICE *Device;
Status = EFI_SUCCESS;
Device = SD_DEVICE_DATA_FROM_ERASEBLK (This);
@@ -1341,7 +1363,7 @@ SdEraseBlocks (
return EFI_INVALID_PARAMETER;
}
- BlockNum = Size / BlockSize;
+ BlockNum = Size / BlockSize;
if ((Lba + BlockNum - 1) > Media->LastBlock) {
return EFI_INVALID_PARAMETER;
}
@@ -1352,17 +1374,17 @@ SdEraseBlocks (
LastLba = Lba + BlockNum - 1;
- Status = SdEraseBlockStart (Device, Lba, (EFI_BLOCK_IO2_TOKEN*)Token, FALSE);
+ Status = SdEraseBlockStart (Device, Lba, (EFI_BLOCK_IO2_TOKEN *)Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
- Status = SdEraseBlockEnd (Device, LastLba, (EFI_BLOCK_IO2_TOKEN*)Token, FALSE);
+ Status = SdEraseBlockEnd (Device, LastLba, (EFI_BLOCK_IO2_TOKEN *)Token, FALSE);
if (EFI_ERROR (Status)) {
return Status;
}
- Status = SdEraseBlock (Device, (EFI_BLOCK_IO2_TOKEN*)Token, TRUE);
+ Status = SdEraseBlock (Device, (EFI_BLOCK_IO2_TOKEN *)Token, TRUE);
if (EFI_ERROR (Status)) {
return Status;
}
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.h b/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.h
index b6b4c45f1f..b456ea31e8 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.h
+++ b/MdeModulePkg/Bus/Sd/SdDxe/SdBlockIo.h
@@ -26,8 +26,8 @@
EFI_STATUS
EFIAPI
SdReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -56,7 +56,7 @@ SdReadBlocks (
IN UINT32 MediaId,
IN EFI_LBA Lba,
IN UINTN BufferSize,
- OUT VOID *Buffer
+ OUT VOID *Buffer
);
/**
@@ -82,11 +82,11 @@ SdReadBlocks (
EFI_STATUS
EFIAPI
SdWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -102,7 +102,7 @@ SdWriteBlocks (
EFI_STATUS
EFIAPI
SdFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
+ IN EFI_BLOCK_IO_PROTOCOL *This
);
/**
@@ -152,12 +152,12 @@ SdResetEx (
EFI_STATUS
EFIAPI
SdReadBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -185,12 +185,12 @@ SdReadBlocksEx (
EFI_STATUS
EFIAPI
SdWriteBlocksEx (
- IN EFI_BLOCK_IO2_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_BLOCK_IO2_TOKEN *Token,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO2_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_BLOCK_IO2_TOKEN *Token,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -241,12 +241,11 @@ SdFlushBlocksEx (
EFI_STATUS
EFIAPI
SdEraseBlocks (
- IN EFI_ERASE_BLOCK_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
- IN UINTN Size
+ IN EFI_ERASE_BLOCK_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN OUT EFI_ERASE_BLOCK_TOKEN *Token,
+ IN UINTN Size
);
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/SdDiskInfo.c b/MdeModulePkg/Bus/Sd/SdDxe/SdDiskInfo.c
index 6563f7232a..8bc82b9be7 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/SdDiskInfo.c
+++ b/MdeModulePkg/Bus/Sd/SdDxe/SdDiskInfo.c
@@ -32,8 +32,8 @@ SdDiskInfoInquiry (
IN OUT UINT32 *InquiryDataSize
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
Device = SD_DEVICE_DATA_FROM_DISKINFO (This);
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.c b/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.c
index 4ca374990d..a7b2515b14 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.c
+++ b/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.c
@@ -14,7 +14,7 @@
//
// SdDxe Driver Binding Protocol Instance
//
-EFI_DRIVER_BINDING_PROTOCOL gSdDxeDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gSdDxeDriverBinding = {
SdDxeDriverBindingSupported,
SdDxeDriverBindingStart,
SdDxeDriverBindingStop,
@@ -26,7 +26,7 @@ EFI_DRIVER_BINDING_PROTOCOL gSdDxeDriverBinding = {
//
// Template for SD_DEVICE data structure.
//
-SD_DEVICE mSdDeviceTemplate = {
+SD_DEVICE mSdDeviceTemplate = {
SD_DEVICE_SIGNATURE, // Signature
NULL, // Handle
NULL, // DevicePath
@@ -99,41 +99,42 @@ DumpCsd (
IN SD_CSD *Csd
)
{
- SD_CSD2 *Csd2;
-
- DEBUG((DEBUG_INFO, "== Dump Sd Csd Register==\n"));
- DEBUG((DEBUG_INFO, " CSD structure 0x%x\n", Csd->CsdStructure));
- DEBUG((DEBUG_INFO, " Data read access-time 1 0x%x\n", Csd->Taac));
- DEBUG((DEBUG_INFO, " Data read access-time 2 0x%x\n", Csd->Nsac));
- DEBUG((DEBUG_INFO, " Max. bus clock frequency 0x%x\n", Csd->TranSpeed));
- DEBUG((DEBUG_INFO, " Device command classes 0x%x\n", Csd->Ccc));
- DEBUG((DEBUG_INFO, " Max. read data block length 0x%x\n", Csd->ReadBlLen));
- DEBUG((DEBUG_INFO, " Partial blocks for read allowed 0x%x\n", Csd->ReadBlPartial));
- DEBUG((DEBUG_INFO, " Write block misalignment 0x%x\n", Csd->WriteBlkMisalign));
- DEBUG((DEBUG_INFO, " Read block misalignment 0x%x\n", Csd->ReadBlkMisalign));
- DEBUG((DEBUG_INFO, " DSR implemented 0x%x\n", Csd->DsrImp));
+ SD_CSD2 *Csd2;
+
+ DEBUG ((DEBUG_INFO, "== Dump Sd Csd Register==\n"));
+ DEBUG ((DEBUG_INFO, " CSD structure 0x%x\n", Csd->CsdStructure));
+ DEBUG ((DEBUG_INFO, " Data read access-time 1 0x%x\n", Csd->Taac));
+ DEBUG ((DEBUG_INFO, " Data read access-time 2 0x%x\n", Csd->Nsac));
+ DEBUG ((DEBUG_INFO, " Max. bus clock frequency 0x%x\n", Csd->TranSpeed));
+ DEBUG ((DEBUG_INFO, " Device command classes 0x%x\n", Csd->Ccc));
+ DEBUG ((DEBUG_INFO, " Max. read data block length 0x%x\n", Csd->ReadBlLen));
+ DEBUG ((DEBUG_INFO, " Partial blocks for read allowed 0x%x\n", Csd->ReadBlPartial));
+ DEBUG ((DEBUG_INFO, " Write block misalignment 0x%x\n", Csd->WriteBlkMisalign));
+ DEBUG ((DEBUG_INFO, " Read block misalignment 0x%x\n", Csd->ReadBlkMisalign));
+ DEBUG ((DEBUG_INFO, " DSR implemented 0x%x\n", Csd->DsrImp));
if (Csd->CsdStructure == 0) {
- DEBUG((DEBUG_INFO, " Device size 0x%x\n", Csd->CSizeLow | (Csd->CSizeHigh << 2)));
- DEBUG((DEBUG_INFO, " Max. read current @ VDD min 0x%x\n", Csd->VddRCurrMin));
- DEBUG((DEBUG_INFO, " Max. read current @ VDD max 0x%x\n", Csd->VddRCurrMax));
- DEBUG((DEBUG_INFO, " Max. write current @ VDD min 0x%x\n", Csd->VddWCurrMin));
- DEBUG((DEBUG_INFO, " Max. write current @ VDD max 0x%x\n", Csd->VddWCurrMax));
+ DEBUG ((DEBUG_INFO, " Device size 0x%x\n", Csd->CSizeLow | (Csd->CSizeHigh << 2)));
+ DEBUG ((DEBUG_INFO, " Max. read current @ VDD min 0x%x\n", Csd->VddRCurrMin));
+ DEBUG ((DEBUG_INFO, " Max. read current @ VDD max 0x%x\n", Csd->VddRCurrMax));
+ DEBUG ((DEBUG_INFO, " Max. write current @ VDD min 0x%x\n", Csd->VddWCurrMin));
+ DEBUG ((DEBUG_INFO, " Max. write current @ VDD max 0x%x\n", Csd->VddWCurrMax));
} else {
- Csd2 = (SD_CSD2*)(VOID*)Csd;
- DEBUG((DEBUG_INFO, " Device size 0x%x\n", Csd2->CSizeLow | (Csd->CSizeHigh << 16)));
+ Csd2 = (SD_CSD2 *)(VOID *)Csd;
+ DEBUG ((DEBUG_INFO, " Device size 0x%x\n", Csd2->CSizeLow | (Csd->CSizeHigh << 16)));
}
- DEBUG((DEBUG_INFO, " Erase sector size 0x%x\n", Csd->SectorSize));
- DEBUG((DEBUG_INFO, " Erase single block enable 0x%x\n", Csd->EraseBlkEn));
- DEBUG((DEBUG_INFO, " Write protect group size 0x%x\n", Csd->WpGrpSize));
- DEBUG((DEBUG_INFO, " Write protect group enable 0x%x\n", Csd->WpGrpEnable));
- DEBUG((DEBUG_INFO, " Write speed factor 0x%x\n", Csd->R2WFactor));
- DEBUG((DEBUG_INFO, " Max. write data block length 0x%x\n", Csd->WriteBlLen));
- DEBUG((DEBUG_INFO, " Partial blocks for write allowed 0x%x\n", Csd->WriteBlPartial));
- DEBUG((DEBUG_INFO, " File format group 0x%x\n", Csd->FileFormatGrp));
- DEBUG((DEBUG_INFO, " Copy flag (OTP) 0x%x\n", Csd->Copy));
- DEBUG((DEBUG_INFO, " Permanent write protection 0x%x\n", Csd->PermWriteProtect));
- DEBUG((DEBUG_INFO, " Temporary write protection 0x%x\n", Csd->TmpWriteProtect));
- DEBUG((DEBUG_INFO, " File format 0x%x\n", Csd->FileFormat));
+
+ DEBUG ((DEBUG_INFO, " Erase sector size 0x%x\n", Csd->SectorSize));
+ DEBUG ((DEBUG_INFO, " Erase single block enable 0x%x\n", Csd->EraseBlkEn));
+ DEBUG ((DEBUG_INFO, " Write protect group size 0x%x\n", Csd->WpGrpSize));
+ DEBUG ((DEBUG_INFO, " Write protect group enable 0x%x\n", Csd->WpGrpEnable));
+ DEBUG ((DEBUG_INFO, " Write speed factor 0x%x\n", Csd->R2WFactor));
+ DEBUG ((DEBUG_INFO, " Max. write data block length 0x%x\n", Csd->WriteBlLen));
+ DEBUG ((DEBUG_INFO, " Partial blocks for write allowed 0x%x\n", Csd->WriteBlPartial));
+ DEBUG ((DEBUG_INFO, " File format group 0x%x\n", Csd->FileFormatGrp));
+ DEBUG ((DEBUG_INFO, " Copy flag (OTP) 0x%x\n", Csd->Copy));
+ DEBUG ((DEBUG_INFO, " Permanent write protection 0x%x\n", Csd->PermWriteProtect));
+ DEBUG ((DEBUG_INFO, " Temporary write protection 0x%x\n", Csd->TmpWriteProtect));
+ DEBUG ((DEBUG_INFO, " File format 0x%x\n", Csd->FileFormat));
return EFI_SUCCESS;
}
@@ -149,8 +150,8 @@ DumpCsd (
**/
EFI_STATUS
GetSdModelName (
- IN OUT SD_DEVICE *Device,
- IN SD_CID *Cid
+ IN OUT SD_DEVICE *Device,
+ IN SD_CID *Cid
)
{
CHAR8 String[SD_MODEL_NAME_MAX_LEN];
@@ -178,19 +179,19 @@ GetSdModelName (
**/
EFI_STATUS
DiscoverUserArea (
- IN SD_DEVICE *Device
+ IN SD_DEVICE *Device
)
{
- EFI_STATUS Status;
- SD_CSD *Csd;
- SD_CSD2 *Csd2;
- SD_CID *Cid;
- UINT64 Capacity;
- UINT32 DevStatus;
- UINT16 Rca;
- UINT32 CSize;
- UINT32 CSizeMul;
- UINT32 ReadBlLen;
+ EFI_STATUS Status;
+ SD_CSD *Csd;
+ SD_CSD2 *Csd2;
+ SD_CID *Cid;
+ UINT64 Capacity;
+ UINT32 DevStatus;
+ UINT16 Rca;
+ UINT32 CSize;
+ UINT32 CSizeMul;
+ UINT32 ReadBlLen;
//
// Deselect the device to force it enter stby mode.
@@ -210,6 +211,7 @@ DiscoverUserArea (
if (EFI_ERROR (Status)) {
return Status;
}
+
DumpCsd (Csd);
Cid = &Device->Cid;
@@ -217,6 +219,7 @@ DiscoverUserArea (
if (EFI_ERROR (Status)) {
return Status;
}
+
GetSdModelName (Device, Cid);
Status = SdSelect (Device, Rca);
@@ -232,15 +235,15 @@ DiscoverUserArea (
if (Csd->CsdStructure == 0) {
Device->SectorAddressing = FALSE;
- CSize = (Csd->CSizeHigh << 2 | Csd->CSizeLow) + 1;
- CSizeMul = (1 << (Csd->CSizeMul + 2));
- ReadBlLen = (1 << (Csd->ReadBlLen));
- Capacity = MultU64x32 (MultU64x32 ((UINT64)CSize, CSizeMul), ReadBlLen);
+ CSize = (Csd->CSizeHigh << 2 | Csd->CSizeLow) + 1;
+ CSizeMul = (1 << (Csd->CSizeMul + 2));
+ ReadBlLen = (1 << (Csd->ReadBlLen));
+ Capacity = MultU64x32 (MultU64x32 ((UINT64)CSize, CSizeMul), ReadBlLen);
} else {
Device->SectorAddressing = TRUE;
- Csd2 = (SD_CSD2*)(VOID*)Csd;
- CSize = (Csd2->CSizeHigh << 16 | Csd2->CSizeLow) + 1;
- Capacity = MultU64x32 ((UINT64)CSize, SIZE_512KB);
+ Csd2 = (SD_CSD2 *)(VOID *)Csd;
+ CSize = (Csd2->CSizeHigh << 16 | Csd2->CSizeLow) + 1;
+ Capacity = MultU64x32 ((UINT64)CSize, SIZE_512KB);
}
Device->BlockIo.Media = &Device->BlockMedia;
@@ -279,23 +282,23 @@ DiscoverUserArea (
EFI_STATUS
EFIAPI
DiscoverSdDevice (
- IN SD_DRIVER_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN SD_DRIVER_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- EFI_STATUS Status;
- SD_DEVICE *Device;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
- EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
- EFI_HANDLE DeviceHandle;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_STATUS Status;
+ SD_DEVICE *Device;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath;
+ EFI_HANDLE DeviceHandle;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
Device = NULL;
DevicePath = NULL;
NewDevicePath = NULL;
RemainingDevicePath = NULL;
- PassThru = Private->PassThru;
+ PassThru = Private->PassThru;
//
// Build Device Path
@@ -305,7 +308,7 @@ DiscoverSdDevice (
Slot,
&DevicePath
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
return Status;
}
@@ -324,10 +327,10 @@ DiscoverSdDevice (
goto Error;
}
- DeviceHandle = NULL;
+ DeviceHandle = NULL;
RemainingDevicePath = NewDevicePath;
- Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
- if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd(RemainingDevicePath)) {
+ Status = gBS->LocateDevicePath (&gEfiDevicePathProtocolGuid, &RemainingDevicePath, &DeviceHandle);
+ if (!EFI_ERROR (Status) && (DeviceHandle != NULL) && IsDevicePathEnd (RemainingDevicePath)) {
//
// The device has been started, directly return to fast boot.
//
@@ -353,7 +356,7 @@ DiscoverSdDevice (
// Expose user area in the Sd memory card to upper layer.
//
Status = DiscoverUserArea (Device);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
goto Error;
}
@@ -392,7 +395,7 @@ DiscoverSdDevice (
gBS->OpenProtocol (
Private->Controller,
&gEfiSdMmcPassThruProtocolGuid,
- (VOID **) &(Private->PassThru),
+ (VOID **)&(Private->PassThru),
Private->DriverBindingHandle,
Device->Handle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -458,15 +461,15 @@ Error:
EFI_STATUS
EFIAPI
SdDxeDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT8 Slot;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ UINT8 Slot;
//
// Test EFI_SD_MMC_PASS_THRU_PROTOCOL on the controller handle.
@@ -474,7 +477,7 @@ SdDxeDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiSdMmcPassThruProtocolGuid,
- (VOID**) &PassThru,
+ (VOID **)&PassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -523,7 +526,7 @@ SdDxeDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -569,27 +572,27 @@ SdDxeDriverBindingSupported (
EFI_STATUS
EFIAPI
SdDxeDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- SD_DRIVER_PRIVATE_DATA *Private;
- UINT8 Slot;
+ EFI_STATUS Status;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ SD_DRIVER_PRIVATE_DATA *Private;
+ UINT8 Slot;
Private = NULL;
PassThru = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- (VOID **) &PassThru,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ (VOID **)&PassThru,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if ((EFI_ERROR (Status)) && (Status != EFI_ALREADY_STARTED)) {
return Status;
}
@@ -607,7 +610,7 @@ SdDxeDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -631,7 +634,7 @@ SdDxeDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &Private,
+ (VOID **)&Private,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -676,14 +679,15 @@ Error:
if (Private != NULL) {
gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiCallerIdGuid,
- Private,
- NULL
- );
+ Controller,
+ &gEfiCallerIdGuid,
+ Private,
+ NULL
+ );
FreePool (Private);
}
}
+
return Status;
}
@@ -716,30 +720,30 @@ Error:
EFI_STATUS
EFIAPI
SdDxeDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- BOOLEAN AllChildrenStopped;
- UINTN Index;
- SD_DRIVER_PRIVATE_DATA *Private;
- SD_DEVICE *Device;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_BLOCK_IO2_PROTOCOL *BlockIo2;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_REQUEST *Request;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ BOOLEAN AllChildrenStopped;
+ UINTN Index;
+ SD_DRIVER_PRIVATE_DATA *Private;
+ SD_DEVICE *Device;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_BLOCK_IO2_PROTOCOL *BlockIo2;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NextLink;
+ SD_REQUEST *Request;
+ EFI_TPL OldTpl;
if (NumberOfChildren == 0) {
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &Private,
+ (VOID **)&Private,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -749,16 +753,16 @@ SdDxeDriverBindingStop (
}
gBS->UninstallProtocolInterface (
- Controller,
- &gEfiCallerIdGuid,
- Private
- );
+ Controller,
+ &gEfiCallerIdGuid,
+ Private
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
FreePool (Private);
@@ -770,19 +774,19 @@ SdDxeDriverBindingStop (
for (Index = 0; Index < NumberOfChildren; Index++) {
BlockIo = NULL;
BlockIo2 = NULL;
- Status = gBS->OpenProtocol (
- ChildHandleBuffer[Index],
- &gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
+ Status = gBS->OpenProtocol (
+ ChildHandleBuffer[Index],
+ &gEfiBlockIoProtocolGuid,
+ (VOID **)&BlockIo,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
if (EFI_ERROR (Status)) {
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiBlockIo2ProtocolGuid,
- (VOID **) &BlockIo2,
+ (VOID **)&BlockIo2,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -806,7 +810,8 @@ SdDxeDriverBindingStop (
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
for (Link = GetFirstNode (&Device->Queue);
!IsNull (&Device->Queue, Link);
- Link = NextLink) {
+ Link = NextLink)
+ {
NextLink = GetNextNode (&Device->Queue, Link);
RemoveEntryList (Link);
@@ -821,6 +826,7 @@ SdDxeDriverBindingStop (
FreePool (Request);
}
+
gBS->RestoreTPL (OldTpl);
//
@@ -849,14 +855,14 @@ SdDxeDriverBindingStop (
);
if (EFI_ERROR (Status)) {
AllChildrenStopped = FALSE;
- gBS->OpenProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- (VOID **)&PassThru,
- This->DriverBindingHandle,
- ChildHandleBuffer[Index],
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
- );
+ gBS->OpenProtocol (
+ Controller,
+ &gEfiSdMmcPassThruProtocolGuid,
+ (VOID **)&PassThru,
+ This->DriverBindingHandle,
+ ChildHandleBuffer[Index],
+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
+ );
} else {
FreePool (Device->DevicePath);
FreeUnicodeStringTable (Device->ControllerNameTable);
@@ -884,11 +890,11 @@ SdDxeDriverBindingStop (
EFI_STATUS
EFIAPI
InitializeSdDxe (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
diff --git a/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.h b/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.h
index ff740a5218..8d95f278cd 100644
--- a/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.h
+++ b/MdeModulePkg/Bus/Sd/SdDxe/SdDxe.h
@@ -39,11 +39,11 @@
//
// Global Variables
//
-extern EFI_DRIVER_BINDING_PROTOCOL gSdDxeDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gSdDxeComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gSdDxeComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gSdDxeDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gSdDxeComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gSdDxeComponentName2;
-#define SD_DEVICE_SIGNATURE SIGNATURE_32 ('S', 'D', 't', 'f')
+#define SD_DEVICE_SIGNATURE SIGNATURE_32 ('S', 'D', 't', 'f')
#define SD_DEVICE_DATA_FROM_BLKIO(a) \
CR(a, SD_DEVICE, BlockIo, SD_DEVICE_SIGNATURE)
@@ -60,11 +60,11 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gSdDxeComponentName2;
//
// Take 2.5 seconds as generic time out value, 1 microsecond as unit.
//
-#define SD_GENERIC_TIMEOUT 2500 * 1000
+#define SD_GENERIC_TIMEOUT 2500 * 1000
-#define SD_REQUEST_SIGNATURE SIGNATURE_32 ('S', 'D', 'R', 'E')
+#define SD_REQUEST_SIGNATURE SIGNATURE_32 ('S', 'D', 'R', 'E')
-#define SD_MODEL_NAME_MAX_LEN 32
+#define SD_MODEL_NAME_MAX_LEN 32
typedef struct _SD_DEVICE SD_DEVICE;
typedef struct _SD_DRIVER_PRIVATE_DATA SD_DRIVER_PRIVATE_DATA;
@@ -73,40 +73,40 @@ typedef struct _SD_DRIVER_PRIVATE_DATA SD_DRIVER_PRIVATE_DATA;
// Asynchronous I/O request.
//
typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
+ UINT32 Signature;
+ LIST_ENTRY Link;
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
+ EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
+ EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- BOOLEAN IsEnd;
+ BOOLEAN IsEnd;
- EFI_BLOCK_IO2_TOKEN *Token;
+ EFI_BLOCK_IO2_TOKEN *Token;
- EFI_EVENT Event;
+ EFI_EVENT Event;
} SD_REQUEST;
#define SD_REQUEST_FROM_LINK(a) \
CR(a, SD_REQUEST, Link, SD_REQUEST_SIGNATURE)
struct _SD_DEVICE {
- UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- UINT8 Slot;
- BOOLEAN SectorAddressing;
- EFI_BLOCK_IO_PROTOCOL BlockIo;
- EFI_BLOCK_IO2_PROTOCOL BlockIo2;
- EFI_BLOCK_IO_MEDIA BlockMedia;
- EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
- EFI_DISK_INFO_PROTOCOL DiskInfo;
-
- LIST_ENTRY Queue;
-
- SD_CSD Csd;
- SD_CID Cid;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ UINT32 Signature;
+ EFI_HANDLE Handle;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT8 Slot;
+ BOOLEAN SectorAddressing;
+ EFI_BLOCK_IO_PROTOCOL BlockIo;
+ EFI_BLOCK_IO2_PROTOCOL BlockIo2;
+ EFI_BLOCK_IO_MEDIA BlockMedia;
+ EFI_ERASE_BLOCK_PROTOCOL EraseBlock;
+ EFI_DISK_INFO_PROTOCOL DiskInfo;
+
+ LIST_ENTRY Queue;
+
+ SD_CSD Csd;
+ SD_CID Cid;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
//
// The model name consists of three fields in CID register
// 1) OEM/Application ID (2 bytes)
@@ -114,19 +114,19 @@ struct _SD_DEVICE {
// 3) Product Serial Number (4 bytes)
// The delimiters of these fields are whitespace.
//
- CHAR16 ModelName[SD_MODEL_NAME_MAX_LEN];
- SD_DRIVER_PRIVATE_DATA *Private;
-} ;
+ CHAR16 ModelName[SD_MODEL_NAME_MAX_LEN];
+ SD_DRIVER_PRIVATE_DATA *Private;
+};
//
// SD DXE driver private data structure
//
struct _SD_DRIVER_PRIVATE_DATA {
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- EFI_HANDLE Controller;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_HANDLE DriverBindingHandle;
-} ;
+ EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
+ EFI_HANDLE Controller;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_HANDLE DriverBindingHandle;
+};
/**
Tests to see if this driver supports a given controller. If a child device is provided,
@@ -173,9 +173,9 @@ struct _SD_DRIVER_PRIVATE_DATA {
EFI_STATUS
EFIAPI
SdDxeDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -216,9 +216,9 @@ SdDxeDriverBindingSupported (
EFI_STATUS
EFIAPI
SdDxeDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -250,10 +250,10 @@ SdDxeDriverBindingStart (
EFI_STATUS
EFIAPI
SdDxeDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -374,11 +374,11 @@ SdDxeComponentNameGetDriverName (
EFI_STATUS
EFIAPI
SdDxeComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -394,8 +394,8 @@ SdDxeComponentNameGetControllerName (
**/
EFI_STATUS
SdSetRca (
- IN SD_DEVICE *Device,
- OUT UINT16 *Rca
+ IN SD_DEVICE *Device,
+ OUT UINT16 *Rca
);
/**
@@ -411,8 +411,8 @@ SdSetRca (
**/
EFI_STATUS
SdSelect (
- IN SD_DEVICE *Device,
- IN UINT16 Rca
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca
);
/**
@@ -428,9 +428,9 @@ SdSelect (
**/
EFI_STATUS
SdSendStatus (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT UINT32 *DevStatus
);
/**
@@ -447,9 +447,9 @@ SdSendStatus (
**/
EFI_STATUS
SdGetCsd (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT SD_CSD *Csd
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT SD_CSD *Csd
);
/**
@@ -466,10 +466,9 @@ SdGetCsd (
**/
EFI_STATUS
SdGetCid (
- IN SD_DEVICE *Device,
- IN UINT16 Rca,
- OUT SD_CID *Cid
+ IN SD_DEVICE *Device,
+ IN UINT16 Rca,
+ OUT SD_CID *Cid
);
#endif
-
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/DmaMem.c b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/DmaMem.c
index 61378a63cd..62aeaf86c8 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/DmaMem.c
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/DmaMem.c
@@ -32,11 +32,11 @@ EDKII_IOMMU_PPI *mIoMmu;
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -54,23 +54,25 @@ IoMmuMap (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -81,9 +83,10 @@ IoMmuMap (
}
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,7 +101,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -109,6 +112,7 @@ IoMmuUnmap (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -142,7 +146,7 @@ IoMmuAllocateBuffer (
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
if (mIoMmu != NULL) {
@@ -157,18 +161,19 @@ IoMmuAllocateBuffer (
return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -186,10 +191,12 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -207,9 +214,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -221,6 +228,7 @@ IoMmuFreeBuffer (
} else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -239,4 +247,3 @@ IoMmuInit (
(VOID **)&mIoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.c b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.c
index 4664187291..b331c0f3e3 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.c
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.c
@@ -10,7 +10,7 @@
//
// Template for UFS HC Peim Private Data.
//
-UFS_PEIM_HC_PRIVATE_DATA gUfsHcPeimTemplate = {
+UFS_PEIM_HC_PRIVATE_DATA gUfsHcPeimTemplate = {
UFS_PEIM_HC_SIG, // Signature
NULL, // Controller
NULL, // Pool
@@ -131,8 +131,6 @@ UFS_PEIM_HC_PRIVATE_DATA gUfsHcPeimTemplate = {
}
};
-
-
/**
Execute TEST UNITY READY SCSI command on a specific UFS device.
@@ -148,20 +146,20 @@ UFS_PEIM_HC_PRIVATE_DATA gUfsHcPeimTemplate = {
**/
EFI_STATUS
UfsPeimTestUnitReady (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINTN Lun,
- OUT VOID *SenseData OPTIONAL,
- OUT UINT8 *SenseDataLength
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINTN Lun,
+ OUT VOID *SenseData OPTIONAL,
+ OUT UINT8 *SenseDataLength
)
{
- UFS_SCSI_REQUEST_PACKET Packet;
- UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIX];
- EFI_STATUS Status;
+ UFS_SCSI_REQUEST_PACKET Packet;
+ UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIX];
+ EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
- Cdb[0] = EFI_SCSI_OP_TEST_UNIT_READY;
+ Cdb[0] = EFI_SCSI_OP_TEST_UNIT_READY;
Packet.Timeout = UFS_TIMEOUT;
Packet.Cdb = Cdb;
@@ -170,7 +168,7 @@ UfsPeimTestUnitReady (
Packet.SenseData = SenseData;
Packet.SenseDataLength = *SenseDataLength;
- Status = UfsExecScsiCmds (Private,(UINT8)Lun, &Packet);
+ Status = UfsExecScsiCmds (Private, (UINT8)Lun, &Packet);
if (*SenseDataLength != 0) {
*SenseDataLength = Packet.SenseDataLength;
@@ -179,8 +177,6 @@ UfsPeimTestUnitReady (
return Status;
}
-
-
/**
Execute READ CAPACITY(10) SCSI command on a specific UFS device.
@@ -198,17 +194,17 @@ UfsPeimTestUnitReady (
**/
EFI_STATUS
UfsPeimReadCapacity (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINTN Lun,
- OUT VOID *DataBuffer,
- OUT UINT32 *DataLength,
- OUT VOID *SenseData OPTIONAL,
- OUT UINT8 *SenseDataLength
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINTN Lun,
+ OUT VOID *DataBuffer,
+ OUT UINT32 *DataLength,
+ OUT VOID *SenseData OPTIONAL,
+ OUT UINT8 *SenseDataLength
)
{
- UFS_SCSI_REQUEST_PACKET Packet;
- UINT8 Cdb[UFS_SCSI_OP_LENGTH_TEN];
- EFI_STATUS Status;
+ UFS_SCSI_REQUEST_PACKET Packet;
+ UINT8 Cdb[UFS_SCSI_OP_LENGTH_TEN];
+ EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
@@ -254,17 +250,17 @@ UfsPeimReadCapacity (
**/
EFI_STATUS
UfsPeimReadCapacity16 (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINTN Lun,
- OUT VOID *DataBuffer,
- OUT UINT32 *DataLength,
- OUT VOID *SenseData OPTIONAL,
- OUT UINT8 *SenseDataLength
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINTN Lun,
+ OUT VOID *DataBuffer,
+ OUT UINT32 *DataLength,
+ OUT VOID *SenseData OPTIONAL,
+ OUT UINT8 *SenseDataLength
)
{
- UFS_SCSI_REQUEST_PACKET Packet;
- UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIXTEEN];
- EFI_STATUS Status;
+ UFS_SCSI_REQUEST_PACKET Packet;
+ UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIXTEEN];
+ EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
@@ -314,26 +310,26 @@ UfsPeimReadCapacity16 (
**/
EFI_STATUS
UfsPeimRead10 (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINTN Lun,
- IN UINTN StartLba,
- IN UINT32 SectorNum,
- OUT VOID *DataBuffer,
- OUT UINT32 *DataLength,
- OUT VOID *SenseData OPTIONAL,
- OUT UINT8 *SenseDataLength
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINTN Lun,
+ IN UINTN StartLba,
+ IN UINT32 SectorNum,
+ OUT VOID *DataBuffer,
+ OUT UINT32 *DataLength,
+ OUT VOID *SenseData OPTIONAL,
+ OUT UINT8 *SenseDataLength
)
{
- UFS_SCSI_REQUEST_PACKET Packet;
- UINT8 Cdb[UFS_SCSI_OP_LENGTH_TEN];
- EFI_STATUS Status;
+ UFS_SCSI_REQUEST_PACKET Packet;
+ UINT8 Cdb[UFS_SCSI_OP_LENGTH_TEN];
+ EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
Cdb[0] = EFI_SCSI_OP_READ10;
- WriteUnaligned32 ((UINT32 *)&Cdb[2], SwapBytes32 ((UINT32) StartLba));
- WriteUnaligned16 ((UINT16 *)&Cdb[7], SwapBytes16 ((UINT16) SectorNum));
+ WriteUnaligned32 ((UINT32 *)&Cdb[2], SwapBytes32 ((UINT32)StartLba));
+ WriteUnaligned16 ((UINT16 *)&Cdb[7], SwapBytes16 ((UINT16)SectorNum));
Packet.Timeout = UFS_TIMEOUT;
Packet.Cdb = Cdb;
@@ -376,19 +372,19 @@ UfsPeimRead10 (
**/
EFI_STATUS
UfsPeimRead16 (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINTN Lun,
- IN UINTN StartLba,
- IN UINT32 SectorNum,
- OUT VOID *DataBuffer,
- OUT UINT32 *DataLength,
- OUT VOID *SenseData OPTIONAL,
- OUT UINT8 *SenseDataLength
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINTN Lun,
+ IN UINTN StartLba,
+ IN UINT32 SectorNum,
+ OUT VOID *DataBuffer,
+ OUT UINT32 *DataLength,
+ OUT VOID *SenseData OPTIONAL,
+ OUT UINT8 *SenseDataLength
)
{
- UFS_SCSI_REQUEST_PACKET Packet;
- UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIXTEEN];
- EFI_STATUS Status;
+ UFS_SCSI_REQUEST_PACKET Packet;
+ UINT8 Cdb[UFS_SCSI_OP_LENGTH_SIXTEEN];
+ EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
@@ -432,28 +428,31 @@ UfsPeimRead16 (
**/
EFI_STATUS
UfsPeimParsingSenseKeys (
- IN EFI_PEI_BLOCK_IO2_MEDIA *Media,
- IN EFI_SCSI_SENSE_DATA *SenseData,
- OUT BOOLEAN *NeedRetry
+ IN EFI_PEI_BLOCK_IO2_MEDIA *Media,
+ IN EFI_SCSI_SENSE_DATA *SenseData,
+ OUT BOOLEAN *NeedRetry
)
{
if ((SenseData->Sense_Key == EFI_SCSI_SK_NOT_READY) &&
- (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_NO_MEDIA)) {
+ (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_NO_MEDIA))
+ {
Media->MediaPresent = FALSE;
- *NeedRetry = FALSE;
+ *NeedRetry = FALSE;
DEBUG ((DEBUG_VERBOSE, "UfsBlockIoPei: Is No Media\n"));
return EFI_DEVICE_ERROR;
}
if ((SenseData->Sense_Key == EFI_SCSI_SK_UNIT_ATTENTION) &&
- (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_CHANGE)) {
+ (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_CHANGE))
+ {
*NeedRetry = TRUE;
DEBUG ((DEBUG_VERBOSE, "UfsBlockIoPei: Is Media Change\n"));
return EFI_SUCCESS;
}
if ((SenseData->Sense_Key == EFI_SCSI_SK_UNIT_ATTENTION) &&
- (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_RESET)) {
+ (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_RESET))
+ {
*NeedRetry = TRUE;
DEBUG ((DEBUG_VERBOSE, "UfsBlockIoPei: Was Reset Before\n"));
return EFI_SUCCESS;
@@ -461,7 +460,8 @@ UfsPeimParsingSenseKeys (
if ((SenseData->Sense_Key == EFI_SCSI_SK_MEDIUM_ERROR) ||
((SenseData->Sense_Key == EFI_SCSI_SK_NOT_READY) &&
- (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_UPSIDE_DOWN))) {
+ (SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_MEDIA_UPSIDE_DOWN)))
+ {
*NeedRetry = FALSE;
DEBUG ((DEBUG_VERBOSE, "UfsBlockIoPei: Media Error\n"));
return EFI_DEVICE_ERROR;
@@ -475,7 +475,8 @@ UfsPeimParsingSenseKeys (
if ((SenseData->Sense_Key == EFI_SCSI_SK_NOT_READY) &&
(SenseData->Addnl_Sense_Code == EFI_SCSI_ASC_NOT_READY) &&
- (SenseData->Addnl_Sense_Code_Qualifier == EFI_SCSI_ASCQ_IN_PROGRESS)) {
+ (SenseData->Addnl_Sense_Code_Qualifier == EFI_SCSI_ASCQ_IN_PROGRESS))
+ {
*NeedRetry = TRUE;
DEBUG ((DEBUG_VERBOSE, "UfsBlockIoPei: Was Reset Before\n"));
return EFI_SUCCESS;
@@ -486,7 +487,6 @@ UfsPeimParsingSenseKeys (
return EFI_DEVICE_ERROR;
}
-
/**
Gets the count of block I/O devices that one specific block driver detects.
@@ -573,15 +573,15 @@ UfsBlockIoPeimGetMediaInfo (
OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- UFS_PEIM_HC_PRIVATE_DATA *Private;
- EFI_SCSI_SENSE_DATA SenseData;
- UINT8 SenseDataLength;
- EFI_SCSI_DISK_CAPACITY_DATA Capacity;
- EFI_SCSI_DISK_CAPACITY_DATA16 Capacity16;
- UINTN DataLength;
- BOOLEAN NeedRetry;
- UINTN Lun;
+ EFI_STATUS Status;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_SCSI_SENSE_DATA SenseData;
+ UINT8 SenseDataLength;
+ EFI_SCSI_DISK_CAPACITY_DATA Capacity;
+ EFI_SCSI_DISK_CAPACITY_DATA16 Capacity16;
+ UINTN DataLength;
+ BOOLEAN NeedRetry;
+ UINTN Lun;
Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
NeedRetry = TRUE;
@@ -621,30 +621,31 @@ UfsBlockIoPeimGetMediaInfo (
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
-
} while (NeedRetry);
DataLength = sizeof (EFI_SCSI_DISK_CAPACITY_DATA);
SenseDataLength = 0;
- Status = UfsPeimReadCapacity (Private, Lun, &Capacity, (UINT32 *)&DataLength, NULL, &SenseDataLength);
+ Status = UfsPeimReadCapacity (Private, Lun, &Capacity, (UINT32 *)&DataLength, NULL, &SenseDataLength);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
if ((Capacity.LastLba3 == 0xff) && (Capacity.LastLba2 == 0xff) &&
- (Capacity.LastLba1 == 0xff) && (Capacity.LastLba0 == 0xff)) {
+ (Capacity.LastLba1 == 0xff) && (Capacity.LastLba0 == 0xff))
+ {
DataLength = sizeof (EFI_SCSI_DISK_CAPACITY_DATA16);
SenseDataLength = 0;
- Status = UfsPeimReadCapacity16 (Private, Lun, &Capacity16, (UINT32 *)&DataLength, NULL, &SenseDataLength);
+ Status = UfsPeimReadCapacity16 (Private, Lun, &Capacity16, (UINT32 *)&DataLength, NULL, &SenseDataLength);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
+
Private->Media[Lun].LastBlock = ((UINT32)Capacity16.LastLba3 << 24) | (Capacity16.LastLba2 << 16) | (Capacity16.LastLba1 << 8) | Capacity16.LastLba0;
- Private->Media[Lun].LastBlock |= LShiftU64 ((UINT64)Capacity16.LastLba7, 56) | LShiftU64((UINT64)Capacity16.LastLba6, 48) | LShiftU64 ((UINT64)Capacity16.LastLba5, 40) | LShiftU64 ((UINT64)Capacity16.LastLba4, 32);
+ Private->Media[Lun].LastBlock |= LShiftU64 ((UINT64)Capacity16.LastLba7, 56) | LShiftU64 ((UINT64)Capacity16.LastLba6, 48) | LShiftU64 ((UINT64)Capacity16.LastLba5, 40) | LShiftU64 ((UINT64)Capacity16.LastLba4, 32);
Private->Media[Lun].BlockSize = (Capacity16.BlockSize3 << 24) | (Capacity16.BlockSize2 << 16) | (Capacity16.BlockSize1 << 8) | Capacity16.BlockSize0;
} else {
- Private->Media[Lun].LastBlock = ((UINT32)Capacity.LastLba3 << 24) | (Capacity.LastLba2 << 16) | (Capacity.LastLba1 << 8) | Capacity.LastLba0;
- Private->Media[Lun].BlockSize = (Capacity.BlockSize3 << 24) | (Capacity.BlockSize2 << 16) | (Capacity.BlockSize1 << 8) | Capacity.BlockSize0;
+ Private->Media[Lun].LastBlock = ((UINT32)Capacity.LastLba3 << 24) | (Capacity.LastLba2 << 16) | (Capacity.LastLba1 << 8) | Capacity.LastLba0;
+ Private->Media[Lun].BlockSize = (Capacity.BlockSize3 << 24) | (Capacity.BlockSize2 << 16) | (Capacity.BlockSize1 << 8) | Capacity.BlockSize0;
}
MediaInfo->DeviceType = UfsDevice;
@@ -700,14 +701,14 @@ UfsBlockIoPeimReadBlocks (
OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- UINTN BlockSize;
- UINTN NumberOfBlocks;
- UFS_PEIM_HC_PRIVATE_DATA *Private;
- EFI_SCSI_SENSE_DATA SenseData;
- UINT8 SenseDataLength;
- BOOLEAN NeedRetry;
- UINTN Lun;
+ EFI_STATUS Status;
+ UINTN BlockSize;
+ UINTN NumberOfBlocks;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_SCSI_SENSE_DATA SenseData;
+ UINT8 SenseDataLength;
+ BOOLEAN NeedRetry;
+ UINTN Lun;
Status = EFI_SUCCESS;
NeedRetry = TRUE;
@@ -767,7 +768,6 @@ UfsBlockIoPeimReadBlocks (
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
-
} while (NeedRetry);
SenseDataLength = 0;
@@ -794,6 +794,7 @@ UfsBlockIoPeimReadBlocks (
&SenseDataLength
);
}
+
return Status;
}
@@ -819,9 +820,9 @@ UfsBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
UfsBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
//
@@ -877,25 +878,25 @@ UfsBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
UfsBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- UFS_PEIM_HC_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
- UINTN Lun;
-
- Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
-
- Status = UfsBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ EFI_STATUS Status;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
+ UINTN Lun;
+
+ Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+
+ Status = UfsBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -942,28 +943,28 @@ UfsBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
UfsBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- UFS_PEIM_HC_PRIVATE_DATA *Private;
-
- Status = EFI_SUCCESS;
- Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
-
- Status = UfsBlockIoPeimReadBlocks (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- StartLBA,
- BufferSize,
- Buffer
- );
+ EFI_STATUS Status;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
+
+ Status = EFI_SUCCESS;
+ Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+
+ Status = UfsBlockIoPeimReadBlocks (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ StartLBA,
+ BufferSize,
+ Buffer
+ );
return Status;
}
@@ -986,7 +987,7 @@ UfsEndOfPei (
IN VOID *Ppi
)
{
- UFS_PEIM_HC_PRIVATE_DATA *Private;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -1028,17 +1029,17 @@ UfsEndOfPei (
EFI_STATUS
EFIAPI
InitializeUfsBlockIoPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- UFS_PEIM_HC_PRIVATE_DATA *Private;
- EDKII_UFS_HOST_CONTROLLER_PPI *UfsHcPpi;
- UINT32 Index;
- UFS_CONFIG_DESC Config;
- UINTN MmioBase;
- UINT8 Controller;
+ EFI_STATUS Status;
+ UFS_PEIM_HC_PRIVATE_DATA *Private;
+ EDKII_UFS_HOST_CONTROLLER_PPI *UfsHcPpi;
+ UINT32 Index;
+ UFS_CONFIG_DESC Config;
+ UINTN MmioBase;
+ UINT8 Controller;
//
// Shadow this PEIM to run from memory
@@ -1054,7 +1055,7 @@ InitializeUfsBlockIoPeim (
&gEdkiiPeiUfsHostControllerPpiGuid,
0,
NULL,
- (VOID **) &UfsHcPpi
+ (VOID **)&UfsHcPpi
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.h b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.h
index 6e2305aa2b..a0b615b7ea 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.h
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsBlockIoPei.h
@@ -29,14 +29,14 @@
#include "UfsHci.h"
#include "UfsHcMem.h"
-#define UFS_PEIM_HC_SIG SIGNATURE_32 ('U', 'F', 'S', 'H')
+#define UFS_PEIM_HC_SIG SIGNATURE_32 ('U', 'F', 'S', 'H')
-#define UFS_PEIM_MAX_LUNS 8
+#define UFS_PEIM_MAX_LUNS 8
typedef struct {
- UINT8 Lun[UFS_PEIM_MAX_LUNS];
- UINT16 BitMask:12; // Bit 0~7 is for common luns. Bit 8~11 is reserved for those well known luns
- UINT16 Rsvd:4;
+ UINT8 Lun[UFS_PEIM_MAX_LUNS];
+ UINT16 BitMask : 12; // Bit 0~7 is for common luns. Bit 8~11 is reserved for those well known luns
+ UINT16 Rsvd : 4;
} UFS_PEIM_EXPOSED_LUNS;
typedef struct {
@@ -48,52 +48,52 @@ typedef struct {
/// EFI_TIMEOUT if the time required to execute the SCSI
/// Request Packet is greater than Timeout.
///
- UINT64 Timeout;
+ UINT64 Timeout;
///
/// A pointer to the data buffer to transfer between the SCSI
/// controller and the SCSI device for read and bidirectional commands.
///
- VOID *InDataBuffer;
+ VOID *InDataBuffer;
///
/// A pointer to the data buffer to transfer between the SCSI
/// controller and the SCSI device for write or bidirectional commands.
///
- VOID *OutDataBuffer;
+ VOID *OutDataBuffer;
///
/// A pointer to the sense data that was generated by the execution of
/// the SCSI Request Packet.
///
- VOID *SenseData;
+ VOID *SenseData;
///
/// A pointer to buffer that contains the Command Data Block to
/// send to the SCSI device specified by Target and Lun.
///
- VOID *Cdb;
+ VOID *Cdb;
///
/// On Input, the size, in bytes, of InDataBuffer. On output, the
/// number of bytes transferred between the SCSI controller and the SCSI device.
///
- UINT32 InTransferLength;
+ UINT32 InTransferLength;
///
/// On Input, the size, in bytes of OutDataBuffer. On Output, the
/// Number of bytes transferred between SCSI Controller and the SCSI device.
///
- UINT32 OutTransferLength;
+ UINT32 OutTransferLength;
///
/// The length, in bytes, of the buffer Cdb. The standard values are 6,
/// 10, 12, and 16, but other values are possible if a variable length CDB is used.
///
- UINT8 CdbLength;
+ UINT8 CdbLength;
///
/// The direction of the data transfer. 0 for reads, 1 for writes. A
/// value of 2 is Reserved for Bi-Directional SCSI commands.
///
- UINT8 DataDirection;
+ UINT8 DataDirection;
///
/// On input, the length in bytes of the SenseData buffer. On
/// output, the number of bytes written to the SenseData buffer.
///
- UINT8 SenseDataLength;
+ UINT8 SenseDataLength;
} UFS_SCSI_REQUEST_PACKET;
typedef struct _UFS_PEIM_HC_PRIVATE_DATA {
@@ -129,32 +129,32 @@ typedef struct _UFS_PEIM_HC_PRIVATE_DATA {
UFS_PEIM_EXPOSED_LUNS Luns;
} UFS_PEIM_HC_PRIVATE_DATA;
-#define UFS_TIMEOUT MultU64x32((UINT64)(3), 10000000)
+#define UFS_TIMEOUT MultU64x32((UINT64)(3), 10000000)
-#define ROUNDUP8(x) (((x) % 8 == 0) ? (x) : ((x) / 8 + 1) * 8)
+#define ROUNDUP8(x) (((x) % 8 == 0) ? (x) : ((x) / 8 + 1) * 8)
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
-#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIoPpi, UFS_PEIM_HC_SIG)
-#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, UFS_PEIM_HC_SIG)
-#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, UFS_PEIM_HC_SIG)
+#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIoPpi, UFS_PEIM_HC_SIG)
+#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, UFS_PEIM_HC_SIG)
+#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, UFS_PEIM_HC_SIG)
#define UFS_SCSI_OP_LENGTH_SIX 0x6
#define UFS_SCSI_OP_LENGTH_TEN 0xa
#define UFS_SCSI_OP_LENGTH_SIXTEEN 0x10
typedef struct _UFS_DEVICE_MANAGEMENT_REQUEST_PACKET {
- UINT64 Timeout;
- VOID *InDataBuffer;
- VOID *OutDataBuffer;
- UINT8 Opcode;
- UINT8 DescId;
- UINT8 Index;
- UINT8 Selector;
- UINT32 InTransferLength;
- UINT32 OutTransferLength;
- UINT8 DataDirection;
- UINT8 Ocs;
+ UINT64 Timeout;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ UINT8 Opcode;
+ UINT8 DescId;
+ UINT8 Index;
+ UINT8 Selector;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
+ UINT8 DataDirection;
+ UINT8 Ocs;
} UFS_DEVICE_MANAGEMENT_REQUEST_PACKET;
/**
@@ -178,9 +178,9 @@ typedef struct _UFS_DEVICE_MANAGEMENT_REQUEST_PACKET {
**/
EFI_STATUS
UfsExecScsiCmds (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 Lun,
- IN OUT UFS_SCSI_REQUEST_PACKET *Packet
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 Lun,
+ IN OUT UFS_SCSI_REQUEST_PACKET *Packet
);
/**
@@ -194,7 +194,7 @@ UfsExecScsiCmds (
**/
EFI_STATUS
UfsControllerInit (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -208,7 +208,7 @@ UfsControllerInit (
**/
EFI_STATUS
UfsControllerStop (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -224,8 +224,8 @@ UfsControllerStop (
**/
EFI_STATUS
UfsSetFlag (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 FlagId
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 FlagId
);
/**
@@ -246,13 +246,13 @@ UfsSetFlag (
**/
EFI_STATUS
UfsRwDeviceDesc (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT VOID *Descriptor,
- IN UINT32 DescSize
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT VOID *Descriptor,
+ IN UINT32 DescSize
);
/**
@@ -270,7 +270,7 @@ UfsRwDeviceDesc (
**/
EFI_STATUS
UfsExecNopCmds (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -417,9 +417,9 @@ UfsBlockIoPeimReadBlocks (
EFI_STATUS
EFIAPI
UfsBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -466,10 +466,10 @@ UfsBlockIoPeimGetDeviceNo2 (
EFI_STATUS
EFIAPI
UfsBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -509,12 +509,12 @@ UfsBlockIoPeimGetMediaInfo2 (
EFI_STATUS
EFIAPI
UfsBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -528,7 +528,7 @@ UfsBlockIoPeimReadBlocks2 (
**/
EFI_STATUS
UfsPeimInitMemPool (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -542,7 +542,7 @@ UfsPeimInitMemPool (
**/
EFI_STATUS
UfsPeimFreeMemPool (
- IN UFS_PEIM_MEM_POOL *Pool
+ IN UFS_PEIM_MEM_POOL *Pool
);
/**
@@ -557,8 +557,8 @@ UfsPeimFreeMemPool (
**/
VOID *
UfsPeimAllocateMem (
- IN UFS_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN UFS_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
);
/**
@@ -571,9 +571,9 @@ UfsPeimAllocateMem (
**/
VOID
UfsPeimFreeMem (
- IN UFS_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN UFS_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -605,11 +605,11 @@ IoMmuInit (
**/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -623,7 +623,7 @@ IoMmuMap (
**/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -666,9 +666,9 @@ IoMmuAllocateBuffer (
**/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.c b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.c
index a4e731640d..b7dd9b6acd 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.c
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.c
@@ -18,25 +18,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UFS_PEIM_MEM_BLOCK *
UfsPeimAllocMemBlock (
- IN UINTN Pages
+ IN UINTN Pages
)
{
- UFS_PEIM_MEM_BLOCK *Block;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- EFI_STATUS Status;
- VOID *TempPtr;
+ UFS_PEIM_MEM_BLOCK *Block;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Block = NULL;
- Status = PeiServicesAllocatePool (sizeof(UFS_PEIM_MEM_BLOCK), &TempPtr);
+ Status = PeiServicesAllocatePool (sizeof (UFS_PEIM_MEM_BLOCK), &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof(UFS_PEIM_MEM_BLOCK));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (UFS_PEIM_MEM_BLOCK));
//
// each bit in the bit array represents UFS_PEIM_MEM_UNIT
@@ -44,18 +44,18 @@ UfsPeimAllocMemBlock (
//
ASSERT (UFS_PEIM_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (UFS_PEIM_MEM_BLOCK*)(UINTN)TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (UFS_PEIM_MEM_UNIT * 8);
+ Block = (UFS_PEIM_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (UFS_PEIM_MEM_UNIT * 8);
Status = PeiServicesAllocatePool (Block->BitsLen, &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, Block->BitsLen);
+ ZeroMem ((VOID *)(UINTN)TempPtr, Block->BitsLen);
- Block->Bits = (UINT8*)(UINTN)TempPtr;
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Pages,
@@ -67,10 +67,10 @@ UfsPeimAllocMemBlock (
return NULL;
}
- ZeroMem ((VOID*)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
+ ZeroMem ((VOID *)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
- Block->BufHost = (UINT8 *) (UINTN) BufHost;
- Block->Buf = (UINT8 *) (UINTN) MappedAddr;
+ Block->BufHost = (UINT8 *)(UINTN)BufHost;
+ Block->Buf = (UINT8 *)(UINTN)MappedAddr;
Block->Mapping = Mapping;
Block->Next = NULL;
@@ -86,8 +86,8 @@ UfsPeimAllocMemBlock (
**/
VOID
UfsPeimFreeMemBlock (
- IN UFS_PEIM_MEM_POOL *Pool,
- IN UFS_PEIM_MEM_BLOCK *Block
+ IN UFS_PEIM_MEM_POOL *Pool,
+ IN UFS_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -111,18 +111,18 @@ UfsPeimAllocMemFromBlock (
IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -138,13 +138,12 @@ UfsPeimAllocMemFromBlock (
}
UFS_PEIM_NEXT_BIT (Byte, Bit);
-
} else {
UFS_PEIM_NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -155,13 +154,13 @@ UfsPeimAllocMemFromBlock (
//
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!UFS_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) UFS_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)UFS_PEIM_MEM_BIT (Bit));
UFS_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -177,8 +176,8 @@ UfsPeimAllocMemFromBlock (
**/
VOID
UfsPeimInsertMemBlockToPool (
- IN UFS_PEIM_MEM_BLOCK *Head,
- IN UFS_PEIM_MEM_BLOCK *Block
+ IN UFS_PEIM_MEM_BLOCK *Head,
+ IN UFS_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -197,11 +196,10 @@ UfsPeimInsertMemBlockToPool (
**/
BOOLEAN
UfsPeimIsMemBlockEmpty (
- IN UFS_PEIM_MEM_BLOCK *Block
+ IN UFS_PEIM_MEM_BLOCK *Block
)
{
- UINTN Index;
-
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -212,8 +210,6 @@ UfsPeimIsMemBlockEmpty (
return TRUE;
}
-
-
/**
Initialize the memory management pool for the host controller.
@@ -228,9 +224,9 @@ UfsPeimInitMemPool (
IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- UFS_PEIM_MEM_POOL *Pool;
- EFI_STATUS Status;
- VOID *TempPtr;
+ UFS_PEIM_MEM_POOL *Pool;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Pool = NULL;
@@ -240,7 +236,7 @@ UfsPeimInitMemPool (
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof (UFS_PEIM_MEM_POOL));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (UFS_PEIM_MEM_POOL));
Pool = (UFS_PEIM_MEM_POOL *)((UINTN)TempPtr);
@@ -265,10 +261,10 @@ UfsPeimInitMemPool (
**/
EFI_STATUS
UfsPeimFreeMemPool (
- IN UFS_PEIM_MEM_POOL *Pool
+ IN UFS_PEIM_MEM_POOL *Pool
)
{
- UFS_PEIM_MEM_BLOCK *Block;
+ UFS_PEIM_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -296,16 +292,16 @@ UfsPeimFreeMemPool (
**/
VOID *
UfsPeimAllocateMem (
- IN UFS_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN UFS_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- UFS_PEIM_MEM_BLOCK *Head;
- UFS_PEIM_MEM_BLOCK *Block;
- UFS_PEIM_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ UFS_PEIM_MEM_BLOCK *Head;
+ UFS_PEIM_MEM_BLOCK *Block;
+ UFS_PEIM_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = UFS_PEIM_MEM_ROUND (Size);
@@ -368,22 +364,22 @@ UfsPeimAllocateMem (
**/
VOID
UfsPeimFreeMem (
- IN UFS_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN UFS_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- UFS_PEIM_MEM_BLOCK *Head;
- UFS_PEIM_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ UFS_PEIM_MEM_BLOCK *Head;
+ UFS_PEIM_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = UFS_PEIM_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -394,8 +390,8 @@ UfsPeimFreeMem (
//
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / UFS_PEIM_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / UFS_PEIM_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / UFS_PEIM_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / UFS_PEIM_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -403,7 +399,7 @@ UfsPeimFreeMem (
for (Count = 0; Count < (AllocSize / UFS_PEIM_MEM_UNIT); Count++) {
ASSERT (UFS_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ UFS_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ UFS_PEIM_MEM_BIT (Bit));
UFS_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -425,5 +421,5 @@ UfsPeimFreeMem (
UfsPeimFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.h b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.h
index b47d05a1a5..6bde93765d 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.h
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHcMem.h
@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _UFS_PEIM_MEM_H_
#define _UFS_PEIM_MEM_H_
-#define UFS_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
+#define UFS_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
#define UFS_PEIM_MEM_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & UFS_PEIM_MEM_BIT(Bit)) == UFS_PEIM_MEM_BIT(Bit)))
@@ -17,23 +17,23 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef struct _UFS_PEIM_MEM_BLOCK UFS_PEIM_MEM_BLOCK;
struct _UFS_PEIM_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- UFS_PEIM_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ UFS_PEIM_MEM_BLOCK *Next;
};
typedef struct _UFS_PEIM_MEM_POOL {
- UFS_PEIM_MEM_BLOCK *Head;
+ UFS_PEIM_MEM_BLOCK *Head;
} UFS_PEIM_MEM_POOL;
//
// Memory allocation unit, note that the value must meet UFS spec alignment requirement.
//
-#define UFS_PEIM_MEM_UNIT 128
+#define UFS_PEIM_MEM_UNIT 128
#define UFS_PEIM_MEM_UNIT_MASK (UFS_PEIM_MEM_UNIT - 1)
#define UFS_PEIM_MEM_DEFAULT_PAGES 16
@@ -53,4 +53,3 @@ typedef struct _UFS_PEIM_MEM_POOL {
} while (0)
#endif
-
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.c b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.c
index 1e47eb7eaa..2baa57593e 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.c
@@ -22,15 +22,15 @@
EFI_STATUS
EFIAPI
UfsWaitMemSet (
- IN UINTN Address,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN UINTN Address,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
+ UINT32 Value;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -56,7 +56,6 @@ UfsWaitMemSet (
MicroSecondDelay (1);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -71,8 +70,8 @@ UfsWaitMemSet (
**/
VOID
DumpUicCmdExecResult (
- IN UINT8 UicOpcode,
- IN UINT8 Result
+ IN UINT8 UicOpcode,
+ IN UINT8 Result
)
{
if (UicOpcode <= UfsUicDmePeerSet) {
@@ -109,7 +108,7 @@ DumpUicCmdExecResult (
case 0x0A:
DEBUG ((DEBUG_VERBOSE, "UIC configuration command fails - DME_FAILURE\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -120,7 +119,7 @@ DumpUicCmdExecResult (
case 0x01:
DEBUG ((DEBUG_VERBOSE, "UIC control command fails - FAILURE\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -135,7 +134,7 @@ DumpUicCmdExecResult (
**/
VOID
DumpQueryResponseResult (
- IN UINT8 Result
+ IN UINT8 Result
)
{
switch (Result) {
@@ -169,7 +168,7 @@ DumpQueryResponseResult (
case 0xFF:
DEBUG ((DEBUG_VERBOSE, "Query Response with General Failure\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -185,18 +184,18 @@ DumpQueryResponseResult (
**/
VOID
SwapLittleEndianToBigEndian (
- IN OUT UINT8 *Buffer,
- IN UINT32 BufferSize
+ IN OUT UINT8 *Buffer,
+ IN UINT32 BufferSize
)
{
- UINT32 Index;
- UINT8 Temp;
- UINT32 SwapCount;
+ UINT32 Index;
+ UINT8 Temp;
+ UINT32 SwapCount;
SwapCount = BufferSize / 2;
for (Index = 0; Index < SwapCount; Index++) {
- Temp = Buffer[Index];
- Buffer[Index] = Buffer[BufferSize - 1 - Index];
+ Temp = Buffer[Index];
+ Buffer[Index] = Buffer[BufferSize - 1 - Index];
Buffer[BufferSize - 1 - Index] = Temp;
}
}
@@ -215,32 +214,32 @@ SwapLittleEndianToBigEndian (
**/
VOID
UfsFillTsfOfQueryReqUpiu (
- IN OUT UTP_UPIU_TSF *TsfBase,
- IN UINT8 Opcode,
- IN UINT8 DescId OPTIONAL,
- IN UINT8 Index OPTIONAL,
- IN UINT8 Selector OPTIONAL,
- IN UINT16 Length OPTIONAL,
- IN UINT32 Value OPTIONAL
+ IN OUT UTP_UPIU_TSF *TsfBase,
+ IN UINT8 Opcode,
+ IN UINT8 DescId OPTIONAL,
+ IN UINT8 Index OPTIONAL,
+ IN UINT8 Selector OPTIONAL,
+ IN UINT16 Length OPTIONAL,
+ IN UINT32 Value OPTIONAL
)
{
ASSERT (TsfBase != NULL);
ASSERT (Opcode <= UtpQueryFuncOpcodeTogFlag);
- TsfBase->Opcode = Opcode;
+ TsfBase->Opcode = Opcode;
if (Opcode != UtpQueryFuncOpcodeNop) {
TsfBase->DescId = DescId;
TsfBase->Index = Index;
TsfBase->Selector = Selector;
if ((Opcode == UtpQueryFuncOpcodeRdDesc) || (Opcode == UtpQueryFuncOpcodeWrDesc)) {
- SwapLittleEndianToBigEndian ((UINT8*)&Length, sizeof (Length));
+ SwapLittleEndianToBigEndian ((UINT8 *)&Length, sizeof (Length));
TsfBase->Length = Length;
}
if (Opcode == UtpQueryFuncOpcodeWrAttr) {
- SwapLittleEndianToBigEndian ((UINT8*)&Value, sizeof (Value));
- TsfBase->Value = Value;
+ SwapLittleEndianToBigEndian ((UINT8 *)&Value, sizeof (Value));
+ TsfBase->Value = Value;
}
}
}
@@ -261,16 +260,16 @@ UfsFillTsfOfQueryReqUpiu (
**/
EFI_STATUS
UfsInitCommandUpiu (
- IN OUT UTP_COMMAND_UPIU *Command,
- IN UINT8 Lun,
- IN UINT8 TaskTag,
- IN UINT8 *Cdb,
- IN UINT8 CdbLength,
- IN UFS_DATA_DIRECTION DataDirection,
- IN UINT32 ExpDataTranLen
+ IN OUT UTP_COMMAND_UPIU *Command,
+ IN UINT8 Lun,
+ IN UINT8 TaskTag,
+ IN UINT8 *Cdb,
+ IN UINT8 CdbLength,
+ IN UFS_DATA_DIRECTION DataDirection,
+ IN UINT32 ExpDataTranLen
)
{
- UINT8 Flags;
+ UINT8 Flags;
ASSERT ((Command != NULL) && (Cdb != NULL));
@@ -293,7 +292,7 @@ UfsInitCommandUpiu (
Command->Lun = Lun;
Command->TaskTag = TaskTag;
Command->CmdSet = 0x00;
- SwapLittleEndianToBigEndian ((UINT8*)&ExpDataTranLen, sizeof (ExpDataTranLen));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ExpDataTranLen, sizeof (ExpDataTranLen));
Command->ExpDataTranLen = ExpDataTranLen;
CopyMem (Command->Cdb, Cdb, CdbLength);
@@ -313,15 +312,15 @@ UfsInitCommandUpiu (
**/
EFI_STATUS
UfsInitUtpPrdt (
- IN UTP_TR_PRD *Prdt,
- IN VOID *Buffer,
- IN UINT32 BufferSize
+ IN UTP_TR_PRD *Prdt,
+ IN VOID *Buffer,
+ IN UINT32 BufferSize
)
{
- UINT32 PrdtIndex;
- UINT32 RemainingLen;
- UINT8 *Remaining;
- UINTN PrdtNumber;
+ UINT32 PrdtIndex;
+ UINT32 RemainingLen;
+ UINT8 *Remaining;
+ UINTN PrdtNumber;
if ((BufferSize & (BIT0 | BIT1)) != 0) {
BufferSize &= ~(BIT0 | BIT1);
@@ -347,8 +346,8 @@ UfsInitUtpPrdt (
Prdt[PrdtIndex].DbAddr = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 2);
Prdt[PrdtIndex].DbAddrU = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 32);
- RemainingLen -= UFS_MAX_DATA_LEN_PER_PRD;
- Remaining += UFS_MAX_DATA_LEN_PER_PRD;
+ RemainingLen -= UFS_MAX_DATA_LEN_PER_PRD;
+ Remaining += UFS_MAX_DATA_LEN_PER_PRD;
}
return EFI_SUCCESS;
@@ -371,14 +370,14 @@ UfsInitUtpPrdt (
**/
EFI_STATUS
UfsInitQueryRequestUpiu (
- IN OUT UTP_QUERY_REQ_UPIU *QueryReq,
- IN UINT8 TaskTag,
- IN UINT8 Opcode,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN UINTN DataSize OPTIONAL,
- IN UINT8 *Data OPTIONAL
+ IN OUT UTP_QUERY_REQ_UPIU *QueryReq,
+ IN UINT8 TaskTag,
+ IN UINT8 Opcode,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN UINTN DataSize OPTIONAL,
+ IN UINT8 *Data OPTIONAL
)
{
ASSERT (QueryReq != NULL);
@@ -392,7 +391,7 @@ UfsInitQueryRequestUpiu (
}
if (Opcode == UtpQueryFuncOpcodeWrAttr) {
- UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, 0, *(UINT32*)Data);
+ UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, 0, *(UINT32 *)Data);
} else if ((Opcode == UtpQueryFuncOpcodeRdDesc) || (Opcode == UtpQueryFuncOpcodeWrDesc)) {
UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, (UINT16)DataSize, 0);
} else {
@@ -402,7 +401,7 @@ UfsInitQueryRequestUpiu (
if (Opcode == UtpQueryFuncOpcodeWrDesc) {
CopyMem (QueryReq + 1, Data, DataSize);
- SwapLittleEndianToBigEndian ((UINT8*)&DataSize, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&DataSize, sizeof (UINT16));
QueryReq->DataSegLen = (UINT16)DataSize;
}
@@ -425,25 +424,25 @@ UfsInitQueryRequestUpiu (
**/
EFI_STATUS
UfsCreateScsiCommandDesc (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 Lun,
- IN UFS_SCSI_REQUEST_PACKET *Packet,
- IN UTP_TRD *Trd,
- OUT VOID **BufferMap
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 Lun,
+ IN UFS_SCSI_REQUEST_PACKET *Packet,
+ IN UTP_TRD *Trd,
+ OUT VOID **BufferMap
)
{
- UINT8 *CommandDesc;
- UINTN TotalLen;
- UINTN PrdtNumber;
- VOID *Buffer;
- UINT32 Length;
- UTP_COMMAND_UPIU *CommandUpiu;
- UTP_TR_PRD *PrdtBase;
- UFS_DATA_DIRECTION DataDirection;
- EFI_STATUS Status;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
- EFI_PHYSICAL_ADDRESS BufferPhyAddr;
+ UINT8 *CommandDesc;
+ UINTN TotalLen;
+ UINTN PrdtNumber;
+ VOID *Buffer;
+ UINT32 Length;
+ UTP_COMMAND_UPIU *CommandUpiu;
+ UTP_TR_PRD *PrdtBase;
+ UFS_DATA_DIRECTION DataDirection;
+ EFI_STATUS Status;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
+ EFI_PHYSICAL_ADDRESS BufferPhyAddr;
ASSERT ((Private != NULL) && (Packet != NULL) && (Trd != NULL));
@@ -455,8 +454,8 @@ UfsCreateScsiCommandDesc (
DataDirection = UfsDataIn;
MapOp = EdkiiIoMmuOperationBusMasterWrite;
} else {
- Buffer = Packet->OutDataBuffer;
- Length = Packet->OutTransferLength;
+ Buffer = Packet->OutDataBuffer;
+ Length = Packet->OutTransferLength;
DataDirection = UfsDataOut;
MapOp = EdkiiIoMmuOperationBusMasterRead;
}
@@ -465,7 +464,7 @@ UfsCreateScsiCommandDesc (
DataDirection = UfsNoData;
} else {
MapLength = Length;
- Status = IoMmuMap (MapOp, Buffer, &MapLength, &BufferPhyAddr, BufferMap);
+ Status = IoMmuMap (MapOp, Buffer, &MapLength, &BufferPhyAddr, BufferMap);
if (EFI_ERROR (Status) || (MapLength != Length)) {
DEBUG ((DEBUG_ERROR, "UfsCreateScsiCommandDesc: Fail to map data buffer.\n"));
@@ -481,11 +480,11 @@ UfsCreateScsiCommandDesc (
return EFI_OUT_OF_RESOURCES;
}
- CommandUpiu = (UTP_COMMAND_UPIU*)CommandDesc;
- PrdtBase = (UTP_TR_PRD*)(CommandDesc + ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)));
+ CommandUpiu = (UTP_COMMAND_UPIU *)CommandDesc;
+ PrdtBase = (UTP_TR_PRD *)(CommandDesc + ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)));
UfsInitCommandUpiu (CommandUpiu, Lun, Private->TaskTag++, Packet->Cdb, Packet->CdbLength, DataDirection, Length);
- UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)BufferPhyAddr, Length);
+ UfsInitUtpPrdt (PrdtBase, (VOID *)(UINTN)BufferPhyAddr, Length);
//
// Fill UTP_TRD associated fields
@@ -525,13 +524,13 @@ UfsCreateDMCommandDesc (
IN UTP_TRD *Trd
)
{
- UINT8 *CommandDesc;
- UINTN TotalLen;
- UTP_QUERY_REQ_UPIU *QueryReqUpiu;
- UINT8 Opcode;
- UINT32 DataSize;
- UINT8 *Data;
- UINT8 DataDirection;
+ UINT8 *CommandDesc;
+ UINTN TotalLen;
+ UTP_QUERY_REQ_UPIU *QueryReqUpiu;
+ UINT8 Opcode;
+ UINT32 DataSize;
+ UINT8 *Data;
+ UINT8 DataDirection;
ASSERT ((Private != NULL) && (Packet != NULL) && (Trd != NULL));
@@ -552,13 +551,15 @@ UfsCreateDMCommandDesc (
Data = NULL;
}
- if (((Opcode != UtpQueryFuncOpcodeSetFlag) && (Opcode != UtpQueryFuncOpcodeClrFlag) && (Opcode != UtpQueryFuncOpcodeTogFlag))
- && ((DataSize == 0) || (Data == NULL))) {
+ if ( ((Opcode != UtpQueryFuncOpcodeSetFlag) && (Opcode != UtpQueryFuncOpcodeClrFlag) && (Opcode != UtpQueryFuncOpcodeTogFlag))
+ && ((DataSize == 0) || (Data == NULL)))
+ {
return EFI_INVALID_PARAMETER;
}
- if (((Opcode == UtpQueryFuncOpcodeSetFlag) || (Opcode == UtpQueryFuncOpcodeClrFlag) || (Opcode == UtpQueryFuncOpcodeTogFlag))
- && ((DataSize != 0) || (Data != NULL))) {
+ if ( ((Opcode == UtpQueryFuncOpcodeSetFlag) || (Opcode == UtpQueryFuncOpcodeClrFlag) || (Opcode == UtpQueryFuncOpcodeTogFlag))
+ && ((DataSize != 0) || (Data != NULL)))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -580,7 +581,7 @@ UfsCreateDMCommandDesc (
//
// Initialize UTP QUERY REQUEST UPIU
//
- QueryReqUpiu = (UTP_QUERY_REQ_UPIU*)CommandDesc;
+ QueryReqUpiu = (UTP_QUERY_REQ_UPIU *)CommandDesc;
UfsInitQueryRequestUpiu (
QueryReqUpiu,
Private->TaskTag++,
@@ -603,11 +604,11 @@ UfsCreateDMCommandDesc (
Trd->UcdBa = (UINT32)RShiftU64 ((UINT64)(UINTN)QueryReqUpiu, 7);
Trd->UcdBaU = (UINT32)RShiftU64 ((UINT64)(UINTN)QueryReqUpiu, 32);
if (Opcode == UtpQueryFuncOpcodeWrDesc) {
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
} else {
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));
}
return EFI_SUCCESS;
@@ -626,13 +627,13 @@ UfsCreateDMCommandDesc (
**/
EFI_STATUS
UfsCreateNopCommandDesc (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UTP_TRD *Trd
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UTP_TRD *Trd
)
{
- UINT8 *CommandDesc;
- UINTN TotalLen;
- UTP_NOP_OUT_UPIU *NopOutUpiu;
+ UINT8 *CommandDesc;
+ UINTN TotalLen;
+ UTP_NOP_OUT_UPIU *NopOutUpiu;
ASSERT ((Private != NULL) && (Trd != NULL));
@@ -642,7 +643,7 @@ UfsCreateNopCommandDesc (
return EFI_OUT_OF_RESOURCES;
}
- NopOutUpiu = (UTP_NOP_OUT_UPIU*)CommandDesc;
+ NopOutUpiu = (UTP_NOP_OUT_UPIU *)CommandDesc;
NopOutUpiu->TaskTag = Private->TaskTag++;
@@ -673,8 +674,8 @@ UfsCreateNopCommandDesc (
**/
EFI_STATUS
UfsFindAvailableSlotInTrl (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- OUT UINT8 *Slot
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ OUT UINT8 *Slot
)
{
ASSERT ((Private != NULL) && (Slot != NULL));
@@ -688,8 +689,6 @@ UfsFindAvailableSlotInTrl (
return EFI_SUCCESS;
}
-
-
/**
Start specified slot in transfer list of a UFS device.
@@ -699,13 +698,13 @@ UfsFindAvailableSlotInTrl (
**/
VOID
UfsStartExecCmd (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- UINTN UfsHcBase;
- UINTN Address;
- UINT32 Data;
+ UINTN UfsHcBase;
+ UINTN Address;
+ UINT32 Data;
UfsHcBase = Private->UfsHcBase;
@@ -728,13 +727,13 @@ UfsStartExecCmd (
**/
VOID
UfsStopExecCmd (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- UINTN UfsHcBase;
- UINTN Address;
- UINT32 Data;
+ UINTN UfsHcBase;
+ UINTN Address;
+ UINT32 Data;
UfsHcBase = Private->UfsHcBase;
@@ -765,42 +764,43 @@ UfsStopExecCmd (
**/
EFI_STATUS
UfsRwDeviceDesc (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT VOID *Descriptor,
- IN UINT32 DescSize
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT VOID *Descriptor,
+ IN UINT32 DescSize
)
{
- EFI_STATUS Status;
- UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
- UINT8 Slot;
- UTP_TRD *Trd;
- UINTN Address;
- UTP_QUERY_RESP_UPIU *QueryResp;
- UINT8 *CmdDescBase;
- UINT32 CmdDescSize;
- UINT16 ReturnDataSize;
+ EFI_STATUS Status;
+ UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
+ UINT8 Slot;
+ UTP_TRD *Trd;
+ UINTN Address;
+ UTP_QUERY_RESP_UPIU *QueryResp;
+ UINT8 *CmdDescBase;
+ UINT32 CmdDescSize;
+ UINT16 ReturnDataSize;
ZeroMem (&Packet, sizeof (UFS_DEVICE_MANAGEMENT_REQUEST_PACKET));
if (Read) {
- Packet.DataDirection = UfsDataIn;
- Packet.InDataBuffer = Descriptor;
- Packet.InTransferLength = DescSize;
- Packet.Opcode = UtpQueryFuncOpcodeRdDesc;
+ Packet.DataDirection = UfsDataIn;
+ Packet.InDataBuffer = Descriptor;
+ Packet.InTransferLength = DescSize;
+ Packet.Opcode = UtpQueryFuncOpcodeRdDesc;
} else {
Packet.DataDirection = UfsDataOut;
Packet.OutDataBuffer = Descriptor;
Packet.OutTransferLength = DescSize;
Packet.Opcode = UtpQueryFuncOpcodeWrDesc;
}
- Packet.DescId = DescId;
- Packet.Index = Index;
- Packet.Selector = Selector;
- Packet.Timeout = UFS_TIMEOUT;
+
+ Packet.DescId = DescId;
+ Packet.Index = Index;
+ Packet.Selector = Selector;
+ Packet.Timeout = UFS_TIMEOUT;
//
// Find out which slot of transfer request list is available.
@@ -810,7 +810,7 @@ UfsRwDeviceDesc (
return Status;
}
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
//
// Fill transfer request descriptor to this slot.
//
@@ -823,7 +823,7 @@ UfsRwDeviceDesc (
// Check the transfer request result.
//
CmdDescBase = (UINT8 *)(UINTN)(LShiftU64 ((UINT64)Trd->UcdBaU, 32) | LShiftU64 ((UINT64)Trd->UcdBa, 7));
- QueryResp = (UTP_QUERY_RESP_UPIU*)(CmdDescBase + Trd->RuO * sizeof (UINT32));
+ QueryResp = (UTP_QUERY_RESP_UPIU *)(CmdDescBase + Trd->RuO * sizeof (UINT32));
CmdDescSize = Trd->RuO * sizeof (UINT32) + Trd->RuL * sizeof (UINT32);
//
@@ -835,7 +835,7 @@ UfsRwDeviceDesc (
// Wait for the completion of the transfer request.
//
Address = Private->UfsHcBase + UFS_HC_UTRLDBR_OFFSET;
- Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet.Timeout);
+ Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet.Timeout);
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -848,7 +848,7 @@ UfsRwDeviceDesc (
if (Trd->Ocs == 0) {
ReturnDataSize = QueryResp->Tsf.Length;
- SwapLittleEndianToBigEndian ((UINT8*)&ReturnDataSize, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ReturnDataSize, sizeof (UINT16));
if (Read) {
//
@@ -875,8 +875,6 @@ Exit:
return Status;
}
-
-
/**
Read or write specified flag of a UFS device.
@@ -892,20 +890,20 @@ Exit:
**/
EFI_STATUS
UfsRwFlags (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 FlagId,
- IN OUT UINT8 *Value
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 FlagId,
+ IN OUT UINT8 *Value
)
{
- EFI_STATUS Status;
- UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
- UINT8 Slot;
- UTP_TRD *Trd;
- UINTN Address;
- UTP_QUERY_RESP_UPIU *QueryResp;
- UINT8 *CmdDescBase;
- UINT32 CmdDescSize;
+ EFI_STATUS Status;
+ UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
+ UINT8 Slot;
+ UTP_TRD *Trd;
+ UINTN Address;
+ UTP_QUERY_RESP_UPIU *QueryResp;
+ UINT8 *CmdDescBase;
+ UINT32 CmdDescSize;
if (Value == NULL) {
return EFI_INVALID_PARAMETER;
@@ -915,22 +913,23 @@ UfsRwFlags (
if (Read) {
ASSERT (Value != NULL);
- Packet.DataDirection = UfsDataIn;
- Packet.Opcode = UtpQueryFuncOpcodeRdFlag;
+ Packet.DataDirection = UfsDataIn;
+ Packet.Opcode = UtpQueryFuncOpcodeRdFlag;
} else {
- Packet.DataDirection = UfsDataOut;
+ Packet.DataDirection = UfsDataOut;
if (*Value == 1) {
- Packet.Opcode = UtpQueryFuncOpcodeSetFlag;
+ Packet.Opcode = UtpQueryFuncOpcodeSetFlag;
} else if (*Value == 0) {
- Packet.Opcode = UtpQueryFuncOpcodeClrFlag;
+ Packet.Opcode = UtpQueryFuncOpcodeClrFlag;
} else {
return EFI_INVALID_PARAMETER;
}
}
- Packet.DescId = FlagId;
- Packet.Index = 0;
- Packet.Selector = 0;
- Packet.Timeout = UFS_TIMEOUT;
+
+ Packet.DescId = FlagId;
+ Packet.Index = 0;
+ Packet.Selector = 0;
+ Packet.Timeout = UFS_TIMEOUT;
//
// Find out which slot of transfer request list is available.
@@ -943,7 +942,7 @@ UfsRwFlags (
//
// Fill transfer request descriptor to this slot.
//
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
Status = UfsCreateDMCommandDesc (Private, &Packet, Trd);
if (EFI_ERROR (Status)) {
return Status;
@@ -953,7 +952,7 @@ UfsRwFlags (
// Check the transfer request result.
//
CmdDescBase = (UINT8 *)(UINTN)(LShiftU64 ((UINT64)Trd->UcdBaU, 32) | LShiftU64 ((UINT64)Trd->UcdBa, 7));
- QueryResp = (UTP_QUERY_RESP_UPIU*)(CmdDescBase + Trd->RuO * sizeof (UINT32));
+ QueryResp = (UTP_QUERY_RESP_UPIU *)(CmdDescBase + Trd->RuO * sizeof (UINT32));
CmdDescSize = Trd->RuO * sizeof (UINT32) + Trd->RuL * sizeof (UINT32);
//
@@ -965,7 +964,7 @@ UfsRwFlags (
// Wait for the completion of the transfer request.
//
Address = Private->UfsHcBase + UFS_HC_UTRLDBR_OFFSET;
- Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet.Timeout);
+ Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet.Timeout);
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -980,7 +979,7 @@ UfsRwFlags (
//
// The 'FLAG VALUE' field is at byte offset 3 of QueryResp->Tsf.Value
//
- *Value = *((UINT8*)&(QueryResp->Tsf.Value) + 3);
+ *Value = *((UINT8 *)&(QueryResp->Tsf.Value) + 3);
} else {
Status = EFI_DEVICE_ERROR;
}
@@ -1005,12 +1004,12 @@ Exit:
**/
EFI_STATUS
UfsSetFlag (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 FlagId
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 FlagId
)
{
- EFI_STATUS Status;
- UINT8 Value;
+ EFI_STATUS Status;
+ UINT8 Value;
Value = 1;
Status = UfsRwFlags (Private, FALSE, FlagId, &Value);
@@ -1018,8 +1017,6 @@ UfsSetFlag (
return Status;
}
-
-
/**
Sends NOP IN cmd to a UFS device for initialization process request.
For more details, please refer to UFS 2.0 spec Figure 13.3.
@@ -1035,16 +1032,16 @@ UfsSetFlag (
**/
EFI_STATUS
UfsExecNopCmds (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINT8 Slot;
- UTP_TRD *Trd;
- UTP_NOP_IN_UPIU *NopInUpiu;
- UINT8 *CmdDescBase;
- UINT32 CmdDescSize;
- UINTN Address;
+ EFI_STATUS Status;
+ UINT8 Slot;
+ UTP_TRD *Trd;
+ UTP_NOP_IN_UPIU *NopInUpiu;
+ UINT8 *CmdDescBase;
+ UINT32 CmdDescSize;
+ UINTN Address;
//
// Find out which slot of transfer request list is available.
@@ -1054,7 +1051,7 @@ UfsExecNopCmds (
return Status;
}
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
Status = UfsCreateNopCommandDesc (Private, Trd);
if (EFI_ERROR (Status)) {
return Status;
@@ -1064,7 +1061,7 @@ UfsExecNopCmds (
// Check the transfer request result.
//
CmdDescBase = (UINT8 *)(UINTN)(LShiftU64 ((UINT64)Trd->UcdBaU, 32) | LShiftU64 ((UINT64)Trd->UcdBa, 7));
- NopInUpiu = (UTP_NOP_IN_UPIU*)(CmdDescBase + Trd->RuO * sizeof (UINT32));
+ NopInUpiu = (UTP_NOP_IN_UPIU *)(CmdDescBase + Trd->RuO * sizeof (UINT32));
CmdDescSize = Trd->RuO * sizeof (UINT32) + Trd->RuL * sizeof (UINT32);
//
@@ -1076,7 +1073,7 @@ UfsExecNopCmds (
// Wait for the completion of the transfer request.
//
Address = Private->UfsHcBase + UFS_HC_UTRLDBR_OFFSET;
- Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, UFS_TIMEOUT);
+ Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, UFS_TIMEOUT);
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -1115,21 +1112,21 @@ Exit:
**/
EFI_STATUS
UfsExecScsiCmds (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 Lun,
- IN OUT UFS_SCSI_REQUEST_PACKET *Packet
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 Lun,
+ IN OUT UFS_SCSI_REQUEST_PACKET *Packet
)
{
- EFI_STATUS Status;
- UINT8 Slot;
- UTP_TRD *Trd;
- UINTN Address;
- UINT8 *CmdDescBase;
- UINT32 CmdDescSize;
- UTP_RESPONSE_UPIU *Response;
- UINT16 SenseDataLen;
- UINT32 ResTranCount;
- VOID *PacketBufferMap;
+ EFI_STATUS Status;
+ UINT8 Slot;
+ UTP_TRD *Trd;
+ UINTN Address;
+ UINT8 *CmdDescBase;
+ UINT32 CmdDescSize;
+ UTP_RESPONSE_UPIU *Response;
+ UINT16 SenseDataLen;
+ UINT32 ResTranCount;
+ VOID *PacketBufferMap;
//
// Find out which slot of transfer request list is available.
@@ -1139,7 +1136,7 @@ UfsExecScsiCmds (
return Status;
}
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
PacketBufferMap = NULL;
//
@@ -1150,7 +1147,7 @@ UfsExecScsiCmds (
return Status;
}
- CmdDescBase = (UINT8*)(UINTN)(LShiftU64 ((UINT64)Trd->UcdBaU, 32) | LShiftU64 ((UINT64)Trd->UcdBa, 7));
+ CmdDescBase = (UINT8 *)(UINTN)(LShiftU64 ((UINT64)Trd->UcdBaU, 32) | LShiftU64 ((UINT64)Trd->UcdBa, 7));
CmdDescSize = Trd->PrdtO * sizeof (UINT32) + Trd->PrdtL * sizeof (UTP_TR_PRD);
//
@@ -1162,7 +1159,7 @@ UfsExecScsiCmds (
// Wait for the completion of the transfer request.
//
Address = Private->UfsHcBase + UFS_HC_UTRLDBR_OFFSET;
- Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet->Timeout);
+ Status = UfsWaitMemSet (Address, BIT0 << Slot, 0, Packet->Timeout);
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -1170,9 +1167,9 @@ UfsExecScsiCmds (
//
// Get sense data if exists
//
- Response = (UTP_RESPONSE_UPIU*)(CmdDescBase + Trd->RuO * sizeof (UINT32));
+ Response = (UTP_RESPONSE_UPIU *)(CmdDescBase + Trd->RuO * sizeof (UINT32));
SenseDataLen = Response->SenseDataLen;
- SwapLittleEndianToBigEndian ((UINT8*)&SenseDataLen, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&SenseDataLen, sizeof (UINT16));
if ((Packet->SenseDataLength != 0) && (Packet->SenseData != NULL)) {
//
@@ -1199,13 +1196,13 @@ UfsExecScsiCmds (
if (Packet->DataDirection == UfsDataIn) {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->InTransferLength -= ResTranCount;
}
} else if (Packet->DataDirection == UfsDataOut) {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->OutTransferLength -= ResTranCount;
}
}
@@ -1217,13 +1214,13 @@ Exit:
if (PacketBufferMap != NULL) {
IoMmuUnmap (PacketBufferMap);
}
+
UfsStopExecCmd (Private, Slot);
UfsPeimFreeMem (Private->Pool, CmdDescBase, CmdDescSize);
return Status;
}
-
/**
Sent UIC DME_LINKSTARTUP command to start the link startup procedure.
@@ -1240,11 +1237,11 @@ Exit:
**/
EFI_STATUS
UfsExecUicCommands (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,
- IN UINT8 UicOpcode,
- IN UINT32 Arg1,
- IN UINT32 Arg2,
- IN UINT32 Arg3
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,
+ IN UINT8 UicOpcode,
+ IN UINT32 Arg1,
+ IN UINT32 Arg2,
+ IN UINT32 Arg3
)
{
EFI_STATUS Status;
@@ -1280,7 +1277,7 @@ UfsExecUicCommands (
// Host software shall only set the UICCMD if HCS.UCRDY is set to 1.
//
Address = Private->UfsHcBase + UFS_HC_STATUS_OFFSET;
- Status = UfsWaitMemSet (Address, UFS_HC_HCS_UCRDY, UFS_HC_HCS_UCRDY, UFS_TIMEOUT);
+ Status = UfsWaitMemSet (Address, UFS_HC_HCS_UCRDY, UFS_HC_HCS_UCRDY, UFS_TIMEOUT);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1303,9 +1300,9 @@ UfsExecUicCommands (
Address = UfsHcBase + UFS_HC_UCMD_ARG2_OFFSET;
Data = MmioRead32 (Address);
if ((Data & 0xFF) != 0) {
- DEBUG_CODE_BEGIN();
- DumpUicCmdExecResult (UicOpcode, (UINT8)(Data & 0xFF));
- DEBUG_CODE_END();
+ DEBUG_CODE_BEGIN ();
+ DumpUicCmdExecResult (UicOpcode, (UINT8)(Data & 0xFF));
+ DEBUG_CODE_END ();
return EFI_DEVICE_ERROR;
}
}
@@ -1321,6 +1318,7 @@ UfsExecUicCommands (
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
+
return EFI_NOT_FOUND;
}
@@ -1340,12 +1338,12 @@ UfsExecUicCommands (
**/
EFI_STATUS
UfsEnableHostController (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN Address;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINTN Address;
+ UINT32 Data;
//
// UFS 2.0 spec section 7.1.1 - Host Controller Initialization
@@ -1395,11 +1393,11 @@ UfsEnableHostController (
**/
EFI_STATUS
UfsDeviceDetection (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- UINTN Retry;
- EFI_STATUS Status;
+ UINTN Retry;
+ EFI_STATUS Status;
//
// Start UFS device detection.
@@ -1436,28 +1434,28 @@ UfsDeviceDetection (
**/
EFI_STATUS
UfsInitTaskManagementRequestList (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- UINTN Address;
- UINT32 Data;
- UINT8 Nutmrs;
- VOID *CmdDescHost;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- VOID *CmdDescMapping;
- EFI_STATUS Status;
+ UINTN Address;
+ UINT32 Data;
+ UINT8 Nutmrs;
+ VOID *CmdDescHost;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ VOID *CmdDescMapping;
+ EFI_STATUS Status;
//
// Initial h/w and s/w context for future operations.
//
- Address = Private->UfsHcBase + UFS_HC_CAP_OFFSET;
- Data = MmioRead32 (Address);
+ Address = Private->UfsHcBase + UFS_HC_CAP_OFFSET;
+ Data = MmioRead32 (Address);
Private->Capabilities = Data;
//
// Allocate and initialize UTP Task Management Request List.
//
- Nutmrs = (UINT8) (RShiftU64 ((Private->Capabilities & UFS_HC_CAP_NUTMRS), 16) + 1);
+ Nutmrs = (UINT8)(RShiftU64 ((Private->Capabilities & UFS_HC_CAP_NUTMRS), 16) + 1);
Status = IoMmuAllocateBuffer (
EFI_SIZE_TO_PAGES (Nutmrs * sizeof (UTP_TMRD)),
&CmdDescHost,
@@ -1478,7 +1476,7 @@ UfsInitTaskManagementRequestList (
MmioWrite32 (Address, (UINT32)(UINTN)CmdDescPhyAddr);
Address = Private->UfsHcBase + UFS_HC_UTMRLBAU_OFFSET;
MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32));
- Private->UtpTmrlBase = (VOID*)(UINTN)CmdDescHost;
+ Private->UtpTmrlBase = (VOID *)(UINTN)CmdDescHost;
Private->Nutmrs = Nutmrs;
Private->TmrlMapping = CmdDescMapping;
@@ -1503,22 +1501,22 @@ UfsInitTaskManagementRequestList (
**/
EFI_STATUS
UfsInitTransferRequestList (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- UINTN Address;
- UINT32 Data;
- UINT8 Nutrs;
- VOID *CmdDescHost;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- VOID *CmdDescMapping;
- EFI_STATUS Status;
+ UINTN Address;
+ UINT32 Data;
+ UINT8 Nutrs;
+ VOID *CmdDescHost;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ VOID *CmdDescMapping;
+ EFI_STATUS Status;
//
// Initial h/w and s/w context for future operations.
//
- Address = Private->UfsHcBase + UFS_HC_CAP_OFFSET;
- Data = MmioRead32 (Address);
+ Address = Private->UfsHcBase + UFS_HC_CAP_OFFSET;
+ Data = MmioRead32 (Address);
Private->Capabilities = Data;
//
@@ -1545,7 +1543,7 @@ UfsInitTransferRequestList (
MmioWrite32 (Address, (UINT32)(UINTN)CmdDescPhyAddr);
Address = Private->UfsHcBase + UFS_HC_UTRLBAU_OFFSET;
MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32));
- Private->UtpTrlBase = (VOID*)(UINTN)CmdDescHost;
+ Private->UtpTrlBase = (VOID *)(UINTN)CmdDescHost;
Private->Nutrs = Nutrs;
Private->TrlMapping = CmdDescMapping;
@@ -1570,10 +1568,10 @@ UfsInitTransferRequestList (
**/
EFI_STATUS
UfsControllerInit (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UfsEnableHostController (Private);
if (EFI_ERROR (Status)) {
@@ -1624,12 +1622,12 @@ UfsControllerInit (
**/
EFI_STATUS
UfsControllerStop (
- IN UFS_PEIM_HC_PRIVATE_DATA *Private
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN Address;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINTN Address;
+ UINT32 Data;
//
// Enable the UTP Task Management Request List by setting the UTP Task Management
diff --git a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.h b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.h
index e8b5aae702..f19b6535a1 100644
--- a/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.h
+++ b/MdeModulePkg/Bus/Ufs/UfsBlockIoPei/UfsHci.h
@@ -13,62 +13,62 @@
//
// Host Capabilities Register Offsets
//
-#define UFS_HC_CAP_OFFSET 0x0000 // Controller Capabilities
-#define UFS_HC_VER_OFFSET 0x0008 // Version
-#define UFS_HC_DDID_OFFSET 0x0010 // Device ID and Device Class
-#define UFS_HC_PMID_OFFSET 0x0014 // Product ID and Manufacturer ID
-#define UFS_HC_AHIT_OFFSET 0x0018 // Auto-Hibernate Idle Timer
+#define UFS_HC_CAP_OFFSET 0x0000 // Controller Capabilities
+#define UFS_HC_VER_OFFSET 0x0008 // Version
+#define UFS_HC_DDID_OFFSET 0x0010 // Device ID and Device Class
+#define UFS_HC_PMID_OFFSET 0x0014 // Product ID and Manufacturer ID
+#define UFS_HC_AHIT_OFFSET 0x0018 // Auto-Hibernate Idle Timer
//
// Operation and Runtime Register Offsets
//
-#define UFS_HC_IS_OFFSET 0x0020 // Interrupt Status
-#define UFS_HC_IE_OFFSET 0x0024 // Interrupt Enable
-#define UFS_HC_STATUS_OFFSET 0x0030 // Host Controller Status
-#define UFS_HC_ENABLE_OFFSET 0x0034 // Host Controller Enable
-#define UFS_HC_UECPA_OFFSET 0x0038 // Host UIC Error Code PHY Adapter Layer
-#define UFS_HC_UECDL_OFFSET 0x003c // Host UIC Error Code Data Link Layer
-#define UFS_HC_UECN_OFFSET 0x0040 // Host UIC Error Code Network Layer
-#define UFS_HC_UECT_OFFSET 0x0044 // Host UIC Error Code Transport Layer
-#define UFS_HC_UECDME_OFFSET 0x0048 // Host UIC Error Code DME
-#define UFS_HC_UTRIACR_OFFSET 0x004c // UTP Transfer Request Interrupt Aggregation Control Register
+#define UFS_HC_IS_OFFSET 0x0020 // Interrupt Status
+#define UFS_HC_IE_OFFSET 0x0024 // Interrupt Enable
+#define UFS_HC_STATUS_OFFSET 0x0030 // Host Controller Status
+#define UFS_HC_ENABLE_OFFSET 0x0034 // Host Controller Enable
+#define UFS_HC_UECPA_OFFSET 0x0038 // Host UIC Error Code PHY Adapter Layer
+#define UFS_HC_UECDL_OFFSET 0x003c // Host UIC Error Code Data Link Layer
+#define UFS_HC_UECN_OFFSET 0x0040 // Host UIC Error Code Network Layer
+#define UFS_HC_UECT_OFFSET 0x0044 // Host UIC Error Code Transport Layer
+#define UFS_HC_UECDME_OFFSET 0x0048 // Host UIC Error Code DME
+#define UFS_HC_UTRIACR_OFFSET 0x004c // UTP Transfer Request Interrupt Aggregation Control Register
//
// UTP Transfer Register Offsets
//
-#define UFS_HC_UTRLBA_OFFSET 0x0050 // UTP Transfer Request List Base Address
-#define UFS_HC_UTRLBAU_OFFSET 0x0054 // UTP Transfer Request List Base Address Upper 32-Bits
-#define UFS_HC_UTRLDBR_OFFSET 0x0058 // UTP Transfer Request List Door Bell Register
-#define UFS_HC_UTRLCLR_OFFSET 0x005c // UTP Transfer Request List CLear Register
-#define UFS_HC_UTRLRSR_OFFSET 0x0060 // UTP Transfer Request Run-Stop Register
+#define UFS_HC_UTRLBA_OFFSET 0x0050 // UTP Transfer Request List Base Address
+#define UFS_HC_UTRLBAU_OFFSET 0x0054 // UTP Transfer Request List Base Address Upper 32-Bits
+#define UFS_HC_UTRLDBR_OFFSET 0x0058 // UTP Transfer Request List Door Bell Register
+#define UFS_HC_UTRLCLR_OFFSET 0x005c // UTP Transfer Request List CLear Register
+#define UFS_HC_UTRLRSR_OFFSET 0x0060 // UTP Transfer Request Run-Stop Register
//
// UTP Task Management Register Offsets
//
-#define UFS_HC_UTMRLBA_OFFSET 0x0070 // UTP Task Management Request List Base Address
-#define UFS_HC_UTMRLBAU_OFFSET 0x0074 // UTP Task Management Request List Base Address Upper 32-Bits
-#define UFS_HC_UTMRLDBR_OFFSET 0x0078 // UTP Task Management Request List Door Bell Register
-#define UFS_HC_UTMRLCLR_OFFSET 0x007c // UTP Task Management Request List CLear Register
-#define UFS_HC_UTMRLRSR_OFFSET 0x0080 // UTP Task Management Run-Stop Register
+#define UFS_HC_UTMRLBA_OFFSET 0x0070 // UTP Task Management Request List Base Address
+#define UFS_HC_UTMRLBAU_OFFSET 0x0074 // UTP Task Management Request List Base Address Upper 32-Bits
+#define UFS_HC_UTMRLDBR_OFFSET 0x0078 // UTP Task Management Request List Door Bell Register
+#define UFS_HC_UTMRLCLR_OFFSET 0x007c // UTP Task Management Request List CLear Register
+#define UFS_HC_UTMRLRSR_OFFSET 0x0080 // UTP Task Management Run-Stop Register
//
// UIC Command Register Offsets
//
-#define UFS_HC_UIC_CMD_OFFSET 0x0090 // UIC Command Register
-#define UFS_HC_UCMD_ARG1_OFFSET 0x0094 // UIC Command Argument 1
-#define UFS_HC_UCMD_ARG2_OFFSET 0x0098 // UIC Command Argument 2
-#define UFS_HC_UCMD_ARG3_OFFSET 0x009c // UIC Command Argument 3
+#define UFS_HC_UIC_CMD_OFFSET 0x0090 // UIC Command Register
+#define UFS_HC_UCMD_ARG1_OFFSET 0x0094 // UIC Command Argument 1
+#define UFS_HC_UCMD_ARG2_OFFSET 0x0098 // UIC Command Argument 2
+#define UFS_HC_UCMD_ARG3_OFFSET 0x009c // UIC Command Argument 3
//
// UMA Register Offsets
//
-#define UFS_HC_UMA_OFFSET 0x00b0 // Reserved for Unified Memory Extension
+#define UFS_HC_UMA_OFFSET 0x00b0 // Reserved for Unified Memory Extension
-#define UFS_HC_HCE_EN BIT0
-#define UFS_HC_HCS_DP BIT0
-#define UFS_HC_HCS_UCRDY BIT3
-#define UFS_HC_IS_ULSS BIT8
-#define UFS_HC_IS_UCCS BIT10
-#define UFS_HC_CAP_64ADDR BIT24
-#define UFS_HC_CAP_NUTMRS (BIT16 | BIT17 | BIT18)
-#define UFS_HC_CAP_NUTRS (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)
-#define UFS_HC_UTMRLRSR BIT0
-#define UFS_HC_UTRLRSR BIT0
+#define UFS_HC_HCE_EN BIT0
+#define UFS_HC_HCS_DP BIT0
+#define UFS_HC_HCS_UCRDY BIT3
+#define UFS_HC_IS_ULSS BIT8
+#define UFS_HC_IS_UCCS BIT10
+#define UFS_HC_CAP_64ADDR BIT24
+#define UFS_HC_CAP_NUTMRS (BIT16 | BIT17 | BIT18)
+#define UFS_HC_CAP_NUTRS (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)
+#define UFS_HC_UTMRLRSR BIT0
+#define UFS_HC_UTRLRSR BIT0
//
// The initial value of the OCS field of UTP TRD or TMRD descriptor
@@ -79,25 +79,25 @@
//
// A maximum of length of 256KB is supported by PRDT entry
//
-#define UFS_MAX_DATA_LEN_PER_PRD 0x40000
+#define UFS_MAX_DATA_LEN_PER_PRD 0x40000
-#define UFS_STORAGE_COMMAND_TYPE 0x01
+#define UFS_STORAGE_COMMAND_TYPE 0x01
-#define UFS_REGULAR_COMMAND 0x00
-#define UFS_INTERRUPT_COMMAND 0x01
+#define UFS_REGULAR_COMMAND 0x00
+#define UFS_INTERRUPT_COMMAND 0x01
-#define UFS_LUN_0 0x00
-#define UFS_LUN_1 0x01
-#define UFS_LUN_2 0x02
-#define UFS_LUN_3 0x03
-#define UFS_LUN_4 0x04
-#define UFS_LUN_5 0x05
-#define UFS_LUN_6 0x06
-#define UFS_LUN_7 0x07
-#define UFS_WLUN_REPORT_LUNS 0x81
-#define UFS_WLUN_UFS_DEV 0xD0
-#define UFS_WLUN_BOOT 0xB0
-#define UFS_WLUN_RPMB 0xC4
+#define UFS_LUN_0 0x00
+#define UFS_LUN_1 0x01
+#define UFS_LUN_2 0x02
+#define UFS_LUN_3 0x03
+#define UFS_LUN_4 0x04
+#define UFS_LUN_5 0x05
+#define UFS_LUN_6 0x06
+#define UFS_LUN_7 0x07
+#define UFS_WLUN_REPORT_LUNS 0x81
+#define UFS_WLUN_UFS_DEV 0xD0
+#define UFS_WLUN_BOOT 0xB0
+#define UFS_WLUN_RPMB 0xC4
#pragma pack(1)
@@ -105,227 +105,227 @@
// UFSHCI 2.0 Spec Section 5.2.1 Offset 00h: CAP - Controller Capabilities
//
typedef struct {
- UINT8 Nutrs:4; // Number of UTP Transfer Request Slots
- UINT8 Rsvd1:4;
+ UINT8 Nutrs : 4; // Number of UTP Transfer Request Slots
+ UINT8 Rsvd1 : 4;
- UINT8 NoRtt; // Number of outstanding READY TO TRANSFER (RTT) requests supported
+ UINT8 NoRtt; // Number of outstanding READY TO TRANSFER (RTT) requests supported
- UINT8 Nutmrs:3; // Number of UTP Task Management Request Slots
- UINT8 Rsvd2:4;
- UINT8 AutoHs:1; // Auto-Hibernation Support
+ UINT8 Nutmrs : 3; // Number of UTP Task Management Request Slots
+ UINT8 Rsvd2 : 4;
+ UINT8 AutoHs : 1; // Auto-Hibernation Support
- UINT8 As64:1; // 64-bit addressing supported
- UINT8 Oodds:1; // Out of order data delivery supported
- UINT8 UicDmetms:1; // UIC DME_TEST_MODE command supported
- UINT8 Ume:1; // Reserved for Unified Memory Extension
- UINT8 Rsvd4:4;
+ UINT8 As64 : 1; // 64-bit addressing supported
+ UINT8 Oodds : 1; // Out of order data delivery supported
+ UINT8 UicDmetms : 1; // UIC DME_TEST_MODE command supported
+ UINT8 Ume : 1; // Reserved for Unified Memory Extension
+ UINT8 Rsvd4 : 4;
} UFS_HC_CAP;
//
// UFSHCI 2.0 Spec Section 5.2.2 Offset 08h: VER - UFS Version
//
typedef struct {
- UINT8 Vs:4; // Version Suffix
- UINT8 Mnr:4; // Minor version number
+ UINT8 Vs : 4; // Version Suffix
+ UINT8 Mnr : 4; // Minor version number
- UINT8 Mjr; // Major version number
+ UINT8 Mjr; // Major version number
- UINT16 Rsvd1;
+ UINT16 Rsvd1;
} UFS_HC_VER;
//
// UFSHCI 2.0 Spec Section 5.2.3 Offset 10h: HCPID - Host Controller Product ID
//
-#define UFS_HC_PID UINT32
+#define UFS_HC_PID UINT32
//
// UFSHCI 2.0 Spec Section 5.2.4 Offset 14h: HCMID - Host Controller Manufacturer ID
//
-#define UFS_HC_MID UINT32
+#define UFS_HC_MID UINT32
//
// UFSHCI 2.0 Spec Section 5.2.5 Offset 18h: AHIT - Auto-Hibernate Idle Timer
//
typedef struct {
- UINT32 Ahitv:10; // Auto-Hibernate Idle Timer Value
- UINT32 Ts:3; // Timer scale
- UINT32 Rsvd1:19;
+ UINT32 Ahitv : 10; // Auto-Hibernate Idle Timer Value
+ UINT32 Ts : 3; // Timer scale
+ UINT32 Rsvd1 : 19;
} UFS_HC_AHIT;
//
// UFSHCI 2.0 Spec Section 5.3.1 Offset 20h: IS - Interrupt Status
//
typedef struct {
- UINT16 Utrcs:1; // UTP Transfer Request Completion Status
- UINT16 Udepri:1; // UIC DME_ENDPOINT_RESET Indication
- UINT16 Ue:1; // UIC Error
- UINT16 Utms:1; // UIC Test Mode Status
-
- UINT16 Upms:1; // UIC Power Mode Status
- UINT16 Uhxs:1; // UIC Hibernate Exit Status
- UINT16 Uhes:1; // UIC Hibernate Enter Status
- UINT16 Ulls:1; // UIC Link Lost Status
-
- UINT16 Ulss:1; // UIC Link Startup Status
- UINT16 Utmrcs:1; // UTP Task Management Request Completion Status
- UINT16 Uccs:1; // UIC Command Completion Status
- UINT16 Dfes:1; // Device Fatal Error Status
-
- UINT16 Utpes:1; // UTP Error Status
- UINT16 Rsvd1:3;
-
- UINT16 Hcfes:1; // Host Controller Fatal Error Status
- UINT16 Sbfes:1; // System Bus Fatal Error Status
- UINT16 Rsvd2:14;
+ UINT16 Utrcs : 1; // UTP Transfer Request Completion Status
+ UINT16 Udepri : 1; // UIC DME_ENDPOINT_RESET Indication
+ UINT16 Ue : 1; // UIC Error
+ UINT16 Utms : 1; // UIC Test Mode Status
+
+ UINT16 Upms : 1; // UIC Power Mode Status
+ UINT16 Uhxs : 1; // UIC Hibernate Exit Status
+ UINT16 Uhes : 1; // UIC Hibernate Enter Status
+ UINT16 Ulls : 1; // UIC Link Lost Status
+
+ UINT16 Ulss : 1; // UIC Link Startup Status
+ UINT16 Utmrcs : 1; // UTP Task Management Request Completion Status
+ UINT16 Uccs : 1; // UIC Command Completion Status
+ UINT16 Dfes : 1; // Device Fatal Error Status
+
+ UINT16 Utpes : 1; // UTP Error Status
+ UINT16 Rsvd1 : 3;
+
+ UINT16 Hcfes : 1; // Host Controller Fatal Error Status
+ UINT16 Sbfes : 1; // System Bus Fatal Error Status
+ UINT16 Rsvd2 : 14;
} UFS_HC_IS;
//
// UFSHCI 2.0 Spec Section 5.3.2 Offset 24h: IE - Interrupt Enable
//
typedef struct {
- UINT16 Utrce:1; // UTP Transfer Request Completion Enable
- UINT16 Udeprie:1; // UIC DME_ENDPOINT_RESET Enable
- UINT16 Uee:1; // UIC Error Enable
- UINT16 Utmse:1; // UIC Test Mode Status Enable
-
- UINT16 Upmse:1; // UIC Power Mode Status Enable
- UINT16 Uhxse:1; // UIC Hibernate Exit Status Enable
- UINT16 Uhese:1; // UIC Hibernate Enter Status Enable
- UINT16 Ullse:1; // UIC Link Lost Status Enable
-
- UINT16 Ulsse:1; // UIC Link Startup Status Enable
- UINT16 Utmrce:1; // UTP Task Management Request Completion Enable
- UINT16 Ucce:1; // UIC Command Completion Enable
- UINT16 Dfee:1; // Device Fatal Error Enable
-
- UINT16 Utpee:1; // UTP Error Enable
- UINT16 Rsvd1:3;
-
- UINT16 Hcfee:1; // Host Controller Fatal Error Enable
- UINT16 Sbfee:1; // System Bus Fatal Error Enable
- UINT16 Rsvd2:14;
+ UINT16 Utrce : 1; // UTP Transfer Request Completion Enable
+ UINT16 Udeprie : 1; // UIC DME_ENDPOINT_RESET Enable
+ UINT16 Uee : 1; // UIC Error Enable
+ UINT16 Utmse : 1; // UIC Test Mode Status Enable
+
+ UINT16 Upmse : 1; // UIC Power Mode Status Enable
+ UINT16 Uhxse : 1; // UIC Hibernate Exit Status Enable
+ UINT16 Uhese : 1; // UIC Hibernate Enter Status Enable
+ UINT16 Ullse : 1; // UIC Link Lost Status Enable
+
+ UINT16 Ulsse : 1; // UIC Link Startup Status Enable
+ UINT16 Utmrce : 1; // UTP Task Management Request Completion Enable
+ UINT16 Ucce : 1; // UIC Command Completion Enable
+ UINT16 Dfee : 1; // Device Fatal Error Enable
+
+ UINT16 Utpee : 1; // UTP Error Enable
+ UINT16 Rsvd1 : 3;
+
+ UINT16 Hcfee : 1; // Host Controller Fatal Error Enable
+ UINT16 Sbfee : 1; // System Bus Fatal Error Enable
+ UINT16 Rsvd2 : 14;
} UFS_HC_IE;
//
// UFSHCI 2.0 Spec Section 5.3.3 Offset 30h: HCS - Host Controller Status
//
typedef struct {
- UINT8 Dp:1; // Device Present
- UINT8 UtrlRdy:1; // UTP Transfer Request List Ready
- UINT8 UtmrlRdy:1; // UTP Task Management Request List Ready
- UINT8 UcRdy:1; // UIC COMMAND Ready
- UINT8 Rsvd1:4;
-
- UINT8 Upmcrs:3; // UIC Power Mode Change Request Status
- UINT8 Rsvd2:1; // UIC Hibernate Exit Status Enable
- UINT8 Utpec:4; // UTP Error Code
-
- UINT8 TtagUtpE; // Task Tag of UTP error
- UINT8 TlunUtpE; // Target LUN of UTP error
+ UINT8 Dp : 1; // Device Present
+ UINT8 UtrlRdy : 1; // UTP Transfer Request List Ready
+ UINT8 UtmrlRdy : 1; // UTP Task Management Request List Ready
+ UINT8 UcRdy : 1; // UIC COMMAND Ready
+ UINT8 Rsvd1 : 4;
+
+ UINT8 Upmcrs : 3; // UIC Power Mode Change Request Status
+ UINT8 Rsvd2 : 1; // UIC Hibernate Exit Status Enable
+ UINT8 Utpec : 4; // UTP Error Code
+
+ UINT8 TtagUtpE; // Task Tag of UTP error
+ UINT8 TlunUtpE; // Target LUN of UTP error
} UFS_HC_STATUS;
//
// UFSHCI 2.0 Spec Section 5.3.4 Offset 34h: HCE - Host Controller Enable
//
typedef struct {
- UINT32 Hce:1; // Host Controller Enable
- UINT32 Rsvd1:31;
+ UINT32 Hce : 1; // Host Controller Enable
+ UINT32 Rsvd1 : 31;
} UFS_HC_ENABLE;
//
// UFSHCI 2.0 Spec Section 5.3.5 Offset 38h: UECPA - Host UIC Error Code PHY Adapter Layer
//
typedef struct {
- UINT32 Ec:5; // UIC PHY Adapter Layer Error Code
- UINT32 Rsvd1:26;
- UINT32 Err:1; // UIC PHY Adapter Layer Error
+ UINT32 Ec : 5; // UIC PHY Adapter Layer Error Code
+ UINT32 Rsvd1 : 26;
+ UINT32 Err : 1; // UIC PHY Adapter Layer Error
} UFS_HC_UECPA;
//
// UFSHCI 2.0 Spec Section 5.3.6 Offset 3ch: UECDL - Host UIC Error Code Data Link Layer
//
typedef struct {
- UINT32 Ec:15; // UIC Data Link Layer Error Code
- UINT32 Rsvd1:16;
- UINT32 Err:1; // UIC Data Link Layer Error
+ UINT32 Ec : 15; // UIC Data Link Layer Error Code
+ UINT32 Rsvd1 : 16;
+ UINT32 Err : 1; // UIC Data Link Layer Error
} UFS_HC_UECDL;
//
// UFSHCI 2.0 Spec Section 5.3.7 Offset 40h: UECN - Host UIC Error Code Network Layer
//
typedef struct {
- UINT32 Ec:3; // UIC Network Layer Error Code
- UINT32 Rsvd1:28;
- UINT32 Err:1; // UIC Network Layer Error
+ UINT32 Ec : 3; // UIC Network Layer Error Code
+ UINT32 Rsvd1 : 28;
+ UINT32 Err : 1; // UIC Network Layer Error
} UFS_HC_UECN;
//
// UFSHCI 2.0 Spec Section 5.3.8 Offset 44h: UECT - Host UIC Error Code Transport Layer
//
typedef struct {
- UINT32 Ec:7; // UIC Transport Layer Error Code
- UINT32 Rsvd1:24;
- UINT32 Err:1; // UIC Transport Layer Error
+ UINT32 Ec : 7; // UIC Transport Layer Error Code
+ UINT32 Rsvd1 : 24;
+ UINT32 Err : 1; // UIC Transport Layer Error
} UFS_HC_UECT;
//
// UFSHCI 2.0 Spec Section 5.3.9 Offset 48h: UECDME - Host UIC Error Code
//
typedef struct {
- UINT32 Ec:1; // UIC DME Error Code
- UINT32 Rsvd1:30;
- UINT32 Err:1; // UIC DME Error
+ UINT32 Ec : 1; // UIC DME Error Code
+ UINT32 Rsvd1 : 30;
+ UINT32 Err : 1; // UIC DME Error
} UFS_HC_UECDME;
//
// UFSHCI 2.0 Spec Section 5.3.10 Offset 4Ch: UTRIACR - UTP Transfer Request Interrupt Aggregation Control Register
//
typedef struct {
- UINT8 IaToVal; // Interrupt aggregation timeout value
+ UINT8 IaToVal; // Interrupt aggregation timeout value
- UINT8 IacTh:5; // Interrupt aggregation counter threshold
- UINT8 Rsvd1:3;
+ UINT8 IacTh : 5; // Interrupt aggregation counter threshold
+ UINT8 Rsvd1 : 3;
- UINT8 Ctr:1; // Counter and Timer Reset
- UINT8 Rsvd2:3;
- UINT8 Iasb:1; // Interrupt aggregation status bit
- UINT8 Rsvd3:3;
+ UINT8 Ctr : 1; // Counter and Timer Reset
+ UINT8 Rsvd2 : 3;
+ UINT8 Iasb : 1; // Interrupt aggregation status bit
+ UINT8 Rsvd3 : 3;
- UINT8 IapwEn:1; // Interrupt aggregation parameter write enable
- UINT8 Rsvd4:6;
- UINT8 IaEn:1; // Interrupt Aggregation Enable/Disable
+ UINT8 IapwEn : 1; // Interrupt aggregation parameter write enable
+ UINT8 Rsvd4 : 6;
+ UINT8 IaEn : 1; // Interrupt Aggregation Enable/Disable
} UFS_HC_UTRIACR;
//
// UFSHCI 2.0 Spec Section 5.4.1 Offset 50h: UTRLBA - UTP Transfer Request List Base Address
//
typedef struct {
- UINT32 Rsvd1:10;
- UINT32 UtrlBa:22; // UTP Transfer Request List Base Address
+ UINT32 Rsvd1 : 10;
+ UINT32 UtrlBa : 22; // UTP Transfer Request List Base Address
} UFS_HC_UTRLBA;
//
// UFSHCI 2.0 Spec Section 5.4.2 Offset 54h: UTRLBAU - UTP Transfer Request List Base Address Upper 32-bits
//
-#define UFS_HC_UTRLBAU UINT32
+#define UFS_HC_UTRLBAU UINT32
//
// UFSHCI 2.0 Spec Section 5.4.3 Offset 58h: UTRLDBR - UTP Transfer Request List Door Bell Register
//
-#define UFS_HC_UTRLDBR UINT32
+#define UFS_HC_UTRLDBR UINT32
//
// UFSHCI 2.0 Spec Section 5.4.4 Offset 5Ch: UTRLCLR - UTP Transfer Request List CLear Register
//
-#define UFS_HC_UTRLCLR UINT32
+#define UFS_HC_UTRLCLR UINT32
#if 0
//
// UFSHCI 2.0 Spec Section 5.4.5 Offset 60h: UTRLRSR - UTP Transfer Request List Run Stop Register
//
typedef struct {
- UINT32 UtrlRsr:1; // UTP Transfer Request List Run-Stop Register
- UINT32 Rsvd1:31;
+ UINT32 UtrlRsr : 1; // UTP Transfer Request List Run-Stop Register
+ UINT32 Rsvd1 : 31;
} UFS_HC_UTRLRSR;
#endif
@@ -333,29 +333,29 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.5.1 Offset 70h: UTMRLBA - UTP Task Management Request List Base Address
//
typedef struct {
- UINT32 Rsvd1:10;
- UINT32 UtmrlBa:22; // UTP Task Management Request List Base Address
+ UINT32 Rsvd1 : 10;
+ UINT32 UtmrlBa : 22; // UTP Task Management Request List Base Address
} UFS_HC_UTMRLBA;
//
// UFSHCI 2.0 Spec Section 5.5.2 Offset 74h: UTMRLBAU - UTP Task Management Request List Base Address Upper 32-bits
//
-#define UFS_HC_UTMRLBAU UINT32
+#define UFS_HC_UTMRLBAU UINT32
//
// UFSHCI 2.0 Spec Section 5.5.3 Offset 78h: UTMRLDBR - UTP Task Management Request List Door Bell Register
//
typedef struct {
- UINT32 UtmrlDbr:8; // UTP Task Management Request List Door bell Register
- UINT32 Rsvd1:24;
+ UINT32 UtmrlDbr : 8; // UTP Task Management Request List Door bell Register
+ UINT32 Rsvd1 : 24;
} UFS_HC_UTMRLDBR;
//
// UFSHCI 2.0 Spec Section 5.5.4 Offset 7Ch: UTMRLCLR - UTP Task Management Request List CLear Register
//
typedef struct {
- UINT32 UtmrlClr:8; // UTP Task Management List Clear Register
- UINT32 Rsvd1:24;
+ UINT32 UtmrlClr : 8; // UTP Task Management List Clear Register
+ UINT32 Rsvd1 : 24;
} UFS_HC_UTMRLCLR;
#if 0
@@ -363,8 +363,8 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.5.5 Offset 80h: UTMRLRSR - UTP Task Management Request List Run Stop Register
//
typedef struct {
- UINT32 UtmrlRsr:1; // UTP Task Management Request List Run-Stop Register
- UINT32 Rsvd1:31;
+ UINT32 UtmrlRsr : 1; // UTP Task Management Request List Run-Stop Register
+ UINT32 Rsvd1 : 31;
} UFS_HC_UTMRLRSR;
#endif
@@ -372,24 +372,24 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.6.1 Offset 90h: UICCMD - UIC Command
//
typedef struct {
- UINT32 CmdOp:8; // Command Opcode
- UINT32 Rsvd1:24;
+ UINT32 CmdOp : 8; // Command Opcode
+ UINT32 Rsvd1 : 24;
} UFS_HC_UICCMD;
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 94h: UICCMDARG1 - UIC Command Argument 1
//
-#define UFS_HC_UICCMD_ARG1 UINT32
+#define UFS_HC_UICCMD_ARG1 UINT32
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 98h: UICCMDARG2 - UIC Command Argument 2
//
-#define UFS_HC_UICCMD_ARG2 UINT32
+#define UFS_HC_UICCMD_ARG2 UINT32
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 9ch: UICCMDARG3 - UIC Command Argument 3
//
-#define UFS_HC_UICCMD_ARG3 UINT32
+#define UFS_HC_UICCMD_ARG3 UINT32
//
// UIC command opcodes
@@ -417,74 +417,74 @@ typedef struct {
//
// DW0
//
- UINT32 Rsvd1:24;
- UINT32 Int:1; /* Interrupt */
- UINT32 Dd:2; /* Data Direction */
- UINT32 Rsvd2:1;
- UINT32 Ct:4; /* Command Type */
+ UINT32 Rsvd1 : 24;
+ UINT32 Int : 1; /* Interrupt */
+ UINT32 Dd : 2; /* Data Direction */
+ UINT32 Rsvd2 : 1;
+ UINT32 Ct : 4; /* Command Type */
//
// DW1
//
- UINT32 Rsvd3;
+ UINT32 Rsvd3;
//
// DW2
//
- UINT32 Ocs:8; /* Overall Command Status */
- UINT32 Rsvd4:24;
+ UINT32 Ocs : 8; /* Overall Command Status */
+ UINT32 Rsvd4 : 24;
//
// DW3
//
- UINT32 Rsvd5;
+ UINT32 Rsvd5;
//
// DW4
//
- UINT32 Rsvd6:7;
- UINT32 UcdBa:25; /* UTP Command Descriptor Base Address */
+ UINT32 Rsvd6 : 7;
+ UINT32 UcdBa : 25; /* UTP Command Descriptor Base Address */
//
// DW5
//
- UINT32 UcdBaU; /* UTP Command Descriptor Base Address Upper 32-bits */
+ UINT32 UcdBaU; /* UTP Command Descriptor Base Address Upper 32-bits */
//
// DW6
//
- UINT16 RuL; /* Response UPIU Length */
- UINT16 RuO; /* Response UPIU Offset */
+ UINT16 RuL; /* Response UPIU Length */
+ UINT16 RuO; /* Response UPIU Offset */
//
// DW7
//
- UINT16 PrdtL; /* PRDT Length */
- UINT16 PrdtO; /* PRDT Offset */
+ UINT16 PrdtL; /* PRDT Length */
+ UINT16 PrdtO; /* PRDT Offset */
} UTP_TRD;
typedef struct {
//
// DW0
//
- UINT32 Rsvd1:2;
- UINT32 DbAddr:30; /* Data Base Address */
+ UINT32 Rsvd1 : 2;
+ UINT32 DbAddr : 30; /* Data Base Address */
//
// DW1
//
- UINT32 DbAddrU; /* Data Base Address Upper 32-bits */
+ UINT32 DbAddrU; /* Data Base Address Upper 32-bits */
//
// DW2
//
- UINT32 Rsvd2;
+ UINT32 Rsvd2;
//
// DW3
//
- UINT32 DbCount:18; /* Data Byte Count */
- UINT32 Rsvd3:14;
+ UINT32 DbCount : 18; /* Data Byte Count */
+ UINT32 Rsvd3 : 14;
} UTP_TR_PRD;
//
@@ -494,38 +494,38 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x01*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x01*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 CmdSet:4; /* Command Set Type */
- UINT8 Rsvd1:4;
- UINT8 Rsvd2;
- UINT8 Rsvd3;
- UINT8 Rsvd4;
+ UINT8 CmdSet : 4; /* Command Set Type */
+ UINT8 Rsvd1 : 4;
+ UINT8 Rsvd2;
+ UINT8 Rsvd3;
+ UINT8 Rsvd4;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd5;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd5;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 ExpDataTranLen; /* Expected Data Transfer Length - Big Endian */
+ UINT32 ExpDataTranLen; /* Expected Data Transfer Length - Big Endian */
//
// DW4 - DW7
//
- UINT8 Cdb[16];
+ UINT8 Cdb[16];
} UTP_COMMAND_UPIU;
//
@@ -535,44 +535,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x21*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x21*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 CmdSet:4; /* Command Set Type */
- UINT8 Rsvd1:4;
- UINT8 Rsvd2;
- UINT8 Response; /* Response */
- UINT8 Status; /* Status */
+ UINT8 CmdSet : 4; /* Command Set Type */
+ UINT8 Rsvd1 : 4;
+ UINT8 Rsvd2;
+ UINT8 Response; /* Response */
+ UINT8 Status; /* Status */
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 ResTranCount; /* Residual Transfer Count - Big Endian */
+ UINT32 ResTranCount; /* Residual Transfer Count - Big Endian */
//
// DW4 - DW7
//
- UINT8 Rsvd3[16];
+ UINT8 Rsvd3[16];
//
// Data Segment - Sense Data
//
- UINT16 SenseDataLen; /* Sense Data Length - Big Endian */
- UINT8 SenseData[18]; /* Sense Data */
+ UINT16 SenseDataLen; /* Sense Data Length - Big Endian */
+ UINT8 SenseData[18]; /* Sense Data */
} UTP_RESPONSE_UPIU;
//
@@ -582,44 +582,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x02*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x02*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be sent out
//
- //UINT8 Data[]; /* Data to be sent out, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be sent out, maximum is 65535 bytes */
} UTP_DATA_OUT_UPIU;
//
@@ -629,44 +629,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x22*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x22*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be read
//
- //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
} UTP_DATA_IN_UPIU;
//
@@ -676,44 +676,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x31*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x31*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be read
//
- //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
} UTP_RDY_TO_TRAN_UPIU;
//
@@ -723,46 +723,46 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x04*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x04*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1;
- UINT8 TskManFunc; /* Task Management Function */
- UINT8 Rsvd2[2];
+ UINT8 Rsvd1;
+ UINT8 TskManFunc; /* Task Management Function */
+ UINT8 Rsvd2[2];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 InputParam1; /* Input Parameter 1 - Big Endian */
+ UINT32 InputParam1; /* Input Parameter 1 - Big Endian */
//
// DW4
//
- UINT32 InputParam2; /* Input Parameter 2 - Big Endian */
+ UINT32 InputParam2; /* Input Parameter 2 - Big Endian */
//
// DW5
//
- UINT32 InputParam3; /* Input Parameter 3 - Big Endian */
+ UINT32 InputParam3; /* Input Parameter 3 - Big Endian */
//
// DW6 - DW7
//
- UINT8 Rsvd4[8];
+ UINT8 Rsvd4[8];
} UTP_TM_REQ_UPIU;
//
@@ -772,41 +772,41 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x24*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x24*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[2];
- UINT8 Resp; /* Response */
- UINT8 Rsvd2;
+ UINT8 Rsvd1[2];
+ UINT8 Resp; /* Response */
+ UINT8 Rsvd2;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 OutputParam1; /* Output Parameter 1 - Big Endian */
+ UINT32 OutputParam1; /* Output Parameter 1 - Big Endian */
//
// DW4
//
- UINT32 OutputParam2; /* Output Parameter 2 - Big Endian */
+ UINT32 OutputParam2; /* Output Parameter 2 - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd4[12];
+ UINT8 Rsvd4[12];
} UTP_TM_RESP_UPIU;
//
@@ -816,47 +816,46 @@ typedef struct {
//
// DW0
//
- UINT32 Rsvd1:24;
- UINT32 Int:1; /* Interrupt */
- UINT32 Rsvd2:7;
+ UINT32 Rsvd1 : 24;
+ UINT32 Int : 1; /* Interrupt */
+ UINT32 Rsvd2 : 7;
//
// DW1
//
- UINT32 Rsvd3;
+ UINT32 Rsvd3;
//
// DW2
//
- UINT32 Ocs:8; /* Overall Command Status */
- UINT32 Rsvd4:24;
+ UINT32 Ocs : 8; /* Overall Command Status */
+ UINT32 Rsvd4 : 24;
//
// DW3
//
- UINT32 Rsvd5;
+ UINT32 Rsvd5;
//
// DW4 - DW11
//
- UTP_TM_REQ_UPIU TmReq; /* Task Management Request UPIU */
+ UTP_TM_REQ_UPIU TmReq; /* Task Management Request UPIU */
//
// DW12 - DW19
//
- UTP_TM_RESP_UPIU TmResp; /* Task Management Response UPIU */
+ UTP_TM_RESP_UPIU TmResp; /* Task Management Response UPIU */
} UTP_TMRD;
-
typedef struct {
- UINT8 Opcode;
- UINT8 DescId;
- UINT8 Index;
- UINT8 Selector;
- UINT16 Rsvd1;
- UINT16 Length;
- UINT32 Value;
- UINT32 Rsvd2;
+ UINT8 Opcode;
+ UINT8 DescId;
+ UINT8 Index;
+ UINT8 Selector;
+ UINT16 Rsvd1;
+ UINT16 Length;
+ UINT32 Value;
+ UINT32 Rsvd2;
} UTP_UPIU_TSF;
//
@@ -866,56 +865,56 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x16*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x16*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2;
- UINT8 QueryFunc; /* Query Function */
- UINT8 Rsvd3[2];
+ UINT8 Rsvd2;
+ UINT8 QueryFunc; /* Query Function */
+ UINT8 Rsvd3[2];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd4;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd4;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3 - 6
//
- UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
+ UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
//
// DW7
//
- UINT8 Rsvd5[4];
+ UINT8 Rsvd5[4];
//
// Data Segment - Data to be transferred
//
- //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
} UTP_QUERY_REQ_UPIU;
-#define QUERY_FUNC_STD_READ_REQ 0x01
-#define QUERY_FUNC_STD_WRITE_REQ 0x81
+#define QUERY_FUNC_STD_READ_REQ 0x01
+#define QUERY_FUNC_STD_WRITE_REQ 0x81
typedef enum {
- UtpQueryFuncOpcodeNop = 0x00,
- UtpQueryFuncOpcodeRdDesc = 0x01,
- UtpQueryFuncOpcodeWrDesc = 0x02,
- UtpQueryFuncOpcodeRdAttr = 0x03,
- UtpQueryFuncOpcodeWrAttr = 0x04,
- UtpQueryFuncOpcodeRdFlag = 0x05,
- UtpQueryFuncOpcodeSetFlag = 0x06,
- UtpQueryFuncOpcodeClrFlag = 0x07,
- UtpQueryFuncOpcodeTogFlag = 0x08
+ UtpQueryFuncOpcodeNop = 0x00,
+ UtpQueryFuncOpcodeRdDesc = 0x01,
+ UtpQueryFuncOpcodeWrDesc = 0x02,
+ UtpQueryFuncOpcodeRdAttr = 0x03,
+ UtpQueryFuncOpcodeWrAttr = 0x04,
+ UtpQueryFuncOpcodeRdFlag = 0x05,
+ UtpQueryFuncOpcodeSetFlag = 0x06,
+ UtpQueryFuncOpcodeClrFlag = 0x07,
+ UtpQueryFuncOpcodeTogFlag = 0x08
} UTP_QUERY_FUNC_OPCODE;
//
@@ -925,42 +924,42 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x36*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x36*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2;
- UINT8 QueryFunc; /* Query Function */
- UINT8 QueryResp; /* Query Response */
- UINT8 Rsvd3;
+ UINT8 Rsvd2;
+ UINT8 QueryFunc; /* Query Function */
+ UINT8 QueryResp; /* Query Response */
+ UINT8 Rsvd3;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3 - 6
//
- UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
+ UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
//
// DW7
//
- UINT8 Rsvd4[4];
+ UINT8 Rsvd4[4];
//
// Data Segment - Data to be transferred
//
- //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
} UTP_QUERY_RESP_UPIU;
typedef enum {
@@ -984,39 +983,39 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x3F*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x3F*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[2];
- UINT8 Response; /* Response - 0x01 */
- UINT8 Rsvd2;
+ UINT8 Rsvd1[2];
+ UINT8 Response; /* Response - 0x01 */
+ UINT8 Rsvd2;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information - 0x00 */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information - 0x00 */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT8 HdrSts; /* Basic Header Status */
- UINT8 Rsvd3;
- UINT8 E2ESts; /* End-to-End Status */
- UINT8 Rsvd4;
+ UINT8 HdrSts; /* Basic Header Status */
+ UINT8 Rsvd3;
+ UINT8 E2ESts; /* End-to-End Status */
+ UINT8 Rsvd4;
//
// DW4 - DW7
//
- UINT8 Rsvd5[16];
+ UINT8 Rsvd5[16];
} UTP_REJ_UPIU;
//
@@ -1026,29 +1025,29 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x00*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x00*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2[4];
+ UINT8 Rsvd2[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3 - DW7
//
- UINT8 Rsvd4[20];
+ UINT8 Rsvd4[20];
} UTP_NOP_OUT_UPIU;
//
@@ -1058,234 +1057,234 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x20*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x20*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2[2];
- UINT8 Resp; /* Response - 0x00 */
- UINT8 Rsvd3;
+ UINT8 Rsvd2[2];
+ UINT8 Resp; /* Response - 0x00 */
+ UINT8 Rsvd3;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information - 0x00 */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information - 0x00 */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3 - DW7
//
- UINT8 Rsvd4[20];
+ UINT8 Rsvd4[20];
} UTP_NOP_IN_UPIU;
//
// UFS Descriptors
//
typedef enum {
- UfsDeviceDesc = 0x00,
- UfsConfigDesc = 0x01,
- UfsUnitDesc = 0x02,
- UfsInterConnDesc = 0x04,
- UfsStringDesc = 0x05,
- UfsGeometryDesc = 0x07,
- UfsPowerDesc = 0x08
+ UfsDeviceDesc = 0x00,
+ UfsConfigDesc = 0x01,
+ UfsUnitDesc = 0x02,
+ UfsInterConnDesc = 0x04,
+ UfsStringDesc = 0x05,
+ UfsGeometryDesc = 0x07,
+ UfsPowerDesc = 0x08
} UFS_DESC_IDN;
//
// UFS 2.0 Spec Section 14.1.6.2 - Device Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 Device;
- UINT8 DevClass;
- UINT8 DevSubClass;
- UINT8 Protocol;
- UINT8 NumLun;
- UINT8 NumWLun;
- UINT8 BootEn;
- UINT8 DescAccessEn;
- UINT8 InitPowerMode;
- UINT8 HighPriorityLun;
- UINT8 SecureRemovalType;
- UINT8 SecurityLun;
- UINT8 BgOpsTermLat;
- UINT8 InitActiveIccLevel;
- UINT16 SpecVersion;
- UINT16 ManufactureDate;
- UINT8 ManufacturerName;
- UINT8 ProductName;
- UINT8 SerialName;
- UINT8 OemId;
- UINT16 ManufacturerId;
- UINT8 Ud0BaseOffset;
- UINT8 Ud0ConfParamLen;
- UINT8 DevRttCap;
- UINT16 PeriodicRtcUpdate;
- UINT8 Rsvd1[17];
- UINT8 Rsvd2[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 Device;
+ UINT8 DevClass;
+ UINT8 DevSubClass;
+ UINT8 Protocol;
+ UINT8 NumLun;
+ UINT8 NumWLun;
+ UINT8 BootEn;
+ UINT8 DescAccessEn;
+ UINT8 InitPowerMode;
+ UINT8 HighPriorityLun;
+ UINT8 SecureRemovalType;
+ UINT8 SecurityLun;
+ UINT8 BgOpsTermLat;
+ UINT8 InitActiveIccLevel;
+ UINT16 SpecVersion;
+ UINT16 ManufactureDate;
+ UINT8 ManufacturerName;
+ UINT8 ProductName;
+ UINT8 SerialName;
+ UINT8 OemId;
+ UINT16 ManufacturerId;
+ UINT8 Ud0BaseOffset;
+ UINT8 Ud0ConfParamLen;
+ UINT8 DevRttCap;
+ UINT16 PeriodicRtcUpdate;
+ UINT8 Rsvd1[17];
+ UINT8 Rsvd2[16];
} UFS_DEV_DESC;
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 Rsvd1;
- UINT8 BootEn;
- UINT8 DescAccessEn;
- UINT8 InitPowerMode;
- UINT8 HighPriorityLun;
- UINT8 SecureRemovalType;
- UINT8 InitActiveIccLevel;
- UINT16 PeriodicRtcUpdate;
- UINT8 Rsvd2[5];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 Rsvd1;
+ UINT8 BootEn;
+ UINT8 DescAccessEn;
+ UINT8 InitPowerMode;
+ UINT8 HighPriorityLun;
+ UINT8 SecureRemovalType;
+ UINT8 InitActiveIccLevel;
+ UINT16 PeriodicRtcUpdate;
+ UINT8 Rsvd2[5];
} UFS_CONFIG_DESC_GEN_HEADER;
typedef struct {
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 MemType;
- UINT32 NumAllocUnits;
- UINT8 DataReliability;
- UINT8 LogicBlkSize;
- UINT8 ProvisionType;
- UINT16 CtxCap;
- UINT8 Rsvd1[3];
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 MemType;
+ UINT32 NumAllocUnits;
+ UINT8 DataReliability;
+ UINT8 LogicBlkSize;
+ UINT8 ProvisionType;
+ UINT16 CtxCap;
+ UINT8 Rsvd1[3];
} UFS_UNIT_DESC_CONFIG_PARAMS;
//
// UFS 2.0 Spec Section 14.1.6.3 - Configuration Descriptor
//
typedef struct {
- UFS_CONFIG_DESC_GEN_HEADER Header;
- UFS_UNIT_DESC_CONFIG_PARAMS UnitDescConfParams[8];
+ UFS_CONFIG_DESC_GEN_HEADER Header;
+ UFS_UNIT_DESC_CONFIG_PARAMS UnitDescConfParams[8];
} UFS_CONFIG_DESC;
//
// UFS 2.0 Spec Section 14.1.6.4 - Geometry Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 MediaTech;
- UINT8 Rsvd1;
- UINT64 TotalRawDevCapacity;
- UINT8 Rsvd2;
- UINT32 SegSize;
- UINT8 AllocUnitSize;
- UINT8 MinAddrBlkSize;
- UINT8 OptReadBlkSize;
- UINT8 OptWriteBlkSize;
- UINT8 MaxInBufSize;
- UINT8 MaxOutBufSize;
- UINT8 RpmbRwSize;
- UINT8 Rsvd3;
- UINT8 DataOrder;
- UINT8 MaxCtxIdNum;
- UINT8 SysDataTagUnitSize;
- UINT8 SysDataResUnitSize;
- UINT8 SupSecRemovalTypes;
- UINT16 SupMemTypes;
- UINT32 SysCodeMaxNumAllocUnits;
- UINT16 SupCodeCapAdjFac;
- UINT32 NonPersMaxNumAllocUnits;
- UINT16 NonPersCapAdjFac;
- UINT32 Enhance1MaxNumAllocUnits;
- UINT16 Enhance1CapAdjFac;
- UINT32 Enhance2MaxNumAllocUnits;
- UINT16 Enhance2CapAdjFac;
- UINT32 Enhance3MaxNumAllocUnits;
- UINT16 Enhance3CapAdjFac;
- UINT32 Enhance4MaxNumAllocUnits;
- UINT16 Enhance4CapAdjFac;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 MediaTech;
+ UINT8 Rsvd1;
+ UINT64 TotalRawDevCapacity;
+ UINT8 Rsvd2;
+ UINT32 SegSize;
+ UINT8 AllocUnitSize;
+ UINT8 MinAddrBlkSize;
+ UINT8 OptReadBlkSize;
+ UINT8 OptWriteBlkSize;
+ UINT8 MaxInBufSize;
+ UINT8 MaxOutBufSize;
+ UINT8 RpmbRwSize;
+ UINT8 Rsvd3;
+ UINT8 DataOrder;
+ UINT8 MaxCtxIdNum;
+ UINT8 SysDataTagUnitSize;
+ UINT8 SysDataResUnitSize;
+ UINT8 SupSecRemovalTypes;
+ UINT16 SupMemTypes;
+ UINT32 SysCodeMaxNumAllocUnits;
+ UINT16 SupCodeCapAdjFac;
+ UINT32 NonPersMaxNumAllocUnits;
+ UINT16 NonPersCapAdjFac;
+ UINT32 Enhance1MaxNumAllocUnits;
+ UINT16 Enhance1CapAdjFac;
+ UINT32 Enhance2MaxNumAllocUnits;
+ UINT16 Enhance2CapAdjFac;
+ UINT32 Enhance3MaxNumAllocUnits;
+ UINT16 Enhance3CapAdjFac;
+ UINT32 Enhance4MaxNumAllocUnits;
+ UINT16 Enhance4CapAdjFac;
} UFS_GEOMETRY_DESC;
//
// UFS 2.0 Spec Section 14.1.6.5 - Unit Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 UnitIdx;
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 LunQueueDep;
- UINT8 Rsvd1;
- UINT8 MemType;
- UINT8 DataReliability;
- UINT8 LogicBlkSize;
- UINT64 LogicBlkCount;
- UINT32 EraseBlkSize;
- UINT8 ProvisionType;
- UINT64 PhyMemResCount;
- UINT16 CtxCap;
- UINT8 LargeUnitGranularity;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 UnitIdx;
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 LunQueueDep;
+ UINT8 Rsvd1;
+ UINT8 MemType;
+ UINT8 DataReliability;
+ UINT8 LogicBlkSize;
+ UINT64 LogicBlkCount;
+ UINT32 EraseBlkSize;
+ UINT8 ProvisionType;
+ UINT64 PhyMemResCount;
+ UINT16 CtxCap;
+ UINT8 LargeUnitGranularity;
} UFS_UNIT_DESC;
//
// UFS 2.0 Spec Section 14.1.6.6 - RPMB Unit Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 UnitIdx;
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 LunQueueDep;
- UINT8 Rsvd1;
- UINT8 MemType;
- UINT8 Rsvd2;
- UINT8 LogicBlkSize;
- UINT64 LogicBlkCount;
- UINT32 EraseBlkSize;
- UINT8 ProvisionType;
- UINT64 PhyMemResCount;
- UINT8 Rsvd3[3];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 UnitIdx;
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 LunQueueDep;
+ UINT8 Rsvd1;
+ UINT8 MemType;
+ UINT8 Rsvd2;
+ UINT8 LogicBlkSize;
+ UINT64 LogicBlkCount;
+ UINT32 EraseBlkSize;
+ UINT8 ProvisionType;
+ UINT64 PhyMemResCount;
+ UINT8 Rsvd3[3];
} UFS_RPMB_UNIT_DESC;
typedef struct {
- UINT16 Value:10;
- UINT16 Rsvd1:4;
- UINT16 Unit:2;
+ UINT16 Value : 10;
+ UINT16 Rsvd1 : 4;
+ UINT16 Unit : 2;
} UFS_POWER_PARAM_ELEMENT;
//
// UFS 2.0 Spec Section 14.1.6.7 - Power Parameter Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVcc[16];
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ[16];
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ2[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVcc[16];
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ[16];
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ2[16];
} UFS_POWER_DESC;
//
// UFS 2.0 Spec Section 14.1.6.8 - InterConnect Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT16 UniProVer;
- UINT16 MphyVer;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT16 UniProVer;
+ UINT16 MphyVer;
} UFS_INTER_CONNECT_DESC;
//
// UFS 2.0 Spec Section 14.1.6.9 - 14.1.6.12 - String Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- CHAR16 Unicode[126];
+ UINT8 Length;
+ UINT8 DescType;
+ CHAR16 Unicode[126];
} UFS_STRING_DESC;
//
@@ -1306,34 +1305,32 @@ typedef enum {
// UFS 2.0 Spec Section 14.2 - Attributes
//
typedef enum {
- UfsAttrBootLunEn = 0x00,
- UfsAttrCurPowerMode = 0x02,
- UfsAttrActiveIccLevel = 0x03,
- UfsAttrOutOfOrderDataEn = 0x04,
- UfsAttrBgOpStatus = 0x05,
- UfsAttrPurgeStatus = 0x06,
- UfsAttrMaxDataInSize = 0x07,
- UfsAttrMaxDataOutSize = 0x08,
- UfsAttrDynCapNeeded = 0x09,
- UfsAttrRefClkFreq = 0x0a,
- UfsAttrConfigDescLock = 0x0b,
- UfsAttrMaxNumOfRtt = 0x0c,
- UfsAttrExceptionEvtCtrl = 0x0d,
- UfsAttrExceptionEvtSts = 0x0e,
- UfsAttrSecondsPassed = 0x0f,
- UfsAttrContextConf = 0x10,
- UfsAttrCorrPrgBlkNum = 0x11
+ UfsAttrBootLunEn = 0x00,
+ UfsAttrCurPowerMode = 0x02,
+ UfsAttrActiveIccLevel = 0x03,
+ UfsAttrOutOfOrderDataEn = 0x04,
+ UfsAttrBgOpStatus = 0x05,
+ UfsAttrPurgeStatus = 0x06,
+ UfsAttrMaxDataInSize = 0x07,
+ UfsAttrMaxDataOutSize = 0x08,
+ UfsAttrDynCapNeeded = 0x09,
+ UfsAttrRefClkFreq = 0x0a,
+ UfsAttrConfigDescLock = 0x0b,
+ UfsAttrMaxNumOfRtt = 0x0c,
+ UfsAttrExceptionEvtCtrl = 0x0d,
+ UfsAttrExceptionEvtSts = 0x0e,
+ UfsAttrSecondsPassed = 0x0f,
+ UfsAttrContextConf = 0x10,
+ UfsAttrCorrPrgBlkNum = 0x11
} UFS_ATTR_IDN;
typedef enum {
- UfsNoData = 0,
- UfsDataOut = 1,
- UfsDataIn = 2,
+ UfsNoData = 0,
+ UfsDataOut = 1,
+ UfsDataIn = 2,
UfsDdReserved
} UFS_DATA_DIRECTION;
-
#pragma pack()
#endif
-
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/ComponentName.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/ComponentName.c
index aced63b491..43584f4749 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/ComponentName.c
@@ -18,14 +18,13 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUfsPassThruComponent
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUfsPassThruComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UfsPassThruComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UfsPassThruComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUfsPassThruComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UfsPassThruComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UfsPassThruComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsPassThruDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsPassThruDriverNameTable[] = {
{
"eng;en",
L"Universal Flash Storage (UFS) Pass Thru Driver"
@@ -36,7 +35,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsPassThruDriverNameTab
}
};
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsPassThruControllerNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUfsPassThruControllerNameTable[] = {
{
"eng;en",
L"Universal Flash Storage (UFS) Host Controller"
@@ -174,16 +173,16 @@ UfsPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UfsPassThruComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- if (Language == NULL || ControllerName == NULL) {
+ if ((Language == NULL) || (ControllerName == NULL)) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsDevConfigProtocol.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsDevConfigProtocol.c
index 4730ecd90b..07ec590edc 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsDevConfigProtocol.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsDevConfigProtocol.c
@@ -34,17 +34,17 @@
EFI_STATUS
EFIAPI
UfsRwUfsDescriptor (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT8 *Descriptor,
- IN OUT UINT32 *DescSize
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT8 *Descriptor,
+ IN OUT UINT32 *DescSize
)
{
- EFI_STATUS Status;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_DEV_CONFIG (This);
@@ -64,6 +64,7 @@ UfsRwUfsDescriptor (
if (Status == EFI_TIMEOUT) {
Status = EFI_DEVICE_ERROR;
}
+
return Status;
}
@@ -88,14 +89,14 @@ UfsRwUfsDescriptor (
EFI_STATUS
EFIAPI
UfsRwUfsFlag (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 FlagId,
- IN OUT UINT8 *Flag
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 FlagId,
+ IN OUT UINT8 *Flag
)
{
- EFI_STATUS Status;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_DEV_CONFIG (This);
@@ -107,6 +108,7 @@ UfsRwUfsFlag (
if (Status == EFI_TIMEOUT) {
Status = EFI_DEVICE_ERROR;
}
+
return Status;
}
@@ -136,20 +138,20 @@ UfsRwUfsFlag (
EFI_STATUS
EFIAPI
UfsRwUfsAttribute (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 AttrId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT8 *Attribute,
- IN OUT UINT32 *AttrSize
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 AttrId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT8 *Attribute,
+ IN OUT UINT32 *AttrSize
)
{
- EFI_STATUS Status;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- UINT32 Attribute32;
+ EFI_STATUS Status;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ UINT32 Attribute32;
- Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_DEV_CONFIG (This);
+ Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_DEV_CONFIG (This);
Attribute32 = 0;
if ((This == NULL) || (Attribute == NULL) || (AttrSize == NULL)) {
@@ -186,5 +188,6 @@ UfsRwUfsAttribute (
Status = EFI_DEVICE_ERROR;
}
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.c
index 92ff958f16..4c2d6ae27f 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.c
@@ -11,9 +11,9 @@
//
// Template for Ufs Pass Thru private data.
//
-UFS_PASS_THRU_PRIVATE_DATA gUfsPassThruTemplate = {
- UFS_PASS_THRU_SIG, // Signature
- NULL, // Handle
+UFS_PASS_THRU_PRIVATE_DATA gUfsPassThruTemplate = {
+ UFS_PASS_THRU_SIG, // Signature
+ NULL, // Handle
{ // ExtScsiPassThruMode
0xFFFFFFFF,
EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL | EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL | EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_NONBLOCKIO,
@@ -34,17 +34,17 @@ UFS_PASS_THRU_PRIVATE_DATA gUfsPassThruTemplate = {
UfsRwUfsFlag,
UfsRwUfsAttribute
},
- 0, // UfsHostController
- 0, // UfsHcBase
- {0, 0}, // UfsHcInfo
- {NULL, NULL}, // UfsHcDriverInterface
- 0, // TaskTag
- 0, // UtpTrlBase
- 0, // Nutrs
- 0, // TrlMapping
- 0, // UtpTmrlBase
- 0, // Nutmrs
- 0, // TmrlMapping
+ 0, // UfsHostController
+ 0, // UfsHcBase
+ { 0, 0 }, // UfsHcInfo
+ { NULL, NULL }, // UfsHcDriverInterface
+ 0, // TaskTag
+ 0, // UtpTrlBase
+ 0, // Nutrs
+ 0, // TrlMapping
+ 0, // UtpTmrlBase
+ 0, // Nutmrs
+ 0, // TmrlMapping
{ // Luns
{
UFS_LUN_0, // Ufs Common Lun 0
@@ -60,17 +60,17 @@ UFS_PASS_THRU_PRIVATE_DATA gUfsPassThruTemplate = {
UFS_WLUN_BOOT, // Ufs Boot Well Known Lun
UFS_WLUN_RPMB // RPMB Well Known Lun
},
- 0x0000, // By default don't expose any Luns.
+ 0x0000, // By default don't expose any Luns.
0x0
},
- NULL, // TimerEvent
+ NULL, // TimerEvent
{ // Queue
NULL,
NULL
}
};
-EFI_DRIVER_BINDING_PROTOCOL gUfsPassThruDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUfsPassThruDriverBinding = {
UfsPassThruDriverBindingSupported,
UfsPassThruDriverBindingStart,
UfsPassThruDriverBindingStop,
@@ -79,20 +79,20 @@ EFI_DRIVER_BINDING_PROTOCOL gUfsPassThruDriverBinding = {
NULL
};
-UFS_DEVICE_PATH mUfsDevicePathTemplate = {
+UFS_DEVICE_PATH mUfsDevicePathTemplate = {
{
MESSAGING_DEVICE_PATH,
MSG_UFS_DP,
{
- (UINT8) (sizeof (UFS_DEVICE_PATH)),
- (UINT8) ((sizeof (UFS_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (UFS_DEVICE_PATH)),
+ (UINT8)((sizeof (UFS_DEVICE_PATH)) >> 8)
}
},
0,
0
};
-UINT8 mUfsTargetId[TARGET_MAX_BYTES];
+UINT8 mUfsTargetId[TARGET_MAX_BYTES];
GLOBAL_REMOVE_IF_UNREFERENCED EDKII_UFS_HC_PLATFORM_PROTOCOL *mUfsHcPlatform;
@@ -140,17 +140,17 @@ GLOBAL_REMOVE_IF_UNREFERENCED EDKII_UFS_HC_PLATFORM_PROTOCOL *mUfsHcPlatform;
EFI_STATUS
EFIAPI
UfsPassThruPassThru (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
)
{
- EFI_STATUS Status;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- UINT8 UfsLun;
- UINT16 Index;
+ EFI_STATUS Status;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ UINT8 UfsLun;
+ UINT16 Index;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -162,7 +162,8 @@ UfsPassThruPassThru (
// Don't support variable length CDB
//
if ((Packet->CdbLength != 6) && (Packet->CdbLength != 10) &&
- (Packet->CdbLength != 12) && (Packet->CdbLength != 16)) {
+ (Packet->CdbLength != 12) && (Packet->CdbLength != 16))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -170,15 +171,15 @@ UfsPassThruPassThru (
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->InDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->InDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->OutDataBuffer, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->OutDataBuffer, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
- if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->SenseData, This->Mode->IoAlign)) {
+ if ((This->Mode->IoAlign > 1) && !IS_ALIGNED (Packet->SenseData, This->Mode->IoAlign)) {
return EFI_INVALID_PARAMETER;
}
@@ -186,7 +187,7 @@ UfsPassThruPassThru (
// For UFS 2.0 compatible device, 0 is always used to represent the location of the UFS device.
//
SetMem (mUfsTargetId, TARGET_MAX_BYTES, 0x00);
- if ((Target == NULL) || (CompareMem(Target, mUfsTargetId, TARGET_MAX_BYTES) != 0)) {
+ if ((Target == NULL) || (CompareMem (Target, mUfsTargetId, TARGET_MAX_BYTES) != 0)) {
return EFI_INVALID_PARAMETER;
}
@@ -196,9 +197,9 @@ UfsPassThruPassThru (
// The second 8 bits of the 64-bit address saves the corresponding 8-bit UFS LUN.
//
if ((UINT8)Lun == UFS_WLUN_PREFIX) {
- UfsLun = BIT7 | (((UINT8*)&Lun)[1] & 0xFF);
+ UfsLun = BIT7 | (((UINT8 *)&Lun)[1] & 0xFF);
} else if ((UINT8)Lun == 0) {
- UfsLun = ((UINT8*)&Lun)[1] & 0xFF;
+ UfsLun = ((UINT8 *)&Lun)[1] & 0xFF;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -251,19 +252,19 @@ UfsPassThruPassThru (
EFI_STATUS
EFIAPI
UfsPassThruGetNextTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target,
- IN OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ IN OUT UINT64 *Lun
)
{
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- UINT8 UfsLun;
- UINT16 Index;
- UINT16 Next;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ UINT8 UfsLun;
+ UINT16 Index;
+ UINT16 Next;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
- if (Target == NULL || Lun == NULL) {
+ if ((Target == NULL) || (Lun == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -284,14 +285,16 @@ UfsPassThruGetNextTargetLun (
break;
}
}
+
if (Index != UFS_MAX_LUNS) {
*Lun = 0;
if ((UfsLun & BIT7) == BIT7) {
- ((UINT8*)Lun)[0] = UFS_WLUN_PREFIX;
- ((UINT8*)Lun)[1] = UfsLun & ~BIT7;
+ ((UINT8 *)Lun)[0] = UFS_WLUN_PREFIX;
+ ((UINT8 *)Lun)[1] = UfsLun & ~BIT7;
} else {
- ((UINT8*)Lun)[1] = UfsLun;
+ ((UINT8 *)Lun)[1] = UfsLun;
}
+
return EFI_SUCCESS;
} else {
return EFI_NOT_FOUND;
@@ -300,10 +303,10 @@ UfsPassThruGetNextTargetLun (
SetMem (mUfsTargetId, TARGET_MAX_BYTES, 0x00);
if (CompareMem (*Target, mUfsTargetId, TARGET_MAX_BYTES) == 0) {
- if (((UINT8*)Lun)[0] == UFS_WLUN_PREFIX) {
- UfsLun = BIT7 | (((UINT8*)Lun)[1] & 0xFF);
- } else if (((UINT8*)Lun)[0] == 0) {
- UfsLun = ((UINT8*)Lun)[1] & 0xFF;
+ if (((UINT8 *)Lun)[0] == UFS_WLUN_PREFIX) {
+ UfsLun = BIT7 | (((UINT8 *)Lun)[1] & 0xFF);
+ } else if (((UINT8 *)Lun)[0] == 0) {
+ UfsLun = ((UINT8 *)Lun)[1] & 0xFF;
} else {
return EFI_NOT_FOUND;
}
@@ -334,11 +337,12 @@ UfsPassThruGetNextTargetLun (
if (Index != UFS_MAX_LUNS) {
*Lun = 0;
if ((UfsLun & BIT7) == BIT7) {
- ((UINT8*)Lun)[0] = UFS_WLUN_PREFIX;
- ((UINT8*)Lun)[1] = UfsLun & ~BIT7;
+ ((UINT8 *)Lun)[0] = UFS_WLUN_PREFIX;
+ ((UINT8 *)Lun)[1] = UfsLun & ~BIT7;
} else {
- ((UINT8*)Lun)[1] = UfsLun;
+ ((UINT8 *)Lun)[1] = UfsLun;
}
+
return EFI_SUCCESS;
} else {
return EFI_NOT_FOUND;
@@ -378,16 +382,16 @@ UfsPassThruGetNextTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruBuildDevicePath (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- EFI_DEV_PATH *DevicePathNode;
- UINT8 UfsLun;
- UINT16 Index;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ EFI_DEV_PATH *DevicePathNode;
+ UINT8 UfsLun;
+ UINT16 Index;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
@@ -400,9 +404,9 @@ UfsPassThruBuildDevicePath (
}
if ((UINT8)Lun == UFS_WLUN_PREFIX) {
- UfsLun = BIT7 | (((UINT8*)&Lun)[1] & 0xFF);
+ UfsLun = BIT7 | (((UINT8 *)&Lun)[1] & 0xFF);
} else if ((UINT8)Lun == 0) {
- UfsLun = ((UINT8*)&Lun)[1] & 0xFF;
+ UfsLun = ((UINT8 *)&Lun)[1] & 0xFF;
} else {
return EFI_NOT_FOUND;
}
@@ -429,7 +433,7 @@ UfsPassThruBuildDevicePath (
DevicePathNode->Ufs.Pun = 0;
DevicePathNode->Ufs.Lun = UfsLun;
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) DevicePathNode;
+ *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePathNode;
return EFI_SUCCESS;
}
@@ -456,24 +460,24 @@ UfsPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
UfsPassThruGetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 **Target,
+ OUT UINT64 *Lun
)
{
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- EFI_DEV_PATH *DevicePathNode;
- UINT8 Pun;
- UINT8 UfsLun;
- UINT16 Index;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ EFI_DEV_PATH *DevicePathNode;
+ UINT8 Pun;
+ UINT8 UfsLun;
+ UINT16 Index;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_THIS (This);
//
// Validate parameters passed in.
//
- if (DevicePath == NULL || Target == NULL || Lun == NULL) {
+ if ((DevicePath == NULL) || (Target == NULL) || (Lun == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -485,14 +489,15 @@ UfsPassThruGetTargetLun (
// Check whether the DevicePath belongs to UFS_DEVICE_PATH
//
if ((DevicePath->Type != MESSAGING_DEVICE_PATH) || (DevicePath->SubType != MSG_UFS_DP) ||
- (DevicePathNodeLength(DevicePath) != sizeof(UFS_DEVICE_PATH))) {
+ (DevicePathNodeLength (DevicePath) != sizeof (UFS_DEVICE_PATH)))
+ {
return EFI_UNSUPPORTED;
}
- DevicePathNode = (EFI_DEV_PATH *) DevicePath;
+ DevicePathNode = (EFI_DEV_PATH *)DevicePath;
- Pun = (UINT8) DevicePathNode->Ufs.Pun;
- UfsLun = (UINT8) DevicePathNode->Ufs.Lun;
+ Pun = (UINT8)DevicePathNode->Ufs.Pun;
+ UfsLun = (UINT8)DevicePathNode->Ufs.Lun;
if (Pun != 0) {
return EFI_NOT_FOUND;
@@ -515,11 +520,12 @@ UfsPassThruGetTargetLun (
SetMem (*Target, TARGET_MAX_BYTES, 0x00);
*Lun = 0;
if ((UfsLun & BIT7) == BIT7) {
- ((UINT8*)Lun)[0] = UFS_WLUN_PREFIX;
- ((UINT8*)Lun)[1] = UfsLun & ~BIT7;
+ ((UINT8 *)Lun)[0] = UFS_WLUN_PREFIX;
+ ((UINT8 *)Lun)[1] = UfsLun & ~BIT7;
} else {
- ((UINT8*)Lun)[1] = UfsLun;
+ ((UINT8 *)Lun)[1] = UfsLun;
}
+
return EFI_SUCCESS;
}
@@ -537,7 +543,7 @@ UfsPassThruGetTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruResetChannel (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
)
{
//
@@ -568,9 +574,9 @@ UfsPassThruResetChannel (
EFI_STATUS
EFIAPI
UfsPassThruResetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun
)
{
//
@@ -604,16 +610,16 @@ UfsPassThruResetTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruGetNextTarget (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target
)
{
- if (Target == NULL || *Target == NULL) {
+ if ((Target == NULL) || (*Target == NULL)) {
return EFI_INVALID_PARAMETER;
}
SetMem (mUfsTargetId, TARGET_MAX_BYTES, 0xFF);
- if (CompareMem(*Target, mUfsTargetId, TARGET_MAX_BYTES) == 0) {
+ if (CompareMem (*Target, mUfsTargetId, TARGET_MAX_BYTES) == 0) {
SetMem (*Target, TARGET_MAX_BYTES, 0x00);
return EFI_SUCCESS;
}
@@ -666,14 +672,14 @@ UfsPassThruGetNextTarget (
EFI_STATUS
EFIAPI
UfsPassThruDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHostController;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHostController;
//
// Ufs Pass Thru driver is a device driver, and should ingore the
@@ -682,7 +688,7 @@ UfsPassThruDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID *) &ParentDevicePath,
+ (VOID *)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -693,20 +699,21 @@ UfsPassThruDriverBindingSupported (
//
return Status;
}
+
//
// Close the protocol because we don't use it here
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
Status = gBS->OpenProtocol (
Controller,
&gEdkiiUfsHostControllerProtocolGuid,
- (VOID **) &UfsHostController,
+ (VOID **)&UfsHostController,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -723,11 +730,11 @@ UfsPassThruDriverBindingSupported (
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEdkiiUfsHostControllerProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEdkiiUfsHostControllerProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_SUCCESS;
}
@@ -748,8 +755,8 @@ UfsFinishDeviceInitialization (
)
{
EFI_STATUS Status;
- UINT8 DeviceInitStatus;
- UINT32 Timeout;
+ UINT8 DeviceInitStatus;
+ UINT32 Timeout;
DeviceInitStatus = 0xFF;
@@ -770,6 +777,7 @@ UfsFinishDeviceInitialization (
if (EFI_ERROR (Status)) {
return Status;
}
+
MicroSecondDelay (1);
Timeout--;
} while (DeviceInitStatus != 0 && Timeout != 0);
@@ -821,20 +829,20 @@ UfsFinishDeviceInitialization (
EFI_STATUS
EFIAPI
UfsPassThruDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- UINTN UfsHcBase;
- UINT32 Index;
- UFS_UNIT_DESC UnitDescriptor;
- UFS_DEV_DESC DeviceDescriptor;
- UINT32 UnitDescriptorSize;
- UINT32 DeviceDescriptorSize;
+ EFI_STATUS Status;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ UINTN UfsHcBase;
+ UINT32 Index;
+ UFS_UNIT_DESC UnitDescriptor;
+ UFS_DEV_DESC DeviceDescriptor;
+ UINT32 UnitDescriptorSize;
+ UINT32 DeviceDescriptorSize;
Status = EFI_SUCCESS;
UfsHc = NULL;
@@ -843,14 +851,14 @@ UfsPassThruDriverBindingStart (
DEBUG ((DEBUG_INFO, "==UfsPassThru Start== Controller = %x\n", Controller));
- Status = gBS->OpenProtocol (
- Controller,
- &gEdkiiUfsHostControllerProtocolGuid,
- (VOID **) &UfsHc,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEdkiiUfsHostControllerProtocolGuid,
+ (VOID **)&UfsHc,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_BY_DRIVER
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Open Ufs Host Controller Protocol Error, Status = %r\n", Status));
@@ -876,11 +884,11 @@ UfsPassThruDriverBindingStart (
goto Error;
}
- Private->ExtScsiPassThru.Mode = &Private->ExtScsiPassThruMode;
- Private->UfsHostController = UfsHc;
- Private->UfsHcBase = UfsHcBase;
- Private->Handle = Controller;
- Private->UfsHcDriverInterface.UfsHcProtocol = UfsHc;
+ Private->ExtScsiPassThru.Mode = &Private->ExtScsiPassThruMode;
+ Private->UfsHostController = UfsHc;
+ Private->UfsHcBase = UfsHcBase;
+ Private->Handle = Controller;
+ Private->UfsHcDriverInterface.UfsHcProtocol = UfsHc;
Private->UfsHcDriverInterface.UfsExecUicCommand = UfsHcDriverInterfaceExecUicCommand;
InitializeListHead (&Private->Queue);
@@ -888,7 +896,7 @@ UfsPassThruDriverBindingStart (
// This has to be done before initializing UfsHcInfo or calling the UfsControllerInit
//
if (mUfsHcPlatform == NULL) {
- Status = gBS->LocateProtocol (&gEdkiiUfsHcPlatformProtocolGuid, NULL, (VOID**)&mUfsHcPlatform);
+ Status = gBS->LocateProtocol (&gEdkiiUfsHcPlatformProtocolGuid, NULL, (VOID **)&mUfsHcPlatform);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "No UfsHcPlatformProtocol present\n"));
}
@@ -931,11 +939,12 @@ UfsPassThruDriverBindingStart (
//
UnitDescriptorSize = sizeof (UFS_UNIT_DESC);
for (Index = 0; Index < 8; Index++) {
- Status = UfsRwDeviceDesc (Private, TRUE, UfsUnitDesc, (UINT8) Index, 0, &UnitDescriptor, &UnitDescriptorSize);
+ Status = UfsRwDeviceDesc (Private, TRUE, UfsUnitDesc, (UINT8)Index, 0, &UnitDescriptor, &UnitDescriptorSize);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failed to read unit descriptor, index = %X, status = %r\n", Index, Status));
continue;
}
+
if (UnitDescriptor.LunEn == 0x1) {
DEBUG ((DEBUG_INFO, "UFS LUN %X is enabled\n", Index));
Private->Luns.BitMask |= (BIT0 << Index);
@@ -946,7 +955,7 @@ UfsPassThruDriverBindingStart (
// Check if RPMB WLUN is supported and set corresponding bit mask.
//
DeviceDescriptorSize = sizeof (UFS_DEV_DESC);
- Status = UfsRwDeviceDesc (Private, TRUE, UfsDeviceDesc, 0, 0, &DeviceDescriptor, &DeviceDescriptorSize);
+ Status = UfsRwDeviceDesc (Private, TRUE, UfsDeviceDesc, 0, 0, &DeviceDescriptor, &DeviceDescriptorSize);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failed to read device descriptor, status = %r\n", Status));
} else {
@@ -998,6 +1007,7 @@ Error:
if (Private->TmrlMapping != NULL) {
UfsHc->Unmap (UfsHc, Private->TmrlMapping);
}
+
if (Private->UtpTmrlBase != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (Private->Nutmrs * sizeof (UTP_TMRD)), Private->UtpTmrlBase);
}
@@ -1005,6 +1015,7 @@ Error:
if (Private->TrlMapping != NULL) {
UfsHc->Unmap (UfsHc, Private->TrlMapping);
}
+
if (Private->UtpTrlBase != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (Private->Nutrs * sizeof (UTP_TMRD)), Private->UtpTrlBase);
}
@@ -1057,26 +1068,26 @@ Error:
EFI_STATUS
EFIAPI
UfsPassThruDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiPassThru;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
- UFS_PASS_THRU_TRANS_REQ *TransReq;
- LIST_ENTRY *Entry;
- LIST_ENTRY *NextEntry;
+ EFI_STATUS Status;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL *ExtScsiPassThru;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ UFS_PASS_THRU_TRANS_REQ *TransReq;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *NextEntry;
DEBUG ((DEBUG_INFO, "==UfsPassThru Stop== Controller Controller = %x\n", Controller));
Status = gBS->OpenProtocol (
Controller,
&gEfiExtScsiPassThruProtocolGuid,
- (VOID **) &ExtScsiPassThru,
+ (VOID **)&ExtScsiPassThru,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1092,9 +1103,9 @@ UfsPassThruDriverBindingStop (
//
// Cleanup the resources of I/O requests in the async I/O queue
//
- if (!IsListEmpty(&Private->Queue)) {
+ if (!IsListEmpty (&Private->Queue)) {
BASE_LIST_FOR_EACH_SAFE (Entry, NextEntry, &Private->Queue) {
- TransReq = UFS_PASS_THRU_TRANS_REQ_FROM_THIS (Entry);
+ TransReq = UFS_PASS_THRU_TRANS_REQ_FROM_THIS (Entry);
//
// TODO: Should find/add a proper host adapter return status for this
@@ -1129,6 +1140,7 @@ UfsPassThruDriverBindingStop (
if (Private->TmrlMapping != NULL) {
UfsHc->Unmap (UfsHc, Private->TmrlMapping);
}
+
if (Private->UtpTmrlBase != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (Private->Nutmrs * sizeof (UTP_TMRD)), Private->UtpTmrlBase);
}
@@ -1136,6 +1148,7 @@ UfsPassThruDriverBindingStop (
if (Private->TrlMapping != NULL) {
UfsHc->Unmap (UfsHc, Private->TrlMapping);
}
+
if (Private->UtpTrlBase != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (Private->Nutrs * sizeof (UTP_TMRD)), Private->UtpTrlBase);
}
@@ -1159,7 +1172,6 @@ UfsPassThruDriverBindingStop (
return Status;
}
-
/**
The user Entry Point for module UfsPassThru. The user code starts with this function.
@@ -1173,11 +1185,11 @@ UfsPassThruDriverBindingStop (
EFI_STATUS
EFIAPI
InitializeUfsPassThru (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Install driver model protocol(s).
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
index 79b86f7e6b..2b4f5d32d9 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
@@ -28,7 +28,7 @@
#include "UfsPassThruHci.h"
-#define UFS_PASS_THRU_SIG SIGNATURE_32 ('U', 'F', 'S', 'P')
+#define UFS_PASS_THRU_SIG SIGNATURE_32 ('U', 'F', 'S', 'P')
//
// Lun 0~7 is for 8 common luns.
@@ -38,46 +38,46 @@
// Lun 10: BOOT
// Lun 11: RPMB
//
-#define UFS_MAX_LUNS 12
-#define UFS_WLUN_PREFIX 0xC1
-#define UFS_INIT_COMPLETION_TIMEOUT 600000
+#define UFS_MAX_LUNS 12
+#define UFS_WLUN_PREFIX 0xC1
+#define UFS_INIT_COMPLETION_TIMEOUT 600000
typedef struct {
- UINT8 Lun[UFS_MAX_LUNS];
- UINT16 BitMask:12; // Bit 0~7 is 1/1 mapping to common luns. Bit 8~11 is 1/1 mapping to well-known luns.
- UINT16 Rsvd:4;
+ UINT8 Lun[UFS_MAX_LUNS];
+ UINT16 BitMask : 12; // Bit 0~7 is 1/1 mapping to common luns. Bit 8~11 is 1/1 mapping to well-known luns.
+ UINT16 Rsvd : 4;
} UFS_EXPOSED_LUNS;
typedef struct _UFS_PASS_THRU_PRIVATE_DATA {
- UINT32 Signature;
- EFI_HANDLE Handle;
- EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
- EFI_UFS_DEVICE_CONFIG_PROTOCOL UfsDevConfig;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHostController;
- UINTN UfsHcBase;
- EDKII_UFS_HC_INFO UfsHcInfo;
- EDKII_UFS_HC_DRIVER_INTERFACE UfsHcDriverInterface;
-
- UINT8 TaskTag;
-
- VOID *UtpTrlBase;
- UINT8 Nutrs;
- VOID *TrlMapping;
- VOID *UtpTmrlBase;
- UINT8 Nutmrs;
- VOID *TmrlMapping;
-
- UFS_EXPOSED_LUNS Luns;
+ UINT32 Signature;
+ EFI_HANDLE Handle;
+ EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
+ EFI_UFS_DEVICE_CONFIG_PROTOCOL UfsDevConfig;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHostController;
+ UINTN UfsHcBase;
+ EDKII_UFS_HC_INFO UfsHcInfo;
+ EDKII_UFS_HC_DRIVER_INTERFACE UfsHcDriverInterface;
+
+ UINT8 TaskTag;
+
+ VOID *UtpTrlBase;
+ UINT8 Nutrs;
+ VOID *TrlMapping;
+ VOID *UtpTmrlBase;
+ UINT8 Nutmrs;
+ VOID *TmrlMapping;
+
+ UFS_EXPOSED_LUNS Luns;
//
// For Non-blocking operation.
//
- EFI_EVENT TimerEvent;
- LIST_ENTRY Queue;
+ EFI_EVENT TimerEvent;
+ LIST_ENTRY Queue;
} UFS_PASS_THRU_PRIVATE_DATA;
-#define UFS_PASS_THRU_TRANS_REQ_SIG SIGNATURE_32 ('U', 'F', 'S', 'T')
+#define UFS_PASS_THRU_TRANS_REQ_SIG SIGNATURE_32 ('U', 'F', 'S', 'T')
typedef struct {
UINT32 Signature;
@@ -100,12 +100,12 @@ typedef struct {
#define UFS_PASS_THRU_TRANS_REQ_FROM_THIS(a) \
CR(a, UFS_PASS_THRU_TRANS_REQ, TransferList, UFS_PASS_THRU_TRANS_REQ_SIG)
-#define UFS_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
-#define UFS_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)
+#define UFS_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
+#define UFS_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)
-#define ROUNDUP8(x) (((x) % 8 == 0) ? (x) : ((x) / 8 + 1) * 8)
+#define ROUNDUP8(x) (((x) % 8 == 0) ? (x) : ((x) / 8 + 1) * 8)
-#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
+#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
#define UFS_PASS_THRU_PRIVATE_DATA_FROM_THIS(a) \
CR (a, \
@@ -129,19 +129,20 @@ typedef struct {
)
typedef struct _UFS_DEVICE_MANAGEMENT_REQUEST_PACKET {
- UINT64 Timeout;
- VOID *DataBuffer;
- UINT8 Opcode;
- UINT8 DescId;
- UINT8 Index;
- UINT8 Selector;
- UINT32 TransferLength;
- UINT8 DataDirection;
+ UINT64 Timeout;
+ VOID *DataBuffer;
+ UINT8 Opcode;
+ UINT8 DescId;
+ UINT8 Index;
+ UINT8 Selector;
+ UINT32 TransferLength;
+ UINT8 DataDirection;
} UFS_DEVICE_MANAGEMENT_REQUEST_PACKET;
//
// function prototype
//
+
/**
Tests to see if this driver supports a given controller. If a child device is provided,
it further tests to see if this driver supports creating a handle for the specified child device.
@@ -264,15 +265,16 @@ UfsPassThruDriverBindingStart (
EFI_STATUS
EFIAPI
UfsPassThruDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -320,7 +322,6 @@ UfsPassThruComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -392,11 +393,11 @@ UfsPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UfsPassThruComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
/**
@@ -443,11 +444,11 @@ UfsPassThruComponentNameGetControllerName (
EFI_STATUS
EFIAPI
UfsPassThruPassThru (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
);
/**
@@ -479,9 +480,9 @@ UfsPassThruPassThru (
EFI_STATUS
EFIAPI
UfsPassThruGetNextTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target,
- IN OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ IN OUT UINT64 *Lun
);
/**
@@ -514,10 +515,10 @@ UfsPassThruGetNextTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruBuildDevicePath (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -542,10 +543,10 @@ UfsPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
UfsPassThruGetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 **Target,
- OUT UINT64 *Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 **Target,
+ OUT UINT64 *Lun
);
/**
@@ -562,7 +563,7 @@ UfsPassThruGetTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruResetChannel (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
);
/**
@@ -587,9 +588,9 @@ UfsPassThruResetChannel (
EFI_STATUS
EFIAPI
UfsPassThruResetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun
);
/**
@@ -617,8 +618,8 @@ UfsPassThruResetTargetLun (
EFI_STATUS
EFIAPI
UfsPassThruGetNextTarget (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target
);
/**
@@ -664,7 +665,7 @@ UfsExecScsiCmds (
**/
EFI_STATUS
UfsControllerInit (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
);
/**
@@ -678,7 +679,7 @@ UfsControllerInit (
**/
EFI_STATUS
UfsControllerStop (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
);
/**
@@ -697,11 +698,11 @@ UfsControllerStop (
**/
EFI_STATUS
UfsAllocateAlignCommonBuffer (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINTN Size,
- OUT VOID **CmdDescHost,
- OUT EFI_PHYSICAL_ADDRESS *CmdDescPhyAddr,
- OUT VOID **CmdDescMapping
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINTN Size,
+ OUT VOID **CmdDescHost,
+ OUT EFI_PHYSICAL_ADDRESS *CmdDescPhyAddr,
+ OUT VOID **CmdDescMapping
);
/**
@@ -717,8 +718,8 @@ UfsAllocateAlignCommonBuffer (
**/
EFI_STATUS
UfsSetFlag (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 FlagId
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 FlagId
);
/**
@@ -735,9 +736,9 @@ UfsSetFlag (
**/
EFI_STATUS
UfsReadFlag (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 FlagId,
- OUT UINT8 *Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 FlagId,
+ OUT UINT8 *Value
);
/**
@@ -755,10 +756,10 @@ UfsReadFlag (
**/
EFI_STATUS
UfsRwFlags (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 FlagId,
- IN OUT UINT8 *Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 FlagId,
+ IN OUT UINT8 *Value
);
/**
@@ -781,13 +782,13 @@ UfsRwFlags (
**/
EFI_STATUS
UfsRwDeviceDesc (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT VOID *Descriptor,
- IN OUT UINT32 *DescSize
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT VOID *Descriptor,
+ IN OUT UINT32 *DescSize
);
/**
@@ -807,12 +808,12 @@ UfsRwDeviceDesc (
**/
EFI_STATUS
UfsRwAttributes (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 AttrId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT32 *Attributes
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 AttrId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT32 *Attributes
);
/**
@@ -830,7 +831,7 @@ UfsRwAttributes (
**/
EFI_STATUS
UfsExecNopCmds (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
);
/**
@@ -843,8 +844,8 @@ UfsExecNopCmds (
VOID
EFIAPI
ProcessAsyncTaskList (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -860,8 +861,8 @@ ProcessAsyncTaskList (
VOID
EFIAPI
SignalCallerEvent (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UFS_PASS_THRU_TRANS_REQ *TransReq
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UFS_PASS_THRU_TRANS_REQ *TransReq
);
/**
@@ -890,13 +891,13 @@ SignalCallerEvent (
EFI_STATUS
EFIAPI
UfsRwUfsDescriptor (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT8 *Descriptor,
- IN OUT UINT32 *DescSize
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT8 *Descriptor,
+ IN OUT UINT32 *DescSize
);
/**
@@ -920,10 +921,10 @@ UfsRwUfsDescriptor (
EFI_STATUS
EFIAPI
UfsRwUfsFlag (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 FlagId,
- IN OUT UINT8 *Flag
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 FlagId,
+ IN OUT UINT8 *Flag
);
/**
@@ -952,13 +953,13 @@ UfsRwUfsFlag (
EFI_STATUS
EFIAPI
UfsRwUfsAttribute (
- IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
- IN BOOLEAN Read,
- IN UINT8 AttrId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT8 *Attribute,
- IN OUT UINT32 *AttrSize
+ IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This,
+ IN BOOLEAN Read,
+ IN UINT8 AttrId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT8 *Attribute,
+ IN OUT UINT32 *AttrSize
);
/**
@@ -991,9 +992,9 @@ GetUfsHcInfo (
IN UFS_PASS_THRU_PRIVATE_DATA *Private
);
-extern EFI_COMPONENT_NAME_PROTOCOL gUfsPassThruComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gUfsPassThruComponentName2;
-extern EFI_DRIVER_BINDING_PROTOCOL gUfsPassThruDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL gUfsPassThruComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL gUfsPassThruComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gUfsPassThruDriverBinding;
extern EDKII_UFS_HC_PLATFORM_PROTOCOL *mUfsHcPlatform;
#endif
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index 0b1030ab47..eba35cc669 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -25,9 +25,9 @@
**/
EFI_STATUS
UfsMmioRead32 (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINTN Offset,
- OUT UINT32 *Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINTN Offset,
+ OUT UINT32 *Value
)
{
EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
@@ -55,9 +55,9 @@ UfsMmioRead32 (
**/
EFI_STATUS
UfsMmioWrite32 (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINTN Offset,
- IN UINT32 Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINTN Offset,
+ IN UINT32 Value
)
{
EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
@@ -87,17 +87,17 @@ UfsMmioWrite32 (
**/
EFI_STATUS
UfsWaitMemSet (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINTN Offset,
- IN UINT32 MaskValue,
- IN UINT32 TestValue,
- IN UINT64 Timeout
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINTN Offset,
+ IN UINT32 MaskValue,
+ IN UINT32 TestValue,
+ IN UINT64 Timeout
)
{
- UINT32 Value;
- UINT64 Delay;
- BOOLEAN InfiniteWait;
- EFI_STATUS Status;
+ UINT32 Value;
+ UINT64 Delay;
+ BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -128,7 +128,6 @@ UfsWaitMemSet (
MicroSecondDelay (1);
Delay--;
-
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
@@ -143,8 +142,8 @@ UfsWaitMemSet (
**/
VOID
DumpUicCmdExecResult (
- IN UINT8 UicOpcode,
- IN UINT8 Result
+ IN UINT8 UicOpcode,
+ IN UINT8 Result
)
{
if (UicOpcode <= UfsUicDmePeerSet) {
@@ -181,7 +180,7 @@ DumpUicCmdExecResult (
case 0x0A:
DEBUG ((DEBUG_VERBOSE, "UIC configuration command fails - DME_FAILURE\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -192,7 +191,7 @@ DumpUicCmdExecResult (
case 0x01:
DEBUG ((DEBUG_VERBOSE, "UIC control command fails - FAILURE\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -207,7 +206,7 @@ DumpUicCmdExecResult (
**/
VOID
DumpQueryResponseResult (
- IN UINT8 Result
+ IN UINT8 Result
)
{
switch (Result) {
@@ -241,7 +240,7 @@ DumpQueryResponseResult (
case 0xFF:
DEBUG ((DEBUG_VERBOSE, "Query Response with General Failure\n"));
break;
- default :
+ default:
ASSERT (FALSE);
break;
}
@@ -257,18 +256,18 @@ DumpQueryResponseResult (
**/
VOID
SwapLittleEndianToBigEndian (
- IN OUT UINT8 *Buffer,
- IN UINT32 BufferSize
+ IN OUT UINT8 *Buffer,
+ IN UINT32 BufferSize
)
{
- UINT32 Index;
- UINT8 Temp;
- UINT32 SwapCount;
+ UINT32 Index;
+ UINT8 Temp;
+ UINT32 SwapCount;
SwapCount = BufferSize / 2;
for (Index = 0; Index < SwapCount; Index++) {
- Temp = Buffer[Index];
- Buffer[Index] = Buffer[BufferSize - 1 - Index];
+ Temp = Buffer[Index];
+ Buffer[Index] = Buffer[BufferSize - 1 - Index];
Buffer[BufferSize - 1 - Index] = Temp;
}
}
@@ -287,32 +286,32 @@ SwapLittleEndianToBigEndian (
**/
VOID
UfsFillTsfOfQueryReqUpiu (
- IN OUT UTP_UPIU_TSF *TsfBase,
- IN UINT8 Opcode,
- IN UINT8 DescId OPTIONAL,
- IN UINT8 Index OPTIONAL,
- IN UINT8 Selector OPTIONAL,
- IN UINT16 Length OPTIONAL,
- IN UINT32 Value OPTIONAL
+ IN OUT UTP_UPIU_TSF *TsfBase,
+ IN UINT8 Opcode,
+ IN UINT8 DescId OPTIONAL,
+ IN UINT8 Index OPTIONAL,
+ IN UINT8 Selector OPTIONAL,
+ IN UINT16 Length OPTIONAL,
+ IN UINT32 Value OPTIONAL
)
{
ASSERT (TsfBase != NULL);
ASSERT (Opcode <= UtpQueryFuncOpcodeTogFlag);
- TsfBase->Opcode = Opcode;
+ TsfBase->Opcode = Opcode;
if (Opcode != UtpQueryFuncOpcodeNop) {
TsfBase->DescId = DescId;
TsfBase->Index = Index;
TsfBase->Selector = Selector;
if ((Opcode == UtpQueryFuncOpcodeRdDesc) || (Opcode == UtpQueryFuncOpcodeWrDesc)) {
- SwapLittleEndianToBigEndian ((UINT8*)&Length, sizeof (Length));
+ SwapLittleEndianToBigEndian ((UINT8 *)&Length, sizeof (Length));
TsfBase->Length = Length;
}
if (Opcode == UtpQueryFuncOpcodeWrAttr) {
- SwapLittleEndianToBigEndian ((UINT8*)&Value, sizeof (Value));
- TsfBase->Value = Value;
+ SwapLittleEndianToBigEndian ((UINT8 *)&Value, sizeof (Value));
+ TsfBase->Value = Value;
}
}
}
@@ -333,16 +332,16 @@ UfsFillTsfOfQueryReqUpiu (
**/
EFI_STATUS
UfsInitCommandUpiu (
- IN OUT UTP_COMMAND_UPIU *Command,
- IN UINT8 Lun,
- IN UINT8 TaskTag,
- IN UINT8 *Cdb,
- IN UINT8 CdbLength,
- IN UFS_DATA_DIRECTION DataDirection,
- IN UINT32 ExpDataTranLen
+ IN OUT UTP_COMMAND_UPIU *Command,
+ IN UINT8 Lun,
+ IN UINT8 TaskTag,
+ IN UINT8 *Cdb,
+ IN UINT8 CdbLength,
+ IN UFS_DATA_DIRECTION DataDirection,
+ IN UINT32 ExpDataTranLen
)
{
- UINT8 Flags;
+ UINT8 Flags;
ASSERT ((Command != NULL) && (Cdb != NULL));
@@ -365,7 +364,7 @@ UfsInitCommandUpiu (
Command->Lun = Lun;
Command->TaskTag = TaskTag;
Command->CmdSet = 0x00;
- SwapLittleEndianToBigEndian ((UINT8*)&ExpDataTranLen, sizeof (ExpDataTranLen));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ExpDataTranLen, sizeof (ExpDataTranLen));
Command->ExpDataTranLen = ExpDataTranLen;
CopyMem (Command->Cdb, Cdb, CdbLength);
@@ -385,15 +384,15 @@ UfsInitCommandUpiu (
**/
EFI_STATUS
UfsInitUtpPrdt (
- IN UTP_TR_PRD *Prdt,
- IN VOID *Buffer,
- IN UINT32 BufferSize
+ IN UTP_TR_PRD *Prdt,
+ IN VOID *Buffer,
+ IN UINT32 BufferSize
)
{
- UINT32 PrdtIndex;
- UINT32 RemainingLen;
- UINT8 *Remaining;
- UINTN PrdtNumber;
+ UINT32 PrdtIndex;
+ UINT32 RemainingLen;
+ UINT8 *Remaining;
+ UINTN PrdtNumber;
ASSERT (((UINTN)Buffer & (BIT0 | BIT1)) == 0);
ASSERT ((BufferSize & (BIT1 | BIT0)) == 0);
@@ -415,8 +414,8 @@ UfsInitUtpPrdt (
Prdt[PrdtIndex].DbAddr = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 2);
Prdt[PrdtIndex].DbAddrU = (UINT32)RShiftU64 ((UINT64)(UINTN)Remaining, 32);
- RemainingLen -= UFS_MAX_DATA_LEN_PER_PRD;
- Remaining += UFS_MAX_DATA_LEN_PER_PRD;
+ RemainingLen -= UFS_MAX_DATA_LEN_PER_PRD;
+ Remaining += UFS_MAX_DATA_LEN_PER_PRD;
}
return EFI_SUCCESS;
@@ -439,14 +438,14 @@ UfsInitUtpPrdt (
**/
EFI_STATUS
UfsInitQueryRequestUpiu (
- IN OUT UTP_QUERY_REQ_UPIU *QueryReq,
- IN UINT8 TaskTag,
- IN UINT8 Opcode,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN UINTN DataSize OPTIONAL,
- IN UINT8 *Data OPTIONAL
+ IN OUT UTP_QUERY_REQ_UPIU *QueryReq,
+ IN UINT8 TaskTag,
+ IN UINT8 Opcode,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN UINTN DataSize OPTIONAL,
+ IN UINT8 *Data OPTIONAL
)
{
ASSERT (QueryReq != NULL);
@@ -460,7 +459,7 @@ UfsInitQueryRequestUpiu (
}
if (Opcode == UtpQueryFuncOpcodeWrAttr) {
- UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, 0, *(UINT32*)Data);
+ UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, 0, *(UINT32 *)Data);
} else if ((Opcode == UtpQueryFuncOpcodeRdDesc) || (Opcode == UtpQueryFuncOpcodeWrDesc)) {
UfsFillTsfOfQueryReqUpiu (&QueryReq->Tsf, Opcode, DescId, Index, Selector, (UINT16)DataSize, 0);
} else {
@@ -470,7 +469,7 @@ UfsInitQueryRequestUpiu (
if (Opcode == UtpQueryFuncOpcodeWrDesc) {
CopyMem (QueryReq + 1, Data, DataSize);
- SwapLittleEndianToBigEndian ((UINT8*)&DataSize, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&DataSize, sizeof (UINT16));
QueryReq->DataSegLen = (UINT16)DataSize;
}
@@ -498,17 +497,17 @@ UfsCreateScsiCommandDesc (
IN UINT8 Lun,
IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
IN UTP_TRD *Trd,
- OUT VOID **CmdDescHost,
- OUT VOID **CmdDescMapping
+ OUT VOID **CmdDescHost,
+ OUT VOID **CmdDescMapping
)
{
- UINTN TotalLen;
- UINTN PrdtNumber;
- UTP_COMMAND_UPIU *CommandUpiu;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- EFI_STATUS Status;
- UINT32 DataLen;
- UFS_DATA_DIRECTION DataDirection;
+ UINTN TotalLen;
+ UINTN PrdtNumber;
+ UTP_COMMAND_UPIU *CommandUpiu;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ EFI_STATUS Status;
+ UINT32 DataLen;
+ UFS_DATA_DIRECTION DataDirection;
ASSERT ((Private != NULL) && (Packet != NULL) && (Trd != NULL));
@@ -526,14 +525,14 @@ UfsCreateScsiCommandDesc (
PrdtNumber = (UINTN)DivU64x32 ((UINT64)DataLen + UFS_MAX_DATA_LEN_PER_PRD - 1, UFS_MAX_DATA_LEN_PER_PRD);
- TotalLen = ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)) + PrdtNumber * sizeof (UTP_TR_PRD);
+ TotalLen = ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)) + PrdtNumber * sizeof (UTP_TR_PRD);
Status = UfsAllocateAlignCommonBuffer (Private, TotalLen, CmdDescHost, &CmdDescPhyAddr, CmdDescMapping);
if (EFI_ERROR (Status)) {
return Status;
}
- CommandUpiu = (UTP_COMMAND_UPIU*)*CmdDescHost;
+ CommandUpiu = (UTP_COMMAND_UPIU *)*CmdDescHost;
UfsInitCommandUpiu (CommandUpiu, Lun, Private->TaskTag++, Packet->Cdb, Packet->CdbLength, DataDirection, DataLen);
@@ -575,18 +574,18 @@ UfsCreateDMCommandDesc (
IN UFS_PASS_THRU_PRIVATE_DATA *Private,
IN UFS_DEVICE_MANAGEMENT_REQUEST_PACKET *Packet,
IN UTP_TRD *Trd,
- OUT VOID **CmdDescHost,
- OUT VOID **CmdDescMapping
+ OUT VOID **CmdDescHost,
+ OUT VOID **CmdDescMapping
)
{
- UINTN TotalLen;
- UTP_QUERY_REQ_UPIU *QueryReqUpiu;
- UINT8 Opcode;
- UINT32 DataSize;
- UINT8 *Data;
- UINT8 DataDirection;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- EFI_STATUS Status;
+ UINTN TotalLen;
+ UTP_QUERY_REQ_UPIU *QueryReqUpiu;
+ UINT8 Opcode;
+ UINT32 DataSize;
+ UINT8 *Data;
+ UINT8 DataDirection;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ EFI_STATUS Status;
ASSERT ((Private != NULL) && (Packet != NULL) && (Trd != NULL));
@@ -600,9 +599,10 @@ UfsCreateDMCommandDesc (
Data = Packet->DataBuffer;
if ((Opcode == UtpQueryFuncOpcodeWrDesc) || (Opcode == UtpQueryFuncOpcodeRdDesc)) {
- if (DataSize == 0 || Data == NULL) {
+ if ((DataSize == 0) || (Data == NULL)) {
return EFI_INVALID_PARAMETER;
}
+
TotalLen = ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize);
} else {
TotalLen = ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU));
@@ -616,7 +616,7 @@ UfsCreateDMCommandDesc (
//
// Initialize UTP QUERY REQUEST UPIU
//
- QueryReqUpiu = (UTP_QUERY_REQ_UPIU*)*CmdDescHost;
+ QueryReqUpiu = (UTP_QUERY_REQ_UPIU *)*CmdDescHost;
ASSERT (QueryReqUpiu != NULL);
UfsInitQueryRequestUpiu (
QueryReqUpiu,
@@ -640,11 +640,11 @@ UfsCreateDMCommandDesc (
Trd->UcdBa = (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 7);
Trd->UcdBaU = (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32);
if (Opcode == UtpQueryFuncOpcodeWrDesc) {
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
} else {
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));
}
return EFI_SUCCESS;
@@ -665,16 +665,16 @@ UfsCreateDMCommandDesc (
**/
EFI_STATUS
UfsCreateNopCommandDesc (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UTP_TRD *Trd,
- OUT VOID **CmdDescHost,
- OUT VOID **CmdDescMapping
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UTP_TRD *Trd,
+ OUT VOID **CmdDescHost,
+ OUT VOID **CmdDescMapping
)
{
- UINTN TotalLen;
- UTP_NOP_OUT_UPIU *NopOutUpiu;
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ UINTN TotalLen;
+ UTP_NOP_OUT_UPIU *NopOutUpiu;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
ASSERT ((Private != NULL) && (Trd != NULL));
@@ -684,7 +684,7 @@ UfsCreateNopCommandDesc (
return Status;
}
- NopOutUpiu = (UTP_NOP_OUT_UPIU*)*CmdDescHost;
+ NopOutUpiu = (UTP_NOP_OUT_UPIU *)*CmdDescHost;
ASSERT (NopOutUpiu != NULL);
NopOutUpiu->TaskTag = Private->TaskTag++;
@@ -716,23 +716,23 @@ UfsCreateNopCommandDesc (
**/
EFI_STATUS
UfsFindAvailableSlotInTrl (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- OUT UINT8 *Slot
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ OUT UINT8 *Slot
)
{
- UINT8 Nutrs;
- UINT8 Index;
- UINT32 Data;
- EFI_STATUS Status;
+ UINT8 Nutrs;
+ UINT8 Index;
+ UINT32 Data;
+ EFI_STATUS Status;
ASSERT ((Private != NULL) && (Slot != NULL));
- Status = UfsMmioRead32 (Private, UFS_HC_UTRLDBR_OFFSET, &Data);
+ Status = UfsMmioRead32 (Private, UFS_HC_UTRLDBR_OFFSET, &Data);
if (EFI_ERROR (Status)) {
return Status;
}
- Nutrs = (UINT8)((Private->UfsHcInfo.Capabilities & UFS_HC_CAP_NUTRS) + 1);
+ Nutrs = (UINT8)((Private->UfsHcInfo.Capabilities & UFS_HC_CAP_NUTRS) + 1);
for (Index = 0; Index < Nutrs; Index++) {
if ((Data & (BIT0 << Index)) == 0) {
@@ -744,7 +744,6 @@ UfsFindAvailableSlotInTrl (
return EFI_NOT_READY;
}
-
/**
Start specified slot in transfer list of a UFS device.
@@ -754,12 +753,12 @@ UfsFindAvailableSlotInTrl (
**/
EFI_STATUS
UfsStartExecCmd (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
Status = UfsMmioRead32 (Private, UFS_HC_UTRLRSR_OFFSET, &Data);
if (EFI_ERROR (Status)) {
@@ -790,12 +789,12 @@ UfsStartExecCmd (
**/
EFI_STATUS
UfsStopExecCmd (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 Slot
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 Slot
)
{
- UINT32 Data;
- EFI_STATUS Status;
+ UINT32 Data;
+ EFI_STATUS Status;
Status = UfsMmioRead32 (Private, UFS_HC_UTRLDBR_OFFSET, &Data);
if (EFI_ERROR (Status)) {
@@ -837,14 +836,14 @@ UfsGetReturnDataFromQueryResponse (
UINT16 ReturnDataSize;
UINT32 ReturnData;
- if (Packet == NULL || QueryResp == NULL) {
+ if ((Packet == NULL) || (QueryResp == NULL)) {
return EFI_INVALID_PARAMETER;
}
switch (Packet->Opcode) {
case UtpQueryFuncOpcodeRdDesc:
ReturnDataSize = QueryResp->Tsf.Length;
- SwapLittleEndianToBigEndian ((UINT8*)&ReturnDataSize, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ReturnDataSize, sizeof (UINT16));
//
// Make sure the hardware device does not return more data than expected.
//
@@ -857,7 +856,7 @@ UfsGetReturnDataFromQueryResponse (
break;
case UtpQueryFuncOpcodeWrDesc:
ReturnDataSize = QueryResp->Tsf.Length;
- SwapLittleEndianToBigEndian ((UINT8*)&ReturnDataSize, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ReturnDataSize, sizeof (UINT16));
Packet->TransferLength = ReturnDataSize;
break;
case UtpQueryFuncOpcodeRdFlag:
@@ -867,12 +866,12 @@ UfsGetReturnDataFromQueryResponse (
//
// The 'FLAG VALUE' field is at byte offset 3 of QueryResp->Tsf.Value
//
- *((UINT8*)(Packet->DataBuffer)) = *((UINT8*)&(QueryResp->Tsf.Value) + 3);
+ *((UINT8 *)(Packet->DataBuffer)) = *((UINT8 *)&(QueryResp->Tsf.Value) + 3);
break;
case UtpQueryFuncOpcodeRdAttr:
case UtpQueryFuncOpcodeWrAttr:
ReturnData = QueryResp->Tsf.Value;
- SwapLittleEndianToBigEndian ((UINT8*) &ReturnData, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ReturnData, sizeof (UINT32));
CopyMem (Packet->DataBuffer, &ReturnData, sizeof (UINT32));
break;
default:
@@ -918,7 +917,7 @@ UfsSendDmRequestRetry (
return Status;
}
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
//
// Fill transfer request descriptor to this slot.
//
@@ -928,8 +927,8 @@ UfsSendDmRequestRetry (
return Status;
}
- UfsHc = Private->UfsHostController;
- QueryResp = (UTP_QUERY_RESP_UPIU*)((UINT8*)CmdDescHost + Trd->RuO * sizeof (UINT32));
+ UfsHc = Private->UfsHostController;
+ QueryResp = (UTP_QUERY_RESP_UPIU *)((UINT8 *)CmdDescHost + Trd->RuO * sizeof (UINT32));
ASSERT (QueryResp != NULL);
CmdDescSize = Trd->RuO * sizeof (UINT32) + Trd->RuL * sizeof (UINT32);
@@ -946,17 +945,19 @@ UfsSendDmRequestRetry (
goto Exit;
}
- if (Trd->Ocs != 0 || QueryResp->QueryResp != UfsUtpQueryResponseSuccess) {
+ if ((Trd->Ocs != 0) || (QueryResp->QueryResp != UfsUtpQueryResponseSuccess)) {
DEBUG ((DEBUG_ERROR, "Failed to send query request, OCS = %X, QueryResp = %X\n", Trd->Ocs, QueryResp->QueryResp));
DumpQueryResponseResult (QueryResp->QueryResp);
if ((QueryResp->QueryResp == UfsUtpQueryResponseInvalidSelector) ||
(QueryResp->QueryResp == UfsUtpQueryResponseInvalidIndex) ||
- (QueryResp->QueryResp == UfsUtpQueryResponseInvalidIdn)) {
+ (QueryResp->QueryResp == UfsUtpQueryResponseInvalidIdn))
+ {
Status = EFI_INVALID_PARAMETER;
} else {
Status = EFI_DEVICE_ERROR;
}
+
goto Exit;
}
@@ -974,6 +975,7 @@ Exit:
if (CmdDescMapping != NULL) {
UfsHc->Unmap (UfsHc, CmdDescMapping);
}
+
if (CmdDescHost != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (CmdDescSize), CmdDescHost);
}
@@ -1005,7 +1007,7 @@ UfsSendDmRequest (
Status = EFI_SUCCESS;
- for (Retry = 0; Retry < 5; Retry ++) {
+ for (Retry = 0; Retry < 5; Retry++) {
Status = UfsSendDmRequestRetry (Private, Packet);
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
@@ -1038,17 +1040,17 @@ UfsSendDmRequest (
**/
EFI_STATUS
UfsRwDeviceDesc (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 DescId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT VOID *Descriptor,
- IN OUT UINT32 *DescSize
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 DescId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT VOID *Descriptor,
+ IN OUT UINT32 *DescSize
)
{
- UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
- EFI_STATUS Status;
+ UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
+ EFI_STATUS Status;
if (DescSize == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1057,18 +1059,19 @@ UfsRwDeviceDesc (
ZeroMem (&Packet, sizeof (UFS_DEVICE_MANAGEMENT_REQUEST_PACKET));
if (Read) {
- Packet.DataDirection = UfsDataIn;
- Packet.Opcode = UtpQueryFuncOpcodeRdDesc;
+ Packet.DataDirection = UfsDataIn;
+ Packet.Opcode = UtpQueryFuncOpcodeRdDesc;
} else {
- Packet.DataDirection = UfsDataOut;
- Packet.Opcode = UtpQueryFuncOpcodeWrDesc;
+ Packet.DataDirection = UfsDataOut;
+ Packet.Opcode = UtpQueryFuncOpcodeWrDesc;
}
- Packet.DataBuffer = Descriptor;
- Packet.TransferLength = *DescSize;
- Packet.DescId = DescId;
- Packet.Index = Index;
- Packet.Selector = Selector;
- Packet.Timeout = UFS_TIMEOUT;
+
+ Packet.DataBuffer = Descriptor;
+ Packet.TransferLength = *DescSize;
+ Packet.DescId = DescId;
+ Packet.Index = Index;
+ Packet.Selector = Selector;
+ Packet.Timeout = UFS_TIMEOUT;
Status = UfsSendDmRequest (Private, &Packet);
if (EFI_ERROR (Status)) {
@@ -1099,30 +1102,31 @@ UfsRwDeviceDesc (
**/
EFI_STATUS
UfsRwAttributes (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 AttrId,
- IN UINT8 Index,
- IN UINT8 Selector,
- IN OUT UINT32 *Attributes
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 AttrId,
+ IN UINT8 Index,
+ IN UINT8 Selector,
+ IN OUT UINT32 *Attributes
)
{
- UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
+ UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
ZeroMem (&Packet, sizeof (UFS_DEVICE_MANAGEMENT_REQUEST_PACKET));
if (Read) {
- Packet.DataDirection = UfsDataIn;
- Packet.Opcode = UtpQueryFuncOpcodeRdAttr;
+ Packet.DataDirection = UfsDataIn;
+ Packet.Opcode = UtpQueryFuncOpcodeRdAttr;
} else {
- Packet.DataDirection = UfsDataOut;
- Packet.Opcode = UtpQueryFuncOpcodeWrAttr;
+ Packet.DataDirection = UfsDataOut;
+ Packet.Opcode = UtpQueryFuncOpcodeWrAttr;
}
- Packet.DataBuffer = Attributes;
- Packet.DescId = AttrId;
- Packet.Index = Index;
- Packet.Selector = Selector;
- Packet.Timeout = UFS_TIMEOUT;
+
+ Packet.DataBuffer = Attributes;
+ Packet.DescId = AttrId;
+ Packet.Index = Index;
+ Packet.Selector = Selector;
+ Packet.Timeout = UFS_TIMEOUT;
return UfsSendDmRequest (Private, &Packet);
}
@@ -1143,13 +1147,13 @@ UfsRwAttributes (
**/
EFI_STATUS
UfsRwFlags (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN BOOLEAN Read,
- IN UINT8 FlagId,
- IN OUT UINT8 *Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN BOOLEAN Read,
+ IN UINT8 FlagId,
+ IN OUT UINT8 *Value
)
{
- UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
+ UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
if (Value == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1159,23 +1163,24 @@ UfsRwFlags (
if (Read) {
ASSERT (Value != NULL);
- Packet.DataDirection = UfsDataIn;
- Packet.Opcode = UtpQueryFuncOpcodeRdFlag;
+ Packet.DataDirection = UfsDataIn;
+ Packet.Opcode = UtpQueryFuncOpcodeRdFlag;
} else {
- Packet.DataDirection = UfsDataOut;
+ Packet.DataDirection = UfsDataOut;
if (*Value == 1) {
- Packet.Opcode = UtpQueryFuncOpcodeSetFlag;
+ Packet.Opcode = UtpQueryFuncOpcodeSetFlag;
} else if (*Value == 0) {
- Packet.Opcode = UtpQueryFuncOpcodeClrFlag;
+ Packet.Opcode = UtpQueryFuncOpcodeClrFlag;
} else {
return EFI_INVALID_PARAMETER;
}
}
- Packet.DataBuffer = Value;
- Packet.DescId = FlagId;
- Packet.Index = 0;
- Packet.Selector = 0;
- Packet.Timeout = UFS_TIMEOUT;
+
+ Packet.DataBuffer = Value;
+ Packet.DescId = FlagId;
+ Packet.Index = 0;
+ Packet.Selector = 0;
+ Packet.Timeout = UFS_TIMEOUT;
return UfsSendDmRequest (Private, &Packet);
}
@@ -1193,12 +1198,12 @@ UfsRwFlags (
**/
EFI_STATUS
UfsSetFlag (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 FlagId
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 FlagId
)
{
- EFI_STATUS Status;
- UINT8 Value;
+ EFI_STATUS Status;
+ UINT8 Value;
Value = 1;
Status = UfsRwFlags (Private, FALSE, FlagId, &Value);
@@ -1220,12 +1225,12 @@ UfsSetFlag (
**/
EFI_STATUS
UfsReadFlag (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINT8 FlagId,
- OUT UINT8 *Value
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINT8 FlagId,
+ OUT UINT8 *Value
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UfsRwFlags (Private, TRUE, FlagId, Value);
@@ -1247,17 +1252,17 @@ UfsReadFlag (
**/
EFI_STATUS
UfsExecNopCmds (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINT8 Slot;
- UTP_TRD *Trd;
- UTP_NOP_IN_UPIU *NopInUpiu;
- UINT32 CmdDescSize;
- VOID *CmdDescHost;
- VOID *CmdDescMapping;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ EFI_STATUS Status;
+ UINT8 Slot;
+ UTP_TRD *Trd;
+ UTP_NOP_IN_UPIU *NopInUpiu;
+ UINT32 CmdDescSize;
+ VOID *CmdDescHost;
+ VOID *CmdDescMapping;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
//
// Find out which slot of transfer request list is available.
@@ -1267,7 +1272,7 @@ UfsExecNopCmds (
return Status;
}
- Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;
+ Trd = ((UTP_TRD *)Private->UtpTrlBase) + Slot;
Status = UfsCreateNopCommandDesc (Private, Trd, &CmdDescHost, &CmdDescMapping);
if (EFI_ERROR (Status)) {
return Status;
@@ -1276,8 +1281,8 @@ UfsExecNopCmds (
//
// Check the transfer request result.
//
- UfsHc = Private->UfsHostController;
- NopInUpiu = (UTP_NOP_IN_UPIU*)((UINT8*)CmdDescHost + Trd->RuO * sizeof (UINT32));
+ UfsHc = Private->UfsHostController;
+ NopInUpiu = (UTP_NOP_IN_UPIU *)((UINT8 *)CmdDescHost + Trd->RuO * sizeof (UINT32));
ASSERT (NopInUpiu != NULL);
CmdDescSize = Trd->RuO * sizeof (UINT32) + Trd->RuL * sizeof (UINT32);
@@ -1308,6 +1313,7 @@ Exit:
if (CmdDescMapping != NULL) {
UfsHc->Unmap (UfsHc, CmdDescMapping);
}
+
if (CmdDescHost != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (CmdDescSize), CmdDescHost);
}
@@ -1346,6 +1352,7 @@ UfsReconcileDataTransferBuffer (
if (TransReq->Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) {
CopyMem (TransReq->Packet->InDataBuffer, TransReq->AlignedDataBuf, TransReq->Packet->InTransferLength);
}
+
//
// Wipe out the transfer buffer in case it contains sensitive data.
//
@@ -1393,14 +1400,16 @@ UfsPrepareDataTransferBuffer (
if (DataBuf == NULL) {
return EFI_DEVICE_ERROR;
}
+
ZeroMem (DataBuf, DataLen);
- TransReq->AlignedDataBuf = DataBuf;
+ TransReq->AlignedDataBuf = DataBuf;
TransReq->AlignedDataBufSize = DataLen;
} else {
- DataLen = TransReq->Packet->InTransferLength;
- DataBuf = TransReq->Packet->InDataBuffer;
+ DataLen = TransReq->Packet->InTransferLength;
+ DataBuf = TransReq->Packet->InDataBuffer;
}
- Flag = EdkiiUfsHcOperationBusMasterWrite;
+
+ Flag = EdkiiUfsHcOperationBusMasterWrite;
} else {
if (((UINTN)TransReq->Packet->OutDataBuffer % 4 != 0) || (TransReq->Packet->OutTransferLength % 4 != 0)) {
DataLen = TransReq->Packet->OutTransferLength + (4 - (TransReq->Packet->OutTransferLength % 4));
@@ -1408,14 +1417,16 @@ UfsPrepareDataTransferBuffer (
if (DataBuf == NULL) {
return EFI_DEVICE_ERROR;
}
+
CopyMem (DataBuf, TransReq->Packet->OutDataBuffer, TransReq->Packet->OutTransferLength);
- TransReq->AlignedDataBuf = DataBuf;
+ TransReq->AlignedDataBuf = DataBuf;
TransReq->AlignedDataBufSize = DataLen;
} else {
- DataLen = TransReq->Packet->OutTransferLength;
- DataBuf = TransReq->Packet->OutDataBuffer;
+ DataLen = TransReq->Packet->OutTransferLength;
+ DataBuf = TransReq->Packet->OutDataBuffer;
}
- Flag = EdkiiUfsHcOperationBusMasterRead;
+
+ Flag = EdkiiUfsHcOperationBusMasterRead;
}
if (DataLen != 0) {
@@ -1438,6 +1449,7 @@ UfsPrepareDataTransferBuffer (
FreeAlignedPages (TransReq->AlignedDataBuf, EFI_SIZE_TO_PAGES (TransReq->AlignedDataBufSize));
TransReq->AlignedDataBuf = NULL;
}
+
return EFI_DEVICE_ERROR;
}
}
@@ -1445,9 +1457,9 @@ UfsPrepareDataTransferBuffer (
//
// Fill PRDT table of Command UPIU for executed SCSI cmd.
//
- PrdtBase = (UTP_TR_PRD*)((UINT8*)TransReq->CmdDescHost + ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)));
+ PrdtBase = (UTP_TR_PRD *)((UINT8 *)TransReq->CmdDescHost + ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)));
ASSERT (PrdtBase != NULL);
- UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)DataBufPhyAddr, DataLen);
+ UfsInitUtpPrdt (PrdtBase, (VOID *)(UINTN)DataBufPhyAddr, DataLen);
return EFI_SUCCESS;
}
@@ -1484,13 +1496,13 @@ UfsExecScsiCmds (
IN EFI_EVENT Event OPTIONAL
)
{
- EFI_STATUS Status;
- UTP_RESPONSE_UPIU *Response;
- UINT16 SenseDataLen;
- UINT32 ResTranCount;
- EFI_TPL OldTpl;
- UFS_PASS_THRU_TRANS_REQ *TransReq;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ EFI_STATUS Status;
+ UTP_RESPONSE_UPIU *Response;
+ UINT16 SenseDataLen;
+ UINT32 ResTranCount;
+ EFI_TPL OldTpl;
+ UFS_PASS_THRU_TRANS_REQ *TransReq;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
TransReq = AllocateZeroPool (sizeof (UFS_PASS_THRU_TRANS_REQ));
if (TransReq == NULL) {
@@ -1501,7 +1513,7 @@ UfsExecScsiCmds (
TransReq->TimeoutRemain = Packet->Timeout;
TransReq->Packet = Packet;
- UfsHc = Private->UfsHostController;
+ UfsHc = Private->UfsHostController;
//
// Find out which slot of transfer request list is available.
//
@@ -1510,7 +1522,7 @@ UfsExecScsiCmds (
return Status;
}
- TransReq->Trd = ((UTP_TRD*)Private->UtpTrlBase) + TransReq->Slot;
+ TransReq->Trd = ((UTP_TRD *)Private->UtpTrlBase) + TransReq->Slot;
//
// Fill transfer request descriptor to this slot.
@@ -1538,7 +1550,7 @@ UfsExecScsiCmds (
// Insert the async SCSI cmd to the Async I/O list
//
if (Event != NULL) {
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
+ OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
TransReq->CallerEvent = Event;
InsertTailList (&Private->Queue, &TransReq->TransferList);
gBS->RestoreTPL (OldTpl);
@@ -1567,10 +1579,10 @@ UfsExecScsiCmds (
//
// Get sense data if exists
//
- Response = (UTP_RESPONSE_UPIU*)((UINT8*)TransReq->CmdDescHost + TransReq->Trd->RuO * sizeof (UINT32));
+ Response = (UTP_RESPONSE_UPIU *)((UINT8 *)TransReq->CmdDescHost + TransReq->Trd->RuO * sizeof (UINT32));
ASSERT (Response != NULL);
SenseDataLen = Response->SenseDataLen;
- SwapLittleEndianToBigEndian ((UINT8*)&SenseDataLen, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&SenseDataLen, sizeof (UINT16));
if ((Packet->SenseDataLength != 0) && (Packet->SenseData != NULL)) {
//
@@ -1598,13 +1610,13 @@ UfsExecScsiCmds (
if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->InTransferLength -= ResTranCount;
}
} else {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->OutTransferLength -= ResTranCount;
}
}
@@ -1623,12 +1635,15 @@ Exit1:
if (TransReq->CmdDescMapping != NULL) {
UfsHc->Unmap (UfsHc, TransReq->CmdDescMapping);
}
+
if (TransReq->CmdDescHost != NULL) {
UfsHc->FreeBuffer (UfsHc, EFI_SIZE_TO_PAGES (TransReq->CmdDescSize), TransReq->CmdDescHost);
}
+
if (TransReq != NULL) {
FreePool (TransReq);
}
+
return Status;
}
@@ -1644,8 +1659,8 @@ Exit1:
**/
EFI_STATUS
UfsExecUicCommands (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN OUT EDKII_UIC_COMMAND *UicCommand
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN OUT EDKII_UIC_COMMAND *UicCommand
)
{
EFI_STATUS Status;
@@ -1703,7 +1718,7 @@ UfsExecUicCommands (
// UFS 2.0 spec section 5.3.1 Offset:0x20 IS.Bit10 UIC Command Completion Status (UCCS)
// This bit is set to '1' by the host controller upon completion of a UIC command.
//
- Status = UfsWaitMemSet (Private, UFS_HC_IS_OFFSET, UFS_HC_IS_UCCS, UFS_HC_IS_UCCS, UFS_TIMEOUT);
+ Status = UfsWaitMemSet (Private, UFS_HC_IS_OFFSET, UFS_HC_IS_UCCS, UFS_HC_IS_UCCS, UFS_TIMEOUT);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1713,14 +1728,16 @@ UfsExecUicCommands (
if (EFI_ERROR (Status)) {
return Status;
}
+
Status = UfsMmioRead32 (Private, UFS_HC_UCMD_ARG3_OFFSET, &UicCommand->Arg3);
if (EFI_ERROR (Status)) {
return Status;
}
+
if ((UicCommand->Arg2 & 0xFF) != 0) {
- DEBUG_CODE_BEGIN();
- DumpUicCmdExecResult ((UINT8)UicCommand->Opcode, (UINT8)(UicCommand->Arg2 & 0xFF));
- DEBUG_CODE_END();
+ DEBUG_CODE_BEGIN ();
+ DumpUicCmdExecResult ((UINT8)UicCommand->Opcode, (UINT8)(UicCommand->Arg2 & 0xFF));
+ DEBUG_CODE_END ();
return EFI_DEVICE_ERROR;
}
}
@@ -1744,17 +1761,17 @@ UfsExecUicCommands (
**/
EFI_STATUS
UfsAllocateAlignCommonBuffer (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UINTN Size,
- OUT VOID **CmdDescHost,
- OUT EFI_PHYSICAL_ADDRESS *CmdDescPhyAddr,
- OUT VOID **CmdDescMapping
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UINTN Size,
+ OUT VOID **CmdDescHost,
+ OUT EFI_PHYSICAL_ADDRESS *CmdDescPhyAddr,
+ OUT VOID **CmdDescMapping
)
{
- EFI_STATUS Status;
- UINTN Bytes;
- BOOLEAN Is32BitAddr;
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ EFI_STATUS Status;
+ UINTN Bytes;
+ BOOLEAN Is32BitAddr;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
if ((Private->UfsHcInfo.Capabilities & UFS_HC_CAP_64ADDR) == UFS_HC_CAP_64ADDR) {
Is32BitAddr = FALSE;
@@ -1831,13 +1848,13 @@ UfsAllocateAlignCommonBuffer (
**/
EFI_STATUS
UfsEnableHostController (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
- if (mUfsHcPlatform != NULL && mUfsHcPlatform->Callback != NULL) {
+ if ((mUfsHcPlatform != NULL) && (mUfsHcPlatform->Callback != NULL)) {
Status = mUfsHcPlatform->Callback (Private->Handle, EdkiiUfsHcPreHce, &Private->UfsHcDriverInterface);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failure from platform driver during EdkiiUfsHcPreHce, Status = %r\n", Status));
@@ -1863,6 +1880,7 @@ UfsEnableHostController (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Wait until HCE is read as '0' before continuing.
//
@@ -1888,7 +1906,7 @@ UfsEnableHostController (
return EFI_DEVICE_ERROR;
}
- if (mUfsHcPlatform != NULL && mUfsHcPlatform->Callback != NULL) {
+ if ((mUfsHcPlatform != NULL) && (mUfsHcPlatform->Callback != NULL)) {
Status = mUfsHcPlatform->Callback (Private->Handle, EdkiiUfsHcPostHce, &Private->UfsHcDriverInterface);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failure from platform driver during EdkiiUfsHcPostHce, Status = %r\n", Status));
@@ -1911,7 +1929,7 @@ UfsEnableHostController (
**/
EFI_STATUS
UfsDeviceDetection (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
UINTN Retry;
@@ -1919,7 +1937,7 @@ UfsDeviceDetection (
UINT32 Data;
EDKII_UIC_COMMAND LinkStartupCommand;
- if (mUfsHcPlatform != NULL && mUfsHcPlatform->Callback != NULL) {
+ if ((mUfsHcPlatform != NULL) && (mUfsHcPlatform->Callback != NULL)) {
Status = mUfsHcPlatform->Callback (Private->Handle, EdkiiUfsHcPreLinkStartup, &Private->UfsHcDriverInterface);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failure from platform driver during EdkiiUfsHcPreLinkStartup, Status = %r\n", Status));
@@ -1933,10 +1951,10 @@ UfsDeviceDetection (
//
for (Retry = 0; Retry < 3; Retry++) {
LinkStartupCommand.Opcode = UfsUicDmeLinkStartup;
- LinkStartupCommand.Arg1 = 0;
- LinkStartupCommand.Arg2 = 0;
- LinkStartupCommand.Arg3 = 0;
- Status = UfsExecUicCommands (Private, &LinkStartupCommand);
+ LinkStartupCommand.Arg1 = 0;
+ LinkStartupCommand.Arg2 = 0;
+ LinkStartupCommand.Arg3 = 0;
+ Status = UfsExecUicCommands (Private, &LinkStartupCommand);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
@@ -1952,13 +1970,14 @@ UfsDeviceDetection (
return EFI_DEVICE_ERROR;
}
} else {
- if (mUfsHcPlatform != NULL && mUfsHcPlatform->Callback != NULL) {
+ if ((mUfsHcPlatform != NULL) && (mUfsHcPlatform->Callback != NULL)) {
Status = mUfsHcPlatform->Callback (Private->Handle, EdkiiUfsHcPostLinkStartup, &Private->UfsHcDriverInterface);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failure from platform driver during EdkiiUfsHcPostLinkStartup, Status = %r\n", Status));
return Status;
}
}
+
return EFI_SUCCESS;
}
}
@@ -1977,14 +1996,14 @@ UfsDeviceDetection (
**/
EFI_STATUS
UfsInitTaskManagementRequestList (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- UINT8 Nutmrs;
- VOID *CmdDescHost;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- VOID *CmdDescMapping;
- EFI_STATUS Status;
+ UINT8 Nutmrs;
+ VOID *CmdDescHost;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ VOID *CmdDescMapping;
+ EFI_STATUS Status;
//
// Initial h/w and s/w context for future operations.
@@ -1996,7 +2015,7 @@ UfsInitTaskManagementRequestList (
//
// Allocate and initialize UTP Task Management Request List.
//
- Nutmrs = (UINT8) (RShiftU64 ((Private->UfsHcInfo.Capabilities & UFS_HC_CAP_NUTMRS), 16) + 1);
+ Nutmrs = (UINT8)(RShiftU64 ((Private->UfsHcInfo.Capabilities & UFS_HC_CAP_NUTMRS), 16) + 1);
Status = UfsAllocateAlignCommonBuffer (Private, Nutmrs * sizeof (UTP_TMRD), &CmdDescHost, &CmdDescPhyAddr, &CmdDescMapping);
if (EFI_ERROR (Status)) {
return Status;
@@ -2015,6 +2034,7 @@ UfsInitTaskManagementRequestList (
if (EFI_ERROR (Status)) {
return Status;
}
+
Private->UtpTmrlBase = CmdDescHost;
Private->Nutmrs = Nutmrs;
Private->TmrlMapping = CmdDescMapping;
@@ -2042,14 +2062,14 @@ UfsInitTaskManagementRequestList (
**/
EFI_STATUS
UfsInitTransferRequestList (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- UINT8 Nutrs;
- VOID *CmdDescHost;
- EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
- VOID *CmdDescMapping;
- EFI_STATUS Status;
+ UINT8 Nutrs;
+ VOID *CmdDescHost;
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;
+ VOID *CmdDescMapping;
+ EFI_STATUS Status;
//
// Initial h/w and s/w context for future operations.
@@ -2108,10 +2128,10 @@ UfsInitTransferRequestList (
**/
EFI_STATUS
UfsControllerInit (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UfsEnableHostController (Private);
if (EFI_ERROR (Status)) {
@@ -2152,11 +2172,11 @@ UfsControllerInit (
**/
EFI_STATUS
UfsControllerStop (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
//
// Enable the UTP Task Management Request List by setting the UTP Task Management
@@ -2183,6 +2203,7 @@ UfsControllerStop (
if (EFI_ERROR (Status)) {
return Status;
}
+
ASSERT ((Data & UFS_HC_HCE_EN) == UFS_HC_HCE_EN);
Status = UfsMmioWrite32 (Private, UFS_HC_ENABLE_OFFSET, 0);
@@ -2216,17 +2237,17 @@ UfsControllerStop (
VOID
EFIAPI
SignalCallerEvent (
- IN UFS_PASS_THRU_PRIVATE_DATA *Private,
- IN UFS_PASS_THRU_TRANS_REQ *TransReq
+ IN UFS_PASS_THRU_PRIVATE_DATA *Private,
+ IN UFS_PASS_THRU_TRANS_REQ *TransReq
)
{
- EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
- EFI_EVENT CallerEvent;
+ EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
+ EFI_EVENT CallerEvent;
ASSERT ((Private != NULL) && (TransReq != NULL));
- UfsHc = Private->UfsHostController;
- CallerEvent = TransReq->CallerEvent;
+ UfsHc = Private->UfsHostController;
+ CallerEvent = TransReq->CallerEvent;
RemoveEntryList (&TransReq->TransferList);
@@ -2239,6 +2260,7 @@ SignalCallerEvent (
if (TransReq->CmdDescMapping != NULL) {
UfsHc->Unmap (UfsHc, TransReq->CmdDescMapping);
}
+
if (TransReq->CmdDescHost != NULL) {
UfsHc->FreeBuffer (
UfsHc,
@@ -2263,36 +2285,37 @@ SignalCallerEvent (
VOID
EFIAPI
ProcessAsyncTaskList (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- UFS_PASS_THRU_PRIVATE_DATA *Private;
- LIST_ENTRY *Entry;
- LIST_ENTRY *NextEntry;
- UFS_PASS_THRU_TRANS_REQ *TransReq;
- EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet;
- UTP_RESPONSE_UPIU *Response;
- UINT16 SenseDataLen;
- UINT32 ResTranCount;
- UINT32 SlotsMap;
- UINT32 Value;
- EFI_STATUS Status;
-
- Private = (UFS_PASS_THRU_PRIVATE_DATA*) Context;
- SlotsMap = 0;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *NextEntry;
+ UFS_PASS_THRU_TRANS_REQ *TransReq;
+ EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet;
+ UTP_RESPONSE_UPIU *Response;
+ UINT16 SenseDataLen;
+ UINT32 ResTranCount;
+ UINT32 SlotsMap;
+ UINT32 Value;
+ EFI_STATUS Status;
+
+ Private = (UFS_PASS_THRU_PRIVATE_DATA *)Context;
+ SlotsMap = 0;
//
// Check the entries in the async I/O queue are done or not.
//
- if (!IsListEmpty(&Private->Queue)) {
+ if (!IsListEmpty (&Private->Queue)) {
BASE_LIST_FOR_EACH_SAFE (Entry, NextEntry, &Private->Queue) {
- TransReq = UFS_PASS_THRU_TRANS_REQ_FROM_THIS (Entry);
- Packet = TransReq->Packet;
+ TransReq = UFS_PASS_THRU_TRANS_REQ_FROM_THIS (Entry);
+ Packet = TransReq->Packet;
if ((SlotsMap & (BIT0 << TransReq->Slot)) != 0) {
return;
}
+
SlotsMap |= BIT0 << TransReq->Slot;
Status = UfsMmioRead32 (Private, UFS_HC_UTRLDBR_OFFSET, &Value);
@@ -2329,10 +2352,10 @@ ProcessAsyncTaskList (
//
// Get sense data if exists
//
- Response = (UTP_RESPONSE_UPIU*)((UINT8*)TransReq->CmdDescHost + TransReq->Trd->RuO * sizeof (UINT32));
+ Response = (UTP_RESPONSE_UPIU *)((UINT8 *)TransReq->CmdDescHost + TransReq->Trd->RuO * sizeof (UINT32));
ASSERT (Response != NULL);
SenseDataLen = Response->SenseDataLen;
- SwapLittleEndianToBigEndian ((UINT8*)&SenseDataLen, sizeof (UINT16));
+ SwapLittleEndianToBigEndian ((UINT8 *)&SenseDataLen, sizeof (UINT16));
if ((Packet->SenseDataLength != 0) && (Packet->SenseData != NULL)) {
//
@@ -2360,13 +2383,13 @@ ProcessAsyncTaskList (
if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->InTransferLength -= ResTranCount;
}
} else {
if ((Response->Flags & BIT5) == BIT5) {
ResTranCount = Response->ResTranCount;
- SwapLittleEndianToBigEndian ((UINT8*)&ResTranCount, sizeof (UINT32));
+ SwapLittleEndianToBigEndian ((UINT8 *)&ResTranCount, sizeof (UINT32));
Packet->OutTransferLength -= ResTranCount;
}
}
@@ -2400,9 +2423,9 @@ UfsHcDriverInterfaceExecUicCommand (
IN OUT EDKII_UIC_COMMAND *UicCommand
)
{
- UFS_PASS_THRU_PRIVATE_DATA *Private;
+ UFS_PASS_THRU_PRIVATE_DATA *Private;
- if (This == NULL || UicCommand == NULL) {
+ if ((This == NULL) || (UicCommand == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -2441,7 +2464,7 @@ GetUfsHcInfo (
Private->UfsHcInfo.Capabilities = Data;
- if (mUfsHcPlatform != NULL && mUfsHcPlatform->OverrideHcInfo != NULL) {
+ if ((mUfsHcPlatform != NULL) && (mUfsHcPlatform->OverrideHcInfo != NULL)) {
Status = mUfsHcPlatform->OverrideHcInfo (Private->Handle, &Private->UfsHcInfo);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failure from platform on OverrideHcInfo, Status = %r\n", Status));
@@ -2451,4 +2474,3 @@ GetUfsHcInfo (
return EFI_SUCCESS;
}
-
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.h b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.h
index e8b5aae702..f19b6535a1 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.h
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.h
@@ -13,62 +13,62 @@
//
// Host Capabilities Register Offsets
//
-#define UFS_HC_CAP_OFFSET 0x0000 // Controller Capabilities
-#define UFS_HC_VER_OFFSET 0x0008 // Version
-#define UFS_HC_DDID_OFFSET 0x0010 // Device ID and Device Class
-#define UFS_HC_PMID_OFFSET 0x0014 // Product ID and Manufacturer ID
-#define UFS_HC_AHIT_OFFSET 0x0018 // Auto-Hibernate Idle Timer
+#define UFS_HC_CAP_OFFSET 0x0000 // Controller Capabilities
+#define UFS_HC_VER_OFFSET 0x0008 // Version
+#define UFS_HC_DDID_OFFSET 0x0010 // Device ID and Device Class
+#define UFS_HC_PMID_OFFSET 0x0014 // Product ID and Manufacturer ID
+#define UFS_HC_AHIT_OFFSET 0x0018 // Auto-Hibernate Idle Timer
//
// Operation and Runtime Register Offsets
//
-#define UFS_HC_IS_OFFSET 0x0020 // Interrupt Status
-#define UFS_HC_IE_OFFSET 0x0024 // Interrupt Enable
-#define UFS_HC_STATUS_OFFSET 0x0030 // Host Controller Status
-#define UFS_HC_ENABLE_OFFSET 0x0034 // Host Controller Enable
-#define UFS_HC_UECPA_OFFSET 0x0038 // Host UIC Error Code PHY Adapter Layer
-#define UFS_HC_UECDL_OFFSET 0x003c // Host UIC Error Code Data Link Layer
-#define UFS_HC_UECN_OFFSET 0x0040 // Host UIC Error Code Network Layer
-#define UFS_HC_UECT_OFFSET 0x0044 // Host UIC Error Code Transport Layer
-#define UFS_HC_UECDME_OFFSET 0x0048 // Host UIC Error Code DME
-#define UFS_HC_UTRIACR_OFFSET 0x004c // UTP Transfer Request Interrupt Aggregation Control Register
+#define UFS_HC_IS_OFFSET 0x0020 // Interrupt Status
+#define UFS_HC_IE_OFFSET 0x0024 // Interrupt Enable
+#define UFS_HC_STATUS_OFFSET 0x0030 // Host Controller Status
+#define UFS_HC_ENABLE_OFFSET 0x0034 // Host Controller Enable
+#define UFS_HC_UECPA_OFFSET 0x0038 // Host UIC Error Code PHY Adapter Layer
+#define UFS_HC_UECDL_OFFSET 0x003c // Host UIC Error Code Data Link Layer
+#define UFS_HC_UECN_OFFSET 0x0040 // Host UIC Error Code Network Layer
+#define UFS_HC_UECT_OFFSET 0x0044 // Host UIC Error Code Transport Layer
+#define UFS_HC_UECDME_OFFSET 0x0048 // Host UIC Error Code DME
+#define UFS_HC_UTRIACR_OFFSET 0x004c // UTP Transfer Request Interrupt Aggregation Control Register
//
// UTP Transfer Register Offsets
//
-#define UFS_HC_UTRLBA_OFFSET 0x0050 // UTP Transfer Request List Base Address
-#define UFS_HC_UTRLBAU_OFFSET 0x0054 // UTP Transfer Request List Base Address Upper 32-Bits
-#define UFS_HC_UTRLDBR_OFFSET 0x0058 // UTP Transfer Request List Door Bell Register
-#define UFS_HC_UTRLCLR_OFFSET 0x005c // UTP Transfer Request List CLear Register
-#define UFS_HC_UTRLRSR_OFFSET 0x0060 // UTP Transfer Request Run-Stop Register
+#define UFS_HC_UTRLBA_OFFSET 0x0050 // UTP Transfer Request List Base Address
+#define UFS_HC_UTRLBAU_OFFSET 0x0054 // UTP Transfer Request List Base Address Upper 32-Bits
+#define UFS_HC_UTRLDBR_OFFSET 0x0058 // UTP Transfer Request List Door Bell Register
+#define UFS_HC_UTRLCLR_OFFSET 0x005c // UTP Transfer Request List CLear Register
+#define UFS_HC_UTRLRSR_OFFSET 0x0060 // UTP Transfer Request Run-Stop Register
//
// UTP Task Management Register Offsets
//
-#define UFS_HC_UTMRLBA_OFFSET 0x0070 // UTP Task Management Request List Base Address
-#define UFS_HC_UTMRLBAU_OFFSET 0x0074 // UTP Task Management Request List Base Address Upper 32-Bits
-#define UFS_HC_UTMRLDBR_OFFSET 0x0078 // UTP Task Management Request List Door Bell Register
-#define UFS_HC_UTMRLCLR_OFFSET 0x007c // UTP Task Management Request List CLear Register
-#define UFS_HC_UTMRLRSR_OFFSET 0x0080 // UTP Task Management Run-Stop Register
+#define UFS_HC_UTMRLBA_OFFSET 0x0070 // UTP Task Management Request List Base Address
+#define UFS_HC_UTMRLBAU_OFFSET 0x0074 // UTP Task Management Request List Base Address Upper 32-Bits
+#define UFS_HC_UTMRLDBR_OFFSET 0x0078 // UTP Task Management Request List Door Bell Register
+#define UFS_HC_UTMRLCLR_OFFSET 0x007c // UTP Task Management Request List CLear Register
+#define UFS_HC_UTMRLRSR_OFFSET 0x0080 // UTP Task Management Run-Stop Register
//
// UIC Command Register Offsets
//
-#define UFS_HC_UIC_CMD_OFFSET 0x0090 // UIC Command Register
-#define UFS_HC_UCMD_ARG1_OFFSET 0x0094 // UIC Command Argument 1
-#define UFS_HC_UCMD_ARG2_OFFSET 0x0098 // UIC Command Argument 2
-#define UFS_HC_UCMD_ARG3_OFFSET 0x009c // UIC Command Argument 3
+#define UFS_HC_UIC_CMD_OFFSET 0x0090 // UIC Command Register
+#define UFS_HC_UCMD_ARG1_OFFSET 0x0094 // UIC Command Argument 1
+#define UFS_HC_UCMD_ARG2_OFFSET 0x0098 // UIC Command Argument 2
+#define UFS_HC_UCMD_ARG3_OFFSET 0x009c // UIC Command Argument 3
//
// UMA Register Offsets
//
-#define UFS_HC_UMA_OFFSET 0x00b0 // Reserved for Unified Memory Extension
+#define UFS_HC_UMA_OFFSET 0x00b0 // Reserved for Unified Memory Extension
-#define UFS_HC_HCE_EN BIT0
-#define UFS_HC_HCS_DP BIT0
-#define UFS_HC_HCS_UCRDY BIT3
-#define UFS_HC_IS_ULSS BIT8
-#define UFS_HC_IS_UCCS BIT10
-#define UFS_HC_CAP_64ADDR BIT24
-#define UFS_HC_CAP_NUTMRS (BIT16 | BIT17 | BIT18)
-#define UFS_HC_CAP_NUTRS (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)
-#define UFS_HC_UTMRLRSR BIT0
-#define UFS_HC_UTRLRSR BIT0
+#define UFS_HC_HCE_EN BIT0
+#define UFS_HC_HCS_DP BIT0
+#define UFS_HC_HCS_UCRDY BIT3
+#define UFS_HC_IS_ULSS BIT8
+#define UFS_HC_IS_UCCS BIT10
+#define UFS_HC_CAP_64ADDR BIT24
+#define UFS_HC_CAP_NUTMRS (BIT16 | BIT17 | BIT18)
+#define UFS_HC_CAP_NUTRS (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)
+#define UFS_HC_UTMRLRSR BIT0
+#define UFS_HC_UTRLRSR BIT0
//
// The initial value of the OCS field of UTP TRD or TMRD descriptor
@@ -79,25 +79,25 @@
//
// A maximum of length of 256KB is supported by PRDT entry
//
-#define UFS_MAX_DATA_LEN_PER_PRD 0x40000
+#define UFS_MAX_DATA_LEN_PER_PRD 0x40000
-#define UFS_STORAGE_COMMAND_TYPE 0x01
+#define UFS_STORAGE_COMMAND_TYPE 0x01
-#define UFS_REGULAR_COMMAND 0x00
-#define UFS_INTERRUPT_COMMAND 0x01
+#define UFS_REGULAR_COMMAND 0x00
+#define UFS_INTERRUPT_COMMAND 0x01
-#define UFS_LUN_0 0x00
-#define UFS_LUN_1 0x01
-#define UFS_LUN_2 0x02
-#define UFS_LUN_3 0x03
-#define UFS_LUN_4 0x04
-#define UFS_LUN_5 0x05
-#define UFS_LUN_6 0x06
-#define UFS_LUN_7 0x07
-#define UFS_WLUN_REPORT_LUNS 0x81
-#define UFS_WLUN_UFS_DEV 0xD0
-#define UFS_WLUN_BOOT 0xB0
-#define UFS_WLUN_RPMB 0xC4
+#define UFS_LUN_0 0x00
+#define UFS_LUN_1 0x01
+#define UFS_LUN_2 0x02
+#define UFS_LUN_3 0x03
+#define UFS_LUN_4 0x04
+#define UFS_LUN_5 0x05
+#define UFS_LUN_6 0x06
+#define UFS_LUN_7 0x07
+#define UFS_WLUN_REPORT_LUNS 0x81
+#define UFS_WLUN_UFS_DEV 0xD0
+#define UFS_WLUN_BOOT 0xB0
+#define UFS_WLUN_RPMB 0xC4
#pragma pack(1)
@@ -105,227 +105,227 @@
// UFSHCI 2.0 Spec Section 5.2.1 Offset 00h: CAP - Controller Capabilities
//
typedef struct {
- UINT8 Nutrs:4; // Number of UTP Transfer Request Slots
- UINT8 Rsvd1:4;
+ UINT8 Nutrs : 4; // Number of UTP Transfer Request Slots
+ UINT8 Rsvd1 : 4;
- UINT8 NoRtt; // Number of outstanding READY TO TRANSFER (RTT) requests supported
+ UINT8 NoRtt; // Number of outstanding READY TO TRANSFER (RTT) requests supported
- UINT8 Nutmrs:3; // Number of UTP Task Management Request Slots
- UINT8 Rsvd2:4;
- UINT8 AutoHs:1; // Auto-Hibernation Support
+ UINT8 Nutmrs : 3; // Number of UTP Task Management Request Slots
+ UINT8 Rsvd2 : 4;
+ UINT8 AutoHs : 1; // Auto-Hibernation Support
- UINT8 As64:1; // 64-bit addressing supported
- UINT8 Oodds:1; // Out of order data delivery supported
- UINT8 UicDmetms:1; // UIC DME_TEST_MODE command supported
- UINT8 Ume:1; // Reserved for Unified Memory Extension
- UINT8 Rsvd4:4;
+ UINT8 As64 : 1; // 64-bit addressing supported
+ UINT8 Oodds : 1; // Out of order data delivery supported
+ UINT8 UicDmetms : 1; // UIC DME_TEST_MODE command supported
+ UINT8 Ume : 1; // Reserved for Unified Memory Extension
+ UINT8 Rsvd4 : 4;
} UFS_HC_CAP;
//
// UFSHCI 2.0 Spec Section 5.2.2 Offset 08h: VER - UFS Version
//
typedef struct {
- UINT8 Vs:4; // Version Suffix
- UINT8 Mnr:4; // Minor version number
+ UINT8 Vs : 4; // Version Suffix
+ UINT8 Mnr : 4; // Minor version number
- UINT8 Mjr; // Major version number
+ UINT8 Mjr; // Major version number
- UINT16 Rsvd1;
+ UINT16 Rsvd1;
} UFS_HC_VER;
//
// UFSHCI 2.0 Spec Section 5.2.3 Offset 10h: HCPID - Host Controller Product ID
//
-#define UFS_HC_PID UINT32
+#define UFS_HC_PID UINT32
//
// UFSHCI 2.0 Spec Section 5.2.4 Offset 14h: HCMID - Host Controller Manufacturer ID
//
-#define UFS_HC_MID UINT32
+#define UFS_HC_MID UINT32
//
// UFSHCI 2.0 Spec Section 5.2.5 Offset 18h: AHIT - Auto-Hibernate Idle Timer
//
typedef struct {
- UINT32 Ahitv:10; // Auto-Hibernate Idle Timer Value
- UINT32 Ts:3; // Timer scale
- UINT32 Rsvd1:19;
+ UINT32 Ahitv : 10; // Auto-Hibernate Idle Timer Value
+ UINT32 Ts : 3; // Timer scale
+ UINT32 Rsvd1 : 19;
} UFS_HC_AHIT;
//
// UFSHCI 2.0 Spec Section 5.3.1 Offset 20h: IS - Interrupt Status
//
typedef struct {
- UINT16 Utrcs:1; // UTP Transfer Request Completion Status
- UINT16 Udepri:1; // UIC DME_ENDPOINT_RESET Indication
- UINT16 Ue:1; // UIC Error
- UINT16 Utms:1; // UIC Test Mode Status
-
- UINT16 Upms:1; // UIC Power Mode Status
- UINT16 Uhxs:1; // UIC Hibernate Exit Status
- UINT16 Uhes:1; // UIC Hibernate Enter Status
- UINT16 Ulls:1; // UIC Link Lost Status
-
- UINT16 Ulss:1; // UIC Link Startup Status
- UINT16 Utmrcs:1; // UTP Task Management Request Completion Status
- UINT16 Uccs:1; // UIC Command Completion Status
- UINT16 Dfes:1; // Device Fatal Error Status
-
- UINT16 Utpes:1; // UTP Error Status
- UINT16 Rsvd1:3;
-
- UINT16 Hcfes:1; // Host Controller Fatal Error Status
- UINT16 Sbfes:1; // System Bus Fatal Error Status
- UINT16 Rsvd2:14;
+ UINT16 Utrcs : 1; // UTP Transfer Request Completion Status
+ UINT16 Udepri : 1; // UIC DME_ENDPOINT_RESET Indication
+ UINT16 Ue : 1; // UIC Error
+ UINT16 Utms : 1; // UIC Test Mode Status
+
+ UINT16 Upms : 1; // UIC Power Mode Status
+ UINT16 Uhxs : 1; // UIC Hibernate Exit Status
+ UINT16 Uhes : 1; // UIC Hibernate Enter Status
+ UINT16 Ulls : 1; // UIC Link Lost Status
+
+ UINT16 Ulss : 1; // UIC Link Startup Status
+ UINT16 Utmrcs : 1; // UTP Task Management Request Completion Status
+ UINT16 Uccs : 1; // UIC Command Completion Status
+ UINT16 Dfes : 1; // Device Fatal Error Status
+
+ UINT16 Utpes : 1; // UTP Error Status
+ UINT16 Rsvd1 : 3;
+
+ UINT16 Hcfes : 1; // Host Controller Fatal Error Status
+ UINT16 Sbfes : 1; // System Bus Fatal Error Status
+ UINT16 Rsvd2 : 14;
} UFS_HC_IS;
//
// UFSHCI 2.0 Spec Section 5.3.2 Offset 24h: IE - Interrupt Enable
//
typedef struct {
- UINT16 Utrce:1; // UTP Transfer Request Completion Enable
- UINT16 Udeprie:1; // UIC DME_ENDPOINT_RESET Enable
- UINT16 Uee:1; // UIC Error Enable
- UINT16 Utmse:1; // UIC Test Mode Status Enable
-
- UINT16 Upmse:1; // UIC Power Mode Status Enable
- UINT16 Uhxse:1; // UIC Hibernate Exit Status Enable
- UINT16 Uhese:1; // UIC Hibernate Enter Status Enable
- UINT16 Ullse:1; // UIC Link Lost Status Enable
-
- UINT16 Ulsse:1; // UIC Link Startup Status Enable
- UINT16 Utmrce:1; // UTP Task Management Request Completion Enable
- UINT16 Ucce:1; // UIC Command Completion Enable
- UINT16 Dfee:1; // Device Fatal Error Enable
-
- UINT16 Utpee:1; // UTP Error Enable
- UINT16 Rsvd1:3;
-
- UINT16 Hcfee:1; // Host Controller Fatal Error Enable
- UINT16 Sbfee:1; // System Bus Fatal Error Enable
- UINT16 Rsvd2:14;
+ UINT16 Utrce : 1; // UTP Transfer Request Completion Enable
+ UINT16 Udeprie : 1; // UIC DME_ENDPOINT_RESET Enable
+ UINT16 Uee : 1; // UIC Error Enable
+ UINT16 Utmse : 1; // UIC Test Mode Status Enable
+
+ UINT16 Upmse : 1; // UIC Power Mode Status Enable
+ UINT16 Uhxse : 1; // UIC Hibernate Exit Status Enable
+ UINT16 Uhese : 1; // UIC Hibernate Enter Status Enable
+ UINT16 Ullse : 1; // UIC Link Lost Status Enable
+
+ UINT16 Ulsse : 1; // UIC Link Startup Status Enable
+ UINT16 Utmrce : 1; // UTP Task Management Request Completion Enable
+ UINT16 Ucce : 1; // UIC Command Completion Enable
+ UINT16 Dfee : 1; // Device Fatal Error Enable
+
+ UINT16 Utpee : 1; // UTP Error Enable
+ UINT16 Rsvd1 : 3;
+
+ UINT16 Hcfee : 1; // Host Controller Fatal Error Enable
+ UINT16 Sbfee : 1; // System Bus Fatal Error Enable
+ UINT16 Rsvd2 : 14;
} UFS_HC_IE;
//
// UFSHCI 2.0 Spec Section 5.3.3 Offset 30h: HCS - Host Controller Status
//
typedef struct {
- UINT8 Dp:1; // Device Present
- UINT8 UtrlRdy:1; // UTP Transfer Request List Ready
- UINT8 UtmrlRdy:1; // UTP Task Management Request List Ready
- UINT8 UcRdy:1; // UIC COMMAND Ready
- UINT8 Rsvd1:4;
-
- UINT8 Upmcrs:3; // UIC Power Mode Change Request Status
- UINT8 Rsvd2:1; // UIC Hibernate Exit Status Enable
- UINT8 Utpec:4; // UTP Error Code
-
- UINT8 TtagUtpE; // Task Tag of UTP error
- UINT8 TlunUtpE; // Target LUN of UTP error
+ UINT8 Dp : 1; // Device Present
+ UINT8 UtrlRdy : 1; // UTP Transfer Request List Ready
+ UINT8 UtmrlRdy : 1; // UTP Task Management Request List Ready
+ UINT8 UcRdy : 1; // UIC COMMAND Ready
+ UINT8 Rsvd1 : 4;
+
+ UINT8 Upmcrs : 3; // UIC Power Mode Change Request Status
+ UINT8 Rsvd2 : 1; // UIC Hibernate Exit Status Enable
+ UINT8 Utpec : 4; // UTP Error Code
+
+ UINT8 TtagUtpE; // Task Tag of UTP error
+ UINT8 TlunUtpE; // Target LUN of UTP error
} UFS_HC_STATUS;
//
// UFSHCI 2.0 Spec Section 5.3.4 Offset 34h: HCE - Host Controller Enable
//
typedef struct {
- UINT32 Hce:1; // Host Controller Enable
- UINT32 Rsvd1:31;
+ UINT32 Hce : 1; // Host Controller Enable
+ UINT32 Rsvd1 : 31;
} UFS_HC_ENABLE;
//
// UFSHCI 2.0 Spec Section 5.3.5 Offset 38h: UECPA - Host UIC Error Code PHY Adapter Layer
//
typedef struct {
- UINT32 Ec:5; // UIC PHY Adapter Layer Error Code
- UINT32 Rsvd1:26;
- UINT32 Err:1; // UIC PHY Adapter Layer Error
+ UINT32 Ec : 5; // UIC PHY Adapter Layer Error Code
+ UINT32 Rsvd1 : 26;
+ UINT32 Err : 1; // UIC PHY Adapter Layer Error
} UFS_HC_UECPA;
//
// UFSHCI 2.0 Spec Section 5.3.6 Offset 3ch: UECDL - Host UIC Error Code Data Link Layer
//
typedef struct {
- UINT32 Ec:15; // UIC Data Link Layer Error Code
- UINT32 Rsvd1:16;
- UINT32 Err:1; // UIC Data Link Layer Error
+ UINT32 Ec : 15; // UIC Data Link Layer Error Code
+ UINT32 Rsvd1 : 16;
+ UINT32 Err : 1; // UIC Data Link Layer Error
} UFS_HC_UECDL;
//
// UFSHCI 2.0 Spec Section 5.3.7 Offset 40h: UECN - Host UIC Error Code Network Layer
//
typedef struct {
- UINT32 Ec:3; // UIC Network Layer Error Code
- UINT32 Rsvd1:28;
- UINT32 Err:1; // UIC Network Layer Error
+ UINT32 Ec : 3; // UIC Network Layer Error Code
+ UINT32 Rsvd1 : 28;
+ UINT32 Err : 1; // UIC Network Layer Error
} UFS_HC_UECN;
//
// UFSHCI 2.0 Spec Section 5.3.8 Offset 44h: UECT - Host UIC Error Code Transport Layer
//
typedef struct {
- UINT32 Ec:7; // UIC Transport Layer Error Code
- UINT32 Rsvd1:24;
- UINT32 Err:1; // UIC Transport Layer Error
+ UINT32 Ec : 7; // UIC Transport Layer Error Code
+ UINT32 Rsvd1 : 24;
+ UINT32 Err : 1; // UIC Transport Layer Error
} UFS_HC_UECT;
//
// UFSHCI 2.0 Spec Section 5.3.9 Offset 48h: UECDME - Host UIC Error Code
//
typedef struct {
- UINT32 Ec:1; // UIC DME Error Code
- UINT32 Rsvd1:30;
- UINT32 Err:1; // UIC DME Error
+ UINT32 Ec : 1; // UIC DME Error Code
+ UINT32 Rsvd1 : 30;
+ UINT32 Err : 1; // UIC DME Error
} UFS_HC_UECDME;
//
// UFSHCI 2.0 Spec Section 5.3.10 Offset 4Ch: UTRIACR - UTP Transfer Request Interrupt Aggregation Control Register
//
typedef struct {
- UINT8 IaToVal; // Interrupt aggregation timeout value
+ UINT8 IaToVal; // Interrupt aggregation timeout value
- UINT8 IacTh:5; // Interrupt aggregation counter threshold
- UINT8 Rsvd1:3;
+ UINT8 IacTh : 5; // Interrupt aggregation counter threshold
+ UINT8 Rsvd1 : 3;
- UINT8 Ctr:1; // Counter and Timer Reset
- UINT8 Rsvd2:3;
- UINT8 Iasb:1; // Interrupt aggregation status bit
- UINT8 Rsvd3:3;
+ UINT8 Ctr : 1; // Counter and Timer Reset
+ UINT8 Rsvd2 : 3;
+ UINT8 Iasb : 1; // Interrupt aggregation status bit
+ UINT8 Rsvd3 : 3;
- UINT8 IapwEn:1; // Interrupt aggregation parameter write enable
- UINT8 Rsvd4:6;
- UINT8 IaEn:1; // Interrupt Aggregation Enable/Disable
+ UINT8 IapwEn : 1; // Interrupt aggregation parameter write enable
+ UINT8 Rsvd4 : 6;
+ UINT8 IaEn : 1; // Interrupt Aggregation Enable/Disable
} UFS_HC_UTRIACR;
//
// UFSHCI 2.0 Spec Section 5.4.1 Offset 50h: UTRLBA - UTP Transfer Request List Base Address
//
typedef struct {
- UINT32 Rsvd1:10;
- UINT32 UtrlBa:22; // UTP Transfer Request List Base Address
+ UINT32 Rsvd1 : 10;
+ UINT32 UtrlBa : 22; // UTP Transfer Request List Base Address
} UFS_HC_UTRLBA;
//
// UFSHCI 2.0 Spec Section 5.4.2 Offset 54h: UTRLBAU - UTP Transfer Request List Base Address Upper 32-bits
//
-#define UFS_HC_UTRLBAU UINT32
+#define UFS_HC_UTRLBAU UINT32
//
// UFSHCI 2.0 Spec Section 5.4.3 Offset 58h: UTRLDBR - UTP Transfer Request List Door Bell Register
//
-#define UFS_HC_UTRLDBR UINT32
+#define UFS_HC_UTRLDBR UINT32
//
// UFSHCI 2.0 Spec Section 5.4.4 Offset 5Ch: UTRLCLR - UTP Transfer Request List CLear Register
//
-#define UFS_HC_UTRLCLR UINT32
+#define UFS_HC_UTRLCLR UINT32
#if 0
//
// UFSHCI 2.0 Spec Section 5.4.5 Offset 60h: UTRLRSR - UTP Transfer Request List Run Stop Register
//
typedef struct {
- UINT32 UtrlRsr:1; // UTP Transfer Request List Run-Stop Register
- UINT32 Rsvd1:31;
+ UINT32 UtrlRsr : 1; // UTP Transfer Request List Run-Stop Register
+ UINT32 Rsvd1 : 31;
} UFS_HC_UTRLRSR;
#endif
@@ -333,29 +333,29 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.5.1 Offset 70h: UTMRLBA - UTP Task Management Request List Base Address
//
typedef struct {
- UINT32 Rsvd1:10;
- UINT32 UtmrlBa:22; // UTP Task Management Request List Base Address
+ UINT32 Rsvd1 : 10;
+ UINT32 UtmrlBa : 22; // UTP Task Management Request List Base Address
} UFS_HC_UTMRLBA;
//
// UFSHCI 2.0 Spec Section 5.5.2 Offset 74h: UTMRLBAU - UTP Task Management Request List Base Address Upper 32-bits
//
-#define UFS_HC_UTMRLBAU UINT32
+#define UFS_HC_UTMRLBAU UINT32
//
// UFSHCI 2.0 Spec Section 5.5.3 Offset 78h: UTMRLDBR - UTP Task Management Request List Door Bell Register
//
typedef struct {
- UINT32 UtmrlDbr:8; // UTP Task Management Request List Door bell Register
- UINT32 Rsvd1:24;
+ UINT32 UtmrlDbr : 8; // UTP Task Management Request List Door bell Register
+ UINT32 Rsvd1 : 24;
} UFS_HC_UTMRLDBR;
//
// UFSHCI 2.0 Spec Section 5.5.4 Offset 7Ch: UTMRLCLR - UTP Task Management Request List CLear Register
//
typedef struct {
- UINT32 UtmrlClr:8; // UTP Task Management List Clear Register
- UINT32 Rsvd1:24;
+ UINT32 UtmrlClr : 8; // UTP Task Management List Clear Register
+ UINT32 Rsvd1 : 24;
} UFS_HC_UTMRLCLR;
#if 0
@@ -363,8 +363,8 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.5.5 Offset 80h: UTMRLRSR - UTP Task Management Request List Run Stop Register
//
typedef struct {
- UINT32 UtmrlRsr:1; // UTP Task Management Request List Run-Stop Register
- UINT32 Rsvd1:31;
+ UINT32 UtmrlRsr : 1; // UTP Task Management Request List Run-Stop Register
+ UINT32 Rsvd1 : 31;
} UFS_HC_UTMRLRSR;
#endif
@@ -372,24 +372,24 @@ typedef struct {
// UFSHCI 2.0 Spec Section 5.6.1 Offset 90h: UICCMD - UIC Command
//
typedef struct {
- UINT32 CmdOp:8; // Command Opcode
- UINT32 Rsvd1:24;
+ UINT32 CmdOp : 8; // Command Opcode
+ UINT32 Rsvd1 : 24;
} UFS_HC_UICCMD;
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 94h: UICCMDARG1 - UIC Command Argument 1
//
-#define UFS_HC_UICCMD_ARG1 UINT32
+#define UFS_HC_UICCMD_ARG1 UINT32
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 98h: UICCMDARG2 - UIC Command Argument 2
//
-#define UFS_HC_UICCMD_ARG2 UINT32
+#define UFS_HC_UICCMD_ARG2 UINT32
//
// UFSHCI 2.0 Spec Section 5.6.2 Offset 9ch: UICCMDARG3 - UIC Command Argument 3
//
-#define UFS_HC_UICCMD_ARG3 UINT32
+#define UFS_HC_UICCMD_ARG3 UINT32
//
// UIC command opcodes
@@ -417,74 +417,74 @@ typedef struct {
//
// DW0
//
- UINT32 Rsvd1:24;
- UINT32 Int:1; /* Interrupt */
- UINT32 Dd:2; /* Data Direction */
- UINT32 Rsvd2:1;
- UINT32 Ct:4; /* Command Type */
+ UINT32 Rsvd1 : 24;
+ UINT32 Int : 1; /* Interrupt */
+ UINT32 Dd : 2; /* Data Direction */
+ UINT32 Rsvd2 : 1;
+ UINT32 Ct : 4; /* Command Type */
//
// DW1
//
- UINT32 Rsvd3;
+ UINT32 Rsvd3;
//
// DW2
//
- UINT32 Ocs:8; /* Overall Command Status */
- UINT32 Rsvd4:24;
+ UINT32 Ocs : 8; /* Overall Command Status */
+ UINT32 Rsvd4 : 24;
//
// DW3
//
- UINT32 Rsvd5;
+ UINT32 Rsvd5;
//
// DW4
//
- UINT32 Rsvd6:7;
- UINT32 UcdBa:25; /* UTP Command Descriptor Base Address */
+ UINT32 Rsvd6 : 7;
+ UINT32 UcdBa : 25; /* UTP Command Descriptor Base Address */
//
// DW5
//
- UINT32 UcdBaU; /* UTP Command Descriptor Base Address Upper 32-bits */
+ UINT32 UcdBaU; /* UTP Command Descriptor Base Address Upper 32-bits */
//
// DW6
//
- UINT16 RuL; /* Response UPIU Length */
- UINT16 RuO; /* Response UPIU Offset */
+ UINT16 RuL; /* Response UPIU Length */
+ UINT16 RuO; /* Response UPIU Offset */
//
// DW7
//
- UINT16 PrdtL; /* PRDT Length */
- UINT16 PrdtO; /* PRDT Offset */
+ UINT16 PrdtL; /* PRDT Length */
+ UINT16 PrdtO; /* PRDT Offset */
} UTP_TRD;
typedef struct {
//
// DW0
//
- UINT32 Rsvd1:2;
- UINT32 DbAddr:30; /* Data Base Address */
+ UINT32 Rsvd1 : 2;
+ UINT32 DbAddr : 30; /* Data Base Address */
//
// DW1
//
- UINT32 DbAddrU; /* Data Base Address Upper 32-bits */
+ UINT32 DbAddrU; /* Data Base Address Upper 32-bits */
//
// DW2
//
- UINT32 Rsvd2;
+ UINT32 Rsvd2;
//
// DW3
//
- UINT32 DbCount:18; /* Data Byte Count */
- UINT32 Rsvd3:14;
+ UINT32 DbCount : 18; /* Data Byte Count */
+ UINT32 Rsvd3 : 14;
} UTP_TR_PRD;
//
@@ -494,38 +494,38 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x01*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x01*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 CmdSet:4; /* Command Set Type */
- UINT8 Rsvd1:4;
- UINT8 Rsvd2;
- UINT8 Rsvd3;
- UINT8 Rsvd4;
+ UINT8 CmdSet : 4; /* Command Set Type */
+ UINT8 Rsvd1 : 4;
+ UINT8 Rsvd2;
+ UINT8 Rsvd3;
+ UINT8 Rsvd4;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd5;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd5;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 ExpDataTranLen; /* Expected Data Transfer Length - Big Endian */
+ UINT32 ExpDataTranLen; /* Expected Data Transfer Length - Big Endian */
//
// DW4 - DW7
//
- UINT8 Cdb[16];
+ UINT8 Cdb[16];
} UTP_COMMAND_UPIU;
//
@@ -535,44 +535,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x21*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x21*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 CmdSet:4; /* Command Set Type */
- UINT8 Rsvd1:4;
- UINT8 Rsvd2;
- UINT8 Response; /* Response */
- UINT8 Status; /* Status */
+ UINT8 CmdSet : 4; /* Command Set Type */
+ UINT8 Rsvd1 : 4;
+ UINT8 Rsvd2;
+ UINT8 Response; /* Response */
+ UINT8 Status; /* Status */
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 ResTranCount; /* Residual Transfer Count - Big Endian */
+ UINT32 ResTranCount; /* Residual Transfer Count - Big Endian */
//
// DW4 - DW7
//
- UINT8 Rsvd3[16];
+ UINT8 Rsvd3[16];
//
// Data Segment - Sense Data
//
- UINT16 SenseDataLen; /* Sense Data Length - Big Endian */
- UINT8 SenseData[18]; /* Sense Data */
+ UINT16 SenseDataLen; /* Sense Data Length - Big Endian */
+ UINT8 SenseData[18]; /* Sense Data */
} UTP_RESPONSE_UPIU;
//
@@ -582,44 +582,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x02*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x02*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be sent out
//
- //UINT8 Data[]; /* Data to be sent out, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be sent out, maximum is 65535 bytes */
} UTP_DATA_OUT_UPIU;
//
@@ -629,44 +629,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x22*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x22*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be read
//
- //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
} UTP_DATA_IN_UPIU;
//
@@ -676,44 +676,44 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x31*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x31*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[4];
+ UINT8 Rsvd1[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd2;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd2;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
+ UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */
//
// DW4
//
- UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
+ UINT32 DataTranCount; /* Data Transfer Count - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd3[12];
+ UINT8 Rsvd3[12];
//
// Data Segment - Data to be read
//
- //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */
} UTP_RDY_TO_TRAN_UPIU;
//
@@ -723,46 +723,46 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x04*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x04*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1;
- UINT8 TskManFunc; /* Task Management Function */
- UINT8 Rsvd2[2];
+ UINT8 Rsvd1;
+ UINT8 TskManFunc; /* Task Management Function */
+ UINT8 Rsvd2[2];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 InputParam1; /* Input Parameter 1 - Big Endian */
+ UINT32 InputParam1; /* Input Parameter 1 - Big Endian */
//
// DW4
//
- UINT32 InputParam2; /* Input Parameter 2 - Big Endian */
+ UINT32 InputParam2; /* Input Parameter 2 - Big Endian */
//
// DW5
//
- UINT32 InputParam3; /* Input Parameter 3 - Big Endian */
+ UINT32 InputParam3; /* Input Parameter 3 - Big Endian */
//
// DW6 - DW7
//
- UINT8 Rsvd4[8];
+ UINT8 Rsvd4[8];
} UTP_TM_REQ_UPIU;
//
@@ -772,41 +772,41 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x24*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x24*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[2];
- UINT8 Resp; /* Response */
- UINT8 Rsvd2;
+ UINT8 Rsvd1[2];
+ UINT8 Resp; /* Response */
+ UINT8 Rsvd2;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT32 OutputParam1; /* Output Parameter 1 - Big Endian */
+ UINT32 OutputParam1; /* Output Parameter 1 - Big Endian */
//
// DW4
//
- UINT32 OutputParam2; /* Output Parameter 2 - Big Endian */
+ UINT32 OutputParam2; /* Output Parameter 2 - Big Endian */
//
// DW5 - DW7
//
- UINT8 Rsvd4[12];
+ UINT8 Rsvd4[12];
} UTP_TM_RESP_UPIU;
//
@@ -816,47 +816,46 @@ typedef struct {
//
// DW0
//
- UINT32 Rsvd1:24;
- UINT32 Int:1; /* Interrupt */
- UINT32 Rsvd2:7;
+ UINT32 Rsvd1 : 24;
+ UINT32 Int : 1; /* Interrupt */
+ UINT32 Rsvd2 : 7;
//
// DW1
//
- UINT32 Rsvd3;
+ UINT32 Rsvd3;
//
// DW2
//
- UINT32 Ocs:8; /* Overall Command Status */
- UINT32 Rsvd4:24;
+ UINT32 Ocs : 8; /* Overall Command Status */
+ UINT32 Rsvd4 : 24;
//
// DW3
//
- UINT32 Rsvd5;
+ UINT32 Rsvd5;
//
// DW4 - DW11
//
- UTP_TM_REQ_UPIU TmReq; /* Task Management Request UPIU */
+ UTP_TM_REQ_UPIU TmReq; /* Task Management Request UPIU */
//
// DW12 - DW19
//
- UTP_TM_RESP_UPIU TmResp; /* Task Management Response UPIU */
+ UTP_TM_RESP_UPIU TmResp; /* Task Management Response UPIU */
} UTP_TMRD;
-
typedef struct {
- UINT8 Opcode;
- UINT8 DescId;
- UINT8 Index;
- UINT8 Selector;
- UINT16 Rsvd1;
- UINT16 Length;
- UINT32 Value;
- UINT32 Rsvd2;
+ UINT8 Opcode;
+ UINT8 DescId;
+ UINT8 Index;
+ UINT8 Selector;
+ UINT16 Rsvd1;
+ UINT16 Length;
+ UINT32 Value;
+ UINT32 Rsvd2;
} UTP_UPIU_TSF;
//
@@ -866,56 +865,56 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x16*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x16*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2;
- UINT8 QueryFunc; /* Query Function */
- UINT8 Rsvd3[2];
+ UINT8 Rsvd2;
+ UINT8 QueryFunc; /* Query Function */
+ UINT8 Rsvd3[2];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd4;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd4;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3 - 6
//
- UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
+ UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
//
// DW7
//
- UINT8 Rsvd5[4];
+ UINT8 Rsvd5[4];
//
// Data Segment - Data to be transferred
//
- //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
} UTP_QUERY_REQ_UPIU;
-#define QUERY_FUNC_STD_READ_REQ 0x01
-#define QUERY_FUNC_STD_WRITE_REQ 0x81
+#define QUERY_FUNC_STD_READ_REQ 0x01
+#define QUERY_FUNC_STD_WRITE_REQ 0x81
typedef enum {
- UtpQueryFuncOpcodeNop = 0x00,
- UtpQueryFuncOpcodeRdDesc = 0x01,
- UtpQueryFuncOpcodeWrDesc = 0x02,
- UtpQueryFuncOpcodeRdAttr = 0x03,
- UtpQueryFuncOpcodeWrAttr = 0x04,
- UtpQueryFuncOpcodeRdFlag = 0x05,
- UtpQueryFuncOpcodeSetFlag = 0x06,
- UtpQueryFuncOpcodeClrFlag = 0x07,
- UtpQueryFuncOpcodeTogFlag = 0x08
+ UtpQueryFuncOpcodeNop = 0x00,
+ UtpQueryFuncOpcodeRdDesc = 0x01,
+ UtpQueryFuncOpcodeWrDesc = 0x02,
+ UtpQueryFuncOpcodeRdAttr = 0x03,
+ UtpQueryFuncOpcodeWrAttr = 0x04,
+ UtpQueryFuncOpcodeRdFlag = 0x05,
+ UtpQueryFuncOpcodeSetFlag = 0x06,
+ UtpQueryFuncOpcodeClrFlag = 0x07,
+ UtpQueryFuncOpcodeTogFlag = 0x08
} UTP_QUERY_FUNC_OPCODE;
//
@@ -925,42 +924,42 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x36*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x36*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2;
- UINT8 QueryFunc; /* Query Function */
- UINT8 QueryResp; /* Query Response */
- UINT8 Rsvd3;
+ UINT8 Rsvd2;
+ UINT8 QueryFunc; /* Query Function */
+ UINT8 QueryResp; /* Query Response */
+ UINT8 Rsvd3;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian */
//
// DW3 - 6
//
- UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
+ UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */
//
// DW7
//
- UINT8 Rsvd4[4];
+ UINT8 Rsvd4[4];
//
// Data Segment - Data to be transferred
//
- //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
+ // UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */
} UTP_QUERY_RESP_UPIU;
typedef enum {
@@ -984,39 +983,39 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x3F*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x3F*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd1[2];
- UINT8 Response; /* Response - 0x01 */
- UINT8 Rsvd2;
+ UINT8 Rsvd1[2];
+ UINT8 Response; /* Response - 0x01 */
+ UINT8 Rsvd2;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information - 0x00 */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information - 0x00 */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3
//
- UINT8 HdrSts; /* Basic Header Status */
- UINT8 Rsvd3;
- UINT8 E2ESts; /* End-to-End Status */
- UINT8 Rsvd4;
+ UINT8 HdrSts; /* Basic Header Status */
+ UINT8 Rsvd3;
+ UINT8 E2ESts; /* End-to-End Status */
+ UINT8 Rsvd4;
//
// DW4 - DW7
//
- UINT8 Rsvd5[16];
+ UINT8 Rsvd5[16];
} UTP_REJ_UPIU;
//
@@ -1026,29 +1025,29 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x00*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x00*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2[4];
+ UINT8 Rsvd2[4];
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 Rsvd3;
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 Rsvd3;
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3 - DW7
//
- UINT8 Rsvd4[20];
+ UINT8 Rsvd4[20];
} UTP_NOP_OUT_UPIU;
//
@@ -1058,234 +1057,234 @@ typedef struct {
//
// DW0
//
- UINT8 TransCode:6; /* Transaction Type - 0x20*/
- UINT8 Dd:1;
- UINT8 Hd:1;
- UINT8 Flags;
- UINT8 Rsvd1;
- UINT8 TaskTag; /* Task Tag */
+ UINT8 TransCode : 6; /* Transaction Type - 0x20*/
+ UINT8 Dd : 1;
+ UINT8 Hd : 1;
+ UINT8 Flags;
+ UINT8 Rsvd1;
+ UINT8 TaskTag; /* Task Tag */
//
// DW1
//
- UINT8 Rsvd2[2];
- UINT8 Resp; /* Response - 0x00 */
- UINT8 Rsvd3;
+ UINT8 Rsvd2[2];
+ UINT8 Resp; /* Response - 0x00 */
+ UINT8 Rsvd3;
//
// DW2
//
- UINT8 EhsLen; /* Total EHS Length - 0x00 */
- UINT8 DevInfo; /* Device Information - 0x00 */
- UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
+ UINT8 EhsLen; /* Total EHS Length - 0x00 */
+ UINT8 DevInfo; /* Device Information - 0x00 */
+ UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */
//
// DW3 - DW7
//
- UINT8 Rsvd4[20];
+ UINT8 Rsvd4[20];
} UTP_NOP_IN_UPIU;
//
// UFS Descriptors
//
typedef enum {
- UfsDeviceDesc = 0x00,
- UfsConfigDesc = 0x01,
- UfsUnitDesc = 0x02,
- UfsInterConnDesc = 0x04,
- UfsStringDesc = 0x05,
- UfsGeometryDesc = 0x07,
- UfsPowerDesc = 0x08
+ UfsDeviceDesc = 0x00,
+ UfsConfigDesc = 0x01,
+ UfsUnitDesc = 0x02,
+ UfsInterConnDesc = 0x04,
+ UfsStringDesc = 0x05,
+ UfsGeometryDesc = 0x07,
+ UfsPowerDesc = 0x08
} UFS_DESC_IDN;
//
// UFS 2.0 Spec Section 14.1.6.2 - Device Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 Device;
- UINT8 DevClass;
- UINT8 DevSubClass;
- UINT8 Protocol;
- UINT8 NumLun;
- UINT8 NumWLun;
- UINT8 BootEn;
- UINT8 DescAccessEn;
- UINT8 InitPowerMode;
- UINT8 HighPriorityLun;
- UINT8 SecureRemovalType;
- UINT8 SecurityLun;
- UINT8 BgOpsTermLat;
- UINT8 InitActiveIccLevel;
- UINT16 SpecVersion;
- UINT16 ManufactureDate;
- UINT8 ManufacturerName;
- UINT8 ProductName;
- UINT8 SerialName;
- UINT8 OemId;
- UINT16 ManufacturerId;
- UINT8 Ud0BaseOffset;
- UINT8 Ud0ConfParamLen;
- UINT8 DevRttCap;
- UINT16 PeriodicRtcUpdate;
- UINT8 Rsvd1[17];
- UINT8 Rsvd2[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 Device;
+ UINT8 DevClass;
+ UINT8 DevSubClass;
+ UINT8 Protocol;
+ UINT8 NumLun;
+ UINT8 NumWLun;
+ UINT8 BootEn;
+ UINT8 DescAccessEn;
+ UINT8 InitPowerMode;
+ UINT8 HighPriorityLun;
+ UINT8 SecureRemovalType;
+ UINT8 SecurityLun;
+ UINT8 BgOpsTermLat;
+ UINT8 InitActiveIccLevel;
+ UINT16 SpecVersion;
+ UINT16 ManufactureDate;
+ UINT8 ManufacturerName;
+ UINT8 ProductName;
+ UINT8 SerialName;
+ UINT8 OemId;
+ UINT16 ManufacturerId;
+ UINT8 Ud0BaseOffset;
+ UINT8 Ud0ConfParamLen;
+ UINT8 DevRttCap;
+ UINT16 PeriodicRtcUpdate;
+ UINT8 Rsvd1[17];
+ UINT8 Rsvd2[16];
} UFS_DEV_DESC;
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 Rsvd1;
- UINT8 BootEn;
- UINT8 DescAccessEn;
- UINT8 InitPowerMode;
- UINT8 HighPriorityLun;
- UINT8 SecureRemovalType;
- UINT8 InitActiveIccLevel;
- UINT16 PeriodicRtcUpdate;
- UINT8 Rsvd2[5];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 Rsvd1;
+ UINT8 BootEn;
+ UINT8 DescAccessEn;
+ UINT8 InitPowerMode;
+ UINT8 HighPriorityLun;
+ UINT8 SecureRemovalType;
+ UINT8 InitActiveIccLevel;
+ UINT16 PeriodicRtcUpdate;
+ UINT8 Rsvd2[5];
} UFS_CONFIG_DESC_GEN_HEADER;
typedef struct {
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 MemType;
- UINT32 NumAllocUnits;
- UINT8 DataReliability;
- UINT8 LogicBlkSize;
- UINT8 ProvisionType;
- UINT16 CtxCap;
- UINT8 Rsvd1[3];
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 MemType;
+ UINT32 NumAllocUnits;
+ UINT8 DataReliability;
+ UINT8 LogicBlkSize;
+ UINT8 ProvisionType;
+ UINT16 CtxCap;
+ UINT8 Rsvd1[3];
} UFS_UNIT_DESC_CONFIG_PARAMS;
//
// UFS 2.0 Spec Section 14.1.6.3 - Configuration Descriptor
//
typedef struct {
- UFS_CONFIG_DESC_GEN_HEADER Header;
- UFS_UNIT_DESC_CONFIG_PARAMS UnitDescConfParams[8];
+ UFS_CONFIG_DESC_GEN_HEADER Header;
+ UFS_UNIT_DESC_CONFIG_PARAMS UnitDescConfParams[8];
} UFS_CONFIG_DESC;
//
// UFS 2.0 Spec Section 14.1.6.4 - Geometry Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 MediaTech;
- UINT8 Rsvd1;
- UINT64 TotalRawDevCapacity;
- UINT8 Rsvd2;
- UINT32 SegSize;
- UINT8 AllocUnitSize;
- UINT8 MinAddrBlkSize;
- UINT8 OptReadBlkSize;
- UINT8 OptWriteBlkSize;
- UINT8 MaxInBufSize;
- UINT8 MaxOutBufSize;
- UINT8 RpmbRwSize;
- UINT8 Rsvd3;
- UINT8 DataOrder;
- UINT8 MaxCtxIdNum;
- UINT8 SysDataTagUnitSize;
- UINT8 SysDataResUnitSize;
- UINT8 SupSecRemovalTypes;
- UINT16 SupMemTypes;
- UINT32 SysCodeMaxNumAllocUnits;
- UINT16 SupCodeCapAdjFac;
- UINT32 NonPersMaxNumAllocUnits;
- UINT16 NonPersCapAdjFac;
- UINT32 Enhance1MaxNumAllocUnits;
- UINT16 Enhance1CapAdjFac;
- UINT32 Enhance2MaxNumAllocUnits;
- UINT16 Enhance2CapAdjFac;
- UINT32 Enhance3MaxNumAllocUnits;
- UINT16 Enhance3CapAdjFac;
- UINT32 Enhance4MaxNumAllocUnits;
- UINT16 Enhance4CapAdjFac;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 MediaTech;
+ UINT8 Rsvd1;
+ UINT64 TotalRawDevCapacity;
+ UINT8 Rsvd2;
+ UINT32 SegSize;
+ UINT8 AllocUnitSize;
+ UINT8 MinAddrBlkSize;
+ UINT8 OptReadBlkSize;
+ UINT8 OptWriteBlkSize;
+ UINT8 MaxInBufSize;
+ UINT8 MaxOutBufSize;
+ UINT8 RpmbRwSize;
+ UINT8 Rsvd3;
+ UINT8 DataOrder;
+ UINT8 MaxCtxIdNum;
+ UINT8 SysDataTagUnitSize;
+ UINT8 SysDataResUnitSize;
+ UINT8 SupSecRemovalTypes;
+ UINT16 SupMemTypes;
+ UINT32 SysCodeMaxNumAllocUnits;
+ UINT16 SupCodeCapAdjFac;
+ UINT32 NonPersMaxNumAllocUnits;
+ UINT16 NonPersCapAdjFac;
+ UINT32 Enhance1MaxNumAllocUnits;
+ UINT16 Enhance1CapAdjFac;
+ UINT32 Enhance2MaxNumAllocUnits;
+ UINT16 Enhance2CapAdjFac;
+ UINT32 Enhance3MaxNumAllocUnits;
+ UINT16 Enhance3CapAdjFac;
+ UINT32 Enhance4MaxNumAllocUnits;
+ UINT16 Enhance4CapAdjFac;
} UFS_GEOMETRY_DESC;
//
// UFS 2.0 Spec Section 14.1.6.5 - Unit Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 UnitIdx;
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 LunQueueDep;
- UINT8 Rsvd1;
- UINT8 MemType;
- UINT8 DataReliability;
- UINT8 LogicBlkSize;
- UINT64 LogicBlkCount;
- UINT32 EraseBlkSize;
- UINT8 ProvisionType;
- UINT64 PhyMemResCount;
- UINT16 CtxCap;
- UINT8 LargeUnitGranularity;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 UnitIdx;
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 LunQueueDep;
+ UINT8 Rsvd1;
+ UINT8 MemType;
+ UINT8 DataReliability;
+ UINT8 LogicBlkSize;
+ UINT64 LogicBlkCount;
+ UINT32 EraseBlkSize;
+ UINT8 ProvisionType;
+ UINT64 PhyMemResCount;
+ UINT16 CtxCap;
+ UINT8 LargeUnitGranularity;
} UFS_UNIT_DESC;
//
// UFS 2.0 Spec Section 14.1.6.6 - RPMB Unit Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 UnitIdx;
- UINT8 LunEn;
- UINT8 BootLunId;
- UINT8 LunWriteProt;
- UINT8 LunQueueDep;
- UINT8 Rsvd1;
- UINT8 MemType;
- UINT8 Rsvd2;
- UINT8 LogicBlkSize;
- UINT64 LogicBlkCount;
- UINT32 EraseBlkSize;
- UINT8 ProvisionType;
- UINT64 PhyMemResCount;
- UINT8 Rsvd3[3];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 UnitIdx;
+ UINT8 LunEn;
+ UINT8 BootLunId;
+ UINT8 LunWriteProt;
+ UINT8 LunQueueDep;
+ UINT8 Rsvd1;
+ UINT8 MemType;
+ UINT8 Rsvd2;
+ UINT8 LogicBlkSize;
+ UINT64 LogicBlkCount;
+ UINT32 EraseBlkSize;
+ UINT8 ProvisionType;
+ UINT64 PhyMemResCount;
+ UINT8 Rsvd3[3];
} UFS_RPMB_UNIT_DESC;
typedef struct {
- UINT16 Value:10;
- UINT16 Rsvd1:4;
- UINT16 Unit:2;
+ UINT16 Value : 10;
+ UINT16 Rsvd1 : 4;
+ UINT16 Unit : 2;
} UFS_POWER_PARAM_ELEMENT;
//
// UFS 2.0 Spec Section 14.1.6.7 - Power Parameter Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVcc[16];
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ[16];
- UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ2[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVcc[16];
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ[16];
+ UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ2[16];
} UFS_POWER_DESC;
//
// UFS 2.0 Spec Section 14.1.6.8 - InterConnect Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT16 UniProVer;
- UINT16 MphyVer;
+ UINT8 Length;
+ UINT8 DescType;
+ UINT16 UniProVer;
+ UINT16 MphyVer;
} UFS_INTER_CONNECT_DESC;
//
// UFS 2.0 Spec Section 14.1.6.9 - 14.1.6.12 - String Descriptor
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- CHAR16 Unicode[126];
+ UINT8 Length;
+ UINT8 DescType;
+ CHAR16 Unicode[126];
} UFS_STRING_DESC;
//
@@ -1306,34 +1305,32 @@ typedef enum {
// UFS 2.0 Spec Section 14.2 - Attributes
//
typedef enum {
- UfsAttrBootLunEn = 0x00,
- UfsAttrCurPowerMode = 0x02,
- UfsAttrActiveIccLevel = 0x03,
- UfsAttrOutOfOrderDataEn = 0x04,
- UfsAttrBgOpStatus = 0x05,
- UfsAttrPurgeStatus = 0x06,
- UfsAttrMaxDataInSize = 0x07,
- UfsAttrMaxDataOutSize = 0x08,
- UfsAttrDynCapNeeded = 0x09,
- UfsAttrRefClkFreq = 0x0a,
- UfsAttrConfigDescLock = 0x0b,
- UfsAttrMaxNumOfRtt = 0x0c,
- UfsAttrExceptionEvtCtrl = 0x0d,
- UfsAttrExceptionEvtSts = 0x0e,
- UfsAttrSecondsPassed = 0x0f,
- UfsAttrContextConf = 0x10,
- UfsAttrCorrPrgBlkNum = 0x11
+ UfsAttrBootLunEn = 0x00,
+ UfsAttrCurPowerMode = 0x02,
+ UfsAttrActiveIccLevel = 0x03,
+ UfsAttrOutOfOrderDataEn = 0x04,
+ UfsAttrBgOpStatus = 0x05,
+ UfsAttrPurgeStatus = 0x06,
+ UfsAttrMaxDataInSize = 0x07,
+ UfsAttrMaxDataOutSize = 0x08,
+ UfsAttrDynCapNeeded = 0x09,
+ UfsAttrRefClkFreq = 0x0a,
+ UfsAttrConfigDescLock = 0x0b,
+ UfsAttrMaxNumOfRtt = 0x0c,
+ UfsAttrExceptionEvtCtrl = 0x0d,
+ UfsAttrExceptionEvtSts = 0x0e,
+ UfsAttrSecondsPassed = 0x0f,
+ UfsAttrContextConf = 0x10,
+ UfsAttrCorrPrgBlkNum = 0x11
} UFS_ATTR_IDN;
typedef enum {
- UfsNoData = 0,
- UfsDataOut = 1,
- UfsDataIn = 2,
+ UfsNoData = 0,
+ UfsDataOut = 1,
+ UfsDataIn = 2,
UfsDdReserved
} UFS_DATA_DIRECTION;
-
#pragma pack()
#endif
-
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.c b/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.c
index 2b1ca20a63..1df799e71b 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.c
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.c
@@ -23,8 +23,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
BotRecoveryReset (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev
)
{
EFI_USB_DEVICE_REQUEST DevReq;
@@ -41,23 +41,23 @@ BotRecoveryReset (
ZeroMem (&DevReq, sizeof (EFI_USB_DEVICE_REQUEST));
- DevReq.RequestType = 0x21;
- DevReq.Request = 0xFF;
- DevReq.Value = 0;
- DevReq.Index = 0;
- DevReq.Length = 0;
+ DevReq.RequestType = 0x21;
+ DevReq.Request = 0xFF;
+ DevReq.Value = 0;
+ DevReq.Index = 0;
+ DevReq.Length = 0;
- Timeout = 3000;
+ Timeout = 3000;
Status = UsbIoPpi->UsbControlTransfer (
- PeiServices,
- UsbIoPpi,
- &DevReq,
- EfiUsbNoData,
- Timeout,
- NULL,
- 0
- );
+ PeiServices,
+ UsbIoPpi,
+ &DevReq,
+ EfiUsbNoData,
+ Timeout,
+ NULL,
+ 0
+ );
//
// clear bulk in endpoint stall feature
@@ -96,13 +96,13 @@ BotRecoveryReset (
**/
EFI_STATUS
BotCommandPhase (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev,
- IN VOID *Command,
- IN UINT8 CommandSize,
- IN UINT32 DataTransferLength,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT16 Timeout
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev,
+ IN VOID *Command,
+ IN UINT8 CommandSize,
+ IN UINT32 DataTransferLength,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT16 Timeout
)
{
CBW Cbw;
@@ -117,25 +117,25 @@ BotCommandPhase (
//
// Fill the command block, detailed see BOT spec
//
- Cbw.Signature = CBWSIG;
- Cbw.Tag = 0x01;
- Cbw.DataTransferLength = DataTransferLength;
- Cbw.Flags = (UINT8) ((Direction == EfiUsbDataIn) ? 0x80 : 0);
- Cbw.Lun = 0;
- Cbw.CmdLen = CommandSize;
+ Cbw.Signature = CBWSIG;
+ Cbw.Tag = 0x01;
+ Cbw.DataTransferLength = DataTransferLength;
+ Cbw.Flags = (UINT8)((Direction == EfiUsbDataIn) ? 0x80 : 0);
+ Cbw.Lun = 0;
+ Cbw.CmdLen = CommandSize;
CopyMem (Cbw.CmdBlock, Command, CommandSize);
DataSize = sizeof (CBW);
Status = UsbIoPpi->UsbBulkTransfer (
- PeiServices,
- UsbIoPpi,
- (PeiBotDev->BulkOutEndpoint)->EndpointAddress,
- (UINT8 *) &Cbw,
- &DataSize,
- Timeout
- );
+ PeiServices,
+ UsbIoPpi,
+ (PeiBotDev->BulkOutEndpoint)->EndpointAddress,
+ (UINT8 *)&Cbw,
+ &DataSize,
+ Timeout
+ );
if (EFI_ERROR (Status)) {
//
// Command phase fail, we need to recovery reset this device
@@ -168,12 +168,12 @@ BotCommandPhase (
**/
EFI_STATUS
BotDataPhase (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev,
- IN UINT32 *DataSize,
- IN OUT VOID *DataBuffer,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT16 Timeout
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev,
+ IN UINT32 *DataSize,
+ IN OUT VOID *DataBuffer,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT16 Timeout
)
{
EFI_STATUS Status;
@@ -185,21 +185,21 @@ BotDataPhase (
UINT8 *BufferPtr;
UINTN TransferredSize;
- UsbIoPpi = PeiBotDev->UsbIoPpi;
+ UsbIoPpi = PeiBotDev->UsbIoPpi;
Remain = *DataSize;
- BufferPtr = (UINT8 *) DataBuffer;
+ BufferPtr = (UINT8 *)DataBuffer;
TransferredSize = 0;
//
// retrieve the max packet length of the given endpoint
//
if (Direction == EfiUsbDataIn) {
- MaxPacketLen = (PeiBotDev->BulkInEndpoint)->MaxPacketSize;
- EndpointAddr = (PeiBotDev->BulkInEndpoint)->EndpointAddress;
+ MaxPacketLen = (PeiBotDev->BulkInEndpoint)->MaxPacketSize;
+ EndpointAddr = (PeiBotDev->BulkInEndpoint)->EndpointAddress;
} else {
- MaxPacketLen = (PeiBotDev->BulkOutEndpoint)->MaxPacketSize;
- EndpointAddr = (PeiBotDev->BulkOutEndpoint)->EndpointAddress;
+ MaxPacketLen = (PeiBotDev->BulkOutEndpoint)->MaxPacketSize;
+ EndpointAddr = (PeiBotDev->BulkOutEndpoint)->EndpointAddress;
}
while (Remain > 0) {
@@ -213,13 +213,13 @@ BotDataPhase (
}
Status = UsbIoPpi->UsbBulkTransfer (
- PeiServices,
- UsbIoPpi,
- EndpointAddr,
- BufferPtr,
- &Increment,
- Timeout
- );
+ PeiServices,
+ UsbIoPpi,
+ EndpointAddr,
+ BufferPtr,
+ &Increment,
+ Timeout
+ );
TransferredSize += Increment;
@@ -229,10 +229,10 @@ BotDataPhase (
}
BufferPtr += Increment;
- Remain -= Increment;
+ Remain -= Increment;
}
- *DataSize = (UINT32) TransferredSize;
+ *DataSize = (UINT32)TransferredSize;
return EFI_SUCCESS;
}
@@ -256,10 +256,10 @@ BotDataPhase (
**/
EFI_STATUS
BotStatusPhase (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev,
- OUT UINT8 *TransferStatus,
- IN UINT16 Timeout
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev,
+ OUT UINT8 *TransferStatus,
+ IN UINT16 Timeout
)
{
CSW Csw;
@@ -272,21 +272,21 @@ BotStatusPhase (
ZeroMem (&Csw, sizeof (CSW));
- EndpointAddr = (PeiBotDev->BulkInEndpoint)->EndpointAddress;
+ EndpointAddr = (PeiBotDev->BulkInEndpoint)->EndpointAddress;
- DataSize = sizeof (CSW);
+ DataSize = sizeof (CSW);
//
// Get the status field from bulk transfer
//
Status = UsbIoPpi->UsbBulkTransfer (
- PeiServices,
- UsbIoPpi,
- EndpointAddr,
- &Csw,
- &DataSize,
- Timeout
- );
+ PeiServices,
+ UsbIoPpi,
+ EndpointAddr,
+ &Csw,
+ &DataSize,
+ Timeout
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -319,14 +319,14 @@ BotStatusPhase (
**/
EFI_STATUS
PeiAtapiCommand (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev,
- IN VOID *Command,
- IN UINT8 CommandSize,
- IN VOID *DataBuffer,
- IN UINT32 BufferLength,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT16 TimeOutInMilliSeconds
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev,
+ IN VOID *Command,
+ IN UINT8 CommandSize,
+ IN VOID *DataBuffer,
+ IN UINT32 BufferLength,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT16 TimeOutInMilliSeconds
)
{
EFI_STATUS Status;
@@ -339,48 +339,50 @@ PeiAtapiCommand (
// First send ATAPI command through Bot
//
Status = BotCommandPhase (
- PeiServices,
- PeiBotDev,
- Command,
- CommandSize,
- BufferLength,
- Direction,
- TimeOutInMilliSeconds
- );
+ PeiServices,
+ PeiBotDev,
+ Command,
+ CommandSize,
+ BufferLength,
+ Direction,
+ TimeOutInMilliSeconds
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
+
//
// Send/Get Data if there is a Data Stage
//
switch (Direction) {
- case EfiUsbDataIn:
- case EfiUsbDataOut:
- BufferSize = BufferLength;
-
- BotDataStatus = BotDataPhase (
- PeiServices,
- PeiBotDev,
- &BufferSize,
- DataBuffer,
- Direction,
- TimeOutInMilliSeconds
- );
- break;
-
- case EfiUsbNoData:
- break;
+ case EfiUsbDataIn:
+ case EfiUsbDataOut:
+ BufferSize = BufferLength;
+
+ BotDataStatus = BotDataPhase (
+ PeiServices,
+ PeiBotDev,
+ &BufferSize,
+ DataBuffer,
+ Direction,
+ TimeOutInMilliSeconds
+ );
+ break;
+
+ case EfiUsbNoData:
+ break;
}
+
//
// Status Phase
//
Status = BotStatusPhase (
- PeiServices,
- PeiBotDev,
- &TransferStatus,
- TimeOutInMilliSeconds
- );
+ PeiServices,
+ PeiBotDev,
+ &TransferStatus,
+ TimeOutInMilliSeconds
+ );
if (EFI_ERROR (Status)) {
BotRecoveryReset (PeiServices, PeiBotDev);
return EFI_DEVICE_ERROR;
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.h b/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.h
index a4ad759b0b..54d149e45b 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.h
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/BotPeim.h
@@ -10,14 +10,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PEI_BOT_PEIM_H_
#define _PEI_BOT_PEIM_H_
-
#include <PiPei.h>
#include <Ppi/UsbIo.h>
#include <Ppi/UsbHostController.h>
#include <Ppi/BlockIo.h>
-//#include <Library/DebugLib.h>
+// #include <Library/DebugLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/BaseMemoryLib.h>
@@ -29,20 +28,20 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Bulk Only device protocol
//
typedef struct {
- UINT32 Signature;
- UINT32 Tag;
- UINT32 DataTransferLength;
- UINT8 Flags;
- UINT8 Lun;
- UINT8 CmdLen;
- UINT8 CmdBlock[16];
+ UINT32 Signature;
+ UINT32 Tag;
+ UINT32 DataTransferLength;
+ UINT8 Flags;
+ UINT8 Lun;
+ UINT8 CmdLen;
+ UINT8 CmdBlock[16];
} CBW;
typedef struct {
- UINT32 Signature;
- UINT32 Tag;
- UINT32 DataResidue;
- UINT8 Status;
+ UINT32 Signature;
+ UINT32 Tag;
+ UINT32 DataResidue;
+ UINT8 Status;
} CSW;
#pragma pack()
@@ -178,8 +177,8 @@ PeiUsbRead10 (
**/
BOOLEAN
IsNoMedia (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -194,8 +193,8 @@ IsNoMedia (
**/
BOOLEAN
IsMediaError (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
/**
@@ -210,8 +209,8 @@ IsMediaError (
**/
BOOLEAN
IsMediaChange (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiAtapi.c b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiAtapi.c
index c5ba307e75..422ac5fec9 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiAtapi.c
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiAtapi.c
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbBotPeim.h"
#include "BotPeim.h"
-#define MAXSENSEKEY 5
+#define MAXSENSEKEY 5
/**
Sends out ATAPI Inquiry Packet Command to the specified device. This command will
@@ -31,7 +31,7 @@ PeiUsbInquiry (
{
ATAPI_PACKET_COMMAND Packet;
EFI_STATUS Status;
- ATAPI_INQUIRY_DATA Idata;
+ ATAPI_INQUIRY_DATA Idata;
//
// fill command packet
@@ -39,9 +39,9 @@ PeiUsbInquiry (
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
ZeroMem (&Idata, sizeof (ATAPI_INQUIRY_DATA));
- Packet.Inquiry.opcode = ATA_CMD_INQUIRY;
- Packet.Inquiry.page_code = 0;
- Packet.Inquiry.allocation_length = 36;
+ Packet.Inquiry.opcode = ATA_CMD_INQUIRY;
+ Packet.Inquiry.page_code = 0;
+ Packet.Inquiry.allocation_length = 36;
//
// Send scsi INQUIRY command packet.
@@ -49,29 +49,29 @@ PeiUsbInquiry (
// retrieve the first 36 bytes for standard INQUIRY data.
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- &Idata,
- 36,
- EfiUsbDataIn,
- 2000
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ &Idata,
+ 36,
+ EfiUsbDataIn,
+ 2000
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
if ((Idata.peripheral_type & 0x1f) == 0x05) {
- PeiBotDevice->DeviceType = USBCDROM;
- PeiBotDevice->Media.BlockSize = 0x800;
+ PeiBotDevice->DeviceType = USBCDROM;
+ PeiBotDevice->Media.BlockSize = 0x800;
PeiBotDevice->Media2.ReadOnly = TRUE;
PeiBotDevice->Media2.RemovableMedia = TRUE;
PeiBotDevice->Media2.BlockSize = 0x800;
} else {
- PeiBotDevice->DeviceType = USBFLOPPY;
- PeiBotDevice->Media.BlockSize = 0x200;
+ PeiBotDevice->DeviceType = USBFLOPPY;
+ PeiBotDevice->Media.BlockSize = 0x200;
PeiBotDevice->Media2.ReadOnly = FALSE;
PeiBotDevice->Media2.RemovableMedia = TRUE;
PeiBotDevice->Media2.BlockSize = 0x200;
@@ -110,15 +110,15 @@ PeiUsbTestUnitReady (
// send command packet
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- NULL,
- 0,
- EfiUsbNoData,
- 2000
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ NULL,
+ 0,
+ EfiUsbNoData,
+ 2000
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -147,11 +147,11 @@ PeiUsbRequestSense (
IN UINT8 *SenseKeyBuffer
)
{
- EFI_STATUS Status;
- ATAPI_PACKET_COMMAND Packet;
- UINT8 *Ptr;
- BOOLEAN SenseReq;
- ATAPI_REQUEST_SENSE_DATA *Sense;
+ EFI_STATUS Status;
+ ATAPI_PACKET_COMMAND Packet;
+ UINT8 *Ptr;
+ BOOLEAN SenseReq;
+ ATAPI_REQUEST_SENSE_DATA *Sense;
*SenseCounts = 0;
@@ -160,7 +160,7 @@ PeiUsbRequestSense (
//
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
Packet.RequestSence.opcode = ATA_CMD_REQUEST_SENSE;
- Packet.RequestSence.allocation_length = (UINT8) sizeof (ATAPI_REQUEST_SENSE_DATA);
+ Packet.RequestSence.allocation_length = (UINT8)sizeof (ATAPI_REQUEST_SENSE_DATA);
Ptr = SenseKeyBuffer;
@@ -171,22 +171,22 @@ PeiUsbRequestSense (
// until no sense data exists in the device.
//
while (SenseReq) {
- Sense = (ATAPI_REQUEST_SENSE_DATA *) Ptr;
+ Sense = (ATAPI_REQUEST_SENSE_DATA *)Ptr;
//
// send out Request Sense Packet Command and get one Sense
// data form device.
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- (VOID *) Ptr,
- sizeof (ATAPI_REQUEST_SENSE_DATA),
- EfiUsbDataIn,
- 2000
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ (VOID *)Ptr,
+ sizeof (ATAPI_REQUEST_SENSE_DATA),
+ EfiUsbDataIn,
+ 2000
+ );
//
// failed to get Sense data
@@ -200,7 +200,6 @@ PeiUsbRequestSense (
}
if (Sense->sense_key != ATA_SK_NO_SENSE) {
-
Ptr += sizeof (ATAPI_REQUEST_SENSE_DATA);
//
// Ptr is byte based pointer
@@ -210,7 +209,6 @@ PeiUsbRequestSense (
if (*SenseCounts == MAXSENSEKEY) {
break;
}
-
} else {
//
// when no sense key, skip out the loop
@@ -240,10 +238,10 @@ PeiUsbReadCapacity (
IN PEI_BOT_DEVICE *PeiBotDevice
)
{
- EFI_STATUS Status;
- ATAPI_PACKET_COMMAND Packet;
- ATAPI_READ_CAPACITY_DATA Data;
- UINT32 LastBlock;
+ EFI_STATUS Status;
+ ATAPI_PACKET_COMMAND Packet;
+ ATAPI_READ_CAPACITY_DATA Data;
+ UINT32 LastBlock;
ZeroMem (&Data, sizeof (ATAPI_READ_CAPACITY_DATA));
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
@@ -254,20 +252,21 @@ PeiUsbReadCapacity (
// send command packet
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- (VOID *) &Data,
- sizeof (ATAPI_READ_CAPACITY_DATA),
- EfiUsbDataIn,
- 2000
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ (VOID *)&Data,
+ sizeof (ATAPI_READ_CAPACITY_DATA),
+ EfiUsbDataIn,
+ 2000
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
- LastBlock = ((UINT32) Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0;
+
+ LastBlock = ((UINT32)Data.LastLba3 << 24) | (Data.LastLba2 << 16) | (Data.LastLba1 << 8) | Data.LastLba0;
if (LastBlock == 0xFFFFFFFF) {
DEBUG ((DEBUG_INFO, "The usb device LBA count is larger than 0xFFFFFFFF!\n"));
@@ -300,30 +299,30 @@ PeiUsbReadFormattedCapacity (
IN PEI_BOT_DEVICE *PeiBotDevice
)
{
- EFI_STATUS Status;
- ATAPI_PACKET_COMMAND Packet;
- ATAPI_READ_FORMAT_CAPACITY_DATA FormatData;
- UINT32 LastBlock;
+ EFI_STATUS Status;
+ ATAPI_PACKET_COMMAND Packet;
+ ATAPI_READ_FORMAT_CAPACITY_DATA FormatData;
+ UINT32 LastBlock;
ZeroMem (&FormatData, sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA));
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
- Packet.ReadFormatCapacity.opcode = ATA_CMD_READ_FORMAT_CAPACITY;
- Packet.ReadFormatCapacity.allocation_length_lo = 12;
+ Packet.ReadFormatCapacity.opcode = ATA_CMD_READ_FORMAT_CAPACITY;
+ Packet.ReadFormatCapacity.allocation_length_lo = 12;
//
// send command packet
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- (VOID *) &FormatData,
- sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA),
- EfiUsbDataIn,
- 2000
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ (VOID *)&FormatData,
+ sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA),
+ EfiUsbDataIn,
+ 2000
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -335,11 +334,10 @@ PeiUsbReadFormattedCapacity (
//
PeiBotDevice->Media.MediaPresent = FALSE;
PeiBotDevice->Media.LastBlock = 0;
- PeiBotDevice->Media2.MediaPresent = FALSE;
- PeiBotDevice->Media2.LastBlock = 0;
-
+ PeiBotDevice->Media2.MediaPresent = FALSE;
+ PeiBotDevice->Media2.LastBlock = 0;
} else {
- LastBlock = ((UINT32) FormatData.LastLba3 << 24) | (FormatData.LastLba2 << 16) | (FormatData.LastLba1 << 8) | FormatData.LastLba0;
+ LastBlock = ((UINT32)FormatData.LastLba3 << 24) | (FormatData.LastLba2 << 16) | (FormatData.LastLba1 << 8) | FormatData.LastLba0;
if (LastBlock == 0xFFFFFFFF) {
DEBUG ((DEBUG_INFO, "The usb device LBA count is larger than 0xFFFFFFFF!\n"));
}
@@ -397,26 +395,23 @@ PeiUsbRead10 (
// prepare command packet for the Inquiry Packet Command.
//
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));
- Read10Packet = &Packet.Read10;
- Lba32 = (UINT32) Lba;
- PtrBuffer = Buffer;
+ Read10Packet = &Packet.Read10;
+ Lba32 = (UINT32)Lba;
+ PtrBuffer = Buffer;
- BlockSize = (UINT32) PeiBotDevice->Media.BlockSize;
+ BlockSize = (UINT32)PeiBotDevice->Media.BlockSize;
- MaxBlock = (UINT16) (65535 / BlockSize);
- BlocksRemaining = (UINT16) NumberOfBlocks;
+ MaxBlock = (UINT16)(65535 / BlockSize);
+ BlocksRemaining = (UINT16)NumberOfBlocks;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
while (BlocksRemaining > 0) {
-
if (BlocksRemaining <= MaxBlock) {
-
SectorCount = BlocksRemaining;
-
} else {
-
SectorCount = MaxBlock;
}
+
//
// fill the Packet data structure
//
@@ -426,43 +421,43 @@ PeiUsbRead10 (
// Lba0 ~ Lba3 specify the start logical block address of the data transfer.
// Lba0 is MSB, Lba3 is LSB
//
- Read10Packet->Lba3 = (UINT8) (Lba32 & 0xff);
- Read10Packet->Lba2 = (UINT8) (Lba32 >> 8);
- Read10Packet->Lba1 = (UINT8) (Lba32 >> 16);
- Read10Packet->Lba0 = (UINT8) (Lba32 >> 24);
+ Read10Packet->Lba3 = (UINT8)(Lba32 & 0xff);
+ Read10Packet->Lba2 = (UINT8)(Lba32 >> 8);
+ Read10Packet->Lba1 = (UINT8)(Lba32 >> 16);
+ Read10Packet->Lba0 = (UINT8)(Lba32 >> 24);
//
// TranLen0 ~ TranLen1 specify the transfer length in block unit.
// TranLen0 is MSB, TranLen is LSB
//
- Read10Packet->TranLen1 = (UINT8) (SectorCount & 0xff);
- Read10Packet->TranLen0 = (UINT8) (SectorCount >> 8);
+ Read10Packet->TranLen1 = (UINT8)(SectorCount & 0xff);
+ Read10Packet->TranLen0 = (UINT8)(SectorCount >> 8);
- ByteCount = SectorCount * BlockSize;
+ ByteCount = SectorCount * BlockSize;
- TimeOut = (UINT16) (SectorCount * 2000);
+ TimeOut = (UINT16)(SectorCount * 2000);
//
// send command packet
//
Status = PeiAtapiCommand (
- PeiServices,
- PeiBotDevice,
- &Packet,
- (UINT8) sizeof (ATAPI_PACKET_COMMAND),
- (VOID *) PtrBuffer,
- ByteCount,
- EfiUsbDataIn,
- TimeOut
- );
+ PeiServices,
+ PeiBotDevice,
+ &Packet,
+ (UINT8)sizeof (ATAPI_PACKET_COMMAND),
+ (VOID *)PtrBuffer,
+ ByteCount,
+ EfiUsbDataIn,
+ TimeOut
+ );
if (Status != EFI_SUCCESS) {
return Status;
}
- Lba32 += SectorCount;
- PtrBuffer = (UINT8 *) PtrBuffer + SectorCount * BlockSize;
- BlocksRemaining = (UINT16) (BlocksRemaining - SectorCount);
+ Lba32 += SectorCount;
+ PtrBuffer = (UINT8 *)PtrBuffer + SectorCount * BlockSize;
+ BlocksRemaining = (UINT16)(BlocksRemaining - SectorCount);
}
return Status;
@@ -480,37 +475,36 @@ PeiUsbRead10 (
**/
BOOLEAN
IsNoMedia (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
ATAPI_REQUEST_SENSE_DATA *SensePtr;
UINTN Index;
BOOLEAN NoMedia;
- NoMedia = FALSE;
- SensePtr = SenseData;
+ NoMedia = FALSE;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->sense_key) {
+ case ATA_SK_NOT_READY:
+ switch (SensePtr->addnl_sense_code) {
+ //
+ // if no media, fill IdeDev parameter with specific info.
+ //
+ case ATA_ASC_NO_MEDIA:
+ NoMedia = TRUE;
+ break;
+
+ default:
+ break;
+ }
- case ATA_SK_NOT_READY:
- switch (SensePtr->addnl_sense_code) {
- //
- // if no media, fill IdeDev parameter with specific info.
- //
- case ATA_ASC_NO_MEDIA:
- NoMedia = TRUE;
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
@@ -531,63 +525,63 @@ IsNoMedia (
**/
BOOLEAN
IsMediaError (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
ATAPI_REQUEST_SENSE_DATA *SensePtr;
UINTN Index;
BOOLEAN Error;
- SensePtr = SenseData;
- Error = FALSE;
+ SensePtr = SenseData;
+ Error = FALSE;
for (Index = 0; Index < SenseCounts; Index++) {
-
switch (SensePtr->sense_key) {
- //
- // Medium error case
- //
- case ATA_SK_MEDIUM_ERROR:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_MEDIA_ERR1:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR2:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR3:
- //
- // fall through
- //
- case ATA_ASC_MEDIA_ERR4:
- Error = TRUE;
- break;
+ //
+ // Medium error case
+ //
+ case ATA_SK_MEDIUM_ERROR:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_MEDIA_ERR1:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR2:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR3:
+ //
+ // fall through
+ //
+ case ATA_ASC_MEDIA_ERR4:
+ Error = TRUE;
+ break;
+
+ default:
+ break;
+ }
- default:
break;
- }
- break;
+ //
+ // Medium upside-down case
+ //
+ case ATA_SK_NOT_READY:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_MEDIA_UPSIDE_DOWN:
+ Error = TRUE;
+ break;
+
+ default:
+ break;
+ }
- //
- // Medium upside-down case
- //
- case ATA_SK_NOT_READY:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_MEDIA_UPSIDE_DOWN:
- Error = TRUE;
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
@@ -608,8 +602,8 @@ IsMediaError (
**/
BOOLEAN
IsMediaChange (
- IN ATAPI_REQUEST_SENSE_DATA *SenseData,
- IN UINTN SenseCounts
+ IN ATAPI_REQUEST_SENSE_DATA *SenseData,
+ IN UINTN SenseCounts
)
{
ATAPI_REQUEST_SENSE_DATA *SensePtr;
@@ -618,26 +612,27 @@ IsMediaChange (
MediaChange = FALSE;
- SensePtr = SenseData;
+ SensePtr = SenseData;
for (Index = 0; Index < SenseCounts; Index++) {
//
// catch media change sense key and addition sense data
//
switch (SensePtr->sense_key) {
- case ATA_SK_UNIT_ATTENTION:
- switch (SensePtr->addnl_sense_code) {
- case ATA_ASC_MEDIA_CHANGE:
- MediaChange = TRUE;
+ case ATA_SK_UNIT_ATTENTION:
+ switch (SensePtr->addnl_sense_code) {
+ case ATA_ASC_MEDIA_CHANGE:
+ MediaChange = TRUE;
+ break;
+
+ default:
+ break;
+ }
+
break;
default:
break;
- }
- break;
-
- default:
- break;
}
SensePtr++;
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.c b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.c
index 292682a2e4..dfc4e40698 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.c
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.c
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbPeim.h"
#include "PeiUsbLib.h"
-
/**
Clear a given usb feature.
@@ -27,11 +26,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PeiUsbClearDeviceFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN EFI_USB_RECIPIENT Recipient,
- IN UINT16 Value,
- IN UINT16 Target
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN EFI_USB_RECIPIENT Recipient,
+ IN UINT16 Value,
+ IN UINT16 Target
)
{
EFI_USB_DEVICE_REQUEST DevReq;
@@ -39,23 +38,23 @@ PeiUsbClearDeviceFeature (
ASSERT (UsbIoPpi != NULL);
switch (Recipient) {
- case EfiUsbDevice:
- DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_D;
- break;
+ case EfiUsbDevice:
+ DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_D;
+ break;
- case EfiUsbInterface:
- DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_I;
- break;
+ case EfiUsbInterface:
+ DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_I;
+ break;
- case EfiUsbEndpoint:
- DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_E;
- break;
+ case EfiUsbEndpoint:
+ DevReq.RequestType = USB_DEV_CLEAR_FEATURE_REQ_TYPE_E;
+ break;
}
- DevReq.Request = USB_DEV_CLEAR_FEATURE;
- DevReq.Value = Value;
- DevReq.Index = Target;
- DevReq.Length = 0;
+ DevReq.Request = USB_DEV_CLEAR_FEATURE;
+ DevReq.Value = Value;
+ DevReq.Index = Target;
+ DevReq.Length = 0;
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -68,7 +67,6 @@ PeiUsbClearDeviceFeature (
);
}
-
/**
Clear Endpoint Halt.
@@ -83,9 +81,9 @@ PeiUsbClearDeviceFeature (
**/
EFI_STATUS
PeiUsbClearEndpointHalt (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 EndpointAddress
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 EndpointAddress
)
{
EFI_STATUS Status;
@@ -93,18 +91,18 @@ PeiUsbClearEndpointHalt (
EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor;
UINT8 EndpointIndex;
-
//
// Check its interface
//
Status = UsbIoPpi->UsbGetInterfaceDescriptor (
- PeiServices,
- UsbIoPpi,
- &InterfaceDesc
- );
+ PeiServices,
+ UsbIoPpi,
+ &InterfaceDesc
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
for (EndpointIndex = 0; EndpointIndex < InterfaceDesc->NumEndpoints; EndpointIndex++) {
Status = UsbIoPpi->UsbGetEndpointDescriptor (PeiServices, UsbIoPpi, EndpointIndex, &EndpointDescriptor);
if (EFI_ERROR (Status)) {
@@ -121,14 +119,12 @@ PeiUsbClearEndpointHalt (
}
Status = PeiUsbClearDeviceFeature (
- PeiServices,
- UsbIoPpi,
- EfiUsbEndpoint,
- EfiUsbEndpointHalt,
- EndpointAddress
- );
+ PeiServices,
+ UsbIoPpi,
+ EfiUsbEndpoint,
+ EfiUsbEndpointHalt,
+ EndpointAddress
+ );
return Status;
}
-
-
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.h b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.h
index e06e2533a7..41894610a2 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.h
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/PeiUsbLib.h
@@ -13,29 +13,29 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Standard device request and request type
// By [Spec-USB20/Chapter-9.4]
//
-#define USB_DEV_GET_STATUS 0x00
-#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
-#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
-#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
+#define USB_DEV_GET_STATUS 0x00
+#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
+#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
+#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
-#define USB_DEV_CLEAR_FEATURE 0x01
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_CLEAR_FEATURE 0x01
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_FEATURE 0x03
-#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_SET_FEATURE 0x03
+#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_ADDRESS 0x05
-#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
+#define USB_DEV_SET_ADDRESS 0x05
+#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
-#define USB_DEV_GET_DESCRIPTOR 0x06
-#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
+#define USB_DEV_GET_DESCRIPTOR 0x06
+#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
-#define USB_DEV_SET_DESCRIPTOR 0x07
-#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
+#define USB_DEV_SET_DESCRIPTOR 0x07
+#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
#define USB_DEV_GET_CONFIGURATION 0x08
#define USB_DEV_GET_CONFIGURATION_REQ_TYPE 0x80
@@ -43,14 +43,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_DEV_SET_CONFIGURATION 0x09
#define USB_DEV_SET_CONFIGURATION_REQ_TYPE 0x00
-#define USB_DEV_GET_INTERFACE 0x0A
-#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
+#define USB_DEV_GET_INTERFACE 0x0A
+#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
-#define USB_DEV_SET_INTERFACE 0x0B
-#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+#define USB_DEV_SET_INTERFACE 0x0B
+#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
-#define USB_DEV_SYNCH_FRAME 0x0C
-#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
+#define USB_DEV_SYNCH_FRAME 0x0C
+#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
//
// USB Descriptor types
@@ -66,18 +66,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// USB request type
//
-#define USB_TYPE_STANDARD (0x00 << 5)
-#define USB_TYPE_CLASS (0x01 << 5)
-#define USB_TYPE_VENDOR (0x02 << 5)
-#define USB_TYPE_RESERVED (0x03 << 5)
+#define USB_TYPE_STANDARD (0x00 << 5)
+#define USB_TYPE_CLASS (0x01 << 5)
+#define USB_TYPE_VENDOR (0x02 << 5)
+#define USB_TYPE_RESERVED (0x03 << 5)
//
// USB request targer device
//
-#define USB_RECIP_DEVICE 0x00
-#define USB_RECIP_INTERFACE 0x01
-#define USB_RECIP_ENDPOINT 0x02
-#define USB_RECIP_OTHER 0x03
+#define USB_RECIP_DEVICE 0x00
+#define USB_RECIP_INTERFACE 0x01
+#define USB_RECIP_ENDPOINT 0x02
+#define USB_RECIP_OTHER 0x03
typedef enum {
EfiUsbEndpointHalt,
@@ -93,7 +93,6 @@ typedef enum {
EfiUsbEndpoint
} EFI_USB_RECIPIENT;
-
/**
Clear a given usb feature.
@@ -110,14 +109,13 @@ typedef enum {
**/
EFI_STATUS
PeiUsbClearDeviceFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN EFI_USB_RECIPIENT Recipient,
- IN UINT16 Value,
- IN UINT16 Target
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN EFI_USB_RECIPIENT Recipient,
+ IN UINT16 Value,
+ IN UINT16 Target
);
-
/**
Clear Endpoint Halt.
@@ -132,12 +130,9 @@ PeiUsbClearDeviceFeature (
**/
EFI_STATUS
PeiUsbClearEndpointHalt (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 EndpointAddress
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 EndpointAddress
);
-
-
-
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.c b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.c
index e110626886..ef62f441e3 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.c
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.c
@@ -12,26 +12,26 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Global function
//
-EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
+EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gPeiUsbIoPpiGuid,
NotifyOnUsbIoPpi
};
-EFI_PEI_RECOVERY_BLOCK_IO_PPI mRecoveryBlkIoPpi = {
+EFI_PEI_RECOVERY_BLOCK_IO_PPI mRecoveryBlkIoPpi = {
BotGetNumberOfBlockDevices,
BotGetMediaInfo,
BotReadBlocks
};
-EFI_PEI_RECOVERY_BLOCK_IO2_PPI mRecoveryBlkIo2Ppi = {
+EFI_PEI_RECOVERY_BLOCK_IO2_PPI mRecoveryBlkIo2Ppi = {
EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION,
BotGetNumberOfBlockDevices2,
BotGetMediaInfo2,
BotReadBlocks2
};
-EFI_PEI_PPI_DESCRIPTOR mPpiList[2] = {
+EFI_PEI_PPI_DESCRIPTOR mPpiList[2] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gEfiPeiVirtualBlockIoPpiGuid,
@@ -57,8 +57,8 @@ EFI_PEI_PPI_DESCRIPTOR mPpiList[2] = {
**/
EFI_STATUS
PeiBotDetectMedia (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev
);
/**
@@ -74,14 +74,14 @@ PeiBotDetectMedia (
EFI_STATUS
EFIAPI
PeimInitializeUsbBot (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- UINTN UsbIoPpiInstance;
- EFI_PEI_PPI_DESCRIPTOR *TempPpiDescriptor;
- PEI_USB_IO_PPI *UsbIoPpi;
+ EFI_STATUS Status;
+ UINTN UsbIoPpiInstance;
+ EFI_PEI_PPI_DESCRIPTOR *TempPpiDescriptor;
+ PEI_USB_IO_PPI *UsbIoPpi;
//
// Shadow this PEIM to run from memory
@@ -94,17 +94,17 @@ PeimInitializeUsbBot (
// locate all usb io PPIs
//
for (UsbIoPpiInstance = 0; UsbIoPpiInstance < PEI_FAT_MAX_USB_IO_PPI; UsbIoPpiInstance++) {
-
Status = PeiServicesLocatePpi (
- &gPeiUsbIoPpiGuid,
- UsbIoPpiInstance,
- &TempPpiDescriptor,
- (VOID **) &UsbIoPpi
- );
+ &gPeiUsbIoPpiGuid,
+ UsbIoPpiInstance,
+ &TempPpiDescriptor,
+ (VOID **)&UsbIoPpi
+ );
if (EFI_ERROR (Status)) {
break;
}
}
+
//
// Register a notify function
//
@@ -127,14 +127,14 @@ PeimInitializeUsbBot (
EFI_STATUS
EFIAPI
NotifyOnUsbIoPpi (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
- IN VOID *InvokePpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *InvokePpi
)
{
PEI_USB_IO_PPI *UsbIoPpi;
- UsbIoPpi = (PEI_USB_IO_PPI *) InvokePpi;
+ UsbIoPpi = (PEI_USB_IO_PPI *)InvokePpi;
InitUsbBot (PeiServices, UsbIoPpi);
@@ -154,8 +154,8 @@ NotifyOnUsbIoPpi (
**/
EFI_STATUS
InitUsbBot (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi
)
{
PEI_BOT_DEVICE *PeiBotDevice;
@@ -170,45 +170,45 @@ InitUsbBot (
// Check its interface
//
Status = UsbIoPpi->UsbGetInterfaceDescriptor (
- PeiServices,
- UsbIoPpi,
- &InterfaceDesc
- );
+ PeiServices,
+ UsbIoPpi,
+ &InterfaceDesc
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check if it is the BOT device we support
//
if ((InterfaceDesc->InterfaceClass != 0x08) || (InterfaceDesc->InterfaceProtocol != 0x50)) {
-
return EFI_NOT_FOUND;
}
MemPages = sizeof (PEI_BOT_DEVICE) / EFI_PAGE_SIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &AllocateAddress
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &AllocateAddress
+ );
if (EFI_ERROR (Status)) {
return Status;
}
- PeiBotDevice = (PEI_BOT_DEVICE *) ((UINTN) AllocateAddress);
+ PeiBotDevice = (PEI_BOT_DEVICE *)((UINTN)AllocateAddress);
PeiBotDevice->Signature = PEI_BOT_DEVICE_SIGNATURE;
PeiBotDevice->UsbIoPpi = UsbIoPpi;
- PeiBotDevice->AllocateAddress = (UINTN) AllocateAddress;
+ PeiBotDevice->AllocateAddress = (UINTN)AllocateAddress;
PeiBotDevice->BotInterface = InterfaceDesc;
//
// Default value
//
- PeiBotDevice->Media.DeviceType = UsbMassStorage;
- PeiBotDevice->Media.BlockSize = 0x200;
- PeiBotDevice->Media2.InterfaceType = MSG_USB_DP;
- PeiBotDevice->Media2.BlockSize = 0x200;
+ PeiBotDevice->Media.DeviceType = UsbMassStorage;
+ PeiBotDevice->Media.BlockSize = 0x200;
+ PeiBotDevice->Media2.InterfaceType = MSG_USB_DP;
+ PeiBotDevice->Media2.BlockSize = 0x200;
PeiBotDevice->Media2.RemovableMedia = FALSE;
PeiBotDevice->Media2.ReadOnly = FALSE;
@@ -217,11 +217,11 @@ InitUsbBot (
//
for (Index = 0; Index < 2; Index++) {
Status = UsbIoPpi->UsbGetEndpointDescriptor (
- PeiServices,
- UsbIoPpi,
- Index,
- &EndpointDesc
- );
+ PeiServices,
+ UsbIoPpi,
+ Index,
+ &EndpointDesc
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -257,7 +257,7 @@ InitUsbBot (
PeiBotDevice->BlkIoPpiList.Ppi = &PeiBotDevice->BlkIoPpi;
PeiBotDevice->BlkIo2PpiList.Ppi = &PeiBotDevice->BlkIo2Ppi;
- Status = PeiUsbInquiry (PeiServices, PeiBotDevice);
+ Status = PeiUsbInquiry (PeiServices, PeiBotDevice);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -271,7 +271,7 @@ InitUsbBot (
return Status;
}
- PeiBotDevice->SensePtr = (ATAPI_REQUEST_SENSE_DATA *) ((UINTN) AllocateAddress);
+ PeiBotDevice->SensePtr = (ATAPI_REQUEST_SENSE_DATA *)((UINTN)AllocateAddress);
Status = PeiServicesInstallPpi (&PeiBotDevice->BlkIoPpiList);
@@ -304,9 +304,9 @@ InitUsbBot (
EFI_STATUS
EFIAPI
BotGetNumberOfBlockDevices (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
//
@@ -346,10 +346,10 @@ BotGetNumberOfBlockDevices (
EFI_STATUS
EFIAPI
BotGetMediaInfo (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
PEI_BOT_DEVICE *PeiBotDev;
@@ -366,9 +366,9 @@ BotGetMediaInfo (
);
Status = PeiBotDetectMedia (
- PeiServices,
- PeiBotDev
- );
+ PeiServices,
+ PeiBotDev
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -420,12 +420,12 @@ BotGetMediaInfo (
EFI_STATUS
EFIAPI
BotReadBlocks (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
PEI_BOT_DEVICE *PeiBotDev;
@@ -464,19 +464,18 @@ BotReadBlocks (
NumberOfBlocks = BufferSize / (PeiBotDev->Media.BlockSize);
if (Status == EFI_SUCCESS) {
-
Status = PeiUsbTestUnitReady (
- PeiServices,
- PeiBotDev
- );
+ PeiServices,
+ PeiBotDev
+ );
if (Status == EFI_SUCCESS) {
Status = PeiUsbRead10 (
- PeiServices,
- PeiBotDev,
- Buffer,
- StartLBA,
- 1
- );
+ PeiServices,
+ PeiBotDev,
+ Buffer,
+ StartLBA,
+ 1
+ );
}
} else {
//
@@ -494,9 +493,9 @@ BotReadBlocks (
// update the media info accordingly.
//
Status = PeiBotDetectMedia (
- PeiServices,
- PeiBotDev
- );
+ PeiServices,
+ PeiBotDev
+ );
if (Status != EFI_SUCCESS) {
return EFI_DEVICE_ERROR;
}
@@ -520,45 +519,42 @@ BotReadBlocks (
}
Status = PeiUsbRead10 (
- PeiServices,
- PeiBotDev,
- Buffer,
- StartLBA,
- NumberOfBlocks
- );
+ PeiServices,
+ PeiBotDev,
+ Buffer,
+ StartLBA,
+ NumberOfBlocks
+ );
switch (Status) {
+ case EFI_SUCCESS:
+ return EFI_SUCCESS;
- case EFI_SUCCESS:
- return EFI_SUCCESS;
-
- default:
- return EFI_DEVICE_ERROR;
+ default:
+ return EFI_DEVICE_ERROR;
}
} else {
- StartLBA += 1;
+ StartLBA += 1;
NumberOfBlocks -= 1;
- Buffer = (UINT8 *) Buffer + PeiBotDev->Media.BlockSize;
+ Buffer = (UINT8 *)Buffer + PeiBotDev->Media.BlockSize;
if (NumberOfBlocks == 0) {
return EFI_SUCCESS;
}
Status = PeiUsbRead10 (
- PeiServices,
- PeiBotDev,
- Buffer,
- StartLBA,
- NumberOfBlocks
- );
+ PeiServices,
+ PeiBotDev,
+ Buffer,
+ StartLBA,
+ NumberOfBlocks
+ );
switch (Status) {
+ case EFI_SUCCESS:
+ return EFI_SUCCESS;
- case EFI_SUCCESS:
- return EFI_SUCCESS;
-
- default:
- return EFI_DEVICE_ERROR;
-
+ default:
+ return EFI_DEVICE_ERROR;
}
}
}
@@ -585,9 +581,9 @@ BotReadBlocks (
EFI_STATUS
EFIAPI
BotGetNumberOfBlockDevices2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
//
@@ -627,10 +623,10 @@ BotGetNumberOfBlockDevices2 (
EFI_STATUS
EFIAPI
BotGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
PEI_BOT_DEVICE *PeiBotDev;
@@ -695,12 +691,12 @@ BotGetMediaInfo2 (
EFI_STATUS
EFIAPI
BotReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
PEI_BOT_DEVICE *PeiBotDev;
@@ -738,25 +734,25 @@ BotReadBlocks2 (
**/
EFI_STATUS
PeiBotDetectMedia (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev
)
{
- EFI_STATUS Status;
- EFI_STATUS FloppyStatus;
- UINTN SenseCounts;
- BOOLEAN NeedReadCapacity;
- EFI_PHYSICAL_ADDRESS AllocateAddress;
- ATAPI_REQUEST_SENSE_DATA *SensePtr;
- UINTN Retry;
+ EFI_STATUS Status;
+ EFI_STATUS FloppyStatus;
+ UINTN SenseCounts;
+ BOOLEAN NeedReadCapacity;
+ EFI_PHYSICAL_ADDRESS AllocateAddress;
+ ATAPI_REQUEST_SENSE_DATA *SensePtr;
+ UINTN Retry;
//
// if there is no media present,or media not changed,
// the request sense command will detect faster than read capacity command.
// read capacity command can be bypassed, thus improve performance.
//
- SenseCounts = 0;
- NeedReadCapacity = TRUE;
+ SenseCounts = 0;
+ NeedReadCapacity = TRUE;
Status = PeiServicesAllocatePages (
EfiBootServicesCode,
@@ -771,20 +767,20 @@ PeiBotDetectMedia (
ZeroMem (SensePtr, EFI_PAGE_SIZE);
Status = PeiUsbRequestSense (
- PeiServices,
- PeiBotDev,
- &SenseCounts,
- (UINT8 *) SensePtr
- );
+ PeiServices,
+ PeiBotDev,
+ &SenseCounts,
+ (UINT8 *)SensePtr
+ );
if (Status == EFI_SUCCESS) {
//
// No Media
//
if (IsNoMedia (SensePtr, SenseCounts)) {
- NeedReadCapacity = FALSE;
- PeiBotDev->Media.MediaPresent = FALSE;
- PeiBotDev->Media.LastBlock = 0;
+ NeedReadCapacity = FALSE;
+ PeiBotDev->Media.MediaPresent = FALSE;
+ PeiBotDev->Media.LastBlock = 0;
PeiBotDev->Media2.MediaPresent = FALSE;
PeiBotDev->Media2.LastBlock = 0;
} else {
@@ -795,6 +791,7 @@ PeiBotDetectMedia (
PeiBotDev->Media.MediaPresent = TRUE;
PeiBotDev->Media2.MediaPresent = TRUE;
}
+
//
// Media Error
//
@@ -802,14 +799,12 @@ PeiBotDetectMedia (
//
// if media error encountered, make it look like no media present.
//
- PeiBotDev->Media.MediaPresent = FALSE;
- PeiBotDev->Media.LastBlock = 0;
+ PeiBotDev->Media.MediaPresent = FALSE;
+ PeiBotDev->Media.LastBlock = 0;
PeiBotDev->Media2.MediaPresent = FALSE;
PeiBotDev->Media2.LastBlock = 0;
}
-
}
-
}
if (NeedReadCapacity) {
@@ -818,43 +813,46 @@ PeiBotDetectMedia (
//
for (Retry = 0; Retry < 4; Retry++) {
switch (PeiBotDev->DeviceType) {
- case USBCDROM:
- Status = PeiUsbReadCapacity (
- PeiServices,
- PeiBotDev
- );
- break;
-
- case USBFLOPPY2:
- Status = PeiUsbReadFormattedCapacity (
- PeiServices,
- PeiBotDev
- );
- if (EFI_ERROR(Status)||
- !PeiBotDev->Media.MediaPresent) {
- //
- // retry the ReadCapacity command
- //
- PeiBotDev->DeviceType = USBFLOPPY;
- Status = EFI_DEVICE_ERROR;
- }
- break;
-
- case USBFLOPPY:
- Status = PeiUsbReadCapacity (
- PeiServices,
- PeiBotDev
- );
- if (EFI_ERROR (Status)) {
- //
- // retry the ReadFormatCapacity command
- //
- PeiBotDev->DeviceType = USBFLOPPY2;
- }
- break;
-
- default:
- return EFI_INVALID_PARAMETER;
+ case USBCDROM:
+ Status = PeiUsbReadCapacity (
+ PeiServices,
+ PeiBotDev
+ );
+ break;
+
+ case USBFLOPPY2:
+ Status = PeiUsbReadFormattedCapacity (
+ PeiServices,
+ PeiBotDev
+ );
+ if (EFI_ERROR (Status) ||
+ !PeiBotDev->Media.MediaPresent)
+ {
+ //
+ // retry the ReadCapacity command
+ //
+ PeiBotDev->DeviceType = USBFLOPPY;
+ Status = EFI_DEVICE_ERROR;
+ }
+
+ break;
+
+ case USBFLOPPY:
+ Status = PeiUsbReadCapacity (
+ PeiServices,
+ PeiBotDev
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // retry the ReadFormatCapacity command
+ //
+ PeiBotDev->DeviceType = USBFLOPPY2;
+ }
+
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
}
SenseCounts = 0;
@@ -865,11 +863,11 @@ PeiBotDetectMedia (
}
FloppyStatus = PeiUsbRequestSense (
- PeiServices,
- PeiBotDev,
- &SenseCounts,
- (UINT8 *) SensePtr
- );
+ PeiServices,
+ PeiBotDev,
+ &SenseCounts,
+ (UINT8 *)SensePtr
+ );
//
// If Request Sense data failed,retry.
@@ -877,12 +875,13 @@ PeiBotDetectMedia (
if (EFI_ERROR (FloppyStatus)) {
continue;
}
+
//
// No Media
//
if (IsNoMedia (SensePtr, SenseCounts)) {
- PeiBotDev->Media.MediaPresent = FALSE;
- PeiBotDev->Media.LastBlock = 0;
+ PeiBotDev->Media.MediaPresent = FALSE;
+ PeiBotDev->Media.LastBlock = 0;
PeiBotDev->Media2.MediaPresent = FALSE;
PeiBotDev->Media2.LastBlock = 0;
break;
@@ -892,13 +891,14 @@ PeiBotDetectMedia (
//
// if media error encountered, make it look like no media present.
//
- PeiBotDev->Media.MediaPresent = FALSE;
- PeiBotDev->Media.LastBlock = 0;
+ PeiBotDev->Media.MediaPresent = FALSE;
+ PeiBotDev->Media.LastBlock = 0;
PeiBotDev->Media2.MediaPresent = FALSE;
PeiBotDev->Media2.LastBlock = 0;
break;
}
}
+
//
// ENDFOR
//
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.h b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.h
index 81ca4a2d07..1819784981 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.h
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPeim.h
@@ -46,9 +46,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_STATUS
EFIAPI
BotGetNumberOfBlockDevices (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -81,10 +81,10 @@ BotGetNumberOfBlockDevices (
EFI_STATUS
EFIAPI
BotGetMediaInfo (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
);
/**
@@ -124,12 +124,12 @@ BotGetMediaInfo (
EFI_STATUS
EFIAPI
BotReadBlocks (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -154,9 +154,9 @@ BotReadBlocks (
EFI_STATUS
EFIAPI
BotGetNumberOfBlockDevices2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -189,10 +189,10 @@ BotGetNumberOfBlockDevices2 (
EFI_STATUS
EFIAPI
BotGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -232,12 +232,12 @@ BotGetMediaInfo2 (
EFI_STATUS
EFIAPI
BotReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -256,9 +256,9 @@ BotReadBlocks2 (
EFI_STATUS
EFIAPI
NotifyOnUsbIoPpi (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
- IN VOID *InvokePpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
+ IN VOID *InvokePpi
);
/**
@@ -274,11 +274,11 @@ NotifyOnUsbIoPpi (
**/
EFI_STATUS
InitUsbBot (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi
);
-#define USBCDROM 1 // let the device type value equal to USBCDROM, which is defined by PI spec.
+#define USBCDROM 1 // let the device type value equal to USBCDROM, which is defined by PI spec.
// Therefore the CdExpressPei module can do recovery on UsbCdrom.
#define USBFLOPPY 2 // for those that use ReadCapacity(0x25) command to retrieve media capacity
#define USBFLOPPY2 3 // for those that use ReadFormatCapacity(0x23) command to retrieve media capacity
@@ -288,24 +288,24 @@ InitUsbBot (
//
#define PEI_BOT_DEVICE_SIGNATURE SIGNATURE_32 ('U', 'B', 'O', 'T')
typedef struct {
- UINTN Signature;
- EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
- EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
- EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
- EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
- EFI_PEI_BLOCK_IO_MEDIA Media;
- EFI_PEI_BLOCK_IO2_MEDIA Media2;
- PEI_USB_IO_PPI *UsbIoPpi;
- EFI_USB_INTERFACE_DESCRIPTOR *BotInterface;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
- UINTN AllocateAddress;
- UINTN DeviceType;
- ATAPI_REQUEST_SENSE_DATA *SensePtr;
+ UINTN Signature;
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
+ EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
+ EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
+ EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
+ EFI_PEI_BLOCK_IO2_MEDIA Media2;
+ PEI_USB_IO_PPI *UsbIoPpi;
+ EFI_USB_INTERFACE_DESCRIPTOR *BotInterface;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
+ UINTN AllocateAddress;
+ UINTN DeviceType;
+ ATAPI_REQUEST_SENSE_DATA *SensePtr;
} PEI_BOT_DEVICE;
-#define PEI_BOT_DEVICE_FROM_THIS(a) CR (a, PEI_BOT_DEVICE, BlkIoPpi, PEI_BOT_DEVICE_SIGNATURE)
-#define PEI_BOT_DEVICE2_FROM_THIS(a) CR (a, PEI_BOT_DEVICE, BlkIo2Ppi, PEI_BOT_DEVICE_SIGNATURE)
+#define PEI_BOT_DEVICE_FROM_THIS(a) CR (a, PEI_BOT_DEVICE, BlkIoPpi, PEI_BOT_DEVICE_SIGNATURE)
+#define PEI_BOT_DEVICE2_FROM_THIS(a) CR (a, PEI_BOT_DEVICE, BlkIo2Ppi, PEI_BOT_DEVICE_SIGNATURE)
/**
Send ATAPI command using BOT protocol.
@@ -326,14 +326,14 @@ typedef struct {
**/
EFI_STATUS
PeiAtapiCommand (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_BOT_DEVICE *PeiBotDev,
- IN VOID *Command,
- IN UINT8 CommandSize,
- IN VOID *DataBuffer,
- IN UINT32 BufferLength,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT16 TimeOutInMilliSeconds
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_BOT_DEVICE *PeiBotDev,
+ IN VOID *Command,
+ IN UINT8 CommandSize,
+ IN VOID *DataBuffer,
+ IN UINT32 BufferLength,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT16 TimeOutInMilliSeconds
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbPeim.h b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbPeim.h
index cb93d72291..225b6cb370 100644
--- a/MdeModulePkg/Bus/Usb/UsbBotPei/UsbPeim.h
+++ b/MdeModulePkg/Bus/Usb/UsbBotPei/UsbPeim.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PEI_USB_PEIM_H_
#define _PEI_USB_PEIM_H_
-
#include <PiPei.h>
#include <Ppi/UsbIo.h>
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/ComponentName.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/ComponentName.c
index 642f936412..c644b42a81 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/ComponentName.c
@@ -7,13 +7,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include <Uefi.h>
-
#include <Library/UefiLib.h>
-
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -61,7 +58,6 @@ UsbBusComponentNameGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -133,14 +129,13 @@ UsbBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
-
//
// EFI Component Name Protocol
//
@@ -153,16 +148,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL mUsbBusComponentName
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mUsbBusComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UsbBusComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UsbBusComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mUsbBusComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UsbBusComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UsbBusComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbBusDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbBusDriverNameTable[] = {
{ "eng;en", L"Usb Bus Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -292,11 +286,11 @@ UsbBusComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbBusComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c
index 7e48a2882c..6a3ac63c3a 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c
@@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbBus.h"
-EFI_USB_IO_PROTOCOL mUsbIoProtocol = {
+EFI_USB_IO_PROTOCOL mUsbIoProtocol = {
UsbIoControlTransfer,
UsbIoBulkTransfer,
UsbIoAsyncInterruptTransfer,
@@ -25,7 +25,7 @@ EFI_USB_IO_PROTOCOL mUsbIoProtocol = {
UsbIoPortReset
};
-EFI_DRIVER_BINDING_PROTOCOL mUsbBusDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL mUsbBusDriverBinding = {
UsbBusControllerDriverSupported,
UsbBusControllerDriverStart,
UsbBusControllerDriverStop,
@@ -65,12 +65,12 @@ UsbIoControlTransfer (
OUT UINT32 *UsbStatus
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- USB_ENDPOINT_DESC *EpDesc;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- UINTN RequestedDataLength;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ USB_ENDPOINT_DESC *EpDesc;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINTN RequestedDataLength;
if (UsbStatus == NULL) {
return EFI_INVALID_PARAMETER;
@@ -78,23 +78,23 @@ UsbIoControlTransfer (
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
RequestedDataLength = DataLength;
- Status = UsbHcControlTransfer (
- Dev->Bus,
- Dev->Address,
- Dev->Speed,
- Dev->MaxPacket0,
- Request,
- Direction,
- Data,
- &DataLength,
- (UINTN) Timeout,
- &Dev->Translator,
- UsbStatus
- );
+ Status = UsbHcControlTransfer (
+ Dev->Bus,
+ Dev->Address,
+ Dev->Speed,
+ Dev->MaxPacket0,
+ Request,
+ Direction,
+ Data,
+ &DataLength,
+ (UINTN)Timeout,
+ &Dev->Translator,
+ UsbStatus
+ );
//
// If the request completed successfully and the Direction of the request is
// EfiUsbDataIn or EfiUsbDataOut, then make sure the actual number of bytes
@@ -102,7 +102,7 @@ UsbIoControlTransfer (
// number of bytes were transferred, then return EFI_DEVICE_ERROR.
//
if (!EFI_ERROR (Status)) {
- if (Direction != EfiUsbNoData && DataLength != RequestedDataLength) {
+ if ((Direction != EfiUsbNoData) && (DataLength != RequestedDataLength)) {
Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}
@@ -139,11 +139,14 @@ UsbIoControlTransfer (
// Reset the endpoint toggle when endpoint stall is cleared
//
if ((Request->Request == USB_REQ_CLEAR_FEATURE) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD,
- USB_TARGET_ENDPOINT)) &&
- (Request->Value == USB_FEATURE_ENDPOINT_HALT)) {
-
- EpDesc = UsbGetEndpointDesc (UsbIf, (UINT8) Request->Index);
+ (Request->RequestType == USB_REQUEST_TYPE (
+ EfiUsbNoData,
+ USB_REQ_TYPE_STANDARD,
+ USB_TARGET_ENDPOINT
+ )) &&
+ (Request->Value == USB_FEATURE_ENDPOINT_HALT))
+ {
+ EpDesc = UsbGetEndpointDesc (UsbIf, (UINT8)Request->Index);
if (EpDesc != NULL) {
EpDesc->Toggle = 0;
@@ -158,16 +161,21 @@ UsbIoControlTransfer (
// completely irrelevant.
//
if ((Request->Request == USB_REQ_SET_CONFIG) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD,
- USB_TARGET_DEVICE))) {
+ (Request->RequestType == USB_REQUEST_TYPE (
+ EfiUsbNoData,
+ USB_REQ_TYPE_STANDARD,
+ USB_TARGET_DEVICE
+ )))
+ {
//
// Don't re-create the USB interfaces if configuration isn't changed.
//
if ((Dev->ActiveConfig != NULL) &&
- (Request->Value == Dev->ActiveConfig->Desc.ConfigurationValue)) {
-
+ (Request->Value == Dev->ActiveConfig->Desc.ConfigurationValue))
+ {
goto ON_EXIT;
}
+
DEBUG ((DEBUG_INFO, "UsbIoControlTransfer: configure changed!!! Do NOT use old UsbIo!!!\n"));
if (Dev->ActiveConfig != NULL) {
@@ -175,7 +183,7 @@ UsbIoControlTransfer (
}
if (Request->Value != 0) {
- Status = UsbSelectConfig (Dev, (UINT8) Request->Value);
+ Status = UsbSelectConfig (Dev, (UINT8)Request->Value);
}
//
@@ -191,11 +199,14 @@ UsbIoControlTransfer (
// should remains the same.
//
if ((Request->Request == USB_REQ_SET_INTERFACE) &&
- (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD,
- USB_TARGET_INTERFACE)) &&
- (Request->Index == UsbIf->IfSetting->Desc.InterfaceNumber)) {
-
- Status = UsbSelectSetting (UsbIf->IfDesc, (UINT8) Request->Value);
+ (Request->RequestType == USB_REQUEST_TYPE (
+ EfiUsbNoData,
+ USB_REQ_TYPE_STANDARD,
+ USB_TARGET_INTERFACE
+ )) &&
+ (Request->Index == UsbIf->IfSetting->Desc.InterfaceNumber))
+ {
+ Status = UsbSelectSetting (UsbIf->IfDesc, (UINT8)Request->Value);
if (!EFI_ERROR (Status)) {
ASSERT (UsbIf->IfDesc->ActiveIndex < USB_MAX_INTERFACE_SETTING);
@@ -208,7 +219,6 @@ ON_EXIT:
return Status;
}
-
/**
Execute a bulk transfer to the device endpoint.
@@ -228,56 +238,56 @@ ON_EXIT:
EFI_STATUS
EFIAPI
UsbIoBulkTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Endpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout,
- OUT UINT32 *UsbStatus
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Endpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *UsbStatus
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- USB_ENDPOINT_DESC *EpDesc;
- UINT8 BufNum;
- UINT8 Toggle;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
-
- if ((USB_ENDPOINT_ADDR (Endpoint) == 0) || (USB_ENDPOINT_ADDR(Endpoint) > 15) ||
- (UsbStatus == NULL)) {
-
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ USB_ENDPOINT_DESC *EpDesc;
+ UINT8 BufNum;
+ UINT8 Toggle;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+
+ if ((USB_ENDPOINT_ADDR (Endpoint) == 0) || (USB_ENDPOINT_ADDR (Endpoint) > 15) ||
+ (UsbStatus == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
+ OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
- EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
+ EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
if ((EpDesc == NULL) || (USB_ENDPOINT_TYPE (&EpDesc->Desc) != USB_ENDPOINT_BULK)) {
Status = EFI_INVALID_PARAMETER;
goto ON_EXIT;
}
- BufNum = 1;
- Toggle = EpDesc->Toggle;
- Status = UsbHcBulkTransfer (
- Dev->Bus,
- Dev->Address,
- Endpoint,
- Dev->Speed,
- EpDesc->Desc.MaxPacketSize,
- BufNum,
- &Data,
- DataLength,
- &Toggle,
- Timeout,
- &Dev->Translator,
- UsbStatus
- );
+ BufNum = 1;
+ Toggle = EpDesc->Toggle;
+ Status = UsbHcBulkTransfer (
+ Dev->Bus,
+ Dev->Address,
+ Endpoint,
+ Dev->Speed,
+ EpDesc->Desc.MaxPacketSize,
+ BufNum,
+ &Data,
+ DataLength,
+ &Toggle,
+ Timeout,
+ &Dev->Translator,
+ UsbStatus
+ );
EpDesc->Toggle = Toggle;
@@ -303,7 +313,6 @@ ON_EXIT:
return Status;
}
-
/**
Execute a synchronous interrupt transfer.
@@ -323,33 +332,33 @@ ON_EXIT:
EFI_STATUS
EFIAPI
UsbIoSyncInterruptTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Endpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout,
- OUT UINT32 *UsbStatus
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Endpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *UsbStatus
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- USB_ENDPOINT_DESC *EpDesc;
- EFI_TPL OldTpl;
- UINT8 Toggle;
- EFI_STATUS Status;
-
- if ((USB_ENDPOINT_ADDR (Endpoint) == 0) || (USB_ENDPOINT_ADDR(Endpoint) > 15) ||
- (UsbStatus == NULL)) {
-
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ USB_ENDPOINT_DESC *EpDesc;
+ EFI_TPL OldTpl;
+ UINT8 Toggle;
+ EFI_STATUS Status;
+
+ if ((USB_ENDPOINT_ADDR (Endpoint) == 0) || (USB_ENDPOINT_ADDR (Endpoint) > 15) ||
+ (UsbStatus == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
+ OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
- EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
+ EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
if ((EpDesc == NULL) || (USB_ENDPOINT_TYPE (&EpDesc->Desc) != USB_ENDPOINT_INTERRUPT)) {
Status = EFI_INVALID_PARAMETER;
@@ -378,7 +387,6 @@ ON_EXIT:
return Status;
}
-
/**
Queue a new asynchronous interrupt transfer, or remove the old
request if (IsNewTransfer == FALSE).
@@ -411,43 +419,43 @@ UsbIoAsyncInterruptTransfer (
IN VOID *Context OPTIONAL
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- USB_ENDPOINT_DESC *EpDesc;
- EFI_TPL OldTpl;
- UINT8 Toggle;
- EFI_STATUS Status;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ USB_ENDPOINT_DESC *EpDesc;
+ EFI_TPL OldTpl;
+ UINT8 Toggle;
+ EFI_STATUS Status;
if ((USB_ENDPOINT_ADDR (Endpoint) == 0) || (USB_ENDPOINT_ADDR (Endpoint) > 15)) {
return EFI_INVALID_PARAMETER;
}
- OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
- EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
+ EpDesc = UsbGetEndpointDesc (UsbIf, Endpoint);
if ((EpDesc == NULL) || (USB_ENDPOINT_TYPE (&EpDesc->Desc) != USB_ENDPOINT_INTERRUPT)) {
Status = EFI_INVALID_PARAMETER;
goto ON_EXIT;
}
- Toggle = EpDesc->Toggle;
- Status = UsbHcAsyncInterruptTransfer (
- Dev->Bus,
- Dev->Address,
- Endpoint,
- Dev->Speed,
- EpDesc->Desc.MaxPacketSize,
- IsNewTransfer,
- &Toggle,
- PollInterval,
- DataLength,
- &Dev->Translator,
- Callback,
- Context
- );
+ Toggle = EpDesc->Toggle;
+ Status = UsbHcAsyncInterruptTransfer (
+ Dev->Bus,
+ Dev->Address,
+ Endpoint,
+ Dev->Speed,
+ EpDesc->Desc.MaxPacketSize,
+ IsNewTransfer,
+ &Toggle,
+ PollInterval,
+ DataLength,
+ &Dev->Translator,
+ Callback,
+ Context
+ );
EpDesc->Toggle = Toggle;
@@ -456,7 +464,6 @@ ON_EXIT:
return Status;
}
-
/**
Execute a synchronous isochronous transfer.
@@ -472,17 +479,16 @@ ON_EXIT:
EFI_STATUS
EFIAPI
UsbIoIsochronousTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 DeviceEndpoint,
- IN OUT VOID *Data,
- IN UINTN DataLength,
- OUT UINT32 *Status
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ OUT UINT32 *Status
)
{
return EFI_UNSUPPORTED;
}
-
/**
Queue an asynchronous isochronous transfer.
@@ -511,7 +517,6 @@ UsbIoAsyncIsochronousTransfer (
return EFI_UNSUPPORTED;
}
-
/**
Retrieve the device descriptor of the device.
@@ -525,13 +530,13 @@ UsbIoAsyncIsochronousTransfer (
EFI_STATUS
EFIAPI
UsbIoGetDeviceDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT EFI_USB_DEVICE_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_DEVICE_DESCRIPTOR *Descriptor
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- EFI_TPL OldTpl;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ EFI_TPL OldTpl;
if (Descriptor == NULL) {
return EFI_INVALID_PARAMETER;
@@ -539,8 +544,8 @@ UsbIoGetDeviceDescriptor (
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
CopyMem (Descriptor, &Dev->DevDesc->Desc, sizeof (EFI_USB_DEVICE_DESCRIPTOR));
@@ -548,7 +553,6 @@ UsbIoGetDeviceDescriptor (
return EFI_SUCCESS;
}
-
/**
Return the configuration descriptor of the current active configuration.
@@ -563,14 +567,14 @@ UsbIoGetDeviceDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetActiveConfigDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT EFI_USB_CONFIG_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_CONFIG_DESCRIPTOR *Descriptor
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
if (Descriptor == NULL) {
return EFI_INVALID_PARAMETER;
@@ -579,8 +583,8 @@ UsbIoGetActiveConfigDescriptor (
Status = EFI_SUCCESS;
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
if (Dev->ActiveConfig == NULL) {
Status = EFI_NOT_FOUND;
@@ -594,7 +598,6 @@ ON_EXIT:
return Status;
}
-
/**
Retrieve the active interface setting descriptor for this USB IO instance.
@@ -612,8 +615,8 @@ UsbIoGetInterfaceDescriptor (
OUT EFI_USB_INTERFACE_DESCRIPTOR *Descriptor
)
{
- USB_INTERFACE *UsbIf;
- EFI_TPL OldTpl;
+ USB_INTERFACE *UsbIf;
+ EFI_TPL OldTpl;
if (Descriptor == NULL) {
return EFI_INVALID_PARAMETER;
@@ -621,14 +624,13 @@ UsbIoGetInterfaceDescriptor (
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
CopyMem (Descriptor, &(UsbIf->IfSetting->Desc), sizeof (EFI_USB_INTERFACE_DESCRIPTOR));
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
}
-
/**
Retrieve the endpoint descriptor from this interface setting.
@@ -644,17 +646,17 @@ UsbIoGetInterfaceDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetEndpointDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Index,
- OUT EFI_USB_ENDPOINT_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Index,
+ OUT EFI_USB_ENDPOINT_DESCRIPTOR *Descriptor
)
{
- USB_INTERFACE *UsbIf;
- EFI_TPL OldTpl;
+ USB_INTERFACE *UsbIf;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
if ((Descriptor == NULL) || (Index > 15)) {
gBS->RestoreTPL (OldTpl);
@@ -676,7 +678,6 @@ UsbIoGetEndpointDescriptor (
return EFI_SUCCESS;
}
-
/**
Retrieve the supported language ID table from the device.
@@ -690,28 +691,27 @@ UsbIoGetEndpointDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetSupportedLanguages (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT UINT16 **LangIDTable,
- OUT UINT16 *TableSize
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT UINT16 **LangIDTable,
+ OUT UINT16 *TableSize
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- EFI_TPL OldTpl;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ EFI_TPL OldTpl;
- OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
+ OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
- *LangIDTable = Dev->LangId;
- *TableSize = (UINT16) (Dev->TotalLangId * sizeof (UINT16));
+ *LangIDTable = Dev->LangId;
+ *TableSize = (UINT16)(Dev->TotalLangId * sizeof (UINT16));
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
}
-
/**
Retrieve an indexed string in the language of LangID.
@@ -727,19 +727,19 @@ UsbIoGetSupportedLanguages (
EFI_STATUS
EFIAPI
UsbIoGetStringDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT16 LangID,
- IN UINT8 StringIndex,
- OUT CHAR16 **String
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT16 LangID,
+ IN UINT8 StringIndex,
+ OUT CHAR16 **String
)
{
- USB_DEVICE *Dev;
- USB_INTERFACE *UsbIf;
- EFI_USB_STRING_DESCRIPTOR *StrDesc;
- EFI_TPL OldTpl;
- UINT8 *Buf;
- UINT8 Index;
- EFI_STATUS Status;
+ USB_DEVICE *Dev;
+ USB_INTERFACE *UsbIf;
+ EFI_USB_STRING_DESCRIPTOR *StrDesc;
+ EFI_TPL OldTpl;
+ UINT8 *Buf;
+ UINT8 Index;
+ EFI_STATUS Status;
if ((StringIndex == 0) || (LangID == 0)) {
return EFI_NOT_FOUND;
@@ -747,8 +747,8 @@ UsbIoGetStringDescriptor (
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
//
// Check whether language ID is supported
@@ -788,7 +788,7 @@ UsbIoGetStringDescriptor (
}
CopyMem (Buf, StrDesc->String, StrDesc->Length - 2);
- *String = (CHAR16 *) Buf;
+ *String = (CHAR16 *)Buf;
Status = EFI_SUCCESS;
FREE_STR:
@@ -799,7 +799,6 @@ ON_EXIT:
return Status;
}
-
/**
Reset the device, then if that succeeds, reconfigure the
device with its address and current active configuration.
@@ -816,17 +815,17 @@ UsbIoPortReset (
IN EFI_USB_IO_PROTOCOL *This
)
{
- USB_INTERFACE *UsbIf;
- USB_INTERFACE *HubIf;
- USB_DEVICE *Dev;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
- UINT8 DevAddress;
+ USB_INTERFACE *UsbIf;
+ USB_INTERFACE *HubIf;
+ USB_DEVICE *Dev;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ UINT8 DevAddress;
OldTpl = gBS->RaiseTPL (USB_BUS_TPL);
- UsbIf = USB_INTERFACE_FROM_USBIO (This);
- Dev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (This);
+ Dev = UsbIf->Device;
if (UsbIf->IsHub) {
Status = EFI_INVALID_PARAMETER;
@@ -837,8 +836,13 @@ UsbIoPortReset (
Status = HubIf->HubApi->ResetPort (HubIf, Dev->ParentPort);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbIoPortReset: failed to reset hub port %d@hub %d, %r \n",
- Dev->ParentPort, Dev->ParentAddr, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbIoPortReset: failed to reset hub port %d@hub %d, %r \n",
+ Dev->ParentPort,
+ Dev->ParentAddr,
+ Status
+ ));
goto ON_EXIT;
}
@@ -852,7 +856,7 @@ UsbIoPortReset (
//
DevAddress = Dev->Address;
Dev->Address = 0;
- Status = UsbSetAddress (Dev, DevAddress);
+ Status = UsbSetAddress (Dev, DevAddress);
Dev->Address = DevAddress;
gBS->Stall (USB_SET_DEVICE_ADDRESS_STALL);
@@ -861,13 +865,17 @@ UsbIoPortReset (
//
// It may fail due to device disconnection or other reasons.
//
- DEBUG (( DEBUG_ERROR, "UsbIoPortReset: failed to set address for device %d - %r\n",
- Dev->Address, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbIoPortReset: failed to set address for device %d - %r\n",
+ Dev->Address,
+ Status
+ ));
goto ON_EXIT;
}
- DEBUG (( DEBUG_INFO, "UsbIoPortReset: device is now ADDRESSED at %d\n", Dev->Address));
+ DEBUG ((DEBUG_INFO, "UsbIoPortReset: device is now ADDRESSED at %d\n", Dev->Address));
//
// Reset the current active configure, after this device
@@ -877,8 +885,12 @@ UsbIoPortReset (
Status = UsbSetConfig (Dev, Dev->ActiveConfig->Desc.ConfigurationValue);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbIoPortReset: failed to set configure for device %d - %r\n",
- Dev->Address, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbIoPortReset: failed to set configure for device %d - %r\n",
+ Dev->Address,
+ Status
+ ));
}
}
@@ -887,7 +899,6 @@ ON_EXIT:
return Status;
}
-
/**
Install Usb Bus Protocol on host controller, and start the Usb bus.
@@ -908,11 +919,11 @@ UsbBusBuildProtocol (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- USB_BUS *UsbBus;
- USB_DEVICE *RootHub;
- USB_INTERFACE *RootIf;
- EFI_STATUS Status;
- EFI_STATUS Status2;
+ USB_BUS *UsbBus;
+ USB_DEVICE *RootHub;
+ USB_INTERFACE *RootIf;
+ EFI_STATUS Status;
+ EFI_STATUS Status2;
UsbBus = AllocateZeroPool (sizeof (USB_BUS));
@@ -927,7 +938,7 @@ UsbBusBuildProtocol (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &UsbBus->DevicePath,
+ (VOID **)&UsbBus->DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -951,7 +962,7 @@ UsbBusBuildProtocol (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &(UsbBus->Usb2Hc),
+ (VOID **)&(UsbBus->Usb2Hc),
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -960,7 +971,7 @@ UsbBusBuildProtocol (
Status2 = gBS->OpenProtocol (
Controller,
&gEfiUsbHcProtocolGuid,
- (VOID **) &(UsbBus->UsbHc),
+ (VOID **)&(UsbBus->UsbHc),
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1040,7 +1051,7 @@ UsbBusBuildProtocol (
UsbBus->DevicePath
);
- Status = mUsbRootHubApi.Init (RootIf);
+ Status = mUsbRootHubApi.Init (RootIf);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "UsbBusStart: Failed to init root hub %r\n", Status));
@@ -1056,6 +1067,7 @@ FREE_ROOTHUB:
if (RootIf != NULL) {
FreePool (RootIf);
}
+
if (RootHub != NULL) {
FreePool (RootHub);
}
@@ -1066,20 +1078,22 @@ UNINSTALL_USBBUS:
CLOSE_HC:
if (UsbBus->Usb2Hc != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiUsb2HcProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsb2HcProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
+
if (UsbBus->UsbHc != NULL) {
gBS->CloseProtocol (
- Controller,
- &gEfiUsbHcProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbHcProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
}
+
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
@@ -1092,7 +1106,6 @@ CLOSE_HC:
return Status;
}
-
/**
The USB bus driver entry pointer.
@@ -1106,8 +1119,8 @@ CLOSE_HC:
EFI_STATUS
EFIAPI
UsbBusDriverEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
return EfiLibInstallDriverBindingComponentName2 (
@@ -1120,7 +1133,6 @@ UsbBusDriverEntryPoint (
);
}
-
/**
Check whether USB bus driver support this device.
@@ -1162,11 +1174,11 @@ UsbBusControllerDriverSupported (
DevicePathNode.DevPath = RemainingDevicePath;
if ((DevicePathNode.DevPath->Type != MESSAGING_DEVICE_PATH) ||
- (DevicePathNode.DevPath->SubType != MSG_USB_DP &&
- DevicePathNode.DevPath->SubType != MSG_USB_CLASS_DP
- && DevicePathNode.DevPath->SubType != MSG_USB_WWID_DP
- )) {
-
+ ( (DevicePathNode.DevPath->SubType != MSG_USB_DP) &&
+ (DevicePathNode.DevPath->SubType != MSG_USB_CLASS_DP)
+ && (DevicePathNode.DevPath->SubType != MSG_USB_WWID_DP)
+ ))
+ {
return EFI_UNSUPPORTED;
}
}
@@ -1178,7 +1190,7 @@ UsbBusControllerDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1194,7 +1206,7 @@ UsbBusControllerDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbHcProtocolGuid,
- (VOID **) &UsbHc,
+ (VOID **)&UsbHc,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1211,14 +1223,12 @@ UsbBusControllerDriverSupported (
// Close the USB_HC used to perform the supported test
//
gBS->CloseProtocol (
- Controller,
- &gEfiUsbHcProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
-
+ Controller,
+ &gEfiUsbHcProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
} else {
-
//
// Close the USB_HC2 used to perform the supported test
//
@@ -1236,7 +1246,7 @@ UsbBusControllerDriverSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -1250,11 +1260,11 @@ UsbBusControllerDriverSupported (
// Close protocol, don't use device path protocol in the Support() function
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return EFI_SUCCESS;
}
@@ -1262,7 +1272,6 @@ UsbBusControllerDriverSupported (
return Status;
}
-
/**
Start to process the controller.
@@ -1284,14 +1293,14 @@ UsbBusControllerDriverStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_USB_BUS_PROTOCOL *UsbBusId;
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
+ EFI_USB_BUS_PROTOCOL *UsbBusId;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &ParentDevicePath,
+ (VOID **)&ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1314,7 +1323,7 @@ UsbBusControllerDriverStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &UsbBusId,
+ (VOID **)&UsbBusId,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1329,13 +1338,14 @@ UsbBusControllerDriverStart (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Try get the Usb Bus protocol interface again
//
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &UsbBusId,
+ (VOID **)&UsbBusId,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1370,11 +1380,9 @@ UsbBusControllerDriverStart (
ASSERT (!EFI_ERROR (Status));
}
-
return EFI_SUCCESS;
}
-
/**
Stop handle the controller by this USB bus driver.
@@ -1409,20 +1417,20 @@ UsbBusControllerDriverStop (
EFI_STATUS Status;
EFI_STATUS ReturnStatus;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
if (NumberOfChildren > 0) {
//
// BugBug: Raise TPL to callback level instead of USB_BUS_TPL to avoid TPL conflict
//
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
ReturnStatus = EFI_SUCCESS;
for (Index = 0; Index < NumberOfChildren; Index++) {
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1438,8 +1446,8 @@ UsbBusControllerDriverStop (
continue;
}
- UsbIf = USB_INTERFACE_FROM_USBIO (UsbIo);
- UsbDev = UsbIf->Device;
+ UsbIf = USB_INTERFACE_FROM_USBIO (UsbIo);
+ UsbDev = UsbIf->Device;
ReturnStatus = UsbRemoveDevice (UsbDev);
}
@@ -1448,7 +1456,7 @@ UsbBusControllerDriverStop (
return ReturnStatus;
}
- DEBUG (( DEBUG_INFO, "UsbBusStop: usb bus stopped on %p\n", Controller));
+ DEBUG ((DEBUG_INFO, "UsbBusStop: usb bus stopped on %p\n", Controller));
//
// Locate USB_BUS for the current host controller
@@ -1456,7 +1464,7 @@ UsbBusControllerDriverStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiCallerIdGuid,
- (VOID **) &BusId,
+ (VOID **)&BusId,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1473,7 +1481,7 @@ UsbBusControllerDriverStop (
//
// BugBug: Raise TPL to callback level instead of USB_BUS_TPL to avoid TPL conflict
//
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
RootHub = Bus->Devices[0];
RootIf = RootHub->Interfaces[0];
@@ -1493,8 +1501,8 @@ UsbBusControllerDriverStop (
if (!EFI_ERROR (ReturnStatus)) {
mUsbRootHubApi.Release (RootIf);
- gBS->FreePool (RootIf);
- gBS->FreePool (RootHub);
+ gBS->FreePool (RootIf);
+ gBS->FreePool (RootHub);
Status = UsbBusFreeUsbDPList (&Bus->WantedUsbIoDPList);
ASSERT (!EFI_ERROR (Status));
@@ -1533,5 +1541,6 @@ UsbBusControllerDriverStop (
gBS->FreePool (Bus);
}
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.h b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.h
index 40bc5f130e..21a24218fc 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USB_BUS_H_
#define _EFI_USB_BUS_H_
-
#include <Uefi.h>
#include <Protocol/Usb2HostController.h>
@@ -28,7 +27,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h>
#include <Library/ReportStatusCodeLib.h>
-
#include <IndustryStandard/Usb.h>
typedef struct _USB_DEVICE USB_DEVICE;
@@ -36,7 +34,6 @@ typedef struct _USB_INTERFACE USB_INTERFACE;
typedef struct _USB_BUS USB_BUS;
typedef struct _USB_HUB_API USB_HUB_API;
-
#include "UsbUtility.h"
#include "UsbDesc.h"
#include "UsbHub.h"
@@ -46,19 +43,19 @@ typedef struct _USB_HUB_API USB_HUB_API;
// USB bus timeout experience values
//
-#define USB_MAX_LANG_ID 16
-#define USB_MAX_INTERFACE 16
-#define USB_MAX_DEVICES 128
+#define USB_MAX_LANG_ID 16
+#define USB_MAX_INTERFACE 16
+#define USB_MAX_DEVICES 128
-#define USB_BUS_1_MILLISECOND 1000
+#define USB_BUS_1_MILLISECOND 1000
//
// Roothub and hub's polling interval, set by experience,
// The unit of roothub is 100us, means 100ms as interval, and
// the unit of hub is 1ms, means 64ms as interval.
//
-#define USB_ROOTHUB_POLL_INTERVAL (100 * 10000U)
-#define USB_HUB_POLL_INTERVAL 64
+#define USB_ROOTHUB_POLL_INTERVAL (100 * 10000U)
+#define USB_HUB_POLL_INTERVAL 64
//
// Wait for port stable to work, refers to specification
@@ -69,13 +66,13 @@ typedef struct _USB_HUB_API USB_HUB_API;
//
// Wait for port statue reg change, set by experience
//
-#define USB_WAIT_PORT_STS_CHANGE_STALL (100)
+#define USB_WAIT_PORT_STS_CHANGE_STALL (100)
//
// Wait for set device address, refers to specification
// [USB20-9.2.6.3, it says 2ms]
//
-#define USB_SET_DEVICE_ADDRESS_STALL (2 * USB_BUS_1_MILLISECOND)
+#define USB_SET_DEVICE_ADDRESS_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for retry max packet size, set by experience
@@ -86,7 +83,7 @@ typedef struct _USB_HUB_API USB_HUB_API;
// Wait for hub port power-on, refers to specification
// [USB20-11.23.2]
//
-#define USB_SET_PORT_POWER_STALL (2 * USB_BUS_1_MILLISECOND)
+#define USB_SET_PORT_POWER_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for port reset, refers to specification
@@ -103,7 +100,7 @@ typedef struct _USB_HUB_API USB_HUB_API;
// Wait for port recovery to accept SetAddress, refers to specification
// [USB20-7.1.7.5, it says 10 ms for TRSTRCY]
//
-#define USB_SET_PORT_RECOVERY_STALL (10 * USB_BUS_1_MILLISECOND)
+#define USB_SET_PORT_RECOVERY_STALL (10 * USB_BUS_1_MILLISECOND)
//
// Wait for clear roothub port reset, set by experience
@@ -113,7 +110,7 @@ typedef struct _USB_HUB_API USB_HUB_API;
//
// Wait for set roothub port enable, set by experience
//
-#define USB_SET_ROOT_PORT_ENABLE_STALL (20 * USB_BUS_1_MILLISECOND)
+#define USB_SET_ROOT_PORT_ENABLE_STALL (20 * USB_BUS_1_MILLISECOND)
//
// Send general device request timeout.
@@ -122,7 +119,7 @@ typedef struct _USB_HUB_API USB_HUB_API;
// 50 milliseconds. We use a value of 500 milliseconds to work
// around slower hubs and devices.
//
-#define USB_GENERAL_DEVICE_REQUEST_TIMEOUT 500
+#define USB_GENERAL_DEVICE_REQUEST_TIMEOUT 500
//
// Send clear feature request timeout, set by experience
@@ -133,13 +130,13 @@ typedef struct _USB_HUB_API USB_HUB_API;
// Bus raises TPL to TPL_NOTIFY to serialize all its operations
// to protect shared data structures.
//
-#define USB_BUS_TPL TPL_NOTIFY
+#define USB_BUS_TPL TPL_NOTIFY
-#define USB_INTERFACE_SIGNATURE SIGNATURE_32 ('U', 'S', 'B', 'I')
-#define USB_BUS_SIGNATURE SIGNATURE_32 ('U', 'S', 'B', 'B')
+#define USB_INTERFACE_SIGNATURE SIGNATURE_32 ('U', 'S', 'B', 'I')
+#define USB_BUS_SIGNATURE SIGNATURE_32 ('U', 'S', 'B', 'B')
-#define USB_BIT(a) ((UINTN)(1 << (a)))
-#define USB_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define USB_BIT(a) ((UINTN)(1 << (a)))
+#define USB_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define USB_INTERFACE_FROM_USBIO(a) \
CR(a, USB_INTERFACE, UsbIo, USB_INTERFACE_SIGNATURE)
@@ -153,113 +150,112 @@ typedef struct _USB_HUB_API USB_HUB_API;
// gEfiCallerIdGuid will be used as its protocol guid.
//
typedef struct _EFI_USB_BUS_PROTOCOL {
- UINT64 Reserved;
+ UINT64 Reserved;
} EFI_USB_BUS_PROTOCOL;
-
//
// Stands for the real USB device. Each device may
// has several separately working interfaces.
//
struct _USB_DEVICE {
- USB_BUS *Bus;
+ USB_BUS *Bus;
//
// Configuration information
//
- UINT8 Speed;
- UINT8 Address;
- UINT32 MaxPacket0;
+ UINT8 Speed;
+ UINT8 Address;
+ UINT32 MaxPacket0;
//
// The device's descriptors and its configuration
//
- USB_DEVICE_DESC *DevDesc;
- USB_CONFIG_DESC *ActiveConfig;
+ USB_DEVICE_DESC *DevDesc;
+ USB_CONFIG_DESC *ActiveConfig;
- UINT16 LangId [USB_MAX_LANG_ID];
- UINT16 TotalLangId;
+ UINT16 LangId[USB_MAX_LANG_ID];
+ UINT16 TotalLangId;
- UINT8 NumOfInterface;
- USB_INTERFACE *Interfaces [USB_MAX_INTERFACE];
+ UINT8 NumOfInterface;
+ USB_INTERFACE *Interfaces[USB_MAX_INTERFACE];
//
// Parent child relationship
//
- EFI_USB2_HC_TRANSACTION_TRANSLATOR Translator;
+ EFI_USB2_HC_TRANSACTION_TRANSLATOR Translator;
- UINT8 ParentAddr;
- USB_INTERFACE *ParentIf;
- UINT8 ParentPort; // Start at 0
- UINT8 Tier;
- BOOLEAN DisconnectFail;
+ UINT8 ParentAddr;
+ USB_INTERFACE *ParentIf;
+ UINT8 ParentPort; // Start at 0
+ UINT8 Tier;
+ BOOLEAN DisconnectFail;
};
//
// Stands for different functions of USB device
//
struct _USB_INTERFACE {
- UINTN Signature;
- USB_DEVICE *Device;
- USB_INTERFACE_DESC *IfDesc;
- USB_INTERFACE_SETTING *IfSetting;
+ UINTN Signature;
+ USB_DEVICE *Device;
+ USB_INTERFACE_DESC *IfDesc;
+ USB_INTERFACE_SETTING *IfSetting;
//
// Handles and protocols
//
- EFI_HANDLE Handle;
- EFI_USB_IO_PROTOCOL UsbIo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- BOOLEAN IsManaged;
+ EFI_HANDLE Handle;
+ EFI_USB_IO_PROTOCOL UsbIo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ BOOLEAN IsManaged;
//
// Hub device special data
//
- BOOLEAN IsHub;
- USB_HUB_API *HubApi;
- UINT8 NumOfPort;
- EFI_EVENT HubNotify;
+ BOOLEAN IsHub;
+ USB_HUB_API *HubApi;
+ UINT8 NumOfPort;
+ EFI_EVENT HubNotify;
//
// Data used only by normal hub devices
//
- USB_ENDPOINT_DESC *HubEp;
- UINT8 *ChangeMap;
+ USB_ENDPOINT_DESC *HubEp;
+ UINT8 *ChangeMap;
//
// Data used only by root hub to hand over device to
// companion UHCI driver if low/full speed devices are
// connected to EHCI.
//
- UINT8 MaxSpeed;
+ UINT8 MaxSpeed;
};
//
// Stands for the current USB Bus
//
struct _USB_BUS {
- UINTN Signature;
- EFI_USB_BUS_PROTOCOL BusId;
+ UINTN Signature;
+ EFI_USB_BUS_PROTOCOL BusId;
//
// Managed USB host controller
//
- EFI_HANDLE HostHandle;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_USB2_HC_PROTOCOL *Usb2Hc;
- EFI_USB_HC_PROTOCOL *UsbHc;
+ EFI_HANDLE HostHandle;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_USB2_HC_PROTOCOL *Usb2Hc;
+ EFI_USB_HC_PROTOCOL *UsbHc;
//
// Recorded the max supported usb devices.
// XHCI can support up to 255 devices.
// EHCI/UHCI/OHCI supports up to 127 devices.
//
- UINT32 MaxDevices;
+ UINT32 MaxDevices;
//
// An array of device that is on the bus. Devices[0] is
// for root hub. Device with address i is at Devices[i].
//
- USB_DEVICE *Devices[256];
+ USB_DEVICE *Devices[256];
//
// USB Bus driver need to control the recursive connect policy of the bus, only those wanted
@@ -269,35 +265,34 @@ struct _USB_BUS {
// every wanted child device is stored in a item of the WantedUsbIoDPList, whose structure is
// DEVICE_PATH_LIST_ITEM
//
- LIST_ENTRY WantedUsbIoDPList;
-
+ LIST_ENTRY WantedUsbIoDPList;
};
//
// USB Hub Api
//
-struct _USB_HUB_API{
- USB_HUB_INIT Init;
- USB_HUB_GET_PORT_STATUS GetPortStatus;
- USB_HUB_CLEAR_PORT_CHANGE ClearPortChange;
- USB_HUB_SET_PORT_FEATURE SetPortFeature;
- USB_HUB_CLEAR_PORT_FEATURE ClearPortFeature;
- USB_HUB_RESET_PORT ResetPort;
- USB_HUB_RELEASE Release;
+struct _USB_HUB_API {
+ USB_HUB_INIT Init;
+ USB_HUB_GET_PORT_STATUS GetPortStatus;
+ USB_HUB_CLEAR_PORT_CHANGE ClearPortChange;
+ USB_HUB_SET_PORT_FEATURE SetPortFeature;
+ USB_HUB_CLEAR_PORT_FEATURE ClearPortFeature;
+ USB_HUB_RESET_PORT ResetPort;
+ USB_HUB_RELEASE Release;
};
-#define USB_US_LAND_ID 0x0409
+#define USB_US_LAND_ID 0x0409
-#define DEVICE_PATH_LIST_ITEM_SIGNATURE SIGNATURE_32('d','p','l','i')
-typedef struct _DEVICE_PATH_LIST_ITEM{
- UINTN Signature;
- LIST_ENTRY Link;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+#define DEVICE_PATH_LIST_ITEM_SIGNATURE SIGNATURE_32('d','p','l','i')
+typedef struct _DEVICE_PATH_LIST_ITEM {
+ UINTN Signature;
+ LIST_ENTRY Link;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
} DEVICE_PATH_LIST_ITEM;
typedef struct {
- USB_CLASS_DEVICE_PATH UsbClass;
- EFI_DEVICE_PATH_PROTOCOL End;
+ USB_CLASS_DEVICE_PATH UsbClass;
+ EFI_DEVICE_PATH_PROTOCOL End;
} USB_CLASS_FORMAT_DEVICE_PATH;
/**
@@ -312,7 +307,7 @@ typedef struct {
EFI_STATUS
EFIAPI
UsbBusFreeUsbDPList (
- IN LIST_ENTRY *UsbIoDPList
+ IN LIST_ENTRY *UsbIoDPList
);
/**
@@ -329,8 +324,8 @@ UsbBusFreeUsbDPList (
EFI_STATUS
EFIAPI
UsbBusAddWantedUsbIoDP (
- IN EFI_USB_BUS_PROTOCOL *UsbBusId,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_USB_BUS_PROTOCOL *UsbBusId,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -346,8 +341,8 @@ UsbBusAddWantedUsbIoDP (
BOOLEAN
EFIAPI
UsbBusIsWantedUsbIO (
- IN USB_BUS *Bus,
- IN USB_INTERFACE *UsbIf
+ IN USB_BUS *Bus,
+ IN USB_INTERFACE *UsbIf
);
/**
@@ -363,7 +358,7 @@ UsbBusIsWantedUsbIO (
EFI_STATUS
EFIAPI
UsbBusRecursivelyConnectWantedUsbIo (
- IN EFI_USB_BUS_PROTOCOL *UsbBusId
+ IN EFI_USB_BUS_PROTOCOL *UsbBusId
);
/**
@@ -416,12 +411,12 @@ UsbIoControlTransfer (
EFI_STATUS
EFIAPI
UsbIoBulkTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Endpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout,
- OUT UINT32 *UsbStatus
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Endpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *UsbStatus
);
/**
@@ -443,12 +438,12 @@ UsbIoBulkTransfer (
EFI_STATUS
EFIAPI
UsbIoSyncInterruptTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Endpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout,
- OUT UINT32 *UsbStatus
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Endpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *UsbStatus
);
/**
@@ -498,11 +493,11 @@ UsbIoAsyncInterruptTransfer (
EFI_STATUS
EFIAPI
UsbIoIsochronousTransfer (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 DeviceEndpoint,
- IN OUT VOID *Data,
- IN UINTN DataLength,
- OUT UINT32 *Status
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ OUT UINT32 *Status
);
/**
@@ -543,8 +538,8 @@ UsbIoAsyncIsochronousTransfer (
EFI_STATUS
EFIAPI
UsbIoGetDeviceDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT EFI_USB_DEVICE_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_DEVICE_DESCRIPTOR *Descriptor
);
/**
@@ -561,8 +556,8 @@ UsbIoGetDeviceDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetActiveConfigDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT EFI_USB_CONFIG_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_CONFIG_DESCRIPTOR *Descriptor
);
/**
@@ -597,9 +592,9 @@ UsbIoGetInterfaceDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetEndpointDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT8 Index,
- OUT EFI_USB_ENDPOINT_DESCRIPTOR *Descriptor
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 Index,
+ OUT EFI_USB_ENDPOINT_DESCRIPTOR *Descriptor
);
/**
@@ -615,9 +610,9 @@ UsbIoGetEndpointDescriptor (
EFI_STATUS
EFIAPI
UsbIoGetSupportedLanguages (
- IN EFI_USB_IO_PROTOCOL *This,
- OUT UINT16 **LangIDTable,
- OUT UINT16 *TableSize
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT UINT16 **LangIDTable,
+ OUT UINT16 *TableSize
);
/**
@@ -635,10 +630,10 @@ UsbIoGetSupportedLanguages (
EFI_STATUS
EFIAPI
UsbIoGetStringDescriptor (
- IN EFI_USB_IO_PROTOCOL *This,
- IN UINT16 LangID,
- IN UINT8 StringIndex,
- OUT CHAR16 **String
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT16 LangID,
+ IN UINT8 StringIndex,
+ OUT CHAR16 **String
);
/**
@@ -690,8 +685,8 @@ UsbBusBuildProtocol (
EFI_STATUS
EFIAPI
UsbBusDriverEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
);
/**
@@ -756,9 +751,9 @@ UsbBusControllerDriverStop (
IN EFI_HANDLE *ChildHandleBuffer
);
-extern EFI_USB_IO_PROTOCOL mUsbIoProtocol;
-extern EFI_DRIVER_BINDING_PROTOCOL mUsbBusDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL mUsbBusComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL mUsbBusComponentName2;
+extern EFI_USB_IO_PROTOCOL mUsbIoProtocol;
+extern EFI_DRIVER_BINDING_PROTOCOL mUsbBusDriverBinding;
+extern EFI_COMPONENT_NAME_PROTOCOL mUsbBusComponentName;
+extern EFI_COMPONENT_NAME2_PROTOCOL mUsbBusComponentName2;
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.c
index 4e602228fb..a620a67074 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbBus.h"
-
/**
Free the interface setting descriptor.
@@ -21,8 +20,8 @@ UsbFreeInterfaceDesc (
IN USB_INTERFACE_SETTING *Setting
)
{
- USB_ENDPOINT_DESC *Ep;
- UINTN Index;
+ USB_ENDPOINT_DESC *Ep;
+ UINTN Index;
if (Setting->Endpoints != NULL) {
//
@@ -47,7 +46,6 @@ UsbFreeInterfaceDesc (
FreePool (Setting);
}
-
/**
Free a configuration descriptor with its interface
descriptors. It may be initialized partially.
@@ -57,12 +55,12 @@ UsbFreeInterfaceDesc (
**/
VOID
UsbFreeConfigDesc (
- IN USB_CONFIG_DESC *Config
+ IN USB_CONFIG_DESC *Config
)
{
- USB_INTERFACE_DESC *Interface;
- UINTN Index;
- UINTN SetIndex;
+ USB_INTERFACE_DESC *Interface;
+ UINTN Index;
+ UINTN SetIndex;
if (Config->Interfaces != NULL) {
//
@@ -91,10 +89,8 @@ UsbFreeConfigDesc (
}
FreePool (Config);
-
}
-
/**
Free a device descriptor with its configurations.
@@ -103,10 +99,10 @@ UsbFreeConfigDesc (
**/
VOID
UsbFreeDevDesc (
- IN USB_DEVICE_DESC *DevDesc
+ IN USB_DEVICE_DESC *DevDesc
)
{
- UINTN Index;
+ UINTN Index;
if (DevDesc->Configs != NULL) {
for (Index = 0; Index < DevDesc->Desc.NumConfigurations; Index++) {
@@ -121,7 +117,6 @@ UsbFreeDevDesc (
FreePool (DevDesc);
}
-
/**
Create a descriptor.
@@ -135,46 +130,46 @@ UsbFreeDevDesc (
**/
VOID *
UsbCreateDesc (
- IN UINT8 *DescBuf,
- IN UINTN Len,
- IN UINT8 Type,
- OUT UINTN *Consumed
+ IN UINT8 *DescBuf,
+ IN UINTN Len,
+ IN UINT8 Type,
+ OUT UINTN *Consumed
)
{
- USB_DESC_HEAD *Head;
- UINTN DescLen;
- UINTN CtrlLen;
- UINTN Offset;
- VOID *Desc;
+ USB_DESC_HEAD *Head;
+ UINTN DescLen;
+ UINTN CtrlLen;
+ UINTN Offset;
+ VOID *Desc;
DescLen = 0;
CtrlLen = 0;
*Consumed = 0;
switch (Type) {
- case USB_DESC_TYPE_DEVICE:
- DescLen = sizeof (EFI_USB_DEVICE_DESCRIPTOR);
- CtrlLen = sizeof (USB_DEVICE_DESC);
- break;
-
- case USB_DESC_TYPE_CONFIG:
- DescLen = sizeof (EFI_USB_CONFIG_DESCRIPTOR);
- CtrlLen = sizeof (USB_CONFIG_DESC);
- break;
-
- case USB_DESC_TYPE_INTERFACE:
- DescLen = sizeof (EFI_USB_INTERFACE_DESCRIPTOR);
- CtrlLen = sizeof (USB_INTERFACE_SETTING);
- break;
-
- case USB_DESC_TYPE_ENDPOINT:
- DescLen = sizeof (EFI_USB_ENDPOINT_DESCRIPTOR);
- CtrlLen = sizeof (USB_ENDPOINT_DESC);
- break;
-
- default:
- ASSERT (FALSE);
- return NULL;
+ case USB_DESC_TYPE_DEVICE:
+ DescLen = sizeof (EFI_USB_DEVICE_DESCRIPTOR);
+ CtrlLen = sizeof (USB_DEVICE_DESC);
+ break;
+
+ case USB_DESC_TYPE_CONFIG:
+ DescLen = sizeof (EFI_USB_CONFIG_DESCRIPTOR);
+ CtrlLen = sizeof (USB_CONFIG_DESC);
+ break;
+
+ case USB_DESC_TYPE_INTERFACE:
+ DescLen = sizeof (EFI_USB_INTERFACE_DESCRIPTOR);
+ CtrlLen = sizeof (USB_INTERFACE_SETTING);
+ break;
+
+ case USB_DESC_TYPE_ENDPOINT:
+ DescLen = sizeof (EFI_USB_ENDPOINT_DESCRIPTOR);
+ CtrlLen = sizeof (USB_ENDPOINT_DESC);
+ break;
+
+ default:
+ ASSERT (FALSE);
+ return NULL;
}
//
@@ -231,19 +226,18 @@ UsbCreateDesc (
return NULL;
}
- Desc = AllocateZeroPool ((UINTN) CtrlLen);
+ Desc = AllocateZeroPool ((UINTN)CtrlLen);
if (Desc == NULL) {
return NULL;
}
- CopyMem (Desc, Head, (UINTN) DescLen);
+ CopyMem (Desc, Head, (UINTN)DescLen);
*Consumed = Offset;
return Desc;
}
-
/**
Parse an interface descriptor and its endpoints.
@@ -256,23 +250,23 @@ UsbCreateDesc (
**/
USB_INTERFACE_SETTING *
UsbParseInterfaceDesc (
- IN UINT8 *DescBuf,
- IN UINTN Len,
- OUT UINTN *Consumed
+ IN UINT8 *DescBuf,
+ IN UINTN Len,
+ OUT UINTN *Consumed
)
{
- USB_INTERFACE_SETTING *Setting;
- USB_ENDPOINT_DESC *Ep;
- UINTN Index;
- UINTN NumEp;
- UINTN Used;
- UINTN Offset;
+ USB_INTERFACE_SETTING *Setting;
+ USB_ENDPOINT_DESC *Ep;
+ UINTN Index;
+ UINTN NumEp;
+ UINTN Used;
+ UINTN Offset;
*Consumed = 0;
Setting = UsbCreateDesc (DescBuf, Len, USB_DESC_TYPE_INTERFACE, &Used);
if (Setting == NULL) {
- DEBUG (( DEBUG_ERROR, "UsbParseInterfaceDesc: failed to create interface descriptor\n"));
+ DEBUG ((DEBUG_ERROR, "UsbParseInterfaceDesc: failed to create interface descriptor\n"));
return NULL;
}
@@ -281,16 +275,21 @@ UsbParseInterfaceDesc (
//
// Create an array to hold the interface's endpoints
//
- NumEp = Setting->Desc.NumEndpoints;
+ NumEp = Setting->Desc.NumEndpoints;
- DEBUG (( DEBUG_INFO, "UsbParseInterfaceDesc: interface %d(setting %d) has %d endpoints\n",
- Setting->Desc.InterfaceNumber, Setting->Desc.AlternateSetting, (UINT32)NumEp));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbParseInterfaceDesc: interface %d(setting %d) has %d endpoints\n",
+ Setting->Desc.InterfaceNumber,
+ Setting->Desc.AlternateSetting,
+ (UINT32)NumEp
+ ));
if (NumEp == 0) {
goto ON_EXIT;
}
- Setting->Endpoints = AllocateZeroPool (sizeof (USB_ENDPOINT_DESC *) * NumEp);
+ Setting->Endpoints = AllocateZeroPool (sizeof (USB_ENDPOINT_DESC *) * NumEp);
if (Setting->Endpoints == NULL) {
goto ON_ERROR;
@@ -303,15 +302,14 @@ UsbParseInterfaceDesc (
Ep = UsbCreateDesc (DescBuf + Offset, Len - Offset, USB_DESC_TYPE_ENDPOINT, &Used);
if (Ep == NULL) {
- DEBUG (( DEBUG_ERROR, "UsbParseInterfaceDesc: failed to create endpoint(index %d)\n", (UINT32)Index));
+ DEBUG ((DEBUG_ERROR, "UsbParseInterfaceDesc: failed to create endpoint(index %d)\n", (UINT32)Index));
goto ON_ERROR;
}
- Setting->Endpoints[Index] = Ep;
- Offset += Used;
+ Setting->Endpoints[Index] = Ep;
+ Offset += Used;
}
-
ON_EXIT:
*Consumed = Offset;
return Setting;
@@ -321,7 +319,6 @@ ON_ERROR:
return NULL;
}
-
/**
Parse the configuration descriptor and its interfaces.
@@ -333,16 +330,16 @@ ON_ERROR:
**/
USB_CONFIG_DESC *
UsbParseConfigDesc (
- IN UINT8 *DescBuf,
- IN UINTN Len
+ IN UINT8 *DescBuf,
+ IN UINTN Len
)
{
- USB_CONFIG_DESC *Config;
- USB_INTERFACE_SETTING *Setting;
- USB_INTERFACE_DESC *Interface;
- UINTN Index;
- UINTN NumIf;
- UINTN Consumed;
+ USB_CONFIG_DESC *Config;
+ USB_INTERFACE_SETTING *Setting;
+ USB_INTERFACE_DESC *Interface;
+ UINTN Index;
+ UINTN NumIf;
+ UINTN Consumed;
ASSERT (DescBuf != NULL);
@@ -355,15 +352,19 @@ UsbParseConfigDesc (
//
// Initialize an array of setting for the configuration's interfaces.
//
- NumIf = Config->Desc.NumInterfaces;
- Config->Interfaces = AllocateZeroPool (sizeof (USB_INTERFACE_DESC *) * NumIf);
+ NumIf = Config->Desc.NumInterfaces;
+ Config->Interfaces = AllocateZeroPool (sizeof (USB_INTERFACE_DESC *) * NumIf);
if (Config->Interfaces == NULL) {
goto ON_ERROR;
}
- DEBUG (( DEBUG_INFO, "UsbParseConfigDesc: config %d has %d interfaces\n",
- Config->Desc.ConfigurationValue, (UINT32)NumIf));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbParseConfigDesc: config %d has %d interfaces\n",
+ Config->Desc.ConfigurationValue,
+ (UINT32)NumIf
+ ));
for (Index = 0; Index < NumIf; Index++) {
Interface = AllocateZeroPool (sizeof (USB_INTERFACE_DESC));
@@ -394,11 +395,10 @@ UsbParseConfigDesc (
Setting = UsbParseInterfaceDesc (DescBuf, Len, &Consumed);
if (Setting == NULL) {
- DEBUG (( DEBUG_ERROR, "UsbParseConfigDesc: warning: failed to get interface setting, stop parsing now.\n"));
+ DEBUG ((DEBUG_ERROR, "UsbParseConfigDesc: warning: failed to get interface setting, stop parsing now.\n"));
break;
-
} else if (Setting->Desc.InterfaceNumber >= NumIf) {
- DEBUG (( DEBUG_ERROR, "UsbParseConfigDesc: malformatted interface descriptor\n"));
+ DEBUG ((DEBUG_ERROR, "UsbParseConfigDesc: malformatted interface descriptor\n"));
UsbFreeInterfaceDesc (Setting);
goto ON_ERROR;
@@ -427,7 +427,6 @@ ON_ERROR:
return NULL;
}
-
/**
USB standard control transfer support routine. This
function is used by USB device. It is possible that
@@ -450,15 +449,15 @@ ON_ERROR:
**/
EFI_STATUS
UsbCtrlRequest (
- IN USB_DEVICE *UsbDev,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINTN Type,
- IN UINTN Target,
- IN UINTN Request,
- IN UINT16 Value,
- IN UINT16 Index,
- IN OUT VOID *Buf,
- IN UINTN Length
+ IN USB_DEVICE *UsbDev,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINTN Type,
+ IN UINTN Target,
+ IN UINTN Request,
+ IN UINT16 Value,
+ IN UINT16 Index,
+ IN OUT VOID *Buf,
+ IN UINTN Length
)
{
EFI_USB_DEVICE_REQUEST DevReq;
@@ -468,13 +467,13 @@ UsbCtrlRequest (
ASSERT ((UsbDev != NULL) && (UsbDev->Bus != NULL));
- DevReq.RequestType = USB_REQUEST_TYPE (Direction, Type, Target);
- DevReq.Request = (UINT8) Request;
- DevReq.Value = Value;
- DevReq.Index = Index;
- DevReq.Length = (UINT16) Length;
+ DevReq.RequestType = USB_REQUEST_TYPE (Direction, Type, Target);
+ DevReq.Request = (UINT8)Request;
+ DevReq.Value = Value;
+ DevReq.Index = Index;
+ DevReq.Length = (UINT16)Length;
- Len = Length;
+ Len = Length;
Status = UsbHcControlTransfer (
UsbDev->Bus,
UsbDev->Address,
@@ -492,7 +491,6 @@ UsbCtrlRequest (
return Status;
}
-
/**
Get the standard descriptors.
@@ -510,15 +508,15 @@ UsbCtrlRequest (
**/
EFI_STATUS
UsbCtrlGetDesc (
- IN USB_DEVICE *UsbDev,
- IN UINTN DescType,
- IN UINTN DescIndex,
- IN UINT16 LangId,
- OUT VOID *Buf,
- IN UINTN Length
+ IN USB_DEVICE *UsbDev,
+ IN UINTN DescType,
+ IN UINTN DescIndex,
+ IN UINT16 LangId,
+ OUT VOID *Buf,
+ IN UINTN Length
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
UsbDev,
@@ -526,7 +524,7 @@ UsbCtrlGetDesc (
USB_REQ_TYPE_STANDARD,
USB_TARGET_DEVICE,
USB_REQ_GET_DESCRIPTOR,
- (UINT16) ((DescType << 8) | DescIndex),
+ (UINT16)((DescType << 8) | DescIndex),
LangId,
Buf,
Length
@@ -535,7 +533,6 @@ UsbCtrlGetDesc (
return Status;
}
-
/**
Return the max packet size for endpoint zero. This function
is the first function called to get descriptors during bus
@@ -549,13 +546,12 @@ UsbCtrlGetDesc (
**/
EFI_STATUS
UsbGetMaxPacketSize0 (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
)
{
- EFI_USB_DEVICE_DESCRIPTOR DevDesc;
- EFI_STATUS Status;
- UINTN Index;
-
+ EFI_USB_DEVICE_DESCRIPTOR DevDesc;
+ EFI_STATUS Status;
+ UINTN Index;
//
// Get the first 8 bytes of the device descriptor which contains
@@ -569,6 +565,7 @@ UsbGetMaxPacketSize0 (
UsbDev->MaxPacket0 = 1 << 9;
return EFI_SUCCESS;
}
+
UsbDev->MaxPacket0 = DevDesc.MaxPacketSize0;
return EFI_SUCCESS;
}
@@ -579,7 +576,6 @@ UsbGetMaxPacketSize0 (
return EFI_DEVICE_ERROR;
}
-
/**
Get the device descriptor for the device.
@@ -591,11 +587,11 @@ UsbGetMaxPacketSize0 (
**/
EFI_STATUS
UsbGetDevDesc (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
)
{
- USB_DEVICE_DESC *DevDesc;
- EFI_STATUS Status;
+ USB_DEVICE_DESC *DevDesc;
+ EFI_STATUS Status;
DevDesc = AllocateZeroPool (sizeof (USB_DEVICE_DESC));
@@ -603,14 +599,14 @@ UsbGetDevDesc (
return EFI_OUT_OF_RESOURCES;
}
- Status = UsbCtrlGetDesc (
- UsbDev,
- USB_DESC_TYPE_DEVICE,
- 0,
- 0,
- DevDesc,
- sizeof (EFI_USB_DEVICE_DESCRIPTOR)
- );
+ Status = UsbCtrlGetDesc (
+ UsbDev,
+ USB_DESC_TYPE_DEVICE,
+ 0,
+ 0,
+ DevDesc,
+ sizeof (EFI_USB_DEVICE_DESCRIPTOR)
+ );
if (EFI_ERROR (Status)) {
gBS->FreePool (DevDesc);
@@ -621,7 +617,6 @@ UsbGetDevDesc (
return Status;
}
-
/**
Retrieve the indexed string for the language. It requires two
steps to get a string, first to get the string's length. Then
@@ -636,14 +631,14 @@ UsbGetDevDesc (
**/
EFI_USB_STRING_DESCRIPTOR *
UsbGetOneString (
- IN USB_DEVICE *UsbDev,
- IN UINT8 Index,
- IN UINT16 LangId
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 Index,
+ IN UINT16 LangId
)
{
- EFI_USB_STRING_DESCRIPTOR Desc;
- EFI_STATUS Status;
- UINT8 *Buf;
+ EFI_USB_STRING_DESCRIPTOR Desc;
+ EFI_STATUS Status;
+ UINT8 *Buf;
//
// First get two bytes which contains the string length.
@@ -656,7 +651,8 @@ UsbGetOneString (
if (EFI_ERROR (Status) ||
(Desc.Length < OFFSET_OF (EFI_USB_STRING_DESCRIPTOR, Length) + sizeof (Desc.Length)) ||
(Desc.Length % 2 != 0)
- ) {
+ )
+ {
return NULL;
}
@@ -680,10 +676,9 @@ UsbGetOneString (
return NULL;
}
- return (EFI_USB_STRING_DESCRIPTOR *) Buf;
+ return (EFI_USB_STRING_DESCRIPTOR *)Buf;
}
-
/**
Build the language ID table for string descriptors.
@@ -694,14 +689,14 @@ UsbGetOneString (
**/
EFI_STATUS
UsbBuildLangTable (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
)
{
- EFI_USB_STRING_DESCRIPTOR *Desc;
- EFI_STATUS Status;
- UINTN Index;
- UINTN Max;
- UINT16 *Point;
+ EFI_USB_STRING_DESCRIPTOR *Desc;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN Max;
+ UINT16 *Point;
//
// The string of language ID zero returns the supported languages
@@ -719,8 +714,8 @@ UsbBuildLangTable (
Status = EFI_SUCCESS;
- Max = (Desc->Length - 2) / 2;
- Max = MIN(Max, USB_MAX_LANG_ID);
+ Max = (Desc->Length - 2) / 2;
+ Max = MIN (Max, USB_MAX_LANG_ID);
Point = Desc->String;
for (Index = 0; Index < Max; Index++) {
@@ -735,7 +730,6 @@ ON_EXIT:
return Status;
}
-
/**
Retrieve the indexed configure for the device. USB device
returns the configuration together with the interfaces for
@@ -750,13 +744,13 @@ ON_EXIT:
**/
EFI_USB_CONFIG_DESCRIPTOR *
UsbGetOneConfig (
- IN USB_DEVICE *UsbDev,
- IN UINT8 Index
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 Index
)
{
- EFI_USB_CONFIG_DESCRIPTOR Desc;
- EFI_STATUS Status;
- VOID *Buf;
+ EFI_USB_CONFIG_DESCRIPTOR Desc;
+ EFI_STATUS Status;
+ VOID *Buf;
//
// First get four bytes which contains the total length
@@ -765,13 +759,17 @@ UsbGetOneConfig (
Status = UsbCtrlGetDesc (UsbDev, USB_DESC_TYPE_CONFIG, Index, 0, &Desc, 8);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbGetOneConfig: failed to get descript length(%d) %r\n",
- Desc.TotalLength, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbGetOneConfig: failed to get descript length(%d) %r\n",
+ Desc.TotalLength,
+ Status
+ ));
return NULL;
}
- DEBUG (( DEBUG_INFO, "UsbGetOneConfig: total length is %d\n", Desc.TotalLength));
+ DEBUG ((DEBUG_INFO, "UsbGetOneConfig: total length is %d\n", Desc.TotalLength));
//
// Reject if TotalLength even cannot cover itself.
@@ -789,7 +787,7 @@ UsbGetOneConfig (
Status = UsbCtrlGetDesc (UsbDev, USB_DESC_TYPE_CONFIG, Index, 0, Buf, Desc.TotalLength);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbGetOneConfig: failed to get full descript %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "UsbGetOneConfig: failed to get full descript %r\n", Status));
FreePool (Buf);
return NULL;
@@ -798,7 +796,6 @@ UsbGetOneConfig (
return Buf;
}
-
/**
Build the whole array of descriptors. This function must
be called after UsbGetMaxPacketSize0 returns the max packet
@@ -812,15 +809,15 @@ UsbGetOneConfig (
**/
EFI_STATUS
UsbBuildDescTable (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
)
{
- EFI_USB_CONFIG_DESCRIPTOR *Config;
- USB_DEVICE_DESC *DevDesc;
- USB_CONFIG_DESC *ConfigDesc;
- UINT8 NumConfig;
- EFI_STATUS Status;
- UINT8 Index;
+ EFI_USB_CONFIG_DESCRIPTOR *Config;
+ USB_DEVICE_DESC *DevDesc;
+ USB_CONFIG_DESC *ConfigDesc;
+ UINT8 NumConfig;
+ EFI_STATUS Status;
+ UINT8 Index;
//
// Get the device descriptor, then allocate the configure
@@ -829,7 +826,7 @@ UsbBuildDescTable (
Status = UsbGetDevDesc (UsbDev);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbBuildDescTable: failed to get device descriptor - %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "UsbBuildDescTable: failed to get device descriptor - %r\n", Status));
return Status;
}
@@ -844,7 +841,7 @@ UsbBuildDescTable (
return EFI_OUT_OF_RESOURCES;
}
- DEBUG (( DEBUG_INFO, "UsbBuildDescTable: device has %d configures\n", NumConfig));
+ DEBUG ((DEBUG_INFO, "UsbBuildDescTable: device has %d configures\n", NumConfig));
//
// Read each configurations, then parse them
@@ -853,7 +850,7 @@ UsbBuildDescTable (
Config = UsbGetOneConfig (UsbDev, Index);
if (Config == NULL) {
- DEBUG (( DEBUG_ERROR, "UsbBuildDescTable: failed to get configure (index %d)\n", Index));
+ DEBUG ((DEBUG_ERROR, "UsbBuildDescTable: failed to get configure (index %d)\n", Index));
//
// If we can get the default descriptor, it is likely that the
@@ -866,12 +863,12 @@ UsbBuildDescTable (
break;
}
- ConfigDesc = UsbParseConfigDesc ((UINT8 *) Config, Config->TotalLength);
+ ConfigDesc = UsbParseConfigDesc ((UINT8 *)Config, Config->TotalLength);
FreePool (Config);
if (ConfigDesc == NULL) {
- DEBUG (( DEBUG_ERROR, "UsbBuildDescTable: failed to parse configure (index %d)\n", Index));
+ DEBUG ((DEBUG_ERROR, "UsbBuildDescTable: failed to parse configure (index %d)\n", Index));
//
// If we can get the default descriptor, it is likely that the
@@ -894,13 +891,12 @@ UsbBuildDescTable (
Status = UsbBuildLangTable (UsbDev);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_INFO, "UsbBuildDescTable: get language ID table %r\n", Status));
+ DEBUG ((DEBUG_INFO, "UsbBuildDescTable: get language ID table %r\n", Status));
}
return EFI_SUCCESS;
}
-
/**
Set the device's address.
@@ -913,11 +909,11 @@ UsbBuildDescTable (
**/
EFI_STATUS
UsbSetAddress (
- IN USB_DEVICE *UsbDev,
- IN UINT8 Address
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 Address
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
UsbDev,
@@ -934,7 +930,6 @@ UsbSetAddress (
return Status;
}
-
/**
Set the device's configuration. This function changes
the device's internal state. UsbSelectConfig changes
@@ -949,11 +944,11 @@ UsbSetAddress (
**/
EFI_STATUS
UsbSetConfig (
- IN USB_DEVICE *UsbDev,
- IN UINT8 ConfigIndex
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 ConfigIndex
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
UsbDev,
@@ -965,12 +960,11 @@ UsbSetConfig (
0,
NULL,
0
- );
+ );
return Status;
}
-
/**
Usb UsbIo interface to clear the feature. This is should
only be used by HUB which is considered a device driver
@@ -987,21 +981,21 @@ UsbSetConfig (
**/
EFI_STATUS
UsbIoClearFeature (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- IN UINTN Target,
- IN UINT16 Feature,
- IN UINT16 Index
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ IN UINTN Target,
+ IN UINT16 Feature,
+ IN UINT16 Index
)
{
EFI_USB_DEVICE_REQUEST DevReq;
UINT32 UsbResult;
EFI_STATUS Status;
- DevReq.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, Target);
- DevReq.Request = USB_REQ_CLEAR_FEATURE;
- DevReq.Value = Feature;
- DevReq.Index = Index;
- DevReq.Length = 0;
+ DevReq.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, Target);
+ DevReq.Request = USB_REQ_CLEAR_FEATURE;
+ DevReq.Value = Feature;
+ DevReq.Index = Index;
+ DevReq.Length = 0;
Status = UsbIo->UsbControlTransfer (
UsbIo,
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.h b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.h
index 7b0c77fdc7..ce205e706d 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbDesc.h
@@ -26,12 +26,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
#pragma pack(1)
typedef struct {
- UINT8 Len;
- UINT8 Type;
+ UINT8 Len;
+ UINT8 Type;
} USB_DESC_HEAD;
#pragma pack()
-
//
// Each USB device has a device descriptor. Each device may
// have several configures. Each configure contains several
@@ -42,13 +41,13 @@ typedef struct {
// structure.
//
typedef struct {
- EFI_USB_ENDPOINT_DESCRIPTOR Desc;
- UINT8 Toggle;
+ EFI_USB_ENDPOINT_DESCRIPTOR Desc;
+ UINT8 Toggle;
} USB_ENDPOINT_DESC;
typedef struct {
- EFI_USB_INTERFACE_DESCRIPTOR Desc;
- USB_ENDPOINT_DESC **Endpoints;
+ EFI_USB_INTERFACE_DESCRIPTOR Desc;
+ USB_ENDPOINT_DESC **Endpoints;
} USB_INTERFACE_SETTING;
//
@@ -57,19 +56,19 @@ typedef struct {
// It should sufice in most environments.
//
typedef struct {
- USB_INTERFACE_SETTING* Settings[USB_MAX_INTERFACE_SETTING];
- UINTN NumOfSetting;
- UINTN ActiveIndex; // Index of active setting
+ USB_INTERFACE_SETTING *Settings[USB_MAX_INTERFACE_SETTING];
+ UINTN NumOfSetting;
+ UINTN ActiveIndex; // Index of active setting
} USB_INTERFACE_DESC;
typedef struct {
- EFI_USB_CONFIG_DESCRIPTOR Desc;
- USB_INTERFACE_DESC **Interfaces;
+ EFI_USB_CONFIG_DESCRIPTOR Desc;
+ USB_INTERFACE_DESC **Interfaces;
} USB_CONFIG_DESC;
typedef struct {
- EFI_USB_DEVICE_DESCRIPTOR Desc;
- USB_CONFIG_DESC **Configs;
+ EFI_USB_DEVICE_DESCRIPTOR Desc;
+ USB_CONFIG_DESC **Configs;
} USB_DEVICE_DESC;
/**
@@ -94,15 +93,15 @@ typedef struct {
**/
EFI_STATUS
UsbCtrlRequest (
- IN USB_DEVICE *UsbDev,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINTN Type,
- IN UINTN Target,
- IN UINTN Request,
- IN UINT16 Value,
- IN UINT16 Index,
- IN OUT VOID *Buf,
- IN UINTN Length
+ IN USB_DEVICE *UsbDev,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINTN Type,
+ IN UINTN Target,
+ IN UINTN Request,
+ IN UINT16 Value,
+ IN UINT16 Index,
+ IN OUT VOID *Buf,
+ IN UINTN Length
);
/**
@@ -118,7 +117,7 @@ UsbCtrlRequest (
**/
EFI_STATUS
UsbGetMaxPacketSize0 (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
);
/**
@@ -131,7 +130,7 @@ UsbGetMaxPacketSize0 (
**/
VOID
UsbFreeDevDesc (
- IN USB_DEVICE_DESC *DevDesc
+ IN USB_DEVICE_DESC *DevDesc
);
/**
@@ -146,11 +145,11 @@ UsbFreeDevDesc (
@return The created string descriptor or NULL.
**/
-EFI_USB_STRING_DESCRIPTOR*
+EFI_USB_STRING_DESCRIPTOR *
UsbGetOneString (
- IN USB_DEVICE *UsbDev,
- IN UINT8 StringIndex,
- IN UINT16 LangId
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 StringIndex,
+ IN UINT16 LangId
);
/**
@@ -166,7 +165,7 @@ UsbGetOneString (
**/
EFI_STATUS
UsbBuildDescTable (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
);
/**
@@ -181,8 +180,8 @@ UsbBuildDescTable (
**/
EFI_STATUS
UsbSetAddress (
- IN USB_DEVICE *UsbDev,
- IN UINT8 Address
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 Address
);
/**
@@ -199,8 +198,8 @@ UsbSetAddress (
**/
EFI_STATUS
UsbSetConfig (
- IN USB_DEVICE *UsbDev,
- IN UINT8 ConfigIndex
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 ConfigIndex
);
/**
@@ -219,9 +218,10 @@ UsbSetConfig (
**/
EFI_STATUS
UsbIoClearFeature (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- IN UINTN Target,
- IN UINT16 Feature,
- IN UINT16 Index
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ IN UINTN Target,
+ IN UINT16 Feature,
+ IN UINT16 Index
);
+
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c
index 500978a9de..5495b324b3 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c
@@ -20,13 +20,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
USB_ENDPOINT_DESC *
UsbGetEndpointDesc (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 EpAddr
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 EpAddr
)
{
- USB_ENDPOINT_DESC *EpDesc;
- UINT8 Index;
- UINT8 NumEndpoints;
+ USB_ENDPOINT_DESC *EpDesc;
+ UINT8 Index;
+ UINT8 NumEndpoints;
NumEndpoints = UsbIf->IfSetting->Desc.NumEndpoints;
@@ -41,7 +41,6 @@ UsbGetEndpointDesc (
return NULL;
}
-
/**
Free the resource used by USB interface.
@@ -52,31 +51,34 @@ UsbGetEndpointDesc (
**/
EFI_STATUS
UsbFreeInterface (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
UsbCloseHostProtoByChild (UsbIf->Device->Bus, UsbIf->Handle);
Status = gBS->UninstallMultipleProtocolInterfaces (
UsbIf->Handle,
- &gEfiDevicePathProtocolGuid, UsbIf->DevicePath,
- &gEfiUsbIoProtocolGuid, &UsbIf->UsbIo,
+ &gEfiDevicePathProtocolGuid,
+ UsbIf->DevicePath,
+ &gEfiUsbIoProtocolGuid,
+ &UsbIf->UsbIo,
NULL
);
if (!EFI_ERROR (Status)) {
if (UsbIf->DevicePath != NULL) {
FreePool (UsbIf->DevicePath);
}
+
FreePool (UsbIf);
} else {
UsbOpenHostProtoByChild (UsbIf->Device->Bus, UsbIf->Handle);
}
+
return Status;
}
-
/**
Create an interface for the descriptor IfDesc. Each
device's configuration can have several interfaces.
@@ -89,14 +91,14 @@ UsbFreeInterface (
**/
USB_INTERFACE *
UsbCreateInterface (
- IN USB_DEVICE *Device,
- IN USB_INTERFACE_DESC *IfDesc
+ IN USB_DEVICE *Device,
+ IN USB_INTERFACE_DESC *IfDesc
)
{
- USB_DEVICE_PATH UsbNode;
- USB_INTERFACE *UsbIf;
- USB_INTERFACE *HubIf;
- EFI_STATUS Status;
+ USB_DEVICE_PATH UsbNode;
+ USB_INTERFACE *UsbIf;
+ USB_INTERFACE *HubIf;
+ EFI_STATUS Status;
UsbIf = AllocateZeroPool (sizeof (USB_INTERFACE));
@@ -104,11 +106,11 @@ UsbCreateInterface (
return NULL;
}
- UsbIf->Signature = USB_INTERFACE_SIGNATURE;
- UsbIf->Device = Device;
- UsbIf->IfDesc = IfDesc;
+ UsbIf->Signature = USB_INTERFACE_SIGNATURE;
+ UsbIf->Device = Device;
+ UsbIf->IfDesc = IfDesc;
ASSERT (IfDesc->ActiveIndex < USB_MAX_INTERFACE_SETTING);
- UsbIf->IfSetting = IfDesc->Settings[IfDesc->ActiveIndex];
+ UsbIf->IfSetting = IfDesc->Settings[IfDesc->ActiveIndex];
CopyMem (
&(UsbIf->UsbIo),
@@ -119,10 +121,10 @@ UsbCreateInterface (
//
// Install protocols for USBIO and device path
//
- UsbNode.Header.Type = MESSAGING_DEVICE_PATH;
- UsbNode.Header.SubType = MSG_USB_DP;
- UsbNode.ParentPortNumber = Device->ParentPort;
- UsbNode.InterfaceNumber = UsbIf->IfSetting->Desc.InterfaceNumber;
+ UsbNode.Header.Type = MESSAGING_DEVICE_PATH;
+ UsbNode.Header.SubType = MSG_USB_DP;
+ UsbNode.ParentPortNumber = Device->ParentPort;
+ UsbNode.InterfaceNumber = UsbIf->IfSetting->Desc.InterfaceNumber;
SetDevicePathNodeLength (&UsbNode.Header, sizeof (UsbNode));
@@ -182,7 +184,6 @@ ON_ERROR:
return NULL;
}
-
/**
Free the resource used by this USB device.
@@ -191,7 +192,7 @@ ON_ERROR:
**/
VOID
UsbFreeDevice (
- IN USB_DEVICE *Device
+ IN USB_DEVICE *Device
)
{
if (Device->DevDesc != NULL) {
@@ -201,7 +202,6 @@ UsbFreeDevice (
gBS->FreePool (Device);
}
-
/**
Create a device which is on the parent's ParentPort port.
@@ -213,11 +213,11 @@ UsbFreeDevice (
**/
USB_DEVICE *
UsbCreateDevice (
- IN USB_INTERFACE *ParentIf,
- IN UINT8 ParentPort
+ IN USB_INTERFACE *ParentIf,
+ IN UINT8 ParentPort
)
{
- USB_DEVICE *Device;
+ USB_DEVICE *Device;
ASSERT (ParentIf != NULL);
@@ -227,16 +227,15 @@ UsbCreateDevice (
return NULL;
}
- Device->Bus = ParentIf->Device->Bus;
- Device->MaxPacket0 = 8;
- Device->ParentAddr = ParentIf->Device->Address;
- Device->ParentIf = ParentIf;
- Device->ParentPort = ParentPort;
- Device->Tier = (UINT8)(ParentIf->Device->Tier + 1);
+ Device->Bus = ParentIf->Device->Bus;
+ Device->MaxPacket0 = 8;
+ Device->ParentAddr = ParentIf->Device->Address;
+ Device->ParentIf = ParentIf;
+ Device->ParentPort = ParentPort;
+ Device->Tier = (UINT8)(ParentIf->Device->Tier + 1);
return Device;
}
-
/**
Connect the USB interface with its driver. EFI USB bus will
create a USB interface for each separate interface descriptor.
@@ -249,11 +248,11 @@ UsbCreateDevice (
**/
EFI_STATUS
UsbConnectDriver (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
)
{
- EFI_STATUS Status;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_TPL OldTpl;
Status = EFI_SUCCESS;
@@ -264,7 +263,6 @@ UsbConnectDriver (
if (UsbIsHubInterface (UsbIf)) {
DEBUG ((DEBUG_INFO, "UsbConnectDriver: found a hub device\n"));
Status = mUsbHubApi.Init (UsbIf);
-
} else {
//
// This function is called in both UsbIoControlTransfer and
@@ -278,15 +276,15 @@ UsbConnectDriver (
// Only recursively wanted usb child device
//
if (UsbBusIsWantedUsbIO (UsbIf->Device->Bus, UsbIf)) {
- OldTpl = UsbGetCurrentTpl ();
+ OldTpl = UsbGetCurrentTpl ();
DEBUG ((DEBUG_INFO, "UsbConnectDriver: TPL before connect is %d, %p\n", (UINT32)OldTpl, UsbIf->Handle));
gBS->RestoreTPL (TPL_CALLBACK);
- Status = gBS->ConnectController (UsbIf->Handle, NULL, NULL, TRUE);
- UsbIf->IsManaged = (BOOLEAN)!EFI_ERROR (Status);
+ Status = gBS->ConnectController (UsbIf->Handle, NULL, NULL, TRUE);
+ UsbIf->IsManaged = (BOOLEAN) !EFI_ERROR (Status);
- DEBUG ((DEBUG_INFO, "UsbConnectDriver: TPL after connect is %d\n", (UINT32)UsbGetCurrentTpl()));
+ DEBUG ((DEBUG_INFO, "UsbConnectDriver: TPL after connect is %d\n", (UINT32)UsbGetCurrentTpl ()));
ASSERT (UsbGetCurrentTpl () == TPL_CALLBACK);
gBS->RaiseTPL (OldTpl);
@@ -296,7 +294,6 @@ UsbConnectDriver (
return Status;
}
-
/**
Select an alternate setting for the interface.
Each interface can have several mutually exclusive
@@ -312,12 +309,12 @@ UsbConnectDriver (
**/
EFI_STATUS
UsbSelectSetting (
- IN USB_INTERFACE_DESC *IfDesc,
- IN UINT8 Alternate
+ IN USB_INTERFACE_DESC *IfDesc,
+ IN UINT8 Alternate
)
{
- USB_INTERFACE_SETTING *Setting;
- UINTN Index;
+ USB_INTERFACE_SETTING *Setting;
+ UINTN Index;
//
// Locate the active alternate setting
@@ -340,8 +337,12 @@ UsbSelectSetting (
IfDesc->ActiveIndex = Index;
ASSERT (Setting != NULL);
- DEBUG ((DEBUG_INFO, "UsbSelectSetting: setting %d selected for interface %d\n",
- Alternate, Setting->Desc.InterfaceNumber));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbSelectSetting: setting %d selected for interface %d\n",
+ Alternate,
+ Setting->Desc.InterfaceNumber
+ ));
//
// Reset the endpoint toggle to zero
@@ -353,7 +354,6 @@ UsbSelectSetting (
return EFI_SUCCESS;
}
-
/**
Select a new configuration for the device. Each
device may support several configurations.
@@ -368,22 +368,22 @@ UsbSelectSetting (
**/
EFI_STATUS
UsbSelectConfig (
- IN USB_DEVICE *Device,
- IN UINT8 ConfigValue
+ IN USB_DEVICE *Device,
+ IN UINT8 ConfigValue
)
{
- USB_DEVICE_DESC *DevDesc;
- USB_CONFIG_DESC *ConfigDesc;
- USB_INTERFACE_DESC *IfDesc;
- USB_INTERFACE *UsbIf;
- EFI_STATUS Status;
- UINT8 Index;
+ USB_DEVICE_DESC *DevDesc;
+ USB_CONFIG_DESC *ConfigDesc;
+ USB_INTERFACE_DESC *IfDesc;
+ USB_INTERFACE *UsbIf;
+ EFI_STATUS Status;
+ UINT8 Index;
//
// Locate the active config, then set the device's pointer
//
- DevDesc = Device->DevDesc;
- ConfigDesc = NULL;
+ DevDesc = Device->DevDesc;
+ ConfigDesc = NULL;
for (Index = 0; Index < DevDesc->Desc.NumConfigurations; Index++) {
ConfigDesc = DevDesc->Configs[Index];
@@ -399,8 +399,12 @@ UsbSelectConfig (
Device->ActiveConfig = ConfigDesc;
- DEBUG ((DEBUG_INFO, "UsbSelectConfig: config %d selected for device %d\n",
- ConfigValue, Device->Address));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbSelectConfig: config %d selected for device %d\n",
+ ConfigValue,
+ Device->Address
+ ));
//
// Create interfaces for each USB interface descriptor.
@@ -447,7 +451,6 @@ UsbSelectConfig (
return EFI_SUCCESS;
}
-
/**
Disconnect the USB interface with its driver.
@@ -456,11 +459,11 @@ UsbSelectConfig (
**/
EFI_STATUS
UsbDisconnectDriver (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
)
{
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
//
// Release the hub if it's a hub controller, otherwise
@@ -469,7 +472,6 @@ UsbDisconnectDriver (
Status = EFI_SUCCESS;
if (UsbIf->IsHub) {
Status = UsbIf->HubApi->Release (UsbIf);
-
} else if (UsbIf->IsManaged) {
//
// This function is called in both UsbIoControlTransfer and
@@ -478,7 +480,7 @@ UsbDisconnectDriver (
// twisted TPL used. It should be no problem for us to connect
// or disconnect at CALLBACK.
//
- OldTpl = UsbGetCurrentTpl ();
+ OldTpl = UsbGetCurrentTpl ();
DEBUG ((DEBUG_INFO, "UsbDisconnectDriver: old TPL is %d, %p\n", (UINT32)OldTpl, UsbIf->Handle));
gBS->RestoreTPL (TPL_CALLBACK);
@@ -488,7 +490,7 @@ UsbDisconnectDriver (
UsbIf->IsManaged = FALSE;
}
- DEBUG (( DEBUG_INFO, "UsbDisconnectDriver: TPL after disconnect is %d, %d\n", (UINT32)UsbGetCurrentTpl(), Status));
+ DEBUG ((DEBUG_INFO, "UsbDisconnectDriver: TPL after disconnect is %d, %d\n", (UINT32)UsbGetCurrentTpl (), Status));
ASSERT (UsbGetCurrentTpl () == TPL_CALLBACK);
gBS->RaiseTPL (OldTpl);
@@ -497,7 +499,6 @@ UsbDisconnectDriver (
return Status;
}
-
/**
Remove the current device configuration.
@@ -506,13 +507,13 @@ UsbDisconnectDriver (
**/
EFI_STATUS
UsbRemoveConfig (
- IN USB_DEVICE *Device
+ IN USB_DEVICE *Device
)
{
- USB_INTERFACE *UsbIf;
- UINTN Index;
- EFI_STATUS Status;
- EFI_STATUS ReturnStatus;
+ USB_INTERFACE *UsbIf;
+ UINTN Index;
+ EFI_STATUS Status;
+ EFI_STATUS ReturnStatus;
//
// Remove each interface of the device
@@ -541,11 +542,10 @@ UsbRemoveConfig (
}
}
- Device->ActiveConfig = NULL;
+ Device->ActiveConfig = NULL;
return ReturnStatus;
}
-
/**
Remove the device and all its children from the bus.
@@ -556,14 +556,14 @@ UsbRemoveConfig (
**/
EFI_STATUS
UsbRemoveDevice (
- IN USB_DEVICE *Device
+ IN USB_DEVICE *Device
)
{
- USB_BUS *Bus;
- USB_DEVICE *Child;
- EFI_STATUS Status;
- EFI_STATUS ReturnStatus;
- UINTN Index;
+ USB_BUS *Bus;
+ USB_DEVICE *Child;
+ EFI_STATUS Status;
+ EFI_STATUS ReturnStatus;
+ UINTN Index;
Bus = Device->Bus;
@@ -585,7 +585,7 @@ UsbRemoveDevice (
Bus->Devices[Index] = NULL;
} else {
Bus->Devices[Index]->DisconnectFail = TRUE;
- ReturnStatus = Status;
+ ReturnStatus = Status;
DEBUG ((DEBUG_INFO, "UsbRemoveDevice: failed to remove child %p at parent %p\n", Child, Device));
}
}
@@ -597,7 +597,7 @@ UsbRemoveDevice (
Status = UsbRemoveConfig (Device);
if (!EFI_ERROR (Status)) {
- DEBUG (( DEBUG_INFO, "UsbRemoveDevice: device %d removed\n", Device->Address));
+ DEBUG ((DEBUG_INFO, "UsbRemoveDevice: device %d removed\n", Device->Address));
ASSERT (Device->Address < Bus->MaxDevices);
Bus->Devices[Device->Address] = NULL;
@@ -605,10 +605,10 @@ UsbRemoveDevice (
} else {
Bus->Devices[Device->Address]->DisconnectFail = TRUE;
}
+
return Status;
}
-
/**
Find the child device on the hub's port.
@@ -620,13 +620,13 @@ UsbRemoveDevice (
**/
USB_DEVICE *
UsbFindChild (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
)
{
- USB_DEVICE *Device;
- USB_BUS *Bus;
- UINTN Index;
+ USB_DEVICE *Device;
+ USB_BUS *Bus;
+ UINTN Index;
Bus = HubIf->Device->Bus;
@@ -637,8 +637,8 @@ UsbFindChild (
Device = Bus->Devices[Index];
if ((Device != NULL) && (Device->ParentAddr == HubIf->Device->Address) &&
- (Device->ParentPort == Port)) {
-
+ (Device->ParentPort == Port))
+ {
return Device;
}
}
@@ -646,7 +646,6 @@ UsbFindChild (
return NULL;
}
-
/**
Enumerate and configure the new device on the port of this HUB interface.
@@ -661,19 +660,19 @@ UsbFindChild (
**/
EFI_STATUS
UsbEnumerateNewDev (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- IN BOOLEAN ResetIsNeeded
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ IN BOOLEAN ResetIsNeeded
)
{
- USB_BUS *Bus;
- USB_HUB_API *HubApi;
- USB_DEVICE *Child;
- USB_DEVICE *Parent;
- EFI_USB_PORT_STATUS PortState;
- UINTN Address;
- UINT8 Config;
- EFI_STATUS Status;
+ USB_BUS *Bus;
+ USB_HUB_API *HubApi;
+ USB_DEVICE *Child;
+ USB_DEVICE *Parent;
+ EFI_USB_PORT_STATUS PortState;
+ UINTN Address;
+ UINT8 Config;
+ EFI_STATUS Status;
Parent = HubIf->Device;
Bus = Parent->Bus;
@@ -695,9 +694,10 @@ UsbEnumerateNewDev (
return Status;
}
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: hub port %d is reset\n", Port));
+
+ DEBUG ((DEBUG_INFO, "UsbEnumerateNewDev: hub port %d is reset\n", Port));
} else {
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: hub port %d reset is skipped\n", Port));
+ DEBUG ((DEBUG_INFO, "UsbEnumerateNewDev: hub port %d reset is skipped\n", Port));
}
Child = UsbCreateDevice (HubIf, Port);
@@ -721,7 +721,7 @@ UsbEnumerateNewDev (
DEBUG ((DEBUG_ERROR, "UsbEnumerateNewDev: No device present at port %d\n", Port));
Status = EFI_NOT_FOUND;
goto ON_ERROR;
- } else if (USB_BIT_IS_SET (PortState.PortStatus, USB_PORT_STAT_SUPER_SPEED)){
+ } else if (USB_BIT_IS_SET (PortState.PortStatus, USB_PORT_STAT_SUPER_SPEED)) {
Child->Speed = EFI_USB_SPEED_SUPER;
Child->MaxPacket0 = 512;
} else if (USB_BIT_IS_SET (PortState.PortStatus, USB_PORT_STAT_HIGH_SPEED)) {
@@ -735,10 +735,11 @@ UsbEnumerateNewDev (
Child->MaxPacket0 = 8;
}
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: device is of %d speed\n", Child->Speed));
+ DEBUG ((DEBUG_INFO, "UsbEnumerateNewDev: device is of %d speed\n", Child->Speed));
if (((Child->Speed == EFI_USB_SPEED_LOW) || (Child->Speed == EFI_USB_SPEED_FULL)) &&
- (Parent->Speed == EFI_USB_SPEED_HIGH)) {
+ (Parent->Speed == EFI_USB_SPEED_HIGH))
+ {
//
// If the child is a low or full speed device, it is necessary to
// set the transaction translator. Port TT is 1-based.
@@ -746,14 +747,18 @@ UsbEnumerateNewDev (
// 1. if parent is of high speed, then parent is our translator
// 2. otherwise use parent's translator.
//
- Child->Translator.TranslatorHubAddress = Parent->Address;
- Child->Translator.TranslatorPortNumber = (UINT8) (Port + 1);
+ Child->Translator.TranslatorHubAddress = Parent->Address;
+ Child->Translator.TranslatorPortNumber = (UINT8)(Port + 1);
} else {
Child->Translator = Parent->Translator;
}
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: device uses translator (%d, %d)\n",
- Child->Translator.TranslatorHubAddress,
- Child->Translator.TranslatorPortNumber));
+
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbEnumerateNewDev: device uses translator (%d, %d)\n",
+ Child->Translator.TranslatorHubAddress,
+ Child->Translator.TranslatorPortNumber
+ ));
//
// After port is reset, hub establishes a signal path between
@@ -805,7 +810,7 @@ UsbEnumerateNewDev (
goto ON_ERROR;
}
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: max packet size for EP 0 is %d\n", Child->MaxPacket0));
+ DEBUG ((DEBUG_INFO, "UsbEnumerateNewDev: max packet size for EP 0 is %d\n", Child->MaxPacket0));
//
// Host learns about the device's abilities by requesting device's
@@ -830,7 +835,7 @@ UsbEnumerateNewDev (
goto ON_ERROR;
}
- DEBUG (( DEBUG_INFO, "UsbEnumerateNewDev: device %d is now in CONFIGED state\n", Address));
+ DEBUG ((DEBUG_INFO, "UsbEnumerateNewDev: device %d is now in CONFIGED state\n", Address));
//
// Host assigns and loads a device driver.
@@ -870,7 +875,6 @@ ON_ERROR:
return Status;
}
-
/**
Process the events on the port.
@@ -884,17 +888,17 @@ ON_ERROR:
**/
EFI_STATUS
UsbEnumeratePort (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
)
{
- USB_HUB_API *HubApi;
- USB_DEVICE *Child;
- EFI_USB_PORT_STATUS PortState;
- EFI_STATUS Status;
+ USB_HUB_API *HubApi;
+ USB_DEVICE *Child;
+ EFI_USB_PORT_STATUS PortState;
+ EFI_STATUS Status;
- Child = NULL;
- HubApi = HubIf->HubApi;
+ Child = NULL;
+ HubApi = HubIf->HubApi;
//
// Host learns of the new device by polling the hub for port changes.
@@ -914,8 +918,14 @@ UsbEnumeratePort (
return EFI_SUCCESS;
}
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: port %d state - %02x, change - %02x on %p\n",
- Port, PortState.PortStatus, PortState.PortChangeStatus, HubIf));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbEnumeratePort: port %d state - %02x, change - %02x on %p\n",
+ Port,
+ PortState.PortStatus,
+ PortState.PortChangeStatus,
+ HubIf
+ ));
//
// This driver only process two kinds of events now: over current and
@@ -924,7 +934,6 @@ UsbEnumeratePort (
//
if (USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_OVERCURRENT)) {
-
if (USB_BIT_IS_SET (PortState.PortStatus, USB_PORT_STAT_OVERCURRENT)) {
//
// Case1:
@@ -932,17 +941,17 @@ UsbEnumeratePort (
// which probably is caused by short circuit. It has to wait system hardware
// to perform recovery.
//
- DEBUG (( DEBUG_ERROR, "UsbEnumeratePort: Critical Over Current\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbEnumeratePort: Critical Over Current\n", Port));
return EFI_DEVICE_ERROR;
-
}
+
//
// Case2:
// Only OverCurrentChange set, means system has been recoveried from
// over current. As a result, all ports are nearly power-off, so
// it's necessary to detach and enumerate all ports again.
//
- DEBUG (( DEBUG_ERROR, "UsbEnumeratePort: 2.0 device Recovery Over Current\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbEnumeratePort: 2.0 device Recovery Over Current\n", Port));
}
if (USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_ENABLE)) {
@@ -952,7 +961,7 @@ UsbEnumeratePort (
// on 2.0 roothub does. When over-current has influence on 1.1 device, the port
// would be disabled, so it's also necessary to detach and enumerate again.
//
- DEBUG (( DEBUG_ERROR, "UsbEnumeratePort: 1.1 device Recovery Over Current\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbEnumeratePort: 1.1 device Recovery Over Current\n", Port));
}
if (USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_CONNECTION)) {
@@ -969,7 +978,7 @@ UsbEnumeratePort (
Child = UsbFindChild (HubIf, Port);
if (Child != NULL) {
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: device at port %d removed from root hub %p\n", Port, HubIf));
+ DEBUG ((DEBUG_INFO, "UsbEnumeratePort: device at port %d removed from root hub %p\n", Port, HubIf));
UsbRemoveDevice (Child);
}
@@ -977,22 +986,20 @@ UsbEnumeratePort (
//
// Now, new device connected, enumerate and configure the device
//
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: new device connected at port %d\n", Port));
+ DEBUG ((DEBUG_INFO, "UsbEnumeratePort: new device connected at port %d\n", Port));
if (USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_RESET)) {
Status = UsbEnumerateNewDev (HubIf, Port, FALSE);
} else {
Status = UsbEnumerateNewDev (HubIf, Port, TRUE);
}
-
} else {
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: device disconnected event on port %d\n", Port));
+ DEBUG ((DEBUG_INFO, "UsbEnumeratePort: device disconnected event on port %d\n", Port));
}
HubApi->ClearPortChange (HubIf, Port);
return Status;
}
-
/**
Enumerate all the changed hub ports.
@@ -1003,37 +1010,37 @@ UsbEnumeratePort (
VOID
EFIAPI
UsbHubEnumeration (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_INTERFACE *HubIf;
- UINT8 Byte;
- UINT8 Bit;
- UINT8 Index;
- USB_DEVICE *Child;
+ USB_INTERFACE *HubIf;
+ UINT8 Byte;
+ UINT8 Bit;
+ UINT8 Index;
+ USB_DEVICE *Child;
ASSERT (Context != NULL);
- HubIf = (USB_INTERFACE *) Context;
+ HubIf = (USB_INTERFACE *)Context;
for (Index = 0; Index < HubIf->NumOfPort; Index++) {
Child = UsbFindChild (HubIf, Index);
if ((Child != NULL) && (Child->DisconnectFail == TRUE)) {
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: The device disconnect fails at port %d from hub %p, try again\n", Index, HubIf));
+ DEBUG ((DEBUG_INFO, "UsbEnumeratePort: The device disconnect fails at port %d from hub %p, try again\n", Index, HubIf));
UsbRemoveDevice (Child);
}
}
if (HubIf->ChangeMap == NULL) {
- return ;
+ return;
}
//
// HUB starts its port index with 1.
//
- Byte = 0;
- Bit = 1;
+ Byte = 0;
+ Bit = 1;
for (Index = 0; Index < HubIf->NumOfPort; Index++) {
if (USB_BIT_IS_SET (HubIf->ChangeMap[Byte], USB_BIT (Bit))) {
@@ -1047,10 +1054,9 @@ UsbHubEnumeration (
gBS->FreePool (HubIf->ChangeMap);
HubIf->ChangeMap = NULL;
- return ;
+ return;
}
-
/**
Enumerate all the changed hub ports.
@@ -1061,20 +1067,20 @@ UsbHubEnumeration (
VOID
EFIAPI
UsbRootHubEnumeration (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_INTERFACE *RootHub;
- UINT8 Index;
- USB_DEVICE *Child;
+ USB_INTERFACE *RootHub;
+ UINT8 Index;
+ USB_DEVICE *Child;
- RootHub = (USB_INTERFACE *) Context;
+ RootHub = (USB_INTERFACE *)Context;
for (Index = 0; Index < RootHub->NumOfPort; Index++) {
Child = UsbFindChild (RootHub, Index);
if ((Child != NULL) && (Child->DisconnectFail == TRUE)) {
- DEBUG (( DEBUG_INFO, "UsbEnumeratePort: The device disconnect fails at port %d from root hub %p, try again\n", Index, RootHub));
+ DEBUG ((DEBUG_INFO, "UsbEnumeratePort: The device disconnect fails at port %d from root hub %p, try again\n", Index, RootHub));
UsbRemoveDevice (Child);
}
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.h b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.h
index eaba243ed5..51c204be28 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.h
@@ -22,7 +22,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
} \
} while (0)
-
//
// Common interface used by usb bus enumeration process.
// This interface is defined to mask the difference between
@@ -32,7 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
typedef
EFI_STATUS
(*USB_HUB_INIT) (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
);
//
@@ -44,45 +43,45 @@ EFI_STATUS
typedef
EFI_STATUS
(*USB_HUB_GET_PORT_STATUS) (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 Port,
- OUT EFI_USB_PORT_STATUS *PortState
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 Port,
+ OUT EFI_USB_PORT_STATUS *PortState
);
typedef
VOID
(*USB_HUB_CLEAR_PORT_CHANGE) (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
);
typedef
EFI_STATUS
(*USB_HUB_SET_PORT_FEATURE) (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
);
typedef
EFI_STATUS
(*USB_HUB_CLEAR_PORT_FEATURE) (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
);
typedef
EFI_STATUS
(*USB_HUB_RESET_PORT) (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 Port
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 Port
);
typedef
EFI_STATUS
(*USB_HUB_RELEASE) (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
);
/**
@@ -94,10 +93,10 @@ EFI_STATUS
@return The endpoint descriptor or NULL.
**/
-USB_ENDPOINT_DESC*
+USB_ENDPOINT_DESC *
UsbGetEndpointDesc (
- IN USB_INTERFACE *UsbIf,
- IN UINT8 EpAddr
+ IN USB_INTERFACE *UsbIf,
+ IN UINT8 EpAddr
);
/**
@@ -115,8 +114,8 @@ UsbGetEndpointDesc (
**/
EFI_STATUS
UsbSelectSetting (
- IN USB_INTERFACE_DESC *IfDesc,
- IN UINT8 Alternate
+ IN USB_INTERFACE_DESC *IfDesc,
+ IN UINT8 Alternate
);
/**
@@ -133,8 +132,8 @@ UsbSelectSetting (
**/
EFI_STATUS
UsbSelectConfig (
- IN USB_DEVICE *Device,
- IN UINT8 ConfigIndex
+ IN USB_DEVICE *Device,
+ IN UINT8 ConfigIndex
);
/**
@@ -147,7 +146,7 @@ UsbSelectConfig (
**/
EFI_STATUS
UsbRemoveConfig (
- IN USB_DEVICE *Device
+ IN USB_DEVICE *Device
);
/**
@@ -160,7 +159,7 @@ UsbRemoveConfig (
**/
EFI_STATUS
UsbRemoveDevice (
- IN USB_DEVICE *Device
+ IN USB_DEVICE *Device
);
/**
@@ -175,8 +174,8 @@ UsbRemoveDevice (
VOID
EFIAPI
UsbHubEnumeration (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -191,7 +190,8 @@ UsbHubEnumeration (
VOID
EFIAPI
UsbRootHubEnumeration (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
+
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.c
index 022bab5fc1..0497a73f44 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.c
@@ -17,19 +17,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// bit maps.
//
USB_CHANGE_FEATURE_MAP mHubFeatureMap[] = {
- {USB_PORT_STAT_C_CONNECTION, EfiUsbPortConnectChange},
- {USB_PORT_STAT_C_ENABLE, EfiUsbPortEnableChange},
- {USB_PORT_STAT_C_SUSPEND, EfiUsbPortSuspendChange},
- {USB_PORT_STAT_C_OVERCURRENT, EfiUsbPortOverCurrentChange},
- {USB_PORT_STAT_C_RESET, EfiUsbPortResetChange}
+ { USB_PORT_STAT_C_CONNECTION, EfiUsbPortConnectChange },
+ { USB_PORT_STAT_C_ENABLE, EfiUsbPortEnableChange },
+ { USB_PORT_STAT_C_SUSPEND, EfiUsbPortSuspendChange },
+ { USB_PORT_STAT_C_OVERCURRENT, EfiUsbPortOverCurrentChange },
+ { USB_PORT_STAT_C_RESET, EfiUsbPortResetChange }
};
USB_CHANGE_FEATURE_MAP mRootHubFeatureMap[] = {
- {USB_PORT_STAT_C_CONNECTION, EfiUsbPortConnectChange},
- {USB_PORT_STAT_C_ENABLE, EfiUsbPortEnableChange},
- {USB_PORT_STAT_C_SUSPEND, EfiUsbPortSuspendChange},
- {USB_PORT_STAT_C_OVERCURRENT, EfiUsbPortOverCurrentChange},
- {USB_PORT_STAT_C_RESET, EfiUsbPortResetChange},
+ { USB_PORT_STAT_C_CONNECTION, EfiUsbPortConnectChange },
+ { USB_PORT_STAT_C_ENABLE, EfiUsbPortEnableChange },
+ { USB_PORT_STAT_C_SUSPEND, EfiUsbPortSuspendChange },
+ { USB_PORT_STAT_C_OVERCURRENT, EfiUsbPortOverCurrentChange },
+ { USB_PORT_STAT_C_RESET, EfiUsbPortResetChange },
};
//
@@ -37,6 +37,7 @@ USB_CHANGE_FEATURE_MAP mRootHubFeatureMap[] = {
// is related to an interface, these requests are sent
// to the control endpoint of the device.
//
+
/**
USB hub control transfer to set the hub depth.
@@ -49,11 +50,11 @@ USB_CHANGE_FEATURE_MAP mRootHubFeatureMap[] = {
**/
EFI_STATUS
UsbHubCtrlSetHubDepth (
- IN USB_DEVICE *HubDev,
- IN UINT16 Depth
+ IN USB_DEVICE *HubDev,
+ IN UINT16 Depth
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
HubDev,
@@ -82,11 +83,11 @@ UsbHubCtrlSetHubDepth (
**/
EFI_STATUS
UsbHubCtrlClearHubFeature (
- IN USB_DEVICE *HubDev,
- IN UINT16 Feature
+ IN USB_DEVICE *HubDev,
+ IN UINT16 Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
HubDev,
@@ -103,7 +104,6 @@ UsbHubCtrlClearHubFeature (
return Status;
}
-
/**
Clear the feature of the device's port.
@@ -117,12 +117,12 @@ UsbHubCtrlClearHubFeature (
**/
EFI_STATUS
UsbHubCtrlClearPortFeature (
- IN USB_DEVICE *HubDev,
- IN UINT8 Port,
- IN UINT16 Feature
+ IN USB_DEVICE *HubDev,
+ IN UINT8 Port,
+ IN UINT16 Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// In USB bus, all the port index starts from 0. But HUB
@@ -135,7 +135,7 @@ UsbHubCtrlClearPortFeature (
USB_HUB_TARGET_PORT,
USB_HUB_REQ_CLEAR_FEATURE,
Feature,
- (UINT16) (Port + 1),
+ (UINT16)(Port + 1),
NULL,
0
);
@@ -143,7 +143,6 @@ UsbHubCtrlClearPortFeature (
return Status;
}
-
/**
Clear the transaction translate buffer if full/low
speed control/bulk transfer failed and the transfer
@@ -163,21 +162,21 @@ UsbHubCtrlClearPortFeature (
**/
EFI_STATUS
UsbHubCtrlClearTTBuffer (
- IN USB_DEVICE *HubDev,
- IN UINT8 Port,
- IN UINT16 DevAddr,
- IN UINT16 EpNum,
- IN UINT16 EpType
+ IN USB_DEVICE *HubDev,
+ IN UINT8 Port,
+ IN UINT16 DevAddr,
+ IN UINT16 EpNum,
+ IN UINT16 EpType
)
{
- EFI_STATUS Status;
- UINT16 Value;
+ EFI_STATUS Status;
+ UINT16 Value;
//
// Check USB2.0 spec page 424 for wValue's encoding
//
- Value = (UINT16) ((EpNum & 0x0F) | (DevAddr << 4) |
- ((EpType & 0x03) << 11) | ((EpNum & 0x80) << 15));
+ Value = (UINT16)((EpNum & 0x0F) | (DevAddr << 4) |
+ ((EpType & 0x03) << 11) | ((EpNum & 0x80) << 15));
Status = UsbCtrlRequest (
HubDev,
@@ -186,7 +185,7 @@ UsbHubCtrlClearTTBuffer (
USB_HUB_TARGET_PORT,
USB_HUB_REQ_CLEAR_TT,
Value,
- (UINT16) (Port + 1),
+ (UINT16)(Port + 1),
NULL,
0
);
@@ -207,13 +206,13 @@ UsbHubCtrlClearTTBuffer (
**/
EFI_STATUS
UsbHubCtrlGetHubDesc (
- IN USB_DEVICE *HubDev,
- OUT VOID *Buf,
- IN UINTN Len
+ IN USB_DEVICE *HubDev,
+ OUT VOID *Buf,
+ IN UINTN Len
)
{
- EFI_STATUS Status;
- UINT8 DescType;
+ EFI_STATUS Status;
+ UINT8 DescType;
DescType = (HubDev->Speed == EFI_USB_SPEED_SUPER) ?
USB_DESC_TYPE_HUB_SUPER_SPEED :
@@ -225,7 +224,7 @@ UsbHubCtrlGetHubDesc (
USB_REQ_TYPE_CLASS,
USB_HUB_TARGET_HUB,
USB_HUB_REQ_GET_DESC,
- (UINT16) (DescType << 8),
+ (UINT16)(DescType << 8),
0,
Buf,
Len
@@ -234,7 +233,6 @@ UsbHubCtrlGetHubDesc (
return Status;
}
-
/**
Usb hub control transfer to get the hub status.
@@ -247,11 +245,11 @@ UsbHubCtrlGetHubDesc (
**/
EFI_STATUS
UsbHubCtrlGetHubStatus (
- IN USB_DEVICE *HubDev,
- OUT UINT32 *State
+ IN USB_DEVICE *HubDev,
+ OUT UINT32 *State
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = UsbCtrlRequest (
HubDev,
@@ -268,7 +266,6 @@ UsbHubCtrlGetHubStatus (
return Status;
}
-
/**
Usb hub control transfer to get the port status.
@@ -282,12 +279,12 @@ UsbHubCtrlGetHubStatus (
**/
EFI_STATUS
UsbHubCtrlGetPortStatus (
- IN USB_DEVICE *HubDev,
- IN UINT8 Port,
- OUT VOID *State
+ IN USB_DEVICE *HubDev,
+ IN UINT8 Port,
+ OUT VOID *State
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// In USB bus, all the port index starts from 0. But HUB
@@ -302,7 +299,7 @@ UsbHubCtrlGetPortStatus (
USB_HUB_TARGET_PORT,
USB_HUB_REQ_GET_STATUS,
0,
- (UINT16) (Port + 1),
+ (UINT16)(Port + 1),
State,
4
);
@@ -310,7 +307,6 @@ UsbHubCtrlGetPortStatus (
return Status;
}
-
/**
Usb hub control transfer to set the port feature.
@@ -324,12 +320,12 @@ UsbHubCtrlGetPortStatus (
**/
EFI_STATUS
UsbHubCtrlSetPortFeature (
- IN USB_DEVICE *HubDev,
- IN UINT8 Port,
- IN UINT8 Feature
+ IN USB_DEVICE *HubDev,
+ IN UINT8 Port,
+ IN UINT8 Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// In USB bus, all the port index starts from 0. But HUB
@@ -342,7 +338,7 @@ UsbHubCtrlSetPortFeature (
USB_HUB_TARGET_PORT,
USB_HUB_REQ_SET_FEATURE,
Feature,
- (UINT16) (Port + 1),
+ (UINT16)(Port + 1),
NULL,
0
);
@@ -350,7 +346,6 @@ UsbHubCtrlSetPortFeature (
return Status;
}
-
/**
Read the whole usb hub descriptor. It is necessary
to do it in two steps because hub descriptor is of
@@ -369,7 +364,7 @@ UsbHubReadDesc (
OUT EFI_USB_HUB_DESCRIPTOR *HubDesc
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// First get the hub descriptor length
@@ -386,8 +381,6 @@ UsbHubReadDesc (
return UsbHubCtrlGetHubDesc (HubDev, HubDesc, HubDesc->Length);
}
-
-
/**
Ack the hub change bits. If these bits are not ACKed, Hub will
always return changed bit map from its interrupt endpoint.
@@ -400,13 +393,13 @@ UsbHubReadDesc (
**/
EFI_STATUS
UsbHubAckHubStatus (
- IN USB_DEVICE *HubDev
+ IN USB_DEVICE *HubDev
)
{
- EFI_USB_PORT_STATUS HubState;
- EFI_STATUS Status;
+ EFI_USB_PORT_STATUS HubState;
+ EFI_STATUS Status;
- Status = UsbHubCtrlGetHubStatus (HubDev, (UINT32 *) &HubState);
+ Status = UsbHubCtrlGetHubStatus (HubDev, (UINT32 *)&HubState);
if (EFI_ERROR (Status)) {
return Status;
@@ -423,7 +416,6 @@ UsbHubAckHubStatus (
return EFI_SUCCESS;
}
-
/**
Test whether the interface is a hub interface.
@@ -435,7 +427,7 @@ UsbHubAckHubStatus (
**/
BOOLEAN
UsbIsHubInterface (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
)
{
EFI_USB_INTERFACE_DESCRIPTOR *Setting;
@@ -447,15 +439,14 @@ UsbIsHubInterface (
Setting = &UsbIf->IfSetting->Desc;
if ((Setting->InterfaceClass == USB_HUB_CLASS_CODE) &&
- (Setting->InterfaceSubClass == USB_HUB_SUBCLASS_CODE)) {
-
+ (Setting->InterfaceSubClass == USB_HUB_SUBCLASS_CODE))
+ {
return TRUE;
}
return FALSE;
}
-
/**
The callback function to the USB hub status change
interrupt endpoint. It is called periodically by
@@ -473,20 +464,20 @@ UsbIsHubInterface (
EFI_STATUS
EFIAPI
UsbOnHubInterrupt (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
)
{
- USB_INTERFACE *HubIf;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_USB_ENDPOINT_DESCRIPTOR *EpDesc;
- EFI_STATUS Status;
+ USB_INTERFACE *HubIf;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_USB_ENDPOINT_DESCRIPTOR *EpDesc;
+ EFI_STATUS Status;
- HubIf = (USB_INTERFACE *) Context;
- UsbIo = &(HubIf->UsbIo);
- EpDesc = &(HubIf->HubEp->Desc);
+ HubIf = (USB_INTERFACE *)Context;
+ UsbIo = &(HubIf->UsbIo);
+ EpDesc = &(HubIf->HubEp->Desc);
if (Result != EFI_USB_NOERROR) {
//
@@ -516,7 +507,7 @@ UsbOnHubInterrupt (
);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbOnHubInterrupt: failed to remove async transfer - %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "UsbOnHubInterrupt: failed to remove async transfer - %r\n", Status));
return Status;
}
@@ -531,7 +522,7 @@ UsbOnHubInterrupt (
);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbOnHubInterrupt: failed to submit new async transfer - %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "UsbOnHubInterrupt: failed to submit new async transfer - %r\n", Status));
}
return Status;
@@ -559,9 +550,6 @@ UsbOnHubInterrupt (
return EFI_SUCCESS;
}
-
-
-
/**
Initialize the device for a non-root hub.
@@ -573,7 +561,7 @@ UsbOnHubInterrupt (
**/
EFI_STATUS
UsbHubInit (
- IN USB_INTERFACE *HubIf
+ IN USB_INTERFACE *HubIf
)
{
UINT8 HubDescBuffer[256];
@@ -590,11 +578,11 @@ UsbHubInit (
//
// Locate the interrupt endpoint for port change map
//
- HubIf->IsHub = FALSE;
- Setting = HubIf->IfSetting;
- HubDev = HubIf->Device;
- EpDesc = NULL;
- NumEndpoints = Setting->Desc.NumEndpoints;
+ HubIf->IsHub = FALSE;
+ Setting = HubIf->IfSetting;
+ HubDev = HubIf->Device;
+ EpDesc = NULL;
+ NumEndpoints = Setting->Desc.NumEndpoints;
for (Index = 0; Index < NumEndpoints; Index++) {
ASSERT ((Setting->Endpoints != NULL) && (Setting->Endpoints[Index] != NULL));
@@ -602,13 +590,14 @@ UsbHubInit (
EpDesc = Setting->Endpoints[Index];
if (USB_BIT_IS_SET (EpDesc->Desc.EndpointAddress, USB_ENDPOINT_DIR_IN) &&
- (USB_ENDPOINT_TYPE (&EpDesc->Desc) == USB_ENDPOINT_INTERRUPT)) {
+ (USB_ENDPOINT_TYPE (&EpDesc->Desc) == USB_ENDPOINT_INTERRUPT))
+ {
break;
}
}
if (Index == NumEndpoints) {
- DEBUG (( DEBUG_ERROR, "UsbHubInit: no interrupt endpoint found for hub %d\n", HubDev->Address));
+ DEBUG ((DEBUG_ERROR, "UsbHubInit: no interrupt endpoint found for hub %d\n", HubDev->Address));
return EFI_DEVICE_ERROR;
}
@@ -616,17 +605,17 @@ UsbHubInit (
// The length field of descriptor is UINT8 type, so the buffer
// with 256 bytes is enough to hold the descriptor data.
//
- HubDesc = (EFI_USB_HUB_DESCRIPTOR *) HubDescBuffer;
- Status = UsbHubReadDesc (HubDev, HubDesc);
+ HubDesc = (EFI_USB_HUB_DESCRIPTOR *)HubDescBuffer;
+ Status = UsbHubReadDesc (HubDev, HubDesc);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbHubInit: failed to read HUB descriptor %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "UsbHubInit: failed to read HUB descriptor %r\n", Status));
return Status;
}
HubIf->NumOfPort = HubDesc->NumPorts;
- DEBUG (( DEBUG_INFO, "UsbHubInit: hub %d has %d ports\n", HubDev->Address,HubIf->NumOfPort));
+ DEBUG ((DEBUG_INFO, "UsbHubInit: hub %d has %d ports\n", HubDev->Address, HubIf->NumOfPort));
//
// OK, set IsHub to TRUE. Now usb bus can handle this device
@@ -652,7 +641,7 @@ UsbHubInit (
// for both gang/individual powered hubs.
//
for (Index = 0; Index < HubDesc->NumPorts; Index++) {
- UsbHubCtrlSetPortFeature (HubIf->Device, Index, (EFI_USB_PORT_FEATURE) USB_HUB_PORT_POWER);
+ UsbHubCtrlSetPortFeature (HubIf->Device, Index, (EFI_USB_PORT_FEATURE)USB_HUB_PORT_POWER);
}
//
@@ -661,6 +650,7 @@ UsbHubInit (
if (HubDesc->PwrOn2PwrGood > 0) {
gBS->Stall (HubDesc->PwrOn2PwrGood * USB_SET_PORT_POWER_STALL);
}
+
UsbHubAckHubStatus (HubIf->Device);
}
@@ -676,8 +666,12 @@ UsbHubInit (
);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbHubInit: failed to create signal for hub %d - %r\n",
- HubDev->Address, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbHubInit: failed to create signal for hub %d - %r\n",
+ HubDev->Address,
+ Status
+ ));
return Status;
}
@@ -701,8 +695,12 @@ UsbHubInit (
);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbHubInit: failed to queue interrupt transfer for hub %d - %r\n",
- HubDev->Address, Status));
+ DEBUG ((
+ DEBUG_ERROR,
+ "UsbHubInit: failed to queue interrupt transfer for hub %d - %r\n",
+ HubDev->Address,
+ Status
+ ));
gBS->CloseEvent (HubIf->HubNotify);
HubIf->HubNotify = NULL;
@@ -710,12 +708,10 @@ UsbHubInit (
return Status;
}
- DEBUG (( DEBUG_INFO, "UsbHubInit: hub %d initialized\n", HubDev->Address));
+ DEBUG ((DEBUG_INFO, "UsbHubInit: hub %d initialized\n", HubDev->Address));
return Status;
}
-
-
/**
Get the port status. This function is required to
ACK the port change bits although it will return
@@ -732,20 +728,18 @@ UsbHubInit (
**/
EFI_STATUS
UsbHubGetPortStatus (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- OUT EFI_USB_PORT_STATUS *PortState
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ OUT EFI_USB_PORT_STATUS *PortState
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- Status = UsbHubCtrlGetPortStatus (HubIf->Device, Port, PortState);
+ Status = UsbHubCtrlGetPortStatus (HubIf->Device, Port, PortState);
return Status;
}
-
-
/**
Clear the port change status.
@@ -755,8 +749,8 @@ UsbHubGetPortStatus (
**/
VOID
UsbHubClearPortChange (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
)
{
EFI_USB_PORT_STATUS PortState;
@@ -780,13 +774,11 @@ UsbHubClearPortChange (
Map = &mHubFeatureMap[Index];
if (USB_BIT_IS_SET (PortState.PortChangeStatus, Map->ChangedBit)) {
- UsbHubCtrlClearPortFeature (HubIf->Device, Port, (UINT16) Map->Feature);
+ UsbHubCtrlClearPortFeature (HubIf->Device, Port, (UINT16)Map->Feature);
}
}
}
-
-
/**
Function to set the port feature for non-root hub.
@@ -800,19 +792,18 @@ UsbHubClearPortChange (
**/
EFI_STATUS
UsbHubSetPortFeature (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- Status = UsbHubCtrlSetPortFeature (HubIf->Device, Port, (UINT8) Feature);
+ Status = UsbHubCtrlSetPortFeature (HubIf->Device, Port, (UINT8)Feature);
return Status;
}
-
/**
Interface function to clear the port feature for non-root hub.
@@ -826,19 +817,18 @@ UsbHubSetPortFeature (
**/
EFI_STATUS
UsbHubClearPortFeature (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- Status = UsbHubCtrlClearPortFeature (HubIf->Device, Port, (UINT8) Feature);
+ Status = UsbHubCtrlClearPortFeature (HubIf->Device, Port, (UINT8)Feature);
return Status;
}
-
/**
Interface function to reset the port.
@@ -852,15 +842,15 @@ UsbHubClearPortFeature (
**/
EFI_STATUS
UsbHubResetPort (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
)
{
- EFI_USB_PORT_STATUS PortState;
- UINTN Index;
- EFI_STATUS Status;
+ EFI_USB_PORT_STATUS PortState;
+ UINTN Index;
+ EFI_STATUS Status;
- Status = UsbHubSetPortFeature (HubIf, Port, (EFI_USB_PORT_FEATURE) USB_HUB_PORT_RESET);
+ Status = UsbHubSetPortFeature (HubIf, Port, (EFI_USB_PORT_FEATURE)USB_HUB_PORT_RESET);
if (EFI_ERROR (Status)) {
return Status;
@@ -885,7 +875,8 @@ UsbHubResetPort (
}
if (!EFI_ERROR (Status) &&
- USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_RESET)) {
+ USB_BIT_IS_SET (PortState.PortChangeStatus, USB_PORT_STAT_C_RESET))
+ {
gBS->Stall (USB_SET_PORT_RECOVERY_STALL);
return EFI_SUCCESS;
}
@@ -896,7 +887,6 @@ UsbHubResetPort (
return EFI_TIMEOUT;
}
-
/**
Release the hub's control of the interface.
@@ -907,11 +897,11 @@ UsbHubResetPort (
**/
EFI_STATUS
UsbHubRelease (
- IN USB_INTERFACE *HubIf
+ IN USB_INTERFACE *HubIf
)
{
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
UsbIo = &HubIf->UsbIo;
Status = UsbIo->UsbAsyncInterruptTransfer (
@@ -930,17 +920,15 @@ UsbHubRelease (
gBS->CloseEvent (HubIf->HubNotify);
- HubIf->IsHub = FALSE;
- HubIf->HubApi = NULL;
- HubIf->HubEp = NULL;
- HubIf->HubNotify = NULL;
+ HubIf->IsHub = FALSE;
+ HubIf->HubApi = NULL;
+ HubIf->HubEp = NULL;
+ HubIf->HubNotify = NULL;
- DEBUG (( DEBUG_INFO, "UsbHubRelease: hub device %d released\n", HubIf->Device->Address));
+ DEBUG ((DEBUG_INFO, "UsbHubRelease: hub device %d released\n", HubIf->Device->Address));
return EFI_SUCCESS;
}
-
-
/**
Initialize the interface for root hub.
@@ -952,13 +940,13 @@ UsbHubRelease (
**/
EFI_STATUS
UsbRootHubInit (
- IN USB_INTERFACE *HubIf
+ IN USB_INTERFACE *HubIf
)
{
- EFI_STATUS Status;
- UINT8 MaxSpeed;
- UINT8 NumOfPort;
- UINT8 Support64;
+ EFI_STATUS Status;
+ UINT8 MaxSpeed;
+ UINT8 NumOfPort;
+ UINT8 Support64;
Status = UsbHcGetCapability (HubIf->Device->Bus, &MaxSpeed, &NumOfPort, &Support64);
@@ -966,15 +954,20 @@ UsbRootHubInit (
return Status;
}
- DEBUG (( DEBUG_INFO, "UsbRootHubInit: root hub %p - max speed %d, %d ports\n",
- HubIf, MaxSpeed, NumOfPort));
-
- HubIf->IsHub = TRUE;
- HubIf->HubApi = &mUsbRootHubApi;
- HubIf->HubEp = NULL;
- HubIf->MaxSpeed = MaxSpeed;
- HubIf->NumOfPort = NumOfPort;
- HubIf->HubNotify = NULL;
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbRootHubInit: root hub %p - max speed %d, %d ports\n",
+ HubIf,
+ MaxSpeed,
+ NumOfPort
+ ));
+
+ HubIf->IsHub = TRUE;
+ HubIf->HubApi = &mUsbRootHubApi;
+ HubIf->HubEp = NULL;
+ HubIf->MaxSpeed = MaxSpeed;
+ HubIf->NumOfPort = NumOfPort;
+ HubIf->HubNotify = NULL;
//
// Create a timer to poll root hub ports periodically
@@ -1010,7 +1003,6 @@ UsbRootHubInit (
return Status;
}
-
/**
Get the port status. This function is required to
ACK the port change bits although it will return
@@ -1027,21 +1019,20 @@ UsbRootHubInit (
**/
EFI_STATUS
UsbRootHubGetPortStatus (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- OUT EFI_USB_PORT_STATUS *PortState
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ OUT EFI_USB_PORT_STATUS *PortState
)
{
- USB_BUS *Bus;
- EFI_STATUS Status;
+ USB_BUS *Bus;
+ EFI_STATUS Status;
- Bus = HubIf->Device->Bus;
- Status = UsbHcGetRootHubPortStatus (Bus, Port, PortState);
+ Bus = HubIf->Device->Bus;
+ Status = UsbHcGetRootHubPortStatus (Bus, Port, PortState);
return Status;
}
-
/**
Clear the port change status.
@@ -1051,8 +1042,8 @@ UsbRootHubGetPortStatus (
**/
VOID
UsbRootHubClearPortChange (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port
)
{
EFI_USB_PORT_STATUS PortState;
@@ -1076,12 +1067,11 @@ UsbRootHubClearPortChange (
Map = &mRootHubFeatureMap[Index];
if (USB_BIT_IS_SET (PortState.PortChangeStatus, Map->ChangedBit)) {
- UsbHcClearRootHubPortFeature (HubIf->Device->Bus, Port, (EFI_USB_PORT_FEATURE) Map->Feature);
+ UsbHcClearRootHubPortFeature (HubIf->Device->Bus, Port, (EFI_USB_PORT_FEATURE)Map->Feature);
}
}
}
-
/**
Set the root hub port feature.
@@ -1095,19 +1085,18 @@ UsbRootHubClearPortChange (
**/
EFI_STATUS
UsbRootHubSetPortFeature (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- Status = UsbHcSetRootHubPortFeature (HubIf->Device->Bus, Port, Feature);
+ Status = UsbHcSetRootHubPortFeature (HubIf->Device->Bus, Port, Feature);
return Status;
}
-
/**
Clear the root hub port feature.
@@ -1121,19 +1110,18 @@ UsbRootHubSetPortFeature (
**/
EFI_STATUS
UsbRootHubClearPortFeature (
- IN USB_INTERFACE *HubIf,
- IN UINT8 Port,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_INTERFACE *HubIf,
+ IN UINT8 Port,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
- Status = UsbHcClearRootHubPortFeature (HubIf->Device->Bus, Port, Feature);
+ Status = UsbHcClearRootHubPortFeature (HubIf->Device->Bus, Port, Feature);
return Status;
}
-
/**
Interface function to reset the root hub port.
@@ -1149,26 +1137,26 @@ UsbRootHubClearPortFeature (
**/
EFI_STATUS
UsbRootHubResetPort (
- IN USB_INTERFACE *RootIf,
- IN UINT8 Port
+ IN USB_INTERFACE *RootIf,
+ IN UINT8 Port
)
{
- USB_BUS *Bus;
- EFI_STATUS Status;
- EFI_USB_PORT_STATUS PortState;
- UINTN Index;
+ USB_BUS *Bus;
+ EFI_STATUS Status;
+ EFI_USB_PORT_STATUS PortState;
+ UINTN Index;
//
// Notice: although EHCI requires that ENABLED bit be cleared
// when reset the port, we don't need to care that here. It
// should be handled in the EHCI driver.
//
- Bus = RootIf->Device->Bus;
+ Bus = RootIf->Device->Bus;
- Status = UsbHcSetRootHubPortFeature (Bus, Port, EfiUsbPortReset);
+ Status = UsbHcSetRootHubPortFeature (Bus, Port, EfiUsbPortReset);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbRootHubResetPort: failed to start reset on port %d\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbRootHubResetPort: failed to start reset on port %d\n", Port));
return Status;
}
@@ -1181,7 +1169,7 @@ UsbRootHubResetPort (
Status = UsbHcClearRootHubPortFeature (Bus, Port, EfiUsbPortReset);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbRootHubResetPort: failed to clear reset on port %d\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbRootHubResetPort: failed to clear reset on port %d\n", Port));
return Status;
}
@@ -1220,17 +1208,15 @@ UsbRootHubResetPort (
// automatically enable the port, we need to enable it manually.
//
if (RootIf->MaxSpeed == EFI_USB_SPEED_HIGH) {
- DEBUG (( DEBUG_ERROR, "UsbRootHubResetPort: release low/full speed device (%d) to UHCI\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbRootHubResetPort: release low/full speed device (%d) to UHCI\n", Port));
UsbRootHubSetPortFeature (RootIf, Port, EfiUsbPortOwner);
return EFI_NOT_FOUND;
-
} else {
-
Status = UsbRootHubSetPortFeature (RootIf, Port, EfiUsbPortEnable);
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "UsbRootHubResetPort: failed to enable port %d for UHCI\n", Port));
+ DEBUG ((DEBUG_ERROR, "UsbRootHubResetPort: failed to enable port %d for UHCI\n", Port));
return Status;
}
@@ -1241,7 +1227,6 @@ UsbRootHubResetPort (
return EFI_SUCCESS;
}
-
/**
Release the root hub's control of the interface.
@@ -1253,10 +1238,10 @@ UsbRootHubResetPort (
**/
EFI_STATUS
UsbRootHubRelease (
- IN USB_INTERFACE *HubIf
+ IN USB_INTERFACE *HubIf
)
{
- DEBUG (( DEBUG_INFO, "UsbRootHubRelease: root hub released for hub %p\n", HubIf));
+ DEBUG ((DEBUG_INFO, "UsbRootHubRelease: root hub released for hub %p\n", HubIf));
gBS->SetTimer (HubIf->HubNotify, TimerCancel, USB_ROOTHUB_POLL_INTERVAL);
gBS->CloseEvent (HubIf->HubNotify);
@@ -1264,7 +1249,7 @@ UsbRootHubRelease (
return EFI_SUCCESS;
}
-USB_HUB_API mUsbHubApi = {
+USB_HUB_API mUsbHubApi = {
UsbHubInit,
UsbHubGetPortStatus,
UsbHubClearPortChange,
@@ -1274,7 +1259,7 @@ USB_HUB_API mUsbHubApi = {
UsbHubRelease
};
-USB_HUB_API mUsbRootHubApi = {
+USB_HUB_API mUsbRootHubApi = {
UsbRootHubInit,
UsbRootHubGetPortStatus,
UsbRootHubClearPortChange,
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.h b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.h
index 6043b5b2cd..8c8583a697 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbHub.h
@@ -12,33 +12,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Usb.h>
-#define USB_ENDPOINT_ADDR(EpAddr) ((EpAddr) & 0x7F)
-#define USB_ENDPOINT_TYPE(Desc) ((Desc)->Attributes & USB_ENDPOINT_TYPE_MASK)
+#define USB_ENDPOINT_ADDR(EpAddr) ((EpAddr) & 0x7F)
+#define USB_ENDPOINT_TYPE(Desc) ((Desc)->Attributes & USB_ENDPOINT_TYPE_MASK)
-
-#define USB_DESC_TYPE_HUB 0x29
+#define USB_DESC_TYPE_HUB 0x29
#define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a
//
// Hub class control transfer target
//
-#define USB_HUB_TARGET_HUB 0
-#define USB_HUB_TARGET_PORT 3
+#define USB_HUB_TARGET_HUB 0
+#define USB_HUB_TARGET_PORT 3
//
// HUB class specific contrl transfer request type
//
-#define USB_HUB_REQ_GET_STATUS 0
-#define USB_HUB_REQ_CLEAR_FEATURE 1
-#define USB_HUB_REQ_SET_FEATURE 3
-#define USB_HUB_REQ_GET_DESC 6
-#define USB_HUB_REQ_SET_DESC 7
-#define USB_HUB_REQ_CLEAR_TT 8
-#define USB_HUB_REQ_RESET_TT 9
-#define USB_HUB_REQ_GET_TT_STATE 10
-#define USB_HUB_REQ_STOP_TT 11
+#define USB_HUB_REQ_GET_STATUS 0
+#define USB_HUB_REQ_CLEAR_FEATURE 1
+#define USB_HUB_REQ_SET_FEATURE 3
+#define USB_HUB_REQ_GET_DESC 6
+#define USB_HUB_REQ_SET_DESC 7
+#define USB_HUB_REQ_CLEAR_TT 8
+#define USB_HUB_REQ_RESET_TT 9
+#define USB_HUB_REQ_GET_TT_STATE 10
+#define USB_HUB_REQ_STOP_TT 11
-#define USB_HUB_REQ_SET_DEPTH 12
+#define USB_HUB_REQ_SET_DEPTH 12
//
// USB hub class feature selector
@@ -51,22 +50,22 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_HUB_PORT_OVER_CURRENT 3
#define USB_HUB_PORT_RESET 4
-#define USB_HUB_PORT_LINK_STATE 5
+#define USB_HUB_PORT_LINK_STATE 5
-#define USB_HUB_PORT_POWER 8
-#define USB_HUB_PORT_LOW_SPEED 9
-#define USB_HUB_C_PORT_CONNECT 16
-#define USB_HUB_C_PORT_ENABLE 17
-#define USB_HUB_C_PORT_SUSPEND 18
-#define USB_HUB_C_PORT_OVER_CURRENT 19
-#define USB_HUB_C_PORT_RESET 20
-#define USB_HUB_PORT_TEST 21
-#define USB_HUB_PORT_INDICATOR 22
+#define USB_HUB_PORT_POWER 8
+#define USB_HUB_PORT_LOW_SPEED 9
+#define USB_HUB_C_PORT_CONNECT 16
+#define USB_HUB_C_PORT_ENABLE 17
+#define USB_HUB_C_PORT_SUSPEND 18
+#define USB_HUB_C_PORT_OVER_CURRENT 19
+#define USB_HUB_C_PORT_RESET 20
+#define USB_HUB_PORT_TEST 21
+#define USB_HUB_PORT_INDICATOR 22
-#define USB_HUB_C_PORT_LINK_STATE 25
-#define USB_HUB_PORT_REMOTE_WAKE_MASK 27
-#define USB_HUB_BH_PORT_RESET 28
-#define USB_HUB_C_BH_PORT_RESET 29
+#define USB_HUB_C_PORT_LINK_STATE 25
+#define USB_HUB_PORT_REMOTE_WAKE_MASK 27
+#define USB_HUB_BH_PORT_RESET 28
+#define USB_HUB_C_BH_PORT_RESET 29
//
// Constant value for Port Status & Port Change Status of SuperSpeed port
@@ -76,18 +75,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// USB hub power control method. In gang power control
//
-#define USB_HUB_GANG_POWER_CTRL 0
-#define USB_HUB_PORT_POWER_CTRL 0x01
+#define USB_HUB_GANG_POWER_CTRL 0
+#define USB_HUB_PORT_POWER_CTRL 0x01
//
// USB hub status bits
//
-#define USB_HUB_STAT_LOCAL_POWER 0x01
-#define USB_HUB_STAT_OVER_CURRENT 0x02
-#define USB_HUB_STAT_C_LOCAL_POWER 0x01
-#define USB_HUB_STAT_C_OVER_CURRENT 0x02
+#define USB_HUB_STAT_LOCAL_POWER 0x01
+#define USB_HUB_STAT_OVER_CURRENT 0x02
+#define USB_HUB_STAT_C_LOCAL_POWER 0x01
+#define USB_HUB_STAT_C_OVER_CURRENT 0x02
-#define USB_HUB_CLASS_CODE 0x09
-#define USB_HUB_SUBCLASS_CODE 0x00
+#define USB_HUB_CLASS_CODE 0x09
+#define USB_HUB_SUBCLASS_CODE 0x00
//
// Host software return timeout if port status doesn't change
@@ -100,24 +99,22 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Hub descriptor, the last two fields are of variable length.
//
typedef struct {
- UINT8 Length;
- UINT8 DescType;
- UINT8 NumPorts;
- UINT16 HubCharacter;
- UINT8 PwrOn2PwrGood;
- UINT8 HubContrCurrent;
- UINT8 Filler[16];
+ UINT8 Length;
+ UINT8 DescType;
+ UINT8 NumPorts;
+ UINT16 HubCharacter;
+ UINT8 PwrOn2PwrGood;
+ UINT8 HubContrCurrent;
+ UINT8 Filler[16];
} EFI_USB_HUB_DESCRIPTOR;
#pragma pack()
-
typedef struct {
- UINT16 ChangedBit;
- EFI_USB_PORT_FEATURE Feature;
+ UINT16 ChangedBit;
+ EFI_USB_PORT_FEATURE Feature;
} USB_CHANGE_FEATURE_MAP;
-
/**
Clear the transaction translate buffer if full/low
speed control/bulk transfer failed and the transfer
@@ -137,14 +134,13 @@ typedef struct {
**/
EFI_STATUS
UsbHubCtrlClearTTBuffer (
- IN USB_DEVICE *UsbDev,
- IN UINT8 Port,
- IN UINT16 DevAddr,
- IN UINT16 EpNum,
- IN UINT16 EpType
+ IN USB_DEVICE *UsbDev,
+ IN UINT8 Port,
+ IN UINT16 DevAddr,
+ IN UINT16 EpNum,
+ IN UINT16 EpType
);
-
/**
Test whether the interface is a hub interface.
@@ -156,10 +152,9 @@ UsbHubCtrlClearTTBuffer (
**/
BOOLEAN
UsbIsHubInterface (
- IN USB_INTERFACE *UsbIf
+ IN USB_INTERFACE *UsbIf
);
-
/**
Ack the hub change bits. If these bits are not ACKed, Hub will
always return changed bit map from its interrupt endpoint.
@@ -172,10 +167,9 @@ UsbIsHubInterface (
**/
EFI_STATUS
UsbHubAckHubStatus (
- IN USB_DEVICE *UsbDev
+ IN USB_DEVICE *UsbDev
);
-extern USB_HUB_API mUsbHubApi;
-extern USB_HUB_API mUsbRootHubApi;
+extern USB_HUB_API mUsbHubApi;
+extern USB_HUB_API mUsbRootHubApi;
#endif
-
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.c b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.c
index 4441466d80..12d08c0b74 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.c
@@ -7,7 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "UsbBus.h"
//
@@ -15,14 +14,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Use a shor form Usb class Device Path, which could match any usb device, in WantedUsbIoDPList to indicate all Usb devices
// are wanted Usb devices
//
-USB_CLASS_FORMAT_DEVICE_PATH mAllUsbClassDevicePath = {
+USB_CLASS_FORMAT_DEVICE_PATH mAllUsbClassDevicePath = {
{
{
MESSAGING_DEVICE_PATH,
MSG_USB_CLASS_DP,
{
- (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)),
- (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (USB_CLASS_DEVICE_PATH)),
+ (UINT8)((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)
}
},
0xffff, // VendorId
@@ -42,7 +41,6 @@ USB_CLASS_FORMAT_DEVICE_PATH mAllUsbClassDevicePath = {
}
};
-
/**
Get the capability of the host controller.
@@ -57,41 +55,31 @@ USB_CLASS_FORMAT_DEVICE_PATH mAllUsbClassDevicePath = {
**/
EFI_STATUS
UsbHcGetCapability (
- IN USB_BUS *UsbBus,
- OUT UINT8 *MaxSpeed,
- OUT UINT8 *NumOfPort,
- OUT UINT8 *Is64BitCapable
+ IN USB_BUS *UsbBus,
+ OUT UINT8 *MaxSpeed,
+ OUT UINT8 *NumOfPort,
+ OUT UINT8 *Is64BitCapable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->GetCapability (
- UsbBus->Usb2Hc,
- MaxSpeed,
- NumOfPort,
- Is64BitCapable
- );
-
+ UsbBus->Usb2Hc,
+ MaxSpeed,
+ NumOfPort,
+ Is64BitCapable
+ );
} else {
Status = UsbBus->UsbHc->GetRootHubPortNumber (UsbBus->UsbHc, NumOfPort);
*MaxSpeed = EFI_USB_SPEED_FULL;
- *Is64BitCapable = (UINT8) FALSE;
+ *Is64BitCapable = (UINT8)FALSE;
}
return Status;
}
-
-
-
-
-
-
-
-
-
/**
Get the root hub port state.
@@ -105,12 +93,12 @@ UsbHcGetCapability (
**/
EFI_STATUS
UsbHcGetRootHubPortStatus (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->GetRootHubPortStatus (UsbBus->Usb2Hc, PortIndex, PortStatus);
@@ -121,7 +109,6 @@ UsbHcGetRootHubPortStatus (
return Status;
}
-
/**
Set the root hub port feature.
@@ -135,13 +122,12 @@ UsbHcGetRootHubPortStatus (
**/
EFI_STATUS
UsbHcSetRootHubPortFeature (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
-
+ EFI_STATUS Status;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->SetRootHubPortFeature (UsbBus->Usb2Hc, PortIndex, Feature);
@@ -152,7 +138,6 @@ UsbHcSetRootHubPortFeature (
return Status;
}
-
/**
Clear the root hub port feature.
@@ -166,12 +151,12 @@ UsbHcSetRootHubPortFeature (
**/
EFI_STATUS
UsbHcClearRootHubPortFeature (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ IN EFI_USB_PORT_FEATURE Feature
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->ClearRootHubPortFeature (UsbBus->Usb2Hc, PortIndex, Feature);
@@ -182,7 +167,6 @@ UsbHcClearRootHubPortFeature (
return Status;
}
-
/**
Execute a control transfer to the device.
@@ -217,8 +201,8 @@ UsbHcControlTransfer (
OUT UINT32 *UsbResult
)
{
- EFI_STATUS Status;
- BOOLEAN IsSlowDevice;
+ EFI_STATUS Status;
+ BOOLEAN IsSlowDevice;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->ControlTransfer (
@@ -234,27 +218,25 @@ UsbHcControlTransfer (
Translator,
UsbResult
);
-
} else {
IsSlowDevice = (BOOLEAN)(EFI_USB_SPEED_LOW == DevSpeed);
- Status = UsbBus->UsbHc->ControlTransfer (
- UsbBus->UsbHc,
- DevAddr,
- IsSlowDevice,
- (UINT8) MaxPacket,
- Request,
- Direction,
- Data,
- DataLength,
- TimeOut,
- UsbResult
- );
+ Status = UsbBus->UsbHc->ControlTransfer (
+ UsbBus->UsbHc,
+ DevAddr,
+ IsSlowDevice,
+ (UINT8)MaxPacket,
+ Request,
+ Direction,
+ Data,
+ DataLength,
+ TimeOut,
+ UsbResult
+ );
}
return Status;
}
-
/**
Execute a bulk transfer to the device's endpoint.
@@ -293,7 +275,7 @@ UsbHcBulkTransfer (
OUT UINT32 *UsbResult
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->BulkTransfer (
@@ -315,7 +297,7 @@ UsbHcBulkTransfer (
UsbBus->UsbHc,
DevAddr,
EpAddr,
- (UINT8) MaxPacket,
+ (UINT8)MaxPacket,
*Data,
DataLength,
DataToggle,
@@ -327,7 +309,6 @@ UsbHcBulkTransfer (
return Status;
}
-
/**
Queue or cancel an asynchronous interrupt transfer.
@@ -366,8 +347,8 @@ UsbHcAsyncInterruptTransfer (
IN VOID *Context OPTIONAL
)
{
- EFI_STATUS Status;
- BOOLEAN IsSlowDevice;
+ EFI_STATUS Status;
+ BOOLEAN IsSlowDevice;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->AsyncInterruptTransfer (
@@ -392,7 +373,7 @@ UsbHcAsyncInterruptTransfer (
DevAddr,
EpAddr,
IsSlowDevice,
- (UINT8) MaxPacket,
+ (UINT8)MaxPacket,
IsNewTransfer,
DataToggle,
PollingInterval,
@@ -405,7 +386,6 @@ UsbHcAsyncInterruptTransfer (
return Status;
}
-
/**
Execute a synchronous interrupt transfer to the target endpoint.
@@ -442,8 +422,8 @@ UsbHcSyncInterruptTransfer (
OUT UINT32 *UsbResult
)
{
- EFI_STATUS Status;
- BOOLEAN IsSlowDevice;
+ EFI_STATUS Status;
+ BOOLEAN IsSlowDevice;
if (UsbBus->Usb2Hc != NULL) {
Status = UsbBus->Usb2Hc->SyncInterruptTransfer (
@@ -460,31 +440,24 @@ UsbHcSyncInterruptTransfer (
UsbResult
);
} else {
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DevSpeed) ? TRUE : FALSE);
- Status = UsbBus->UsbHc->SyncInterruptTransfer (
- UsbBus->UsbHc,
- DevAddr,
- EpAddr,
- IsSlowDevice,
- (UINT8) MaxPacket,
- Data,
- DataLength,
- DataToggle,
- TimeOut,
- UsbResult
- );
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DevSpeed) ? TRUE : FALSE);
+ Status = UsbBus->UsbHc->SyncInterruptTransfer (
+ UsbBus->UsbHc,
+ DevAddr,
+ EpAddr,
+ IsSlowDevice,
+ (UINT8)MaxPacket,
+ Data,
+ DataLength,
+ DataToggle,
+ TimeOut,
+ UsbResult
+ );
}
return Status;
}
-
-
-
-
-
-
-
/**
Open the USB host controller protocol BY_CHILD.
@@ -496,29 +469,28 @@ UsbHcSyncInterruptTransfer (
**/
EFI_STATUS
UsbOpenHostProtoByChild (
- IN USB_BUS *Bus,
- IN EFI_HANDLE Child
+ IN USB_BUS *Bus,
+ IN EFI_HANDLE Child
)
{
- EFI_USB_HC_PROTOCOL *UsbHc;
- EFI_USB2_HC_PROTOCOL *Usb2Hc;
- EFI_STATUS Status;
+ EFI_USB_HC_PROTOCOL *UsbHc;
+ EFI_USB2_HC_PROTOCOL *Usb2Hc;
+ EFI_STATUS Status;
if (Bus->Usb2Hc != NULL) {
Status = gBS->OpenProtocol (
Bus->HostHandle,
&gEfiUsb2HcProtocolGuid,
- (VOID **) &Usb2Hc,
+ (VOID **)&Usb2Hc,
mUsbBusDriverBinding.DriverBindingHandle,
Child,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
);
-
} else {
Status = gBS->OpenProtocol (
Bus->HostHandle,
&gEfiUsbHcProtocolGuid,
- (VOID **) &UsbHc,
+ (VOID **)&UsbHc,
mUsbBusDriverBinding.DriverBindingHandle,
Child,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -528,7 +500,6 @@ UsbOpenHostProtoByChild (
return Status;
}
-
/**
Close the USB host controller protocol BY_CHILD.
@@ -538,8 +509,8 @@ UsbOpenHostProtoByChild (
**/
VOID
UsbCloseHostProtoByChild (
- IN USB_BUS *Bus,
- IN EFI_HANDLE Child
+ IN USB_BUS *Bus,
+ IN EFI_HANDLE Child
)
{
if (Bus->Usb2Hc != NULL) {
@@ -549,7 +520,6 @@ UsbCloseHostProtoByChild (
mUsbBusDriverBinding.DriverBindingHandle,
Child
);
-
} else {
gBS->CloseProtocol (
Bus->HostHandle,
@@ -560,7 +530,6 @@ UsbCloseHostProtoByChild (
}
}
-
/**
return the current TPL, copied from the EDKII glue lib.
@@ -574,7 +543,7 @@ UsbGetCurrentTpl (
VOID
)
{
- EFI_TPL Tpl;
+ EFI_TPL Tpl;
Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
gBS->RestoreTPL (Tpl);
@@ -593,45 +562,45 @@ UsbGetCurrentTpl (
EFI_DEVICE_PATH_PROTOCOL *
EFIAPI
GetUsbDPFromFullDP (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
)
{
- EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathPtr;
- EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathBeginPtr;
- EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathEndPtr;
- UINTN Size;
+ EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathPtr;
+ EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathBeginPtr;
+ EFI_DEVICE_PATH_PROTOCOL *UsbDevicePathEndPtr;
+ UINTN Size;
//
// Get the Usb part first Begin node in full device path
//
UsbDevicePathBeginPtr = DevicePath;
- while ( (!IsDevicePathEnd (UsbDevicePathBeginPtr))&&
+ while ((!IsDevicePathEnd (UsbDevicePathBeginPtr)) &&
((UsbDevicePathBeginPtr->Type != MESSAGING_DEVICE_PATH) ||
- (UsbDevicePathBeginPtr->SubType != MSG_USB_DP &&
- UsbDevicePathBeginPtr->SubType != MSG_USB_CLASS_DP
+ ( UsbDevicePathBeginPtr->SubType != MSG_USB_DP &&
+ UsbDevicePathBeginPtr->SubType != MSG_USB_CLASS_DP
&& UsbDevicePathBeginPtr->SubType != MSG_USB_WWID_DP
- ))) {
-
- UsbDevicePathBeginPtr = NextDevicePathNode(UsbDevicePathBeginPtr);
+ )))
+ {
+ UsbDevicePathBeginPtr = NextDevicePathNode (UsbDevicePathBeginPtr);
}
//
// Get the Usb part first End node in full device path
//
UsbDevicePathEndPtr = UsbDevicePathBeginPtr;
- while ((!IsDevicePathEnd (UsbDevicePathEndPtr))&&
+ while ((!IsDevicePathEnd (UsbDevicePathEndPtr)) &&
(UsbDevicePathEndPtr->Type == MESSAGING_DEVICE_PATH) &&
- (UsbDevicePathEndPtr->SubType == MSG_USB_DP ||
- UsbDevicePathEndPtr->SubType == MSG_USB_CLASS_DP
- || UsbDevicePathEndPtr->SubType == MSG_USB_WWID_DP
- )) {
-
- UsbDevicePathEndPtr = NextDevicePathNode(UsbDevicePathEndPtr);
+ ( UsbDevicePathEndPtr->SubType == MSG_USB_DP ||
+ UsbDevicePathEndPtr->SubType == MSG_USB_CLASS_DP
+ || UsbDevicePathEndPtr->SubType == MSG_USB_WWID_DP
+ ))
+ {
+ UsbDevicePathEndPtr = NextDevicePathNode (UsbDevicePathEndPtr);
}
Size = GetDevicePathSize (UsbDevicePathBeginPtr);
Size -= GetDevicePathSize (UsbDevicePathEndPtr);
- if (Size ==0){
+ if (Size == 0) {
//
// The passed in DevicePath does not contain the usb nodes
//
@@ -647,7 +616,7 @@ GetUsbDPFromFullDP (
//
// Append end device path node
//
- UsbDevicePathEndPtr = (EFI_DEVICE_PATH_PROTOCOL *) ((UINTN) UsbDevicePathPtr + Size);
+ UsbDevicePathEndPtr = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN)UsbDevicePathPtr + Size);
SetDevicePathEndNode (UsbDevicePathEndPtr);
return UsbDevicePathPtr;
}
@@ -665,14 +634,14 @@ GetUsbDPFromFullDP (
BOOLEAN
EFIAPI
SearchUsbDPInList (
- IN EFI_DEVICE_PATH_PROTOCOL *UsbDP,
- IN LIST_ENTRY *UsbIoDPList
+ IN EFI_DEVICE_PATH_PROTOCOL *UsbDP,
+ IN LIST_ENTRY *UsbIoDPList
)
{
- LIST_ENTRY *ListIndex;
- DEVICE_PATH_LIST_ITEM *ListItem;
- BOOLEAN Found;
- UINTN UsbDpDevicePathSize;
+ LIST_ENTRY *ListIndex;
+ DEVICE_PATH_LIST_ITEM *ListItem;
+ BOOLEAN Found;
+ UINTN UsbDpDevicePathSize;
//
// Check that UsbDP and UsbIoDPList are valid
@@ -681,22 +650,23 @@ SearchUsbDPInList (
return FALSE;
}
- Found = FALSE;
+ Found = FALSE;
ListIndex = UsbIoDPList->ForwardLink;
- while (ListIndex != UsbIoDPList){
- ListItem = CR(ListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
+ while (ListIndex != UsbIoDPList) {
+ ListItem = CR (ListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
//
// Compare DEVICE_PATH_LIST_ITEM.DevicePath[]
//
ASSERT (ListItem->DevicePath != NULL);
- UsbDpDevicePathSize = GetDevicePathSize (UsbDP);
+ UsbDpDevicePathSize = GetDevicePathSize (UsbDP);
if (UsbDpDevicePathSize == GetDevicePathSize (ListItem->DevicePath)) {
if ((CompareMem (UsbDP, ListItem->DevicePath, UsbDpDevicePathSize)) == 0) {
Found = TRUE;
break;
}
}
+
ListIndex = ListIndex->ForwardLink;
}
@@ -716,11 +686,11 @@ SearchUsbDPInList (
EFI_STATUS
EFIAPI
AddUsbDPToList (
- IN EFI_DEVICE_PATH_PROTOCOL *UsbDP,
- IN LIST_ENTRY *UsbIoDPList
+ IN EFI_DEVICE_PATH_PROTOCOL *UsbDP,
+ IN LIST_ENTRY *UsbIoDPList
)
{
- DEVICE_PATH_LIST_ITEM *ListItem;
+ DEVICE_PATH_LIST_ITEM *ListItem;
//
// Check that UsbDP and UsbIoDPList are valid
@@ -729,7 +699,7 @@ AddUsbDPToList (
return EFI_INVALID_PARAMETER;
}
- if (SearchUsbDPInList (UsbDP, UsbIoDPList)){
+ if (SearchUsbDPInList (UsbDP, UsbIoDPList)) {
return EFI_SUCCESS;
}
@@ -738,7 +708,7 @@ AddUsbDPToList (
//
ListItem = AllocateZeroPool (sizeof (DEVICE_PATH_LIST_ITEM));
ASSERT (ListItem != NULL);
- ListItem->Signature = DEVICE_PATH_LIST_ITEM_SIGNATURE;
+ ListItem->Signature = DEVICE_PATH_LIST_ITEM_SIGNATURE;
ListItem->DevicePath = DuplicateDevicePath (UsbDP);
InsertTailList (UsbIoDPList, &ListItem->Link);
@@ -760,25 +730,25 @@ AddUsbDPToList (
BOOLEAN
EFIAPI
MatchUsbClass (
- IN USB_CLASS_DEVICE_PATH *UsbClassDevicePathPtr,
- IN USB_INTERFACE *UsbIf
+ IN USB_CLASS_DEVICE_PATH *UsbClassDevicePathPtr,
+ IN USB_INTERFACE *UsbIf
)
{
USB_INTERFACE_DESC *IfDesc;
EFI_USB_INTERFACE_DESCRIPTOR *ActIfDesc;
EFI_USB_DEVICE_DESCRIPTOR *DevDesc;
-
if ((UsbClassDevicePathPtr->Header.Type != MESSAGING_DEVICE_PATH) ||
- (UsbClassDevicePathPtr->Header.SubType != MSG_USB_CLASS_DP)){
+ (UsbClassDevicePathPtr->Header.SubType != MSG_USB_CLASS_DP))
+ {
ASSERT (0);
return FALSE;
}
- IfDesc = UsbIf->IfDesc;
+ IfDesc = UsbIf->IfDesc;
ASSERT (IfDesc->ActiveIndex < USB_MAX_INTERFACE_SETTING);
- ActIfDesc = &(IfDesc->Settings[IfDesc->ActiveIndex]->Desc);
- DevDesc = &(UsbIf->Device->DevDesc->Desc);
+ ActIfDesc = &(IfDesc->Settings[IfDesc->ActiveIndex]->Desc);
+ DevDesc = &(UsbIf->Device->DevDesc->Desc);
//
// If connect class policy, determine whether to create device handle by the five fields
@@ -787,36 +757,37 @@ MatchUsbClass (
// In addition, hub interface is always matched for this policy.
//
if ((ActIfDesc->InterfaceClass == USB_HUB_CLASS_CODE) &&
- (ActIfDesc->InterfaceSubClass == USB_HUB_SUBCLASS_CODE)) {
+ (ActIfDesc->InterfaceSubClass == USB_HUB_SUBCLASS_CODE))
+ {
return TRUE;
}
//
// If vendor id or product id is 0xffff, they will be ignored.
//
- if ((UsbClassDevicePathPtr->VendorId == 0xffff || UsbClassDevicePathPtr->VendorId == DevDesc->IdVendor) &&
- (UsbClassDevicePathPtr->ProductId == 0xffff || UsbClassDevicePathPtr->ProductId == DevDesc->IdProduct)) {
-
+ if (((UsbClassDevicePathPtr->VendorId == 0xffff) || (UsbClassDevicePathPtr->VendorId == DevDesc->IdVendor)) &&
+ ((UsbClassDevicePathPtr->ProductId == 0xffff) || (UsbClassDevicePathPtr->ProductId == DevDesc->IdProduct)))
+ {
//
// If Class in Device Descriptor is set to 0, the counterparts in interface should be checked.
//
if (DevDesc->DeviceClass == 0) {
- if ((UsbClassDevicePathPtr->DeviceClass == ActIfDesc->InterfaceClass ||
- UsbClassDevicePathPtr->DeviceClass == 0xff) &&
- (UsbClassDevicePathPtr->DeviceSubClass == ActIfDesc->InterfaceSubClass ||
- UsbClassDevicePathPtr->DeviceSubClass == 0xff) &&
- (UsbClassDevicePathPtr->DeviceProtocol == ActIfDesc->InterfaceProtocol ||
- UsbClassDevicePathPtr->DeviceProtocol == 0xff)) {
+ if (((UsbClassDevicePathPtr->DeviceClass == ActIfDesc->InterfaceClass) ||
+ (UsbClassDevicePathPtr->DeviceClass == 0xff)) &&
+ ((UsbClassDevicePathPtr->DeviceSubClass == ActIfDesc->InterfaceSubClass) ||
+ (UsbClassDevicePathPtr->DeviceSubClass == 0xff)) &&
+ ((UsbClassDevicePathPtr->DeviceProtocol == ActIfDesc->InterfaceProtocol) ||
+ (UsbClassDevicePathPtr->DeviceProtocol == 0xff)))
+ {
return TRUE;
}
-
- } else if ((UsbClassDevicePathPtr->DeviceClass == DevDesc->DeviceClass ||
- UsbClassDevicePathPtr->DeviceClass == 0xff) &&
- (UsbClassDevicePathPtr->DeviceSubClass == DevDesc->DeviceSubClass ||
- UsbClassDevicePathPtr->DeviceSubClass == 0xff) &&
- (UsbClassDevicePathPtr->DeviceProtocol == DevDesc->DeviceProtocol ||
- UsbClassDevicePathPtr->DeviceProtocol == 0xff)) {
-
+ } else if (((UsbClassDevicePathPtr->DeviceClass == DevDesc->DeviceClass) ||
+ (UsbClassDevicePathPtr->DeviceClass == 0xff)) &&
+ ((UsbClassDevicePathPtr->DeviceSubClass == DevDesc->DeviceSubClass) ||
+ (UsbClassDevicePathPtr->DeviceSubClass == 0xff)) &&
+ ((UsbClassDevicePathPtr->DeviceProtocol == DevDesc->DeviceProtocol) ||
+ (UsbClassDevicePathPtr->DeviceProtocol == 0xff)))
+ {
return TRUE;
}
}
@@ -837,8 +808,8 @@ MatchUsbClass (
**/
BOOLEAN
MatchUsbWwid (
- IN USB_WWID_DEVICE_PATH *UsbWWIDDevicePathPtr,
- IN USB_INTERFACE *UsbIf
+ IN USB_WWID_DEVICE_PATH *UsbWWIDDevicePathPtr,
+ IN USB_INTERFACE *UsbIf
)
{
USB_INTERFACE_DESC *IfDesc;
@@ -851,21 +822,23 @@ MatchUsbWwid (
UINTN Length;
if ((UsbWWIDDevicePathPtr->Header.Type != MESSAGING_DEVICE_PATH) ||
- (UsbWWIDDevicePathPtr->Header.SubType != MSG_USB_WWID_DP )){
+ (UsbWWIDDevicePathPtr->Header.SubType != MSG_USB_WWID_DP))
+ {
ASSERT (0);
return FALSE;
}
- IfDesc = UsbIf->IfDesc;
+ IfDesc = UsbIf->IfDesc;
ASSERT (IfDesc->ActiveIndex < USB_MAX_INTERFACE_SETTING);
- ActIfDesc = &(IfDesc->Settings[IfDesc->ActiveIndex]->Desc);
- DevDesc = &(UsbIf->Device->DevDesc->Desc);
+ ActIfDesc = &(IfDesc->Settings[IfDesc->ActiveIndex]->Desc);
+ DevDesc = &(UsbIf->Device->DevDesc->Desc);
//
// In addition, Hub interface is always matched for this policy.
//
if ((ActIfDesc->InterfaceClass == USB_HUB_CLASS_CODE) &&
- (ActIfDesc->InterfaceSubClass == USB_HUB_SUBCLASS_CODE)) {
+ (ActIfDesc->InterfaceSubClass == USB_HUB_SUBCLASS_CODE))
+ {
return TRUE;
}
@@ -874,7 +847,8 @@ MatchUsbWwid (
//
if ((DevDesc->IdVendor != UsbWWIDDevicePathPtr->VendorId) ||
(DevDesc->IdProduct != UsbWWIDDevicePathPtr->ProductId) ||
- (ActIfDesc->InterfaceNumber != UsbWWIDDevicePathPtr->InterfaceNumber)) {
+ (ActIfDesc->InterfaceNumber != UsbWWIDDevicePathPtr->InterfaceNumber))
+ {
return FALSE;
}
@@ -888,7 +862,7 @@ MatchUsbWwid (
//
// Serial number in USB WWID device path is the last 64-or-less UTF-16 characters.
//
- CompareStr = (CHAR16 *) (UINTN) (UsbWWIDDevicePathPtr + 1);
+ CompareStr = (CHAR16 *)(UINTN)(UsbWWIDDevicePathPtr + 1);
CompareLen = (DevicePathNodeLength (UsbWWIDDevicePathPtr) - sizeof (USB_WWID_DEVICE_PATH)) / sizeof (CHAR16);
if (CompareStr[CompareLen - 1] == L'\0') {
CompareLen--;
@@ -905,7 +879,8 @@ MatchUsbWwid (
Length = (StrDesc->Length - 2) / sizeof (CHAR16);
if ((Length >= CompareLen) &&
- (CompareMem (StrDesc->String + Length - CompareLen, CompareStr, CompareLen * sizeof (CHAR16)) == 0)) {
+ (CompareMem (StrDesc->String + Length - CompareLen, CompareStr, CompareLen * sizeof (CHAR16)) == 0))
+ {
return TRUE;
}
}
@@ -925,11 +900,11 @@ MatchUsbWwid (
EFI_STATUS
EFIAPI
UsbBusFreeUsbDPList (
- IN LIST_ENTRY *UsbIoDPList
+ IN LIST_ENTRY *UsbIoDPList
)
{
- LIST_ENTRY *ListIndex;
- DEVICE_PATH_LIST_ITEM *ListItem;
+ LIST_ENTRY *ListIndex;
+ DEVICE_PATH_LIST_ITEM *ListItem;
//
// Check that ControllerHandle is a valid handle
@@ -939,14 +914,15 @@ UsbBusFreeUsbDPList (
}
ListIndex = UsbIoDPList->ForwardLink;
- while (ListIndex != UsbIoDPList){
- ListItem = CR(ListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
+ while (ListIndex != UsbIoDPList) {
+ ListItem = CR (ListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
//
// Free DEVICE_PATH_LIST_ITEM.DevicePath[]
//
- if (ListItem->DevicePath != NULL){
- FreePool(ListItem->DevicePath);
+ if (ListItem->DevicePath != NULL) {
+ FreePool (ListItem->DevicePath);
}
+
//
// Free DEVICE_PATH_LIST_ITEM itself
//
@@ -973,28 +949,29 @@ UsbBusFreeUsbDPList (
EFI_STATUS
EFIAPI
UsbBusAddWantedUsbIoDP (
- IN EFI_USB_BUS_PROTOCOL *UsbBusId,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_USB_BUS_PROTOCOL *UsbBusId,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- USB_BUS *Bus;
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathPtr;
+ USB_BUS *Bus;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathPtr;
//
// Check whether remaining device path is valid
//
- if (RemainingDevicePath != NULL && !IsDevicePathEnd (RemainingDevicePath)) {
+ if ((RemainingDevicePath != NULL) && !IsDevicePathEnd (RemainingDevicePath)) {
if ((RemainingDevicePath->Type != MESSAGING_DEVICE_PATH) ||
- (RemainingDevicePath->SubType != MSG_USB_DP &&
- RemainingDevicePath->SubType != MSG_USB_CLASS_DP
- && RemainingDevicePath->SubType != MSG_USB_WWID_DP
- )) {
+ ( (RemainingDevicePath->SubType != MSG_USB_DP) &&
+ (RemainingDevicePath->SubType != MSG_USB_CLASS_DP)
+ && (RemainingDevicePath->SubType != MSG_USB_WWID_DP)
+ ))
+ {
return EFI_INVALID_PARAMETER;
}
}
- if (UsbBusId == NULL){
+ if (UsbBusId == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -1008,7 +985,7 @@ UsbBusAddWantedUsbIoDP (
//
Status = UsbBusFreeUsbDPList (&Bus->WantedUsbIoDPList);
ASSERT (!EFI_ERROR (Status));
- DevicePathPtr = DuplicateDevicePath ((EFI_DEVICE_PATH_PROTOCOL *) &mAllUsbClassDevicePath);
+ DevicePathPtr = DuplicateDevicePath ((EFI_DEVICE_PATH_PROTOCOL *)&mAllUsbClassDevicePath);
} else if (!IsDevicePathEnd (RemainingDevicePath)) {
//
// If RemainingDevicePath isn't the End of Device Path Node,
@@ -1043,16 +1020,16 @@ UsbBusAddWantedUsbIoDP (
BOOLEAN
EFIAPI
UsbBusIsWantedUsbIO (
- IN USB_BUS *Bus,
- IN USB_INTERFACE *UsbIf
+ IN USB_BUS *Bus,
+ IN USB_INTERFACE *UsbIf
)
{
- EFI_DEVICE_PATH_PROTOCOL *DevicePathPtr;
- LIST_ENTRY *WantedUsbIoDPListPtr;
- LIST_ENTRY *WantedListIndex;
- DEVICE_PATH_LIST_ITEM *WantedListItem;
- BOOLEAN DoConvert;
- UINTN FirstDevicePathSize;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathPtr;
+ LIST_ENTRY *WantedUsbIoDPListPtr;
+ LIST_ENTRY *WantedListIndex;
+ DEVICE_PATH_LIST_ITEM *WantedListItem;
+ BOOLEAN DoConvert;
+ UINTN FirstDevicePathSize;
//
// Check whether passed in parameters are valid
@@ -1060,6 +1037,7 @@ UsbBusIsWantedUsbIO (
if ((UsbIf == NULL) || (Bus == NULL)) {
return FALSE;
}
+
//
// Check whether UsbIf is Hub
//
@@ -1070,7 +1048,7 @@ UsbBusIsWantedUsbIO (
//
// Check whether all Usb devices in this bus are wanted
//
- if (SearchUsbDPInList ((EFI_DEVICE_PATH_PROTOCOL *)&mAllUsbClassDevicePath, &Bus->WantedUsbIoDPList)){
+ if (SearchUsbDPInList ((EFI_DEVICE_PATH_PROTOCOL *)&mAllUsbClassDevicePath, &Bus->WantedUsbIoDPList)) {
return TRUE;
}
@@ -1084,37 +1062,42 @@ UsbBusIsWantedUsbIO (
DevicePathPtr = GetUsbDPFromFullDP (UsbIf->DevicePath);
ASSERT (DevicePathPtr != NULL);
- DoConvert = FALSE;
+ DoConvert = FALSE;
WantedListIndex = WantedUsbIoDPListPtr->ForwardLink;
- while (WantedListIndex != WantedUsbIoDPListPtr){
- WantedListItem = CR(WantedListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
+ while (WantedListIndex != WantedUsbIoDPListPtr) {
+ WantedListItem = CR (WantedListIndex, DEVICE_PATH_LIST_ITEM, Link, DEVICE_PATH_LIST_ITEM_SIGNATURE);
ASSERT (WantedListItem->DevicePath->Type == MESSAGING_DEVICE_PATH);
switch (WantedListItem->DevicePath->SubType) {
- case MSG_USB_DP:
- FirstDevicePathSize = GetDevicePathSize (WantedListItem->DevicePath);
- if (FirstDevicePathSize == GetDevicePathSize (DevicePathPtr)) {
- if (CompareMem (
- WantedListItem->DevicePath,
- DevicePathPtr,
- GetDevicePathSize (DevicePathPtr)) == 0
- ) {
+ case MSG_USB_DP:
+ FirstDevicePathSize = GetDevicePathSize (WantedListItem->DevicePath);
+ if (FirstDevicePathSize == GetDevicePathSize (DevicePathPtr)) {
+ if (CompareMem (
+ WantedListItem->DevicePath,
+ DevicePathPtr,
+ GetDevicePathSize (DevicePathPtr)
+ ) == 0
+ )
+ {
+ DoConvert = TRUE;
+ }
+ }
+
+ break;
+ case MSG_USB_CLASS_DP:
+ if (MatchUsbClass ((USB_CLASS_DEVICE_PATH *)WantedListItem->DevicePath, UsbIf)) {
DoConvert = TRUE;
}
- }
- break;
- case MSG_USB_CLASS_DP:
- if (MatchUsbClass((USB_CLASS_DEVICE_PATH *)WantedListItem->DevicePath, UsbIf)) {
- DoConvert = TRUE;
- }
- break;
- case MSG_USB_WWID_DP:
- if (MatchUsbWwid((USB_WWID_DEVICE_PATH *)WantedListItem->DevicePath, UsbIf)) {
- DoConvert = TRUE;
- }
- break;
- default:
- ASSERT (0);
- break;
+
+ break;
+ case MSG_USB_WWID_DP:
+ if (MatchUsbWwid ((USB_WWID_DEVICE_PATH *)WantedListItem->DevicePath, UsbIf)) {
+ DoConvert = TRUE;
+ }
+
+ break;
+ default:
+ ASSERT (0);
+ break;
}
if (DoConvert) {
@@ -1123,12 +1106,13 @@ UsbBusIsWantedUsbIO (
WantedListIndex = WantedListIndex->ForwardLink;
}
+
gBS->FreePool (DevicePathPtr);
//
// Check whether the new Usb device path is wanted
//
- if (DoConvert){
+ if (DoConvert) {
return TRUE;
} else {
return FALSE;
@@ -1148,19 +1132,19 @@ UsbBusIsWantedUsbIO (
EFI_STATUS
EFIAPI
UsbBusRecursivelyConnectWantedUsbIo (
- IN EFI_USB_BUS_PROTOCOL *UsbBusId
+ IN EFI_USB_BUS_PROTOCOL *UsbBusId
)
{
- USB_BUS *Bus;
- EFI_STATUS Status;
- UINTN Index;
- EFI_USB_IO_PROTOCOL *UsbIo;
- USB_INTERFACE *UsbIf;
- UINTN UsbIoHandleCount;
- EFI_HANDLE *UsbIoBuffer;
- EFI_DEVICE_PATH_PROTOCOL *UsbIoDevicePath;
-
- if (UsbBusId == NULL){
+ USB_BUS *Bus;
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_INTERFACE *UsbIf;
+ UINTN UsbIoHandleCount;
+ EFI_HANDLE *UsbIoBuffer;
+ EFI_DEVICE_PATH_PROTOCOL *UsbIoDevicePath;
+
+ if (UsbBusId == NULL) {
return EFI_INVALID_PARAMETER;
}
@@ -1170,10 +1154,11 @@ UsbBusRecursivelyConnectWantedUsbIo (
// Get all Usb IO handles in system
//
UsbIoHandleCount = 0;
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiUsbIoProtocolGuid, NULL, &UsbIoHandleCount, &UsbIoBuffer);
- if (Status == EFI_NOT_FOUND || UsbIoHandleCount == 0) {
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiUsbIoProtocolGuid, NULL, &UsbIoHandleCount, &UsbIoBuffer);
+ if ((Status == EFI_NOT_FOUND) || (UsbIoHandleCount == 0)) {
return EFI_SUCCESS;
}
+
ASSERT (!EFI_ERROR (Status));
for (Index = 0; Index < UsbIoHandleCount; Index++) {
@@ -1182,30 +1167,33 @@ UsbBusRecursivelyConnectWantedUsbIo (
// Note: The usb child handle maybe invalid because of hot plugged out during the loop
//
UsbIoDevicePath = NULL;
- Status = gBS->HandleProtocol (UsbIoBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *) &UsbIoDevicePath);
- if (EFI_ERROR (Status) || UsbIoDevicePath == NULL) {
+ Status = gBS->HandleProtocol (UsbIoBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *)&UsbIoDevicePath);
+ if (EFI_ERROR (Status) || (UsbIoDevicePath == NULL)) {
continue;
}
+
if (CompareMem (
- UsbIoDevicePath,
- Bus->DevicePath,
- (GetDevicePathSize (Bus->DevicePath) - sizeof (EFI_DEVICE_PATH_PROTOCOL))
- ) != 0) {
+ UsbIoDevicePath,
+ Bus->DevicePath,
+ (GetDevicePathSize (Bus->DevicePath) - sizeof (EFI_DEVICE_PATH_PROTOCOL))
+ ) != 0)
+ {
continue;
}
//
// Get the child Usb IO interface
//
- Status = gBS->HandleProtocol(
- UsbIoBuffer[Index],
- &gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo
- );
+ Status = gBS->HandleProtocol (
+ UsbIoBuffer[Index],
+ &gEfiUsbIoProtocolGuid,
+ (VOID **)&UsbIo
+ );
if (EFI_ERROR (Status)) {
continue;
}
- UsbIf = USB_INTERFACE_FROM_USBIO (UsbIo);
+
+ UsbIf = USB_INTERFACE_FROM_USBIO (UsbIo);
if (UsbBusIsWantedUsbIO (Bus, UsbIf)) {
if (!UsbIf->IsManaged) {
@@ -1213,9 +1201,9 @@ UsbBusRecursivelyConnectWantedUsbIo (
// Recursively connect the wanted Usb Io handle
//
DEBUG ((DEBUG_INFO, "UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is %d\n", (UINT32)UsbGetCurrentTpl ()));
- Status = gBS->ConnectController (UsbIf->Handle, NULL, NULL, TRUE);
- UsbIf->IsManaged = (BOOLEAN)!EFI_ERROR (Status);
- DEBUG ((DEBUG_INFO, "UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is %d\n", (UINT32)UsbGetCurrentTpl()));
+ Status = gBS->ConnectController (UsbIf->Handle, NULL, NULL, TRUE);
+ UsbIf->IsManaged = (BOOLEAN) !EFI_ERROR (Status);
+ DEBUG ((DEBUG_INFO, "UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is %d\n", (UINT32)UsbGetCurrentTpl ()));
}
}
}
diff --git a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.h b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.h
index 1d2b8a6174..04cf36d3c8 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbUtility.h
@@ -24,13 +24,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
UsbHcGetCapability (
- IN USB_BUS *UsbBus,
- OUT UINT8 *MaxSpeed,
- OUT UINT8 *NumOfPort,
- OUT UINT8 *Is64BitCapable
+ IN USB_BUS *UsbBus,
+ OUT UINT8 *MaxSpeed,
+ OUT UINT8 *NumOfPort,
+ OUT UINT8 *Is64BitCapable
);
-
/**
Get the root hub port state.
@@ -44,9 +43,9 @@ UsbHcGetCapability (
**/
EFI_STATUS
UsbHcGetRootHubPortStatus (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ OUT EFI_USB_PORT_STATUS *PortStatus
);
/**
@@ -62,9 +61,9 @@ UsbHcGetRootHubPortStatus (
**/
EFI_STATUS
UsbHcSetRootHubPortFeature (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ IN EFI_USB_PORT_FEATURE Feature
);
/**
@@ -80,9 +79,9 @@ UsbHcSetRootHubPortFeature (
**/
EFI_STATUS
UsbHcClearRootHubPortFeature (
- IN USB_BUS *UsbBus,
- IN UINT8 PortIndex,
- IN EFI_USB_PORT_FEATURE Feature
+ IN USB_BUS *UsbBus,
+ IN UINT8 PortIndex,
+ IN EFI_USB_PORT_FEATURE Feature
);
/**
@@ -231,7 +230,6 @@ UsbHcSyncInterruptTransfer (
OUT UINT32 *UsbResult
);
-
/**
Open the USB host controller protocol BY_CHILD.
@@ -243,8 +241,8 @@ UsbHcSyncInterruptTransfer (
**/
EFI_STATUS
UsbOpenHostProtoByChild (
- IN USB_BUS *Bus,
- IN EFI_HANDLE Child
+ IN USB_BUS *Bus,
+ IN EFI_HANDLE Child
);
/**
@@ -258,8 +256,8 @@ UsbOpenHostProtoByChild (
**/
VOID
UsbCloseHostProtoByChild (
- IN USB_BUS *Bus,
- IN EFI_HANDLE Child
+ IN USB_BUS *Bus,
+ IN EFI_HANDLE Child
);
/**
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.c b/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.c
index ce6db0b048..df38227eed 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.c
@@ -26,10 +26,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PeiHubGetPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- OUT UINT32 *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ OUT UINT32 *PortStatus
)
{
EFI_USB_DEVICE_REQUEST DeviceRequest;
@@ -42,8 +42,7 @@ PeiHubGetPortStatus (
DeviceRequest.RequestType = USB_HUB_GET_PORT_STATUS_REQ_TYPE;
DeviceRequest.Request = USB_HUB_GET_PORT_STATUS;
DeviceRequest.Index = Port;
- DeviceRequest.Length = (UINT16) sizeof (UINT32);
-
+ DeviceRequest.Length = (UINT16)sizeof (UINT32);
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -54,7 +53,6 @@ PeiHubGetPortStatus (
PortStatus,
sizeof (UINT32)
);
-
}
/**
@@ -72,13 +70,13 @@ PeiHubGetPortStatus (
**/
EFI_STATUS
PeiHubSetPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ IN UINT8 Value
)
{
- EFI_USB_DEVICE_REQUEST DeviceRequest;
+ EFI_USB_DEVICE_REQUEST DeviceRequest;
ZeroMem (&DeviceRequest, sizeof (EFI_USB_DEVICE_REQUEST));
@@ -116,13 +114,13 @@ PeiHubSetPortFeature (
**/
EFI_STATUS
PeiHubClearPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ IN UINT8 Value
)
{
- EFI_USB_DEVICE_REQUEST DeviceRequest;
+ EFI_USB_DEVICE_REQUEST DeviceRequest;
ZeroMem (&DeviceRequest, sizeof (EFI_USB_DEVICE_REQUEST));
@@ -159,9 +157,9 @@ PeiHubClearPortFeature (
**/
EFI_STATUS
PeiHubGetHubStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- OUT UINT32 *HubStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ OUT UINT32 *HubStatus
)
{
EFI_USB_DEVICE_REQUEST DeviceRequest;
@@ -173,7 +171,7 @@ PeiHubGetHubStatus (
//
DeviceRequest.RequestType = USB_HUB_GET_HUB_STATUS_REQ_TYPE;
DeviceRequest.Request = USB_HUB_GET_HUB_STATUS;
- DeviceRequest.Length = (UINT16) sizeof (UINT32);
+ DeviceRequest.Length = (UINT16)sizeof (UINT32);
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -186,8 +184,6 @@ PeiHubGetHubStatus (
);
}
-
-
/**
Clear specified feature on a given hub.
@@ -202,12 +198,12 @@ PeiHubGetHubStatus (
**/
EFI_STATUS
PeiHubClearHubFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Value
)
{
- EFI_USB_DEVICE_REQUEST DeviceRequest;
+ EFI_USB_DEVICE_REQUEST DeviceRequest;
ZeroMem (&DeviceRequest, sizeof (EFI_USB_DEVICE_REQUEST));
@@ -218,15 +214,15 @@ PeiHubClearHubFeature (
DeviceRequest.Request = USB_HUB_CLEAR_FEATURE;
DeviceRequest.Value = Value;
- return UsbIoPpi->UsbControlTransfer (
- PeiServices,
- UsbIoPpi,
- &DeviceRequest,
- EfiUsbNoData,
- PcdGet32 (PcdUsbTransferTimeoutValue),
- NULL,
- 0
- );
+ return UsbIoPpi->UsbControlTransfer (
+ PeiServices,
+ UsbIoPpi,
+ &DeviceRequest,
+ EfiUsbNoData,
+ PcdGet32 (PcdUsbTransferTimeoutValue),
+ NULL,
+ 0
+ );
}
/**
@@ -246,15 +242,15 @@ PeiHubClearHubFeature (
**/
EFI_STATUS
PeiGetHubDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINTN DescriptorSize,
- OUT EFI_USB_HUB_DESCRIPTOR *HubDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINTN DescriptorSize,
+ OUT EFI_USB_HUB_DESCRIPTOR *HubDescriptor
)
{
- EFI_USB_DEVICE_REQUEST DevReq;
- UINT8 DescType;
+ EFI_USB_DEVICE_REQUEST DevReq;
+ UINT8 DescType;
ZeroMem (&DevReq, sizeof (EFI_USB_DEVICE_REQUEST));
@@ -267,18 +263,18 @@ PeiGetHubDescriptor (
//
DevReq.RequestType = USB_RT_HUB | 0x80;
DevReq.Request = USB_HUB_GET_DESCRIPTOR;
- DevReq.Value = (UINT16) (DescType << 8);
- DevReq.Length = (UINT16) DescriptorSize;
-
- return UsbIoPpi->UsbControlTransfer (
- PeiServices,
- UsbIoPpi,
- &DevReq,
- EfiUsbDataIn,
- PcdGet32 (PcdUsbTransferTimeoutValue),
- HubDescriptor,
- (UINT16)DescriptorSize
- );
+ DevReq.Value = (UINT16)(DescType << 8);
+ DevReq.Length = (UINT16)DescriptorSize;
+
+ return UsbIoPpi->UsbControlTransfer (
+ PeiServices,
+ UsbIoPpi,
+ &DevReq,
+ EfiUsbDataIn,
+ PcdGet32 (PcdUsbTransferTimeoutValue),
+ HubDescriptor,
+ (UINT16)DescriptorSize
+ );
}
/**
@@ -299,13 +295,13 @@ PeiGetHubDescriptor (
**/
EFI_STATUS
PeiUsbHubReadDesc (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- OUT EFI_USB_HUB_DESCRIPTOR *HubDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ OUT EFI_USB_HUB_DESCRIPTOR *HubDescriptor
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// First get the hub descriptor length
@@ -335,12 +331,13 @@ PeiUsbHubReadDesc (
**/
EFI_STATUS
PeiUsbHubCtrlSetHubDepth (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN PEI_USB_IO_PPI *UsbIoPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN PEI_USB_IO_PPI *UsbIoPpi
)
{
- EFI_USB_DEVICE_REQUEST DevReq;
+ EFI_USB_DEVICE_REQUEST DevReq;
+
ZeroMem (&DevReq, sizeof (EFI_USB_DEVICE_REQUEST));
//
@@ -351,15 +348,15 @@ PeiUsbHubCtrlSetHubDepth (
DevReq.Value = PeiUsbDevice->Tier;
DevReq.Length = 0;
- return UsbIoPpi->UsbControlTransfer (
- PeiServices,
- UsbIoPpi,
- &DevReq,
- EfiUsbNoData,
- PcdGet32 (PcdUsbTransferTimeoutValue),
- NULL,
- 0
- );
+ return UsbIoPpi->UsbControlTransfer (
+ PeiServices,
+ UsbIoPpi,
+ &DevReq,
+ EfiUsbNoData,
+ PcdGet32 (PcdUsbTransferTimeoutValue),
+ NULL,
+ 0
+ );
}
/**
@@ -374,8 +371,8 @@ PeiUsbHubCtrlSetHubDepth (
**/
EFI_STATUS
PeiDoHubConfig (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice
)
{
UINT8 HubDescBuffer[256];
@@ -391,17 +388,17 @@ PeiDoHubConfig (
// The length field of descriptor is UINT8 type, so the buffer
// with 256 bytes is enough to hold the descriptor data.
//
- HubDescriptor = (EFI_USB_HUB_DESCRIPTOR *) HubDescBuffer;
+ HubDescriptor = (EFI_USB_HUB_DESCRIPTOR *)HubDescBuffer;
//
// Get the hub descriptor
//
Status = PeiUsbHubReadDesc (
- PeiServices,
- PeiUsbDevice,
- UsbIoPpi,
- HubDescriptor
- );
+ PeiServices,
+ PeiUsbDevice,
+ UsbIoPpi,
+ HubDescriptor
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
@@ -421,18 +418,18 @@ PeiDoHubConfig (
//
for (Index = 0; Index < PeiUsbDevice->DownStreamPortNo; Index++) {
Status = PeiHubSetPortFeature (
- PeiServices,
- UsbIoPpi,
- (UINT8) (Index + 1),
- EfiUsbPortPower
- );
+ PeiServices,
+ UsbIoPpi,
+ (UINT8)(Index + 1),
+ EfiUsbPortPower
+ );
if (EFI_ERROR (Status)) {
- DEBUG (( DEBUG_ERROR, "PeiDoHubConfig: PeiHubSetPortFeature EfiUsbPortPower failed %x\n", Index));
+ DEBUG ((DEBUG_ERROR, "PeiDoHubConfig: PeiHubSetPortFeature EfiUsbPortPower failed %x\n", Index));
continue;
}
}
- DEBUG (( DEBUG_INFO, "PeiDoHubConfig: HubDescriptor.PwrOn2PwrGood: 0x%x\n", HubDescriptor->PwrOn2PwrGood));
+ DEBUG ((DEBUG_INFO, "PeiDoHubConfig: HubDescriptor.PwrOn2PwrGood: 0x%x\n", HubDescriptor->PwrOn2PwrGood));
if (HubDescriptor->PwrOn2PwrGood > 0) {
MicroSecondDelay (HubDescriptor->PwrOn2PwrGood * USB_SET_PORT_POWER_STALL);
}
@@ -441,10 +438,10 @@ PeiDoHubConfig (
// Clear Hub Status Change
//
Status = PeiHubGetHubStatus (
- PeiServices,
- UsbIoPpi,
- (UINT32 *) &HubStatus
- );
+ PeiServices,
+ UsbIoPpi,
+ (UINT32 *)&HubStatus
+ );
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
} else {
@@ -458,6 +455,7 @@ PeiDoHubConfig (
C_HUB_LOCAL_POWER
);
}
+
//
// Hub change overcurrent happens
//
@@ -484,14 +482,14 @@ PeiDoHubConfig (
**/
VOID
PeiResetHubPort (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 PortNum
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 PortNum
)
{
- EFI_STATUS Status;
- UINTN Index;
- EFI_USB_PORT_STATUS HubPortStatus;
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_USB_PORT_STATUS HubPortStatus;
MicroSecondDelay (100 * 1000);
@@ -521,7 +519,7 @@ PeiResetHubPort (
PeiServices,
UsbIoPpi,
PortNum,
- (UINT32 *) &HubPortStatus
+ (UINT32 *)&HubPortStatus
);
if (EFI_ERROR (Status)) {
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.h b/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.h
index 2a6d911a06..abf5ba7142 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/HubPeim.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PEI_HUB_PEIM_H_
#define _PEI_HUB_PEIM_H_
-
//
// Hub feature numbers
//
@@ -35,45 +34,45 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Hub Characteristics
//
-#define HUB_CHAR_LPSM 0x0003
-#define HUB_CHAR_COMPOUND 0x0004
-#define HUB_CHAR_OCPM 0x0018
+#define HUB_CHAR_LPSM 0x0003
+#define HUB_CHAR_COMPOUND 0x0004
+#define HUB_CHAR_OCPM 0x0018
//
// Standard hub request and request type
// By [Spec-USB20/Chapter-11.24]
//
-#define USB_HUB_CLEAR_FEATURE 0x01
-#define USB_HUB_CLEAR_FEATURE_REQ_TYPE 0x20
+#define USB_HUB_CLEAR_FEATURE 0x01
+#define USB_HUB_CLEAR_FEATURE_REQ_TYPE 0x20
-#define USB_HUB_CLEAR_FEATURE_PORT 0x01
-#define USB_HUB_CLEAR_FEATURE_PORT_REQ_TYPE 0x23
+#define USB_HUB_CLEAR_FEATURE_PORT 0x01
+#define USB_HUB_CLEAR_FEATURE_PORT_REQ_TYPE 0x23
-#define USB_HUB_GET_BUS_STATE 0x02
-#define USB_HUB_GET_BUS_STATE_REQ_TYPE 0xA3
+#define USB_HUB_GET_BUS_STATE 0x02
+#define USB_HUB_GET_BUS_STATE_REQ_TYPE 0xA3
-#define USB_HUB_GET_DESCRIPTOR 0x06
-#define USB_HUB_GET_DESCRIPTOR_REQ_TYPE 0xA0
+#define USB_HUB_GET_DESCRIPTOR 0x06
+#define USB_HUB_GET_DESCRIPTOR_REQ_TYPE 0xA0
-#define USB_HUB_GET_HUB_STATUS 0x00
-#define USB_HUB_GET_HUB_STATUS_REQ_TYPE 0xA0
+#define USB_HUB_GET_HUB_STATUS 0x00
+#define USB_HUB_GET_HUB_STATUS_REQ_TYPE 0xA0
-#define USB_HUB_GET_PORT_STATUS 0x00
-#define USB_HUB_GET_PORT_STATUS_REQ_TYPE 0xA3
+#define USB_HUB_GET_PORT_STATUS 0x00
+#define USB_HUB_GET_PORT_STATUS_REQ_TYPE 0xA3
-#define USB_HUB_SET_DESCRIPTOR 0x07
-#define USB_HUB_SET_DESCRIPTOR_REQ_TYPE 0x20
+#define USB_HUB_SET_DESCRIPTOR 0x07
+#define USB_HUB_SET_DESCRIPTOR_REQ_TYPE 0x20
-#define USB_HUB_SET_HUB_FEATURE 0x03
-#define USB_HUB_SET_HUB_FEATURE_REQ_TYPE 0x20
+#define USB_HUB_SET_HUB_FEATURE 0x03
+#define USB_HUB_SET_HUB_FEATURE_REQ_TYPE 0x20
-#define USB_HUB_SET_PORT_FEATURE 0x03
-#define USB_HUB_SET_PORT_FEATURE_REQ_TYPE 0x23
+#define USB_HUB_SET_PORT_FEATURE 0x03
+#define USB_HUB_SET_PORT_FEATURE_REQ_TYPE 0x23
-#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE)
-#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER)
+#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE)
+#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER)
-#define USB_HUB_REQ_SET_DEPTH 12
+#define USB_HUB_REQ_SET_DEPTH 12
#define MAXBYTES 8
#pragma pack(1)
@@ -81,21 +80,22 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Hub descriptor, the last two fields are of variable length.
//
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT8 NbrPorts;
- UINT8 HubCharacteristics[2];
- UINT8 PwrOn2PwrGood;
- UINT8 HubContrCurrent;
- UINT8 Filler[MAXBYTES];
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 NbrPorts;
+ UINT8 HubCharacteristics[2];
+ UINT8 PwrOn2PwrGood;
+ UINT8 HubContrCurrent;
+ UINT8 Filler[MAXBYTES];
} EFI_USB_HUB_DESCRIPTOR;
typedef struct {
- UINT16 HubStatus;
- UINT16 HubChangeStatus;
+ UINT16 HubStatus;
+ UINT16 HubChangeStatus;
} EFI_USB_HUB_STATUS;
#pragma pack()
+
/**
Get a given hub port status.
@@ -111,10 +111,10 @@ typedef struct {
**/
EFI_STATUS
PeiHubGetPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- OUT UINT32 *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ OUT UINT32 *PortStatus
);
/**
@@ -132,13 +132,12 @@ PeiHubGetPortStatus (
**/
EFI_STATUS
PeiHubSetPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ IN UINT8 Value
);
-
/**
Get a given hub status.
@@ -153,9 +152,9 @@ PeiHubSetPortFeature (
**/
EFI_STATUS
PeiHubGetHubStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- OUT UINT32 *HubStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ OUT UINT32 *HubStatus
);
/**
@@ -173,10 +172,10 @@ PeiHubGetHubStatus (
**/
EFI_STATUS
PeiHubClearPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Port,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Port,
+ IN UINT8 Value
);
/**
@@ -193,9 +192,9 @@ PeiHubClearPortFeature (
**/
EFI_STATUS
PeiHubClearHubFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 Value
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 Value
);
/**
@@ -234,8 +233,8 @@ PeiGetHubDescriptor (
**/
EFI_STATUS
PeiDoHubConfig (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice
);
/**
@@ -248,11 +247,9 @@ PeiDoHubConfig (
**/
VOID
PeiResetHubPort (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT8 PortNum
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT8 PortNum
);
#endif
-
-
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.c b/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.c
index 1385b0ab59..8cb205e58a 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.c
@@ -28,23 +28,23 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
PeiUsbGetDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT16 Value,
- IN UINT16 Index,
- IN UINT16 DescriptorLength,
- OUT VOID *Descriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT16 Value,
+ IN UINT16 Index,
+ IN UINT16 DescriptorLength,
+ OUT VOID *Descriptor
)
{
EFI_USB_DEVICE_REQUEST DevReq;
ASSERT (UsbIoPpi != NULL);
- DevReq.RequestType = USB_DEV_GET_DESCRIPTOR_REQ_TYPE;
- DevReq.Request = USB_DEV_GET_DESCRIPTOR;
- DevReq.Value = Value;
- DevReq.Index = Index;
- DevReq.Length = DescriptorLength;
+ DevReq.RequestType = USB_DEV_GET_DESCRIPTOR_REQ_TYPE;
+ DevReq.Request = USB_DEV_GET_DESCRIPTOR;
+ DevReq.Value = Value;
+ DevReq.Index = Index;
+ DevReq.Length = DescriptorLength;
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -71,20 +71,20 @@ PeiUsbGetDescriptor (
**/
EFI_STATUS
PeiUsbSetDeviceAddress (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT16 AddressValue
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT16 AddressValue
)
{
EFI_USB_DEVICE_REQUEST DevReq;
ASSERT (UsbIoPpi != NULL);
- DevReq.RequestType = USB_DEV_SET_ADDRESS_REQ_TYPE;
- DevReq.Request = USB_DEV_SET_ADDRESS;
- DevReq.Value = AddressValue;
- DevReq.Index = 0;
- DevReq.Length = 0;
+ DevReq.RequestType = USB_DEV_SET_ADDRESS_REQ_TYPE;
+ DevReq.Request = USB_DEV_SET_ADDRESS;
+ DevReq.Value = AddressValue;
+ DevReq.Index = 0;
+ DevReq.Length = 0;
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -97,8 +97,6 @@ PeiUsbSetDeviceAddress (
);
}
-
-
/**
Configure a usb device to Configuration 1.
@@ -112,16 +110,17 @@ PeiUsbSetDeviceAddress (
**/
EFI_STATUS
PeiUsbSetConfiguration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi
)
{
EFI_USB_DEVICE_REQUEST DevReq;
+
ZeroMem (&DevReq, sizeof (EFI_USB_DEVICE_REQUEST));
- DevReq.RequestType = USB_DEV_SET_CONFIGURATION_REQ_TYPE;
- DevReq.Request = USB_DEV_SET_CONFIGURATION;
- DevReq.Value = 1;
+ DevReq.RequestType = USB_DEV_SET_CONFIGURATION_REQ_TYPE;
+ DevReq.Request = USB_DEV_SET_CONFIGURATION;
+ DevReq.Value = 1;
return UsbIoPpi->UsbControlTransfer (
PeiServices,
@@ -168,12 +167,12 @@ IsPortConnect (
**/
UINTN
PeiUsbGetDeviceSpeed (
- IN UINT16 PortStatus
+ IN UINT16 PortStatus
)
{
if ((PortStatus & USB_PORT_STAT_LOW_SPEED) != 0) {
return EFI_USB_SPEED_LOW;
- } else if ((PortStatus & USB_PORT_STAT_HIGH_SPEED) != 0){
+ } else if ((PortStatus & USB_PORT_STAT_HIGH_SPEED) != 0) {
return EFI_USB_SPEED_HIGH;
} else if ((PortStatus & USB_PORT_STAT_SUPER_SPEED) != 0) {
return EFI_USB_SPEED_SUPER;
@@ -181,5 +180,3 @@ PeiUsbGetDeviceSpeed (
return EFI_USB_SPEED_FULL;
}
}
-
-
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.h b/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.h
index 48b8e594b2..23f531e8bc 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/PeiUsbLib.h
@@ -10,34 +10,33 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PEI_USB_LIB_H_
#define _PEI_USB_LIB_H_
-
//
// Standard device request and request type
// By [Spec-USB20/Chapter-9.4]
//
-#define USB_DEV_GET_STATUS 0x00
-#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
-#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
-#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
+#define USB_DEV_GET_STATUS 0x00
+#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
+#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
+#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
-#define USB_DEV_CLEAR_FEATURE 0x01
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_CLEAR_FEATURE 0x01
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_FEATURE 0x03
-#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_SET_FEATURE 0x03
+#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_ADDRESS 0x05
-#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
+#define USB_DEV_SET_ADDRESS 0x05
+#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
-#define USB_DEV_GET_DESCRIPTOR 0x06
-#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
+#define USB_DEV_GET_DESCRIPTOR 0x06
+#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
-#define USB_DEV_SET_DESCRIPTOR 0x07
-#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
+#define USB_DEV_SET_DESCRIPTOR 0x07
+#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
#define USB_DEV_GET_CONFIGURATION 0x08
#define USB_DEV_GET_CONFIGURATION_REQ_TYPE 0x80
@@ -45,42 +44,42 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_DEV_SET_CONFIGURATION 0x09
#define USB_DEV_SET_CONFIGURATION_REQ_TYPE 0x00
-#define USB_DEV_GET_INTERFACE 0x0A
-#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
+#define USB_DEV_GET_INTERFACE 0x0A
+#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
-#define USB_DEV_SET_INTERFACE 0x0B
-#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+#define USB_DEV_SET_INTERFACE 0x0B
+#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
-#define USB_DEV_SYNCH_FRAME 0x0C
-#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
+#define USB_DEV_SYNCH_FRAME 0x0C
+#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
//
// USB Descriptor types
//
-#define USB_DT_DEVICE 0x01
-#define USB_DT_CONFIG 0x02
-#define USB_DT_STRING 0x03
-#define USB_DT_INTERFACE 0x04
-#define USB_DT_ENDPOINT 0x05
-#define USB_DT_HUB 0x29
-#define USB_DT_SUPERSPEED_HUB 0x2A
-#define USB_DT_HID 0x21
+#define USB_DT_DEVICE 0x01
+#define USB_DT_CONFIG 0x02
+#define USB_DT_STRING 0x03
+#define USB_DT_INTERFACE 0x04
+#define USB_DT_ENDPOINT 0x05
+#define USB_DT_HUB 0x29
+#define USB_DT_SUPERSPEED_HUB 0x2A
+#define USB_DT_HID 0x21
//
// USB request type
//
-#define USB_TYPE_STANDARD (0x00 << 5)
-#define USB_TYPE_CLASS (0x01 << 5)
-#define USB_TYPE_VENDOR (0x02 << 5)
-#define USB_TYPE_RESERVED (0x03 << 5)
+#define USB_TYPE_STANDARD (0x00 << 5)
+#define USB_TYPE_CLASS (0x01 << 5)
+#define USB_TYPE_VENDOR (0x02 << 5)
+#define USB_TYPE_RESERVED (0x03 << 5)
//
// USB request targer device
//
-#define USB_RECIP_DEVICE 0x00
-#define USB_RECIP_INTERFACE 0x01
-#define USB_RECIP_ENDPOINT 0x02
-#define USB_RECIP_OTHER 0x03
+#define USB_RECIP_DEVICE 0x00
+#define USB_RECIP_INTERFACE 0x01
+#define USB_RECIP_ENDPOINT 0x02
+#define USB_RECIP_OTHER 0x03
typedef enum {
EfiUsbEndpointHalt,
@@ -114,12 +113,12 @@ typedef enum {
**/
EFI_STATUS
PeiUsbGetDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT16 Value,
- IN UINT16 Index,
- IN UINT16 DescriptorLength,
- OUT VOID *Descriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT16 Value,
+ IN UINT16 Index,
+ IN UINT16 DescriptorLength,
+ OUT VOID *Descriptor
);
/**
@@ -136,12 +135,11 @@ PeiUsbGetDescriptor (
**/
EFI_STATUS
PeiUsbSetDeviceAddress (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi,
- IN UINT16 AddressValue
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi,
+ IN UINT16 AddressValue
);
-
/**
Configure a usb device to Configuration 1.
@@ -155,8 +153,8 @@ PeiUsbSetDeviceAddress (
**/
EFI_STATUS
PeiUsbSetConfiguration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *UsbIoPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *UsbIoPpi
);
/**
@@ -183,7 +181,7 @@ IsPortConnect (
**/
UINTN
PeiUsbGetDeviceSpeed (
- IN UINT16 PortStatus
+ IN UINT16 PortStatus
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbIoPeim.c b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbIoPeim.c
index 4b292b7feb..c4283521ff 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbIoPeim.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbIoPeim.c
@@ -33,29 +33,30 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_STATUS
EFIAPI
PeiUsbControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT32 Timeout,
- IN OUT VOID *Data OPTIONAL,
- IN UINTN DataLength OPTIONAL
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT32 Timeout,
+ IN OUT VOID *Data OPTIONAL,
+ IN UINTN DataLength OPTIONAL
)
{
- EFI_STATUS Status;
- PEI_USB_DEVICE *PeiUsbDev;
- UINT32 TransferResult;
- EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor;
- UINT8 EndpointIndex;
+ EFI_STATUS Status;
+ PEI_USB_DEVICE *PeiUsbDev;
+ UINT32 TransferResult;
+ EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor;
+ UINT8 EndpointIndex;
PeiUsbDev = PEI_USB_DEVICE_FROM_THIS (This);
EndpointDescriptor = NULL;
- EndpointIndex = 0;
+ EndpointIndex = 0;
if ((Request->Request == USB_REQ_CLEAR_FEATURE) &&
(Request->RequestType == USB_DEV_CLEAR_FEATURE_REQ_TYPE_E) &&
- (Request->Value == USB_FEATURE_ENDPOINT_HALT)) {
+ (Request->Value == USB_FEATURE_ENDPOINT_HALT))
+ {
//
// Request->Index is the Endpoint Address, use it to get the Endpoint Index.
//
@@ -79,33 +80,33 @@ PeiUsbControlTransfer (
if (PeiUsbDev->Usb2HcPpi != NULL) {
Status = PeiUsbDev->Usb2HcPpi->ControlTransfer (
- PeiServices,
- PeiUsbDev->Usb2HcPpi,
- PeiUsbDev->DeviceAddress,
- PeiUsbDev->DeviceSpeed,
- PeiUsbDev->MaxPacketSize0,
- Request,
- Direction,
- Data,
- &DataLength,
- Timeout,
- &(PeiUsbDev->Translator),
- &TransferResult
- );
+ PeiServices,
+ PeiUsbDev->Usb2HcPpi,
+ PeiUsbDev->DeviceAddress,
+ PeiUsbDev->DeviceSpeed,
+ PeiUsbDev->MaxPacketSize0,
+ Request,
+ Direction,
+ Data,
+ &DataLength,
+ Timeout,
+ &(PeiUsbDev->Translator),
+ &TransferResult
+ );
} else {
Status = PeiUsbDev->UsbHcPpi->ControlTransfer (
- PeiServices,
- PeiUsbDev->UsbHcPpi,
- PeiUsbDev->DeviceAddress,
- PeiUsbDev->DeviceSpeed,
- (UINT8) PeiUsbDev->MaxPacketSize0,
- Request,
- Direction,
- Data,
- &DataLength,
- Timeout,
- &TransferResult
- );
+ PeiServices,
+ PeiUsbDev->UsbHcPpi,
+ PeiUsbDev->DeviceAddress,
+ PeiUsbDev->DeviceSpeed,
+ (UINT8)PeiUsbDev->MaxPacketSize0,
+ Request,
+ Direction,
+ Data,
+ &DataLength,
+ Timeout,
+ &TransferResult
+ );
}
//
@@ -113,9 +114,10 @@ PeiUsbControlTransfer (
//
if ((Request->Request == USB_REQ_CLEAR_FEATURE) &&
(Request->RequestType == USB_DEV_CLEAR_FEATURE_REQ_TYPE_E) &&
- (Request->Value == USB_FEATURE_ENDPOINT_HALT)) {
+ (Request->Value == USB_FEATURE_ENDPOINT_HALT))
+ {
if ((PeiUsbDev->DataToggle & (1 << EndpointIndex)) != 0) {
- PeiUsbDev->DataToggle = (UINT16) (PeiUsbDev->DataToggle ^ (1 << EndpointIndex));
+ PeiUsbDev->DataToggle = (UINT16)(PeiUsbDev->DataToggle ^ (1 << EndpointIndex));
}
}
@@ -147,30 +149,30 @@ PeiUsbControlTransfer (
EFI_STATUS
EFIAPI
PeiUsbBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN UINT8 DeviceEndpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout
)
{
- EFI_STATUS Status;
- PEI_USB_DEVICE *PeiUsbDev;
- UINT32 TransferResult;
- UINTN MaxPacketLength;
- UINT8 DataToggle;
- UINT8 OldToggle;
- EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor;
- UINT8 EndpointIndex;
- VOID *Data2[EFI_USB_MAX_BULK_BUFFER_NUM];
-
- PeiUsbDev = PEI_USB_DEVICE_FROM_THIS (This);
+ EFI_STATUS Status;
+ PEI_USB_DEVICE *PeiUsbDev;
+ UINT32 TransferResult;
+ UINTN MaxPacketLength;
+ UINT8 DataToggle;
+ UINT8 OldToggle;
+ EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor;
+ UINT8 EndpointIndex;
+ VOID *Data2[EFI_USB_MAX_BULK_BUFFER_NUM];
+
+ PeiUsbDev = PEI_USB_DEVICE_FROM_THIS (This);
EndpointDescriptor = NULL;
- EndpointIndex = 0;
- Data2[0] = Data;
- Data2[1] = NULL;
+ EndpointIndex = 0;
+ Data2[0] = Data;
+ Data2[1] = NULL;
while (EndpointIndex < MAX_ENDPOINT) {
Status = PeiUsbGetEndpointDescriptor (PeiServices, This, EndpointIndex, &EndpointDescriptor);
@@ -200,36 +202,36 @@ PeiUsbBulkTransfer (
if (PeiUsbDev->Usb2HcPpi != NULL) {
Status = PeiUsbDev->Usb2HcPpi->BulkTransfer (
- PeiServices,
- PeiUsbDev->Usb2HcPpi,
- PeiUsbDev->DeviceAddress,
- DeviceEndpoint,
- PeiUsbDev->DeviceSpeed,
- MaxPacketLength,
- Data2,
- DataLength,
- &DataToggle,
- Timeout,
- &(PeiUsbDev->Translator),
- &TransferResult
- );
+ PeiServices,
+ PeiUsbDev->Usb2HcPpi,
+ PeiUsbDev->DeviceAddress,
+ DeviceEndpoint,
+ PeiUsbDev->DeviceSpeed,
+ MaxPacketLength,
+ Data2,
+ DataLength,
+ &DataToggle,
+ Timeout,
+ &(PeiUsbDev->Translator),
+ &TransferResult
+ );
} else {
Status = PeiUsbDev->UsbHcPpi->BulkTransfer (
- PeiServices,
- PeiUsbDev->UsbHcPpi,
- PeiUsbDev->DeviceAddress,
- DeviceEndpoint,
- (UINT8) MaxPacketLength,
- Data,
- DataLength,
- &DataToggle,
- Timeout,
- &TransferResult
- );
+ PeiServices,
+ PeiUsbDev->UsbHcPpi,
+ PeiUsbDev->DeviceAddress,
+ DeviceEndpoint,
+ (UINT8)MaxPacketLength,
+ Data,
+ DataLength,
+ &DataToggle,
+ Timeout,
+ &TransferResult
+ );
}
if (OldToggle != DataToggle) {
- PeiUsbDev->DataToggle = (UINT16) (PeiUsbDev->DataToggle ^ (1 << EndpointIndex));
+ PeiUsbDev->DataToggle = (UINT16)(PeiUsbDev->DataToggle ^ (1 << EndpointIndex));
}
DEBUG ((DEBUG_INFO, "PeiUsbBulkTransfer: %r\n", Status));
@@ -250,14 +252,15 @@ PeiUsbBulkTransfer (
EFI_STATUS
EFIAPI
PeiUsbGetInterfaceDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- OUT EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ OUT EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor
)
{
PEI_USB_DEVICE *PeiUsbDev;
- PeiUsbDev = PEI_USB_DEVICE_FROM_THIS (This);
- *InterfaceDescriptor = PeiUsbDev->InterfaceDesc;
+
+ PeiUsbDev = PEI_USB_DEVICE_FROM_THIS (This);
+ *InterfaceDescriptor = PeiUsbDev->InterfaceDesc;
return EFI_SUCCESS;
}
@@ -276,10 +279,10 @@ PeiUsbGetInterfaceDescriptor (
EFI_STATUS
EFIAPI
PeiUsbGetEndpointDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN UINT8 EndpointIndex,
- OUT EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 EndpointIndex,
+ OUT EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor
)
{
PEI_USB_DEVICE *PeiUsbDev;
@@ -317,8 +320,8 @@ PeiUsbGetEndpointDescriptor (
EFI_STATUS
EFIAPI
PeiUsbPortReset (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This
)
{
PEI_USB_DEVICE *PeiUsbDev;
@@ -338,14 +341,14 @@ PeiUsbPortReset (
//
// Set address
//
- Address = PeiUsbDev->DeviceAddress;
- PeiUsbDev->DeviceAddress = 0;
+ Address = PeiUsbDev->DeviceAddress;
+ PeiUsbDev->DeviceAddress = 0;
Status = PeiUsbSetDeviceAddress (
- PeiServices,
- This,
- Address
- );
+ PeiServices,
+ This,
+ Address
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -357,9 +360,9 @@ PeiUsbPortReset (
// Set default configuration
//
Status = PeiUsbSetConfiguration (
- PeiServices,
- This
- );
+ PeiServices,
+ This
+ );
return Status;
}
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c
index 12dc975e88..6ea4495162 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c
@@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// UsbIo PPI interface function
//
-PEI_USB_IO_PPI mUsbIoPpi = {
+PEI_USB_IO_PPI mUsbIoPpi = {
PeiUsbControlTransfer,
PeiUsbBulkTransfer,
PeiUsbGetInterfaceDescriptor,
@@ -22,7 +22,7 @@ PEI_USB_IO_PPI mUsbIoPpi = {
PeiUsbPortReset
};
-EFI_PEI_PPI_DESCRIPTOR mUsbIoPpiList = {
+EFI_PEI_PPI_DESCRIPTOR mUsbIoPpiList = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gPeiUsbIoPpiGuid,
NULL
@@ -42,9 +42,9 @@ EFI_PEI_PPI_DESCRIPTOR mUsbIoPpiList = {
**/
EFI_STATUS
PeiUsbEnumeration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
- IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi
);
/**
@@ -62,10 +62,10 @@ PeiUsbEnumeration (
**/
EFI_STATUS
PeiConfigureUsbDevice (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN UINT8 Port,
- IN OUT UINT8 *DeviceAddress
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN UINT8 Port,
+ IN OUT UINT8 *DeviceAddress
);
/**
@@ -81,8 +81,8 @@ PeiConfigureUsbDevice (
**/
EFI_STATUS
PeiUsbGetAllConfiguration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice
);
/**
@@ -100,11 +100,11 @@ PeiUsbGetAllConfiguration (
**/
EFI_STATUS
GetExpectedDescriptor (
- IN UINT8 *Buffer,
- IN UINTN Length,
- IN UINT8 DescType,
- IN UINT8 DescLength,
- OUT UINTN *ParsedBytes
+ IN UINT8 *Buffer,
+ IN UINTN Length,
+ IN UINT8 DescType,
+ IN UINT8 DescLength,
+ OUT UINTN *ParsedBytes
);
/**
@@ -121,14 +121,14 @@ GetExpectedDescriptor (
EFI_STATUS
EFIAPI
PeimInitializeUsb (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- UINTN Index;
- PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi;
- PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi;
+ EFI_STATUS Status;
+ UINTN Index;
+ PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi;
+ PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi;
if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {
return EFI_SUCCESS;
@@ -147,7 +147,7 @@ PeimInitializeUsb (
&gPeiUsbHostControllerPpiGuid,
Index,
NULL,
- (VOID **) &UsbHcPpi
+ (VOID **)&UsbHcPpi
);
if (EFI_ERROR (Status)) {
//
@@ -155,7 +155,8 @@ PeimInitializeUsb (
//
break;
}
- PeiUsbEnumeration ((EFI_PEI_SERVICES **) PeiServices, UsbHcPpi, NULL);
+
+ PeiUsbEnumeration ((EFI_PEI_SERVICES **)PeiServices, UsbHcPpi, NULL);
Index++;
}
@@ -168,7 +169,7 @@ PeimInitializeUsb (
&gPeiUsb2HostControllerPpiGuid,
Index,
NULL,
- (VOID **) &Usb2HcPpi
+ (VOID **)&Usb2HcPpi
);
if (EFI_ERROR (Status)) {
//
@@ -176,7 +177,8 @@ PeimInitializeUsb (
//
break;
}
- PeiUsbEnumeration ((EFI_PEI_SERVICES **) PeiServices, NULL, Usb2HcPpi);
+
+ PeiUsbEnumeration ((EFI_PEI_SERVICES **)PeiServices, NULL, Usb2HcPpi);
Index++;
}
}
@@ -203,9 +205,9 @@ PeimInitializeUsb (
**/
EFI_STATUS
PeiHubEnumeration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN UINT8 *CurrentAddress
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN UINT8 *CurrentAddress
)
{
UINTN Index;
@@ -218,19 +220,17 @@ PeiHubEnumeration (
UINTN InterfaceIndex;
UINTN EndpointIndex;
-
- UsbIoPpi = &PeiUsbDevice->UsbIoPpi;
+ UsbIoPpi = &PeiUsbDevice->UsbIoPpi;
DEBUG ((DEBUG_INFO, "PeiHubEnumeration: DownStreamPortNo: %x\n", PeiUsbDevice->DownStreamPortNo));
for (Index = 0; Index < PeiUsbDevice->DownStreamPortNo; Index++) {
-
Status = PeiHubGetPortStatus (
- PeiServices,
- UsbIoPpi,
- (UINT8) (Index + 1),
- (UINT32 *) &PortStatus
- );
+ PeiServices,
+ UsbIoPpi,
+ (UINT8)(Index + 1),
+ (UINT32 *)&PortStatus
+ );
if (EFI_ERROR (Status)) {
continue;
@@ -248,22 +248,22 @@ PeiHubEnumeration (
// Begin to deal with the new device
//
MemPages = sizeof (PEI_USB_DEVICE) / EFI_PAGE_SIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &AllocateAddress
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &AllocateAddress
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- NewPeiUsbDevice = (PEI_USB_DEVICE *) ((UINTN) AllocateAddress);
+ NewPeiUsbDevice = (PEI_USB_DEVICE *)((UINTN)AllocateAddress);
ZeroMem (NewPeiUsbDevice, sizeof (PEI_USB_DEVICE));
- NewPeiUsbDevice->Signature = PEI_USB_DEVICE_SIGNATURE;
- NewPeiUsbDevice->DeviceAddress = 0;
- NewPeiUsbDevice->MaxPacketSize0 = 8;
- NewPeiUsbDevice->DataToggle = 0;
+ NewPeiUsbDevice->Signature = PEI_USB_DEVICE_SIGNATURE;
+ NewPeiUsbDevice->DeviceAddress = 0;
+ NewPeiUsbDevice->MaxPacketSize0 = 8;
+ NewPeiUsbDevice->DataToggle = 0;
CopyMem (
&(NewPeiUsbDevice->UsbIoPpi),
&mUsbIoPpi,
@@ -275,39 +275,40 @@ PeiHubEnumeration (
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
NewPeiUsbDevice->UsbIoPpiList.Ppi = &NewPeiUsbDevice->UsbIoPpi;
- NewPeiUsbDevice->AllocateAddress = (UINTN) AllocateAddress;
+ NewPeiUsbDevice->AllocateAddress = (UINTN)AllocateAddress;
NewPeiUsbDevice->UsbHcPpi = PeiUsbDevice->UsbHcPpi;
NewPeiUsbDevice->Usb2HcPpi = PeiUsbDevice->Usb2HcPpi;
- NewPeiUsbDevice->Tier = (UINT8) (PeiUsbDevice->Tier + 1);
+ NewPeiUsbDevice->Tier = (UINT8)(PeiUsbDevice->Tier + 1);
NewPeiUsbDevice->IsHub = 0x0;
NewPeiUsbDevice->DownStreamPortNo = 0x0;
if (((PortStatus.PortChangeStatus & USB_PORT_STAT_C_RESET) == 0) ||
- ((PortStatus.PortStatus & (USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE)) == 0)) {
+ ((PortStatus.PortStatus & (USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE)) == 0))
+ {
//
// If the port already has reset change flag and is connected and enabled, skip the port reset logic.
//
PeiResetHubPort (PeiServices, UsbIoPpi, (UINT8)(Index + 1));
PeiHubGetPortStatus (
- PeiServices,
- UsbIoPpi,
- (UINT8) (Index + 1),
- (UINT32 *) &PortStatus
- );
+ PeiServices,
+ UsbIoPpi,
+ (UINT8)(Index + 1),
+ (UINT32 *)&PortStatus
+ );
} else {
PeiHubClearPortFeature (
PeiServices,
UsbIoPpi,
- (UINT8) (Index + 1),
+ (UINT8)(Index + 1),
EfiUsbPortResetChange
);
}
- NewPeiUsbDevice->DeviceSpeed = (UINT8) PeiUsbGetDeviceSpeed (PortStatus.PortStatus);
+ NewPeiUsbDevice->DeviceSpeed = (UINT8)PeiUsbGetDeviceSpeed (PortStatus.PortStatus);
DEBUG ((DEBUG_INFO, "Device Speed =%d\n", PeiUsbDevice->DeviceSpeed));
- if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_SUPER_SPEED)){
+ if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_SUPER_SPEED)) {
NewPeiUsbDevice->MaxPacketSize0 = 512;
} else if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_HIGH_SPEED)) {
NewPeiUsbDevice->MaxPacketSize0 = 64;
@@ -317,12 +318,12 @@ PeiHubEnumeration (
NewPeiUsbDevice->MaxPacketSize0 = 8;
}
- if(NewPeiUsbDevice->DeviceSpeed != EFI_USB_SPEED_HIGH) {
+ if (NewPeiUsbDevice->DeviceSpeed != EFI_USB_SPEED_HIGH) {
if (PeiUsbDevice->DeviceSpeed == EFI_USB_SPEED_HIGH) {
NewPeiUsbDevice->Translator.TranslatorPortNumber = (UINT8)Index;
NewPeiUsbDevice->Translator.TranslatorHubAddress = *CurrentAddress;
} else {
- CopyMem(&(NewPeiUsbDevice->Translator), &(PeiUsbDevice->Translator), sizeof(EFI_USB2_HC_TRANSACTION_TRANSLATOR));
+ CopyMem (&(NewPeiUsbDevice->Translator), &(PeiUsbDevice->Translator), sizeof (EFI_USB2_HC_TRANSACTION_TRANSLATOR));
}
}
@@ -330,21 +331,22 @@ PeiHubEnumeration (
// Configure that Usb Device
//
Status = PeiConfigureUsbDevice (
- PeiServices,
- NewPeiUsbDevice,
- (UINT8) (Index + 1),
- CurrentAddress
- );
+ PeiServices,
+ NewPeiUsbDevice,
+ (UINT8)(Index + 1),
+ CurrentAddress
+ );
if (EFI_ERROR (Status)) {
continue;
}
+
DEBUG ((DEBUG_INFO, "PeiHubEnumeration: PeiConfigureUsbDevice Success\n"));
Status = PeiServicesInstallPpi (&NewPeiUsbDevice->UsbIoPpiList);
if (NewPeiUsbDevice->InterfaceDesc->InterfaceClass == 0x09) {
- NewPeiUsbDevice->IsHub = 0x1;
+ NewPeiUsbDevice->IsHub = 0x1;
Status = PeiDoHubConfig (PeiServices, NewPeiUsbDevice);
if (EFI_ERROR (Status)) {
@@ -359,19 +361,20 @@ PeiHubEnumeration (
// Begin to deal with the new device
//
MemPages = sizeof (PEI_USB_DEVICE) / EFI_PAGE_SIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &AllocateAddress
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &AllocateAddress
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
CopyMem ((VOID *)(UINTN)AllocateAddress, NewPeiUsbDevice, sizeof (PEI_USB_DEVICE));
- NewPeiUsbDevice = (PEI_USB_DEVICE *) ((UINTN) AllocateAddress);
- NewPeiUsbDevice->AllocateAddress = (UINTN) AllocateAddress;
+ NewPeiUsbDevice = (PEI_USB_DEVICE *)((UINTN)AllocateAddress);
+ NewPeiUsbDevice->AllocateAddress = (UINTN)AllocateAddress;
NewPeiUsbDevice->UsbIoPpiList.Ppi = &NewPeiUsbDevice->UsbIoPpi;
- NewPeiUsbDevice->InterfaceDesc = NewPeiUsbDevice->InterfaceDescList[InterfaceIndex];
+ NewPeiUsbDevice->InterfaceDesc = NewPeiUsbDevice->InterfaceDescList[InterfaceIndex];
for (EndpointIndex = 0; EndpointIndex < NewPeiUsbDevice->InterfaceDesc->NumEndpoints; EndpointIndex++) {
NewPeiUsbDevice->EndpointDesc[EndpointIndex] = NewPeiUsbDevice->EndpointDescList[InterfaceIndex][EndpointIndex];
}
@@ -379,7 +382,7 @@ PeiHubEnumeration (
Status = PeiServicesInstallPpi (&NewPeiUsbDevice->UsbIoPpiList);
if (NewPeiUsbDevice->InterfaceDesc->InterfaceClass == 0x09) {
- NewPeiUsbDevice->IsHub = 0x1;
+ NewPeiUsbDevice->IsHub = 0x1;
Status = PeiDoHubConfig (PeiServices, NewPeiUsbDevice);
if (EFI_ERROR (Status)) {
@@ -393,7 +396,6 @@ PeiHubEnumeration (
}
}
-
return EFI_SUCCESS;
}
@@ -411,9 +413,9 @@ PeiHubEnumeration (
**/
EFI_STATUS
PeiUsbEnumeration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
- IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi
)
{
UINT8 NumOfRootPort;
@@ -430,15 +432,15 @@ PeiUsbEnumeration (
CurrentAddress = 0;
if (Usb2HcPpi != NULL) {
Usb2HcPpi->GetRootHubPortNumber (
- PeiServices,
- Usb2HcPpi,
- (UINT8 *) &NumOfRootPort
- );
+ PeiServices,
+ Usb2HcPpi,
+ (UINT8 *)&NumOfRootPort
+ );
} else if (UsbHcPpi != NULL) {
UsbHcPpi->GetRootHubPortNumber (
PeiServices,
UsbHcPpi,
- (UINT8 *) &NumOfRootPort
+ (UINT8 *)&NumOfRootPort
);
} else {
ASSERT (FALSE);
@@ -453,19 +455,20 @@ PeiUsbEnumeration (
//
if (Usb2HcPpi != NULL) {
Usb2HcPpi->GetRootHubPortStatus (
- PeiServices,
- Usb2HcPpi,
- (UINT8) Index,
- &PortStatus
- );
+ PeiServices,
+ Usb2HcPpi,
+ (UINT8)Index,
+ &PortStatus
+ );
} else {
UsbHcPpi->GetRootHubPortStatus (
PeiServices,
UsbHcPpi,
- (UINT8) Index,
+ (UINT8)Index,
&PortStatus
);
}
+
DEBUG ((DEBUG_INFO, "USB Status --- Port: %x ConnectChange[%04x] Status[%04x]\n", Index, PortStatus.PortChangeStatus, PortStatus.PortStatus));
//
// Only handle connection/enable/overcurrent/reset change.
@@ -475,22 +478,22 @@ PeiUsbEnumeration (
} else {
if (IsPortConnect (PortStatus.PortStatus)) {
MemPages = sizeof (PEI_USB_DEVICE) / EFI_PAGE_SIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &AllocateAddress
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &AllocateAddress
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- PeiUsbDevice = (PEI_USB_DEVICE *) ((UINTN) AllocateAddress);
+ PeiUsbDevice = (PEI_USB_DEVICE *)((UINTN)AllocateAddress);
ZeroMem (PeiUsbDevice, sizeof (PEI_USB_DEVICE));
- PeiUsbDevice->Signature = PEI_USB_DEVICE_SIGNATURE;
- PeiUsbDevice->DeviceAddress = 0;
- PeiUsbDevice->MaxPacketSize0 = 8;
- PeiUsbDevice->DataToggle = 0;
+ PeiUsbDevice->Signature = PEI_USB_DEVICE_SIGNATURE;
+ PeiUsbDevice->DeviceAddress = 0;
+ PeiUsbDevice->MaxPacketSize0 = 8;
+ PeiUsbDevice->DataToggle = 0;
CopyMem (
&(PeiUsbDevice->UsbIoPpi),
&mUsbIoPpi,
@@ -501,15 +504,16 @@ PeiUsbEnumeration (
&mUsbIoPpiList,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- PeiUsbDevice->UsbIoPpiList.Ppi = &PeiUsbDevice->UsbIoPpi;
- PeiUsbDevice->AllocateAddress = (UINTN) AllocateAddress;
- PeiUsbDevice->UsbHcPpi = UsbHcPpi;
- PeiUsbDevice->Usb2HcPpi = Usb2HcPpi;
- PeiUsbDevice->IsHub = 0x0;
- PeiUsbDevice->DownStreamPortNo = 0x0;
+ PeiUsbDevice->UsbIoPpiList.Ppi = &PeiUsbDevice->UsbIoPpi;
+ PeiUsbDevice->AllocateAddress = (UINTN)AllocateAddress;
+ PeiUsbDevice->UsbHcPpi = UsbHcPpi;
+ PeiUsbDevice->Usb2HcPpi = Usb2HcPpi;
+ PeiUsbDevice->IsHub = 0x0;
+ PeiUsbDevice->DownStreamPortNo = 0x0;
if (((PortStatus.PortChangeStatus & USB_PORT_STAT_C_RESET) == 0) ||
- ((PortStatus.PortStatus & (USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE)) == 0)) {
+ ((PortStatus.PortStatus & (USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE)) == 0))
+ {
//
// If the port already has reset change flag and is connected and enabled, skip the port reset logic.
//
@@ -525,39 +529,39 @@ PeiUsbEnumeration (
Usb2HcPpi->GetRootHubPortStatus (
PeiServices,
Usb2HcPpi,
- (UINT8) Index,
+ (UINT8)Index,
&PortStatus
);
} else {
UsbHcPpi->GetRootHubPortStatus (
PeiServices,
UsbHcPpi,
- (UINT8) Index,
+ (UINT8)Index,
&PortStatus
);
}
} else {
if (Usb2HcPpi != NULL) {
Usb2HcPpi->ClearRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- (UINT8) Index,
- EfiUsbPortResetChange
- );
+ PeiServices,
+ Usb2HcPpi,
+ (UINT8)Index,
+ EfiUsbPortResetChange
+ );
} else {
UsbHcPpi->ClearRootHubPortFeature (
PeiServices,
UsbHcPpi,
- (UINT8) Index,
+ (UINT8)Index,
EfiUsbPortResetChange
);
}
}
- PeiUsbDevice->DeviceSpeed = (UINT8) PeiUsbGetDeviceSpeed (PortStatus.PortStatus);
+ PeiUsbDevice->DeviceSpeed = (UINT8)PeiUsbGetDeviceSpeed (PortStatus.PortStatus);
DEBUG ((DEBUG_INFO, "Device Speed =%d\n", PeiUsbDevice->DeviceSpeed));
- if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_SUPER_SPEED)){
+ if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_SUPER_SPEED)) {
PeiUsbDevice->MaxPacketSize0 = 512;
} else if (USB_BIT_IS_SET (PortStatus.PortStatus, USB_PORT_STAT_HIGH_SPEED)) {
PeiUsbDevice->MaxPacketSize0 = 64;
@@ -571,15 +575,16 @@ PeiUsbEnumeration (
// Configure that Usb Device
//
Status = PeiConfigureUsbDevice (
- PeiServices,
- PeiUsbDevice,
- Index,
- &CurrentAddress
- );
+ PeiServices,
+ PeiUsbDevice,
+ Index,
+ &CurrentAddress
+ );
if (EFI_ERROR (Status)) {
continue;
}
+
DEBUG ((DEBUG_INFO, "PeiUsbEnumeration: PeiConfigureUsbDevice Success\n"));
Status = PeiServicesInstallPpi (&PeiUsbDevice->UsbIoPpiList);
@@ -600,19 +605,20 @@ PeiUsbEnumeration (
// Begin to deal with the new device
//
MemPages = sizeof (PEI_USB_DEVICE) / EFI_PAGE_SIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &AllocateAddress
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &AllocateAddress
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
CopyMem ((VOID *)(UINTN)AllocateAddress, PeiUsbDevice, sizeof (PEI_USB_DEVICE));
- PeiUsbDevice = (PEI_USB_DEVICE *) ((UINTN) AllocateAddress);
- PeiUsbDevice->AllocateAddress = (UINTN) AllocateAddress;
+ PeiUsbDevice = (PEI_USB_DEVICE *)((UINTN)AllocateAddress);
+ PeiUsbDevice->AllocateAddress = (UINTN)AllocateAddress;
PeiUsbDevice->UsbIoPpiList.Ppi = &PeiUsbDevice->UsbIoPpi;
- PeiUsbDevice->InterfaceDesc = PeiUsbDevice->InterfaceDescList[InterfaceIndex];
+ PeiUsbDevice->InterfaceDesc = PeiUsbDevice->InterfaceDescList[InterfaceIndex];
for (EndpointIndex = 0; EndpointIndex < PeiUsbDevice->InterfaceDesc->NumEndpoints; EndpointIndex++) {
PeiUsbDevice->EndpointDesc[EndpointIndex] = PeiUsbDevice->EndpointDescList[InterfaceIndex][EndpointIndex];
}
@@ -656,16 +662,16 @@ PeiUsbEnumeration (
**/
EFI_STATUS
PeiConfigureUsbDevice (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice,
- IN UINT8 Port,
- IN OUT UINT8 *DeviceAddress
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice,
+ IN UINT8 Port,
+ IN OUT UINT8 *DeviceAddress
)
{
- EFI_USB_DEVICE_DESCRIPTOR DeviceDescriptor;
- EFI_STATUS Status;
- PEI_USB_IO_PPI *UsbIoPpi;
- UINT8 Retry;
+ EFI_USB_DEVICE_DESCRIPTOR DeviceDescriptor;
+ EFI_STATUS Status;
+ PEI_USB_IO_PPI *UsbIoPpi;
+ UINT8 Retry;
UsbIoPpi = &PeiUsbDevice->UsbIoPpi;
Status = EFI_SUCCESS;
@@ -674,7 +680,7 @@ PeiConfigureUsbDevice (
// Get USB device descriptor
//
- for (Retry = 0; Retry < 3; Retry ++) {
+ for (Retry = 0; Retry < 3; Retry++) {
Status = PeiUsbGetDescriptor (
PeiServices,
UsbIoPpi,
@@ -701,18 +707,19 @@ PeiConfigureUsbDevice (
PeiUsbDevice->MaxPacketSize0 = DeviceDescriptor.MaxPacketSize0;
}
- (*DeviceAddress) ++;
+ (*DeviceAddress)++;
Status = PeiUsbSetDeviceAddress (
- PeiServices,
- UsbIoPpi,
- *DeviceAddress
- );
+ PeiServices,
+ UsbIoPpi,
+ *DeviceAddress
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "PeiUsbSetDeviceAddress Failed: %r\n", Status));
return Status;
}
+
MicroSecondDelay (USB_SET_DEVICE_ADDRESS_STALL);
PeiUsbDevice->DeviceAddress = *DeviceAddress;
@@ -721,13 +728,13 @@ PeiConfigureUsbDevice (
// Get whole USB device descriptor
//
Status = PeiUsbGetDescriptor (
- PeiServices,
- UsbIoPpi,
- (USB_DT_DEVICE << 8),
- 0,
- (UINT16) sizeof (EFI_USB_DEVICE_DESCRIPTOR),
- &DeviceDescriptor
- );
+ PeiServices,
+ UsbIoPpi,
+ (USB_DT_DEVICE << 8),
+ 0,
+ (UINT16)sizeof (EFI_USB_DEVICE_DESCRIPTOR),
+ &DeviceDescriptor
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "PeiUsbGetDescriptor First Failed\n"));
@@ -738,18 +745,19 @@ PeiConfigureUsbDevice (
// Get its default configuration and its first interface
//
Status = PeiUsbGetAllConfiguration (
- PeiServices,
- PeiUsbDevice
- );
+ PeiServices,
+ PeiUsbDevice
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
MicroSecondDelay (USB_GET_CONFIG_DESCRIPTOR_STALL);
Status = PeiUsbSetConfiguration (
- PeiServices,
- UsbIoPpi
- );
+ PeiServices,
+ UsbIoPpi
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -771,20 +779,20 @@ PeiConfigureUsbDevice (
**/
EFI_STATUS
PeiUsbGetAllConfiguration (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_DEVICE *PeiUsbDevice
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_DEVICE *PeiUsbDevice
)
{
- EFI_STATUS Status;
- EFI_USB_CONFIG_DESCRIPTOR *ConfigDesc;
- PEI_USB_IO_PPI *UsbIoPpi;
- UINT16 ConfigDescLength;
- UINT8 *Ptr;
- UINTN SkipBytes;
- UINTN LengthLeft;
- UINTN InterfaceIndex;
- UINTN Index;
- UINTN NumOfEndpoint;
+ EFI_STATUS Status;
+ EFI_USB_CONFIG_DESCRIPTOR *ConfigDesc;
+ PEI_USB_IO_PPI *UsbIoPpi;
+ UINT16 ConfigDescLength;
+ UINT8 *Ptr;
+ UINTN SkipBytes;
+ UINTN LengthLeft;
+ UINTN InterfaceIndex;
+ UINTN Index;
+ UINTN NumOfEndpoint;
UsbIoPpi = &PeiUsbDevice->UsbIoPpi;
@@ -792,22 +800,23 @@ PeiUsbGetAllConfiguration (
// First get its 4-byte configuration descriptor
//
Status = PeiUsbGetDescriptor (
- PeiServices,
- UsbIoPpi,
- (USB_DT_CONFIG << 8), // Value
- 0, // Index
- 4, // Length
- PeiUsbDevice->ConfigurationData
- );
+ PeiServices,
+ UsbIoPpi,
+ (USB_DT_CONFIG << 8), // Value
+ 0, // Index
+ 4, // Length
+ PeiUsbDevice->ConfigurationData
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "PeiUsbGet Config Descriptor First Failed\n"));
return Status;
}
+
MicroSecondDelay (USB_GET_CONFIG_DESCRIPTOR_STALL);
- ConfigDesc = (EFI_USB_CONFIG_DESCRIPTOR *) PeiUsbDevice->ConfigurationData;
- ConfigDescLength = ConfigDesc->TotalLength;
+ ConfigDesc = (EFI_USB_CONFIG_DESCRIPTOR *)PeiUsbDevice->ConfigurationData;
+ ConfigDescLength = ConfigDesc->TotalLength;
//
// Reject if TotalLength even cannot cover itself.
@@ -827,52 +836,52 @@ PeiUsbGetAllConfiguration (
// Then we get the total descriptors for this configuration
//
Status = PeiUsbGetDescriptor (
- PeiServices,
- UsbIoPpi,
- (USB_DT_CONFIG << 8),
- 0,
- ConfigDescLength,
- PeiUsbDevice->ConfigurationData
- );
+ PeiServices,
+ UsbIoPpi,
+ (USB_DT_CONFIG << 8),
+ 0,
+ ConfigDescLength,
+ PeiUsbDevice->ConfigurationData
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "PeiUsbGet Config Descriptor all Failed\n"));
return Status;
}
+
//
// Parse this configuration descriptor
// First get the current config descriptor;
//
Status = GetExpectedDescriptor (
- PeiUsbDevice->ConfigurationData,
- ConfigDescLength,
- USB_DT_CONFIG,
- (UINT8) sizeof (EFI_USB_CONFIG_DESCRIPTOR),
- &SkipBytes
- );
+ PeiUsbDevice->ConfigurationData,
+ ConfigDescLength,
+ USB_DT_CONFIG,
+ (UINT8)sizeof (EFI_USB_CONFIG_DESCRIPTOR),
+ &SkipBytes
+ );
if (EFI_ERROR (Status)) {
return Status;
}
- Ptr = PeiUsbDevice->ConfigurationData + SkipBytes;
- PeiUsbDevice->ConfigDesc = (EFI_USB_CONFIG_DESCRIPTOR *) Ptr;
+ Ptr = PeiUsbDevice->ConfigurationData + SkipBytes;
+ PeiUsbDevice->ConfigDesc = (EFI_USB_CONFIG_DESCRIPTOR *)Ptr;
- Ptr += sizeof (EFI_USB_CONFIG_DESCRIPTOR);
+ Ptr += sizeof (EFI_USB_CONFIG_DESCRIPTOR);
LengthLeft = ConfigDescLength - SkipBytes - sizeof (EFI_USB_CONFIG_DESCRIPTOR);
for (InterfaceIndex = 0; InterfaceIndex < PeiUsbDevice->ConfigDesc->NumInterfaces; InterfaceIndex++) {
-
//
// Get the interface descriptor
//
Status = GetExpectedDescriptor (
- Ptr,
- LengthLeft,
- USB_DT_INTERFACE,
- (UINT8) sizeof (EFI_USB_INTERFACE_DESCRIPTOR),
- &SkipBytes
- );
+ Ptr,
+ LengthLeft,
+ USB_DT_INTERFACE,
+ (UINT8)sizeof (EFI_USB_INTERFACE_DESCRIPTOR),
+ &SkipBytes
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -880,11 +889,12 @@ PeiUsbGetAllConfiguration (
Ptr += SkipBytes;
if (InterfaceIndex == 0) {
- PeiUsbDevice->InterfaceDesc = (EFI_USB_INTERFACE_DESCRIPTOR *) Ptr;
+ PeiUsbDevice->InterfaceDesc = (EFI_USB_INTERFACE_DESCRIPTOR *)Ptr;
}
- PeiUsbDevice->InterfaceDescList[InterfaceIndex] = (EFI_USB_INTERFACE_DESCRIPTOR *) Ptr;
- Ptr += sizeof (EFI_USB_INTERFACE_DESCRIPTOR);
+ PeiUsbDevice->InterfaceDescList[InterfaceIndex] = (EFI_USB_INTERFACE_DESCRIPTOR *)Ptr;
+
+ Ptr += sizeof (EFI_USB_INTERFACE_DESCRIPTOR);
LengthLeft -= SkipBytes;
LengthLeft -= sizeof (EFI_USB_INTERFACE_DESCRIPTOR);
@@ -899,12 +909,12 @@ PeiUsbGetAllConfiguration (
// Get the endpoint descriptor
//
Status = GetExpectedDescriptor (
- Ptr,
- LengthLeft,
- USB_DT_ENDPOINT,
- (UINT8) sizeof (EFI_USB_ENDPOINT_DESCRIPTOR),
- &SkipBytes
- );
+ Ptr,
+ LengthLeft,
+ USB_DT_ENDPOINT,
+ (UINT8)sizeof (EFI_USB_ENDPOINT_DESCRIPTOR),
+ &SkipBytes
+ );
if (EFI_ERROR (Status)) {
return Status;
@@ -912,11 +922,12 @@ PeiUsbGetAllConfiguration (
Ptr += SkipBytes;
if (InterfaceIndex == 0) {
- PeiUsbDevice->EndpointDesc[Index] = (EFI_USB_ENDPOINT_DESCRIPTOR *) Ptr;
+ PeiUsbDevice->EndpointDesc[Index] = (EFI_USB_ENDPOINT_DESCRIPTOR *)Ptr;
}
- PeiUsbDevice->EndpointDescList[InterfaceIndex][Index] = (EFI_USB_ENDPOINT_DESCRIPTOR *) Ptr;
- Ptr += sizeof (EFI_USB_ENDPOINT_DESCRIPTOR);
+ PeiUsbDevice->EndpointDescList[InterfaceIndex][Index] = (EFI_USB_ENDPOINT_DESCRIPTOR *)Ptr;
+
+ Ptr += sizeof (EFI_USB_ENDPOINT_DESCRIPTOR);
LengthLeft -= SkipBytes;
LengthLeft -= sizeof (EFI_USB_ENDPOINT_DESCRIPTOR);
}
@@ -940,15 +951,15 @@ PeiUsbGetAllConfiguration (
**/
EFI_STATUS
GetExpectedDescriptor (
- IN UINT8 *Buffer,
- IN UINTN Length,
- IN UINT8 DescType,
- IN UINT8 DescLength,
- OUT UINTN *ParsedBytes
+ IN UINT8 *Buffer,
+ IN UINTN Length,
+ IN UINT8 DescType,
+ IN UINT8 DescLength,
+ OUT UINTN *ParsedBytes
)
{
- USB_DESC_HEAD *Head;
- UINTN Offset;
+ USB_DESC_HEAD *Head;
+ UINTN Offset;
//
// Total length is too small that cannot hold the single descriptor header plus data.
@@ -1020,17 +1031,16 @@ GetExpectedDescriptor (
**/
VOID
ResetRootPort (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
- IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi,
- IN UINT8 PortNum,
- IN UINT8 RetryIndex
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi,
+ IN UINT8 PortNum,
+ IN UINT8 RetryIndex
)
{
- EFI_STATUS Status;
- UINTN Index;
- EFI_USB_PORT_STATUS PortStatus;
-
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_USB_PORT_STATUS PortStatus;
if (Usb2HcPpi != NULL) {
MicroSecondDelay (200 * 1000);
@@ -1039,11 +1049,11 @@ ResetRootPort (
// reset root port
//
Status = Usb2HcPpi->SetRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortReset
- );
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortReset
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SetRootHubPortFeature EfiUsbPortReset Failed\n"));
@@ -1060,11 +1070,11 @@ ResetRootPort (
// clear reset root port
//
Status = Usb2HcPpi->ClearRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortReset
- );
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortReset
+ );
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ClearRootHubPortFeature EfiUsbPortReset Failed\n"));
@@ -1103,35 +1113,35 @@ ResetRootPort (
}
Usb2HcPpi->ClearRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortResetChange
- );
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortResetChange
+ );
Usb2HcPpi->ClearRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortConnectChange
- );
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortConnectChange
+ );
//
// Set port enable
//
- Usb2HcPpi->SetRootHubPortFeature(
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortEnable
- );
+ Usb2HcPpi->SetRootHubPortFeature (
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortEnable
+ );
Usb2HcPpi->ClearRootHubPortFeature (
- PeiServices,
- Usb2HcPpi,
- PortNum,
- EfiUsbPortEnableChange
- );
+ PeiServices,
+ Usb2HcPpi,
+ PortNum,
+ EfiUsbPortEnableChange
+ );
MicroSecondDelay ((RetryIndex + 1) * 50 * 1000);
} else {
@@ -1221,7 +1231,7 @@ ResetRootPort (
//
// Set port enable
//
- UsbHcPpi->SetRootHubPortFeature(
+ UsbHcPpi->SetRootHubPortFeature (
PeiServices,
UsbHcPpi,
PortNum,
@@ -1237,5 +1247,6 @@ ResetRootPort (
MicroSecondDelay ((RetryIndex + 1) * 50 * 1000);
}
+
return;
}
diff --git a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h
index 776edba6bb..69d1126da0 100644
--- a/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h
+++ b/MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _PEI_USB_PEIM_H_
#define _PEI_USB_PEIM_H_
-
#include <PiPei.h>
#include <Ppi/UsbHostController.h>
@@ -32,43 +31,43 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
#pragma pack(1)
typedef struct {
- UINT8 Len;
- UINT8 Type;
+ UINT8 Len;
+ UINT8 Type;
} USB_DESC_HEAD;
#pragma pack()
-#define MAX_INTERFACE 8
-#define MAX_ENDPOINT 16
+#define MAX_INTERFACE 8
+#define MAX_ENDPOINT 16
#define PEI_USB_DEVICE_SIGNATURE SIGNATURE_32 ('U', 's', 'b', 'D')
typedef struct {
- UINTN Signature;
- PEI_USB_IO_PPI UsbIoPpi;
- EFI_PEI_PPI_DESCRIPTOR UsbIoPpiList;
- UINT16 MaxPacketSize0;
- UINT16 DataToggle;
- UINT8 DeviceAddress;
- UINT8 DeviceSpeed;
- UINT8 IsHub;
- UINT8 DownStreamPortNo;
- UINTN AllocateAddress;
- PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi;
- PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi;
- UINT8 ConfigurationData[1024];
- EFI_USB_CONFIG_DESCRIPTOR *ConfigDesc;
- EFI_USB_INTERFACE_DESCRIPTOR *InterfaceDesc;
- EFI_USB_INTERFACE_DESCRIPTOR *InterfaceDescList[MAX_INTERFACE];
- EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDesc[MAX_ENDPOINT];
- EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescList[MAX_INTERFACE][MAX_ENDPOINT];
- EFI_USB2_HC_TRANSACTION_TRANSLATOR Translator;
- UINT8 Tier;
+ UINTN Signature;
+ PEI_USB_IO_PPI UsbIoPpi;
+ EFI_PEI_PPI_DESCRIPTOR UsbIoPpiList;
+ UINT16 MaxPacketSize0;
+ UINT16 DataToggle;
+ UINT8 DeviceAddress;
+ UINT8 DeviceSpeed;
+ UINT8 IsHub;
+ UINT8 DownStreamPortNo;
+ UINTN AllocateAddress;
+ PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi;
+ PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi;
+ UINT8 ConfigurationData[1024];
+ EFI_USB_CONFIG_DESCRIPTOR *ConfigDesc;
+ EFI_USB_INTERFACE_DESCRIPTOR *InterfaceDesc;
+ EFI_USB_INTERFACE_DESCRIPTOR *InterfaceDescList[MAX_INTERFACE];
+ EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDesc[MAX_ENDPOINT];
+ EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescList[MAX_INTERFACE][MAX_ENDPOINT];
+ EFI_USB2_HC_TRANSACTION_TRANSLATOR Translator;
+ UINT8 Tier;
} PEI_USB_DEVICE;
-#define PEI_USB_DEVICE_FROM_THIS(a) CR (a, PEI_USB_DEVICE, UsbIoPpi, PEI_USB_DEVICE_SIGNATURE)
+#define PEI_USB_DEVICE_FROM_THIS(a) CR (a, PEI_USB_DEVICE, UsbIoPpi, PEI_USB_DEVICE_SIGNATURE)
-#define USB_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
+#define USB_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
-#define USB_BUS_1_MILLISECOND 1000
+#define USB_BUS_1_MILLISECOND 1000
//
// Wait for port reset, refers to specification
@@ -78,13 +77,13 @@ typedef struct {
// According to USB2.0, Chapter 11.5.1.5 Resetting,
// the worst case for TDRST is 20ms
//
-#define USB_SET_PORT_RESET_STALL (20 * USB_BUS_1_MILLISECOND)
-#define USB_SET_ROOT_PORT_RESET_STALL (50 * USB_BUS_1_MILLISECOND)
+#define USB_SET_PORT_RESET_STALL (20 * USB_BUS_1_MILLISECOND)
+#define USB_SET_ROOT_PORT_RESET_STALL (50 * USB_BUS_1_MILLISECOND)
//
// Wait for clear roothub port reset, set by experience
//
-#define USB_CLR_ROOT_PORT_RESET_STALL (20 * USB_BUS_1_MILLISECOND)
+#define USB_CLR_ROOT_PORT_RESET_STALL (20 * USB_BUS_1_MILLISECOND)
//
// Wait for port statue reg change, set by experience
@@ -95,24 +94,24 @@ typedef struct {
// Host software return timeout if port status doesn't change
// after 500ms(LOOP * STALL = 5000 * 0.1ms), set by experience
//
-#define USB_WAIT_PORT_STS_CHANGE_LOOP 5000
+#define USB_WAIT_PORT_STS_CHANGE_LOOP 5000
//
// Wait for hub port power-on, refers to specification
// [USB20-11.23.2]
//
-#define USB_SET_PORT_POWER_STALL (2 * USB_BUS_1_MILLISECOND)
+#define USB_SET_PORT_POWER_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for set device address, refers to specification
// [USB20-9.2.6.3, it says 2ms]
//
-#define USB_SET_DEVICE_ADDRESS_STALL (2 * USB_BUS_1_MILLISECOND)
+#define USB_SET_DEVICE_ADDRESS_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for get configuration descriptor, set by experience
//
-#define USB_GET_CONFIG_DESCRIPTOR_STALL (1 * USB_BUS_1_MILLISECOND)
+#define USB_GET_CONFIG_DESCRIPTOR_STALL (1 * USB_BUS_1_MILLISECOND)
/**
Submits control transfer to a target USB device.
@@ -137,13 +136,13 @@ typedef struct {
EFI_STATUS
EFIAPI
PeiUsbControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN EFI_USB_DEVICE_REQUEST *Request,
- IN EFI_USB_DATA_DIRECTION Direction,
- IN UINT32 Timeout,
- IN OUT VOID *Data OPTIONAL,
- IN UINTN DataLength OPTIONAL
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT32 Timeout,
+ IN OUT VOID *Data OPTIONAL,
+ IN UINTN DataLength OPTIONAL
);
/**
@@ -170,12 +169,12 @@ PeiUsbControlTransfer (
EFI_STATUS
EFIAPI
PeiUsbBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN UINT8 DeviceEndpoint,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN UINTN Timeout
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout
);
/**
@@ -192,9 +191,9 @@ PeiUsbBulkTransfer (
EFI_STATUS
EFIAPI
PeiUsbGetInterfaceDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- OUT EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ OUT EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor
);
/**
@@ -212,10 +211,10 @@ PeiUsbGetInterfaceDescriptor (
EFI_STATUS
EFIAPI
PeiUsbGetEndpointDescriptor (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This,
- IN UINT8 EndpointIndex,
- OUT EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This,
+ IN UINT8 EndpointIndex,
+ OUT EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor
);
/**
@@ -231,8 +230,8 @@ PeiUsbGetEndpointDescriptor (
EFI_STATUS
EFIAPI
PeiUsbPortReset (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_IO_PPI *This
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_IO_PPI *This
);
/**
@@ -247,11 +246,11 @@ PeiUsbPortReset (
**/
VOID
ResetRootPort (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
- IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi,
- IN UINT8 PortNum,
- IN UINT8 RetryIndex
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *UsbHcPpi,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *Usb2HcPpi,
+ IN UINT8 PortNum,
+ IN UINT8 RetryIndex
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbKbDxe/ComponentName.c b/MdeModulePkg/Bus/Usb/UsbKbDxe/ComponentName.c
index 6af1d7809f..536a11bb00 100644
--- a/MdeModulePkg/Bus/Usb/UsbKbDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Usb/UsbKbDxe/ComponentName.c
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "KeyBoard.h"
//
@@ -21,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUsbKeyboardComponent
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbKeyboardComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UsbKeyboardComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UsbKeyboardComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbKeyboardComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UsbKeyboardComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UsbKeyboardComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbKeyboardDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbKeyboardDriverNameTable[] = {
{ "eng;en", L"Usb Keyboard Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -145,17 +143,18 @@ UsbKeyboardComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbKeyboardComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- USB_KB_DEV *UsbKbDev;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL *SimpleTxtIn;
- EFI_USB_IO_PROTOCOL *UsbIoProtocol;
+ EFI_STATUS Status;
+ USB_KB_DEV *UsbKbDev;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *SimpleTxtIn;
+ EFI_USB_IO_PROTOCOL *UsbIoProtocol;
+
//
// This is a device driver, so ChildHandle must be NULL.
//
@@ -169,7 +168,7 @@ UsbKeyboardComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIoProtocol,
+ (VOID **)&UsbIoProtocol,
gUsbKeyboardDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -188,13 +187,14 @@ UsbKeyboardComponentNameGetControllerName (
if (Status != EFI_ALREADY_STARTED) {
return EFI_UNSUPPORTED;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiSimpleTextInProtocolGuid,
- (VOID **) &SimpleTxtIn,
+ (VOID **)&SimpleTxtIn,
gUsbKeyboardDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -213,5 +213,4 @@ UsbKeyboardComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gUsbKeyboardComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.c b/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.c
index 9d1798278e..e889f422bb 100644
--- a/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.c
+++ b/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.c
@@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// USB Keyboard Driver Global Variables
//
-EFI_DRIVER_BINDING_PROTOCOL gUsbKeyboardDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUsbKeyboardDriverBinding = {
USBKeyboardDriverBindingSupported,
USBKeyboardDriverBindingStart,
USBKeyboardDriverBindingStop,
@@ -37,11 +37,11 @@ EFI_DRIVER_BINDING_PROTOCOL gUsbKeyboardDriverBinding = {
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@@ -70,13 +70,13 @@ USBKeyboardDriverBindingEntryPoint (
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
//
// Check if USB I/O Protocol is attached on the controller handle.
@@ -84,7 +84,7 @@ USBKeyboardDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -133,22 +133,22 @@ USBKeyboardDriverBindingSupported (
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
- USB_KB_DEV *UsbKeyboardDevice;
- UINT8 EndpointNumber;
- EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
- UINT8 Index;
- UINT8 EndpointAddr;
- UINT8 PollingInterval;
- UINT8 PacketSize;
- BOOLEAN Found;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_KB_DEV *UsbKeyboardDevice;
+ UINT8 EndpointNumber;
+ EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
+ UINT8 Index;
+ UINT8 EndpointAddr;
+ UINT8 PollingInterval;
+ UINT8 PacketSize;
+ BOOLEAN Found;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
//
@@ -157,7 +157,7 @@ USBKeyboardDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -175,7 +175,7 @@ USBKeyboardDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &UsbKeyboardDevice->DevicePath,
+ (VOID **)&UsbKeyboardDevice->DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -184,6 +184,7 @@ USBKeyboardDriverBindingStart (
if (EFI_ERROR (Status)) {
goto ErrorExit;
}
+
//
// Report that the USB keyboard is being enabled
//
@@ -219,7 +220,6 @@ USBKeyboardDriverBindingStart (
//
Found = FALSE;
for (Index = 0; Index < EndpointNumber; Index++) {
-
UsbIo->UsbGetEndpointDescriptor (
UsbIo,
Index,
@@ -227,11 +227,12 @@ USBKeyboardDriverBindingStart (
);
if (((EndpointDescriptor.Attributes & (BIT0 | BIT1)) == USB_ENDPOINT_INTERRUPT) &&
- ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0)) {
+ ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0))
+ {
//
// We only care interrupt endpoint here
//
- CopyMem(&UsbKeyboardDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof(EndpointDescriptor));
+ CopyMem (&UsbKeyboardDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof (EndpointDescriptor));
Found = TRUE;
break;
}
@@ -258,9 +259,9 @@ USBKeyboardDriverBindingStart (
UsbKeyboardDevice->DevicePath
);
- UsbKeyboardDevice->Signature = USB_KB_DEV_SIGNATURE;
- UsbKeyboardDevice->SimpleInput.Reset = USBKeyboardReset;
- UsbKeyboardDevice->SimpleInput.ReadKeyStroke = USBKeyboardReadKeyStroke;
+ UsbKeyboardDevice->Signature = USB_KB_DEV_SIGNATURE;
+ UsbKeyboardDevice->SimpleInput.Reset = USBKeyboardReset;
+ UsbKeyboardDevice->SimpleInput.ReadKeyStroke = USBKeyboardReadKeyStroke;
UsbKeyboardDevice->SimpleInputEx.Reset = USBKeyboardResetEx;
UsbKeyboardDevice->SimpleInputEx.ReadKeyStrokeEx = USBKeyboardReadKeyStrokeEx;
@@ -280,6 +281,7 @@ USBKeyboardDriverBindingStart (
if (!EFI_ERROR (Status)) {
Status = gBS->SetTimer (UsbKeyboardDevice->TimerEvent, TimerPeriodic, KEYBOARD_TIMER_INTERVAL);
}
+
if (EFI_ERROR (Status)) {
goto ErrorExit;
}
@@ -338,27 +340,26 @@ USBKeyboardDriverBindingStart (
}
UsbKeyboardDevice->ControllerHandle = Controller;
- Status = InitKeyboardLayout (UsbKeyboardDevice);
+ Status = InitKeyboardLayout (UsbKeyboardDevice);
if (EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiSimpleTextInProtocolGuid,
- &UsbKeyboardDevice->SimpleInput,
- &gEfiSimpleTextInputExProtocolGuid,
- &UsbKeyboardDevice->SimpleInputEx,
- NULL
- );
+ Controller,
+ &gEfiSimpleTextInProtocolGuid,
+ &UsbKeyboardDevice->SimpleInput,
+ &gEfiSimpleTextInputExProtocolGuid,
+ &UsbKeyboardDevice->SimpleInputEx,
+ NULL
+ );
goto ErrorExit;
}
-
//
// Reset USB Keyboard Device exhaustively.
//
Status = UsbKeyboardDevice->SimpleInputEx.Reset (
- &UsbKeyboardDevice->SimpleInputEx,
- TRUE
- );
+ &UsbKeyboardDevice->SimpleInputEx,
+ TRUE
+ );
if (EFI_ERROR (Status)) {
gBS->UninstallMultipleProtocolInterfaces (
Controller,
@@ -376,7 +377,7 @@ USBKeyboardDriverBindingStart (
//
EndpointAddr = UsbKeyboardDevice->IntEndpointDescriptor.EndpointAddress;
PollingInterval = UsbKeyboardDevice->IntEndpointDescriptor.Interval;
- PacketSize = (UINT8) (UsbKeyboardDevice->IntEndpointDescriptor.MaxPacketSize);
+ PacketSize = (UINT8)(UsbKeyboardDevice->IntEndpointDescriptor.MaxPacketSize);
Status = UsbIo->UsbAsyncInterruptTransfer (
UsbIo,
@@ -419,30 +420,36 @@ USBKeyboardDriverBindingStart (
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
-//
-// Error handler
-//
+ //
+ // Error handler
+ //
ErrorExit:
if (UsbKeyboardDevice != NULL) {
if (UsbKeyboardDevice->TimerEvent != NULL) {
gBS->CloseEvent (UsbKeyboardDevice->TimerEvent);
}
+
if (UsbKeyboardDevice->SimpleInput.WaitForKey != NULL) {
gBS->CloseEvent (UsbKeyboardDevice->SimpleInput.WaitForKey);
}
+
if (UsbKeyboardDevice->SimpleInputEx.WaitForKeyEx != NULL) {
gBS->CloseEvent (UsbKeyboardDevice->SimpleInputEx.WaitForKeyEx);
}
+
if (UsbKeyboardDevice->KeyNotifyProcessEvent != NULL) {
gBS->CloseEvent (UsbKeyboardDevice->KeyNotifyProcessEvent);
}
+
if (UsbKeyboardDevice->KeyboardLayoutEvent != NULL) {
ReleaseKeyboardLayoutResources (UsbKeyboardDevice);
gBS->CloseEvent (UsbKeyboardDevice->KeyboardLayoutEvent);
}
+
FreePool (UsbKeyboardDevice);
UsbKeyboardDevice = NULL;
}
+
gBS->CloseProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
@@ -454,10 +461,8 @@ ErrorExit1:
gBS->RestoreTPL (OldTpl);
return Status;
-
}
-
/**
Stop the USB keyboard device handled by this driver.
@@ -476,20 +481,20 @@ ErrorExit1:
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL *SimpleInput;
- USB_KB_DEV *UsbKeyboardDevice;
+ EFI_STATUS Status;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *SimpleInput;
+ USB_KB_DEV *UsbKeyboardDevice;
Status = gBS->OpenProtocol (
Controller,
&gEfiSimpleTextInProtocolGuid,
- (VOID **) &SimpleInput,
+ (VOID **)&SimpleInput,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -593,8 +598,8 @@ USBKeyboardDriverBindingStop (
**/
EFI_STATUS
USBKeyboardReadKeyStrokeWorker (
- IN OUT USB_KB_DEV *UsbKeyboardDevice,
- OUT EFI_KEY_DATA *KeyData
+ IN OUT USB_KB_DEV *UsbKeyboardDevice,
+ OUT EFI_KEY_DATA *KeyData
)
{
if (KeyData == NULL) {
@@ -630,12 +635,12 @@ USBKeyboardReadKeyStrokeWorker (
EFI_STATUS
EFIAPI
USBKeyboardReset (
- IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- USB_KB_DEV *UsbKeyboardDevice;
+ EFI_STATUS Status;
+ USB_KB_DEV *UsbKeyboardDevice;
UsbKeyboardDevice = USB_KB_DEV_FROM_THIS (This);
@@ -676,7 +681,6 @@ USBKeyboardReset (
return EFI_SUCCESS;
}
-
/**
Reads the next keystroke from the input device.
@@ -693,13 +697,13 @@ USBKeyboardReset (
EFI_STATUS
EFIAPI
USBKeyboardReadKeyStroke (
- IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
- OUT EFI_INPUT_KEY *Key
+ IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
+ OUT EFI_INPUT_KEY *Key
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_STATUS Status;
- EFI_KEY_DATA KeyData;
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_STATUS Status;
+ EFI_KEY_DATA KeyData;
UsbKeyboardDevice = USB_KB_DEV_FROM_THIS (This);
@@ -713,21 +717,23 @@ USBKeyboardReadKeyStroke (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// SimpleTextIn Protocol doesn't support partial keystroke;
//
- if (KeyData.Key.ScanCode == CHAR_NULL && KeyData.Key.UnicodeChar == SCAN_NULL) {
+ if ((KeyData.Key.ScanCode == CHAR_NULL) && (KeyData.Key.UnicodeChar == SCAN_NULL)) {
continue;
}
+
//
// Translate the CTRL-Alpha characters to their corresponding control value
// (ctrl-a = 0x0001 through ctrl-Z = 0x001A)
//
if ((KeyData.KeyState.KeyShiftState & (EFI_LEFT_CONTROL_PRESSED | EFI_RIGHT_CONTROL_PRESSED)) != 0) {
- if (KeyData.Key.UnicodeChar >= L'a' && KeyData.Key.UnicodeChar <= L'z') {
- KeyData.Key.UnicodeChar = (CHAR16) (KeyData.Key.UnicodeChar - L'a' + 1);
- } else if (KeyData.Key.UnicodeChar >= L'A' && KeyData.Key.UnicodeChar <= L'Z') {
- KeyData.Key.UnicodeChar = (CHAR16) (KeyData.Key.UnicodeChar - L'A' + 1);
+ if ((KeyData.Key.UnicodeChar >= L'a') && (KeyData.Key.UnicodeChar <= L'z')) {
+ KeyData.Key.UnicodeChar = (CHAR16)(KeyData.Key.UnicodeChar - L'a' + 1);
+ } else if ((KeyData.Key.UnicodeChar >= L'A') && (KeyData.Key.UnicodeChar <= L'Z')) {
+ KeyData.Key.UnicodeChar = (CHAR16)(KeyData.Key.UnicodeChar - L'A' + 1);
}
}
@@ -736,7 +742,6 @@ USBKeyboardReadKeyStroke (
}
}
-
/**
Event notification function registered for EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.WaitForKeyEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.WaitForKey.
@@ -748,15 +753,15 @@ USBKeyboardReadKeyStroke (
VOID
EFIAPI
USBKeyboardWaitForKey (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_KEY_DATA KeyData;
- EFI_TPL OldTpl;
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_KEY_DATA KeyData;
+ EFI_TPL OldTpl;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
//
// Enter critical section
@@ -778,13 +783,15 @@ USBKeyboardWaitForKey (
UsbKeyboardDevice->EfiKeyQueue.Buffer[UsbKeyboardDevice->EfiKeyQueue.Head],
sizeof (EFI_KEY_DATA)
);
- if (KeyData.Key.ScanCode == SCAN_NULL && KeyData.Key.UnicodeChar == CHAR_NULL) {
+ if ((KeyData.Key.ScanCode == SCAN_NULL) && (KeyData.Key.UnicodeChar == CHAR_NULL)) {
Dequeue (&UsbKeyboardDevice->EfiKeyQueue, &KeyData, sizeof (EFI_KEY_DATA));
continue;
}
+
gBS->SignalEvent (Event);
break;
}
+
//
// Leave critical section and return
//
@@ -800,16 +807,16 @@ USBKeyboardWaitForKey (
VOID
EFIAPI
USBKeyboardTimerHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EFI_STATUS Status;
- USB_KB_DEV *UsbKeyboardDevice;
- UINT8 KeyCode;
- EFI_KEY_DATA KeyData;
+ EFI_STATUS Status;
+ USB_KB_DEV *UsbKeyboardDevice;
+ UINT8 KeyCode;
+ EFI_KEY_DATA KeyData;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
//
// Fetch raw data from the USB keyboard buffer,
@@ -817,7 +824,7 @@ USBKeyboardTimerHandler (
//
Status = USBParseKey (UsbKeyboardDevice, &KeyCode);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
//
@@ -825,7 +832,7 @@ USBKeyboardTimerHandler (
//
Status = UsbKeyCodeToEfiInputKey (UsbKeyboardDevice, KeyCode, &KeyData);
if (EFI_ERROR (Status)) {
- return ;
+ return;
}
//
@@ -845,17 +852,18 @@ USBKeyboardTimerHandler (
**/
EFI_STATUS
KbdFreeNotifyList (
- IN OUT LIST_ENTRY *NotifyList
+ IN OUT LIST_ENTRY *NotifyList
)
{
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *NotifyNode;
- LIST_ENTRY *Link;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *NotifyNode;
+ LIST_ENTRY *Link;
if (NotifyList == NULL) {
return EFI_INVALID_PARAMETER;
}
+
while (!IsListEmpty (NotifyList)) {
- Link = GetFirstNode (NotifyList);
+ Link = GetFirstNode (NotifyList);
NotifyNode = CR (Link, KEYBOARD_CONSOLE_IN_EX_NOTIFY, NotifyEntry, USB_KB_CONSOLE_IN_EX_NOTIFY_SIGNATURE);
RemoveEntryList (Link);
FreePool (NotifyNode);
@@ -883,19 +891,23 @@ IsKeyRegistered (
ASSERT (RegsiteredData != NULL && InputData != NULL);
if ((RegsiteredData->Key.ScanCode != InputData->Key.ScanCode) ||
- (RegsiteredData->Key.UnicodeChar != InputData->Key.UnicodeChar)) {
+ (RegsiteredData->Key.UnicodeChar != InputData->Key.UnicodeChar))
+ {
return FALSE;
}
//
// Assume KeyShiftState/KeyToggleState = 0 in Registered key data means these state could be ignored.
//
- if (RegsiteredData->KeyState.KeyShiftState != 0 &&
- RegsiteredData->KeyState.KeyShiftState != InputData->KeyState.KeyShiftState) {
+ if ((RegsiteredData->KeyState.KeyShiftState != 0) &&
+ (RegsiteredData->KeyState.KeyShiftState != InputData->KeyState.KeyShiftState))
+ {
return FALSE;
}
- if (RegsiteredData->KeyState.KeyToggleState != 0 &&
- RegsiteredData->KeyState.KeyToggleState != InputData->KeyState.KeyToggleState) {
+
+ if ((RegsiteredData->KeyState.KeyToggleState != 0) &&
+ (RegsiteredData->KeyState.KeyToggleState != InputData->KeyState.KeyToggleState))
+ {
return FALSE;
}
@@ -905,6 +917,7 @@ IsKeyRegistered (
//
// Simple Text Input Ex protocol functions
//
+
/**
Resets the input device hardware.
@@ -934,8 +947,8 @@ USBKeyboardResetEx (
IN BOOLEAN ExtendedVerification
)
{
- EFI_STATUS Status;
- USB_KB_DEV *UsbKeyboardDevice;
+ EFI_STATUS Status;
+ USB_KB_DEV *UsbKeyboardDevice;
UsbKeyboardDevice = TEXT_INPUT_EX_USB_KB_DEV_FROM_THIS (This);
@@ -948,7 +961,6 @@ USBKeyboardResetEx (
UsbKeyboardDevice->KeyState.KeyToggleState = EFI_TOGGLE_STATE_VALID;
return EFI_SUCCESS;
-
}
/**
@@ -968,11 +980,11 @@ USBKeyboardResetEx (
EFI_STATUS
EFIAPI
USBKeyboardReadKeyStrokeEx (
- IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
- OUT EFI_KEY_DATA *KeyData
+ IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
+ OUT EFI_KEY_DATA *KeyData
)
{
- USB_KB_DEV *UsbKeyboardDevice;
+ USB_KB_DEV *UsbKeyboardDevice;
if (KeyData == NULL) {
return EFI_INVALID_PARAMETER;
@@ -981,7 +993,6 @@ USBKeyboardReadKeyStrokeEx (
UsbKeyboardDevice = TEXT_INPUT_EX_USB_KB_DEV_FROM_THIS (This);
return USBKeyboardReadKeyStrokeWorker (UsbKeyboardDevice, KeyData);
-
}
/**
@@ -1005,7 +1016,7 @@ USBKeyboardSetState (
IN EFI_KEY_TOGGLE_STATE *KeyToggleState
)
{
- USB_KB_DEV *UsbKeyboardDevice;
+ USB_KB_DEV *UsbKeyboardDevice;
if (KeyToggleState == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1014,7 +1025,8 @@ USBKeyboardSetState (
UsbKeyboardDevice = TEXT_INPUT_EX_USB_KB_DEV_FROM_THIS (This);
if (((UsbKeyboardDevice->KeyState.KeyToggleState & EFI_TOGGLE_STATE_VALID) != EFI_TOGGLE_STATE_VALID) ||
- ((*KeyToggleState & EFI_TOGGLE_STATE_VALID) != EFI_TOGGLE_STATE_VALID)) {
+ ((*KeyToggleState & EFI_TOGGLE_STATE_VALID) != EFI_TOGGLE_STATE_VALID))
+ {
return EFI_UNSUPPORTED;
}
@@ -1022,20 +1034,23 @@ USBKeyboardSetState (
// Update the status light
//
- UsbKeyboardDevice->ScrollOn = FALSE;
- UsbKeyboardDevice->NumLockOn = FALSE;
- UsbKeyboardDevice->CapsOn = FALSE;
+ UsbKeyboardDevice->ScrollOn = FALSE;
+ UsbKeyboardDevice->NumLockOn = FALSE;
+ UsbKeyboardDevice->CapsOn = FALSE;
UsbKeyboardDevice->IsSupportPartialKey = FALSE;
if ((*KeyToggleState & EFI_SCROLL_LOCK_ACTIVE) == EFI_SCROLL_LOCK_ACTIVE) {
UsbKeyboardDevice->ScrollOn = TRUE;
}
+
if ((*KeyToggleState & EFI_NUM_LOCK_ACTIVE) == EFI_NUM_LOCK_ACTIVE) {
UsbKeyboardDevice->NumLockOn = TRUE;
}
+
if ((*KeyToggleState & EFI_CAPS_LOCK_ACTIVE) == EFI_CAPS_LOCK_ACTIVE) {
UsbKeyboardDevice->CapsOn = TRUE;
}
+
if ((*KeyToggleState & EFI_KEY_STATE_EXPOSED) == EFI_KEY_STATE_EXPOSED) {
UsbKeyboardDevice->IsSupportPartialKey = TRUE;
}
@@ -1045,7 +1060,6 @@ USBKeyboardSetState (
UsbKeyboardDevice->KeyState.KeyToggleState = *KeyToggleState;
return EFI_SUCCESS;
-
}
/**
@@ -1076,13 +1090,13 @@ USBKeyboardRegisterKeyNotify (
OUT VOID **NotifyHandle
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *NewNotify;
- LIST_ENTRY *Link;
- LIST_ENTRY *NotifyList;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ USB_KB_DEV *UsbKeyboardDevice;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *NewNotify;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NotifyList;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
- if (KeyData == NULL || NotifyHandle == NULL || KeyNotificationFunction == NULL) {
+ if ((KeyData == NULL) || (NotifyHandle == NULL) || (KeyNotificationFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -1095,7 +1109,8 @@ USBKeyboardRegisterKeyNotify (
for (Link = GetFirstNode (NotifyList);
!IsNull (NotifyList, Link);
- Link = GetNextNode (NotifyList, Link)) {
+ Link = GetNextNode (NotifyList, Link))
+ {
CurrentNotify = CR (
Link,
KEYBOARD_CONSOLE_IN_EX_NOTIFY,
@@ -1113,7 +1128,7 @@ USBKeyboardRegisterKeyNotify (
//
// Allocate resource to save the notification function
//
- NewNotify = (KEYBOARD_CONSOLE_IN_EX_NOTIFY *) AllocateZeroPool (sizeof (KEYBOARD_CONSOLE_IN_EX_NOTIFY));
+ NewNotify = (KEYBOARD_CONSOLE_IN_EX_NOTIFY *)AllocateZeroPool (sizeof (KEYBOARD_CONSOLE_IN_EX_NOTIFY));
if (NewNotify == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -1123,11 +1138,9 @@ USBKeyboardRegisterKeyNotify (
CopyMem (&NewNotify->KeyData, KeyData, sizeof (EFI_KEY_DATA));
InsertTailList (&UsbKeyboardDevice->NotifyList, &NewNotify->NotifyEntry);
-
*NotifyHandle = NewNotify;
return EFI_SUCCESS;
-
}
/**
@@ -1147,10 +1160,10 @@ USBKeyboardUnregisterKeyNotify (
IN VOID *NotificationHandle
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
- LIST_ENTRY *Link;
- LIST_ENTRY *NotifyList;
+ USB_KB_DEV *UsbKeyboardDevice;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NotifyList;
if (NotificationHandle == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1164,7 +1177,8 @@ USBKeyboardUnregisterKeyNotify (
NotifyList = &UsbKeyboardDevice->NotifyList;
for (Link = GetFirstNode (NotifyList);
!IsNull (NotifyList, Link);
- Link = GetNextNode (NotifyList, Link)) {
+ Link = GetNextNode (NotifyList, Link))
+ {
CurrentNotify = CR (
Link,
KEYBOARD_CONSOLE_IN_EX_NOTIFY,
@@ -1197,19 +1211,19 @@ USBKeyboardUnregisterKeyNotify (
VOID
EFIAPI
KeyNotifyProcessHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- EFI_STATUS Status;
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_KEY_DATA KeyData;
- LIST_ENTRY *Link;
- LIST_ENTRY *NotifyList;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_KEY_DATA KeyData;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NotifyList;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ EFI_TPL OldTpl;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
//
// Invoke notification functions.
@@ -1228,6 +1242,7 @@ KeyNotifyProcessHandler (
if (EFI_ERROR (Status)) {
break;
}
+
for (Link = GetFirstNode (NotifyList); !IsNull (NotifyList, Link); Link = GetNextNode (NotifyList, Link)) {
CurrentNotify = CR (Link, KEYBOARD_CONSOLE_IN_EX_NOTIFY, NotifyEntry, USB_KB_CONSOLE_IN_EX_NOTIFY_SIGNATURE);
if (IsKeyRegistered (&CurrentNotify->KeyData, &KeyData)) {
@@ -1236,4 +1251,3 @@ KeyNotifyProcessHandler (
}
}
}
-
diff --git a/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.h b/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.h
index 852e43390d..a9dfeafd6f 100644
--- a/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.h
+++ b/MdeModulePkg/Bus/Usb/UsbKbDxe/EfiKey.h
@@ -5,10 +5,10 @@ Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef _EFI_USB_KB_H_
#define _EFI_USB_KB_H_
-
#include <Uefi.h>
#include <Protocol/SimpleTextIn.h>
@@ -34,59 +34,59 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Usb.h>
-#define KEYBOARD_TIMER_INTERVAL 200000 // 0.02s
+#define KEYBOARD_TIMER_INTERVAL 200000 // 0.02s
-#define MAX_KEY_ALLOWED 32
+#define MAX_KEY_ALLOWED 32
-#define HZ 1000 * 1000 * 10
-#define USBKBD_REPEAT_DELAY ((HZ) / 2)
-#define USBKBD_REPEAT_RATE ((HZ) / 50)
+#define HZ 1000 * 1000 * 10
+#define USBKBD_REPEAT_DELAY ((HZ) / 2)
+#define USBKBD_REPEAT_RATE ((HZ) / 50)
-#define CLASS_HID 3
-#define SUBCLASS_BOOT 1
-#define PROTOCOL_KEYBOARD 1
+#define CLASS_HID 3
+#define SUBCLASS_BOOT 1
+#define PROTOCOL_KEYBOARD 1
-#define BOOT_PROTOCOL 0
-#define REPORT_PROTOCOL 1
+#define BOOT_PROTOCOL 0
+#define REPORT_PROTOCOL 1
typedef struct {
- BOOLEAN Down;
- UINT8 KeyCode;
+ BOOLEAN Down;
+ UINT8 KeyCode;
} USB_KEY;
typedef struct {
- VOID *Buffer[MAX_KEY_ALLOWED + 1];
- UINTN Head;
- UINTN Tail;
- UINTN ItemSize;
+ VOID *Buffer[MAX_KEY_ALLOWED + 1];
+ UINTN Head;
+ UINTN Tail;
+ UINTN ItemSize;
} USB_SIMPLE_QUEUE;
-#define USB_KB_DEV_SIGNATURE SIGNATURE_32 ('u', 'k', 'b', 'd')
-#define USB_KB_CONSOLE_IN_EX_NOTIFY_SIGNATURE SIGNATURE_32 ('u', 'k', 'b', 'x')
+#define USB_KB_DEV_SIGNATURE SIGNATURE_32 ('u', 'k', 'b', 'd')
+#define USB_KB_CONSOLE_IN_EX_NOTIFY_SIGNATURE SIGNATURE_32 ('u', 'k', 'b', 'x')
typedef struct _KEYBOARD_CONSOLE_IN_EX_NOTIFY {
- UINTN Signature;
- EFI_KEY_DATA KeyData;
- EFI_KEY_NOTIFY_FUNCTION KeyNotificationFn;
- LIST_ENTRY NotifyEntry;
+ UINTN Signature;
+ EFI_KEY_DATA KeyData;
+ EFI_KEY_NOTIFY_FUNCTION KeyNotificationFn;
+ LIST_ENTRY NotifyEntry;
} KEYBOARD_CONSOLE_IN_EX_NOTIFY;
#define USB_NS_KEY_SIGNATURE SIGNATURE_32 ('u', 'n', 's', 'k')
typedef struct {
- UINTN Signature;
- LIST_ENTRY Link;
+ UINTN Signature;
+ LIST_ENTRY Link;
//
// The number of EFI_NS_KEY_MODIFIER children definitions
//
- UINTN KeyCount;
+ UINTN KeyCount;
//
// NsKey[0] : Non-spacing key
// NsKey[1] ~ NsKey[KeyCount] : Physical keys
//
- EFI_KEY_DESCRIPTOR *NsKey;
+ EFI_KEY_DESCRIPTOR *NsKey;
} USB_NS_KEY;
#define USB_NS_KEY_FORM_FROM_LINK(a) CR (a, USB_NS_KEY, Link, USB_NS_KEY_SIGNATURE)
@@ -95,64 +95,64 @@ typedef struct {
/// Structure to describe USB keyboard device
///
typedef struct {
- UINTN Signature;
- EFI_HANDLE ControllerHandle;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_EVENT DelayedRecoveryEvent;
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL SimpleInput;
- EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL SimpleInputEx;
- EFI_USB_IO_PROTOCOL *UsbIo;
-
- EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
- EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
-
- USB_SIMPLE_QUEUE UsbKeyQueue;
- USB_SIMPLE_QUEUE EfiKeyQueue;
- USB_SIMPLE_QUEUE EfiKeyQueueForNotify;
- BOOLEAN CtrlOn;
- BOOLEAN AltOn;
- BOOLEAN ShiftOn;
- BOOLEAN NumLockOn;
- BOOLEAN CapsOn;
- BOOLEAN ScrollOn;
- UINT8 LastKeyCodeArray[8];
- UINT8 CurKeyCode;
-
- EFI_EVENT TimerEvent;
-
- UINT8 RepeatKey;
- EFI_EVENT RepeatTimer;
-
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
-
- BOOLEAN LeftCtrlOn;
- BOOLEAN LeftAltOn;
- BOOLEAN LeftShiftOn;
- BOOLEAN LeftLogoOn;
- BOOLEAN RightCtrlOn;
- BOOLEAN RightAltOn;
- BOOLEAN RightShiftOn;
- BOOLEAN RightLogoOn;
- BOOLEAN MenuKeyOn;
- BOOLEAN SysReqOn;
- BOOLEAN AltGrOn;
-
- BOOLEAN IsSupportPartialKey;
-
- EFI_KEY_STATE KeyState;
+ UINTN Signature;
+ EFI_HANDLE ControllerHandle;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_EVENT DelayedRecoveryEvent;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL SimpleInput;
+ EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL SimpleInputEx;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+
+ EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
+ EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
+
+ USB_SIMPLE_QUEUE UsbKeyQueue;
+ USB_SIMPLE_QUEUE EfiKeyQueue;
+ USB_SIMPLE_QUEUE EfiKeyQueueForNotify;
+ BOOLEAN CtrlOn;
+ BOOLEAN AltOn;
+ BOOLEAN ShiftOn;
+ BOOLEAN NumLockOn;
+ BOOLEAN CapsOn;
+ BOOLEAN ScrollOn;
+ UINT8 LastKeyCodeArray[8];
+ UINT8 CurKeyCode;
+
+ EFI_EVENT TimerEvent;
+
+ UINT8 RepeatKey;
+ EFI_EVENT RepeatTimer;
+
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+
+ BOOLEAN LeftCtrlOn;
+ BOOLEAN LeftAltOn;
+ BOOLEAN LeftShiftOn;
+ BOOLEAN LeftLogoOn;
+ BOOLEAN RightCtrlOn;
+ BOOLEAN RightAltOn;
+ BOOLEAN RightShiftOn;
+ BOOLEAN RightLogoOn;
+ BOOLEAN MenuKeyOn;
+ BOOLEAN SysReqOn;
+ BOOLEAN AltGrOn;
+
+ BOOLEAN IsSupportPartialKey;
+
+ EFI_KEY_STATE KeyState;
//
// Notification function list
//
- LIST_ENTRY NotifyList;
- EFI_EVENT KeyNotifyProcessEvent;
+ LIST_ENTRY NotifyList;
+ EFI_EVENT KeyNotifyProcessEvent;
//
// Non-spacing key list
//
- LIST_ENTRY NsKeyList;
- USB_NS_KEY *CurrentNsKey;
- EFI_KEY_DESCRIPTOR *KeyConvertionTable;
- EFI_EVENT KeyboardLayoutEvent;
+ LIST_ENTRY NsKeyList;
+ USB_NS_KEY *CurrentNsKey;
+ EFI_KEY_DESCRIPTOR *KeyConvertionTable;
+ EFI_EVENT KeyboardLayoutEvent;
} USB_KB_DEV;
//
@@ -175,23 +175,24 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gUsbKeyboardComponentName2;
// So the number of valid non-modifier USB keycodes is 0x62, and the number of
// valid keycodes is 0x6A.
//
-#define NUMBER_OF_VALID_NON_MODIFIER_USB_KEYCODE 0x62
-#define NUMBER_OF_VALID_USB_KEYCODE 0x6A
+#define NUMBER_OF_VALID_NON_MODIFIER_USB_KEYCODE 0x62
+#define NUMBER_OF_VALID_USB_KEYCODE 0x6A
//
// 0x0 to 0x3 are reserved for typical keyboard status or keyboard errors.
//
-#define USBKBD_VALID_KEYCODE(Key) ((UINT8) (Key) > 3)
+#define USBKBD_VALID_KEYCODE(Key) ((UINT8) (Key) > 3)
typedef struct {
- UINT8 NumLock : 1;
- UINT8 CapsLock : 1;
- UINT8 ScrollLock : 1;
- UINT8 Resrvd : 5;
+ UINT8 NumLock : 1;
+ UINT8 CapsLock : 1;
+ UINT8 ScrollLock : 1;
+ UINT8 Resrvd : 5;
} LED_MAP;
//
// Functions of Driver Binding Protocol
//
+
/**
Check whether USB keyboard driver supports this device.
@@ -206,9 +207,9 @@ typedef struct {
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -231,9 +232,9 @@ USBKeyboardDriverBindingSupported (
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -254,15 +255,16 @@ USBKeyboardDriverBindingStart (
EFI_STATUS
EFIAPI
USBKeyboardDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
// EFI Component Name Functions
//
+
/**
Retrieves a Unicode string that is the user readable name of the driver.
@@ -366,16 +368,17 @@ UsbKeyboardComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbKeyboardComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
//
// Functions of Simple Text Input Protocol
//
+
/**
Reset the input device and optionally run diagnostics
@@ -394,8 +397,8 @@ UsbKeyboardComponentNameGetControllerName (
EFI_STATUS
EFIAPI
USBKeyboardReset (
- IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -414,13 +417,14 @@ USBKeyboardReset (
EFI_STATUS
EFIAPI
USBKeyboardReadKeyStroke (
- IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
- OUT EFI_INPUT_KEY *Key
+ IN EFI_SIMPLE_TEXT_INPUT_PROTOCOL *This,
+ OUT EFI_INPUT_KEY *Key
);
//
// Simple Text Input Ex protocol functions
//
+
/**
Resets the input device hardware.
@@ -467,8 +471,8 @@ USBKeyboardResetEx (
EFI_STATUS
EFIAPI
USBKeyboardReadKeyStrokeEx (
- IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
- OUT EFI_KEY_DATA *KeyData
+ IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
+ OUT EFI_KEY_DATA *KeyData
);
/**
@@ -549,8 +553,8 @@ USBKeyboardUnregisterKeyNotify (
VOID
EFIAPI
USBKeyboardWaitForKey (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -564,7 +568,7 @@ USBKeyboardWaitForKey (
**/
EFI_STATUS
KbdFreeNotifyList (
- IN OUT LIST_ENTRY *NotifyList
+ IN OUT LIST_ENTRY *NotifyList
);
/**
@@ -592,8 +596,8 @@ IsKeyRegistered (
VOID
EFIAPI
USBKeyboardTimerHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -605,9 +609,8 @@ USBKeyboardTimerHandler (
VOID
EFIAPI
KeyNotifyProcessHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
#endif
-
diff --git a/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.c b/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.c
index 5faf82ea57..5a94a4dda7 100644
--- a/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.c
+++ b/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.c
@@ -18,125 +18,125 @@ USB_KEYBOARD_LAYOUT_PACK_BIN mUsbKeyboardLayoutBin = {
sizeof (USB_KEYBOARD_LAYOUT_PACK_BIN) - sizeof (UINT32),
EFI_HII_PACKAGE_KEYBOARD_LAYOUT
},
- 1, // LayoutCount
- sizeof (USB_KEYBOARD_LAYOUT_PACK_BIN) - sizeof (UINT32) - sizeof (EFI_HII_PACKAGE_HEADER) - sizeof (UINT16), // LayoutLength
- USB_KEYBOARD_LAYOUT_KEY_GUID, // KeyGuid
+ 1, // LayoutCount
+ sizeof (USB_KEYBOARD_LAYOUT_PACK_BIN) - sizeof (UINT32) - sizeof (EFI_HII_PACKAGE_HEADER) - sizeof (UINT16), // LayoutLength
+ USB_KEYBOARD_LAYOUT_KEY_GUID, // KeyGuid
sizeof (UINT16) + sizeof (EFI_GUID) + sizeof (UINT32) + sizeof (UINT8) + (USB_KEYBOARD_KEY_COUNT * sizeof (EFI_KEY_DESCRIPTOR)), // LayoutDescriptorStringOffset
- USB_KEYBOARD_KEY_COUNT, // DescriptorCount
+ USB_KEYBOARD_KEY_COUNT, // DescriptorCount
{
//
// EFI_KEY_DESCRIPTOR (total number is USB_KEYBOARD_KEY_COUNT)
//
- {EfiKeyC1, 'a', 'A', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB5, 'b', 'B', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB3, 'c', 'C', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC3, 'd', 'D', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD3, 'e', 'E', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC4, 'f', 'F', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC5, 'g', 'G', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC6, 'h', 'H', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD8, 'i', 'I', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC7, 'j', 'J', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC8, 'k', 'K', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC9, 'l', 'L', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB7, 'm', 'M', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB6, 'n', 'N', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD9, 'o', 'O', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD10, 'p', 'P', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD1, 'q', 'Q', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD4, 'r', 'R', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyC2, 's', 'S', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD5, 't', 'T', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD7, 'u', 'U', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB4, 'v', 'V', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD2, 'w', 'W', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB2, 'x', 'X', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyD6, 'y', 'Y', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyB1, 'z', 'Z', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK},
- {EfiKeyE1, '1', '!', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE2, '2', '@', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE3, '3', '#', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE4, '4', '$', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE5, '5', '%', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE6, '6', '^', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE7, '7', '&', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE8, '8', '*', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE9, '9', '(', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE10, '0', ')', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyEnter, 0x0d, 0x0d, 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyEsc, 0x1b, 0x1b, 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyBackSpace, 0x08, 0x08, 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyTab, 0x09, 0x09, 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeySpaceBar, ' ', ' ', 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyE11, '-', '_', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE12, '=', '+', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyD11, '[', '{', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyD12, ']', '}', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyD13, '\\', '|', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyC12, '\\', '|', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyC10, ';', ':', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyC11, '\'', '"', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyE0, '`', '~', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyB8, ',', '<', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyB9, '.', '>', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyB10, '/', '?', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT},
- {EfiKeyCapsLock, 0x00, 0x00, 0, 0, EFI_CAPS_LOCK_MODIFIER, 0},
- {EfiKeyF1, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_ONE_MODIFIER, 0},
- {EfiKeyF2, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TWO_MODIFIER, 0},
- {EfiKeyF3, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_THREE_MODIFIER, 0},
- {EfiKeyF4, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_FOUR_MODIFIER, 0},
- {EfiKeyF5, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_FIVE_MODIFIER, 0},
- {EfiKeyF6, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_SIX_MODIFIER, 0},
- {EfiKeyF7, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_SEVEN_MODIFIER, 0},
- {EfiKeyF8, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_EIGHT_MODIFIER, 0},
- {EfiKeyF9, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_NINE_MODIFIER, 0},
- {EfiKeyF10, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TEN_MODIFIER, 0},
- {EfiKeyF11, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_ELEVEN_MODIFIER, 0},
- {EfiKeyF12, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TWELVE_MODIFIER, 0},
- {EfiKeyPrint, 0x00, 0x00, 0, 0, EFI_PRINT_MODIFIER, 0},
- {EfiKeySLck, 0x00, 0x00, 0, 0, EFI_SCROLL_LOCK_MODIFIER, 0},
- {EfiKeyPause, 0x00, 0x00, 0, 0, EFI_PAUSE_MODIFIER, 0},
- {EfiKeyIns, 0x00, 0x00, 0, 0, EFI_INSERT_MODIFIER, 0},
- {EfiKeyHome, 0x00, 0x00, 0, 0, EFI_HOME_MODIFIER, 0},
- {EfiKeyPgUp, 0x00, 0x00, 0, 0, EFI_PAGE_UP_MODIFIER, 0},
- {EfiKeyDel, 0x00, 0x00, 0, 0, EFI_DELETE_MODIFIER, 0},
- {EfiKeyEnd, 0x00, 0x00, 0, 0, EFI_END_MODIFIER, 0},
- {EfiKeyPgDn, 0x00, 0x00, 0, 0, EFI_PAGE_DOWN_MODIFIER, 0},
- {EfiKeyRightArrow, 0x00, 0x00, 0, 0, EFI_RIGHT_ARROW_MODIFIER, 0},
- {EfiKeyLeftArrow, 0x00, 0x00, 0, 0, EFI_LEFT_ARROW_MODIFIER, 0},
- {EfiKeyDownArrow, 0x00, 0x00, 0, 0, EFI_DOWN_ARROW_MODIFIER, 0},
- {EfiKeyUpArrow, 0x00, 0x00, 0, 0, EFI_UP_ARROW_MODIFIER, 0},
- {EfiKeyNLck, 0x00, 0x00, 0, 0, EFI_NUM_LOCK_MODIFIER, 0},
- {EfiKeySlash, '/', '/', 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyAsterisk, '*', '*', 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyMinus, '-', '-', 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyPlus, '+', '+', 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyEnter, 0x0d, 0x0d, 0, 0, EFI_NULL_MODIFIER, 0},
- {EfiKeyOne, '1', '1', 0, 0, EFI_END_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyTwo, '2', '2', 0, 0, EFI_DOWN_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyThree, '3', '3', 0, 0, EFI_PAGE_DOWN_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyFour, '4', '4', 0, 0, EFI_LEFT_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyFive, '5', '5', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeySix, '6', '6', 0, 0, EFI_RIGHT_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeySeven, '7', '7', 0, 0, EFI_HOME_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyEight, '8', '8', 0, 0, EFI_UP_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyNine, '9', '9', 0, 0, EFI_PAGE_UP_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyZero, '0', '0', 0, 0, EFI_INSERT_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyPeriod, '.', '.', 0, 0, EFI_DELETE_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK},
- {EfiKeyA4, 0x00, 0x00, 0, 0, EFI_MENU_MODIFIER, 0},
- {EfiKeyLCtrl, 0, 0, 0, 0, EFI_LEFT_CONTROL_MODIFIER, 0},
- {EfiKeyLShift, 0, 0, 0, 0, EFI_LEFT_SHIFT_MODIFIER, 0},
- {EfiKeyLAlt, 0, 0, 0, 0, EFI_LEFT_ALT_MODIFIER, 0},
- {EfiKeyA0, 0, 0, 0, 0, EFI_LEFT_LOGO_MODIFIER, 0},
- {EfiKeyRCtrl, 0, 0, 0, 0, EFI_RIGHT_CONTROL_MODIFIER, 0},
- {EfiKeyRShift, 0, 0, 0, 0, EFI_RIGHT_SHIFT_MODIFIER, 0},
- {EfiKeyA2, 0, 0, 0, 0, EFI_RIGHT_ALT_MODIFIER, 0},
- {EfiKeyA3, 0, 0, 0, 0, EFI_RIGHT_LOGO_MODIFIER, 0},
+ { EfiKeyC1, 'a', 'A', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB5, 'b', 'B', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB3, 'c', 'C', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC3, 'd', 'D', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD3, 'e', 'E', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC4, 'f', 'F', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC5, 'g', 'G', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC6, 'h', 'H', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD8, 'i', 'I', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC7, 'j', 'J', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC8, 'k', 'K', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC9, 'l', 'L', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB7, 'm', 'M', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB6, 'n', 'N', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD9, 'o', 'O', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD10, 'p', 'P', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD1, 'q', 'Q', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD4, 'r', 'R', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyC2, 's', 'S', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD5, 't', 'T', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD7, 'u', 'U', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB4, 'v', 'V', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD2, 'w', 'W', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB2, 'x', 'X', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyD6, 'y', 'Y', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyB1, 'z', 'Z', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_CAPS_LOCK },
+ { EfiKeyE1, '1', '!', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE2, '2', '@', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE3, '3', '#', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE4, '4', '$', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE5, '5', '%', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE6, '6', '^', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE7, '7', '&', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE8, '8', '*', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE9, '9', '(', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE10, '0', ')', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyEnter, 0x0d, 0x0d, 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyEsc, 0x1b, 0x1b, 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyBackSpace, 0x08, 0x08, 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyTab, 0x09, 0x09, 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeySpaceBar, ' ', ' ', 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyE11, '-', '_', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE12, '=', '+', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyD11, '[', '{', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyD12, ']', '}', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyD13, '\\', '|', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyC12, '\\', '|', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyC10, ';', ':', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyC11, '\'', '"', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyE0, '`', '~', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyB8, ',', '<', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyB9, '.', '>', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyB10, '/', '?', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT },
+ { EfiKeyCapsLock, 0x00, 0x00, 0, 0, EFI_CAPS_LOCK_MODIFIER, 0 },
+ { EfiKeyF1, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_ONE_MODIFIER, 0 },
+ { EfiKeyF2, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TWO_MODIFIER, 0 },
+ { EfiKeyF3, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_THREE_MODIFIER, 0 },
+ { EfiKeyF4, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_FOUR_MODIFIER, 0 },
+ { EfiKeyF5, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_FIVE_MODIFIER, 0 },
+ { EfiKeyF6, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_SIX_MODIFIER, 0 },
+ { EfiKeyF7, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_SEVEN_MODIFIER, 0 },
+ { EfiKeyF8, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_EIGHT_MODIFIER, 0 },
+ { EfiKeyF9, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_NINE_MODIFIER, 0 },
+ { EfiKeyF10, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TEN_MODIFIER, 0 },
+ { EfiKeyF11, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_ELEVEN_MODIFIER, 0 },
+ { EfiKeyF12, 0x00, 0x00, 0, 0, EFI_FUNCTION_KEY_TWELVE_MODIFIER, 0 },
+ { EfiKeyPrint, 0x00, 0x00, 0, 0, EFI_PRINT_MODIFIER, 0 },
+ { EfiKeySLck, 0x00, 0x00, 0, 0, EFI_SCROLL_LOCK_MODIFIER, 0 },
+ { EfiKeyPause, 0x00, 0x00, 0, 0, EFI_PAUSE_MODIFIER, 0 },
+ { EfiKeyIns, 0x00, 0x00, 0, 0, EFI_INSERT_MODIFIER, 0 },
+ { EfiKeyHome, 0x00, 0x00, 0, 0, EFI_HOME_MODIFIER, 0 },
+ { EfiKeyPgUp, 0x00, 0x00, 0, 0, EFI_PAGE_UP_MODIFIER, 0 },
+ { EfiKeyDel, 0x00, 0x00, 0, 0, EFI_DELETE_MODIFIER, 0 },
+ { EfiKeyEnd, 0x00, 0x00, 0, 0, EFI_END_MODIFIER, 0 },
+ { EfiKeyPgDn, 0x00, 0x00, 0, 0, EFI_PAGE_DOWN_MODIFIER, 0 },
+ { EfiKeyRightArrow, 0x00, 0x00, 0, 0, EFI_RIGHT_ARROW_MODIFIER, 0 },
+ { EfiKeyLeftArrow, 0x00, 0x00, 0, 0, EFI_LEFT_ARROW_MODIFIER, 0 },
+ { EfiKeyDownArrow, 0x00, 0x00, 0, 0, EFI_DOWN_ARROW_MODIFIER, 0 },
+ { EfiKeyUpArrow, 0x00, 0x00, 0, 0, EFI_UP_ARROW_MODIFIER, 0 },
+ { EfiKeyNLck, 0x00, 0x00, 0, 0, EFI_NUM_LOCK_MODIFIER, 0 },
+ { EfiKeySlash, '/', '/', 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyAsterisk, '*', '*', 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyMinus, '-', '-', 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyPlus, '+', '+', 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyEnter, 0x0d, 0x0d, 0, 0, EFI_NULL_MODIFIER, 0 },
+ { EfiKeyOne, '1', '1', 0, 0, EFI_END_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyTwo, '2', '2', 0, 0, EFI_DOWN_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyThree, '3', '3', 0, 0, EFI_PAGE_DOWN_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyFour, '4', '4', 0, 0, EFI_LEFT_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyFive, '5', '5', 0, 0, EFI_NULL_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeySix, '6', '6', 0, 0, EFI_RIGHT_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeySeven, '7', '7', 0, 0, EFI_HOME_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyEight, '8', '8', 0, 0, EFI_UP_ARROW_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyNine, '9', '9', 0, 0, EFI_PAGE_UP_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyZero, '0', '0', 0, 0, EFI_INSERT_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyPeriod, '.', '.', 0, 0, EFI_DELETE_MODIFIER, EFI_AFFECTED_BY_STANDARD_SHIFT | EFI_AFFECTED_BY_NUM_LOCK },
+ { EfiKeyA4, 0x00, 0x00, 0, 0, EFI_MENU_MODIFIER, 0 },
+ { EfiKeyLCtrl, 0, 0, 0, 0, EFI_LEFT_CONTROL_MODIFIER, 0 },
+ { EfiKeyLShift, 0, 0, 0, 0, EFI_LEFT_SHIFT_MODIFIER, 0 },
+ { EfiKeyLAlt, 0, 0, 0, 0, EFI_LEFT_ALT_MODIFIER, 0 },
+ { EfiKeyA0, 0, 0, 0, 0, EFI_LEFT_LOGO_MODIFIER, 0 },
+ { EfiKeyRCtrl, 0, 0, 0, 0, EFI_RIGHT_CONTROL_MODIFIER, 0 },
+ { EfiKeyRShift, 0, 0, 0, 0, EFI_RIGHT_SHIFT_MODIFIER, 0 },
+ { EfiKeyA2, 0, 0, 0, 0, EFI_RIGHT_ALT_MODIFIER, 0 },
+ { EfiKeyA3, 0, 0, 0, 0, EFI_RIGHT_LOGO_MODIFIER, 0 },
},
- 1, // DescriptionCount
- {'e', 'n', '-', 'U', 'S'}, // RFC4646 language code
- ' ', // Space
- {'E', 'n', 'g', 'l', 'i', 's', 'h', ' ', 'K', 'e', 'y', 'b', 'o', 'a', 'r', 'd', '\0'}, // DescriptionString[]
+ 1, // DescriptionCount
+ { 'e', 'n', '-', 'U', 'S' }, // RFC4646 language code
+ ' ', // Space
+ { 'E', 'n', 'g', 'l', 'i', 's', 'h', ' ', 'K', 'e', 'y', 'b', 'o', 'a', 'r', 'd', '\0' }, // DescriptionString[]
};
//
@@ -144,7 +144,7 @@ USB_KEYBOARD_LAYOUT_PACK_BIN mUsbKeyboardLayoutBin = {
// EFI_KEY is defined in UEFI spec.
// USB Keycode is defined in USB HID Firmware spec.
//
-UINT8 EfiKeyToUsbKeyCodeConvertionTable[] = {
+UINT8 EfiKeyToUsbKeyCodeConvertionTable[] = {
0xe0, // EfiKeyLCtrl
0xe3, // EfiKeyA0
0xe2, // EfiKeyLAlt
@@ -256,7 +256,7 @@ UINT8 EfiKeyToUsbKeyCodeConvertionTable[] = {
// Keyboard modifier value to EFI Scan Code conversion table
// EFI Scan Code and the modifier values are defined in UEFI spec.
//
-UINT8 ModifierValueToEfiScanCodeConvertionTable[] = {
+UINT8 ModifierValueToEfiScanCodeConvertionTable[] = {
SCAN_NULL, // EFI_NULL_MODIFIER
SCAN_NULL, // EFI_LEFT_CONTROL_MODIFIER
SCAN_NULL, // EFI_RIGHT_CONTROL_MODIFIER
@@ -314,12 +314,12 @@ UINT8 ModifierValueToEfiScanCodeConvertionTable[] = {
**/
EFI_STATUS
InstallDefaultKeyboardLayout (
- IN OUT USB_KB_DEV *UsbKeyboardDevice
+ IN OUT USB_KB_DEV *UsbKeyboardDevice
)
{
- EFI_STATUS Status;
- EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
- EFI_HII_HANDLE HiiHandle;
+ EFI_STATUS Status;
+ EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
+ EFI_HII_HANDLE HiiHandle;
//
// Locate Hii database protocol
@@ -327,7 +327,7 @@ InstallDefaultKeyboardLayout (
Status = gBS->LocateProtocol (
&gEfiHiiDatabaseProtocolGuid,
NULL,
- (VOID **) &HiiDatabase
+ (VOID **)&HiiDatabase
);
if (EFI_ERROR (Status)) {
return Status;
@@ -354,7 +354,6 @@ InstallDefaultKeyboardLayout (
return Status;
}
-
/**
Uses USB I/O to check whether the device is a USB keyboard device.
@@ -366,7 +365,7 @@ InstallDefaultKeyboardLayout (
**/
BOOLEAN
IsUSBKeyboard (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
)
{
EFI_STATUS Status;
@@ -384,10 +383,11 @@ IsUSBKeyboard (
return FALSE;
}
- if (InterfaceDescriptor.InterfaceClass == CLASS_HID &&
- InterfaceDescriptor.InterfaceSubClass == SUBCLASS_BOOT &&
- InterfaceDescriptor.InterfaceProtocol == PROTOCOL_KEYBOARD
- ) {
+ if ((InterfaceDescriptor.InterfaceClass == CLASS_HID) &&
+ (InterfaceDescriptor.InterfaceSubClass == SUBCLASS_BOOT) &&
+ (InterfaceDescriptor.InterfaceProtocol == PROTOCOL_KEYBOARD)
+ )
+ {
return TRUE;
}
@@ -406,10 +406,10 @@ GetCurrentKeyboardLayout (
VOID
)
{
- EFI_STATUS Status;
- EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
- EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
- UINT16 Length;
+ EFI_STATUS Status;
+ EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
+ EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
+ UINT16 Length;
//
// Locate HII Database Protocol
@@ -417,7 +417,7 @@ GetCurrentKeyboardLayout (
Status = gBS->LocateProtocol (
&gEfiHiiDatabaseProtocolGuid,
NULL,
- (VOID **) &HiiDatabase
+ (VOID **)&HiiDatabase
);
if (EFI_ERROR (Status)) {
return NULL;
@@ -426,14 +426,14 @@ GetCurrentKeyboardLayout (
//
// Get current keyboard layout from HII database
//
- Length = 0;
+ Length = 0;
KeyboardLayout = NULL;
- Status = HiiDatabase->GetKeyboardLayout (
- HiiDatabase,
- NULL,
- &Length,
- KeyboardLayout
- );
+ Status = HiiDatabase->GetKeyboardLayout (
+ HiiDatabase,
+ NULL,
+ &Length,
+ KeyboardLayout
+ );
if (Status == EFI_BUFFER_TOO_SMALL) {
KeyboardLayout = AllocatePool (Length);
ASSERT (KeyboardLayout != NULL);
@@ -465,8 +465,8 @@ GetCurrentKeyboardLayout (
**/
EFI_KEY_DESCRIPTOR *
GetKeyDescriptor (
- IN USB_KB_DEV *UsbKeyboardDevice,
- IN UINT8 KeyCode
+ IN USB_KB_DEV *UsbKeyboardDevice,
+ IN UINT8 KeyCode
)
{
UINT8 Index;
@@ -482,9 +482,9 @@ GetKeyDescriptor (
// Calculate the index of Key Descriptor in Key Convertion Table
//
if (KeyCode <= 0x65) {
- Index = (UINT8) (KeyCode - 4);
+ Index = (UINT8)(KeyCode - 4);
} else {
- Index = (UINT8) (KeyCode - 0xe0 + NUMBER_OF_VALID_NON_MODIFIER_USB_KEYCODE);
+ Index = (UINT8)(KeyCode - 0xe0 + NUMBER_OF_VALID_NON_MODIFIER_USB_KEYCODE);
}
return &UsbKeyboardDevice->KeyConvertionTable[Index];
@@ -506,12 +506,12 @@ FindUsbNsKey (
IN EFI_KEY_DESCRIPTOR *KeyDescriptor
)
{
- LIST_ENTRY *Link;
- LIST_ENTRY *NsKeyList;
- USB_NS_KEY *UsbNsKey;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NsKeyList;
+ USB_NS_KEY *UsbNsKey;
NsKeyList = &UsbKeyboardDevice->NsKeyList;
- Link = GetFirstNode (NsKeyList);
+ Link = GetFirstNode (NsKeyList);
while (!IsNull (NsKeyList, Link)) {
UsbNsKey = USB_NS_KEY_FORM_FROM_LINK (Link);
@@ -578,23 +578,23 @@ FindPhysicalKey (
VOID
EFIAPI
SetKeyboardLayoutEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
- EFI_KEY_DESCRIPTOR TempKey;
- EFI_KEY_DESCRIPTOR *KeyDescriptor;
- EFI_KEY_DESCRIPTOR *TableEntry;
- EFI_KEY_DESCRIPTOR *NsKey;
- USB_NS_KEY *UsbNsKey;
- UINTN Index;
- UINTN Index2;
- UINTN KeyCount;
- UINT8 KeyCode;
-
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
+ EFI_KEY_DESCRIPTOR TempKey;
+ EFI_KEY_DESCRIPTOR *KeyDescriptor;
+ EFI_KEY_DESCRIPTOR *TableEntry;
+ EFI_KEY_DESCRIPTOR *NsKey;
+ USB_NS_KEY *UsbNsKey;
+ UINTN Index;
+ UINTN Index2;
+ UINTN KeyCount;
+ UINT8 KeyCode;
+
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
if (UsbKeyboardDevice->Signature != USB_KB_DEV_SIGNATURE) {
return;
}
@@ -611,13 +611,13 @@ SetKeyboardLayoutEvent (
// Re-allocate resource for KeyConvertionTable
//
ReleaseKeyboardLayoutResources (UsbKeyboardDevice);
- UsbKeyboardDevice->KeyConvertionTable = AllocateZeroPool ((NUMBER_OF_VALID_USB_KEYCODE) * sizeof (EFI_KEY_DESCRIPTOR));
+ UsbKeyboardDevice->KeyConvertionTable = AllocateZeroPool ((NUMBER_OF_VALID_USB_KEYCODE)*sizeof (EFI_KEY_DESCRIPTOR));
ASSERT (UsbKeyboardDevice->KeyConvertionTable != NULL);
//
// Traverse the list of key descriptors following the header of EFI_HII_KEYBOARD_LAYOUT
//
- KeyDescriptor = (EFI_KEY_DESCRIPTOR *) (((UINT8 *) KeyboardLayout) + sizeof (EFI_HII_KEYBOARD_LAYOUT));
+ KeyDescriptor = (EFI_KEY_DESCRIPTOR *)(((UINT8 *)KeyboardLayout) + sizeof (EFI_HII_KEYBOARD_LAYOUT));
for (Index = 0; Index < KeyboardLayout->DescriptorCount; Index++) {
//
// Copy from HII keyboard layout package binary for alignment
@@ -627,13 +627,14 @@ SetKeyboardLayoutEvent (
//
// Fill the key into KeyConvertionTable, whose index is calculated from USB keycode.
//
- KeyCode = EfiKeyToUsbKeyCodeConvertionTable [(UINT8) (TempKey.Key)];
+ KeyCode = EfiKeyToUsbKeyCodeConvertionTable[(UINT8)(TempKey.Key)];
TableEntry = GetKeyDescriptor (UsbKeyboardDevice, KeyCode);
if (TableEntry == NULL) {
ReleaseKeyboardLayoutResources (UsbKeyboardDevice);
FreePool (KeyboardLayout);
return;
}
+
CopyMem (TableEntry, KeyDescriptor, sizeof (EFI_KEY_DESCRIPTOR));
//
@@ -647,29 +648,30 @@ SetKeyboardLayoutEvent (
// Search for sequential children physical key definitions
//
KeyCount = 0;
- NsKey = KeyDescriptor + 1;
- for (Index2 = (UINT8) Index + 1; Index2 < KeyboardLayout->DescriptorCount; Index2++) {
+ NsKey = KeyDescriptor + 1;
+ for (Index2 = (UINT8)Index + 1; Index2 < KeyboardLayout->DescriptorCount; Index2++) {
CopyMem (&TempKey, NsKey, sizeof (EFI_KEY_DESCRIPTOR));
if (TempKey.Modifier == EFI_NS_KEY_DEPENDENCY_MODIFIER) {
KeyCount++;
} else {
break;
}
+
NsKey++;
}
UsbNsKey->Signature = USB_NS_KEY_SIGNATURE;
- UsbNsKey->KeyCount = KeyCount;
- UsbNsKey->NsKey = AllocateCopyPool (
- (KeyCount + 1) * sizeof (EFI_KEY_DESCRIPTOR),
- KeyDescriptor
- );
+ UsbNsKey->KeyCount = KeyCount;
+ UsbNsKey->NsKey = AllocateCopyPool (
+ (KeyCount + 1) * sizeof (EFI_KEY_DESCRIPTOR),
+ KeyDescriptor
+ );
InsertTailList (&UsbKeyboardDevice->NsKeyList, &UsbNsKey->Link);
//
// Skip over the child physical keys
//
- Index += KeyCount;
+ Index += KeyCount;
KeyDescriptor += KeyCount;
}
@@ -679,7 +681,7 @@ SetKeyboardLayoutEvent (
//
// There are two EfiKeyEnter, duplicate its key descriptor
//
- TableEntry = GetKeyDescriptor (UsbKeyboardDevice, 0x58);
+ TableEntry = GetKeyDescriptor (UsbKeyboardDevice, 0x58);
KeyDescriptor = GetKeyDescriptor (UsbKeyboardDevice, 0x28);
CopyMem (TableEntry, KeyDescriptor, sizeof (EFI_KEY_DESCRIPTOR));
@@ -694,19 +696,20 @@ SetKeyboardLayoutEvent (
**/
VOID
ReleaseKeyboardLayoutResources (
- IN OUT USB_KB_DEV *UsbKeyboardDevice
+ IN OUT USB_KB_DEV *UsbKeyboardDevice
)
{
- USB_NS_KEY *UsbNsKey;
- LIST_ENTRY *Link;
+ USB_NS_KEY *UsbNsKey;
+ LIST_ENTRY *Link;
if (UsbKeyboardDevice->KeyConvertionTable != NULL) {
FreePool (UsbKeyboardDevice->KeyConvertionTable);
}
+
UsbKeyboardDevice->KeyConvertionTable = NULL;
while (!IsListEmpty (&UsbKeyboardDevice->NsKeyList)) {
- Link = GetFirstNode (&UsbKeyboardDevice->NsKeyList);
+ Link = GetFirstNode (&UsbKeyboardDevice->NsKeyList);
UsbNsKey = USB_NS_KEY_FORM_FROM_LINK (Link);
RemoveEntryList (&UsbNsKey->Link);
@@ -732,17 +735,17 @@ ReleaseKeyboardLayoutResources (
**/
EFI_STATUS
InitKeyboardLayout (
- OUT USB_KB_DEV *UsbKeyboardDevice
+ OUT USB_KB_DEV *UsbKeyboardDevice
)
{
- EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
- EFI_STATUS Status;
+ EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout;
+ EFI_STATUS Status;
- UsbKeyboardDevice->KeyConvertionTable = AllocateZeroPool ((NUMBER_OF_VALID_USB_KEYCODE) * sizeof (EFI_KEY_DESCRIPTOR));
+ UsbKeyboardDevice->KeyConvertionTable = AllocateZeroPool ((NUMBER_OF_VALID_USB_KEYCODE)*sizeof (EFI_KEY_DESCRIPTOR));
ASSERT (UsbKeyboardDevice->KeyConvertionTable != NULL);
InitializeListHead (&UsbKeyboardDevice->NsKeyList);
- UsbKeyboardDevice->CurrentNsKey = NULL;
+ UsbKeyboardDevice->CurrentNsKey = NULL;
UsbKeyboardDevice->KeyboardLayoutEvent = NULL;
//
@@ -776,6 +779,7 @@ InitKeyboardLayout (
//
return EFI_NOT_READY;
}
+
//
// If no keyboard layout can be retrieved from HII database, and default layout
// is enabled, then load the default keyboard layout.
@@ -786,7 +790,6 @@ InitKeyboardLayout (
return EFI_SUCCESS;
}
-
/**
Initialize USB keyboard device and all private data structures.
@@ -798,13 +801,13 @@ InitKeyboardLayout (
**/
EFI_STATUS
InitUSBKeyboard (
- IN OUT USB_KB_DEV *UsbKeyboardDevice
+ IN OUT USB_KB_DEV *UsbKeyboardDevice
)
{
- UINT16 ConfigValue;
- UINT8 Protocol;
- EFI_STATUS Status;
- UINT32 TransferResult;
+ UINT16 ConfigValue;
+ UINT8 Protocol;
+ EFI_STATUS Status;
+ UINT32 TransferResult;
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
EFI_PROGRESS_CODE,
@@ -868,12 +871,12 @@ InitUSBKeyboard (
);
}
- UsbKeyboardDevice->CtrlOn = FALSE;
- UsbKeyboardDevice->AltOn = FALSE;
- UsbKeyboardDevice->ShiftOn = FALSE;
- UsbKeyboardDevice->NumLockOn = FALSE;
- UsbKeyboardDevice->CapsOn = FALSE;
- UsbKeyboardDevice->ScrollOn = FALSE;
+ UsbKeyboardDevice->CtrlOn = FALSE;
+ UsbKeyboardDevice->AltOn = FALSE;
+ UsbKeyboardDevice->ShiftOn = FALSE;
+ UsbKeyboardDevice->NumLockOn = FALSE;
+ UsbKeyboardDevice->CapsOn = FALSE;
+ UsbKeyboardDevice->ScrollOn = FALSE;
UsbKeyboardDevice->LeftCtrlOn = FALSE;
UsbKeyboardDevice->LeftAltOn = FALSE;
@@ -886,7 +889,7 @@ InitUSBKeyboard (
UsbKeyboardDevice->MenuKeyOn = FALSE;
UsbKeyboardDevice->SysReqOn = FALSE;
- UsbKeyboardDevice->AltGrOn = FALSE;
+ UsbKeyboardDevice->AltGrOn = FALSE;
UsbKeyboardDevice->CurrentNsKey = NULL;
@@ -932,7 +935,6 @@ InitUSBKeyboard (
return EFI_SUCCESS;
}
-
/**
Handler function for USB keyboard's asynchronous interrupt transfer.
@@ -954,32 +956,32 @@ InitUSBKeyboard (
EFI_STATUS
EFIAPI
KeyboardHandler (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
)
{
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 *CurKeyCodeBuffer;
- UINT8 *OldKeyCodeBuffer;
- UINT8 CurModifierMap;
- UINT8 OldModifierMap;
- UINT8 Mask;
- UINTN Index;
- UINT8 Index2;
- BOOLEAN KeyRelease;
- BOOLEAN KeyPress;
- USB_KEY UsbKey;
- UINT8 NewRepeatKey;
- UINT32 UsbStatus;
- EFI_KEY_DESCRIPTOR *KeyDescriptor;
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 *CurKeyCodeBuffer;
+ UINT8 *OldKeyCodeBuffer;
+ UINT8 CurModifierMap;
+ UINT8 OldModifierMap;
+ UINT8 Mask;
+ UINTN Index;
+ UINT8 Index2;
+ BOOLEAN KeyRelease;
+ BOOLEAN KeyPress;
+ USB_KEY UsbKey;
+ UINT8 NewRepeatKey;
+ UINT32 UsbStatus;
+ EFI_KEY_DESCRIPTOR *KeyDescriptor;
ASSERT (Context != NULL);
NewRepeatKey = 0;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
UsbIo = UsbKeyboardDevice->UsbIo;
//
@@ -1001,10 +1003,10 @@ KeyboardHandler (
UsbKeyboardDevice->RepeatKey = 0;
gBS->SetTimer (
- UsbKeyboardDevice->RepeatTimer,
- TimerCancel,
- USBKBD_REPEAT_RATE
- );
+ UsbKeyboardDevice->RepeatTimer,
+ TimerCancel,
+ USBKBD_REPEAT_RATE
+ );
if ((Result & EFI_USB_ERR_STALL) == EFI_USB_ERR_STALL) {
UsbClearEndpointHalt (
@@ -1042,7 +1044,7 @@ KeyboardHandler (
//
// If no error and no data, just return EFI_SUCCESS.
//
- if (DataLength == 0 || Data == NULL) {
+ if ((DataLength == 0) || (Data == NULL)) {
return EFI_SUCCESS;
}
@@ -1057,8 +1059,8 @@ KeyboardHandler (
return EFI_DEVICE_ERROR;
}
- CurKeyCodeBuffer = (UINT8 *) Data;
- OldKeyCodeBuffer = UsbKeyboardDevice->LastKeyCodeArray;
+ CurKeyCodeBuffer = (UINT8 *)Data;
+ OldKeyCodeBuffer = UsbKeyboardDevice->LastKeyCodeArray;
//
// Checks for new key stroke.
@@ -1079,8 +1081,8 @@ KeyboardHandler (
//
// Parse the modifier key, which is the first byte of keyboard input report.
//
- CurModifierMap = CurKeyCodeBuffer[0];
- OldModifierMap = OldKeyCodeBuffer[0];
+ CurModifierMap = CurKeyCodeBuffer[0];
+ OldModifierMap = OldKeyCodeBuffer[0];
//
// Handle modifier key's pressing or releasing situation.
@@ -1095,15 +1097,15 @@ KeyboardHandler (
// Bit7: Right GUI, Keycode: 0xe7
//
for (Index = 0; Index < 8; Index++) {
- Mask = (UINT8) (1 << Index);
+ Mask = (UINT8)(1 << Index);
if ((CurModifierMap & Mask) != (OldModifierMap & Mask)) {
//
// If current modifier key is up, then CurModifierMap & Mask = 0;
// otherwise it is a non-zero value.
// Insert the changed modifier key into key buffer.
//
- UsbKey.KeyCode = (UINT8) (0xe0 + Index);
- UsbKey.Down = (BOOLEAN) ((CurModifierMap & Mask) != 0);
+ UsbKey.KeyCode = (UINT8)(0xe0 + Index);
+ UsbKey.Down = (BOOLEAN)((CurModifierMap & Mask) != 0);
Enqueue (&UsbKeyboardDevice->UsbKeyQueue, &UsbKey, sizeof (UsbKey));
}
}
@@ -1114,17 +1116,16 @@ KeyboardHandler (
//
KeyRelease = FALSE;
for (Index = 2; Index < 8; Index++) {
-
if (!USBKBD_VALID_KEYCODE (OldKeyCodeBuffer[Index])) {
continue;
}
+
//
// For any key in old keycode buffer, if it is not in current keycode buffer,
// then it is released. Otherwise, it is not released.
//
KeyRelease = TRUE;
for (Index2 = 2; Index2 < 8; Index2++) {
-
if (!USBKBD_VALID_KEYCODE (CurKeyCodeBuffer[Index2])) {
continue;
}
@@ -1164,17 +1165,16 @@ KeyboardHandler (
//
KeyPress = FALSE;
for (Index = 2; Index < 8; Index++) {
-
if (!USBKBD_VALID_KEYCODE (CurKeyCodeBuffer[Index])) {
continue;
}
+
//
// For any key in current keycode buffer, if it is not in old keycode buffer,
// then it is pressed. Otherwise, it is not pressed.
//
KeyPress = TRUE;
for (Index2 = 2; Index2 < 8; Index2++) {
-
if (!USBKBD_VALID_KEYCODE (OldKeyCodeBuffer[Index2])) {
continue;
}
@@ -1198,7 +1198,7 @@ KeyboardHandler (
continue;
}
- if (KeyDescriptor->Modifier == EFI_NUM_LOCK_MODIFIER || KeyDescriptor->Modifier == EFI_CAPS_LOCK_MODIFIER) {
+ if ((KeyDescriptor->Modifier == EFI_NUM_LOCK_MODIFIER) || (KeyDescriptor->Modifier == EFI_CAPS_LOCK_MODIFIER)) {
//
// For NumLock or CapsLock pressed, there is no need to handle repeat key for them.
//
@@ -1207,7 +1207,7 @@ KeyboardHandler (
//
// Prepare new repeat key, and clear the original one.
//
- NewRepeatKey = CurKeyCodeBuffer[Index];
+ NewRepeatKey = CurKeyCodeBuffer[Index];
UsbKeyboardDevice->RepeatKey = 0;
}
}
@@ -1241,7 +1241,6 @@ KeyboardHandler (
return EFI_SUCCESS;
}
-
/**
Retrieves a USB keycode after parsing the raw data in keyboard buffer.
@@ -1258,7 +1257,7 @@ KeyboardHandler (
EFI_STATUS
USBParseKey (
IN OUT USB_KB_DEV *UsbKeyboardDevice,
- OUT UINT8 *KeyCode
+ OUT UINT8 *KeyCode
)
{
USB_KEY UsbKey;
@@ -1276,194 +1275,193 @@ USBParseKey (
if (KeyDescriptor == NULL) {
continue;
}
+
if (!UsbKey.Down) {
//
// Key is released.
//
switch (KeyDescriptor->Modifier) {
+ //
+ // Ctrl release
+ //
+ case EFI_LEFT_CONTROL_MODIFIER:
+ UsbKeyboardDevice->LeftCtrlOn = FALSE;
+ UsbKeyboardDevice->CtrlOn = FALSE;
+ break;
+ case EFI_RIGHT_CONTROL_MODIFIER:
+ UsbKeyboardDevice->RightCtrlOn = FALSE;
+ UsbKeyboardDevice->CtrlOn = FALSE;
+ break;
+
+ //
+ // Shift release
+ //
+ case EFI_LEFT_SHIFT_MODIFIER:
+ UsbKeyboardDevice->LeftShiftOn = FALSE;
+ UsbKeyboardDevice->ShiftOn = FALSE;
+ break;
+ case EFI_RIGHT_SHIFT_MODIFIER:
+ UsbKeyboardDevice->RightShiftOn = FALSE;
+ UsbKeyboardDevice->ShiftOn = FALSE;
+ break;
+
+ //
+ // Alt release
+ //
+ case EFI_LEFT_ALT_MODIFIER:
+ UsbKeyboardDevice->LeftAltOn = FALSE;
+ UsbKeyboardDevice->AltOn = FALSE;
+ break;
+ case EFI_RIGHT_ALT_MODIFIER:
+ UsbKeyboardDevice->RightAltOn = FALSE;
+ UsbKeyboardDevice->AltOn = FALSE;
+ break;
+ //
+ // Left Logo release
+ //
+ case EFI_LEFT_LOGO_MODIFIER:
+ UsbKeyboardDevice->LeftLogoOn = FALSE;
+ break;
+
+ //
+ // Right Logo release
+ //
+ case EFI_RIGHT_LOGO_MODIFIER:
+ UsbKeyboardDevice->RightLogoOn = FALSE;
+ break;
+
+ //
+ // Menu key release
+ //
+ case EFI_MENU_MODIFIER:
+ UsbKeyboardDevice->MenuKeyOn = FALSE;
+ break;
+
+ //
+ // SysReq release
+ //
+ case EFI_PRINT_MODIFIER:
+ case EFI_SYS_REQUEST_MODIFIER:
+ UsbKeyboardDevice->SysReqOn = FALSE;
+ break;
+
+ //
+ // AltGr release
+ //
+ case EFI_ALT_GR_MODIFIER:
+ UsbKeyboardDevice->AltGrOn = FALSE;
+ break;
+
+ default:
+ break;
+ }
+
+ continue;
+ }
+
+ //
+ // Analyzes key pressing situation
+ //
+ switch (KeyDescriptor->Modifier) {
//
- // Ctrl release
+ // Ctrl press
//
case EFI_LEFT_CONTROL_MODIFIER:
- UsbKeyboardDevice->LeftCtrlOn = FALSE;
- UsbKeyboardDevice->CtrlOn = FALSE;
+ UsbKeyboardDevice->LeftCtrlOn = TRUE;
+ UsbKeyboardDevice->CtrlOn = TRUE;
break;
case EFI_RIGHT_CONTROL_MODIFIER:
- UsbKeyboardDevice->RightCtrlOn = FALSE;
- UsbKeyboardDevice->CtrlOn = FALSE;
+ UsbKeyboardDevice->RightCtrlOn = TRUE;
+ UsbKeyboardDevice->CtrlOn = TRUE;
break;
//
- // Shift release
+ // Shift press
//
case EFI_LEFT_SHIFT_MODIFIER:
- UsbKeyboardDevice->LeftShiftOn = FALSE;
- UsbKeyboardDevice->ShiftOn = FALSE;
+ UsbKeyboardDevice->LeftShiftOn = TRUE;
+ UsbKeyboardDevice->ShiftOn = TRUE;
break;
case EFI_RIGHT_SHIFT_MODIFIER:
- UsbKeyboardDevice->RightShiftOn = FALSE;
- UsbKeyboardDevice->ShiftOn = FALSE;
+ UsbKeyboardDevice->RightShiftOn = TRUE;
+ UsbKeyboardDevice->ShiftOn = TRUE;
break;
//
- // Alt release
+ // Alt press
//
case EFI_LEFT_ALT_MODIFIER:
- UsbKeyboardDevice->LeftAltOn = FALSE;
- UsbKeyboardDevice->AltOn = FALSE;
+ UsbKeyboardDevice->LeftAltOn = TRUE;
+ UsbKeyboardDevice->AltOn = TRUE;
break;
case EFI_RIGHT_ALT_MODIFIER:
- UsbKeyboardDevice->RightAltOn = FALSE;
- UsbKeyboardDevice->AltOn = FALSE;
+ UsbKeyboardDevice->RightAltOn = TRUE;
+ UsbKeyboardDevice->AltOn = TRUE;
break;
//
- // Left Logo release
+ // Left Logo press
//
case EFI_LEFT_LOGO_MODIFIER:
- UsbKeyboardDevice->LeftLogoOn = FALSE;
+ UsbKeyboardDevice->LeftLogoOn = TRUE;
break;
//
- // Right Logo release
+ // Right Logo press
//
case EFI_RIGHT_LOGO_MODIFIER:
- UsbKeyboardDevice->RightLogoOn = FALSE;
+ UsbKeyboardDevice->RightLogoOn = TRUE;
break;
//
- // Menu key release
+ // Menu key press
//
case EFI_MENU_MODIFIER:
- UsbKeyboardDevice->MenuKeyOn = FALSE;
+ UsbKeyboardDevice->MenuKeyOn = TRUE;
break;
//
- // SysReq release
+ // SysReq press
//
case EFI_PRINT_MODIFIER:
case EFI_SYS_REQUEST_MODIFIER:
- UsbKeyboardDevice->SysReqOn = FALSE;
+ UsbKeyboardDevice->SysReqOn = TRUE;
break;
//
- // AltGr release
+ // AltGr press
//
case EFI_ALT_GR_MODIFIER:
- UsbKeyboardDevice->AltGrOn = FALSE;
+ UsbKeyboardDevice->AltGrOn = TRUE;
break;
- default:
+ case EFI_NUM_LOCK_MODIFIER:
+ //
+ // Toggle NumLock
+ //
+ UsbKeyboardDevice->NumLockOn = (BOOLEAN)(!(UsbKeyboardDevice->NumLockOn));
+ SetKeyLED (UsbKeyboardDevice);
break;
- }
-
- continue;
- }
-
- //
- // Analyzes key pressing situation
- //
- switch (KeyDescriptor->Modifier) {
-
- //
- // Ctrl press
- //
- case EFI_LEFT_CONTROL_MODIFIER:
- UsbKeyboardDevice->LeftCtrlOn = TRUE;
- UsbKeyboardDevice->CtrlOn = TRUE;
- break;
- case EFI_RIGHT_CONTROL_MODIFIER:
- UsbKeyboardDevice->RightCtrlOn = TRUE;
- UsbKeyboardDevice->CtrlOn = TRUE;
- break;
-
- //
- // Shift press
- //
- case EFI_LEFT_SHIFT_MODIFIER:
- UsbKeyboardDevice->LeftShiftOn = TRUE;
- UsbKeyboardDevice->ShiftOn = TRUE;
- break;
- case EFI_RIGHT_SHIFT_MODIFIER:
- UsbKeyboardDevice->RightShiftOn = TRUE;
- UsbKeyboardDevice->ShiftOn = TRUE;
- break;
-
- //
- // Alt press
- //
- case EFI_LEFT_ALT_MODIFIER:
- UsbKeyboardDevice->LeftAltOn = TRUE;
- UsbKeyboardDevice->AltOn = TRUE;
- break;
- case EFI_RIGHT_ALT_MODIFIER:
- UsbKeyboardDevice->RightAltOn = TRUE;
- UsbKeyboardDevice->AltOn = TRUE;
- break;
-
- //
- // Left Logo press
- //
- case EFI_LEFT_LOGO_MODIFIER:
- UsbKeyboardDevice->LeftLogoOn = TRUE;
- break;
-
- //
- // Right Logo press
- //
- case EFI_RIGHT_LOGO_MODIFIER:
- UsbKeyboardDevice->RightLogoOn = TRUE;
- break;
-
- //
- // Menu key press
- //
- case EFI_MENU_MODIFIER:
- UsbKeyboardDevice->MenuKeyOn = TRUE;
- break;
-
- //
- // SysReq press
- //
- case EFI_PRINT_MODIFIER:
- case EFI_SYS_REQUEST_MODIFIER:
- UsbKeyboardDevice->SysReqOn = TRUE;
- break;
-
- //
- // AltGr press
- //
- case EFI_ALT_GR_MODIFIER:
- UsbKeyboardDevice->AltGrOn = TRUE;
- break;
- case EFI_NUM_LOCK_MODIFIER:
- //
- // Toggle NumLock
- //
- UsbKeyboardDevice->NumLockOn = (BOOLEAN) (!(UsbKeyboardDevice->NumLockOn));
- SetKeyLED (UsbKeyboardDevice);
- break;
-
- case EFI_CAPS_LOCK_MODIFIER:
- //
- // Toggle CapsLock
- //
- UsbKeyboardDevice->CapsOn = (BOOLEAN) (!(UsbKeyboardDevice->CapsOn));
- SetKeyLED (UsbKeyboardDevice);
- break;
+ case EFI_CAPS_LOCK_MODIFIER:
+ //
+ // Toggle CapsLock
+ //
+ UsbKeyboardDevice->CapsOn = (BOOLEAN)(!(UsbKeyboardDevice->CapsOn));
+ SetKeyLED (UsbKeyboardDevice);
+ break;
- case EFI_SCROLL_LOCK_MODIFIER:
- //
- // Toggle ScrollLock
- //
- UsbKeyboardDevice->ScrollOn = (BOOLEAN) (!(UsbKeyboardDevice->ScrollOn));
- SetKeyLED (UsbKeyboardDevice);
- break;
+ case EFI_SCROLL_LOCK_MODIFIER:
+ //
+ // Toggle ScrollLock
+ //
+ UsbKeyboardDevice->ScrollOn = (BOOLEAN)(!(UsbKeyboardDevice->ScrollOn));
+ SetKeyLED (UsbKeyboardDevice);
+ break;
- default:
- break;
+ default:
+ break;
}
//
@@ -1490,8 +1488,8 @@ USBParseKey (
**/
VOID
InitializeKeyState (
- IN USB_KB_DEV *UsbKeyboardDevice,
- OUT EFI_KEY_STATE *KeyState
+ IN USB_KB_DEV *UsbKeyboardDevice,
+ OUT EFI_KEY_STATE *KeyState
)
{
KeyState->KeyShiftState = EFI_SHIFT_STATE_VALID;
@@ -1500,30 +1498,39 @@ InitializeKeyState (
if (UsbKeyboardDevice->LeftCtrlOn) {
KeyState->KeyShiftState |= EFI_LEFT_CONTROL_PRESSED;
}
+
if (UsbKeyboardDevice->RightCtrlOn) {
KeyState->KeyShiftState |= EFI_RIGHT_CONTROL_PRESSED;
}
+
if (UsbKeyboardDevice->LeftAltOn) {
KeyState->KeyShiftState |= EFI_LEFT_ALT_PRESSED;
}
+
if (UsbKeyboardDevice->RightAltOn) {
KeyState->KeyShiftState |= EFI_RIGHT_ALT_PRESSED;
}
+
if (UsbKeyboardDevice->LeftShiftOn) {
KeyState->KeyShiftState |= EFI_LEFT_SHIFT_PRESSED;
}
+
if (UsbKeyboardDevice->RightShiftOn) {
KeyState->KeyShiftState |= EFI_RIGHT_SHIFT_PRESSED;
}
+
if (UsbKeyboardDevice->LeftLogoOn) {
KeyState->KeyShiftState |= EFI_LEFT_LOGO_PRESSED;
}
+
if (UsbKeyboardDevice->RightLogoOn) {
KeyState->KeyShiftState |= EFI_RIGHT_LOGO_PRESSED;
}
+
if (UsbKeyboardDevice->MenuKeyOn) {
KeyState->KeyShiftState |= EFI_MENU_KEY_PRESSED;
}
+
if (UsbKeyboardDevice->SysReqOn) {
KeyState->KeyShiftState |= EFI_SYS_REQ_PRESSED;
}
@@ -1531,12 +1538,15 @@ InitializeKeyState (
if (UsbKeyboardDevice->ScrollOn) {
KeyState->KeyToggleState |= EFI_SCROLL_LOCK_ACTIVE;
}
+
if (UsbKeyboardDevice->NumLockOn) {
KeyState->KeyToggleState |= EFI_NUM_LOCK_ACTIVE;
}
+
if (UsbKeyboardDevice->CapsOn) {
KeyState->KeyToggleState |= EFI_CAPS_LOCK_ACTIVE;
}
+
if (UsbKeyboardDevice->IsSupportPartialKey) {
KeyState->KeyToggleState |= EFI_KEY_STATE_EXPOSED;
}
@@ -1560,15 +1570,15 @@ InitializeKeyState (
**/
EFI_STATUS
UsbKeyCodeToEfiInputKey (
- IN USB_KB_DEV *UsbKeyboardDevice,
- IN UINT8 KeyCode,
- OUT EFI_KEY_DATA *KeyData
+ IN USB_KB_DEV *UsbKeyboardDevice,
+ IN UINT8 KeyCode,
+ OUT EFI_KEY_DATA *KeyData
)
{
- EFI_KEY_DESCRIPTOR *KeyDescriptor;
- LIST_ENTRY *Link;
- LIST_ENTRY *NotifyList;
- KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
+ EFI_KEY_DESCRIPTOR *KeyDescriptor;
+ LIST_ENTRY *Link;
+ LIST_ENTRY *NotifyList;
+ KEYBOARD_CONSOLE_IN_EX_NOTIFY *CurrentNotify;
//
// KeyCode must in the range of [0x4, 0x65] or [0xe0, 0xe7].
@@ -1591,7 +1601,7 @@ UsbKeyCodeToEfiInputKey (
// If this keystroke follows a non-spacing key, then find the descriptor for corresponding
// physical key.
//
- KeyDescriptor = FindPhysicalKey (UsbKeyboardDevice->CurrentNsKey, KeyDescriptor);
+ KeyDescriptor = FindPhysicalKey (UsbKeyboardDevice->CurrentNsKey, KeyDescriptor);
UsbKeyboardDevice->CurrentNsKey = NULL;
}
@@ -1605,7 +1615,7 @@ UsbKeyCodeToEfiInputKey (
KeyData->Key.ScanCode = ModifierValueToEfiScanCodeConvertionTable[KeyDescriptor->Modifier];
KeyData->Key.UnicodeChar = KeyDescriptor->Unicode;
- if ((KeyDescriptor->AffectedAttribute & EFI_AFFECTED_BY_STANDARD_SHIFT)!= 0) {
+ if ((KeyDescriptor->AffectedAttribute & EFI_AFFECTED_BY_STANDARD_SHIFT) != 0) {
if (UsbKeyboardDevice->ShiftOn) {
KeyData->Key.UnicodeChar = KeyDescriptor->ShiftedUnicode;
@@ -1614,8 +1624,9 @@ UsbKeyCodeToEfiInputKey (
// are normally adjusted by shift modifiers. e.g. Shift Key + 'f' key = 'F'
//
if ((KeyDescriptor->Unicode != CHAR_NULL) && (KeyDescriptor->ShiftedUnicode != CHAR_NULL) &&
- (KeyDescriptor->Unicode != KeyDescriptor->ShiftedUnicode)) {
- UsbKeyboardDevice->LeftShiftOn = FALSE;
+ (KeyDescriptor->Unicode != KeyDescriptor->ShiftedUnicode))
+ {
+ UsbKeyboardDevice->LeftShiftOn = FALSE;
UsbKeyboardDevice->RightShiftOn = FALSE;
}
@@ -1660,17 +1671,17 @@ UsbKeyCodeToEfiInputKey (
//
// Translate Unicode 0x1B (ESC) to EFI Scan Code
//
- if (KeyData->Key.UnicodeChar == 0x1B && KeyData->Key.ScanCode == SCAN_NULL) {
- KeyData->Key.ScanCode = SCAN_ESC;
+ if ((KeyData->Key.UnicodeChar == 0x1B) && (KeyData->Key.ScanCode == SCAN_NULL)) {
+ KeyData->Key.ScanCode = SCAN_ESC;
KeyData->Key.UnicodeChar = CHAR_NULL;
}
//
// Not valid for key without both unicode key code and EFI Scan Code.
//
- if (KeyData->Key.UnicodeChar == 0 && KeyData->Key.ScanCode == SCAN_NULL) {
+ if ((KeyData->Key.UnicodeChar == 0) && (KeyData->Key.ScanCode == SCAN_NULL)) {
if (!UsbKeyboardDevice->IsSupportPartialKey) {
- return EFI_NOT_READY;
+ return EFI_NOT_READY;
}
}
@@ -1709,15 +1720,15 @@ UsbKeyCodeToEfiInputKey (
**/
VOID
InitQueue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ IN UINTN ItemSize
)
{
- UINTN Index;
+ UINTN Index;
- Queue->ItemSize = ItemSize;
- Queue->Head = 0;
- Queue->Tail = 0;
+ Queue->ItemSize = ItemSize;
+ Queue->Head = 0;
+ Queue->Tail = 0;
if (Queue->Buffer[0] != NULL) {
FreePool (Queue->Buffer[0]);
@@ -1727,7 +1738,7 @@ InitQueue (
ASSERT (Queue->Buffer[0] != NULL);
for (Index = 1; Index < sizeof (Queue->Buffer) / sizeof (Queue->Buffer[0]); Index++) {
- Queue->Buffer[Index] = ((UINT8 *) Queue->Buffer[Index - 1]) + ItemSize;
+ Queue->Buffer[Index] = ((UINT8 *)Queue->Buffer[Index - 1]) + ItemSize;
}
}
@@ -1738,13 +1749,12 @@ InitQueue (
**/
VOID
DestroyQueue (
- IN OUT USB_SIMPLE_QUEUE *Queue
+ IN OUT USB_SIMPLE_QUEUE *Queue
)
{
FreePool (Queue->Buffer[0]);
}
-
/**
Check whether the queue is empty.
@@ -1756,16 +1766,15 @@ DestroyQueue (
**/
BOOLEAN
IsQueueEmpty (
- IN USB_SIMPLE_QUEUE *Queue
+ IN USB_SIMPLE_QUEUE *Queue
)
{
//
// Meet FIFO empty condition
//
- return (BOOLEAN) (Queue->Head == Queue->Tail);
+ return (BOOLEAN)(Queue->Head == Queue->Tail);
}
-
/**
Check whether the queue is full.
@@ -1777,13 +1786,12 @@ IsQueueEmpty (
**/
BOOLEAN
IsQueueFull (
- IN USB_SIMPLE_QUEUE *Queue
+ IN USB_SIMPLE_QUEUE *Queue
)
{
- return (BOOLEAN) (((Queue->Tail + 1) % (MAX_KEY_ALLOWED + 1)) == Queue->Head);
+ return (BOOLEAN)(((Queue->Tail + 1) % (MAX_KEY_ALLOWED + 1)) == Queue->Head);
}
-
/**
Enqueue the item to the queue.
@@ -1793,9 +1801,9 @@ IsQueueFull (
**/
VOID
Enqueue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- IN VOID *Item,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ IN VOID *Item,
+ IN UINTN ItemSize
)
{
ASSERT (ItemSize == Queue->ItemSize);
@@ -1815,7 +1823,6 @@ Enqueue (
Queue->Tail = (Queue->Tail + 1) % (MAX_KEY_ALLOWED + 1);
}
-
/**
Dequeue a item from the queue.
@@ -1829,9 +1836,9 @@ Enqueue (
**/
EFI_STATUS
Dequeue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- OUT VOID *Item,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ OUT VOID *Item,
+ IN UINTN ItemSize
)
{
ASSERT (Queue->ItemSize == ItemSize);
@@ -1850,7 +1857,6 @@ Dequeue (
return EFI_SUCCESS;
}
-
/**
Sets USB keyboard LED state.
@@ -1859,21 +1865,21 @@ Dequeue (
**/
VOID
SetKeyLED (
- IN USB_KB_DEV *UsbKeyboardDevice
+ IN USB_KB_DEV *UsbKeyboardDevice
)
{
- LED_MAP Led;
- UINT8 ReportId;
+ LED_MAP Led;
+ UINT8 ReportId;
//
// Set each field in Led map.
//
- Led.NumLock = (UINT8) ((UsbKeyboardDevice->NumLockOn) ? 1 : 0);
- Led.CapsLock = (UINT8) ((UsbKeyboardDevice->CapsOn) ? 1 : 0);
- Led.ScrollLock = (UINT8) ((UsbKeyboardDevice->ScrollOn) ? 1 : 0);
+ Led.NumLock = (UINT8)((UsbKeyboardDevice->NumLockOn) ? 1 : 0);
+ Led.CapsLock = (UINT8)((UsbKeyboardDevice->CapsOn) ? 1 : 0);
+ Led.ScrollLock = (UINT8)((UsbKeyboardDevice->ScrollOn) ? 1 : 0);
Led.Resrvd = 0;
- ReportId = 0;
+ ReportId = 0;
//
// Call Set_Report Request to lighten the LED.
//
@@ -1883,11 +1889,10 @@ SetKeyLED (
ReportId,
HID_OUTPUT_REPORT,
1,
- (UINT8 *) &Led
+ (UINT8 *)&Led
);
}
-
/**
Handler for Repeat Key event.
@@ -1904,14 +1909,14 @@ SetKeyLED (
VOID
EFIAPI
USBKeyboardRepeatHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
USB_KB_DEV *UsbKeyboardDevice;
USB_KEY UsbKey;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
//
// Do nothing when there is no repeat key.
@@ -1935,7 +1940,6 @@ USBKeyboardRepeatHandler (
}
}
-
/**
Handler for Delayed Recovery event.
@@ -1952,20 +1956,19 @@ USBKeyboardRepeatHandler (
VOID
EFIAPI
USBKeyboardRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
+ USB_KB_DEV *UsbKeyboardDevice;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 PacketSize;
- USB_KB_DEV *UsbKeyboardDevice;
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 PacketSize;
+ UsbKeyboardDevice = (USB_KB_DEV *)Context;
- UsbKeyboardDevice = (USB_KB_DEV *) Context;
-
- UsbIo = UsbKeyboardDevice->UsbIo;
+ UsbIo = UsbKeyboardDevice->UsbIo;
- PacketSize = (UINT8) (UsbKeyboardDevice->IntEndpointDescriptor.MaxPacketSize);
+ PacketSize = (UINT8)(UsbKeyboardDevice->IntEndpointDescriptor.MaxPacketSize);
//
// Re-submit Asynchronous Interrupt Transfer for recovery.
diff --git a/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.h b/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.h
index 811f136b65..05189444fc 100644
--- a/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.h
+++ b/MdeModulePkg/Bus/Usb/UsbKbDxe/KeyBoard.h
@@ -9,10 +9,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_KEYBOARD_H_
#define _EFI_KEYBOARD_H_
-
#include "EfiKey.h"
-#define USB_KEYBOARD_KEY_COUNT 105
+#define USB_KEYBOARD_KEY_COUNT 105
#define USB_KEYBOARD_LANGUAGE_STR_LEN 5 // RFC4646 Language Code: "en-US"
#define USB_KEYBOARD_DESCRIPTION_STR_LEN (16 + 1) // Description: "English Keyboard"
@@ -22,28 +21,29 @@ typedef struct {
//
// This 4-bytes total array length is required by PreparePackageList()
//
- UINT32 Length;
+ UINT32 Length;
//
// Keyboard Layout package definition
//
- EFI_HII_PACKAGE_HEADER PackageHeader;
- UINT16 LayoutCount;
+ EFI_HII_PACKAGE_HEADER PackageHeader;
+ UINT16 LayoutCount;
//
// EFI_HII_KEYBOARD_LAYOUT
//
- UINT16 LayoutLength;
- EFI_GUID Guid;
- UINT32 LayoutDescriptorStringOffset;
- UINT8 DescriptorCount;
- EFI_KEY_DESCRIPTOR KeyDescriptor[USB_KEYBOARD_KEY_COUNT];
- UINT16 DescriptionCount;
- CHAR16 Language[USB_KEYBOARD_LANGUAGE_STR_LEN];
- CHAR16 Space;
- CHAR16 DescriptionString[USB_KEYBOARD_DESCRIPTION_STR_LEN];
+ UINT16 LayoutLength;
+ EFI_GUID Guid;
+ UINT32 LayoutDescriptorStringOffset;
+ UINT8 DescriptorCount;
+ EFI_KEY_DESCRIPTOR KeyDescriptor[USB_KEYBOARD_KEY_COUNT];
+ UINT16 DescriptionCount;
+ CHAR16 Language[USB_KEYBOARD_LANGUAGE_STR_LEN];
+ CHAR16 Space;
+ CHAR16 DescriptionString[USB_KEYBOARD_DESCRIPTION_STR_LEN];
} USB_KEYBOARD_LAYOUT_PACK_BIN;
#pragma pack()
+
/**
Uses USB I/O to check whether the device is a USB keyboard device.
@@ -55,7 +55,7 @@ typedef struct {
**/
BOOLEAN
IsUSBKeyboard (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
);
/**
@@ -69,7 +69,7 @@ IsUSBKeyboard (
**/
EFI_STATUS
InitUSBKeyboard (
- IN OUT USB_KB_DEV *UsbKeyboardDevice
+ IN OUT USB_KB_DEV *UsbKeyboardDevice
);
/**
@@ -89,7 +89,7 @@ InitUSBKeyboard (
**/
EFI_STATUS
InitKeyboardLayout (
- OUT USB_KB_DEV *UsbKeyboardDevice
+ OUT USB_KB_DEV *UsbKeyboardDevice
);
/**
@@ -100,7 +100,7 @@ InitKeyboardLayout (
**/
VOID
ReleaseKeyboardLayoutResources (
- IN OUT USB_KB_DEV *UsbKeyboardDevice
+ IN OUT USB_KB_DEV *UsbKeyboardDevice
);
/**
@@ -124,10 +124,10 @@ ReleaseKeyboardLayoutResources (
EFI_STATUS
EFIAPI
KeyboardHandler (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
);
/**
@@ -146,8 +146,8 @@ KeyboardHandler (
VOID
EFIAPI
USBKeyboardRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -187,12 +187,11 @@ USBParseKey (
**/
EFI_STATUS
UsbKeyCodeToEfiInputKey (
- IN USB_KB_DEV *UsbKeyboardDevice,
- IN UINT8 KeyCode,
- OUT EFI_KEY_DATA *KeyData
+ IN USB_KB_DEV *UsbKeyboardDevice,
+ IN UINT8 KeyCode,
+ OUT EFI_KEY_DATA *KeyData
);
-
/**
Create the queue.
@@ -202,8 +201,8 @@ UsbKeyCodeToEfiInputKey (
**/
VOID
InitQueue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ IN UINTN ItemSize
);
/**
@@ -213,10 +212,9 @@ InitQueue (
**/
VOID
DestroyQueue (
- IN OUT USB_SIMPLE_QUEUE *Queue
+ IN OUT USB_SIMPLE_QUEUE *Queue
);
-
/**
Check whether the queue is empty.
@@ -228,10 +226,9 @@ DestroyQueue (
**/
BOOLEAN
IsQueueEmpty (
- IN USB_SIMPLE_QUEUE *Queue
+ IN USB_SIMPLE_QUEUE *Queue
);
-
/**
Check whether the queue is full.
@@ -243,10 +240,9 @@ IsQueueEmpty (
**/
BOOLEAN
IsQueueFull (
- IN USB_SIMPLE_QUEUE *Queue
+ IN USB_SIMPLE_QUEUE *Queue
);
-
/**
Enqueue the item to the queue.
@@ -256,12 +252,11 @@ IsQueueFull (
**/
VOID
Enqueue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- IN VOID *Item,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ IN VOID *Item,
+ IN UINTN ItemSize
);
-
/**
Dequeue a item from the queue.
@@ -275,9 +270,9 @@ Enqueue (
**/
EFI_STATUS
Dequeue (
- IN OUT USB_SIMPLE_QUEUE *Queue,
- OUT VOID *Item,
- IN UINTN ItemSize
+ IN OUT USB_SIMPLE_QUEUE *Queue,
+ OUT VOID *Item,
+ IN UINTN ItemSize
);
/**
@@ -296,8 +291,8 @@ Dequeue (
VOID
EFIAPI
USBKeyboardRepeatHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -308,7 +303,7 @@ USBKeyboardRepeatHandler (
**/
VOID
SetKeyLED (
- IN USB_KB_DEV *UsbKeyboardDevice
+ IN USB_KB_DEV *UsbKeyboardDevice
);
/**
@@ -319,8 +314,8 @@ SetKeyLED (
**/
VOID
InitializeKeyState (
- IN USB_KB_DEV *UsbKeyboardDevice,
- OUT EFI_KEY_STATE *KeyState
+ IN USB_KB_DEV *UsbKeyboardDevice,
+ OUT EFI_KEY_STATE *KeyState
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/ComponentName.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/ComponentName.c
index dff3d3a7b0..69cf36a985 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/ComponentName.c
@@ -20,17 +20,16 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUsbMassStorageCompon
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMassStorageComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UsbMassStorageGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UsbMassStorageGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMassStorageComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UsbMassStorageGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UsbMassStorageGetControllerName,
"en"
};
-
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE
-mUsbMassStorageDriverNameTable[] = {
- {"eng;en", L"Usb Mass Storage Driver"},
- {NULL, NULL}
+ mUsbMassStorageDriverNameTable[] = {
+ { "eng;en", L"Usb Mass Storage Driver" },
+ { NULL, NULL }
};
/**
@@ -145,11 +144,11 @@ UsbMassStorageGetDriverName (
EFI_STATUS
EFIAPI
UsbMassStorageGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMass.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMass.h
index fccb203a3b..2ac9803011 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMass.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMass.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USBMASS_H_
#define _EFI_USBMASS_H_
-
#include <Uefi.h>
#include <IndustryStandard/Scsi.h>
#include <Protocol/BlockIo.h>
@@ -26,8 +25,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h>
#include <Library/DevicePathLib.h>
-typedef struct _USB_MASS_TRANSPORT USB_MASS_TRANSPORT;
-typedef struct _USB_MASS_DEVICE USB_MASS_DEVICE;
+typedef struct _USB_MASS_TRANSPORT USB_MASS_TRANSPORT;
+typedef struct _USB_MASS_DEVICE USB_MASS_DEVICE;
#include "UsbMassBot.h"
#include "UsbMassCbi.h"
@@ -44,9 +43,9 @@ typedef struct _USB_MASS_DEVICE USB_MASS_DEVICE;
#define USB_MASS_1_MILLISECOND 1000
#define USB_MASS_1_SECOND (1000 * USB_MASS_1_MILLISECOND)
-#define USB_MASS_CMD_SUCCESS 0
-#define USB_MASS_CMD_FAIL 1
-#define USB_MASS_CMD_PERSISTENT 2
+#define USB_MASS_CMD_SUCCESS 0
+#define USB_MASS_CMD_FAIL 1
+#define USB_MASS_CMD_PERSISTENT 2
/**
Initializes USB transport protocol.
@@ -65,8 +64,8 @@ typedef struct _USB_MASS_DEVICE USB_MASS_DEVICE;
typedef
EFI_STATUS
(*USB_MASS_INIT_TRANSPORT) (
- IN EFI_USB_IO_PROTOCOL *Usb,
- OUT VOID **Context OPTIONAL
+ IN EFI_USB_IO_PROTOCOL *Usb,
+ OUT VOID **Context OPTIONAL
);
/**
@@ -114,8 +113,8 @@ EFI_STATUS
typedef
EFI_STATUS
(*USB_MASS_RESET) (
- IN VOID *Context,
- IN BOOLEAN ExtendedVerification
+ IN VOID *Context,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -132,8 +131,8 @@ EFI_STATUS
typedef
EFI_STATUS
(*USB_MASS_GET_MAX_LUN) (
- IN VOID *Context,
- IN UINT8 *MaxLun
+ IN VOID *Context,
+ IN UINT8 *MaxLun
);
/**
@@ -147,7 +146,7 @@ EFI_STATUS
typedef
EFI_STATUS
(*USB_MASS_CLEAN_UP) (
- IN VOID *Context
+ IN VOID *Context
);
///
@@ -159,29 +158,29 @@ EFI_STATUS
/// it is no longer necessary.
///
struct _USB_MASS_TRANSPORT {
- UINT8 Protocol;
- USB_MASS_INIT_TRANSPORT Init; ///< Initialize the mass storage transport protocol
- USB_MASS_EXEC_COMMAND ExecCommand; ///< Transport command to the device then get result
- USB_MASS_RESET Reset; ///< Reset the device
- USB_MASS_GET_MAX_LUN GetMaxLun; ///< Get max lun, only for bot
- USB_MASS_CLEAN_UP CleanUp; ///< Clean up the resources.
+ UINT8 Protocol;
+ USB_MASS_INIT_TRANSPORT Init; ///< Initialize the mass storage transport protocol
+ USB_MASS_EXEC_COMMAND ExecCommand; ///< Transport command to the device then get result
+ USB_MASS_RESET Reset; ///< Reset the device
+ USB_MASS_GET_MAX_LUN GetMaxLun; ///< Get max lun, only for bot
+ USB_MASS_CLEAN_UP CleanUp; ///< Clean up the resources.
};
struct _USB_MASS_DEVICE {
- UINT32 Signature;
- EFI_HANDLE Controller;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_BLOCK_IO_PROTOCOL BlockIo;
- EFI_BLOCK_IO_MEDIA BlockIoMedia;
- BOOLEAN OpticalStorage;
- UINT8 Lun; ///< Logical Unit Number
- UINT8 Pdt; ///< Peripheral Device Type
- USB_MASS_TRANSPORT *Transport; ///< USB mass storage transport protocol
- VOID *Context;
- EFI_DISK_INFO_PROTOCOL DiskInfo;
- USB_BOOT_INQUIRY_DATA InquiryData;
- BOOLEAN Cdb16Byte;
+ UINT32 Signature;
+ EFI_HANDLE Controller;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_BLOCK_IO_PROTOCOL BlockIo;
+ EFI_BLOCK_IO_MEDIA BlockIoMedia;
+ BOOLEAN OpticalStorage;
+ UINT8 Lun; ///< Logical Unit Number
+ UINT8 Pdt; ///< Peripheral Device Type
+ USB_MASS_TRANSPORT *Transport; ///< USB mass storage transport protocol
+ VOID *Context;
+ EFI_DISK_INFO_PROTOCOL DiskInfo;
+ USB_BOOT_INQUIRY_DATA InquiryData;
+ BOOLEAN Cdb16Byte;
};
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.c
index 7b29bc81fe..f648187a01 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.c
@@ -24,15 +24,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
EFI_STATUS
UsbBootRequestSense (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- USB_BOOT_REQUEST_SENSE_CMD SenseCmd;
- USB_BOOT_REQUEST_SENSE_DATA SenseData;
- EFI_BLOCK_IO_MEDIA *Media;
- USB_MASS_TRANSPORT *Transport;
- EFI_STATUS Status;
- UINT32 CmdResult;
+ USB_BOOT_REQUEST_SENSE_CMD SenseCmd;
+ USB_BOOT_REQUEST_SENSE_DATA SenseData;
+ EFI_BLOCK_IO_MEDIA *Media;
+ USB_MASS_TRANSPORT *Transport;
+ EFI_STATUS Status;
+ UINT32 CmdResult;
Transport = UsbMass->Transport;
@@ -43,8 +43,8 @@ UsbBootRequestSense (
ZeroMem (&SenseData, sizeof (USB_BOOT_REQUEST_SENSE_DATA));
SenseCmd.OpCode = USB_BOOT_REQUEST_SENSE_OPCODE;
- SenseCmd.Lun = (UINT8) (USB_BOOT_LUN (UsbMass->Lun));
- SenseCmd.AllocLen = (UINT8) sizeof (USB_BOOT_REQUEST_SENSE_DATA);
+ SenseCmd.Lun = (UINT8)(USB_BOOT_LUN (UsbMass->Lun));
+ SenseCmd.AllocLen = (UINT8)sizeof (USB_BOOT_REQUEST_SENSE_DATA);
Status = Transport->ExecCommand (
UsbMass->Context,
@@ -57,11 +57,12 @@ UsbBootRequestSense (
USB_BOOT_GENERAL_CMD_TIMEOUT,
&CmdResult
);
- if (EFI_ERROR (Status) || CmdResult != USB_MASS_CMD_SUCCESS) {
+ if (EFI_ERROR (Status) || (CmdResult != USB_MASS_CMD_SUCCESS)) {
DEBUG ((DEBUG_ERROR, "UsbBootRequestSense: (%r) CmdResult=0x%x\n", Status, CmdResult));
if (!EFI_ERROR (Status)) {
Status = EFI_DEVICE_ERROR;
}
+
return Status;
}
@@ -72,77 +73,80 @@ UsbBootRequestSense (
Media = &UsbMass->BlockIoMedia;
switch (USB_BOOT_SENSE_KEY (SenseData.SenseKey)) {
+ case USB_BOOT_SENSE_NO_SENSE:
+ if (SenseData.Asc == USB_BOOT_ASC_NO_ADDITIONAL_SENSE_INFORMATION) {
+ //
+ // It is not an error if a device does not have additional sense information
+ //
+ Status = EFI_SUCCESS;
+ } else {
+ Status = EFI_NO_RESPONSE;
+ }
- case USB_BOOT_SENSE_NO_SENSE:
- if (SenseData.Asc == USB_BOOT_ASC_NO_ADDITIONAL_SENSE_INFORMATION) {
+ break;
+
+ case USB_BOOT_SENSE_RECOVERED:
//
- // It is not an error if a device does not have additional sense information
+ // Suppose hardware can handle this case, and recover later by itself
//
- Status = EFI_SUCCESS;
- } else {
- Status = EFI_NO_RESPONSE;
- }
- break;
-
- case USB_BOOT_SENSE_RECOVERED:
- //
- // Suppose hardware can handle this case, and recover later by itself
- //
- Status = EFI_NOT_READY;
- break;
-
- case USB_BOOT_SENSE_NOT_READY:
- Status = EFI_DEVICE_ERROR;
- if (SenseData.Asc == USB_BOOT_ASC_NO_MEDIA) {
- Media->MediaPresent = FALSE;
- Status = EFI_NO_MEDIA;
- } else if (SenseData.Asc == USB_BOOT_ASC_NOT_READY) {
Status = EFI_NOT_READY;
- }
- break;
+ break;
- case USB_BOOT_SENSE_ILLEGAL_REQUEST:
- Status = EFI_INVALID_PARAMETER;
- break;
+ case USB_BOOT_SENSE_NOT_READY:
+ Status = EFI_DEVICE_ERROR;
+ if (SenseData.Asc == USB_BOOT_ASC_NO_MEDIA) {
+ Media->MediaPresent = FALSE;
+ Status = EFI_NO_MEDIA;
+ } else if (SenseData.Asc == USB_BOOT_ASC_NOT_READY) {
+ Status = EFI_NOT_READY;
+ }
- case USB_BOOT_SENSE_UNIT_ATTENTION:
- Status = EFI_DEVICE_ERROR;
- if (SenseData.Asc == USB_BOOT_ASC_MEDIA_CHANGE) {
- //
- // If MediaChange, reset ReadOnly and new MediaId
- //
- Status = EFI_MEDIA_CHANGED;
- Media->ReadOnly = FALSE;
- Media->MediaId++;
- } else if (SenseData.Asc == USB_BOOT_ASC_NOT_READY) {
- Status = EFI_NOT_READY;
- } else if (SenseData.Asc == USB_BOOT_ASC_NO_MEDIA) {
- Status = EFI_NOT_READY;
- }
- break;
+ break;
+
+ case USB_BOOT_SENSE_ILLEGAL_REQUEST:
+ Status = EFI_INVALID_PARAMETER;
+ break;
+
+ case USB_BOOT_SENSE_UNIT_ATTENTION:
+ Status = EFI_DEVICE_ERROR;
+ if (SenseData.Asc == USB_BOOT_ASC_MEDIA_CHANGE) {
+ //
+ // If MediaChange, reset ReadOnly and new MediaId
+ //
+ Status = EFI_MEDIA_CHANGED;
+ Media->ReadOnly = FALSE;
+ Media->MediaId++;
+ } else if (SenseData.Asc == USB_BOOT_ASC_NOT_READY) {
+ Status = EFI_NOT_READY;
+ } else if (SenseData.Asc == USB_BOOT_ASC_NO_MEDIA) {
+ Status = EFI_NOT_READY;
+ }
- case USB_BOOT_SENSE_DATA_PROTECT:
- Status = EFI_WRITE_PROTECTED;
- Media->ReadOnly = TRUE;
- break;
+ break;
+
+ case USB_BOOT_SENSE_DATA_PROTECT:
+ Status = EFI_WRITE_PROTECTED;
+ Media->ReadOnly = TRUE;
+ break;
- default:
- Status = EFI_DEVICE_ERROR;
- break;
+ default:
+ Status = EFI_DEVICE_ERROR;
+ break;
}
- DEBUG ((DEBUG_INFO, "UsbBootRequestSense: (%r) with error code (%x) sense key %x/%x/%x\n",
- Status,
- SenseData.ErrorCode,
- USB_BOOT_SENSE_KEY (SenseData.SenseKey),
- SenseData.Asc,
- SenseData.Ascq
- ));
+ DEBUG ((
+ DEBUG_INFO,
+ "UsbBootRequestSense: (%r) with error code (%x) sense key %x/%x/%x\n",
+ Status,
+ SenseData.ErrorCode,
+ USB_BOOT_SENSE_KEY (SenseData.SenseKey),
+ SenseData.Asc,
+ SenseData.Ascq
+ ));
return Status;
}
-
/**
Execute the USB mass storage bootability commands.
@@ -164,18 +168,18 @@ UsbBootRequestSense (
**/
EFI_STATUS
UsbBootExecCmd (
- IN USB_MASS_DEVICE *UsbMass,
- IN VOID *Cmd,
- IN UINT8 CmdLen,
- IN EFI_USB_DATA_DIRECTION DataDir,
- IN VOID *Data,
- IN UINT32 DataLen,
- IN UINT32 Timeout
+ IN USB_MASS_DEVICE *UsbMass,
+ IN VOID *Cmd,
+ IN UINT8 CmdLen,
+ IN EFI_USB_DATA_DIRECTION DataDir,
+ IN VOID *Data,
+ IN UINT32 DataLen,
+ IN UINT32 Timeout
)
{
- USB_MASS_TRANSPORT *Transport;
- EFI_STATUS Status;
- UINT32 CmdResult;
+ USB_MASS_TRANSPORT *Transport;
+ EFI_STATUS Status;
+ UINT32 CmdResult;
Transport = UsbMass->Transport;
Status = Transport->ExecCommand (
@@ -210,7 +214,6 @@ UsbBootExecCmd (
return UsbBootRequestSense (UsbMass);
}
-
/**
Execute the USB mass storage bootability commands with retrial.
@@ -234,18 +237,18 @@ UsbBootExecCmd (
**/
EFI_STATUS
UsbBootExecCmdWithRetry (
- IN USB_MASS_DEVICE *UsbMass,
- IN VOID *Cmd,
- IN UINT8 CmdLen,
- IN EFI_USB_DATA_DIRECTION DataDir,
- IN VOID *Data,
- IN UINT32 DataLen,
- IN UINT32 Timeout
+ IN USB_MASS_DEVICE *UsbMass,
+ IN VOID *Cmd,
+ IN UINT8 CmdLen,
+ IN EFI_USB_DATA_DIRECTION DataDir,
+ IN VOID *Data,
+ IN UINT32 DataLen,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
- UINTN Retry;
- EFI_EVENT TimeoutEvt;
+ EFI_STATUS Status;
+ UINTN Retry;
+ EFI_EVENT TimeoutEvt;
Retry = 0;
Status = EFI_SUCCESS;
@@ -260,7 +263,7 @@ UsbBootExecCmdWithRetry (
return Status;
}
- Status = gBS->SetTimer (TimeoutEvt, TimerRelative, EFI_TIMER_PERIOD_SECONDS(60));
+ Status = gBS->SetTimer (TimeoutEvt, TimerRelative, EFI_TIMER_PERIOD_SECONDS (60));
if (EFI_ERROR (Status)) {
goto EXIT;
}
@@ -278,9 +281,10 @@ UsbBootExecCmdWithRetry (
DataLen,
Timeout
);
- if (Status == EFI_SUCCESS || Status == EFI_NO_MEDIA) {
+ if ((Status == EFI_SUCCESS) || (Status == EFI_NO_MEDIA)) {
break;
}
+
//
// If the sense data shows the drive is not ready, we need execute the cmd again.
// We limit the upper boundary to 60 seconds.
@@ -288,6 +292,7 @@ UsbBootExecCmdWithRetry (
if (Status == EFI_NOT_READY) {
continue;
}
+
//
// If the status is other error, then just retry 5 times.
//
@@ -304,7 +309,6 @@ EXIT:
return Status;
}
-
/**
Execute TEST UNIT READY command to check if the device is ready.
@@ -316,20 +320,20 @@ EXIT:
**/
EFI_STATUS
UsbBootIsUnitReady (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
USB_BOOT_TEST_UNIT_READY_CMD TestCmd;
ZeroMem (&TestCmd, sizeof (USB_BOOT_TEST_UNIT_READY_CMD));
- TestCmd.OpCode = USB_BOOT_TEST_UNIT_READY_OPCODE;
- TestCmd.Lun = (UINT8) (USB_BOOT_LUN (UsbMass->Lun));
+ TestCmd.OpCode = USB_BOOT_TEST_UNIT_READY_OPCODE;
+ TestCmd.Lun = (UINT8)(USB_BOOT_LUN (UsbMass->Lun));
return UsbBootExecCmdWithRetry (
UsbMass,
&TestCmd,
- (UINT8) sizeof (USB_BOOT_TEST_UNIT_READY_CMD),
+ (UINT8)sizeof (USB_BOOT_TEST_UNIT_READY_CMD),
EfiUsbNoData,
NULL,
0,
@@ -337,7 +341,6 @@ UsbBootIsUnitReady (
);
}
-
/**
Execute INQUIRY Command to request information regarding parameters of
the device be sent to the host computer.
@@ -350,12 +353,12 @@ UsbBootIsUnitReady (
**/
EFI_STATUS
UsbBootInquiry (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- USB_BOOT_INQUIRY_CMD InquiryCmd;
- EFI_BLOCK_IO_MEDIA *Media;
- EFI_STATUS Status;
+ USB_BOOT_INQUIRY_CMD InquiryCmd;
+ EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
Media = &(UsbMass->BlockIoMedia);
@@ -363,13 +366,13 @@ UsbBootInquiry (
ZeroMem (&UsbMass->InquiryData, sizeof (USB_BOOT_INQUIRY_DATA));
InquiryCmd.OpCode = USB_BOOT_INQUIRY_OPCODE;
- InquiryCmd.Lun = (UINT8) (USB_BOOT_LUN (UsbMass->Lun));
- InquiryCmd.AllocLen = (UINT8) sizeof (USB_BOOT_INQUIRY_DATA);
+ InquiryCmd.Lun = (UINT8)(USB_BOOT_LUN (UsbMass->Lun));
+ InquiryCmd.AllocLen = (UINT8)sizeof (USB_BOOT_INQUIRY_DATA);
Status = UsbBootExecCmdWithRetry (
UsbMass,
&InquiryCmd,
- (UINT8) sizeof (USB_BOOT_INQUIRY_CMD),
+ (UINT8)sizeof (USB_BOOT_INQUIRY_CMD),
EfiUsbDataIn,
&UsbMass->InquiryData,
sizeof (USB_BOOT_INQUIRY_DATA),
@@ -383,12 +386,12 @@ UsbBootInquiry (
// Get information from PDT (Peripheral Device Type) field and Removable Medium Bit
// from the inquiry data.
//
- UsbMass->Pdt = (UINT8) (USB_BOOT_PDT (UsbMass->InquiryData.Pdt));
- Media->RemovableMedia = (BOOLEAN) (USB_BOOT_REMOVABLE (UsbMass->InquiryData.Removable));
+ UsbMass->Pdt = (UINT8)(USB_BOOT_PDT (UsbMass->InquiryData.Pdt));
+ Media->RemovableMedia = (BOOLEAN)(USB_BOOT_REMOVABLE (UsbMass->InquiryData.Removable));
//
// Set block size to the default value of 512 Bytes, in case no media is present at first time.
//
- Media->BlockSize = 0x0200;
+ Media->BlockSize = 0x0200;
return Status;
}
@@ -410,16 +413,16 @@ UsbBootInquiry (
**/
EFI_STATUS
UsbBootReadCapacity16 (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- UINT8 CapacityCmd[16];
- EFI_SCSI_DISK_CAPACITY_DATA16 CapacityData;
- EFI_BLOCK_IO_MEDIA *Media;
- EFI_STATUS Status;
- UINT32 BlockSize;
+ UINT8 CapacityCmd[16];
+ EFI_SCSI_DISK_CAPACITY_DATA16 CapacityData;
+ EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
- Media = &UsbMass->BlockIoMedia;
+ Media = &UsbMass->BlockIoMedia;
Media->MediaPresent = FALSE;
Media->LastBlock = 0;
@@ -428,8 +431,8 @@ UsbBootReadCapacity16 (
ZeroMem (CapacityCmd, sizeof (CapacityCmd));
ZeroMem (&CapacityData, sizeof (CapacityData));
- CapacityCmd[0] = EFI_SCSI_OP_READ_CAPACITY16;
- CapacityCmd[1] = 0x10;
+ CapacityCmd[0] = EFI_SCSI_OP_READ_CAPACITY16;
+ CapacityCmd[1] = 0x10;
//
// Partial medium indicator, set the bytes 2 ~ 9 of the Cdb as ZERO.
//
@@ -440,7 +443,7 @@ UsbBootReadCapacity16 (
Status = UsbBootExecCmdWithRetry (
UsbMass,
CapacityCmd,
- (UINT8) sizeof (CapacityCmd),
+ (UINT8)sizeof (CapacityCmd),
EfiUsbDataIn,
&CapacityData,
sizeof (CapacityData),
@@ -455,13 +458,13 @@ UsbBootReadCapacity16 (
// from READ CAPACITY data.
//
Media->MediaPresent = TRUE;
- Media->LastBlock = SwapBytes64 (ReadUnaligned64 ((CONST UINT64 *) &(CapacityData.LastLba7)));
+ Media->LastBlock = SwapBytes64 (ReadUnaligned64 ((CONST UINT64 *)&(CapacityData.LastLba7)));
- BlockSize = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *) &(CapacityData.BlockSize3)));
+ BlockSize = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *)&(CapacityData.BlockSize3)));
Media->LowestAlignedLba = (CapacityData.LowestAlignLogic2 << 8) |
- CapacityData.LowestAlignLogic1;
- Media->LogicalBlocksPerPhysicalBlock = (1 << CapacityData.LogicPerPhysical);
+ CapacityData.LowestAlignLogic1;
+ Media->LogicalBlocksPerPhysicalBlock = (1 << CapacityData.LogicPerPhysical);
if (BlockSize == 0) {
//
// Get sense data
@@ -474,7 +477,6 @@ UsbBootReadCapacity16 (
return Status;
}
-
/**
Execute READ CAPACITY command to request information regarding
the capacity of the installed medium of the device.
@@ -492,27 +494,27 @@ UsbBootReadCapacity16 (
**/
EFI_STATUS
UsbBootReadCapacity (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- USB_BOOT_READ_CAPACITY_CMD CapacityCmd;
- USB_BOOT_READ_CAPACITY_DATA CapacityData;
- EFI_BLOCK_IO_MEDIA *Media;
- EFI_STATUS Status;
- UINT32 BlockSize;
+ USB_BOOT_READ_CAPACITY_CMD CapacityCmd;
+ USB_BOOT_READ_CAPACITY_DATA CapacityData;
+ EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
- Media = &UsbMass->BlockIoMedia;
+ Media = &UsbMass->BlockIoMedia;
ZeroMem (&CapacityCmd, sizeof (USB_BOOT_READ_CAPACITY_CMD));
ZeroMem (&CapacityData, sizeof (USB_BOOT_READ_CAPACITY_DATA));
CapacityCmd.OpCode = USB_BOOT_READ_CAPACITY_OPCODE;
- CapacityCmd.Lun = (UINT8) (USB_BOOT_LUN (UsbMass->Lun));
+ CapacityCmd.Lun = (UINT8)(USB_BOOT_LUN (UsbMass->Lun));
Status = UsbBootExecCmdWithRetry (
UsbMass,
&CapacityCmd,
- (UINT8) sizeof (USB_BOOT_READ_CAPACITY_CMD),
+ (UINT8)sizeof (USB_BOOT_READ_CAPACITY_CMD),
EfiUsbDataIn,
&CapacityData,
sizeof (USB_BOOT_READ_CAPACITY_DATA),
@@ -527,9 +529,9 @@ UsbBootReadCapacity (
// from READ CAPACITY data.
//
Media->MediaPresent = TRUE;
- Media->LastBlock = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *) CapacityData.LastLba));
+ Media->LastBlock = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *)CapacityData.LastLba));
- BlockSize = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *) CapacityData.BlockLen));
+ BlockSize = SwapBytes32 (ReadUnaligned32 ((CONST UINT32 *)CapacityData.BlockLen));
if (BlockSize == 0) {
//
// Get sense data
@@ -560,15 +562,15 @@ UsbBootReadCapacity (
**/
EFI_STATUS
UsbScsiModeSense (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- EFI_STATUS Status;
- USB_SCSI_MODE_SENSE6_CMD ModeSenseCmd;
- USB_SCSI_MODE_SENSE6_PARA_HEADER ModeParaHeader;
- EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
+ USB_SCSI_MODE_SENSE6_CMD ModeSenseCmd;
+ USB_SCSI_MODE_SENSE6_PARA_HEADER ModeParaHeader;
+ EFI_BLOCK_IO_MEDIA *Media;
- Media = &UsbMass->BlockIoMedia;
+ Media = &UsbMass->BlockIoMedia;
ZeroMem (&ModeSenseCmd, sizeof (USB_SCSI_MODE_SENSE6_CMD));
ZeroMem (&ModeParaHeader, sizeof (USB_SCSI_MODE_SENSE6_PARA_HEADER));
@@ -576,15 +578,15 @@ UsbScsiModeSense (
//
// MODE SENSE(6) command is defined in Section 8.2.10 of SCSI-2 Spec
//
- ModeSenseCmd.OpCode = USB_SCSI_MODE_SENSE6_OPCODE;
- ModeSenseCmd.Lun = (UINT8) USB_BOOT_LUN (UsbMass->Lun);
- ModeSenseCmd.PageCode = 0x3F;
- ModeSenseCmd.AllocateLen = (UINT8) sizeof (USB_SCSI_MODE_SENSE6_PARA_HEADER);
+ ModeSenseCmd.OpCode = USB_SCSI_MODE_SENSE6_OPCODE;
+ ModeSenseCmd.Lun = (UINT8)USB_BOOT_LUN (UsbMass->Lun);
+ ModeSenseCmd.PageCode = 0x3F;
+ ModeSenseCmd.AllocateLen = (UINT8)sizeof (USB_SCSI_MODE_SENSE6_PARA_HEADER);
Status = UsbBootExecCmdWithRetry (
UsbMass,
&ModeSenseCmd,
- (UINT8) sizeof (USB_SCSI_MODE_SENSE6_CMD),
+ (UINT8)sizeof (USB_SCSI_MODE_SENSE6_CMD),
EfiUsbDataIn,
&ModeParaHeader,
sizeof (USB_SCSI_MODE_SENSE6_PARA_HEADER),
@@ -597,13 +599,12 @@ UsbScsiModeSense (
// BIT7 of this byte is indicates whether the medium is write protected.
//
if (!EFI_ERROR (Status)) {
- Media->ReadOnly = (BOOLEAN) ((ModeParaHeader.DevicePara & BIT7) != 0);
+ Media->ReadOnly = (BOOLEAN)((ModeParaHeader.DevicePara & BIT7) != 0);
}
return Status;
}
-
/**
Get the parameters for the USB mass storage media.
@@ -621,13 +622,13 @@ UsbScsiModeSense (
**/
EFI_STATUS
UsbBootGetParams (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- EFI_BLOCK_IO_MEDIA *Media;
- EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
- Media = &(UsbMass->BlockIoMedia);
+ Media = &(UsbMass->BlockIoMedia);
Status = UsbBootInquiry (UsbMass);
if (EFI_ERROR (Status)) {
@@ -640,9 +641,10 @@ UsbBootGetParams (
// 4 Peripheral Device Types are in spec.
//
if ((UsbMass->Pdt != USB_PDT_DIRECT_ACCESS) &&
- (UsbMass->Pdt != USB_PDT_CDROM) &&
- (UsbMass->Pdt != USB_PDT_OPTICAL) &&
- (UsbMass->Pdt != USB_PDT_SIMPLE_DIRECT)) {
+ (UsbMass->Pdt != USB_PDT_CDROM) &&
+ (UsbMass->Pdt != USB_PDT_OPTICAL) &&
+ (UsbMass->Pdt != USB_PDT_SIMPLE_DIRECT))
+ {
DEBUG ((DEBUG_ERROR, "UsbBootGetParams: Found an unsupported peripheral type[%d]\n", UsbMass->Pdt));
return EFI_UNSUPPORTED;
}
@@ -659,7 +661,7 @@ UsbBootGetParams (
//
// Default value 2048 Bytes, in case no media present at first time
//
- Media->BlockSize = 0x0800;
+ Media->BlockSize = 0x0800;
}
Status = UsbBootDetectMedia (UsbMass);
@@ -667,7 +669,6 @@ UsbBootGetParams (
return Status;
}
-
/**
Detect whether the removable media is present and whether it has changed.
@@ -679,19 +680,19 @@ UsbBootGetParams (
**/
EFI_STATUS
UsbBootDetectMedia (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- EFI_BLOCK_IO_MEDIA OldMedia;
- EFI_BLOCK_IO_MEDIA *Media;
- UINT8 CmdSet;
- EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA OldMedia;
+ EFI_BLOCK_IO_MEDIA *Media;
+ UINT8 CmdSet;
+ EFI_STATUS Status;
- Media = &UsbMass->BlockIoMedia;
+ Media = &UsbMass->BlockIoMedia;
CopyMem (&OldMedia, &(UsbMass->BlockIoMedia), sizeof (EFI_BLOCK_IO_MEDIA));
- CmdSet = ((EFI_USB_INTERFACE_DESCRIPTOR *) (UsbMass->Context))->InterfaceSubClass;
+ CmdSet = ((EFI_USB_INTERFACE_DESCRIPTOR *)(UsbMass->Context))->InterfaceSubClass;
Status = UsbBootIsUnitReady (UsbMass);
if (EFI_ERROR (Status)) {
@@ -723,7 +724,7 @@ UsbBootDetectMedia (
}
}
- if (EFI_ERROR (Status) && Status != EFI_NO_MEDIA) {
+ if (EFI_ERROR (Status) && (Status != EFI_NO_MEDIA)) {
//
// For NoMedia, BlockIo is still needed.
//
@@ -749,8 +750,8 @@ UsbBootDetectMedia (
(Media->MediaPresent != OldMedia.MediaPresent) ||
(Media->ReadOnly != OldMedia.ReadOnly) ||
(Media->BlockSize != OldMedia.BlockSize) ||
- (Media->LastBlock != OldMedia.LastBlock)) {
-
+ (Media->LastBlock != OldMedia.LastBlock))
+ {
//
// This function is called from:
// Block I/O Protocol APIs, which run at TPL_CALLBACK.
@@ -781,7 +782,8 @@ UsbBootDetectMedia (
if ((Media->ReadOnly != OldMedia.ReadOnly) ||
(Media->BlockSize != OldMedia.BlockSize) ||
- (Media->LastBlock != OldMedia.LastBlock)) {
+ (Media->LastBlock != OldMedia.LastBlock))
+ {
Media->MediaId++;
}
@@ -791,7 +793,6 @@ UsbBootDetectMedia (
return Status;
}
-
/**
Read or write some blocks from the device.
@@ -807,20 +808,20 @@ UsbBootDetectMedia (
**/
EFI_STATUS
UsbBootReadWriteBlocks (
- IN USB_MASS_DEVICE *UsbMass,
- IN BOOLEAN Write,
- IN UINT32 Lba,
- IN UINTN TotalBlock,
- IN OUT UINT8 *Buffer
+ IN USB_MASS_DEVICE *UsbMass,
+ IN BOOLEAN Write,
+ IN UINT32 Lba,
+ IN UINTN TotalBlock,
+ IN OUT UINT8 *Buffer
)
{
- USB_BOOT_READ_WRITE_10_CMD Cmd;
- EFI_STATUS Status;
- UINT32 Count;
- UINT32 CountMax;
- UINT32 BlockSize;
- UINT32 ByteSize;
- UINT32 Timeout;
+ USB_BOOT_READ_WRITE_10_CMD Cmd;
+ EFI_STATUS Status;
+ UINT32 Count;
+ UINT32 CountMax;
+ UINT32 BlockSize;
+ UINT32 ByteSize;
+ UINT32 Timeout;
BlockSize = UsbMass->BlockIoMedia.BlockSize;
CountMax = USB_BOOT_MAX_CARRY_SIZE / BlockSize;
@@ -839,22 +840,22 @@ UsbBootReadWriteBlocks (
//
// USB command's upper limit timeout is 5s. [USB2.0-9.2.6.1]
//
- Timeout = (UINT32) USB_BOOT_GENERAL_CMD_TIMEOUT;
+ Timeout = (UINT32)USB_BOOT_GENERAL_CMD_TIMEOUT;
//
// Fill in the command then execute
//
ZeroMem (&Cmd, sizeof (USB_BOOT_READ_WRITE_10_CMD));
- Cmd.OpCode = Write ? USB_BOOT_WRITE10_OPCODE : USB_BOOT_READ10_OPCODE;
- Cmd.Lun = (UINT8) (USB_BOOT_LUN (UsbMass->Lun));
- WriteUnaligned32 ((UINT32 *) Cmd.Lba, SwapBytes32 (Lba));
- WriteUnaligned16 ((UINT16 *) Cmd.TransferLen, SwapBytes16 ((UINT16)Count));
+ Cmd.OpCode = Write ? USB_BOOT_WRITE10_OPCODE : USB_BOOT_READ10_OPCODE;
+ Cmd.Lun = (UINT8)(USB_BOOT_LUN (UsbMass->Lun));
+ WriteUnaligned32 ((UINT32 *)Cmd.Lba, SwapBytes32 (Lba));
+ WriteUnaligned16 ((UINT16 *)Cmd.TransferLen, SwapBytes16 ((UINT16)Count));
Status = UsbBootExecCmdWithRetry (
UsbMass,
&Cmd,
- (UINT8) sizeof (USB_BOOT_READ_WRITE_10_CMD),
+ (UINT8)sizeof (USB_BOOT_READ_WRITE_10_CMD),
Write ? EfiUsbDataOut : EfiUsbDataIn,
Buffer,
ByteSize,
@@ -863,10 +864,13 @@ UsbBootReadWriteBlocks (
if (EFI_ERROR (Status)) {
return Status;
}
+
DEBUG ((
- DEBUG_BLKIO, "UsbBoot%sBlocks: LBA (0x%lx), Blk (0x%x)\n",
+ DEBUG_BLKIO,
+ "UsbBoot%sBlocks: LBA (0x%lx), Blk (0x%x)\n",
Write ? L"Write" : L"Read",
- Lba, Count
+ Lba,
+ Count
));
Lba += Count;
Buffer += ByteSize;
@@ -890,20 +894,20 @@ UsbBootReadWriteBlocks (
**/
EFI_STATUS
UsbBootReadWriteBlocks16 (
- IN USB_MASS_DEVICE *UsbMass,
- IN BOOLEAN Write,
- IN UINT64 Lba,
- IN UINTN TotalBlock,
- IN OUT UINT8 *Buffer
+ IN USB_MASS_DEVICE *UsbMass,
+ IN BOOLEAN Write,
+ IN UINT64 Lba,
+ IN UINTN TotalBlock,
+ IN OUT UINT8 *Buffer
)
{
- UINT8 Cmd[16];
- EFI_STATUS Status;
- UINT32 Count;
- UINT32 CountMax;
- UINT32 BlockSize;
- UINT32 ByteSize;
- UINT32 Timeout;
+ UINT8 Cmd[16];
+ EFI_STATUS Status;
+ UINT32 Count;
+ UINT32 CountMax;
+ UINT32 BlockSize;
+ UINT32 ByteSize;
+ UINT32 Timeout;
BlockSize = UsbMass->BlockIoMedia.BlockSize;
CountMax = USB_BOOT_MAX_CARRY_SIZE / BlockSize;
@@ -919,22 +923,22 @@ UsbBootReadWriteBlocks16 (
//
// USB command's upper limit timeout is 5s. [USB2.0-9.2.6.1]
//
- Timeout = (UINT32) USB_BOOT_GENERAL_CMD_TIMEOUT;
+ Timeout = (UINT32)USB_BOOT_GENERAL_CMD_TIMEOUT;
//
// Fill in the command then execute
//
ZeroMem (Cmd, sizeof (Cmd));
- Cmd[0] = Write ? EFI_SCSI_OP_WRITE16 : EFI_SCSI_OP_READ16;
- Cmd[1] = (UINT8) ((USB_BOOT_LUN (UsbMass->Lun) & 0xE0));
- WriteUnaligned64 ((UINT64 *) &Cmd[2], SwapBytes64 (Lba));
- WriteUnaligned32 ((UINT32 *) &Cmd[10], SwapBytes32 (Count));
+ Cmd[0] = Write ? EFI_SCSI_OP_WRITE16 : EFI_SCSI_OP_READ16;
+ Cmd[1] = (UINT8)((USB_BOOT_LUN (UsbMass->Lun) & 0xE0));
+ WriteUnaligned64 ((UINT64 *)&Cmd[2], SwapBytes64 (Lba));
+ WriteUnaligned32 ((UINT32 *)&Cmd[10], SwapBytes32 (Count));
Status = UsbBootExecCmdWithRetry (
UsbMass,
Cmd,
- (UINT8) sizeof (Cmd),
+ (UINT8)sizeof (Cmd),
Write ? EfiUsbDataOut : EfiUsbDataIn,
Buffer,
ByteSize,
@@ -943,10 +947,13 @@ UsbBootReadWriteBlocks16 (
if (EFI_ERROR (Status)) {
return Status;
}
+
DEBUG ((
- DEBUG_BLKIO, "UsbBoot%sBlocks16: LBA (0x%lx), Blk (0x%x)\n",
+ DEBUG_BLKIO,
+ "UsbBoot%sBlocks16: LBA (0x%lx), Blk (0x%x)\n",
Write ? L"Write" : L"Read",
- Lba, Count
+ Lba,
+ Count
));
Lba += Count;
Buffer += ByteSize;
@@ -968,14 +975,14 @@ UsbBootReadWriteBlocks16 (
**/
EFI_STATUS
UsbClearEndpointStall (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- IN UINT8 EndpointAddr
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ IN UINT8 EndpointAddr
)
{
- EFI_USB_DEVICE_REQUEST Request;
- EFI_STATUS Status;
- UINT32 CmdResult;
- UINT32 Timeout;
+ EFI_USB_DEVICE_REQUEST Request;
+ EFI_STATUS Status;
+ UINT32 CmdResult;
+ UINT32 Timeout;
Request.RequestType = 0x02;
Request.Request = USB_REQ_CLEAR_FEATURE;
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.h
index f34a41284e..6722c3b003 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBoot.h
@@ -17,15 +17,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Others are "Group 1 Timeout Commands". That is,
// they should be retried if driver is ready.
//
-#define USB_BOOT_INQUIRY_OPCODE 0x12
-#define USB_BOOT_REQUEST_SENSE_OPCODE 0x03
-#define USB_BOOT_MODE_SENSE10_OPCODE 0x5A
-#define USB_BOOT_READ_CAPACITY_OPCODE 0x25
-#define USB_BOOT_TEST_UNIT_READY_OPCODE 0x00
-#define USB_BOOT_READ10_OPCODE 0x28
-#define USB_BOOT_WRITE10_OPCODE 0x2A
+#define USB_BOOT_INQUIRY_OPCODE 0x12
+#define USB_BOOT_REQUEST_SENSE_OPCODE 0x03
+#define USB_BOOT_MODE_SENSE10_OPCODE 0x5A
+#define USB_BOOT_READ_CAPACITY_OPCODE 0x25
+#define USB_BOOT_TEST_UNIT_READY_OPCODE 0x00
+#define USB_BOOT_READ10_OPCODE 0x28
+#define USB_BOOT_WRITE10_OPCODE 0x2A
-#define USB_SCSI_MODE_SENSE6_OPCODE 0x1A
+#define USB_SCSI_MODE_SENSE6_OPCODE 0x1A
//
// The Sense Key part of the sense data. Sense data has three levels:
@@ -53,25 +53,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Supported PDT codes, or Peripheral Device Type
//
-#define USB_PDT_DIRECT_ACCESS 0x00 ///< Direct access device
-#define USB_PDT_CDROM 0x05 ///< CDROM
-#define USB_PDT_OPTICAL 0x07 ///< Non-CD optical disks
-#define USB_PDT_SIMPLE_DIRECT 0x0E ///< Simplified direct access device
+#define USB_PDT_DIRECT_ACCESS 0x00 ///< Direct access device
+#define USB_PDT_CDROM 0x05 ///< CDROM
+#define USB_PDT_OPTICAL 0x07 ///< Non-CD optical disks
+#define USB_PDT_SIMPLE_DIRECT 0x0E ///< Simplified direct access device
//
// Other parameters, Max carried size is 64KB.
//
-#define USB_BOOT_MAX_CARRY_SIZE SIZE_64KB
+#define USB_BOOT_MAX_CARRY_SIZE SIZE_64KB
//
// Retry mass command times, set by experience
//
-#define USB_BOOT_COMMAND_RETRY 5
+#define USB_BOOT_COMMAND_RETRY 5
//
// Wait for unit ready command, set by experience
//
-#define USB_BOOT_RETRY_UNIT_READY_STALL (500 * USB_MASS_1_MILLISECOND)
+#define USB_BOOT_RETRY_UNIT_READY_STALL (500 * USB_MASS_1_MILLISECOND)
//
// Mass command timeout, refers to specification[USB20-9.2.6.1]
@@ -80,7 +80,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// USB CD-Rom and iPod devices are much slower than USB key when response
// most of commands, So we set 5s as timeout here.
//
-#define USB_BOOT_GENERAL_CMD_TIMEOUT (5 * USB_MASS_1_SECOND)
+#define USB_BOOT_GENERAL_CMD_TIMEOUT (5 * USB_MASS_1_SECOND)
//
// The required commands are INQUIRY, READ CAPACITY, TEST UNIT READY,
@@ -90,122 +90,122 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
#pragma pack(1)
typedef struct {
- UINT8 OpCode;
- UINT8 Lun; ///< Lun (high 3 bits)
- UINT8 Reserved0[2];
- UINT8 AllocLen;
- UINT8 Reserved1;
- UINT8 Pad[6];
+ UINT8 OpCode;
+ UINT8 Lun; ///< Lun (high 3 bits)
+ UINT8 Reserved0[2];
+ UINT8 AllocLen;
+ UINT8 Reserved1;
+ UINT8 Pad[6];
} USB_BOOT_INQUIRY_CMD;
typedef struct {
- UINT8 Pdt; ///< Peripheral Device Type (low 5 bits)
- UINT8 Removable; ///< Removable Media (highest bit)
- UINT8 Reserved0[2];
- UINT8 AddLen; ///< Additional length
- UINT8 Reserved1[3];
- UINT8 VendorID[8];
- UINT8 ProductID[16];
- UINT8 ProductRevision[4];
+ UINT8 Pdt; ///< Peripheral Device Type (low 5 bits)
+ UINT8 Removable; ///< Removable Media (highest bit)
+ UINT8 Reserved0[2];
+ UINT8 AddLen; ///< Additional length
+ UINT8 Reserved1[3];
+ UINT8 VendorID[8];
+ UINT8 ProductID[16];
+ UINT8 ProductRevision[4];
} USB_BOOT_INQUIRY_DATA;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun;
- UINT8 Reserved0[8];
- UINT8 Pad[2];
+ UINT8 OpCode;
+ UINT8 Lun;
+ UINT8 Reserved0[8];
+ UINT8 Pad[2];
} USB_BOOT_READ_CAPACITY_CMD;
typedef struct {
- UINT8 LastLba[4];
- UINT8 BlockLen[4];
+ UINT8 LastLba[4];
+ UINT8 BlockLen[4];
} USB_BOOT_READ_CAPACITY_DATA;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun;
- UINT8 Reserved[4];
- UINT8 Pad[6];
+ UINT8 OpCode;
+ UINT8 Lun;
+ UINT8 Reserved[4];
+ UINT8 Pad[6];
} USB_BOOT_TEST_UNIT_READY_CMD;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun;
- UINT8 PageCode;
- UINT8 Reserved0[4];
- UINT8 ParaListLenMsb;
- UINT8 ParaListLenLsb;
- UINT8 Reserved1;
- UINT8 Pad[2];
+ UINT8 OpCode;
+ UINT8 Lun;
+ UINT8 PageCode;
+ UINT8 Reserved0[4];
+ UINT8 ParaListLenMsb;
+ UINT8 ParaListLenLsb;
+ UINT8 Reserved1;
+ UINT8 Pad[2];
} USB_BOOT_MODE_SENSE10_CMD;
typedef struct {
- UINT8 ModeDataLenMsb;
- UINT8 ModeDataLenLsb;
- UINT8 Reserved0[4];
- UINT8 BlkDesLenMsb;
- UINT8 BlkDesLenLsb;
+ UINT8 ModeDataLenMsb;
+ UINT8 ModeDataLenLsb;
+ UINT8 Reserved0[4];
+ UINT8 BlkDesLenMsb;
+ UINT8 BlkDesLenLsb;
} USB_BOOT_MODE_SENSE10_PARA_HEADER;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun; ///< Lun (High 3 bits)
- UINT8 Lba[4]; ///< Logical block address
- UINT8 Reserved0;
- UINT8 TransferLen[2]; ///< Transfer length
- UINT8 Reserverd1;
- UINT8 Pad[2];
+ UINT8 OpCode;
+ UINT8 Lun; ///< Lun (High 3 bits)
+ UINT8 Lba[4]; ///< Logical block address
+ UINT8 Reserved0;
+ UINT8 TransferLen[2]; ///< Transfer length
+ UINT8 Reserverd1;
+ UINT8 Pad[2];
} USB_BOOT_READ_WRITE_10_CMD;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun; ///< Lun (High 3 bits)
- UINT8 Reserved0[2];
- UINT8 AllocLen; ///< Allocation length
- UINT8 Reserved1;
- UINT8 Pad[6];
+ UINT8 OpCode;
+ UINT8 Lun; ///< Lun (High 3 bits)
+ UINT8 Reserved0[2];
+ UINT8 AllocLen; ///< Allocation length
+ UINT8 Reserved1;
+ UINT8 Pad[6];
} USB_BOOT_REQUEST_SENSE_CMD;
typedef struct {
- UINT8 ErrorCode;
- UINT8 Reserved0;
- UINT8 SenseKey; ///< Sense key (low 4 bits)
- UINT8 Infor[4];
- UINT8 AddLen; ///< Additional Sense length, 10
- UINT8 Reserved1[4];
- UINT8 Asc; ///< Additional Sense Code
- UINT8 Ascq; ///< Additional Sense Code Qualifier
- UINT8 Reserverd2[4];
+ UINT8 ErrorCode;
+ UINT8 Reserved0;
+ UINT8 SenseKey; ///< Sense key (low 4 bits)
+ UINT8 Infor[4];
+ UINT8 AddLen; ///< Additional Sense length, 10
+ UINT8 Reserved1[4];
+ UINT8 Asc; ///< Additional Sense Code
+ UINT8 Ascq; ///< Additional Sense Code Qualifier
+ UINT8 Reserverd2[4];
} USB_BOOT_REQUEST_SENSE_DATA;
typedef struct {
- UINT8 OpCode;
- UINT8 Lun;
- UINT8 PageCode;
- UINT8 Reserved0;
- UINT8 AllocateLen;
- UINT8 Control;
+ UINT8 OpCode;
+ UINT8 Lun;
+ UINT8 PageCode;
+ UINT8 Reserved0;
+ UINT8 AllocateLen;
+ UINT8 Control;
} USB_SCSI_MODE_SENSE6_CMD;
typedef struct {
- UINT8 ModeDataLen;
- UINT8 MediumType;
- UINT8 DevicePara;
- UINT8 BlkDesLen;
+ UINT8 ModeDataLen;
+ UINT8 MediumType;
+ UINT8 DevicePara;
+ UINT8 BlkDesLen;
} USB_SCSI_MODE_SENSE6_PARA_HEADER;
#pragma pack()
//
// Convert a LUN number to that in the command
//
-#define USB_BOOT_LUN(Lun) ((Lun) << 5)
+#define USB_BOOT_LUN(Lun) ((Lun) << 5)
//
// Get the removable, PDT, and sense key bits from the command data
//
-#define USB_BOOT_REMOVABLE(RmbByte) (((RmbByte) & BIT7) != 0)
-#define USB_BOOT_PDT(Pdt) ((Pdt) & 0x1f)
-#define USB_BOOT_SENSE_KEY(Key) ((Key) & 0x0f)
+#define USB_BOOT_REMOVABLE(RmbByte) (((RmbByte) & BIT7) != 0)
+#define USB_BOOT_PDT(Pdt) ((Pdt) & 0x1f)
+#define USB_BOOT_SENSE_KEY(Key) ((Key) & 0x0f)
/**
Get the parameters for the USB mass storage media.
@@ -224,7 +224,7 @@ typedef struct {
**/
EFI_STATUS
UsbBootGetParams (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
);
/**
@@ -238,7 +238,7 @@ UsbBootGetParams (
**/
EFI_STATUS
UsbBootIsUnitReady (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
);
/**
@@ -252,7 +252,7 @@ UsbBootIsUnitReady (
**/
EFI_STATUS
UsbBootDetectMedia (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
);
/**
@@ -269,10 +269,10 @@ UsbBootDetectMedia (
**/
EFI_STATUS
UsbBootReadBlocks (
- IN USB_MASS_DEVICE *UsbMass,
- IN UINT32 Lba,
- IN UINTN TotalBlock,
- OUT UINT8 *Buffer
+ IN USB_MASS_DEVICE *UsbMass,
+ IN UINT32 Lba,
+ IN UINTN TotalBlock,
+ OUT UINT8 *Buffer
);
/**
@@ -290,11 +290,11 @@ UsbBootReadBlocks (
**/
EFI_STATUS
UsbBootReadWriteBlocks (
- IN USB_MASS_DEVICE *UsbMass,
- IN BOOLEAN Write,
- IN UINT32 Lba,
- IN UINTN TotalBlock,
- IN OUT UINT8 *Buffer
+ IN USB_MASS_DEVICE *UsbMass,
+ IN BOOLEAN Write,
+ IN UINT32 Lba,
+ IN UINTN TotalBlock,
+ IN OUT UINT8 *Buffer
);
/**
@@ -311,11 +311,11 @@ UsbBootReadWriteBlocks (
**/
EFI_STATUS
UsbBootReadWriteBlocks16 (
- IN USB_MASS_DEVICE *UsbMass,
- IN BOOLEAN Write,
- IN UINT64 Lba,
- IN UINTN TotalBlock,
- IN OUT UINT8 *Buffer
+ IN USB_MASS_DEVICE *UsbMass,
+ IN BOOLEAN Write,
+ IN UINT64 Lba,
+ IN UINTN TotalBlock,
+ IN OUT UINT8 *Buffer
);
/**
@@ -330,9 +330,8 @@ UsbBootReadWriteBlocks16 (
**/
EFI_STATUS
UsbClearEndpointStall (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- IN UINT8 EndpointAddr
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ IN UINT8 EndpointAddr
);
#endif
-
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.c
index ce252e60fc..55c239d33e 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.c
@@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Definition of USB BOT Transport Protocol
//
-USB_MASS_TRANSPORT mUsbBotTransport = {
+USB_MASS_TRANSPORT mUsbBotTransport = {
USB_MASS_STORE_BOT,
UsbBotInit,
UsbBotExecCommand,
@@ -38,8 +38,8 @@ USB_MASS_TRANSPORT mUsbBotTransport = {
**/
EFI_STATUS
UsbBotInit (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- OUT VOID **Context OPTIONAL
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ OUT VOID **Context OPTIONAL
)
{
USB_BOT_PROTOCOL *UsbBot;
@@ -84,17 +84,17 @@ UsbBotInit (
}
if (USB_IS_IN_ENDPOINT (EndPoint.EndpointAddress) &&
- (UsbBot->BulkInEndpoint == NULL)) {
-
- UsbBot->BulkInEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *) (UsbBot + 1);
- CopyMem(UsbBot->BulkInEndpoint, &EndPoint, sizeof (EndPoint));
+ (UsbBot->BulkInEndpoint == NULL))
+ {
+ UsbBot->BulkInEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *)(UsbBot + 1);
+ CopyMem (UsbBot->BulkInEndpoint, &EndPoint, sizeof (EndPoint));
}
if (USB_IS_OUT_ENDPOINT (EndPoint.EndpointAddress) &&
- (UsbBot->BulkOutEndpoint == NULL)) {
-
- UsbBot->BulkOutEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *) (UsbBot + 1) + 1;
- CopyMem (UsbBot->BulkOutEndpoint, &EndPoint, sizeof(EndPoint));
+ (UsbBot->BulkOutEndpoint == NULL))
+ {
+ UsbBot->BulkOutEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *)(UsbBot + 1) + 1;
+ CopyMem (UsbBot->BulkOutEndpoint, &EndPoint, sizeof (EndPoint));
}
}
@@ -145,19 +145,19 @@ ON_ERROR:
**/
EFI_STATUS
UsbBotSendCommand (
- IN USB_BOT_PROTOCOL *UsbBot,
- IN UINT8 *Cmd,
- IN UINT8 CmdLen,
- IN EFI_USB_DATA_DIRECTION DataDir,
- IN UINT32 TransLen,
- IN UINT8 Lun
+ IN USB_BOT_PROTOCOL *UsbBot,
+ IN UINT8 *Cmd,
+ IN UINT8 CmdLen,
+ IN EFI_USB_DATA_DIRECTION DataDir,
+ IN UINT32 TransLen,
+ IN UINT8 Lun
)
{
- USB_BOT_CBW Cbw;
- EFI_STATUS Status;
- UINT32 Result;
- UINTN DataLen;
- UINTN Timeout;
+ USB_BOT_CBW Cbw;
+ EFI_STATUS Status;
+ UINT32 Result;
+ UINTN DataLen;
+ UINTN Timeout;
ASSERT ((CmdLen > 0) && (CmdLen <= USB_BOT_MAX_CMDLEN));
@@ -167,7 +167,7 @@ UsbBotSendCommand (
Cbw.Signature = USB_BOT_CBW_SIGNATURE;
Cbw.Tag = UsbBot->CbwTag;
Cbw.DataLen = TransLen;
- Cbw.Flag = (UINT8) ((DataDir == EfiUsbDataIn) ? BIT7 : 0);
+ Cbw.Flag = (UINT8)((DataDir == EfiUsbDataIn) ? BIT7 : 0);
Cbw.Lun = Lun;
Cbw.CmdLen = CmdLen;
@@ -190,7 +190,7 @@ UsbBotSendCommand (
&Result
);
if (EFI_ERROR (Status)) {
- if (USB_IS_ERROR (Result, EFI_USB_ERR_STALL) && DataDir == EfiUsbDataOut) {
+ if (USB_IS_ERROR (Result, EFI_USB_ERR_STALL) && (DataDir == EfiUsbDataOut)) {
//
// Respond to Bulk-Out endpoint stall with a Reset Recovery,
// according to section 5.3.1 of USB Mass Storage Class Bulk-Only Transport Spec, v1.0.
@@ -204,7 +204,6 @@ UsbBotSendCommand (
return Status;
}
-
/**
Transfer the data between the device and host.
@@ -226,16 +225,16 @@ UsbBotSendCommand (
**/
EFI_STATUS
UsbBotDataTransfer (
- IN USB_BOT_PROTOCOL *UsbBot,
- IN EFI_USB_DATA_DIRECTION DataDir,
- IN OUT UINT8 *Data,
- IN OUT UINTN *TransLen,
- IN UINT32 Timeout
+ IN USB_BOT_PROTOCOL *UsbBot,
+ IN EFI_USB_DATA_DIRECTION DataDir,
+ IN OUT UINT8 *Data,
+ IN OUT UINTN *TransLen,
+ IN UINT32 Timeout
)
{
- EFI_USB_ENDPOINT_DESCRIPTOR *Endpoint;
- EFI_STATUS Status;
- UINT32 Result;
+ EFI_USB_ENDPOINT_DESCRIPTOR *Endpoint;
+ EFI_STATUS Status;
+ UINT32 Result;
//
// If no data to transfer, just return EFI_SUCCESS.
@@ -274,15 +273,15 @@ UsbBotDataTransfer (
} else {
DEBUG ((DEBUG_ERROR, "UsbBotDataTransfer: (%r)\n", Status));
}
- if(Status == EFI_TIMEOUT){
- UsbBotResetDevice(UsbBot, FALSE);
+
+ if (Status == EFI_TIMEOUT) {
+ UsbBotResetDevice (UsbBot, FALSE);
}
}
return Status;
}
-
/**
Get the command execution status from device.
@@ -304,19 +303,19 @@ UsbBotDataTransfer (
**/
EFI_STATUS
UsbBotGetStatus (
- IN USB_BOT_PROTOCOL *UsbBot,
- IN UINT32 TransLen,
- OUT UINT8 *CmdStatus
+ IN USB_BOT_PROTOCOL *UsbBot,
+ IN UINT32 TransLen,
+ OUT UINT8 *CmdStatus
)
{
- USB_BOT_CSW Csw;
- UINTN Len;
- UINT8 Endpoint;
- EFI_STATUS Status;
- UINT32 Result;
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT32 Index;
- UINTN Timeout;
+ USB_BOT_CSW Csw;
+ UINTN Len;
+ UINT8 Endpoint;
+ EFI_STATUS Status;
+ UINT32 Result;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT32 Index;
+ UINTN Timeout;
*CmdStatus = USB_BOT_COMMAND_ERROR;
Status = EFI_DEVICE_ERROR;
@@ -339,10 +338,11 @@ UsbBotGetStatus (
Timeout,
&Result
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
if (USB_IS_ERROR (Result, EFI_USB_ERR_STALL)) {
UsbClearEndpointStall (UsbIo, Endpoint);
}
+
continue;
}
@@ -361,15 +361,15 @@ UsbBotGetStatus (
break;
}
}
+
//
- //The tag is increased even if there is an error.
+ // The tag is increased even if there is an error.
//
UsbBot->CbwTag++;
return Status;
}
-
/**
Call the USB Mass Storage Class BOT protocol to issue
the command/data/status circle to execute the commands.
@@ -402,13 +402,13 @@ UsbBotExecCommand (
OUT UINT32 *CmdStatus
)
{
- USB_BOT_PROTOCOL *UsbBot;
- EFI_STATUS Status;
- UINTN TransLen;
- UINT8 Result;
+ USB_BOT_PROTOCOL *UsbBot;
+ EFI_STATUS Status;
+ UINTN TransLen;
+ UINT8 Result;
- *CmdStatus = USB_MASS_CMD_FAIL;
- UsbBot = (USB_BOT_PROTOCOL *) Context;
+ *CmdStatus = USB_MASS_CMD_FAIL;
+ UsbBot = (USB_BOT_PROTOCOL *)Context;
//
// Send the command to the device. Return immediately if device
@@ -425,7 +425,7 @@ UsbBotExecCommand (
// failed. The host should attempt to receive the CSW no matter
// whether it succeeds or fails.
//
- TransLen = (UINTN) DataLen;
+ TransLen = (UINTN)DataLen;
UsbBotDataTransfer (UsbBot, DataDir, Data, &TransLen, Timeout);
//
@@ -444,7 +444,6 @@ UsbBotExecCommand (
return EFI_SUCCESS;
}
-
/**
Reset the USB mass storage device by BOT protocol.
@@ -459,8 +458,8 @@ UsbBotExecCommand (
**/
EFI_STATUS
UsbBotResetDevice (
- IN VOID *Context,
- IN BOOLEAN ExtendedVerification
+ IN VOID *Context,
+ IN BOOLEAN ExtendedVerification
)
{
USB_BOT_PROTOCOL *UsbBot;
@@ -469,7 +468,7 @@ UsbBotResetDevice (
UINT32 Result;
UINT32 Timeout;
- UsbBot = (USB_BOT_PROTOCOL *) Context;
+ UsbBot = (USB_BOT_PROTOCOL *)Context;
if (ExtendedVerification) {
//
@@ -522,7 +521,6 @@ UsbBotResetDevice (
return Status;
}
-
/**
Get the max LUN (Logical Unit Number) of USB mass storage device.
@@ -536,8 +534,8 @@ UsbBotResetDevice (
**/
EFI_STATUS
UsbBotGetMaxLun (
- IN VOID *Context,
- OUT UINT8 *MaxLun
+ IN VOID *Context,
+ OUT UINT8 *MaxLun
)
{
USB_BOT_PROTOCOL *UsbBot;
@@ -546,11 +544,11 @@ UsbBotGetMaxLun (
UINT32 Result;
UINT32 Timeout;
- if (Context == NULL || MaxLun == NULL) {
+ if ((Context == NULL) || (MaxLun == NULL)) {
return EFI_INVALID_PARAMETER;
}
- UsbBot = (USB_BOT_PROTOCOL *) Context;
+ UsbBot = (USB_BOT_PROTOCOL *)Context;
//
// Issue a class specific Bulk-Only Mass Storage get max lun request.
@@ -568,11 +566,11 @@ UsbBotGetMaxLun (
&Request,
EfiUsbDataIn,
Timeout,
- (VOID *) MaxLun,
+ (VOID *)MaxLun,
1,
&Result
);
- if (EFI_ERROR (Status) || *MaxLun > USB_BOT_MAX_LUN) {
+ if (EFI_ERROR (Status) || (*MaxLun > USB_BOT_MAX_LUN)) {
//
// If the Get LUN request returns an error or the MaxLun is larger than
// the maximum LUN value (0x0f) supported by the USB Mass Storage Class
@@ -598,7 +596,7 @@ UsbBotGetMaxLun (
**/
EFI_STATUS
UsbBotCleanUp (
- IN VOID *Context
+ IN VOID *Context
)
{
FreePool (Context);
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.h
index 3ef8f240a2..cf8e9a3bdd 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassBot.h
@@ -11,29 +11,29 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USBMASS_BOT_H_
#define _EFI_USBMASS_BOT_H_
-extern USB_MASS_TRANSPORT mUsbBotTransport;
+extern USB_MASS_TRANSPORT mUsbBotTransport;
//
// Usb Bulk-Only class specific request
//
-#define USB_BOT_RESET_REQUEST 0xFF ///< Bulk-Only Mass Storage Reset
-#define USB_BOT_GETLUN_REQUEST 0xFE ///< Get Max Lun
-#define USB_BOT_CBW_SIGNATURE 0x43425355 ///< dCBWSignature, tag the packet as CBW
-#define USB_BOT_CSW_SIGNATURE 0x53425355 ///< dCSWSignature, tag the packet as CSW
-#define USB_BOT_MAX_LUN 0x0F ///< Lun number is from 0 to 15
-#define USB_BOT_MAX_CMDLEN 16 ///< Maximum number of command from command set
+#define USB_BOT_RESET_REQUEST 0xFF ///< Bulk-Only Mass Storage Reset
+#define USB_BOT_GETLUN_REQUEST 0xFE ///< Get Max Lun
+#define USB_BOT_CBW_SIGNATURE 0x43425355 ///< dCBWSignature, tag the packet as CBW
+#define USB_BOT_CSW_SIGNATURE 0x53425355 ///< dCSWSignature, tag the packet as CSW
+#define USB_BOT_MAX_LUN 0x0F ///< Lun number is from 0 to 15
+#define USB_BOT_MAX_CMDLEN 16 ///< Maximum number of command from command set
//
// Usb BOT command block status values
//
-#define USB_BOT_COMMAND_OK 0x00 ///< Command passed, good status
-#define USB_BOT_COMMAND_FAILED 0x01 ///< Command failed
-#define USB_BOT_COMMAND_ERROR 0x02 ///< Phase error, need to reset the device
+#define USB_BOT_COMMAND_OK 0x00 ///< Command passed, good status
+#define USB_BOT_COMMAND_FAILED 0x01 ///< Command failed
+#define USB_BOT_COMMAND_ERROR 0x02 ///< Phase error, need to reset the device
//
// Usb Bot retry to get CSW, refers to specification[BOT10-5.3, it says 2 times]
//
-#define USB_BOT_RECV_CSW_RETRY 3
+#define USB_BOT_RECV_CSW_RETRY 3
//
// Usb Bot wait device reset complete, set by experience
@@ -43,32 +43,32 @@ extern USB_MASS_TRANSPORT mUsbBotTransport;
//
// Usb Bot transport timeout, set by experience
//
-#define USB_BOT_SEND_CBW_TIMEOUT (3 * USB_MASS_1_SECOND)
-#define USB_BOT_RECV_CSW_TIMEOUT (3 * USB_MASS_1_SECOND)
-#define USB_BOT_RESET_DEVICE_TIMEOUT (3 * USB_MASS_1_SECOND)
+#define USB_BOT_SEND_CBW_TIMEOUT (3 * USB_MASS_1_SECOND)
+#define USB_BOT_RECV_CSW_TIMEOUT (3 * USB_MASS_1_SECOND)
+#define USB_BOT_RESET_DEVICE_TIMEOUT (3 * USB_MASS_1_SECOND)
#pragma pack(1)
///
/// The CBW (Command Block Wrapper) structures used by the USB BOT protocol.
///
typedef struct {
- UINT32 Signature;
- UINT32 Tag;
- UINT32 DataLen; ///< Length of data between CBW and CSW
- UINT8 Flag; ///< Bit 7, 0 ~ Data-Out, 1 ~ Data-In
- UINT8 Lun; ///< Lun number. Bits 0~3 are used
- UINT8 CmdLen; ///< Length of the command. Bits 0~4 are used
- UINT8 CmdBlock[USB_BOT_MAX_CMDLEN];
+ UINT32 Signature;
+ UINT32 Tag;
+ UINT32 DataLen; ///< Length of data between CBW and CSW
+ UINT8 Flag; ///< Bit 7, 0 ~ Data-Out, 1 ~ Data-In
+ UINT8 Lun; ///< Lun number. Bits 0~3 are used
+ UINT8 CmdLen; ///< Length of the command. Bits 0~4 are used
+ UINT8 CmdBlock[USB_BOT_MAX_CMDLEN];
} USB_BOT_CBW;
///
/// The and CSW (Command Status Wrapper) structures used by the USB BOT protocol.
///
typedef struct {
- UINT32 Signature;
- UINT32 Tag;
- UINT32 DataResidue;
- UINT8 CmdStatus;
+ UINT32 Signature;
+ UINT32 Tag;
+ UINT32 DataResidue;
+ UINT8 CmdStatus;
} USB_BOT_CSW;
#pragma pack()
@@ -76,11 +76,11 @@ typedef struct {
//
// Put Interface at the first field to make it easy to distinguish BOT/CBI Protocol instance
//
- EFI_USB_INTERFACE_DESCRIPTOR Interface;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
- UINT32 CbwTag;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_USB_INTERFACE_DESCRIPTOR Interface;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
+ UINT32 CbwTag;
+ EFI_USB_IO_PROTOCOL *UsbIo;
} USB_BOT_PROTOCOL;
/**
@@ -100,8 +100,8 @@ typedef struct {
**/
EFI_STATUS
UsbBotInit (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- OUT VOID **Context OPTIONAL
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ OUT VOID **Context OPTIONAL
);
/**
@@ -150,8 +150,8 @@ UsbBotExecCommand (
**/
EFI_STATUS
UsbBotResetDevice (
- IN VOID *Context,
- IN BOOLEAN ExtendedVerification
+ IN VOID *Context,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -167,8 +167,8 @@ UsbBotResetDevice (
**/
EFI_STATUS
UsbBotGetMaxLun (
- IN VOID *Context,
- OUT UINT8 *MaxLun
+ IN VOID *Context,
+ OUT UINT8 *MaxLun
);
/**
@@ -181,7 +181,7 @@ UsbBotGetMaxLun (
**/
EFI_STATUS
UsbBotCleanUp (
- IN VOID *Context
+ IN VOID *Context
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.c
index 423104f504..05903a5e74 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.c
@@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Definition of USB CBI0 Transport Protocol
//
-USB_MASS_TRANSPORT mUsbCbi0Transport = {
+USB_MASS_TRANSPORT mUsbCbi0Transport = {
USB_MASS_STORE_CBI0,
UsbCbiInit,
UsbCbiExecCommand,
@@ -26,7 +26,7 @@ USB_MASS_TRANSPORT mUsbCbi0Transport = {
//
// Definition of USB CBI1 Transport Protocol
//
-USB_MASS_TRANSPORT mUsbCbi1Transport = {
+USB_MASS_TRANSPORT mUsbCbi1Transport = {
USB_MASS_STORE_CBI1,
UsbCbiInit,
UsbCbiExecCommand,
@@ -52,8 +52,8 @@ USB_MASS_TRANSPORT mUsbCbi1Transport = {
**/
EFI_STATUS
UsbCbiInit (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- OUT VOID **Context OPTIONAL
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ OUT VOID **Context OPTIONAL
)
{
USB_CBI_PROTOCOL *UsbCbi;
@@ -82,8 +82,9 @@ UsbCbiInit (
}
Interface = &UsbCbi->Interface;
- if ((Interface->InterfaceProtocol != USB_MASS_STORE_CBI0)
- && (Interface->InterfaceProtocol != USB_MASS_STORE_CBI1)) {
+ if ( (Interface->InterfaceProtocol != USB_MASS_STORE_CBI0)
+ && (Interface->InterfaceProtocol != USB_MASS_STORE_CBI1))
+ {
Status = EFI_UNSUPPORTED;
goto ON_ERROR;
}
@@ -102,27 +103,27 @@ UsbCbiInit (
// Use the first Bulk-In and Bulk-Out endpoints
//
if (USB_IS_IN_ENDPOINT (EndPoint.EndpointAddress) &&
- (UsbCbi->BulkInEndpoint == NULL)) {
-
- UsbCbi->BulkInEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *) (UsbCbi + 1);
- CopyMem(UsbCbi->BulkInEndpoint, &EndPoint, sizeof (EndPoint));;
+ (UsbCbi->BulkInEndpoint == NULL))
+ {
+ UsbCbi->BulkInEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *)(UsbCbi + 1);
+ CopyMem (UsbCbi->BulkInEndpoint, &EndPoint, sizeof (EndPoint));
}
if (USB_IS_OUT_ENDPOINT (EndPoint.EndpointAddress) &&
- (UsbCbi->BulkOutEndpoint == NULL)) {
-
- UsbCbi->BulkOutEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *) (UsbCbi + 1) + 1;
- CopyMem(UsbCbi->BulkOutEndpoint, &EndPoint, sizeof (EndPoint));
+ (UsbCbi->BulkOutEndpoint == NULL))
+ {
+ UsbCbi->BulkOutEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *)(UsbCbi + 1) + 1;
+ CopyMem (UsbCbi->BulkOutEndpoint, &EndPoint, sizeof (EndPoint));
}
} else if (USB_IS_INTERRUPT_ENDPOINT (EndPoint.Attributes)) {
//
// Use the first interrupt endpoint if it is CBI0
//
if ((Interface->InterfaceProtocol == USB_MASS_STORE_CBI0) &&
- (UsbCbi->InterruptEndpoint == NULL)) {
-
- UsbCbi->InterruptEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *) (UsbCbi + 1) + 2;
- CopyMem(UsbCbi->InterruptEndpoint, &EndPoint, sizeof (EndPoint));
+ (UsbCbi->InterruptEndpoint == NULL))
+ {
+ UsbCbi->InterruptEndpoint = (EFI_USB_ENDPOINT_DESCRIPTOR *)(UsbCbi + 1) + 2;
+ CopyMem (UsbCbi->InterruptEndpoint, &EndPoint, sizeof (EndPoint));
}
}
}
@@ -131,6 +132,7 @@ UsbCbiInit (
Status = EFI_UNSUPPORTED;
goto ON_ERROR;
}
+
if ((Interface->InterfaceProtocol == USB_MASS_STORE_CBI0) && (UsbCbi->InterruptEndpoint == NULL)) {
Status = EFI_UNSUPPORTED;
goto ON_ERROR;
@@ -166,10 +168,10 @@ ON_ERROR:
**/
EFI_STATUS
UsbCbiSendCommand (
- IN USB_CBI_PROTOCOL *UsbCbi,
- IN UINT8 *Cmd,
- IN UINT8 CmdLen,
- IN UINT32 Timeout
+ IN USB_CBI_PROTOCOL *UsbCbi,
+ IN UINT8 *Cmd,
+ IN UINT8 CmdLen,
+ IN UINT32 Timeout
)
{
EFI_USB_DEVICE_REQUEST Request;
@@ -188,8 +190,8 @@ UsbCbiSendCommand (
Request.Index = UsbCbi->Interface.InterfaceNumber;
Request.Length = CmdLen;
- Status = EFI_SUCCESS;
- Timeout = Timeout / USB_MASS_1_MILLISECOND;
+ Status = EFI_SUCCESS;
+ Timeout = Timeout / USB_MASS_1_MILLISECOND;
for (Retry = 0; Retry < USB_CBI_MAX_RETRY; Retry++) {
//
@@ -223,7 +225,6 @@ UsbCbiSendCommand (
return Status;
}
-
/**
Transfer data between the device and host.
@@ -244,20 +245,20 @@ UsbCbiSendCommand (
**/
EFI_STATUS
UsbCbiDataTransfer (
- IN USB_CBI_PROTOCOL *UsbCbi,
- IN EFI_USB_DATA_DIRECTION DataDir,
- IN OUT UINT8 *Data,
- IN OUT UINTN *TransLen,
- IN UINT32 Timeout
+ IN USB_CBI_PROTOCOL *UsbCbi,
+ IN EFI_USB_DATA_DIRECTION DataDir,
+ IN OUT UINT8 *Data,
+ IN OUT UINTN *TransLen,
+ IN UINT32 Timeout
)
{
- EFI_USB_ENDPOINT_DESCRIPTOR *Endpoint;
- EFI_STATUS Status;
- UINT32 TransStatus;
- UINTN Remain;
- UINTN Increment;
- UINT8 *Next;
- UINTN Retry;
+ EFI_USB_ENDPOINT_DESCRIPTOR *Endpoint;
+ EFI_STATUS Status;
+ UINT32 TransStatus;
+ UINTN Remain;
+ UINTN Increment;
+ UINT8 *Next;
+ UINTN Retry;
//
// If no data to transfer, just return EFI_SUCCESS.
@@ -287,7 +288,7 @@ UsbCbiDataTransfer (
while (Remain > 0) {
TransStatus = 0;
- if (Remain > (UINTN) USB_CBI_MAX_PACKET_NUM * Endpoint->MaxPacketSize) {
+ if (Remain > (UINTN)USB_CBI_MAX_PACKET_NUM * Endpoint->MaxPacketSize) {
Increment = USB_CBI_MAX_PACKET_NUM * Endpoint->MaxPacketSize;
} else {
Increment = Remain;
@@ -334,7 +335,7 @@ UsbCbiDataTransfer (
goto ON_EXIT;
}
- Next += Increment;
+ Next += Increment;
Remain -= Increment;
}
@@ -343,7 +344,6 @@ ON_EXIT:
return Status;
}
-
/**
Gets the result of high level command execution from interrupt endpoint.
@@ -362,20 +362,20 @@ ON_EXIT:
**/
EFI_STATUS
UsbCbiGetStatus (
- IN USB_CBI_PROTOCOL *UsbCbi,
- IN UINT32 Timeout,
- OUT USB_CBI_STATUS *Result
+ IN USB_CBI_PROTOCOL *UsbCbi,
+ IN UINT32 Timeout,
+ OUT USB_CBI_STATUS *Result
)
{
- UINTN Len;
- UINT8 Endpoint;
- EFI_STATUS Status;
- UINT32 TransStatus;
- INTN Retry;
+ UINTN Len;
+ UINT8 Endpoint;
+ EFI_STATUS Status;
+ UINT32 TransStatus;
+ INTN Retry;
- Endpoint = UsbCbi->InterruptEndpoint->EndpointAddress;
- Status = EFI_SUCCESS;
- Timeout = Timeout / USB_MASS_1_MILLISECOND;
+ Endpoint = UsbCbi->InterruptEndpoint->EndpointAddress;
+ Status = EFI_SUCCESS;
+ Timeout = Timeout / USB_MASS_1_MILLISECOND;
//
// Attempt to the read the result from interrupt endpoint
@@ -405,7 +405,6 @@ UsbCbiGetStatus (
return Status;
}
-
/**
Execute USB mass storage command through the CBI0/CBI1 transport protocol.
@@ -436,13 +435,13 @@ UsbCbiExecCommand (
OUT UINT32 *CmdStatus
)
{
- USB_CBI_PROTOCOL *UsbCbi;
- USB_CBI_STATUS Result;
- EFI_STATUS Status;
- UINTN TransLen;
+ USB_CBI_PROTOCOL *UsbCbi;
+ USB_CBI_STATUS Result;
+ EFI_STATUS Status;
+ UINTN TransLen;
- *CmdStatus = USB_MASS_CMD_SUCCESS;
- UsbCbi = (USB_CBI_PROTOCOL *) Context;
+ *CmdStatus = USB_MASS_CMD_SUCCESS;
+ UsbCbi = (USB_CBI_PROTOCOL *)Context;
//
// Send the command to the device. Return immediately if device
@@ -450,8 +449,8 @@ UsbCbiExecCommand (
//
Status = UsbCbiSendCommand (UsbCbi, Cmd, CmdLen, Timeout);
if (EFI_ERROR (Status)) {
- gBS->Stall(10 * USB_MASS_1_MILLISECOND);
- DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiSendCommand (%r)\n",Status));
+ gBS->Stall (10 * USB_MASS_1_MILLISECOND);
+ DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiSendCommand (%r)\n", Status));
return Status;
}
@@ -459,11 +458,11 @@ UsbCbiExecCommand (
// Transfer the data. Return this status if no interrupt endpoint
// is used to report the transfer status.
//
- TransLen = (UINTN) DataLen;
+ TransLen = (UINTN)DataLen;
- Status = UsbCbiDataTransfer (UsbCbi, DataDir, Data, &TransLen, Timeout);
+ Status = UsbCbiDataTransfer (UsbCbi, DataDir, Data, &TransLen, Timeout);
if (UsbCbi->InterruptEndpoint == NULL) {
- DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiDataTransfer (%r)\n",Status));
+ DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiDataTransfer (%r)\n", Status));
return Status;
}
@@ -472,7 +471,7 @@ UsbCbiExecCommand (
//
Status = UsbCbiGetStatus (UsbCbi, Timeout, &Result);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiGetStatus (%r)\n",Status));
+ DEBUG ((DEBUG_ERROR, "UsbCbiExecCommand: UsbCbiGetStatus (%r)\n", Status));
return Status;
}
@@ -483,7 +482,7 @@ UsbCbiExecCommand (
// Do not set the USB_MASS_CMD_FAIL for a request sense command
// as a bad result type doesn't mean a cmd failure
//
- if (Result.Type != 0 && *(UINT8*)Cmd != 0x03) {
+ if ((Result.Type != 0) && (*(UINT8 *)Cmd != 0x03)) {
*CmdStatus = USB_MASS_CMD_FAIL;
}
} else {
@@ -491,40 +490,39 @@ UsbCbiExecCommand (
// Check page 27, CBI spec 1.1 for vaious reture status.
//
switch (Result.Value & 0x03) {
- case 0x00:
- //
- // Pass
- //
- *CmdStatus = USB_MASS_CMD_SUCCESS;
- break;
+ case 0x00:
+ //
+ // Pass
+ //
+ *CmdStatus = USB_MASS_CMD_SUCCESS;
+ break;
- case 0x02:
- //
- // Phase Error, response with reset.
- // No break here to fall through to "Fail".
- //
- UsbCbiResetDevice (UsbCbi, FALSE);
+ case 0x02:
+ //
+ // Phase Error, response with reset.
+ // No break here to fall through to "Fail".
+ //
+ UsbCbiResetDevice (UsbCbi, FALSE);
- case 0x01:
- //
- // Fail
- //
- *CmdStatus = USB_MASS_CMD_FAIL;
- break;
+ case 0x01:
+ //
+ // Fail
+ //
+ *CmdStatus = USB_MASS_CMD_FAIL;
+ break;
- case 0x03:
- //
- // Persistent Fail. Need to send REQUEST SENSE.
- //
- *CmdStatus = USB_MASS_CMD_PERSISTENT;
- break;
+ case 0x03:
+ //
+ // Persistent Fail. Need to send REQUEST SENSE.
+ //
+ *CmdStatus = USB_MASS_CMD_PERSISTENT;
+ break;
}
}
return EFI_SUCCESS;
}
-
/**
Reset the USB mass storage device by CBI protocol.
@@ -542,17 +540,17 @@ UsbCbiExecCommand (
**/
EFI_STATUS
UsbCbiResetDevice (
- IN VOID *Context,
- IN BOOLEAN ExtendedVerification
+ IN VOID *Context,
+ IN BOOLEAN ExtendedVerification
)
{
- UINT8 ResetCmd[USB_CBI_RESET_CMD_LEN];
- USB_CBI_PROTOCOL *UsbCbi;
- USB_CBI_STATUS Result;
- EFI_STATUS Status;
- UINT32 Timeout;
+ UINT8 ResetCmd[USB_CBI_RESET_CMD_LEN];
+ USB_CBI_PROTOCOL *UsbCbi;
+ USB_CBI_STATUS Result;
+ EFI_STATUS Status;
+ UINT32 Timeout;
- UsbCbi = (USB_CBI_PROTOCOL *) Context;
+ UsbCbi = (USB_CBI_PROTOCOL *)Context;
//
// Fill in the reset command.
@@ -587,7 +585,6 @@ UsbCbiResetDevice (
return Status;
}
-
/**
Clean up the CBI protocol's resource.
@@ -598,7 +595,7 @@ UsbCbiResetDevice (
**/
EFI_STATUS
UsbCbiCleanUp (
- IN VOID *Context
+ IN VOID *Context
)
{
FreePool (Context);
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.h
index b79b9c2436..8aca9132c8 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassCbi.h
@@ -10,19 +10,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USBMASS_CBI_H_
#define _EFI_USBMASS_CBI_H_
-extern USB_MASS_TRANSPORT mUsbCbi0Transport;
-extern USB_MASS_TRANSPORT mUsbCbi1Transport;
+extern USB_MASS_TRANSPORT mUsbCbi0Transport;
+extern USB_MASS_TRANSPORT mUsbCbi1Transport;
-#define USB_CBI_MAX_PACKET_NUM 16
-#define USB_CBI_RESET_CMD_LEN 12
+#define USB_CBI_MAX_PACKET_NUM 16
+#define USB_CBI_RESET_CMD_LEN 12
//
// USB CBI retry C/B/I transport times, set by experience
//
-#define USB_CBI_MAX_RETRY 3
+#define USB_CBI_MAX_RETRY 3
//
// Time to wait for USB CBI reset to complete, set by experience
//
-#define USB_CBI_RESET_DEVICE_STALL (50 * USB_MASS_1_MILLISECOND)
+#define USB_CBI_RESET_DEVICE_STALL (50 * USB_MASS_1_MILLISECOND)
//
// USB CBI transport timeout, set by experience
//
@@ -32,17 +32,17 @@ typedef struct {
//
// Put Interface at the first field to make it easy to distinguish BOT/CBI Protocol instance
//
- EFI_USB_INTERFACE_DESCRIPTOR Interface;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
- EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
- EFI_USB_ENDPOINT_DESCRIPTOR *InterruptEndpoint;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_USB_INTERFACE_DESCRIPTOR Interface;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkInEndpoint;
+ EFI_USB_ENDPOINT_DESCRIPTOR *BulkOutEndpoint;
+ EFI_USB_ENDPOINT_DESCRIPTOR *InterruptEndpoint;
+ EFI_USB_IO_PROTOCOL *UsbIo;
} USB_CBI_PROTOCOL;
#pragma pack(1)
typedef struct {
- UINT8 Type;
- UINT8 Value;
+ UINT8 Type;
+ UINT8 Value;
} USB_CBI_STATUS;
#pragma pack()
@@ -63,8 +63,8 @@ typedef struct {
**/
EFI_STATUS
UsbCbiInit (
- IN EFI_USB_IO_PROTOCOL *UsbIo,
- OUT VOID **Context OPTIONAL
+ IN EFI_USB_IO_PROTOCOL *UsbIo,
+ OUT VOID **Context OPTIONAL
);
/**
@@ -114,8 +114,8 @@ UsbCbiExecCommand (
**/
EFI_STATUS
UsbCbiResetDevice (
- IN VOID *Context,
- IN BOOLEAN ExtendedVerification
+ IN VOID *Context,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -128,7 +128,7 @@ UsbCbiResetDevice (
**/
EFI_STATUS
UsbCbiCleanUp (
- IN VOID *Context
+ IN VOID *Context
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.c
index 44e1d0c01d..5620608b40 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMass.h"
-EFI_DISK_INFO_PROTOCOL gUsbDiskInfoProtocolTemplate = {
+EFI_DISK_INFO_PROTOCOL gUsbDiskInfoProtocolTemplate = {
EFI_DISK_INFO_USB_INTERFACE_GUID,
UsbDiskInfoInquiry,
UsbDiskInfoIdentify,
@@ -27,13 +27,12 @@ EFI_DISK_INFO_PROTOCOL gUsbDiskInfoProtocolTemplate = {
**/
VOID
InitializeDiskInfo (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
CopyMem (&UsbMass->DiskInfo, &gUsbDiskInfoProtocolTemplate, sizeof (gUsbDiskInfoProtocolTemplate));
}
-
/**
Provides inquiry information for the controller type.
@@ -53,26 +52,26 @@ InitializeDiskInfo (
EFI_STATUS
EFIAPI
UsbDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
)
{
- EFI_STATUS Status;
- USB_MASS_DEVICE *UsbMass;
+ EFI_STATUS Status;
+ USB_MASS_DEVICE *UsbMass;
- UsbMass = USB_MASS_DEVICE_FROM_DISK_INFO (This);
+ UsbMass = USB_MASS_DEVICE_FROM_DISK_INFO (This);
Status = EFI_BUFFER_TOO_SMALL;
if (*InquiryDataSize >= sizeof (UsbMass->InquiryData)) {
Status = EFI_SUCCESS;
CopyMem (InquiryData, &UsbMass->InquiryData, sizeof (UsbMass->InquiryData));
}
+
*InquiryDataSize = sizeof (UsbMass->InquiryData);
return Status;
}
-
/**
Provides identify information for the controller type.
@@ -94,9 +93,9 @@ UsbDiskInfoInquiry (
EFI_STATUS
EFIAPI
UsbDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
)
{
return EFI_NOT_FOUND;
@@ -122,16 +121,15 @@ UsbDiskInfoIdentify (
EFI_STATUS
EFIAPI
UsbDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
)
{
return EFI_NOT_FOUND;
}
-
/**
This function is used to get controller information.
@@ -146,11 +144,10 @@ UsbDiskInfoSenseData (
EFI_STATUS
EFIAPI
UsbDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
)
{
return EFI_UNSUPPORTED;
}
-
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.h
index 2571cc5419..4ada890827 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassDiskInfo.h
@@ -20,10 +20,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
InitializeDiskInfo (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
);
-
/**
Provides inquiry information for the controller type.
@@ -43,9 +42,9 @@ InitializeDiskInfo (
EFI_STATUS
EFIAPI
UsbDiskInfoInquiry (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *InquiryData,
- IN OUT UINT32 *InquiryDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *InquiryData,
+ IN OUT UINT32 *InquiryDataSize
);
/**
@@ -69,9 +68,9 @@ UsbDiskInfoInquiry (
EFI_STATUS
EFIAPI
UsbDiskInfoIdentify (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *IdentifyData,
- IN OUT UINT32 *IdentifyDataSize
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *IdentifyData,
+ IN OUT UINT32 *IdentifyDataSize
);
/**
@@ -94,13 +93,12 @@ UsbDiskInfoIdentify (
EFI_STATUS
EFIAPI
UsbDiskInfoSenseData (
- IN EFI_DISK_INFO_PROTOCOL *This,
- IN OUT VOID *SenseData,
- IN OUT UINT32 *SenseDataSize,
- OUT UINT8 *SenseDataNumber
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ IN OUT VOID *SenseData,
+ IN OUT UINT32 *SenseDataSize,
+ OUT UINT8 *SenseDataNumber
);
-
/**
This function is used to get controller information.
@@ -115,9 +113,9 @@ UsbDiskInfoSenseData (
EFI_STATUS
EFIAPI
UsbDiskInfoWhichIde (
- IN EFI_DISK_INFO_PROTOCOL *This,
- OUT UINT32 *IdeChannel,
- OUT UINT32 *IdeDevice
+ IN EFI_DISK_INFO_PROTOCOL *This,
+ OUT UINT32 *IdeChannel,
+ OUT UINT32 *IdeDevice
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.c b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.c
index de9c5f0632..9c5fd4e16b 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.c
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.c
@@ -8,17 +8,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMass.h"
-#define USB_MASS_TRANSPORT_COUNT 3
+#define USB_MASS_TRANSPORT_COUNT 3
//
// Array of USB transport interfaces.
//
-USB_MASS_TRANSPORT *mUsbMassTransport[USB_MASS_TRANSPORT_COUNT] = {
+USB_MASS_TRANSPORT *mUsbMassTransport[USB_MASS_TRANSPORT_COUNT] = {
&mUsbCbi0Transport,
&mUsbCbi1Transport,
&mUsbBotTransport,
};
-EFI_DRIVER_BINDING_PROTOCOL gUSBMassDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUSBMassDriverBinding = {
USBMassDriverBindingSupported,
USBMassDriverBindingStart,
USBMassDriverBindingStop,
@@ -45,19 +45,19 @@ EFI_DRIVER_BINDING_PROTOCOL gUSBMassDriverBinding = {
EFI_STATUS
EFIAPI
UsbMassReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- USB_MASS_DEVICE *UsbMass;
- EFI_TPL OldTpl;
- EFI_STATUS Status;
+ USB_MASS_DEVICE *UsbMass;
+ EFI_TPL OldTpl;
+ EFI_STATUS Status;
//
// Raise TPL to TPL_CALLBACK to serialize all its operations
// to protect shared data structures.
//
- OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
+ OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
UsbMass = USB_MASS_DEVICE_FROM_BLOCK_IO (This);
Status = UsbMass->Transport->Reset (UsbMass->Context, ExtendedVerification);
@@ -94,11 +94,11 @@ UsbMassReset (
EFI_STATUS
EFIAPI
UsbMassReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
USB_MASS_DEVICE *UsbMass;
@@ -168,7 +168,7 @@ UsbMassReadBlocks (
if (UsbMass->Cdb16Byte) {
Status = UsbBootReadWriteBlocks16 (UsbMass, FALSE, Lba, TotalBlock, Buffer);
} else {
- Status = UsbBootReadWriteBlocks (UsbMass, FALSE, (UINT32) Lba, TotalBlock, Buffer);
+ Status = UsbBootReadWriteBlocks (UsbMass, FALSE, (UINT32)Lba, TotalBlock, Buffer);
}
if (EFI_ERROR (Status)) {
@@ -181,7 +181,6 @@ ON_EXIT:
return Status;
}
-
/**
Writes a specified number of blocks to the device.
@@ -210,11 +209,11 @@ ON_EXIT:
EFI_STATUS
EFIAPI
UsbMassWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
)
{
USB_MASS_DEVICE *UsbMass;
@@ -288,7 +287,7 @@ UsbMassWriteBlocks (
if (UsbMass->Cdb16Byte) {
Status = UsbBootReadWriteBlocks16 (UsbMass, TRUE, Lba, TotalBlock, Buffer);
} else {
- Status = UsbBootReadWriteBlocks (UsbMass, TRUE, (UINT32) Lba, TotalBlock, Buffer);
+ Status = UsbBootReadWriteBlocks (UsbMass, TRUE, (UINT32)Lba, TotalBlock, Buffer);
}
if (EFI_ERROR (Status)) {
@@ -335,11 +334,11 @@ UsbMassFlushBlocks (
**/
EFI_STATUS
UsbMassInitMedia (
- IN USB_MASS_DEVICE *UsbMass
+ IN USB_MASS_DEVICE *UsbMass
)
{
- EFI_BLOCK_IO_MEDIA *Media;
- EFI_STATUS Status;
+ EFI_BLOCK_IO_MEDIA *Media;
+ EFI_STATUS Status;
Media = &UsbMass->BlockIoMedia;
@@ -363,6 +362,7 @@ UsbMassInitMedia (
//
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -400,7 +400,7 @@ UsbMassInitTransport (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -427,7 +427,7 @@ UsbMassInitTransport (
*Transport = mUsbMassTransport[Index];
if (Interface.InterfaceProtocol == (*Transport)->Protocol) {
- Status = (*Transport)->Init (UsbIo, Context);
+ Status = (*Transport)->Init (UsbIo, Context);
break;
}
}
@@ -471,12 +471,12 @@ ON_EXIT:
**/
EFI_STATUS
UsbMassInitMultiLun (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN USB_MASS_TRANSPORT *Transport,
- IN VOID *Context,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINT8 MaxLun
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN USB_MASS_TRANSPORT *Transport,
+ IN VOID *Context,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINT8 MaxLun
)
{
USB_MASS_DEVICE *UsbMass;
@@ -490,24 +490,23 @@ UsbMassInitMultiLun (
ReturnStatus = EFI_NOT_FOUND;
for (Index = 0; Index <= MaxLun; Index++) {
-
DEBUG ((DEBUG_INFO, "UsbMassInitMultiLun: Start to initialize No.%d logic unit\n", Index));
UsbIo = NULL;
UsbMass = AllocateZeroPool (sizeof (USB_MASS_DEVICE));
ASSERT (UsbMass != NULL);
- UsbMass->Signature = USB_MASS_SIGNATURE;
- UsbMass->UsbIo = UsbIo;
- UsbMass->BlockIo.Media = &UsbMass->BlockIoMedia;
- UsbMass->BlockIo.Reset = UsbMassReset;
- UsbMass->BlockIo.ReadBlocks = UsbMassReadBlocks;
- UsbMass->BlockIo.WriteBlocks = UsbMassWriteBlocks;
- UsbMass->BlockIo.FlushBlocks = UsbMassFlushBlocks;
- UsbMass->OpticalStorage = FALSE;
- UsbMass->Transport = Transport;
- UsbMass->Context = Context;
- UsbMass->Lun = Index;
+ UsbMass->Signature = USB_MASS_SIGNATURE;
+ UsbMass->UsbIo = UsbIo;
+ UsbMass->BlockIo.Media = &UsbMass->BlockIoMedia;
+ UsbMass->BlockIo.Reset = UsbMassReset;
+ UsbMass->BlockIo.ReadBlocks = UsbMassReadBlocks;
+ UsbMass->BlockIo.WriteBlocks = UsbMassWriteBlocks;
+ UsbMass->BlockIo.FlushBlocks = UsbMassFlushBlocks;
+ UsbMass->OpticalStorage = FALSE;
+ UsbMass->Transport = Transport;
+ UsbMass->Context = Context;
+ UsbMass->Lun = Index;
//
// Initialize the media parameter data for EFI_BLOCK_IO_MEDIA of Block I/O Protocol.
@@ -566,7 +565,7 @@ UsbMassInitMultiLun (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
UsbMass->Controller,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -588,6 +587,7 @@ UsbMassInitMultiLun (
FreePool (UsbMass);
continue;
}
+
ReturnStatus = EFI_SUCCESS;
DEBUG ((DEBUG_INFO, "UsbMassInitMultiLun: Success to initialize No.%d logic unit\n", Index));
}
@@ -609,15 +609,15 @@ UsbMassInitMultiLun (
**/
EFI_STATUS
UsbMassInitNonLun (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN USB_MASS_TRANSPORT *Transport,
- IN VOID *Context
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN USB_MASS_TRANSPORT *Transport,
+ IN VOID *Context
)
{
- USB_MASS_DEVICE *UsbMass;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_STATUS Status;
+ USB_MASS_DEVICE *UsbMass;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
UsbIo = NULL;
UsbMass = AllocateZeroPool (sizeof (USB_MASS_DEVICE));
@@ -626,7 +626,7 @@ UsbMassInitNonLun (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -637,17 +637,17 @@ UsbMassInitNonLun (
goto ON_ERROR;
}
- UsbMass->Signature = USB_MASS_SIGNATURE;
- UsbMass->Controller = Controller;
- UsbMass->UsbIo = UsbIo;
- UsbMass->BlockIo.Media = &UsbMass->BlockIoMedia;
- UsbMass->BlockIo.Reset = UsbMassReset;
- UsbMass->BlockIo.ReadBlocks = UsbMassReadBlocks;
- UsbMass->BlockIo.WriteBlocks = UsbMassWriteBlocks;
- UsbMass->BlockIo.FlushBlocks = UsbMassFlushBlocks;
- UsbMass->OpticalStorage = FALSE;
- UsbMass->Transport = Transport;
- UsbMass->Context = Context;
+ UsbMass->Signature = USB_MASS_SIGNATURE;
+ UsbMass->Controller = Controller;
+ UsbMass->UsbIo = UsbIo;
+ UsbMass->BlockIo.Media = &UsbMass->BlockIoMedia;
+ UsbMass->BlockIo.Reset = UsbMassReset;
+ UsbMass->BlockIo.ReadBlocks = UsbMassReadBlocks;
+ UsbMass->BlockIo.WriteBlocks = UsbMassWriteBlocks;
+ UsbMass->BlockIo.FlushBlocks = UsbMassFlushBlocks;
+ UsbMass->OpticalStorage = FALSE;
+ UsbMass->Transport = Transport;
+ UsbMass->Context = Context;
//
// Initialize the media parameter data for EFI_BLOCK_IO_MEDIA of Block I/O Protocol.
@@ -678,6 +678,7 @@ ON_ERROR:
if (UsbMass != NULL) {
FreePool (UsbMass);
}
+
if (UsbIo != NULL) {
gBS->CloseProtocol (
Controller,
@@ -686,10 +687,10 @@ ON_ERROR:
Controller
);
}
+
return Status;
}
-
/**
Check whether the controller is a supported USB mass storage.
@@ -718,7 +719,7 @@ USBMassDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -793,13 +794,13 @@ USBMassDriverBindingStart (
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- USB_MASS_TRANSPORT *Transport;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- VOID *Context;
- UINT8 MaxLun;
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_TPL OldTpl;
+ USB_MASS_TRANSPORT *Transport;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ VOID *Context;
+ UINT8 MaxLun;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
@@ -813,6 +814,7 @@ USBMassDriverBindingStart (
DEBUG ((DEBUG_ERROR, "USBMassDriverBindingStart: UsbMassInitTransport (%r)\n", Status));
goto Exit;
}
+
if (MaxLun == 0) {
//
// Initialize data for device that does not support multiple LUNSs.
@@ -828,7 +830,7 @@ USBMassDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &DevicePath,
+ (VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -842,7 +844,7 @@ USBMassDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -866,26 +868,26 @@ USBMassDriverBindingStart (
Status = UsbMassInitMultiLun (This, Controller, Transport, Context, DevicePath, MaxLun);
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
DEBUG ((DEBUG_ERROR, "USBMassDriverBindingStart: UsbMassInitMultiLun (%r) with Maxlun=%d\n", Status, MaxLun));
}
}
+
Exit:
gBS->RestoreTPL (OldTpl);
return Status;
}
-
/**
Stop controlling the device.
@@ -903,18 +905,18 @@ Exit:
EFI_STATUS
EFIAPI
USBMassDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- USB_MASS_DEVICE *UsbMass;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_BLOCK_IO_PROTOCOL *BlockIo;
- UINTN Index;
- BOOLEAN AllChildrenStopped;
+ EFI_STATUS Status;
+ USB_MASS_DEVICE *UsbMass;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_BLOCK_IO_PROTOCOL *BlockIo;
+ UINTN Index;
+ BOOLEAN AllChildrenStopped;
//
// This is a bus driver stop function since multi-lun is supported.
@@ -930,29 +932,29 @@ USBMassDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
//
// This is a 2nd type handle(multi-lun root), it needs to close devicepath
// and usbio protocol.
//
gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
DEBUG ((DEBUG_INFO, "Success to stop multi-lun root handle\n"));
return EFI_SUCCESS;
}
@@ -980,11 +982,11 @@ USBMassDriverBindingStop (
}
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
UsbMass->Transport->CleanUp (UsbMass->Context);
FreePool (UsbMass);
@@ -1001,11 +1003,10 @@ USBMassDriverBindingStop (
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
-
Status = gBS->OpenProtocol (
ChildHandleBuffer[Index],
&gEfiBlockIoProtocolGuid,
- (VOID **) &BlockIo,
+ (VOID **)&BlockIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -1046,7 +1047,7 @@ USBMassDriverBindingStop (
gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
ChildHandleBuffer[Index],
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@@ -1058,6 +1059,7 @@ USBMassDriverBindingStop (
if (((Index + 1) == NumberOfChildren) && AllChildrenStopped) {
UsbMass->Transport->CleanUp (UsbMass->Context);
}
+
FreePool (UsbMass);
}
}
@@ -1066,7 +1068,7 @@ USBMassDriverBindingStop (
return EFI_DEVICE_ERROR;
}
- DEBUG ((DEBUG_INFO, "Success to stop all %d multi-lun children handles\n", (UINT32) NumberOfChildren));
+ DEBUG ((DEBUG_INFO, "Success to stop all %d multi-lun children handles\n", (UINT32)NumberOfChildren));
return EFI_SUCCESS;
}
@@ -1085,8 +1087,8 @@ USBMassDriverBindingStop (
EFI_STATUS
EFIAPI
USBMassStorageEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
diff --git a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.h b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.h
index 283bed7055..045659855d 100644
--- a/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.h
+++ b/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassImpl.h
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USBMASS_IMPL_H_
#define _EFI_USBMASS_IMPL_H_
-#define USB_MASS_SIGNATURE SIGNATURE_32 ('U', 's', 'b', 'M')
+#define USB_MASS_SIGNATURE SIGNATURE_32 ('U', 's', 'b', 'M')
#define USB_MASS_DEVICE_FROM_BLOCK_IO(a) \
CR (a, USB_MASS_DEVICE, BlockIo, USB_MASS_SIGNATURE)
@@ -18,7 +18,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define USB_MASS_DEVICE_FROM_DISK_INFO(a) \
CR (a, USB_MASS_DEVICE, DiskInfo, USB_MASS_SIGNATURE)
-
extern EFI_COMPONENT_NAME_PROTOCOL gUsbMassStorageComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gUsbMassStorageComponentName2;
@@ -88,10 +87,10 @@ USBMassDriverBindingStart (
EFI_STATUS
EFIAPI
USBMassDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
@@ -116,8 +115,8 @@ USBMassDriverBindingStop (
EFI_STATUS
EFIAPI
UsbMassReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -147,11 +146,11 @@ UsbMassReset (
EFI_STATUS
EFIAPI
UsbMassReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -182,11 +181,11 @@ UsbMassReadBlocks (
EFI_STATUS
EFIAPI
UsbMassWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBA Lba,
- IN UINTN BufferSize,
- IN VOID *Buffer
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
);
/**
@@ -255,7 +254,6 @@ UsbMassStorageGetDriverName (
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -317,11 +315,11 @@ UsbMassStorageGetDriverName (
EFI_STATUS
EFIAPI
UsbMassStorageGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/ComponentName.c b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/ComponentName.c
index efad274fd9..6c861d5257 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/ComponentName.c
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "UsbMouseAbsolutePointer.h"
//
@@ -21,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUsbMouseAbsolutePoin
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseAbsolutePointerComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UsbMouseAbsolutePointerComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UsbMouseAbsolutePointerComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseAbsolutePointerComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UsbMouseAbsolutePointerComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UsbMouseAbsolutePointerComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbMouseAbsolutePointerDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbMouseAbsolutePointerDriverNameTable[] = {
{ "eng;en", L"Usb Mouse Absolute Pointer Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -145,17 +143,17 @@ UsbMouseAbsolutePointerComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbMouseAbsolutePointerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
- EFI_ABSOLUTE_POINTER_PROTOCOL *AbsolutePointerProtocol;
- EFI_USB_IO_PROTOCOL *UsbIoProtocol;
+ EFI_STATUS Status;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
+ EFI_ABSOLUTE_POINTER_PROTOCOL *AbsolutePointerProtocol;
+ EFI_USB_IO_PROTOCOL *UsbIoProtocol;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -170,7 +168,7 @@ UsbMouseAbsolutePointerComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIoProtocol,
+ (VOID **)&UsbIoProtocol,
gUsbMouseAbsolutePointerDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -189,13 +187,14 @@ UsbMouseAbsolutePointerComponentNameGetControllerName (
if (Status != EFI_ALREADY_STARTED) {
return EFI_UNSUPPORTED;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
- &gEfiAbsolutePointerProtocolGuid,
- (VOID **) &AbsolutePointerProtocol,
+ &gEfiAbsolutePointerProtocolGuid,
+ (VOID **)&AbsolutePointerProtocol,
gUsbMouseAbsolutePointerDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,5 +213,4 @@ UsbMouseAbsolutePointerComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gUsbMouseAbsolutePointerComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/MouseHid.c b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/MouseHid.c
index 10e18e58ab..96e3e5c1f7 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/MouseHid.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/MouseHid.c
@@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMouseAbsolutePointer.h"
-
/**
Get next HID item from report descriptor.
@@ -31,12 +30,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT8 *
GetNextHidItem (
- IN UINT8 *StartPos,
- IN UINT8 *EndPos,
- OUT HID_ITEM *HidItem
+ IN UINT8 *StartPos,
+ IN UINT8 *EndPos,
+ OUT HID_ITEM *HidItem
)
{
- UINT8 Temp;
+ UINT8 Temp;
if (EndPos <= StartPos) {
return NULL;
@@ -66,7 +65,7 @@ GetNextHidItem (
if ((EndPos - StartPos) >= HidItem->Size) {
HidItem->Data.LongData = StartPos;
- StartPos += HidItem->Size;
+ StartPos += HidItem->Size;
return StartPos;
}
}
@@ -75,48 +74,47 @@ GetNextHidItem (
HidItem->Size = BitFieldRead8 (Temp, 0, 1);
switch (HidItem->Size) {
- case 0:
- //
- // No data
- //
- return StartPos;
-
- case 1:
- //
- // 1-byte data
- //
- if ((EndPos - StartPos) >= 1) {
- HidItem->Data.Uint8 = *StartPos++;
+ case 0:
+ //
+ // No data
+ //
return StartPos;
- }
- case 2:
- //
- // 2-byte data
- //
- if ((EndPos - StartPos) >= 2) {
- CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
- StartPos += 2;
- return StartPos;
- }
+ case 1:
+ //
+ // 1-byte data
+ //
+ if ((EndPos - StartPos) >= 1) {
+ HidItem->Data.Uint8 = *StartPos++;
+ return StartPos;
+ }
- case 3:
- //
- // 4-byte data, adjust size
- //
- HidItem->Size = 4;
- if ((EndPos - StartPos) >= 4) {
- CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
- StartPos += 4;
- return StartPos;
- }
+ case 2:
+ //
+ // 2-byte data
+ //
+ if ((EndPos - StartPos) >= 2) {
+ CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
+ StartPos += 2;
+ return StartPos;
+ }
+
+ case 3:
+ //
+ // 4-byte data, adjust size
+ //
+ HidItem->Size = 4;
+ if ((EndPos - StartPos) >= 4) {
+ CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
+ StartPos += 4;
+ return StartPos;
+ }
}
}
return NULL;
}
-
/**
Get data from HID item.
@@ -131,20 +129,21 @@ GetNextHidItem (
**/
UINT32
GetItemData (
- IN HID_ITEM *HidItem
+ IN HID_ITEM *HidItem
)
{
//
// Get data from HID item.
//
switch (HidItem->Size) {
- case 1:
- return HidItem->Data.Uint8;
- case 2:
- return HidItem->Data.Uint16;
- case 4:
- return HidItem->Data.Uint32;
+ case 1:
+ return HidItem->Data.Uint8;
+ case 2:
+ return HidItem->Data.Uint16;
+ case 4:
+ return HidItem->Data.Uint32;
}
+
return 0;
}
@@ -161,67 +160,68 @@ GetItemData (
**/
VOID
ParseHidItem (
- IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouse,
- IN HID_ITEM *HidItem
+ IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouse,
+ IN HID_ITEM *HidItem
)
{
UINT8 Data;
switch (HidItem->Type) {
+ case HID_ITEM_TYPE_MAIN:
+ //
+ // we don't care any main items, just skip
+ //
+ return;
- case HID_ITEM_TYPE_MAIN:
- //
- // we don't care any main items, just skip
- //
- return ;
+ case HID_ITEM_TYPE_GLOBAL:
+ //
+ // For global items, we only care Usage Page tag for Button Page here
+ //
+ if (HidItem->Tag == HID_GLOBAL_ITEM_TAG_USAGE_PAGE) {
+ Data = (UINT8)GetItemData (HidItem);
+ if (Data == 0x09) {
+ //
+ // Button Page
+ //
+ UsbMouse->PrivateData.ButtonDetected = TRUE;
+ }
+ }
- case HID_ITEM_TYPE_GLOBAL:
- //
- // For global items, we only care Usage Page tag for Button Page here
- //
- if (HidItem->Tag == HID_GLOBAL_ITEM_TAG_USAGE_PAGE) {
- Data = (UINT8) GetItemData (HidItem);
- if (Data == 0x09) {
+ return;
+
+ case HID_ITEM_TYPE_LOCAL:
+ if (HidItem->Size == 0) {
//
- // Button Page
+ // No expected data for local item
//
- UsbMouse->PrivateData.ButtonDetected = TRUE;
+ return;
}
- }
- return;
- case HID_ITEM_TYPE_LOCAL:
- if (HidItem->Size == 0) {
- //
- // No expected data for local item
- //
- return ;
- }
+ Data = (UINT8)GetItemData (HidItem);
- Data = (UINT8) GetItemData (HidItem);
+ switch (HidItem->Tag) {
+ case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:
+ if (UsbMouse->PrivateData.ButtonDetected) {
+ UsbMouse->PrivateData.ButtonMinIndex = Data;
+ }
- switch (HidItem->Tag) {
- case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:
- if (UsbMouse->PrivateData.ButtonDetected) {
- UsbMouse->PrivateData.ButtonMinIndex = Data;
- }
- return ;
+ return;
- case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:
- {
- if (UsbMouse->PrivateData.ButtonDetected) {
- UsbMouse->PrivateData.ButtonMaxIndex = Data;
- }
- return ;
- }
+ case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:
+ {
+ if (UsbMouse->PrivateData.ButtonDetected) {
+ UsbMouse->PrivateData.ButtonMaxIndex = Data;
+ }
+
+ return;
+ }
- default:
- return ;
+ default:
+ return;
}
}
}
-
/**
Parse Mouse Report Descriptor.
@@ -240,9 +240,9 @@ ParseHidItem (
**/
EFI_STATUS
ParseMouseReportDescriptor (
- OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer,
- IN UINT8 *ReportDescriptor,
- IN UINTN ReportSize
+ OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer,
+ IN UINT8 *ReportDescriptor,
+ IN UINTN ReportSize
)
{
UINT8 *DescriptorEnd;
@@ -265,11 +265,11 @@ ParseMouseReportDescriptor (
Ptr = GetNextHidItem (Ptr, DescriptorEnd, &HidItem);
}
- UsbMouseAbsolutePointer->NumberOfButtons = (UINT8) (UsbMouseAbsolutePointer->PrivateData.ButtonMaxIndex - UsbMouseAbsolutePointer->PrivateData.ButtonMinIndex + 1);
- UsbMouseAbsolutePointer->XLogicMax = 1023;
- UsbMouseAbsolutePointer->YLogicMax = 1023;
- UsbMouseAbsolutePointer->XLogicMin = -1023;
- UsbMouseAbsolutePointer->YLogicMin = -1023;
+ UsbMouseAbsolutePointer->NumberOfButtons = (UINT8)(UsbMouseAbsolutePointer->PrivateData.ButtonMaxIndex - UsbMouseAbsolutePointer->PrivateData.ButtonMinIndex + 1);
+ UsbMouseAbsolutePointer->XLogicMax = 1023;
+ UsbMouseAbsolutePointer->YLogicMax = 1023;
+ UsbMouseAbsolutePointer->XLogicMin = -1023;
+ UsbMouseAbsolutePointer->YLogicMin = -1023;
return EFI_SUCCESS;
}
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.c b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.c
index 926e03f9cb..ad5f066ec9 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMouseAbsolutePointer.h"
-EFI_DRIVER_BINDING_PROTOCOL gUsbMouseAbsolutePointerDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUsbMouseAbsolutePointerDriverBinding = {
USBMouseAbsolutePointerDriverBindingSupported,
USBMouseAbsolutePointerDriverBindingStart,
USBMouseAbsolutePointerDriverBindingStop,
@@ -32,11 +32,11 @@ EFI_DRIVER_BINDING_PROTOCOL gUsbMouseAbsolutePointerDriverBinding = {
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@@ -51,7 +51,6 @@ USBMouseAbsolutePointerDriverBindingEntryPoint (
return EFI_SUCCESS;
}
-
/**
Check whether USB Mouse Absolute Pointer Driver supports this device.
@@ -66,18 +65,18 @@ USBMouseAbsolutePointerDriverBindingEntryPoint (
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -96,16 +95,15 @@ USBMouseAbsolutePointerDriverBindingSupported (
}
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return Status;
}
-
/**
Starts the mouse device with this driver.
@@ -128,22 +126,22 @@ USBMouseAbsolutePointerDriverBindingSupported (
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
- UINT8 EndpointNumber;
- EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
- UINT8 Index;
- UINT8 EndpointAddr;
- UINT8 PollingInterval;
- UINT8 PacketSize;
- BOOLEAN Found;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
+ UINT8 EndpointNumber;
+ EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
+ UINT8 Index;
+ UINT8 EndpointAddr;
+ UINT8 PollingInterval;
+ UINT8 PacketSize;
+ BOOLEAN Found;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
//
@@ -152,7 +150,7 @@ USBMouseAbsolutePointerDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -173,7 +171,7 @@ USBMouseAbsolutePointerDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &UsbMouseAbsolutePointerDevice->DevicePath,
+ (VOID **)&UsbMouseAbsolutePointerDevice->DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,11 +212,12 @@ USBMouseAbsolutePointerDriverBindingStart (
);
if (((EndpointDescriptor.Attributes & (BIT0 | BIT1)) == USB_ENDPOINT_INTERRUPT) &&
- ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0)) {
+ ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0))
+ {
//
// We only care interrupt endpoint here
//
- CopyMem (&UsbMouseAbsolutePointerDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof(EndpointDescriptor));
+ CopyMem (&UsbMouseAbsolutePointerDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof (EndpointDescriptor));
Found = TRUE;
break;
}
@@ -267,7 +266,7 @@ USBMouseAbsolutePointerDriverBindingStart (
//
UsbMouseAbsolutePointerDevice->AbsolutePointerProtocol.GetState = GetMouseAbsolutePointerState;
UsbMouseAbsolutePointerDevice->AbsolutePointerProtocol.Reset = UsbMouseAbsolutePointerReset;
- UsbMouseAbsolutePointerDevice->AbsolutePointerProtocol.Mode = &UsbMouseAbsolutePointerDevice->Mode;
+ UsbMouseAbsolutePointerDevice->AbsolutePointerProtocol.Mode = &UsbMouseAbsolutePointerDevice->Mode;
Status = gBS->CreateEvent (
EVT_NOTIFY_WAIT,
@@ -307,7 +306,7 @@ USBMouseAbsolutePointerDriverBindingStart (
//
EndpointAddr = UsbMouseAbsolutePointerDevice->IntEndpointDescriptor.EndpointAddress;
PollingInterval = UsbMouseAbsolutePointerDevice->IntEndpointDescriptor.Interval;
- PacketSize = (UINT8) (UsbMouseAbsolutePointerDevice->IntEndpointDescriptor.MaxPacketSize);
+ PacketSize = (UINT8)(UsbMouseAbsolutePointerDevice->IntEndpointDescriptor.MaxPacketSize);
Status = UsbIo->UsbAsyncInterruptTransfer (
UsbIo,
@@ -337,8 +336,8 @@ USBMouseAbsolutePointerDriverBindingStart (
gUsbMouseAbsolutePointerComponentName.SupportedLanguages,
&UsbMouseAbsolutePointerDevice->ControllerNameTable,
L"Generic Usb Mouse Absolute Pointer",
- TRUE
- );
+ TRUE
+ );
AddUnicodeString2 (
"en",
gUsbMouseAbsolutePointerComponentName2.SupportedLanguages,
@@ -350,17 +349,17 @@ USBMouseAbsolutePointerDriverBindingStart (
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
-//
-// Error handler
-//
+ //
+ // Error handler
+ //
ErrorExit:
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
if (UsbMouseAbsolutePointerDevice != NULL) {
if ((UsbMouseAbsolutePointerDevice->AbsolutePointerProtocol).WaitForInput != NULL) {
@@ -378,7 +377,6 @@ ErrorExit1:
return Status;
}
-
/**
Stop the USB mouse device handled by this driver.
@@ -395,10 +393,10 @@ ErrorExit1:
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
@@ -409,7 +407,7 @@ USBMouseAbsolutePointerDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiAbsolutePointerProtocolGuid,
- (VOID **) &AbsolutePointerProtocol,
+ (VOID **)&AbsolutePointerProtocol,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -478,10 +476,8 @@ USBMouseAbsolutePointerDriverBindingStop (
FreePool (UsbMouseAbsolutePointerDevice);
return EFI_SUCCESS;
-
}
-
/**
Uses USB I/O to check whether the device is a USB mouse device.
@@ -493,7 +489,7 @@ USBMouseAbsolutePointerDriverBindingStop (
**/
BOOLEAN
IsUsbMouse (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
)
{
EFI_STATUS Status;
@@ -514,14 +510,14 @@ IsUsbMouse (
if ((InterfaceDescriptor.InterfaceClass == CLASS_HID) &&
(InterfaceDescriptor.InterfaceSubClass == SUBCLASS_BOOT) &&
(InterfaceDescriptor.InterfaceProtocol == PROTOCOL_MOUSE)
- ) {
+ )
+ {
return TRUE;
}
return FALSE;
}
-
/**
Initialize the USB mouse device.
@@ -539,20 +535,20 @@ IsUsbMouse (
**/
EFI_STATUS
InitializeUsbMouseDevice (
- IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev
+ IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev
)
{
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 Protocol;
- EFI_STATUS Status;
- EFI_USB_HID_DESCRIPTOR *MouseHidDesc;
- UINT8 *ReportDesc;
- EFI_USB_CONFIG_DESCRIPTOR ConfigDesc;
- VOID *Buf;
- UINT32 TransferResult;
- UINT16 Total;
- USB_DESC_HEAD *Head;
- BOOLEAN Start;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 Protocol;
+ EFI_STATUS Status;
+ EFI_USB_HID_DESCRIPTOR *MouseHidDesc;
+ UINT8 *ReportDesc;
+ EFI_USB_CONFIG_DESCRIPTOR ConfigDesc;
+ VOID *Buf;
+ UINT32 TransferResult;
+ UINT16 Total;
+ USB_DESC_HEAD *Head;
+ BOOLEAN Start;
UsbIo = UsbMouseAbsolutePointerDev->UsbIo;
@@ -589,9 +585,9 @@ InitializeUsbMouseDevice (
return Status;
}
- Total = 0;
- Start = FALSE;
- Head = (USB_DESC_HEAD *)Buf;
+ Total = 0;
+ Start = FALSE;
+ Head = (USB_DESC_HEAD *)Buf;
MouseHidDesc = NULL;
//
@@ -602,19 +598,23 @@ InitializeUsbMouseDevice (
while (Total < ConfigDesc.TotalLength) {
if (Head->Type == USB_DESC_TYPE_INTERFACE) {
if ((((USB_INTERFACE_DESCRIPTOR *)Head)->InterfaceNumber == UsbMouseAbsolutePointerDev->InterfaceDescriptor.InterfaceNumber) &&
- (((USB_INTERFACE_DESCRIPTOR *)Head)->AlternateSetting == UsbMouseAbsolutePointerDev->InterfaceDescriptor.AlternateSetting)) {
+ (((USB_INTERFACE_DESCRIPTOR *)Head)->AlternateSetting == UsbMouseAbsolutePointerDev->InterfaceDescriptor.AlternateSetting))
+ {
Start = TRUE;
}
}
+
if (Start && (Head->Type == USB_DESC_TYPE_ENDPOINT)) {
break;
}
+
if (Start && (Head->Type == USB_DESC_TYPE_HID)) {
MouseHidDesc = (EFI_USB_HID_DESCRIPTOR *)Head;
break;
}
+
Total = Total + (UINT16)Head->Len;
- Head = (USB_DESC_HEAD*)((UINT8 *)Buf + Total);
+ Head = (USB_DESC_HEAD *)((UINT8 *)Buf + Total);
}
if (MouseHidDesc == NULL) {
@@ -722,7 +722,6 @@ InitializeUsbMouseDevice (
return EFI_SUCCESS;
}
-
/**
Handler function for USB mouse's asynchronous interrupt transfer.
@@ -743,19 +742,19 @@ InitializeUsbMouseDevice (
EFI_STATUS
EFIAPI
OnMouseInterruptComplete (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
)
{
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 EndpointAddr;
- UINT32 UsbResult;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 EndpointAddr;
+ UINT32 UsbResult;
- UsbMouseAbsolutePointerDevice = (USB_MOUSE_ABSOLUTE_POINTER_DEV *) Context;
- UsbIo = UsbMouseAbsolutePointerDevice->UsbIo;
+ UsbMouseAbsolutePointerDevice = (USB_MOUSE_ABSOLUTE_POINTER_DEV *)Context;
+ UsbIo = UsbMouseAbsolutePointerDevice->UsbIo;
if (Result != EFI_USB_NOERROR) {
//
@@ -804,7 +803,7 @@ OnMouseInterruptComplete (
//
// If no error and no data, just return EFI_SUCCESS.
//
- if (DataLength == 0 || Data == NULL) {
+ if ((DataLength == 0) || (Data == NULL)) {
return EFI_SUCCESS;
}
@@ -826,26 +825,32 @@ OnMouseInterruptComplete (
UsbMouseAbsolutePointerDevice->StateChanged = TRUE;
- UsbMouseAbsolutePointerDevice->State.ActiveButtons = *(UINT8 *) Data & (BIT0 | BIT1 | BIT2);
+ UsbMouseAbsolutePointerDevice->State.ActiveButtons = *(UINT8 *)Data & (BIT0 | BIT1 | BIT2);
UsbMouseAbsolutePointerDevice->State.CurrentX =
MIN (
- MAX ((INT64) UsbMouseAbsolutePointerDevice->State.CurrentX + *((INT8 *) Data + 1),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinX),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxX
+ MAX (
+ (INT64)UsbMouseAbsolutePointerDevice->State.CurrentX + *((INT8 *)Data + 1),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinX
+ ),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxX
);
UsbMouseAbsolutePointerDevice->State.CurrentY =
MIN (
- MAX ((INT64) UsbMouseAbsolutePointerDevice->State.CurrentY + *((INT8 *) Data + 2),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinY),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxY
+ MAX (
+ (INT64)UsbMouseAbsolutePointerDevice->State.CurrentY + *((INT8 *)Data + 2),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinY
+ ),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxY
);
if (DataLength > 3) {
UsbMouseAbsolutePointerDevice->State.CurrentZ =
MIN (
- MAX ((INT64) UsbMouseAbsolutePointerDevice->State.CurrentZ + *((INT8 *) Data + 1),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinZ),
- (INT64) UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxZ
+ MAX (
+ (INT64)UsbMouseAbsolutePointerDevice->State.CurrentZ + *((INT8 *)Data + 1),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMinZ
+ ),
+ (INT64)UsbMouseAbsolutePointerDevice->Mode.AbsoluteMaxZ
);
}
@@ -873,7 +878,7 @@ GetMouseAbsolutePointerState (
OUT EFI_ABSOLUTE_POINTER_STATE *State
)
{
- USB_MOUSE_ABSOLUTE_POINTER_DEV *MouseAbsolutePointerDev;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *MouseAbsolutePointerDev;
if (State == NULL) {
return EFI_INVALID_PARAMETER;
@@ -900,7 +905,6 @@ GetMouseAbsolutePointerState (
return EFI_SUCCESS;
}
-
/**
Resets the pointer device hardware.
@@ -919,9 +923,9 @@ UsbMouseAbsolutePointerReset (
IN BOOLEAN ExtendedVerification
)
{
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDevice;
- UsbMouseAbsolutePointerDevice = USB_MOUSE_ABSOLUTE_POINTER_DEV_FROM_MOUSE_PROTOCOL (This);
+ UsbMouseAbsolutePointerDevice = USB_MOUSE_ABSOLUTE_POINTER_DEV_FROM_MOUSE_PROTOCOL (This);
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
EFI_PROGRESS_CODE,
@@ -960,13 +964,13 @@ UsbMouseAbsolutePointerReset (
VOID
EFIAPI
UsbMouseAbsolutePointerWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
- UsbMouseAbsolutePointerDev = (USB_MOUSE_ABSOLUTE_POINTER_DEV *) Context;
+ UsbMouseAbsolutePointerDev = (USB_MOUSE_ABSOLUTE_POINTER_DEV *)Context;
//
// If there's input from mouse, signal the event.
@@ -992,16 +996,16 @@ UsbMouseAbsolutePointerWaitForInput (
VOID
EFIAPI
USBMouseRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev;
+ EFI_USB_IO_PROTOCOL *UsbIo;
- UsbMouseAbsolutePointerDev = (USB_MOUSE_ABSOLUTE_POINTER_DEV *) Context;
+ UsbMouseAbsolutePointerDev = (USB_MOUSE_ABSOLUTE_POINTER_DEV *)Context;
- UsbIo = UsbMouseAbsolutePointerDev->UsbIo;
+ UsbIo = UsbMouseAbsolutePointerDev->UsbIo;
//
// Re-submit Asynchronous Interrupt Transfer for recovery.
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.h b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.h
index c9edc45e38..d5f92d2ed9 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.h
+++ b/MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointer.h
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _USB_MOUSE_ABSOLUTE_POINTER_H_
#define _USB_MOUSE_ABSOLUTE_POINTER_H_
-
#include <Uefi.h>
#include <Protocol/AbsolutePointer.h>
@@ -27,14 +26,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Usb.h>
-#define CLASS_HID 3
-#define SUBCLASS_BOOT 1
-#define PROTOCOL_MOUSE 2
+#define CLASS_HID 3
+#define SUBCLASS_BOOT 1
+#define PROTOCOL_MOUSE 2
-#define BOOT_PROTOCOL 0
-#define REPORT_PROTOCOL 1
+#define BOOT_PROTOCOL 0
+#define REPORT_PROTOCOL 1
-#define USB_MOUSE_ABSOLUTE_POINTER_DEV_SIGNATURE SIGNATURE_32 ('u', 'm', 's', 't')
+#define USB_MOUSE_ABSOLUTE_POINTER_DEV_SIGNATURE SIGNATURE_32 ('u', 'm', 's', 't')
//
// A common header for usb standard descriptor.
@@ -42,8 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
#pragma pack(1)
typedef struct {
- UINT8 Len;
- UINT8 Type;
+ UINT8 Len;
+ UINT8 Type;
} USB_DESC_HEAD;
#pragma pack()
@@ -51,33 +50,33 @@ typedef struct {
/// Button range and status
///
typedef struct {
- BOOLEAN ButtonDetected;
- UINT8 ButtonMinIndex;
- UINT8 ButtonMaxIndex;
- UINT8 Reserved;
+ BOOLEAN ButtonDetected;
+ UINT8 ButtonMinIndex;
+ UINT8 ButtonMaxIndex;
+ UINT8 Reserved;
} USB_MOUSE_BUTTON_DATA;
///
/// Device instance of USB mouse.
///
typedef struct {
- UINTN Signature;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_EVENT DelayedRecoveryEvent;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
- EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
- UINT8 NumberOfButtons;
- INT32 XLogicMax;
- INT32 XLogicMin;
- INT32 YLogicMax;
- INT32 YLogicMin;
- EFI_ABSOLUTE_POINTER_PROTOCOL AbsolutePointerProtocol;
- EFI_ABSOLUTE_POINTER_STATE State;
- EFI_ABSOLUTE_POINTER_MODE Mode;
- BOOLEAN StateChanged;
- USB_MOUSE_BUTTON_DATA PrivateData;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ UINTN Signature;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_EVENT DelayedRecoveryEvent;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
+ EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
+ UINT8 NumberOfButtons;
+ INT32 XLogicMax;
+ INT32 XLogicMin;
+ INT32 YLogicMax;
+ INT32 YLogicMin;
+ EFI_ABSOLUTE_POINTER_PROTOCOL AbsolutePointerProtocol;
+ EFI_ABSOLUTE_POINTER_STATE State;
+ EFI_ABSOLUTE_POINTER_MODE Mode;
+ BOOLEAN StateChanged;
+ USB_MOUSE_BUTTON_DATA PrivateData;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
} USB_MOUSE_ABSOLUTE_POINTER_DEV;
///
@@ -85,21 +84,21 @@ typedef struct {
///
typedef union {
- UINT8 Uint8;
- UINT16 Uint16;
- UINT32 Uint32;
- INT8 Int8;
- INT16 Int16;
- INT32 Int32;
- UINT8 *LongData;
+ UINT8 Uint8;
+ UINT16 Uint16;
+ UINT32 Uint32;
+ INT8 Int8;
+ INT16 Int16;
+ INT32 Int32;
+ UINT8 *LongData;
} HID_DATA;
typedef struct {
- UINT16 Format;
- UINT8 Size;
- UINT8 Type;
- UINT8 Tag;
- HID_DATA Data;
+ UINT16 Format;
+ UINT8 Size;
+ UINT8 Type;
+ UINT8 Tag;
+ HID_DATA Data;
} HID_ITEM;
#define USB_MOUSE_ABSOLUTE_POINTER_DEV_FROM_MOUSE_PROTOCOL(a) \
@@ -130,9 +129,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseAbsolutePointerComponentName2;
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -157,9 +156,9 @@ USBMouseAbsolutePointerDriverBindingSupported (
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -178,10 +177,10 @@ USBMouseAbsolutePointerDriverBindingStart (
EFI_STATUS
EFIAPI
USBMouseAbsolutePointerDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
@@ -291,11 +290,11 @@ UsbMouseAbsolutePointerComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbMouseAbsolutePointerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
//
@@ -351,8 +350,8 @@ UsbMouseAbsolutePointerReset (
VOID
EFIAPI
UsbMouseAbsolutePointerWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
//
@@ -370,7 +369,7 @@ UsbMouseAbsolutePointerWaitForInput (
**/
BOOLEAN
IsUsbMouse (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
);
/**
@@ -390,7 +389,7 @@ IsUsbMouse (
**/
EFI_STATUS
InitializeUsbMouseDevice (
- IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev
+ IN USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointerDev
);
/**
@@ -413,10 +412,10 @@ InitializeUsbMouseDevice (
EFI_STATUS
EFIAPI
OnMouseInterruptComplete (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
);
/**
@@ -435,8 +434,8 @@ OnMouseInterruptComplete (
VOID
EFIAPI
USBMouseRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -457,9 +456,9 @@ USBMouseRecoveryHandler (
**/
EFI_STATUS
ParseMouseReportDescriptor (
- OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer,
- IN UINT8 *ReportDescriptor,
- IN UINTN ReportSize
+ OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer,
+ IN UINT8 *ReportDescriptor,
+ IN UINTN ReportSize
);
#endif
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseDxe/ComponentName.c b/MdeModulePkg/Bus/Usb/UsbMouseDxe/ComponentName.c
index 7f4b3e821e..0b5adb1e12 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseDxe/ComponentName.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseDxe/ComponentName.c
@@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#include "UsbMouse.h"
//
@@ -21,16 +20,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gUsbMouseComponentNam
//
// EFI Component Name 2 Protocol
//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) UsbMouseComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) UsbMouseComponentNameGetControllerName,
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseComponentName2 = {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)UsbMouseComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)UsbMouseComponentNameGetControllerName,
"en"
};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbMouseDriverNameTable[] = {
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mUsbMouseDriverNameTable[] = {
{ "eng;en", L"Usb Mouse Driver" },
- { NULL , NULL }
+ { NULL, NULL }
};
/**
@@ -145,17 +143,17 @@ UsbMouseComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbMouseComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
)
{
- EFI_STATUS Status;
- USB_MOUSE_DEV *UsbMouseDev;
- EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
- EFI_USB_IO_PROTOCOL *UsbIoProtocol;
+ EFI_STATUS Status;
+ USB_MOUSE_DEV *UsbMouseDev;
+ EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
+ EFI_USB_IO_PROTOCOL *UsbIoProtocol;
//
// This is a device driver, so ChildHandle must be NULL.
@@ -170,7 +168,7 @@ UsbMouseComponentNameGetControllerName (
Status = gBS->OpenProtocol (
ControllerHandle,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIoProtocol,
+ (VOID **)&UsbIoProtocol,
gUsbMouseDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -189,13 +187,14 @@ UsbMouseComponentNameGetControllerName (
if (Status != EFI_ALREADY_STARTED) {
return EFI_UNSUPPORTED;
}
+
//
// Get the device context
//
Status = gBS->OpenProtocol (
ControllerHandle,
- &gEfiSimplePointerProtocolGuid,
- (VOID **) &SimplePointerProtocol,
+ &gEfiSimplePointerProtocolGuid,
+ (VOID **)&SimplePointerProtocol,
gUsbMouseDriverBinding.DriverBindingHandle,
ControllerHandle,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,5 +213,4 @@ UsbMouseComponentNameGetControllerName (
ControllerName,
(BOOLEAN)(This == &gUsbMouseComponentName)
);
-
}
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseDxe/MouseHid.c b/MdeModulePkg/Bus/Usb/UsbMouseDxe/MouseHid.c
index 2b6d86030b..acc19acd98 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseDxe/MouseHid.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseDxe/MouseHid.c
@@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMouse.h"
-
/**
Get next HID item from report descriptor.
@@ -31,12 +30,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT8 *
GetNextHidItem (
- IN UINT8 *StartPos,
- IN UINT8 *EndPos,
- OUT HID_ITEM *HidItem
+ IN UINT8 *StartPos,
+ IN UINT8 *EndPos,
+ OUT HID_ITEM *HidItem
)
{
- UINT8 Temp;
+ UINT8 Temp;
if (EndPos <= StartPos) {
return NULL;
@@ -66,7 +65,7 @@ GetNextHidItem (
if ((EndPos - StartPos) >= HidItem->Size) {
HidItem->Data.LongData = StartPos;
- StartPos += HidItem->Size;
+ StartPos += HidItem->Size;
return StartPos;
}
}
@@ -75,48 +74,47 @@ GetNextHidItem (
HidItem->Size = BitFieldRead8 (Temp, 0, 1);
switch (HidItem->Size) {
- case 0:
- //
- // No data
- //
- return StartPos;
-
- case 1:
- //
- // 1-byte data
- //
- if ((EndPos - StartPos) >= 1) {
- HidItem->Data.Uint8 = *StartPos++;
+ case 0:
+ //
+ // No data
+ //
return StartPos;
- }
- case 2:
- //
- // 2-byte data
- //
- if ((EndPos - StartPos) >= 2) {
- CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
- StartPos += 2;
- return StartPos;
- }
+ case 1:
+ //
+ // 1-byte data
+ //
+ if ((EndPos - StartPos) >= 1) {
+ HidItem->Data.Uint8 = *StartPos++;
+ return StartPos;
+ }
- case 3:
- //
- // 4-byte data, adjust size
- //
- HidItem->Size = 4;
- if ((EndPos - StartPos) >= 4) {
- CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
- StartPos += 4;
- return StartPos;
- }
+ case 2:
+ //
+ // 2-byte data
+ //
+ if ((EndPos - StartPos) >= 2) {
+ CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
+ StartPos += 2;
+ return StartPos;
+ }
+
+ case 3:
+ //
+ // 4-byte data, adjust size
+ //
+ HidItem->Size = 4;
+ if ((EndPos - StartPos) >= 4) {
+ CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
+ StartPos += 4;
+ return StartPos;
+ }
}
}
return NULL;
}
-
/**
Get data from HID item.
@@ -131,20 +129,21 @@ GetNextHidItem (
**/
UINT32
GetItemData (
- IN HID_ITEM *HidItem
+ IN HID_ITEM *HidItem
)
{
//
// Get data from HID item.
//
switch (HidItem->Size) {
- case 1:
- return HidItem->Data.Uint8;
- case 2:
- return HidItem->Data.Uint16;
- case 4:
- return HidItem->Data.Uint32;
+ case 1:
+ return HidItem->Data.Uint8;
+ case 2:
+ return HidItem->Data.Uint16;
+ case 4:
+ return HidItem->Data.Uint32;
}
+
return 0;
}
@@ -161,67 +160,68 @@ GetItemData (
**/
VOID
ParseHidItem (
- IN USB_MOUSE_DEV *UsbMouse,
- IN HID_ITEM *HidItem
+ IN USB_MOUSE_DEV *UsbMouse,
+ IN HID_ITEM *HidItem
)
{
UINT8 Data;
switch (HidItem->Type) {
+ case HID_ITEM_TYPE_MAIN:
+ //
+ // we don't care any main items, just skip
+ //
+ return;
- case HID_ITEM_TYPE_MAIN:
- //
- // we don't care any main items, just skip
- //
- return;
+ case HID_ITEM_TYPE_GLOBAL:
+ //
+ // For global items, we only care Usage Page tag for Button Page here
+ //
+ if (HidItem->Tag == HID_GLOBAL_ITEM_TAG_USAGE_PAGE) {
+ Data = (UINT8)GetItemData (HidItem);
+ if (Data == 0x09) {
+ //
+ // Button Page
+ //
+ UsbMouse->PrivateData.ButtonDetected = TRUE;
+ }
+ }
- case HID_ITEM_TYPE_GLOBAL:
- //
- // For global items, we only care Usage Page tag for Button Page here
- //
- if (HidItem->Tag == HID_GLOBAL_ITEM_TAG_USAGE_PAGE) {
- Data = (UINT8) GetItemData (HidItem);
- if (Data == 0x09) {
+ return;
+
+ case HID_ITEM_TYPE_LOCAL:
+ if (HidItem->Size == 0) {
//
- // Button Page
+ // No expected data for local item
//
- UsbMouse->PrivateData.ButtonDetected = TRUE;
+ return;
}
- }
- return;
- case HID_ITEM_TYPE_LOCAL:
- if (HidItem->Size == 0) {
- //
- // No expected data for local item
- //
- return ;
- }
+ Data = (UINT8)GetItemData (HidItem);
- Data = (UINT8) GetItemData (HidItem);
+ switch (HidItem->Tag) {
+ case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:
+ if (UsbMouse->PrivateData.ButtonDetected) {
+ UsbMouse->PrivateData.ButtonMinIndex = Data;
+ }
- switch (HidItem->Tag) {
- case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:
- if (UsbMouse->PrivateData.ButtonDetected) {
- UsbMouse->PrivateData.ButtonMinIndex = Data;
- }
- return ;
+ return;
- case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:
- {
- if (UsbMouse->PrivateData.ButtonDetected) {
- UsbMouse->PrivateData.ButtonMaxIndex = Data;
- }
- return ;
- }
+ case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:
+ {
+ if (UsbMouse->PrivateData.ButtonDetected) {
+ UsbMouse->PrivateData.ButtonMaxIndex = Data;
+ }
- default:
- return;
- }
+ return;
+ }
+
+ default:
+ return;
+ }
}
}
-
/**
Parse Mouse Report Descriptor.
@@ -240,9 +240,9 @@ ParseHidItem (
**/
EFI_STATUS
ParseMouseReportDescriptor (
- OUT USB_MOUSE_DEV *UsbMouse,
- IN UINT8 *ReportDescriptor,
- IN UINTN ReportSize
+ OUT USB_MOUSE_DEV *UsbMouse,
+ IN UINT8 *ReportDescriptor,
+ IN UINTN ReportSize
)
{
UINT8 *DescriptorEnd;
@@ -265,11 +265,11 @@ ParseMouseReportDescriptor (
Ptr = GetNextHidItem (Ptr, DescriptorEnd, &HidItem);
}
- UsbMouse->NumberOfButtons = (UINT8) (UsbMouse->PrivateData.ButtonMaxIndex - UsbMouse->PrivateData.ButtonMinIndex + 1);
- UsbMouse->XLogicMax = 127;
- UsbMouse->YLogicMax = 127;
- UsbMouse->XLogicMin = -127;
- UsbMouse->YLogicMin = -127;
+ UsbMouse->NumberOfButtons = (UINT8)(UsbMouse->PrivateData.ButtonMaxIndex - UsbMouse->PrivateData.ButtonMinIndex + 1);
+ UsbMouse->XLogicMax = 127;
+ UsbMouse->YLogicMax = 127;
+ UsbMouse->XLogicMin = -127;
+ UsbMouse->YLogicMin = -127;
return EFI_SUCCESS;
}
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.c b/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.c
index 9861c32d49..451d4b934f 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.c
+++ b/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UsbMouse.h"
-EFI_DRIVER_BINDING_PROTOCOL gUsbMouseDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gUsbMouseDriverBinding = {
USBMouseDriverBindingSupported,
USBMouseDriverBindingStart,
USBMouseDriverBindingStop,
@@ -32,11 +32,11 @@ EFI_DRIVER_BINDING_PROTOCOL gUsbMouseDriverBinding = {
EFI_STATUS
EFIAPI
USBMouseDriverBindingEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
@@ -51,7 +51,6 @@ USBMouseDriverBindingEntryPoint (
return EFI_SUCCESS;
}
-
/**
Check whether USB mouse driver supports this device.
@@ -66,18 +65,18 @@ USBMouseDriverBindingEntryPoint (
EFI_STATUS
EFIAPI
USBMouseDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -96,16 +95,15 @@ USBMouseDriverBindingSupported (
}
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
return Status;
}
-
/**
Starts the mouse device with this driver.
@@ -128,22 +126,22 @@ USBMouseDriverBindingSupported (
EFI_STATUS
EFIAPI
USBMouseDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
- EFI_USB_IO_PROTOCOL *UsbIo;
- USB_MOUSE_DEV *UsbMouseDevice;
- UINT8 EndpointNumber;
- EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
- UINT8 Index;
- UINT8 EndpointAddr;
- UINT8 PollingInterval;
- UINT8 PacketSize;
- BOOLEAN Found;
- EFI_TPL OldTpl;
+ EFI_STATUS Status;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_MOUSE_DEV *UsbMouseDevice;
+ UINT8 EndpointNumber;
+ EFI_USB_ENDPOINT_DESCRIPTOR EndpointDescriptor;
+ UINT8 Index;
+ UINT8 EndpointAddr;
+ UINT8 PollingInterval;
+ UINT8 PacketSize;
+ BOOLEAN Found;
+ EFI_TPL OldTpl;
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
//
@@ -152,7 +150,7 @@ USBMouseDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiUsbIoProtocolGuid,
- (VOID **) &UsbIo,
+ (VOID **)&UsbIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@@ -173,7 +171,7 @@ USBMouseDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
- (VOID **) &UsbMouseDevice->DevicePath,
+ (VOID **)&UsbMouseDevice->DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -214,11 +212,12 @@ USBMouseDriverBindingStart (
);
if (((EndpointDescriptor.Attributes & (BIT0 | BIT1)) == USB_ENDPOINT_INTERRUPT) &&
- ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0)) {
+ ((EndpointDescriptor.EndpointAddress & USB_ENDPOINT_DIR_IN) != 0))
+ {
//
// We only care interrupt endpoint here
//
- CopyMem(&UsbMouseDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof(EndpointDescriptor));
+ CopyMem (&UsbMouseDevice->IntEndpointDescriptor, &EndpointDescriptor, sizeof (EndpointDescriptor));
Found = TRUE;
break;
}
@@ -265,9 +264,9 @@ USBMouseDriverBindingStart (
//
// Initialize and install EFI Simple Pointer Protocol.
//
- UsbMouseDevice->SimplePointerProtocol.GetState = GetMouseState;
- UsbMouseDevice->SimplePointerProtocol.Reset = UsbMouseReset;
- UsbMouseDevice->SimplePointerProtocol.Mode = &UsbMouseDevice->Mode;
+ UsbMouseDevice->SimplePointerProtocol.GetState = GetMouseState;
+ UsbMouseDevice->SimplePointerProtocol.Reset = UsbMouseReset;
+ UsbMouseDevice->SimplePointerProtocol.Mode = &UsbMouseDevice->Mode;
Status = gBS->CreateEvent (
EVT_NOTIFY_WAIT,
@@ -307,7 +306,7 @@ USBMouseDriverBindingStart (
//
EndpointAddr = UsbMouseDevice->IntEndpointDescriptor.EndpointAddress;
PollingInterval = UsbMouseDevice->IntEndpointDescriptor.Interval;
- PacketSize = (UINT8) (UsbMouseDevice->IntEndpointDescriptor.MaxPacketSize);
+ PacketSize = (UINT8)(UsbMouseDevice->IntEndpointDescriptor.MaxPacketSize);
Status = UsbIo->UsbAsyncInterruptTransfer (
UsbIo,
@@ -351,17 +350,17 @@ USBMouseDriverBindingStart (
return EFI_SUCCESS;
-//
-// Error handler
-//
+ //
+ // Error handler
+ //
ErrorExit:
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
- Controller,
- &gEfiUsbIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
+ Controller,
+ &gEfiUsbIoProtocolGuid,
+ This->DriverBindingHandle,
+ Controller
+ );
if (UsbMouseDevice != NULL) {
if ((UsbMouseDevice->SimplePointerProtocol).WaitForInput != NULL) {
@@ -378,7 +377,6 @@ ErrorExit1:
return Status;
}
-
/**
Stop the USB mouse device handled by this driver.
@@ -395,21 +393,21 @@ ErrorExit1:
EFI_STATUS
EFIAPI
USBMouseDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
)
{
- EFI_STATUS Status;
- USB_MOUSE_DEV *UsbMouseDevice;
- EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_STATUS Status;
+ USB_MOUSE_DEV *UsbMouseDevice;
+ EFI_SIMPLE_POINTER_PROTOCOL *SimplePointerProtocol;
+ EFI_USB_IO_PROTOCOL *UsbIo;
Status = gBS->OpenProtocol (
Controller,
&gEfiSimplePointerProtocolGuid,
- (VOID **) &SimplePointerProtocol,
+ (VOID **)&SimplePointerProtocol,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@@ -478,10 +476,8 @@ USBMouseDriverBindingStop (
FreePool (UsbMouseDevice);
return EFI_SUCCESS;
-
}
-
/**
Uses USB I/O to check whether the device is a USB mouse device.
@@ -493,7 +489,7 @@ USBMouseDriverBindingStop (
**/
BOOLEAN
IsUsbMouse (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
)
{
EFI_STATUS Status;
@@ -514,14 +510,14 @@ IsUsbMouse (
if ((InterfaceDescriptor.InterfaceClass == CLASS_HID) &&
(InterfaceDescriptor.InterfaceSubClass == SUBCLASS_BOOT) &&
(InterfaceDescriptor.InterfaceProtocol == PROTOCOL_MOUSE)
- ) {
+ )
+ {
return TRUE;
}
return FALSE;
}
-
/**
Initialize the USB mouse device.
@@ -539,20 +535,20 @@ IsUsbMouse (
**/
EFI_STATUS
InitializeUsbMouseDevice (
- IN OUT USB_MOUSE_DEV *UsbMouseDev
+ IN OUT USB_MOUSE_DEV *UsbMouseDev
)
{
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 Protocol;
- EFI_STATUS Status;
- EFI_USB_HID_DESCRIPTOR *MouseHidDesc;
- UINT8 *ReportDesc;
- EFI_USB_CONFIG_DESCRIPTOR ConfigDesc;
- VOID *Buf;
- UINT32 TransferResult;
- UINT16 Total;
- USB_DESC_HEAD *Head;
- BOOLEAN Start;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 Protocol;
+ EFI_STATUS Status;
+ EFI_USB_HID_DESCRIPTOR *MouseHidDesc;
+ UINT8 *ReportDesc;
+ EFI_USB_CONFIG_DESCRIPTOR ConfigDesc;
+ VOID *Buf;
+ UINT32 TransferResult;
+ UINT16 Total;
+ USB_DESC_HEAD *Head;
+ BOOLEAN Start;
UsbIo = UsbMouseDev->UsbIo;
@@ -589,9 +585,9 @@ InitializeUsbMouseDevice (
return Status;
}
- Total = 0;
- Start = FALSE;
- Head = (USB_DESC_HEAD *)Buf;
+ Total = 0;
+ Start = FALSE;
+ Head = (USB_DESC_HEAD *)Buf;
MouseHidDesc = NULL;
//
@@ -602,19 +598,23 @@ InitializeUsbMouseDevice (
while (Total < ConfigDesc.TotalLength) {
if (Head->Type == USB_DESC_TYPE_INTERFACE) {
if ((((USB_INTERFACE_DESCRIPTOR *)Head)->InterfaceNumber == UsbMouseDev->InterfaceDescriptor.InterfaceNumber) &&
- (((USB_INTERFACE_DESCRIPTOR *)Head)->AlternateSetting == UsbMouseDev->InterfaceDescriptor.AlternateSetting)) {
+ (((USB_INTERFACE_DESCRIPTOR *)Head)->AlternateSetting == UsbMouseDev->InterfaceDescriptor.AlternateSetting))
+ {
Start = TRUE;
}
}
+
if (Start && (Head->Type == USB_DESC_TYPE_ENDPOINT)) {
break;
}
+
if (Start && (Head->Type == USB_DESC_TYPE_HID)) {
MouseHidDesc = (EFI_USB_HID_DESCRIPTOR *)Head;
break;
}
+
Total = Total + (UINT16)Head->Len;
- Head = (USB_DESC_HEAD*)((UINT8 *)Buf + Total);
+ Head = (USB_DESC_HEAD *)((UINT8 *)Buf + Total);
}
if (MouseHidDesc == NULL) {
@@ -668,9 +668,11 @@ InitializeUsbMouseDevice (
if (UsbMouseDev->NumberOfButtons >= 1) {
UsbMouseDev->Mode.LeftButton = TRUE;
}
+
if (UsbMouseDev->NumberOfButtons > 1) {
UsbMouseDev->Mode.RightButton = TRUE;
}
+
UsbMouseDev->Mode.ResolutionX = 8;
UsbMouseDev->Mode.ResolutionY = 8;
UsbMouseDev->Mode.ResolutionZ = 0;
@@ -720,7 +722,6 @@ InitializeUsbMouseDevice (
return EFI_SUCCESS;
}
-
/**
Handler function for USB mouse's asynchronous interrupt transfer.
@@ -741,19 +742,19 @@ InitializeUsbMouseDevice (
EFI_STATUS
EFIAPI
OnMouseInterruptComplete (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
)
{
- USB_MOUSE_DEV *UsbMouseDevice;
- EFI_USB_IO_PROTOCOL *UsbIo;
- UINT8 EndpointAddr;
- UINT32 UsbResult;
+ USB_MOUSE_DEV *UsbMouseDevice;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ UINT8 EndpointAddr;
+ UINT32 UsbResult;
- UsbMouseDevice = (USB_MOUSE_DEV *) Context;
- UsbIo = UsbMouseDevice->UsbIo;
+ UsbMouseDevice = (USB_MOUSE_DEV *)Context;
+ UsbIo = UsbMouseDevice->UsbIo;
if (Result != EFI_USB_NOERROR) {
//
@@ -802,7 +803,7 @@ OnMouseInterruptComplete (
//
// If no error and no data, just return EFI_SUCCESS.
//
- if (DataLength == 0 || Data == NULL) {
+ if ((DataLength == 0) || (Data == NULL)) {
return EFI_SUCCESS;
}
@@ -824,13 +825,13 @@ OnMouseInterruptComplete (
UsbMouseDevice->StateChanged = TRUE;
- UsbMouseDevice->State.LeftButton = (BOOLEAN) ((*(UINT8 *) Data & BIT0) != 0);
- UsbMouseDevice->State.RightButton = (BOOLEAN) ((*(UINT8 *) Data & BIT1) != 0);
- UsbMouseDevice->State.RelativeMovementX += *((INT8 *) Data + 1);
- UsbMouseDevice->State.RelativeMovementY += *((INT8 *) Data + 2);
+ UsbMouseDevice->State.LeftButton = (BOOLEAN)((*(UINT8 *)Data & BIT0) != 0);
+ UsbMouseDevice->State.RightButton = (BOOLEAN)((*(UINT8 *)Data & BIT1) != 0);
+ UsbMouseDevice->State.RelativeMovementX += *((INT8 *)Data + 1);
+ UsbMouseDevice->State.RelativeMovementY += *((INT8 *)Data + 2);
if (DataLength > 3) {
- UsbMouseDevice->State.RelativeMovementZ += *((INT8 *) Data + 3);
+ UsbMouseDevice->State.RelativeMovementZ += *((INT8 *)Data + 3);
}
return EFI_SUCCESS;
@@ -857,7 +858,7 @@ GetMouseState (
OUT EFI_SIMPLE_POINTER_STATE *MouseState
)
{
- USB_MOUSE_DEV *MouseDev;
+ USB_MOUSE_DEV *MouseDev;
if (MouseState == NULL) {
return EFI_INVALID_PARAMETER;
@@ -885,12 +886,11 @@ GetMouseState (
MouseDev->State.RelativeMovementY = 0;
MouseDev->State.RelativeMovementZ = 0;
- MouseDev->StateChanged = FALSE;
+ MouseDev->StateChanged = FALSE;
return EFI_SUCCESS;
}
-
/**
Resets the pointer device hardware.
@@ -905,13 +905,13 @@ GetMouseState (
EFI_STATUS
EFIAPI
UsbMouseReset (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
)
{
- USB_MOUSE_DEV *UsbMouseDevice;
+ USB_MOUSE_DEV *UsbMouseDevice;
- UsbMouseDevice = USB_MOUSE_DEV_FROM_MOUSE_PROTOCOL (This);
+ UsbMouseDevice = USB_MOUSE_DEV_FROM_MOUSE_PROTOCOL (This);
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
EFI_PROGRESS_CODE,
@@ -941,13 +941,13 @@ UsbMouseReset (
VOID
EFIAPI
UsbMouseWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_MOUSE_DEV *UsbMouseDev;
+ USB_MOUSE_DEV *UsbMouseDev;
- UsbMouseDev = (USB_MOUSE_DEV *) Context;
+ UsbMouseDev = (USB_MOUSE_DEV *)Context;
//
// If there's input from mouse, signal the event.
@@ -973,16 +973,16 @@ UsbMouseWaitForInput (
VOID
EFIAPI
USBMouseRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
- USB_MOUSE_DEV *UsbMouseDev;
- EFI_USB_IO_PROTOCOL *UsbIo;
+ USB_MOUSE_DEV *UsbMouseDev;
+ EFI_USB_IO_PROTOCOL *UsbIo;
- UsbMouseDev = (USB_MOUSE_DEV *) Context;
+ UsbMouseDev = (USB_MOUSE_DEV *)Context;
- UsbIo = UsbMouseDev->UsbIo;
+ UsbIo = UsbMouseDev->UsbIo;
//
// Re-submit Asynchronous Interrupt Transfer for recovery.
diff --git a/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.h b/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.h
index f46069602f..3ddd765c45 100644
--- a/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.h
+++ b/MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouse.h
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _EFI_USB_MOUSE_H_
#define _EFI_USB_MOUSE_H_
-
#include <Uefi.h>
#include <Protocol/SimplePointer.h>
@@ -27,14 +26,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <IndustryStandard/Usb.h>
-#define CLASS_HID 3
-#define SUBCLASS_BOOT 1
-#define PROTOCOL_MOUSE 2
+#define CLASS_HID 3
+#define SUBCLASS_BOOT 1
+#define PROTOCOL_MOUSE 2
-#define BOOT_PROTOCOL 0
-#define REPORT_PROTOCOL 1
+#define BOOT_PROTOCOL 0
+#define REPORT_PROTOCOL 1
-#define USB_MOUSE_DEV_SIGNATURE SIGNATURE_32 ('u', 'm', 'o', 'u')
+#define USB_MOUSE_DEV_SIGNATURE SIGNATURE_32 ('u', 'm', 'o', 'u')
//
// A common header for usb standard descriptor.
@@ -42,8 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
#pragma pack(1)
typedef struct {
- UINT8 Len;
- UINT8 Type;
+ UINT8 Len;
+ UINT8 Type;
} USB_DESC_HEAD;
#pragma pack()
@@ -51,33 +50,33 @@ typedef struct {
/// Button range and status
///
typedef struct {
- BOOLEAN ButtonDetected;
- UINT8 ButtonMinIndex;
- UINT8 ButtonMaxIndex;
- UINT8 Reserved;
+ BOOLEAN ButtonDetected;
+ UINT8 ButtonMinIndex;
+ UINT8 ButtonMaxIndex;
+ UINT8 Reserved;
} USB_MOUSE_BUTTON_DATA;
///
/// Device instance of USB mouse.
///
typedef struct {
- UINTN Signature;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- EFI_EVENT DelayedRecoveryEvent;
- EFI_USB_IO_PROTOCOL *UsbIo;
- EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
- EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
- UINT8 NumberOfButtons;
- INT32 XLogicMax;
- INT32 XLogicMin;
- INT32 YLogicMax;
- INT32 YLogicMin;
- EFI_SIMPLE_POINTER_PROTOCOL SimplePointerProtocol;
- EFI_SIMPLE_POINTER_STATE State;
- EFI_SIMPLE_POINTER_MODE Mode;
- BOOLEAN StateChanged;
- USB_MOUSE_BUTTON_DATA PrivateData;
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;
+ UINTN Signature;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_EVENT DelayedRecoveryEvent;
+ EFI_USB_IO_PROTOCOL *UsbIo;
+ EFI_USB_INTERFACE_DESCRIPTOR InterfaceDescriptor;
+ EFI_USB_ENDPOINT_DESCRIPTOR IntEndpointDescriptor;
+ UINT8 NumberOfButtons;
+ INT32 XLogicMax;
+ INT32 XLogicMin;
+ INT32 YLogicMax;
+ INT32 YLogicMin;
+ EFI_SIMPLE_POINTER_PROTOCOL SimplePointerProtocol;
+ EFI_SIMPLE_POINTER_STATE State;
+ EFI_SIMPLE_POINTER_MODE Mode;
+ BOOLEAN StateChanged;
+ USB_MOUSE_BUTTON_DATA PrivateData;
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;
} USB_MOUSE_DEV;
///
@@ -85,21 +84,21 @@ typedef struct {
///
typedef union {
- UINT8 Uint8;
- UINT16 Uint16;
- UINT32 Uint32;
- INT8 Int8;
- INT16 Int16;
- INT32 Int32;
- UINT8 *LongData;
+ UINT8 Uint8;
+ UINT16 Uint16;
+ UINT32 Uint32;
+ INT8 Int8;
+ INT16 Int16;
+ INT32 Int32;
+ UINT8 *LongData;
} HID_DATA;
typedef struct {
- UINT16 Format;
- UINT8 Size;
- UINT8 Type;
- UINT8 Tag;
- HID_DATA Data;
+ UINT16 Format;
+ UINT8 Size;
+ UINT8 Type;
+ UINT8 Tag;
+ HID_DATA Data;
} HID_ITEM;
#define USB_MOUSE_DEV_FROM_MOUSE_PROTOCOL(a) \
@@ -130,9 +129,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gUsbMouseComponentName2;
EFI_STATUS
EFIAPI
USBMouseDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -157,9 +156,9 @@ USBMouseDriverBindingSupported (
EFI_STATUS
EFIAPI
USBMouseDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -178,10 +177,10 @@ USBMouseDriverBindingStart (
EFI_STATUS
EFIAPI
USBMouseDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE Controller,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer
);
//
@@ -291,11 +290,11 @@ UsbMouseComponentNameGetDriverName (
EFI_STATUS
EFIAPI
UsbMouseComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
);
//
@@ -337,8 +336,8 @@ GetMouseState (
EFI_STATUS
EFIAPI
UsbMouseReset (
- IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN BOOLEAN ExtendedVerification
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
);
/**
@@ -351,8 +350,8 @@ UsbMouseReset (
VOID
EFIAPI
UsbMouseWaitForInput (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
//
@@ -370,7 +369,7 @@ UsbMouseWaitForInput (
**/
BOOLEAN
IsUsbMouse (
- IN EFI_USB_IO_PROTOCOL *UsbIo
+ IN EFI_USB_IO_PROTOCOL *UsbIo
);
/**
@@ -390,7 +389,7 @@ IsUsbMouse (
**/
EFI_STATUS
InitializeUsbMouseDevice (
- IN OUT USB_MOUSE_DEV *UsbMouseDev
+ IN OUT USB_MOUSE_DEV *UsbMouseDev
);
/**
@@ -413,10 +412,10 @@ InitializeUsbMouseDevice (
EFI_STATUS
EFIAPI
OnMouseInterruptComplete (
- IN VOID *Data,
- IN UINTN DataLength,
- IN VOID *Context,
- IN UINT32 Result
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Result
);
/**
@@ -435,8 +434,8 @@ OnMouseInterruptComplete (
VOID
EFIAPI
USBMouseRecoveryHandler (
- IN EFI_EVENT Event,
- IN VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
);
/**
@@ -457,9 +456,9 @@ USBMouseRecoveryHandler (
**/
EFI_STATUS
ParseMouseReportDescriptor (
- OUT USB_MOUSE_DEV *UsbMouse,
- IN UINT8 *ReportDescriptor,
- IN UINTN ReportSize
+ OUT USB_MOUSE_DEV *UsbMouse,
+ IN UINT8 *ReportDescriptor,
+ IN UINTN ReportSize
);
#endif