summaryrefslogtreecommitdiffstats
path: root/MdeModulePkg/Universal/Acpi
diff options
context:
space:
mode:
authorJeff Fan <jeff.fan@intel.com>2017-04-10 14:00:03 +0800
committerJeff Fan <jeff.fan@intel.com>2017-04-12 08:56:12 +0800
commit558f58e3e01a482c5a470594afd03cc4fd526345 (patch)
treecfede6328c62ee89f5e89cb5e811bdfef13c555f /MdeModulePkg/Universal/Acpi
parent971a2d520e5e5e4c46452e6a99f343f1f8892e32 (diff)
downloadedk2-558f58e3e01a482c5a470594afd03cc4fd526345.tar.gz
edk2-558f58e3e01a482c5a470594afd03cc4fd526345.tar.bz2
edk2-558f58e3e01a482c5a470594afd03cc4fd526345.zip
MdeModulePkg: Error Level is not used correctly
Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Diffstat (limited to 'MdeModulePkg/Universal/Acpi')
-rw-r--r--MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c10
-rw-r--r--MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c4
-rw-r--r--MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
index 5147e66b4e..4545d6e581 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
@@ -103,7 +103,7 @@ S3BootScriptExecutorEntryFunction (
//
// X64 S3 Resume
//
- DEBUG ((EFI_D_ERROR, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
+ DEBUG ((DEBUG_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl32;
if ((Facs != NULL) &&
@@ -128,7 +128,7 @@ S3BootScriptExecutorEntryFunction (
//
// IA32 S3 Resume
//
- DEBUG ((EFI_D_ERROR, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
+ DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl;
SwitchStack (
@@ -160,7 +160,7 @@ S3BootScriptExecutorEntryFunction (
//
// X64 long mode waking vector
//
- DEBUG (( EFI_D_ERROR, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
+ DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
@@ -177,7 +177,7 @@ S3BootScriptExecutorEntryFunction (
//
// IA32 protected mode waking vector (Page disabled)
//
- DEBUG (( EFI_D_ERROR, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
+ DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
AsmDisablePaging64 (
0x10,
@@ -199,7 +199,7 @@ S3BootScriptExecutorEntryFunction (
//
// 16bit Realmode waking vector
//
- DEBUG (( EFI_D_ERROR, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
+ DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
}
diff --git a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
index d433cf128c..70eecf5762 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
@@ -3,7 +3,7 @@
Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
@@ -234,7 +234,7 @@ PageFaultHandler (
UINTN PTIndex;
PFAddress = AsmReadCr2 ();
- DEBUG ((EFI_D_ERROR, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));
+ DEBUG ((DEBUG_INFO, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));
if (PFAddress >= mPhyMask + SIZE_4KB) {
return FALSE;
diff --git a/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c b/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
index dcfd61c9ba..3c05558b23 100644
--- a/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
+++ b/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
@@ -407,7 +407,7 @@ S3AllocatePageTablesBuffer (
}
TotalPageTableSize += ExtraPageTablePages;
- DEBUG ((EFI_D_ERROR, "AcpiS3ContextSave TotalPageTableSize - 0x%x pages\n", TotalPageTableSize));
+ DEBUG ((DEBUG_INFO, "AcpiS3ContextSave TotalPageTableSize - 0x%x pages\n", TotalPageTableSize));
//
// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.