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authorLiming Gao <liming.gao@intel.com>2018-06-27 21:08:52 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-28 11:19:45 +0800
commitd1102dba7210b95e41d06c2338a22ba6af248645 (patch)
tree8b4af076b5d6f2aa7f35563d4defcca4d4bfdd87 /MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
parentca79bab7af4770c5eb578f6d495af01705aedb79 (diff)
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MdeModulePkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c')
-rw-r--r--MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
index e1871c3c2a..40b7095194 100644
--- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
+++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
@@ -1,7 +1,7 @@
/** @file
The X64 entrypoint is used to process capsule in long mode.
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@@ -165,7 +165,7 @@ PageFaultHandler (
//
// Get the IDT Descriptor.
//
- AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
+ AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
//
// Then get page fault context by IDT Descriptor.
//
@@ -233,7 +233,7 @@ _ModuleEntryPoint (
//
// Save the IA32 IDT Descriptor
//
- AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
+ AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
//
// Setup X64 IDT table
@@ -241,7 +241,7 @@ _ModuleEntryPoint (
ZeroMem (PageFaultIdtTable.IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER);
X64Idtr.Base = (UINTN) PageFaultIdtTable.IdtEntryTable;
X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER - 1);
- AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);
+ AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);
//
// Setup the default CPU exception handlers
@@ -272,7 +272,7 @@ _ModuleEntryPoint (
(VOID **) (UINTN) EntrypointContext->MemoryBase64Ptr,
(UINTN *) (UINTN) EntrypointContext->MemorySize64Ptr
);
-
+
ReturnContext->ReturnStatus = Status;
DEBUG ((
@@ -290,8 +290,8 @@ _ModuleEntryPoint (
//
// Restore IA32 IDT table
//
- AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
-
+ AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);
+
//
// Finish to coalesce capsule, and return to 32-bit mode.
//
@@ -301,8 +301,8 @@ _ModuleEntryPoint (
(UINT32) (UINTN) EntrypointContext,
(UINT32) (UINTN) ReturnContext,
(UINT32) (EntrypointContext->StackBufferBase + EntrypointContext->StackBufferLength)
- );
-
+ );
+
//
// Should never be here.
//