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author | Feng Tian <feng.tian@intel.com> | 2015-08-19 03:41:38 +0000 |
---|---|---|
committer | erictian <erictian@Edk2> | 2015-08-19 03:41:38 +0000 |
commit | 26cd2d6d2d1154cfda891085ad34905c69ff62ce (patch) | |
tree | d39459aa7f1d043d2636113c5c16ba24170dc552 /MdeModulePkg | |
parent | 1d7258fa5312085e61de85fd3c6f60b761ad8653 (diff) | |
download | edk2-26cd2d6d2d1154cfda891085ad34905c69ff62ce.tar.gz edk2-26cd2d6d2d1154cfda891085ad34905c69ff62ce.tar.bz2 edk2-26cd2d6d2d1154cfda891085ad34905c69ff62ce.zip |
MdeModulePkg/Xhci: make all timeout values be consistent with comments.
In the original code, there exists some mismatches between the real
waiting time and the corresponding timeout comments. For example, the
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real
code in fact waits 10s.
So the code is refined to be consistent in code logic and comments.
Note XHC_POLL_DELAY macro also be removed and the polling interval in
XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style
with other code. It has no real functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18235 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg')
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 15 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 16 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 2 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c | 12 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h | 17 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c | 2 |
6 files changed, 29 insertions, 35 deletions
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h index 9927f79783..7999151b3f 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h @@ -2,7 +2,7 @@ Provides some data structure definitions used by the XHCI host controller driver.
-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -47,24 +47,19 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT; //
#define XHC_1_MICROSECOND (1)
//
-// Convert millisecond to microsecond.
+// The unit is microsecond, setting it as 1ms.
//
#define XHC_1_MILLISECOND (1000)
//
// XHC generic timeout experience values.
-// The unit is microsecond, setting it as 10ms.
+// The unit is millisecond, setting it as 10s.
//
#define XHC_GENERIC_TIMEOUT (10 * 1000)
//
// XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1000 * 1000)
-//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY (1000)
+#define XHC_RESET_TIMEOUT (1000)
//
// XHC async transfer timer interval, set by experience.
// The unit is 100us, takes 1ms as interval.
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c index a513dd9581..d0f22050ad 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c @@ -2,7 +2,7 @@ The XHCI register operation routines.
-Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -499,7 +499,7 @@ XhcClearOpRegBit ( @param Offset The offset of the operation register.
@param Bit The bit of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
- @param Timeout The time to wait before abort (in microsecond, us).
+ @param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
@@ -515,16 +515,16 @@ XhcWaitOpRegBit ( )
{
UINT32 Index;
- UINTN Loop;
+ UINT64 Loop;
- Loop = (Timeout / XHC_POLL_DELAY) + 1;
+ Loop = Timeout * XHC_1_MILLISECOND;
for (Index = 0; Index < Loop; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
return EFI_SUCCESS;
}
- gBS->Stall (XHC_POLL_DELAY);
+ gBS->Stall (XHC_1_MICROSECOND);
}
return EFI_TIMEOUT;
@@ -656,7 +656,7 @@ XhcIsSysError ( Reset the XHCI host controller.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The XHCI host controller is reset.
@return Others Failed to reset the XHCI before Timeout.
@@ -698,7 +698,7 @@ XhcResetHC ( Halt the XHCI host controller.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is halt.
@return EFI_TIMEOUT Failed to halt the XHCI before Timeout.
@@ -722,7 +722,7 @@ XhcHaltHC ( Set the XHCI host controller to run.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is running.
@return EFI_TIMEOUT Failed to set the XHCI to run before Timeout.
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c index 1bdf1a4aa0..05cd616a03 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c @@ -1215,7 +1215,7 @@ XhcExecTransfer ( {
EFI_STATUS Status;
UINTN Index;
- UINTN Loop;
+ UINT64 Loop;
UINT8 SlotId;
UINT8 Dci;
BOOLEAN Finished;
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c index 72e86caeb0..2f16b82d26 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c @@ -2,7 +2,7 @@ PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
which is used to enable recovery function from USB Drivers.
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -161,7 +161,7 @@ XhcPeiClearOpRegBit ( @param Offset The offset of the operational register.
@param Bit The bit mask of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
- @param Timeout The time to wait before abort (in microsecond, us).
+ @param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
@@ -176,14 +176,14 @@ XhcPeiWaitOpRegBit ( IN UINT32 Timeout
)
{
- UINT32 Index;
+ UINT64 Index;
- for (Index = 0; Index < Timeout / XHC_POLL_DELAY + 1; Index++) {
+ for (Index = 0; Index < Timeout * XHC_1_MILLISECOND; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
return EFI_SUCCESS;
}
- MicroSecondDelay (XHC_POLL_DELAY);
+ MicroSecondDelay (XHC_1_MICROSECOND);
}
return EFI_TIMEOUT;
@@ -381,7 +381,7 @@ XhcPeiIsSysError ( Reset the host controller.
@param Xhc The XHCI device.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_TIMEOUT The transfer failed due to time out.
@retval Others Failed to reset the host.
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h index 3b77f2aba7..ccf4dc26e5 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h @@ -1,7 +1,7 @@ /** @file
Private Header file for Usb Host Controller PEIM
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -48,21 +48,20 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT; //
// XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1 * XHC_1_SECOND)
-//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY (1 * XHC_1_MILLISECOND)
+#define XHC_RESET_TIMEOUT (1000)
//
// Wait for root port state stable.
//
#define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)
-#define XHC_GENERIC_TIMEOUT (10 * XHC_1_MILLISECOND)
+//
+// XHC generic timeout experience values.
+// The unit is millisecond, setting it as 10s.
+//
+#define XHC_GENERIC_TIMEOUT (10 * 1000)
#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c index 0f35517ec6..eedf3779be 100644 --- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c @@ -736,7 +736,7 @@ XhcPeiExecTransfer ( {
EFI_STATUS Status;
UINTN Index;
- UINTN Loop;
+ UINT64 Loop;
UINT8 SlotId;
UINT8 Dci;
BOOLEAN Finished;
|