diff options
author | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-10-20 17:55:01 +0800 |
---|---|---|
committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2017-10-23 15:50:55 +0800 |
commit | 6e3287442774c1a4bc83f127694700eeb07c18dc (patch) | |
tree | 9ad5b76c124281424e643434b4fcf9714a72e0d1 /MdeModulePkg | |
parent | e00e0dd7228c00b27cea5de9ed061576d2cd85b5 (diff) | |
download | edk2-6e3287442774c1a4bc83f127694700eeb07c18dc.tar.gz edk2-6e3287442774c1a4bc83f127694700eeb07c18dc.tar.bz2 edk2-6e3287442774c1a4bc83f127694700eeb07c18dc.zip |
MdeModulePkg/PciBus: Fix bug that PCI BUS claims too much resource
The bug was caused by 728d74973c9262b6c7b7ef4be213223d55affec3
"MdeModulePkg/PciBus: Count multiple hotplug resource paddings".
The patch firstly updated the Bridge->Alignment to the maximum
alignment of all devices under the bridge, then aligned the
Bridge->Length to Bridge->Alignment.
It caused too much resources were claimed.
The new patch firstly aligns Bridge->Length to Bridge->Alignment,
then updates the Bridge->Alignment to the maximum alignment of all
devices under the bridge.
Because the step to update the Bridge->Alignment is to make sure
the resource allocated to the bus under the Bridge meets all
devices alignment. But the Bridge->Length doesn't have to align
to the maximum alignment.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'MdeModulePkg')
-rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c index 8dbe9a0038..2f713fcee9 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c @@ -389,18 +389,7 @@ CalculateResourceAperture ( }
//
- // Adjust the bridge's alignment to the MAX (first) alignment of all children.
- //
- CurrentLink = Bridge->ChildList.ForwardLink;
- if (CurrentLink != &Bridge->ChildList) {
- Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
- if (Node->Alignment > Bridge->Alignment) {
- Bridge->Alignment = Node->Alignment;
- }
- }
-
- //
- // At last, adjust the aperture with the bridge's alignment
+ // Adjust the aperture with the bridge's alignment
//
Aperture[PciResUsageTypical] = ALIGN_VALUE (Aperture[PciResUsageTypical], Bridge->Alignment + 1);
Aperture[PciResUsagePadding] = ALIGN_VALUE (Aperture[PciResUsagePadding], Bridge->Alignment + 1);
@@ -410,6 +399,17 @@ CalculateResourceAperture ( // Use the larger one between the padding resource and actual occupied resource.
//
Bridge->Length = MAX (Aperture[PciResUsageTypical], Aperture[PciResUsagePadding]);
+
+ //
+ // Adjust the bridge's alignment to the MAX (first) alignment of all children.
+ //
+ CurrentLink = Bridge->ChildList.ForwardLink;
+ if (CurrentLink != &Bridge->ChildList) {
+ Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
+ if (Node->Alignment > Bridge->Alignment) {
+ Bridge->Alignment = Node->Alignment;
+ }
+ }
}
/**
|