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| author | Lou, Yun <Yun.Lou@intel.com> | 2022-03-11 23:58:51 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-03-14 06:12:29 +0000 |
| commit | a13dfc769bd7097d8d9ffe3e029a2c1d062d712b (patch) | |
| tree | 799b5c9980d7be78eac64dd14f6a307fcd2c0810 /MdeModulePkg | |
| parent | 52e09dcd7a16c54442c059c2db8b8754534f9a5f (diff) | |
| download | edk2-a13dfc769bd7097d8d9ffe3e029a2c1d062d712b.tar.gz edk2-a13dfc769bd7097d8d9ffe3e029a2c1d062d712b.tar.bz2 edk2-a13dfc769bd7097d8d9ffe3e029a2c1d062d712b.zip | |
MdeModulePkg/DxeIpl: Create 5-level page table for long mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2008
Correct the logic about whether 5-level paging is supported.
Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdeModulePkg')
| -rw-r--r-- | MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c index 0700f310b2..1ebab27820 100644 --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c @@ -15,7 +15,7 @@ 2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -748,8 +748,8 @@ CreateIdentityMappingPageTables ( CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL,
- &EcxFlags.Uint32,
NULL,
+ &EcxFlags.Uint32,
NULL
);
if (EcxFlags.Bits.FiveLevelPage != 0) {
|